{"repository":{"description":"An FPGA based downconverter using VHDL designed to run on the Spartan 3AN evaluation board","watchers":0,"stargazers":0,"forks":0,"fork":false,"size":328,"owner":"norbertbonnici","private":false,"open_issues":0,"has_issues":true,"has_downloads":true,"has_wiki":true,"language":"VHDL","created_at":"2013-04-29T10:10:03-07:00","pushed_at":"2013-05-06T09:38:39-07:00","master_branch":"master"},"actor_attributes":{"type":"User","name":"Norbert Bonnici","company":"University of Malta","blog":"http://norbert.bonnici.co","location":"Marsascala, Malta","email":"9a64d19dacd857bce518211baebf3f924f88bd29@bonnici.co"},"url":"https://github.com/norbertbonnici/SDR-downconverter/compare/ff70bc3391...3176d25a81"}