{"repository":{"description":"","watchers":0,"stargazers":0,"forks":1,"fork":false,"size":340,"owner":"TechVulcan","private":false,"open_issues":2,"has_issues":true,"has_downloads":true,"has_wiki":true,"language":"Verilog","created_at":"2013-05-02T22:40:02-07:00","pushed_at":"2013-06-21T04:20:27-07:00","master_branch":"master","organization":"TechVulcan"},"actor_attributes":{"type":"User","email":"da39a3ee5e6b4b0d3255bfef95601890afd80709"},"url":"https://github.com/TechVulcan/Project/issues/64"}