{"repository":{"description":"","watchers":1,"stargazers":1,"forks":0,"fork":false,"size":1980,"owner":"stefanrauch","private":false,"open_issues":0,"has_issues":true,"has_downloads":true,"has_wiki":true,"language":"VHDL","created_at":"2012-07-06T04:40:43-07:00","pushed_at":"2013-03-28T04:43:02-07:00","master_branch":"master"},"actor_attributes":{"type":"User","name":"Mathias Kreider","company":"GSI","email":"da39a3ee5e6b4b0d3255bfef95601890afd80709"},"url":"https://github.com/stefanrauch/bel_projects/compare/bc8c25de36...5aa2fe12d5"}