{"repository":{"owner":"scutwengxinqian","created_at":"2012-12-19T07:05:43-08:00","open_issues":0,"has_issues":true,"has_downloads":true,"pushed_at":"2013-01-02T19:01:00-08:00","description":"An OpenRISC based SoC platform. This work is based on git://openrisc.net/stefan/orpsoc","watchers":0,"forks":0,"fork":false,"size":9924,"stargazers":0,"private":false,"has_wiki":true,"language":"Verilog"},"actor_attributes":{"name":"Mark WENG","email":"88a3546efada7bfdc21581347a2b3e9ab94af67c@126.com","type":"User","location":"Shanghai, China"},"url":"https://github.com/scutwengxinqian/orpsoc/compare/topic"}