{"repository":{"description":"Verilog source code for the Octavo soft-processor. Comes with Quartus project generators and Modelsim scripts. Currently in rapid flux until I graduate.","homepage":"","watchers":4,"stargazers":4,"forks":1,"fork":false,"size":1156,"owner":"laforest","private":false,"open_issues":25,"has_issues":true,"has_downloads":true,"has_wiki":true,"language":"Verilog","created_at":"2013-05-29T08:03:51-07:00","pushed_at":"2013-10-01T11:56:30-07:00","master_branch":"master"},"actor_attributes":{"type":"User","email":"da39a3ee5e6b4b0d3255bfef95601890afd80709"},"url":"https://github.com/siupakm/Octavo"}