{"repository":{"description":"control module for a uart in vhdl. used to communicate 8 bit packages over serial bluetooth. ucf and clock dividers set up for the digilent nexys 3  FPGA (100MHz clock).","homepage":"","watchers":0,"stargazers":0,"forks":0,"fork":false,"size":1996,"owner":"kchapdaily","private":false,"open_issues":0,"has_issues":true,"has_downloads":true,"has_wiki":true,"language":"VHDL","created_at":"2013-04-20T09:53:02-07:00","pushed_at":"2013-04-21T12:29:41-07:00","master_branch":"master"},"actor_attributes":{"type":"User","email":"da39a3ee5e6b4b0d3255bfef95601890afd80709"},"url":"https://github.com/kchapdaily/BluetoothControl/compare/3ec6cdcefc...b4513355f3"}