{"repository":{"description":"Oldland CPU - a 32-bit RISC FPGA CPU including RTL + tools","watchers":3,"stargazers":3,"forks":0,"fork":false,"size":1560,"owner":"jamieiles","private":false,"open_issues":0,"has_issues":true,"has_downloads":true,"has_wiki":true,"language":"Verilog","created_at":"2013-07-03T10:14:38-07:00","pushed_at":"2013-10-03T10:09:41-07:00","master_branch":"master"},"actor_attributes":{"type":"User","name":"Jamie Iles","company":"Oracle","blog":"http://www.jamieiles.co.uk","location":"Bristol, England","email":"b4dde37aa2aac745c0e6c43447507eaeace3e59f@jamieiles.com"},"url":"https://github.com/jamieiles/oldland-cpu/compare/b6c16542e5...e57c08492c"}