{"repository":{"description":"VHDL code for a simulated environment of a 10-bit general bit general purpose single core processor.","watchers":0,"stargazers":0,"forks":0,"fork":false,"size":0,"owner":"shubhamjn","private":false,"open_issues":0,"has_issues":true,"has_downloads":true,"has_wiki":true,"language":"VHDL","created_at":"2013-07-18T08:01:17-07:00","pushed_at":"2013-07-20T00:52:03-07:00","master_branch":"master"},"actor_attributes":{"type":"User","name":"Shubham Jain","location":"New Delhi, India","email":"da39a3ee5e6b4b0d3255bfef95601890afd80709"},"url":"https://github.com/shubhamjn/Processor_simulation.vhdl/compare/master"}