{"repository":{"description":"Verilog in Python","watchers":0,"stargazers":0,"forks":0,"fork":false,"size":212,"owner":"GregWatson","private":false,"open_issues":0,"has_issues":true,"has_downloads":true,"has_wiki":true,"language":"Python","created_at":"2013-12-08T17:41:51-08:00","pushed_at":"2013-12-30T21:30:05-08:00","master_branch":"master"},"actor_attributes":{"type":"User","email":"da39a3ee5e6b4b0d3255bfef95601890afd80709"},"url":"https://github.com/GregWatson/PyVeri/compare/82563f55c3...bb6c1eee89"}