{"repository":{"description":"Simple MIPS Single Cycle CPU","homepage":"","watchers":0,"stargazers":0,"forks":0,"fork":false,"size":188,"owner":"UncleHandsome","private":false,"open_issues":0,"has_issues":true,"has_downloads":true,"has_wiki":true,"language":"Verilog","created_at":"2013-10-27T03:15:45-07:00","pushed_at":"2013-11-01T19:50:25-07:00","master_branch":"master"},"actor_attributes":{"type":"User","name":"Yun-Wei Lee","company":"NCTUCS04","location":"Hsinchu, Taiwan","email":"3f109244512577c28959d4ae00f5b1bea6c32687@gmail.com"},"url":"https://github.com/UncleHandsome/CO_Lab2/compare/2e23f44e84...877d456119"}