Each Process and Data (Process output) specifies a sample rate, stored as a fraction for absolute accuracy. For Processes, these sample rates are specified in the SystemML document; for Datas, these rates are specified by the creating process (and
Each Process and Data (Process output) specifies a sample rate, stored as a fraction for absolute accuracy. For Processes, these sample rates are specified in the SystemML document; for Datas, these rates are specified by the creating process (and will often match the Process sample rate, though this is not required). Given the integral Base Clock, BRAHMS can generate timing relationships between components with perfect accuracy. To understand these clocks better, review the GUI documentation.
Integral Base Clock
The use of an integral (rather than floating-point) Base Clock has pros and cons: it ensures accuracy and reduces the computational complexity of timing logic; on the other hand, range is limited by the width of the counters used (64-bit, in BRAHMS). However, to give an idea, if the BSR is 1GHz, the latest time on the Execution Clock that the Base Clock can represent is more than half a millenium after
A p