input; see [@VMEJ-circuits-supplemental] for architectural and implementation details and additional characterizations of performance. As with our depth and motion perception architecture, we observe over $\sim$2,000x speedups as compared to a highly optimized software implementation. Of the $\sim$2000x difference in speed, roughly $\sim$256x is directly due to parallelism — all of the pixels are independent dimensions, and can therefore be updated simultaneously.

[**(Figure 5 about here.)**]{} \[fig:learning\]

Automatically generated causal reasoning circuits and spiking implementations {#automatically-generated-causal-reasoning-circuits-and-spiking-implementations .unnumbered}
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Digital logic gates and their associated design rules are so simple that circuits for many problems can be generated automatically. Digital logic also provides a common target for device engineers, and have been implemented using many different physical mechanisms – classically with vaccum tubes, then with MOSFETS in silicon, and even on spintronic devices[@spintronicnand]. Here we provide two illustrations of the analogous simplicity and generality of stochastic digital circuits, both relevant for the reverse-engineering of intelligent computation in the brain.

We have built a compiler that can automatically generate circuits for solving arbitrary causal reasoning problems in Bayesian network models. Bayesian network formulations of causal reasoning have played central roles in machine intelligence[@pearlprobabilistic] and computational models of cognition in both humans and rodents[@blaisdellcausal]. 