a 128M channel spectrum analyzer, covering frequency bands from 1000 MHz to 1500 MHz with a frequency resolution of about 3.725 Hz. The system is composed of a front end, based on field programmable gate array (FPGA) systems and a back end based on GPUs, connected by a 10 Gbps Ethernet switch.

The architecture of the FAST multi-beam SETI instrument is shown in Figure \[fig:2\]. The front end performs analog to digital conversion resulting in 8 bit digital samples. These are packetized into 4 KB Ethernet packets and multicast across the network to the back end. Each FPGA can process data from two beams, requiring 10 boards for the 19 beam feed array. The FPGA system employed is CASPER ROACH2 (Hickish et al., 2016). These are widely used and supported within the radio astronomy community. In addition to sending raw samples to the SETI back end, the FPGAs form integrated power spectra for transmission to the Fast Radio Burst(FRB) back end. Multicast is employed so that identical data streams can be received and processed by multiple experiments.

At the back end, data reduction and analysis are performed on the GPU and the results, along with observatory meta-data (e.g. time, pointing, 