to keep things simple here and represent them simply by resistors $Z_{0}$’s) as shown in Fig. . This circuit is an augmented version of the multiport canonical circuit in Fig. where $N_{D}$ “drive ports” are added. The drive ports are defined at positions where drive lines reach the chip (see Appendix for more details on how to define the drive ports in an 3D finite-element electromagnetic simulator). They are connected to transmission lines of characteristic impedance $Z_{0}$ (typically $Z_{0}=50\Omega$) which in turn are shunted by the voltage sources $V_{d}$ for $1\leq d\leq N_{D}$. Such a simple circuit model will allow us to derive expressions for the couplings $\varepsilon_{id}$ of the qubits to voltage drives in this section. A similar analysis in Section will allow us to compute Purcell loss rates of the qubit modes due to their coupling to the drive lines.

As we show in Appendix the circuit in Fig. has the following Hamiltonian given in Eq. in the final block-diagonalized frame corresponding to $\widetilde{\mathbf{M}}_{1}$ in Eq.

$$H=\frac{1}{2}\left(\boldsymbol{q}-\mathbf{C}_{q}*\mathbf{V}_{V}\right)^{T}\left(\boldsymbol{q}-\mathbf{C}_{q}*\mathbf{V}_{V}\right)+\frac{1}{2}\boldsymbol{\phi}^{T}\widetilde{\mathbf{M}}_{1}\boldsymbol{\phi}+\mathcal{O}(\boldsymbol{\varphi}_{J}^{4})$$

where the $(N+M)\times N_{D}$ matrix $\mathbf{C}_{q}$ gives the coupling of the voltage sources $\mathbf{V}_{V}=(V_{1},\ldots,V_{N_{D}})$ to the charge degrees of freedom $\boldsymbol{q}$ of the circuit. After quantizing this Hamiltonian by introducing the 