[@PrViPaSc2009; @BlViPr2010; @BePaPa2011; @HaLePl2010; @We2010; @We2011], as well as in other areas of physics [@HeSiBeGuTi2010; @Ti2010; @ClBaBaBrRe2010].

These GPUs have a Toolkit that abstracts the end-user from many low-level implementation details, yet all the typical problems of concurrency exists and they are magnified by the massive amount of (virtual) threads it is capable to handle. An extremely fine grained concurrency is possible and advised thanks to the Single Instruction Multiple Thread (SIMT) model. Therefore, any non trivially independent problem requires a correct concurrency control (synchronization), and the lack of it hinders correctness in a much dramatic way than current 4 or 8-way multicore CPU systems. The other challenge apart from correctness is performance, and here is where the algorithm design practice excels. Taking into account internal memory structure, memory/computation ratio, thread division into blocks and thread internal state size, can boost the algorithm performance ten times from a trivial implementation [@Ryoo08]. It is also customary to give an approximation of the speedup obtained from a CPU to GPU implementation in terms of “$N$x”, even though, as we discuss later, this number will always depend on the corresponding efforts devoted to optimally programming for each architecture.

In this work we focus 