row cycle time $tRC$.

Therefore, the write queue draining delay $L_{wq}$ is given by $$\begin{split}
L_{wq} = N_{wq} \times tRC + tWTR. \\
\end{split}
\label{eq:wqdrain}$$

Then, the worst-case delay for a read request for the core under analysis arises when the request arrived right after (1) the write queue drain process began and (2) $N_{rq}$ read requests from other cores arrived. A simplified illustrative example is shown in Figure \[fig:timing-worst\]. In the figure, at time 0, three events occurred in-order: (1) the write queue drain started to process two pending write requests (WR1 and WR2); (2)two read requests (RD1 and RD2) from competing cores arrived; (3) a read request (RD3) from the core under analysis arrived. In this case, the RD3 must wait until all previous activities finish.

Therefore, the worst-case inter-bank delay $D_p$ for a read request on the core under analysis $p$ is expressed as follows:

$$D_{p} = L_{rq} + L_{wq}.$$

Finally, the total inter-bank memory delay of $t_i$ can be computed by $$H_i \times D_p,$$ where $H_i$ is the number of LLC misses.

Evaluation {#sec:evaluation}
==========

In this section, we first present details on the hardware and software platform used in our evaluation. We then present our 