2.  Requiring SC on all shared variables is costly in terms of performance on contemporary multi-core CPUs. In Fig. \[fig:mem:example\], performance can be improved by allowing a less strict memory order for variable [Data]{} (to be addressed in Section \[sec:mm\]).

3.  Although Ada provides the highly abstract PO monitor-construct for blocking synchronization, there is currently no programming primitive available to match this abstraction level for non-blocking synchronization.

Contemporary CPU architectures relax SC for the sake of performance [@Adve:SMC:tutorial; @Hennessy:acquire:release; @Hill:CSprimer]. It is a challenge for programming language designers to provide safe, efficient and user-friendly non-blocking synchronization features. The original memory model for Java contained problems and had to be revised [@Manson:JMM]. It was later found to be unsound with standard compiler optimizations [@Sevcik:JVM:CC:problems]. The C++11 standard (cf.[@c++11; @will:c++]) has already specified a strict memory model for concurrent and parallel computing. We think that C++11 was not entirely successful both in terms of safety and in terms of being user-friendly. In contrast, we are convinced that these challenges can be met in the upcoming Ada 202x standard.

It has been felt since Ada 95 that it might be advantageous to have language support for synchronization based on atomic variables. For example, 