(using the same notation as in [@Bjornson2015a] for simplicity) the APC is computed as $$\begin{aligned}
 \notag
\mathrm{APC}  &=  \lambda \bigg( \left( 1- \frac{\beta K - 1}{S} \right) \frac{\rho \omega}{\eta}  \frac{ \Gamma({\alpha}/{2} +1 ) }{ (\pi \lambda)^{\alpha/2} } K  \\ & +\! \mathcal{C}_0 \! +\! \mathcal{C}_1 K \!+\! \mathcal{D}_0 M \!+\! \mathcal{D}_1 M K \bigg)  \!+\! \mathcal{A} \cdot \mathrm{ASE} \label{eq:def-APC}\end{aligned}$$ where $\eta \in (0,1]$ is the linear power amplifier efficiency, $\mathcal{C}_0$ models the static power consumption at a BS, and $\mathcal{D}_0 M$ models the power consumption of the BS transceiver chains, which scales with the number of BS antennas. Moreover, $\mathcal{C}_1 K + \mathcal{D}_1 M K$ models the power consumed at the UEs and also by the signal processing tasks at the BS, except for the coding and decoding that are proportional to the number of bits (with proportionality constant $\mathcal{A}$). Notice that has an intuitive polynomial structure in $M$, $K$, and $\rho$. We refer to [@Bjornson2015a] for further modeling details. The forthcoming analysis holds for any positive values of the above parameters, but some examples are later given in Table \[table\_parameters\_hardware\].

The objective of this work is, for any given frame length ($S$), propagation parameters ($\alpha,\omega$), and hardware characteristics ($\eta,\epsilon, 