logical qubit in $49=7^2$ physical qubits and with minimal distance $9=3^2$. The procedure can be repeated and we have simulated up to 4 levels of concatenation.

To simplify our task, we have assumed that the device only suffers from initial memory error, i.e., we assume that the gates used to error-correct are noiseless. While this is not a realistic assumption, it very significantly reduces the dimension of the noise model manifold. Indeed, a complete noise model would not only need to specified the single qubit CPTP map $\cE$ describing the noise suffered by an idle qubit, but would further specify a noise model of each unitary gate, measurement process, and state preparation. Thus, we can anticipate that understanding critical parameters in a complete noise model will be much more challenging than in the simplified model we adopt here, so our conclusions remain perfectly valid despite this simplification.

Here we outline the steps in our numerical simulation, technical details can be found in the appendix. We initialize the simulation in an 8-qubit maximally entangled state, $\rho_0$, between an encoded qubit in the Steane code and a reference qubit. While the reference qubit is noiseless, a single qubit channel $\cE_{0}$ is applied 