Department of Computer Science, University of California, Los Angeles
Yunsheng Bai, Atefeh Sohrabizadeh, Zongyue Qin, Ziniu Hu, Yizhou Sun, Jason Cong
integrated circuit design;FPGAs;hardware design automation;hardware design optimization;representation learning;source code;assembly code;multi-modality;graph neural network;transformer;pretraining;high level synthesis;benchmark
Towards a Comprehensive Benchmark for High-Level Synthesis Targeted to FPGAs