cs.AR C.1.3 [Other Architecture Styles]: RISC (Reduced Instruction Set
  Computing)
Research on LLM Acceleration Using the High-Performance RISC-V Processor "Xiangshan" (Nanhu Version) Based on the Open-Source Matrix Instruction Set Extension (Vector Dot Product)
Xu-Hao Chen Si-Peng Hu Hong-Chao Liu Bo-Ran Liu Dan Tang Di Zhao