Technically there is no reason why a chip set cannot support a 486DX50 and
a 25MHz local bus.

I'm waiting for the mezzianine (sp?) VL bus that will be decoupled from
the main CPU clock and allow for many more slots due to the user of buffers.

This will allow the use of ever faster CPUs with the same standard I/O
cards. Until the next buss spec...



Guy