[1]Sreeni Poolakkal

[1]School of Electrical Engineering and Computer Sciences, Washington State
University, 355 NE Spokane St, Pullman, 99163, WA, USA

2]Additive Printing, Boeing, AL, USA

3]Department of Electrical and Computer Engineering, University of British
Columbia, State, CAN

4]Department of Materials Science and Engineering, University of Maryland, MD,
USA

5]Department of Mechanical Engineering, Auburn University , AL, USA

# Real-time Deformation Correction in Additively Printed Flexible Antenna
Arrays

<EMAIL_ADDRESS>Abdullah Islam  Shrestha Bansal  Arpit Rao  Ted
Dabrowski  Kalsi Kwan  Amit Mishra  Quiyan Xu  Erfan Ghaderi  Pradeep Lall
Sudip Shekhar  Julio Navarro  Shenqiang Ren  John Williams  Subhanshu Gupta  *
[  [  [  [

###### Abstract

Conformal phased arrays provide multiple degrees of freedom to the scan angle,
which is typically limited by antenna aperture in rigid arrays. Silicon-based
RF signal processing offers reliable, re-configurable, multi-functional, and
compact control for conformal phased arrays that can be used for on-the-move
communication. While the lightweight, compactness, and shape-changing
properties of the conformal phased arrays are attractive, these features
result in dynamic deformation of the array during motion, leading to
significant dynamic beam pointing errors. We propose a silicon-based, compact,
reconfigurable solution to self-correct these dynamic deformation-induced beam
pointing errors. Furthermore, additive printing is leveraged to enhance the
flexibility of the conformal phased arrays, as the printed conductive ink is
more flexible than bulk copper and can be easily deposited on flexible sheets
using different printing tools, providing an environmentally-friendly solution
for large-scale production. The inks such as conventional silver inks are
expensive and copper-based printable inks suffer from spontaneous metal
oxidation that alters trace impedance and degrades beamforming performance.
This work uses a low-cost molecular copper decomposition ink with reliable RF
properties at different temperature and strain to print the proposed
intelligent conformal phased array operating at 2.1 GHz. Proof-of-concept
prototype $2\times 2$ array self-corrects the deformation induced beampointing
error with an error $<1.25^{\circ}$. The silicon-based array processing part
occupies only 2.58 mm2 area and 83 mW power per tile.

###### keywords:

Additive Printing, conformal phased arrays, deformation correction, beam
stabilization, molecular copper decomposition ink, self-correction loop,
scalable tile-based.

##  1 Introduction

Phased array systems support directional data transfer, which enables inherent
spatial selection to support ever-increasing wireless data rate. Initial
research on the phased arrays started several decades back (earliest reported
in 1909) to enable inertia-free fast beam steering by avoiding mechanical
gimballing [1, 2]. The underlying assumption in these works was that the
antenna surfaces were rigid. By the 1940s, conformal arrays were developed to
curve around spherical and nonuniform surfaces[3, 4, 5, 6] that afforded array
systems an added degree of freedom by eliminating the conventional radome.
Conformal phased arrays have been used extensively since then in the
automotive, aviation, and space industries. Having a non-uniform antenna
structure enhances the field of view (FoV). When deployed on an aircraft, the
array benefits from the aerodynamic shape of the plane, which improves the
fidelity of the in-flight wireless and makes the airborne systems such as
Unmanned Aerial Vehicles (UAV) management easy, as shown in Fig. 1.

Satellite communication (SATCOM) has embraced conformal phased arrays due to
their lightweight, small volume, and shape-changing properties. The manageable
costs associated with launching and deploying [7, 8] have led to the
widespread adoption of conformal phased arrays in Low-Earth Orbit (LEO)
satellites[9]. LEO satellite networks such as Amazon Kuiper[10], SpaceX
Starlink [11], OneWeb, and Telesat Light-speed, boast coverage fields that
collectively span the entire terrestrial surface area, opening profound
opportunities for direct-to-consumer wireless communications in remote areas
[12, 13]. These satellite networks, in conjunction with wearable/textile
arrays[14, 15, 16], will further aid challenging research expeditions and
facilitate disaster relief management as illustrated in Fig. 1.

Figure 1: Dynamic wing load variations and wing vibrations lead to deformed
antenna arrays impacting in-flight wireless and navigation in Unmanned Aerial
Vehicles (UAV); dynamic deformation in SATCOM and lightweight textile arrays.
Silicon-based self-correction processor addresses gain loss and beam pointing
error due to dynamic deformation in conformal phased arrays in real-time with
the proposed additively printed, lightweight, tile-based flexible array.

Surface deformation of a conformal phased array with curvature enhances its
Field-of-View (FoV) but incurs increased inter-element coupling [17] and path
length variations leading to beam pointing errors [18]. For satellites, it is
possible to estimate the amount of deformation following the expansion of
arrays once they are placed in orbit. While the initial deformation due to the
aerodynamic shape of aircraft and drones can be estimated, the dynamic
deformations arising from wing loading and vibrations[19] during transit
cannot be predetermined. These dynamic deformations depend on factors such as
array weight, size, drone/aircraft speed, wind conditions, initial
deformation, etc. Intelligent self-adaptive conformal phased arrays will serve
as the cornerstone to enable existing and emerging applications, as shown in
Fig. 1, while overcoming limitations from dynamic deformations [20].

Recent studies have explored numerous strategies for correcting the radiation
pattern of conformal phased arrays [21, 22, 23] arising from physical
deformities. However, element-level deformation sensing and compensation with
conventional mechanical strain sensors [24, 25] and sensing mutual coupling
[26, 27] has been ineffective due to complexity and non-planar shapes beyond
single-point curvature. Machine-learning (ML), and in particular, pre-trained
deep-learning-based networks, are increasingly being used for adaptive beam
synthesis, allowing arbitrary shape correction based on training[19]. However,
it relies heavily on feature-rich longitudinal-series training data with prior
knowledge of the deformation surface and uncertain operational environments.
These models further require separate dictionary sets for near-field and far-
field patterns as well as environmental conditions, demands exponential
increase in storage as the array size is scaled. The multi-dimensional
variable dynamic range search algorithm in [28], employs array-level
compensation suited for both near- and far-field. However, its higher
computational complexity and the additional requirement for separate
generation and recovery units with high computing power along with low-power
transceivers make this technique challenging to adapt for airborne platoons
and portable units. Phase correction using iterative methods such as genetic
algorithm [29] and iterative phase synthesis [30, 31, 32] not only requires
external engines for executing the iterative algorithm, but also incurs large
latencies not suited for fast communications-on-the-move applications.

In this article, we present a self-adaptive conformal phased array additively
printed using a novel copper molecular decomposition ink with inherent
deformation correction from both material (additively printing-based) and
physical deformation effects. While the ink shows outstanding electrical
performance capabilities matching the performance of the traditional chemical
etching process, and exhibiting stable RF characteristics under varied
temperatures and strain conditions, the silicon-based calibration technique
effectively compensates for dynamic deformities, irrespective of the nature of
deformation.

Figure 2: Tile based array scaling with edge computing for gain, phase, delay
and impedance self-calibration loops (conceptual). The proposed additively
printed $2\times 2$ conformal tile layer stackup with beamforming IC and a.
Full break down of Inks in each layers of array, Ball Milled Cu Ink b. SEM
(Scanning Electron Microscope) of the ink before sintering, and after
sintering c. Test setup for resistance measurements at different temperatures:
Printed traces using the copper molecular decomposition ink are placed on a
hot plate, and the temperature is varied to note the variation in resistance
with respect to temperature. d. Measured resistance at different temperatures.

##  2 Results and discussions

###  2.1 Low-cost reliable molecular copper decomposition ink for additive
printing

Additively printed RF circuits have gained prominence in next-generation
wireless systems with their ability to generate non-uniform conformal shapes
required for large-scale infrastructure while being environmentally-friendly
[33, 34, 35, 14, 15, 16]. Recent works for additive printing techniques such
as aerosol jetting, ink jetting, direct writing, and screen printing have
shown enhanced scalability, reduced material waste generation, and cost-
effective manufacturing processes. However, the efficacy of the additive
printing method is heavily contingent upon the quality and properties of the
conductive inks utilized in the application. Common challenges in additive
manufacturing of conductive inks revolve around printability and electrical
performance [36]. Factors such as additives, ink viscosity, uniformity,
micro/nanomaterial structure, and size directly influence the potential
printing method, substrate material, sintering conditions, and electrical
performance of the traces. The electrical performance of printed conductive
traces is also commonly evaluated for stability under repeated exposure to
high temperatures, corrosive environments, and mechanical bending and torsion,
reflecting long-term reliability during use.

Current developments of the ink drives a cheaper and higher performance
alternative to existing metallic, polymer, and carbon-based inks that are
increasingly costly or fail to meet the electrical performance standards
achieved through conventional manufacturing methods [37]. When considering
conductive inks, metallic-based inks consistently demonstrate superior
performance in RF electronics due to their inherently higher conductivity,
thermal conductivity, and suitability for various additive manufacturing
methods. Metallic-based inks typically fall into two categories: metallic
nanostructured-based inks and molecular precursor-based inks. The former often
involve nanoparticles, nanowires, or nanoplates as the fundamental conductive
element, while the latter are typically in a precursor form that is reduced
during sintering to form the metallic state of the salt.

Figure 3: a. Dipole antenna printed using proposed Cu decomposition ink
testing under varied strains b. Laser ablated dipole antenna tested at
different temperatures on a hotplate c. Test set up for measuring ink
stability under different strains. d. Measured S11 of the dipole antenna
printed using Cu ink to demonstrate ink stability at different temperatures
and e. strain.

Although silver (Ag)-based inks have been largely appreciated due to their low
resistivity (1.59 $\mu\Omega.cm$) for use in printed electronics, their high-
cost margins make copper (Cu) a much more cost-effective alternative with
potential for comparable resistivity performance (1.72 $\mu\Omega.cm$) [38,
39]. However, excessive additives needed to improve printability of Cu
nanostructured inks and with a greater potential for ambient condition
oxidation suggests that molecular Cu-based inks are more advantageious for
long term commercial and industrial applications [39, 40, 41]. Herein a
molecular Cu formate-based ink is utilized to create a highly conductive Cu
thin-film ($=$35 MS/m)[40] on a Pyralux substrate with demonstratively
consistent electrical, and RF performance under varied strains and
temperatures.

Figure 4: a. 4-element beamforming receiver architecture with four
downconverters and discrete-time beamformer with self-corrected calibration
loop in feedback. The beamformer output is digitized using an off-chip ADC and
fed back to the on-chip calibration loop. b.A single tile self-calibration
loop structure for correcting beam pointing error c. Single channel receiver
architecture with LNTA, downconversion mixer, phase shifter, TIA, and time-
delayed sampler. d.Illustration of self-calibration loop finding optimum phase
control code under dynamic deformation.

###  2.2 Scalable tile-based delay-phase tunable receiver array

The emergence of highly integrated silicon-based RF signal processors has
revolutionized array synthesis and beam steering with multi-modal spatial
signal processing [42, 43, 44], enabling high Signal-to-Noise Ratio (SNR) in
commercial arrays. When the number of elements increases, the beam width
reduces, thereby enhancing the spatial selectivity. At 2.1 GHz, the antenna
dimensions are in centimeters, and therefore, scaling to a larger array is not
straightforward. This scaling comes with several challenges [45], such as
additive printing of high-resolution structures with physically large
dimensions and combining signals from multiple antennas over wide bandwidth
with high signal-to-noise ratio. We are adopting a modular tile-based approach
for the receiver array as shown conceptually in the illustration in Fig. 2. In
this work, each tile consists of a $2\times 2$ conformal antenna array
attached to a 4-channel beamforming integrated circuit (BFIC). Figure 5e shows
four tiles thermally bonded together to form a 16-element array. The BFIC in
each tile combines each antenna signal and, therefore, acts as a sub-array.
Each sub-array outputs are then combined using a second-stage combiner to
achieve $4\times 4$ radiation pattern. The gain, phase shift, and impedance
mismatch, and delay skews exacerbates as the array scales. The modular tile-
based array structure thus enables easier calibration of larger arrays. An
N-element array can be divided and processed into N/4 sub-arrays.

The BFIC in a $2\times 2$ tile performs discrete-time true-time-delay BFIC as
shown in Fig. 4a. The developed ink and the printing technique ensure that the
four channels of the BFIC are connected to each antenna through impedance-
matched via holes and traces. Each receiver front end provides a low-noise
impedance matching to the antenna/PCB trace impedance. The receiver channels
are capable of supporting higher modulation schemes, including M-QAM
(Quadrature Amplitude Modulation) and OFDM (Orthogonal Frequency-Division
Multiple Access). To process the higher modulated signals, the receivers down-
convert the incoming RF signals to the baseband while extracting the in-phase
(I) and quadrature-phase (Q) components. Beamforming of the four channels is
performed in the baseband after I/Q extraction using a discrete-time
beamformer [46]. Time-delayed sampling of the extracted I/Q baseband signals,
along with the LO (Local Oscillator) phase shifter, captures coherent samples
from each element and enables wideband beamforming as shown in Fig. 4a [47].
Independent gain, phase, and delay tuning is provided for each of the I and Q
channels to reduce the respective mismatches in each channel. A high-frequency
external clock ($2\times$RF input frequency) is provided for the signal down-
conversion and time-delayed sampling, which is susceptible to impedance
variations due to deformation and printing imperfections. A tunable impedance
matching network is used at the clock input to alleviate these impedance
imperfections.

The PCB stack-up for the prototype conformal tile is shown in Fig. 2, with the
4-channel BFIC attached to a $2\times 2$ additively printed array with the
backplane antenna. The additively printed conformal array comprises of
flexible sheets of multiple DuPont Pyralux® AP (polyimide) and Ninjaflex
substrates. The BFIC and its RF and non-RF traces are printed over AP layers
of thickness 0.127 mm, combined using 0.0508 mm Fast Rise EZ (epoxy). The
antenna ground plane is printed over 0.254 mm AP combined with other layers
using 0.0508 mm Fast Rise EZ. The antennas have been printed on a Ninjaflex
substrate with 7.62 mm thickness, chosen to meet the ground plane height
requirements at 2.1 GHz. Circular patch antennas are used, as bending has
minimal impact on the return loss and gain. The three DuPont Pyralux® AP
sheets are combined using Fast Rise EZ as mentioned, which are then thermally
bonded with the Ninjaflex substrate.

A full breakdown of inks used in each layer are also shown in Fig. 2. The
implemented BFIC is on layer 5 with Cu ink printed non-RF traces on layer 4.
Cu clad is used for RF traces on layer 3 and antenna reflector on layer 2.
Finally, Ag (silver) ink is used to print antennas on layer 1 (shown in Fig.
6e). Ag vias and Cu Ink vias that were fixed with Ag are used between the
layers.

###  2.3 On-chip dynamic deformation correction

Beam pointing errors due to deformation, as explained in Section 1, can lead
to loss in communication, even a small misalignment can drastically degrade
the SNR. We propose a low-power, low-area silicon-based self-calibration
technique inspired by model-free techniques such as perturb and observe and
extremum-seeking[48, 49] principles.

The BFIC output is fed into an integrated self-calibrating loop considering
the fact that a beamformer has only one maximum point, which corresponds to
the main lobe. The side lobes are considered as local maxima. For each angle,
corresponding to each deformation condition (single- or multiple-curvature),
there is a unique phase shift combination (and corresponding phase code word)
for each element. For an 8-bit phase shifter, there are thus $2^{8}$ possible
phase shifts. At a given AoA and a given deformation (single- or multiple-
curvature), for a $2\times 2$ array, there are $2^{8\times 3}$ phase-shifting
options, where one element is taken as reference (labeled as REF receiver in
Fig. 4a). Only one combination among these gives the maximum SNR when the beam
is perfectly aligned with the transmitter. Incremental time-based search
counters to validate each option is impractical for aforementioned
applications-on-the-move. A data-driven or model-driven ML model can provide
the optimum combination quickly but gets easily stuck into an unknown
condition considering the plethora of uncertainties in real applications. The
proposed integrated loop ensures fast convergence to the optimum phase shifter
combination.

Figure 4b show the self-calibration loop. The deformation correction process
is captured in the following steps illustrated in Fig. 4d:

  * •

Step 1: Sinusoidal perturbations 1 are generated by the global on-chip look-up
table (LUT).

  * •

Step 2: These perturbations are then amplified by
$a_{\phi_{\textsubscript{n}}}$ (based on the convergence requirements)
followed by perturbation to the phase control code around initial phase
$P_{\phi,\text{int}}$.

  * •

Step 3: The loop captures $BF_{\textsubscript{out}}$ variations in response to
the perturbations 2

  * •

Step 4: The high-pass filter (HPF) and the multiplier 3 estimate the slope and
the following accumulator estimates the subsequent step size dynamically 4.
The dynamic step size generation ensures fast convergence.

  * •

Step 5: After recursive iterations, each receiver settles with the phase
shifter combination that corresponds to maximum SNR.

The following part of this section explains the proposed loop operation for
determining the optimal phase control code $P_{\phi\text{,opt}}$. For
simplicity we consider only 2 -elements, considering first element as
reference (REF). The phase shifter of the second element is initialized with
$P_{\phi\text{,int}}$. The LUT generated perturbation is added to the initial
phase control code ($P_{\phi,int}+a_{\phi}sin[\omega\text{n}]$ ) resulting in
a sinusoidal change in phase as shown in Fig. 4d. The perturbation is
amplified by $a_{\phi}$ based on the convergence requirement when adding
multiple calibration loops. Subsequently, the resulting $BF_{\text{out}}$ is
applied to the HPF to center it around zero mean, facilitating the capture of
resultant variations in $BF_{\text{out}}$. The filter cutoff frequency is
deliberately set to a low value to ensure the capture of slow-varying
perturbations. The captured $BF_{\text{out}}$ variations are then multiplied
with initial perturbations to discern the slope. A correction factor $\Psi$ is
needed to compensate the test bench delay, so that both signals will be in
phase at the multiplier input. The sign and amplitude of this multiplier
output determine the direction and perturbation amplitude (step size) for the
subsequent set of iterations (more detailed calculations are shown in Appendix
B). The multiplier output is then cumulatively added with the past iteration
values to determine a new step size, which is then incorporated into the phase
control code, as depicted in Fig. 4d. As the phase control code approaches
$P_{\phi\text{,opt}}$, the change in $BF_{\text{out}}$, and consequently, the
multiplier output diminishes, signifying that the loop is nearing convergence
to $P_{\phi\text{,opt}}$. Figure 4d illustrates convergence to
$P_{\phi\text{,opt}}$ in both $P_{\phi\text{,opt}}>$ $P_{\phi\text{,int}}$ and
$P_{\phi\text{,opt}}<$$P_{\phi\text{,int}}$ scenarios. It is noteworthy that
any dynamic changes in deformation may shift the optimal phase control code,
prompting the loop to adapt and self-adjust the phase control code
accordingly.

##  3 Methods

###  3.1 Ink design details

The copper thin-film material was made from a copper formate-based ink slurry
developed through ball milling. The ink included a ratio of 0.45:5:0.45 of
copper formate, di-ethylene glycol butyl ether (DEGBE), and dimethylformamide
(DMF) respectively in a ceramic ball milling container at an rpm of 300 for 1
hour. The respective slurry was collected in a centrifuge tube after the
mechano-chemical synthesis and centrifuged at 6000 rpm for 5 minutes and
decanted to remove excess solvents. It was consequently redispersed in 2 mL of
DEGBE and centrifuged and decanted once more to remove any excess DMF in
solution. Fig. 2b shows the ink before sintering, and after sintering. Prior
to sintering the ink is made of an approximate Cu formate flake size
distribution from 1-25 µm. After sintering, the copper formate flakes reduce
and form a densely percolated thin film of copper nanoparticles.

Figure 2c shows the test setup for validating the electrical properties of the
ink at different temperatures. The ink remains stable and shows $<3\%$ change
in resistivity across 50∘ C temperature change. Fig. 3a shows the test setup
for validating the stability and RF properties of the ink under various
strains. A simple stretchable dipole antenna is printed using the proposed ink
and captured the S11 under various strains from 4mm to 9mm. Similarly, the S11
captured at various temperature from the test setup shown in Fig. 3b. The RF
properties and ink stability at the frequency of interest (2.1 GHz) is
verified under various temperature and strain as shown in Fig. 3d and Fig. 3e.

###  3.2 IC design details

Both BFIC and deformation correction loop are designed and fabricated in TSMC
65nm GP CMOS process. Direct conversion (homodyne) architecture is adopted for
each receiver channel in the BFIC, thus down-converting the RF signal directly
to the baseband. As shown in Figure 4c, the front-end of each channel is an
inductively degenerated low-noise transconductance amplifier (LNTA) for
impedance matching with the antenna. The LNTA is followed by a double balanced
current-mode passive mixer driven by four-phase LO clocks. The double balanced
structure of mixer enables I/Q extraction from the incoming signal as well as
rejects the LO feed through in both RF and IF port. This helps to avoid the
offset error in the baseband signal due to self-mixing as well as LO induced
baseband distortion. The down-converted quadrature outputs are then applied to
a tunable trans-impedance amplifier (TIA) with 3-bit gain calibration( 7dB to
10dB as shown in Fig. 6e) . The TIA is designed using a single-stage pseudo-
differential amplifier stabilized using a common-mode feedback circuit.
Further, a 3-bit tunable capacitor bank provides first-order channel (blocker)
filtering up to 70 MHz for each of quadrature paths separately. A second-order
blocker filtering is provided by the large capacitance at the input of the TIA
which bypasses the blocker component from the baseband signals to ground. A
p-channel source-follower buffer (BUF) followed by the TIA is used to drive
baseband discrete-time beamformer.

As mentioned in Section 2.2, the beamformer is realized using a discrete-time
sample-and-hold architecture. The beamforming network consists of time-
interleaved switched-capacitor array that samples signals from each channel.
Based on the AoA and the delay experienced by each element, the sampling
instance can be adjusted to extract coherent samples from each channel. This
time delayed sampling is enabled by the phase-shifter (PS) in the LO path with
the phase-interpolator (PI) in the sample-and-hold clock path which provides
true-time-delay and enables beamforming over a wide fractional bandwidth
without beam-squint issue[47]. Th 8-bit PS, designed using an inverter-based
vector modulator architecture, offers $5.6^{\circ}$ phase resolution in each
of the four quadrants. The inverter-based PI in the sampler clock provides
6-bit tunability with a delay resolution of 76 ps. This work considers
deformation correction over $\approx$70 MHz base-band bandwidth which requires
the PS tuning only for correcting the beam-pointing error. Both PI and PS are
designed in the clock path away from the signal path, to minimize direct noise
injection into the signal.

The captured coherent samples are integrated over a clock period for
beamforming. A two-stage internally compensated OTA with 685MHz unity-gain
bandwidth is designed for the beamforming. A 4.2 GHz external clock feeds the
on-chip LO and sampler clock generator with a 4-bit tunable matching network
as mentioned in Section 2.2. The clock generator includes static clock
dividers, clock drivers, and regenerator circuits to minimize power
consumption. The prototype BFIC occupies 2.56 $\text{mm}^{2}$ (Fig. 6a) area
(including pads) and consumes 18.5 mW per channel.

Independent self-calibration loops are provided for each of the phase shifters
$\phi_{1}$, $\phi_{2}$, $\phi_{3}$, implemented in an all-digital fashion that
facilitates fast synthesis. The perturbation frequency, $\omega_{\text{p}}$,
is set to a low frequency of 30 rad/s generated using a LUT with 128 entries.
Each entry in the LUT is 17-bit long with the first two bits representing sign
and magnitude. The HPF cut-off is set as 5 rad/s, to capture the slow
variations in the $BF_{\text{out}}$. The accumulator gain of each loop is set
as follows: $a_{\phi\text{1}}=15$ , $a_{\phi\text{2}}=20$, and
$a_{\phi\text{3}}=25$ to achieve faster convergence. Each loop provides a
16-bit digital output representing the phase code word for the corresponding
phase shift control. The $BF_{\text{out}}$ captured from BFIC is normalized to
a 16-bit input ranging from -31 to +32, where MSB bit represents the sign,
next 5-bits represent the integer value, and lower 10-bit for the fractional
part. The calibration loop occupies 0.026 $\text{mm}^{2}$ area per PS while
consuming 1.5 mW.

Figure 5: Measurement setup for deformation correction verification and
radiation pattern. a. Illustration of test setup. b. Test bench for over-the-
air measurements. c. Calibration loop reduces deformation error to
$<1.5^{\circ}$ from $7^{\circ}$; corresponding change in phase shifter codes
$\phi_{1}$, $\phi_{2}$, $\phi_{3}$ are captured d. Radiation pattern without
deformation and with deformation after correction at $0^{\circ}$ Azimuth. e.
(left) weight measurement of $2\times 2$ tile with BFIC and its connections,
(right) Measurement setup for worst-case deformation with 38 cm radius of
curvature by tiling four $2\times 2$ conformal arrays.

###  3.3 Measured results

Figure 5a illustrates the test setup employed to validate the BFIC and the
proposed dynamic deformation correction technique. The wideband modulated
signals are generated in MATLAB and transmitted through a Pasternack PE9887
horn antenna using DAC on Xilinx ZCU216 RFSoC. The 3D-printed array, along
with the BFIC, is mounted on the DAMS D6025 antenna measurement platform as
shown in Fig. 5b. A 4.2GHz differential clock is provided from ADF4372 EVM
(wideband synthesizer) to the internal LO and sampler clock generation circuit
of the BFIC. The bias voltages for both the BFIC and the self-calibration loop
are provided using a DAC81416 EVM (DAC) and the serial control bits to the on-
chip serial to parallel interface (SPI) registers being applied from a
Digilent Analog Discovery 2 board. The quadrature $BF_{\text{out}}$ outputs
post combining from BFIC is captured on the Xilinx ZCU216 ADCs and
subsequently converted to a 16-bit digital word using a mapping function. The
digital $BF_{\text{out}}$ is then fed to the calibration loop, interfaced
through a Waveshare QFN-64 programmable adapter socket. After each iteration,
the new control bits for each phase are captured from the respective
calibration loops and updated to the serial control bit stream. This is then
fed to the SPI control registers using Digilent Analog Discovery II. The
entire data capture loop is automated through the power automation tool [50].

To assess the worst-case bending and verify the effectiveness of the
calibration technique, a $4\times 4$ array is deformed to a curvature with a
radius of 38cm using a custom-designed antenna holder as shown in Fig. 5e.
Within this array, three tiles are disabled, leaving only a $2\times 2$ tile
active under deformation, resulting in a maximum beam pointing error of
$7^{\circ}$. One antenna is kept as reference (REF) while the calibration loop
is connected to the other three antennas to optimize the corresponding PS
$\phi_{1}$, $\phi_{2}$, $\phi_{3}$. Fig. 5c shows phase control codes are
auto-adjusting to achieve the optimal beamformed output under this
deformation. Each loop is settled to minimize the beam pointing error
$<1.5^{\circ}$. This error can be further reduced by increasing the PS
resolution. The 2dB gain reduction after beam-point error correction is due to
the antenna holder and the change in Line-of-Sight (LOS). The phase control
codes are properly initialized so that the calibration loop doesn’t get stuck
at side-lobes (local maxima). Figure 5d shows the radiation pattern without
deformation and with deformation after self-correction. The FoV enhancement
after deformation is evident from the radiation pattern.

The $2\times 2$ conformal tile azimuth and elavation patterns under no
deformation are shown in Fig. 6c and Fig. 6d. The measured BFIC S11 and
conversion gain of a single channel are shown in Fig. 6e. The return loss is
$<-10$ dB in the band of interest, and the 3-bit tunability in the BFIC
enables gain calibration for each element. As shown in Fig. 5e the proposed
array is lightweight and easily deployable with an areal mass 0.464
$\text{g/cm}^{2}$ and thickness of ($\approx$)8 mm.

Figure 6: a. The $2\times 2$ conformal array tile back side, the receiver IC
and its connections, are printed using Cu ink on an AP layer, chip micrograph
of beamforming receiver, along with the calibration loop. b. Circular patch
antenna printed on Ninjaflex using silver ink. c. Azimuth and d. Elevation
patterns of the $2\times 2$ conformal phased array. e. S11 and conversion gain
of the single receiver channel.

##  4 DATA AVAILABILITY

The datasets generated and additional results are available from the
corresponding author on reasonable request

##  5 ACKNOWLEDGEMENTS

This material is based on research sponsored, in part, by Air Force Research
Laboratory under agreement number FA8650-20-2-5506, as conducted through the
flexible hybrid electronics manufacturing innovation institute, NextFlex,
Murdock Foundation, Washington Research Foundation, and WSU Office of
Commercialization. The U.S. Government is authorized to reproduce and
distribute reprints for Governmental purposes notwithstanding any copyright
notation thereon.

The views and conclusions contained herein are those of the authors and should
not be interpreted as necessarily representing the official policies or
endorsements, either expressed or implied, of Air Force Research Laboratory or
the U.S. Government.

Authors acknowledge Dr. Robert Dean at Auburn University for his help with the
antenna hold and Sonja Gerard at OEIGraphics for help with Figures 1 and 2.

##  6 AUTHOR CONTRIBUTIONS

This project was conceived by S.G., S.P., J.N., and J.W. The antenna was
designed and additively printed by T.D. and K.K with inputs from P.L.. The Cu
ink was developed and verified by A. I. and S.R. The receiver front-end was
designed by S.P., A.M., Q.X., E.G., and A.R. with inputs from S.G. and S.S.
The discrete-time combiner was designed by E.G., S.P., and A.R. with inputs
from S.G.. The phase-interpolator and time-interleaved clock generator was
designed by S.P., and Q.X. with inputs from S.S. and S.G.. Calibration loop,
design, and validation was done by S.B. and S.P. with inputs from S.G.
Measurements of the self-calibrated array were performed by S.P. with inputs
from S.G.. S.P., A.R., and S.G. are equal contributors for preparing the
manuscript.

##  7 COMPETING INTERESTS

The authors declare no competing non-financial interests.

##  8 SUPPLEMENTARY SHEETS

###  8.1 Environmentally Friendly Alternative for Conventional Subtractive
Processes

While lightweight conformal arrays are convenient in many applications, large-
scale production of these arrays raises major concerns over chemical waste and
water pollution during fabrication. Various steps in the traditional
subtractive process result in substantial chemical waste generation, including
spent etchants, contaminated rinse water, filter sludges, and discarded
chemicals. Spent etchant, a strong acid or base, is used to remove unwanted
copper from PCBs. Plating bath wastewater is generated from the electroplating
process used to deposit metal layers onto PCBs. Rinse water, used to rinse the
PCBs after each fabrication step, contains a variety of acids and bases. Most
of these fabrication plants are situated near water sources and require
substantial amounts of water for each step. This chemical waste can
contaminate soil and water, posing serious environmental challenges.

Amid these concerns, additive printing, also known as 3D printing, is an
appropriate solution for printed circuit fabrication, offering numerous
advantages over conventional subtractive manufacturing methods. PCB design
using additive printing does not require any chemical processing, as the
entire circuit board can be printed using an inkjet printer. Additive printing
requires only the material needed to create the PCB, significantly reducing
waste and eliminating various chemical processes. Furthermore, additive
printing allows for the creation of complex, thermally conductive structures
within the PCB itself, improving the overall thermal performance of the array.
While the initial investment in additive printing can be significant, the
long-term cost benefits are substantial. The reduced material waste, fewer
processing steps, and shorter development cycles translate to lower production
costs over time.

###  8.2 Single tile $2\times 2$ Receiver Array Performance

Figure 7: Measured beamforming RX performance including a. Beamforming gain
over wideband modulated input with 1-element and 4-element b. EVM for 16-QAM
modulation c. out-Of-band IIP3 d. in-band IIP3 e.1-dB compression point.

Figure 7a shows the wideband beamforming capabilities of the proposed receiver
array. This measurement uses the same test bench shown in Fig. 5b. The
wideband signal is generated in MATLAB and transmitted using ZCU216 DAC from
the Pasternack PE9887 horn antenna at $0^{\circ}$ angle. An $\approx$12dB
beamforming gain is observed when all four elements are enabled. The gain
profile has a reduced gain at lower frequencies (for both 1-element and
4-elements) due to the high-pass response of the ZCU216 ADC baluns connected
at the BFIC output. The measured constellation plot in Fig. 7b shows that the
receiver supports 16-QAM modulation with an error vector magnitude (EVM) of
7.2% while supporting 160 Mbps.

Figures 7c-eshow the linearity performance of a single-channel BFIC. The
measured 1-dB compression point is -16 dB, which is in reasonable agreement
with the simulation results. The in-band IIP3 shown in Fig. 7d is measured
using a two-tone test where the first tone is placed at a frequency offset
$\Delta f$ from LO and the second tone at $2\Delta f-5$MHz offset from LO such
that the IM3 product will fall at 5 MHz. Measured in-band IIP3 is -6 dBm for a
gain setting of 7 dB. The out-of-band IIP3 shown in Fig. 7d was also measured
using a two-tone test with the first tone at an offset of 250 MHz from the LO
and second tone at 370 MHz offset from LO such that the IM3 distortion
component will fall at 30 MHz. The measurement shows an increase in out-of-
band-IIP3 from in-band-IIP3 as it reaches +4 dBm for a gain setting of 7dB.

The power breakdown for the proposed BFIC is given below, the four RF front-
end units consuming highest power. The LNTA, passive mixer, TIA, and buffer
together with few test circuits consume 41mW in the total power. Clock
drivers, LO Generation, LO PS, sampler clock generation together with the PI
and the time-interleaved sample-and-hold clocking consumes 27 mW. The charge-
domain summer which includes a 2-stage internally compensated OTA consumes 6
mW including both the quadrature paths. The SPI registers only consume 26
$\mu$W. The 3 variable calibration loop consumes 4.5 mW.

Radiation pattern measurement uses the same test setup with the receiver array
and is rotated from $-90^{\circ}$ to$+90^{\circ}$ using the DAMS D6025 (with
$5^{\circ}$ resolution) to capture the received power level at each angle. The
receiver array is flipped $90^{\circ}$ to capture the radiation pattern in the
elevation plane using the same test setup. Figure 6c-d shows the azimuth and
the elevation radiation patterns. The test setup limited measurement of the
radiation pattern and efficacy deformation induced beam pointing error
correction in an arbitrary plane ($El\neq 0^{\circ}$ and $Az\neq 0^{\circ}$).

##  Appendix A Deformation over a curvature with radius R

Figure 8: Deformation of a uniform linear array over a curvature with radius
R.

This section estimates the additional path length required for a uniform
linear array (ULA) when deformed over a curvature with radius R, in terms of
R. We assume a circle with radius R for the analysis. The transmitter is at an
angle $\theta$. Fig. 8a shows a 4-element uniform linear array (ULA) with
inter-element distance, d. The ULA deformed over a curvature with radius R is
shown in Fig. 8b. Consider the isosceles triangle in Fig. 8c, the additional
path length required for the signal to reach second element is $\Delta d$. We
can express the chord length C as:

$C=2Rsin(\frac{\phi}{2})$ (1)

where $\phi$ is the angle between two consecutive elements. From Fig. 8(c) the
path-length can be expressed in terms of chord length C as:

$\Delta d=Ccos(\Omega)$ (2)

Consider the following relations $\Omega+\Psi+\theta=180$ and
$\Omega=90-\theta+\phi/2$ and substituting in (2) yields:

$\begin{split}\Delta d&=2Rsin(\frac{\phi}{2})cos(\Omega)\\\
&=2Rsin(\frac{\phi}{2})cos(90-\theta+\frac{\phi}{2})=2Rsin(\frac{\phi}{2})sin(\theta-\frac{\phi}{2})\\\
&=Rcos(\theta-\phi)-Rcos(\theta)\end{split}$ (3)

For N-element conformal phased array,

$\Delta d=Rcos(\theta-\phi_{n})-cos(\theta)$ (4)

where $\phi_{n}$ is the angle between successive element.

The array factor of the conformal phased array can be expressed as:

$AF=e^{-j\cdot 2\pi f\cdot R\cdot cos(\theta)}\sum_{i=0}^{N-1}e^{j\cdot 2\pi
f\cdot R\cdot cos(\theta-\phi_{n})}$ (5)

##  Appendix B Gradient Estimation using self-calibration loop

The adaptive update rule for the phase shifter is given below:

$\phi[n]=a_{\phi}sin[\omega_{\mathrm{p}}n]+a_{\phi}A_{v,\phi}\sum_{n=1}^{N}(BF_{\mathrm{out}}[n-1]\cdot
sin[\omega_{p}n+\Psi])$ (6)

For simplicity, we consider a ULA. The beamformed output of the ULA after
baseband beamforming can be expressed as:

$BF_{\text{out}}=\sum_{i=0}^{N-1}A_{\text{n}}e^{j2\pi(f_{\mathrm{RF}}-f_{\mathrm{LO}})t}\cdot
e^{j\phi_{\text{ant,n}}}\cdot e^{j\phi_{\text{n}}}$ (7)

To estimate gradient of $BF_{\text{out}}$ using conventional gradient descent
method, we can take the derivative of $BF_{\text{out}}$. This requires the
derivative of each channel output, thus necessitating the digitization of each
channel using highly linear, power-hungry ADCs.

In the proposed loop, the gradient is estimated using array-level information.
The gradient estimation is illustrated below. For simplicity, we are
considering a 2-element array with a single calibration loop. The phase-
shifter code-word can be expressed as:

$P_{\phi}=\hat{P_{\phi}}+a_{\phi}sin[\omega n]$ (8)

where $\hat{P_{\phi}}$ is the estimated phase code-word after each iteration.
Expressing BFout as a function of this phase-shifter code-word as follows:

$BF_{out}=f(P_{\phi})=f(\hat{P_{\phi}}+a_{\phi}sin[\omega n])$ (9)

The gradient can be calculated by considering the Taylor series expansion
$f_{a}(x)=f(a)+\partial_{x}f(a)(x-a)$, where $\partial$ is the partial-
differential operated on the estimated phase-shifter code-word:

$\begin{split}f_{\hat{P_{\phi}}}(P_{\phi})&=f(\hat{P_{\phi}})+\partial_{P_{\phi}}f(\hat{P_{\phi}})\cdot(\hat{P_{\phi}}+a_{\phi}sin[\omega
n]-\hat{P_{\phi}})\\\
&=f(\hat{P_{\phi}})+\partial_{P_{\phi}}f(\hat{P_{\phi}})\cdot(a_{\phi}sin[\omega
n])\end{split}$ (10)

The first term in (10) is a DC term and the second term is a slow varying
sinusoidal. It is straight forward to have a HPF to extract the slow varying
term which includes the gradient information.

$HPF_{out}=\partial_{P_{\phi}}f(\hat{P_{\phi}})(A_{HPF}\cdot a_{\phi}\cdot
sin[\omega n+\Omega_{HPF}])$ (11)

where $A_{\text{HPF}}$ and $\Omega_{\text{HPF}}$ are the magnitude and phase
changes due to HPF. The filter cut-off frequency is chosen such that this term
is minimally distorted. The HPF output is now multiplied by the LUT
perturbation as follows:

$\begin{split}y_{mul}&=a_{\phi}sin[\omega
n]\cdot\partial_{P_{\phi}}f(\hat{P_{\phi}})\cdot(A_{HPF}\cdot
a_{\phi}sin[\omega n+\Omega_{HPF}])\\\ &=a_{\phi}^{2}A_{HPF}\cdot sin[\omega
n]\cdot(sin[\omega
n+\Omega_{HPF}])\cdot\partial_{P_{\phi}}f(\hat{P_{\phi}})\\\
&=X(n)\partial_{P_{\phi}}f(\hat{P_{\phi}})\end{split}$ (12)

where $X(n)$ is the time-varying factor. The multiplier output contains
gradient information of $f(\hat{P_{\phi}})$ at $\phi$. The loop estimates
gradient from array level information without element level read out. The
integrator followed by the multiplier can find the optimum $\phi$ which leads
to maximum $f(\hat{P_{\phi}})$ .

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