# Benchmarking the algorithmic performance of near-term neutral atom
processors

K. McInroy<EMAIL_ADDRESS>Department of Physics and
SUPA,University of Strathclyde, Glasgow G4 0NG, United Kingdom  N. Pearson
Department of Physics and SUPA,University of Strathclyde, Glasgow G4 0NG,
United Kingdom  J.D. Pritchard  Department of Physics and SUPA,University of
Strathclyde, Glasgow G4 0NG, United Kingdom

###### Abstract

Neutral atom quantum processors provide a viable route to scalable quantum
computing, with recent demonstrations of high-fidelity and parallel gate
operations and initial implementation of quantum algorithms using both
physical and logical qubit encodings. In this work we present a
characterization of the algorithmic performance of near term Rydberg atom
quantum computers through device simulation to enable comparison against
competing architectures. We consider three different quantum algorithm related
tests, exploiting the ability to dynamically update qubit connectivity and
multi-qubit gates. We calculate a quantum volume of
$\mathbf{\mathit{V_{Q}}=2^{9}}$ for 9 qubit devices with realistic parameters,
which is the maximum achievable value for this device size and establishes a
lower bound for larger systems. We also simulate highly efficient
implementations of both the Bernstein-Vazirani algorithm with >0.95 success
probability for 9 data qubits and 1 ancilla qubit without loss correction, and
Grover’s search algorithm with a loss-corrected success probability of 0.97
for an implementation of the algorithm using 6 data qubits and 3 ancilla
qubits using native multi-qubit $\mathbf{CCZ}$ gates. Our results indicate
Rydberg atom processors are a highly competitive near-term platform which,
bolstered by the potential for further scalability, can pave the way toward
useful quantum computation.

##  1 Introduction

Quantum computing has the potential to offer a wide range of applications
which, in the limit of a universal fault-tolerant architecture, can provide
speed-up of classically hard algorithms such as factorization [1],
optimization [2, 3] and machine learning [4], and enable efficient calculation
of properties of quantum systems relevant for problems in quantum chemistry
and material science [5, 6, 7]. These promising applications have driven
significant development in both industry and academia towards scalable
architectures for quantum computing based on superconducting circuits [8],
trapped ions [9, 10, 11, 12] and photonic circuits [13]. However, current
systems typically operate in the noisy intermediate-scale quantum (NISQ)
regime [14] limiting their near-term utility.

To quantify the performance of  digital quantum hardware and facilitate cross-
platform comparison, a range of gate and circuit level benchmarks have been
developed. Techniques for evaluating gate-level performance include randomized
benchmarking [15, 16], quantum process tomography [17, 18] and gate set
tomography [19], which provide valuable tools for characterising the
performance of few-qubit operations, but  cannot be used deterministically to
quantify the ability of a given device to perform a useful quantum algorithm
[20]. Instead, algorithmic [21, 22, 23] and volumetric benchmarking [24, 25]
metrics have been developed to enable characterization of the device in
regimes relevant for implementing a quantum algorithm. Early work focused on
side-by-side comparison for the performance of different devices, such as
comparing 5 qubit trapped ion and superconducting circuit devices [26],
however more sophisticated single-value metrics such as quantum volume [24] or
application benchmarking [27, 28] provide a  metric for the potential utility
of a given quantum processor. Already, quantum volume has been used to
characterize both superconducting circuits and trapped ion devices, with peak
values of $V_{Q}=2^{9}$ [29] and $V_{Q}=2^{16}$ [30] respectively.

Recently, neutral atom quantum processors based on arrays of atoms trapped in
individual optical tweezers, as illustrated in Fig. 1, have emerged as a
promising technology for developing scalable quantum computing [31, 32, 33].
This architecture supports arrays of over $1000$ identical and high-quality
qubits [34], capable of implementing high fidelity single-qubit [35, 36], two-
qubit [37] and multi-qubit gate operations [37, 38, 39] in parallel  by
exploiting the strong long-range interactions between highly excited Rydberg
states to provide controllable couplings between qubits [40], with state-of-
the-art two-qubit gate fidelities reaching 99.5% [38, 41]. Small-scale
digital quantum processors  based on Rydberg atoms have been used to
demonstrate quantum algorithms on up to 5 qubits [42] and generate topological
encodings by exploiting coherent atomic transport to engineer non-local qubit
connectivity [43]. The ability to dynamically rearrange qubits provides a new
modality for efficiently implementing quantum algorithms beyond the typical
planar architectures [44], and provides a route to future fault-tolerant
operation using quantum error correction [45, 46, 47]. Recent work
demonstrating transverse gates on 48 logically encoded qubits highlights the
viability and capability of the neutral atom approach [48]. This architecture
also permits analogue quantum computation for simulation of quantum systems
[49, 50, 51], implementation of graph-based optimization problems [52, 53, 54,
55, 56], and integer factorization [57].

Figure 1: Schematic of different modalities of a Rydberg atom array quantum
computer. Dashed black circles identify the blockade radius $R_{\mathrm{B}}$
of the the central qubit. (a) A static architecture with nearest-neighbour
connectivity mediated by the Rydberg blockade mechanism, with gates
implemented using local addressing lasers. The transparent green and orange
ovals represent $CZ$ and SWAP gates respectively. (b) A reconfigurable
architecture which utilizes mobile tweezers to coherently move qubits, shown
as orange arrows, between a storage zone and a gate zone enabling parallel
$CZ$ or $CCZ$ gates. We assume the capability of fast single-site addressing
for single qubit gates in both modes.

In this paper we numerically characterize the potential performance of a
neutral atom quantum computer, considering both volumetric and algorithmic
benchmarks to facilitate comparison of current state-of-the-art hardware
against competing platforms and evaluate the potential for utility in near-
term applications. Specifically, we simulate performance using a virtual
quantum device [58],  wrapping the Quantum Exact Simulation Toolkit (QuEST)
[59], and using device parameters motivated by recent experimental
demonstrations. We focus on virtual devices of 9 or 10 qubits due to hardware
limitations on the simulation. We consider three benchmarks; firstly, quantum
volume, which evaluates the largest device size for which gate depth matches
qubit count when preparing random output states using one-qubit and two-qubit
gates on the hardware. We compare the performance of devices using either
fixed or reconfigurable qubit modalities, and consider two different error
models for implementing controlled-Z gates [37, 39], to investigate system
performance. Our simulations yield an upper bound  on the quantum volume of
$V_{Q}=2^{9}$ for a 9 qubit Rydberg atom device, which is the maximum
attainable value for a device of this size and hence a lower bound on what we
expect to see with an implementation of this procedure on a realised system
with many more available qubits.

One limitation of the quantum volume metric is  that it fails to exploit the
hardware-specific benefits for implementing more general algorithms, such as
the ability to perform native multi-qubit gates. To address this we consider
the performance of the the Bernstein-Vazirani algorithm [60], showing a high
success rate for a 9+1 qubit algorithm implemented via coherent qubit
rearrangement. Additionally, we demonstrate the improved performance of using
native multi-qubit gates in implementing Grover’s search algorithm [61],
showing a successful implementation of this algorithm on a 64-item search
space using a 9 qubit virtual device. These results highlight the potential
for near-term Rydberg atom processors to be competitive against alternative
technologies, with a key advantage in the ease of scaling to high qubit counts
for future implementation of quantum error correction.

The manuscript is arranged as follows. In Section 2 we give an overview of the
virtual neutral atom quantum device used for simulation including realistic
parameters for error rates and outline the different native gate schemes and
their associated error channels. In Section 3 we present the results of the
different volumetric and algorithmic benchmarks, including discussion of
assumptions around qubit connectivity. Finally, in Section 4 we provide a
summary of our findings and a future outlook.

##  2 Virtual neutral atom processor

###  2.1 Device Architecture

We consider a neutral atom processor based on reconfigurable arrays of
individual atoms, with qubit levels encoded onto the hyperfine ground states
and gates implemented by coupling atoms to highly-excited Rydberg states [40,
32]. Rydberg atoms experience strong, long-range dipole-dipole interactions
which leads to a blockade effect preventing more than a single Rydberg
excitation for atoms within a radius $R_{\mathrm{b}}\lesssim
5-10\leavevmode\nobreak\ \mu$m. This blockade effect can be exploited to
enable native implementation of a controlled-phase ($CZ$) gate for two qubits
[62], and $CCZ$ for three qubits [37].

We model two different modalities for operating the neutral atom device - the
first shown in Fig. 1(a) assumes a static spatial configuration and the
ability to apply sequential and addressable gate operations between any pair
of neighbouring atoms as recently demonstrated by Graham _et al._ [42] for
implementing small-scale algorithms on up to 5 qubits. For this static
configuration, to connect non-neighbouring qubits we implement SWAP gates
based on three $CZ$ operations, and minimize the number of SWAP gates required
by leaving the qubits in the new configuration until an additional non-
connected 2-qubit gate is required. The second approach is based on using
reconfigurable atom arrays with dynamic qubit connectivity inspired by
Bluvstein _et al._ [43] to allow parallel two and multi-qubit gate operations
to be implemented between different qubits at each stage of the circuits by
moving qubits between a storage and gate zone using mobile tweezer traps, as
shown in Fig. 1(b).

###  2.2 Two and Three Qubit Gate Protocols

Throughout this work we consider two specific implementations of the $CZ$ gate
to analyse the relative impact of different gate errors on algorithmic
performance: a procedure based on two-photon adiabatic rapid passage (ARP)
[39] ($CZ_{\mathrm{ARP}}$) with a theoretical gate fidelity [39]
$\mathcal{F}$=99.81%, and the Levine-Pichler (LP) procedure based on global
excitation of qubits [37] ($CZ_{\mathrm{LP}}$) with a theoretical gate
fidelity $\mathcal{F}$=99.87%. The operator representations of each gate are
calculated by numerical simulation of the atomic energy levels, taking into
account loss from spontaneous emission and the finite blockade radius using
the approach described in Ref. [39] resulting in the following non-unitary
two-qubit gate operators where loss from the computational basis due to
spontaneous decay is represented by non-unity amplitudes on the diagonal
terms, and phase errors due to imperfect blockade result in deviations from
the values of $0$ or $\pi$ expected for an ideal gate.

$\displaystyle
U_{CZ_{\mathrm{ARP}}}=\outerproduct{00}{00}+0.9990e^{0.9906i\pi}(\outerproduct{01}{01}$
$\displaystyle\quad+\outerproduct{10}{10})+0.9986e^{1.000i\pi}\outerproduct{11}{11},$
(1) $\displaystyle
U_{CZ_{\mathrm{LP}}}=\outerproduct{00}{00}+0.999320e^{-0.013i\pi}(\outerproduct{01}{01}$
$\displaystyle\quad+\outerproduct{10}{10})+0.999458e^{0.985i\pi}\outerproduct{11}{11}.$
(2)

Whilst both gate protocols achieve similar theoretical fidelities, the ARP
gate has a larger amplitude error due to increased probability for spontaneous
decay and leakage during the gate, whilst the Levine-Pichler gate using
shorter gate pulses resulting in suppressed loss but a larger error in the
accumulated phase on the $\ket{11}$ term due to increased blockade leakage
error.

To capture a fuller picture of the capability of neutral atom devices with
native multi qubit gates we also consider a 3-qubit controlled-controlled-Z
($CCZ_{\mathrm{ARP}}$) phase gate realized by the two-photon adiabatic rapid
passage technique with a theoretical fidelity $\mathcal{F}=99.54\%$ [39]. The
operator representation of this gate is by

$\displaystyle
U_{CCZ_{\mathrm{ARP}}}=\outerproduct{000}{000}+0.9981e^{0.9845i\pi}(\outerproduct{001}{001}$
$\displaystyle\quad+\outerproduct{010}{010}+\outerproduct{100}{100})+0.9973e^{0.9934i\pi}$
$\displaystyle\quad(\outerproduct{011}{011}+\outerproduct{101}{101}+\outerproduct{110}{110})$
$\displaystyle\quad+0.9963e^{0.9911i\pi}\outerproduct{111}{111}.$ (3)

###  2.3 Virtual Quantum Device

Our neutral atom processor is modelled using the virtual quantum device
library [58] for (QuEST) [59], which provides built in methods for modelling
realistic error sources using Kraus operators, and provides a framework for
encoding and rearranging qubit geometry including evaluating which gates are
allowed based on qubit proximity. Single qubit errors are encoded by defining
relaxation ($T_{1}=4$ s) and depolarization ($T_{2}=1.49$ s) times based on
[43], and we include a state preparation error of
$\epsilon_{\mathrm{Init}}=0.003$ to account for finite optical pumping. Table
1 contains a complete list of parameters used for modelling the virtual
quantum device.

For the quantum volume and Bernstein-Vazirani algorithms we first generate the
circuits using QisKit, and then transpile for the virtual device by converting
to the native $CZ$ and single qubit gate sets. The resulting circuits are then
imported into the QuEST library for modelling device performance.

To model the dynamically reconfigurable qubit approach of Fig. 1(b), we
identify suitable routing approaches to provide efficient implementations of
the required circuits, and model the movement as taking a fixed duration,
$\tau$, using the parameters from Ref. [43] to give typical movement times
required. For the quantum volume calculation and Grover’s search algorithm,
where multiple atoms may need to be moved, we use
$\tau=\tau_{\mathrm{move}^{\mathrm{A}}}$. For the Bernstein-Vazirani algorithm
implementation, where only a single atom must be moved in each
reconfiguration, we use $\tau=\tau_{\mathrm{move}^{\mathrm{B}}}$. This ensures
realistic estimation of error expected in the regime of implementing qubit
reconfiguration, without being dependent on the proposed routes being optimal.

For each algorithm we model the evolution  of the full system and extract the
final density matrix. Because we model loss as a non-unitary gate process, the
resulting density matrix is not normalized, providing an estimate of the total
probability of loss from the computational basis during the algorithm. We then
perform re-normalization of the output to extract a loss-corrected
expectation. Practically, this loss-correction process can be achieved in a
real experiment by implementing non-destructive readout, as demonstrated in
Ref. [63, 36], to determine both the qubit state and to check if an atom was
lost from the tweezer, allowing post-selecting of data only from cases where
all qubits are retained and remain in the computational basis.

Figure 2: A schematic for implementing quantum volume calculation on a Rydberg
atom processor. (a) We implement circuits of this form, consisting of layers
of Haar uniform $SU(4)$ gates applied to pairs of qubits where between each
layer we randomly assign qubit pairs. (b) The connectivity procedure for the
static mode is illustrated. Qubits are initially numbered such that the first
layer of $SU(4)$ gates is performed between atom pairs. The qubits are then
randomly reordered by applying SWAP gates along the rows, before applying the
subsequent layer of $SU(4)$ gates. This is repeated until the full circuit
depth is reached. (c) The reconfigurable connectivity procedure involves
physically reordering the qubit pairs within the gate zone to allow for
parallel two-qubit gate implementation. The $SU(4)$ gates are implemented in
parallel, meaning only one set of movements is necessary between each circuit
layer. (d) An example  of an $SU(4)$ gate decomposition into a native gate set
consisting of 21 arbitrary rotations around the $x$ and $y$ axes of the Bloch
sphere and 3 CZ gates.

##  3 Benchmarking Algorithmic Performance

###  3.1 Quantum Volume

We first look at quantum volume as a measure of the algorithmic performance of
our simulated device [24]. This standardized form of benchmarking is a measure
of the largest square circuit of arbitrary two-qubit $SU(4)$ gates that can be
reliably implemented on a device, thus requiring that the number of qubits,
$N_{Q}$, is equal to the circuit depth, $d$. The procedure for calculating
this value is well documented in [64] and involves  simulating a circuit of
the form shown in Fig. 2(a), both on our virtual quantum device and for an
ideal, error-free system. With these circuits we evaluate the heavy output
problem. This involves calculating the probability of the error-prone virtual
device returning a “heavy output”, defined  as the set of output bit strings
following an ideal (without any error) implementation of the circuit, which
have measurement probabilities above the median probability of generating any
given bit string from the full output distribution.

We perform this procedure on the virtual device using both $CZ_{\mathrm{ARP}}$
and $CZ_{\mathrm{LP}}$ protocols as defined in Eqs. 2.2 and 2 for the two
different modalities, static moves with SWAP operations and dynamically
reconfigurable tweezers using coherent movement between gates. The quantum
volume circuit consists of layers of random $SU(4)$ unitaries, interleaved
with operations which randomly rearrange the qubit pairs,  either by applying
SWAP operations along the rows to re-order odd and even qubit pairs  in the
static configuration device, or by simply moving qubits into the relevant
positions in the reconfigurable case. This is illustrated in Fig. 2(b) and
(c). For both approaches, the random $SU(4)$-gates are decomposed into three
$CZ$ and up to 15 single-qubit gate rotations, as shown in Fig. 2(d).

For each circuit depth, we calculate the mean of the probability of obtaining
a heavy output $\bar{h}_{p}$ across 200 randomly generated circuits. Following
the method of Ref. [24], the criteria of success for this metric is that the
$\bar{h}_{p}>\frac{2}{3}$ by a one-sided confidence interval of twice the
standard error of the mean. From these results, we can then calculate the
quantum volume of the device

$\log_{2}V_{Q}=\operatorname*{argmax}_{N_{Q}}min(N_{Q},d).$ (4)

Figure 3:  Benchmarking Quantum Volume for square circuits up to $9\times 9$
for both $CZ$ gates with both connectivity schemes for between 2$\mathrm{x}2$
and $9\mathrm{x}9$ square circuits. (a) The unprocessed average $\bar{h}_{p}$
for each layer. (b) The corrected $\bar{h}_{p}$ when post-selection for
survival is performed. (c) The mean loss probability $P_{\mathrm{Loss}}$ at
each size of circuit.

The resulting heavy output $\bar{h}_{p}$ and loss probabilities
$P_{\mathrm{Loss}}$ for each implementation are shown in Fig. 3. These results
show that, for both gate protocols, the SWAP based static modality performs
worse due to the larger number of required $CZ$ gates. Without post-selection
the setup with the lowest quantum volume is for the static modality with the
ARP gate, which has more loss than the LP gate, and results in a quantum
volume of $V_{Q}=2^{7}$. When using the reconfigurable modality, both gate
types result in a quantum volume of $V_{Q}=2^{9}$, the maximum attainable for
the device size we consider, and the circuit using LP gates has the best
performance, with $P_{\mathrm{Loss}}<0.15$ for a $9\times 9$ square circuit.

In the regime where data is post-selected for atom loss using a non-
destructive imaging sequence as described above, the renormalized heavy output
probabilities in Fig. 3(b) show that actually the ARP-based gates with
coherent movements provide the best corrected performance due to the lower
phase errors, and that all four combinations yield a corrected $V_{Q}$ at
$N_{Q}=9$ close to the asymptotic limit of the heavy output probability of
0.851.

These predicted results are already comparable to recently reported numbers
for superconducting qubit systems with $V_{Q}=2^{9}$ on the IBM Prague
processor [29], whilst state-of-the-art across all hardware platforms comes
from trapped ion systems offering $V_{Q}=2^{16}$ [30], demonstrating that
neutral atom processors offer a highly competitive approach to scalable
computing. Note our simulations provide a lower bound on the attainable
quantum volume of Rydberg atom devices of $V_{Q}\geq 2^{9}$, even in the
absence of post-selection, however the exact threshold requires calculations
to be performed at larger values of $N_{Q}$ which is beyond the scope of this
current study.

###  3.2 The Bernstein-Vazirani Algorithm

Figure 4: A schematic for implementing the Bernstein-Vazirani algorithm on a
Rydberg atom quantum computer in the reconfigurable mode. (a) The standard
form of the circuit on $6+1$ qubits is shown for an oracle, highlighted
between the pink lines, encoding the bit string $`111111`$ and consisting of
$CZ$ gates conditioned on the data qubits targeting an ancilla qubit. (b) The
movement procedure is sketched, where the ancilla qubit moves between zones
where it can connect with isolated data qubits. Each $CZ$ gate requires one
movement of the ancilla qubit. Figure 5: The results for the Bernstein-
Vazirani algorithm simulations are given for both $CZ$ gate implementations
run from $1+1$ to $9+1$ qubits. Unfilled data points denote cases where the
circuit sample size was limited to sample only 256 rather than all possible
circuits. (a) The raw success probability $P_{\mathrm{Seed}}$ and (b) the
post-selected success probability. (c) The loss probability
$P_{\mathrm{Loss}}$.

As a means of testing the effect of the dynamic connectivity procedure on the
performance of a specific algorithm we implement the Bernstein-Vazirani (BV)
algorithm [60]. This algorithm uses an oracle to identify an $N$-bit binary
string using $N$ measured (data) qubits with one unmeasured (ancilla) qubit ,
and requiring a single measurement, thus representing a polynomial speedup
compared to the $N$ operations necessary to perform this task using a
classical algorithm [65].

Multiple realisations of this algorithm are available [66] but the specific
implementation that we consider makes use of an oracle which exploits
entanglement between the data and ancilla qubits through CNOT gates applied to
the ancilla qubit conditioned on each data qubit where the index corresponds
to a 1 in the bit string. The oracle enacts a function which takes the dot
product of the system state $x$ and an encoded binary secret seed $s$, of the
form:

$|x\rangle\rightarrow(-1)^{(x\cdot s)}|x\rangle.$ (5)

The measurement output of the data qubits in the computational basis should
then match the $N$-bit binary seed string $s$, meaning the algorithm has
correctly identified the string.

This formulation of the BV algorithm lends itself well to the use of qubit
movement due to the simple star-shaped connectivity requirement, where the
only necessary connections are between each data qubit and the ancilla qubit.

We analyse at a 9+1 qubit device to assess performance of this problem in the
regime of reconfigurable connectivity, making use of qubit zoning to minimize
the number of moves necessary, as demonstrated in Fig. 4(b).

As the number of possible bit strings increases exponentially with qubit
number, we cap the number of bit strings considered at 256 to facilitate
simulation. This provides an approximation of the results at higher circuit
sizes. In order to mitigate any bias toward these circuit sizes we consider a
random sample of 254 bit strings, and always consider the smallest seed string
$00\cdots 0$ and the largest seed string $11\cdots 1$.

The results of the simulations for between 1+1 and 9+1 qubit implementations
of the algorithm are given in Fig. 5 and demonstrate that this algorithm can
be efficiently implemented on Rydberg atom devices with a high success rate
for 9+1 qubits. In this case the LP protocol gives raw probabilities over 0.95
and relatively low loss probabilities ($<0.05$) due to the significant
reduction in two-qubit gate count compared to the quantum volume metric above.
With renormalization $>0.999$ success probability can be achieved, where here
the ARP gates still perform worse than LP highlighting the sensitivity of
different algorithms to different dominant gate errors and showing that the BV
circuits are more tolerant to small phase-errors in the two-qubit gates. These
results highlight the capability for scaling to larger qubit numbers for
implementing the BV algorithm. These results also demonstrate a marked
improvement compared to previous work experimentally benchmarking this
algorithm on small-scale superconducting and trapped-ion devices by Linke _et
al._ [26], reflecting the significant increase in coherence times and gate
fidelities in the time since this work was completed.

###  3.3 Grover’s Search Algorithm

Figure 6: Grover’s search algorithm. (a) The form of the circuit we consider
to implement Grover’s search algorithm. This consists of n iterations, each
consisting of an application of the oracle and diffusion operator. (b) An
example of the concatenated $CCZ$ decomposition of the $C_{5}Z$ gate required
for the construction of the oracle and diffusion operators, where these are
book-ended by the necessary single qubit rotations (SQR). This procedure uses
3 ancilla qubits to realise the $C_{5}Z$ gate. (c) Proposed movement procedure
for implementing Grover’s algorithm using $CCZ$ gates.

Grover’s search algorithm is a primary example of a useful application of
quantum computing. This algorithm is a fast way to perform an unstructured
search, offering a $\sqrt{N_{s}}$ speedup for an $N_{s}$ item search space
compared to classical algorithms [67], and makes use of entanglement between
all qubits to do so. This requirement of multi-qubit entanglement makes this
algorithm a natural choice to test the effect of native multi-qubit gates on
the algorithmic performance on Rydberg atom systems.

We implement Grover’s algorithm through repeated applications of an oracle,
which takes the form of an identifying phase on the target state, and
diffusion operator, which takes the form of a phase flip on each basis state
except $\ket{0\cdots 0}$. These two operators combined constitute a single
iteration step, which result in a rotation of the state of the data qubit
register Hilbert space toward the oracle-encoded target state [67]. Each
successive iteration brings the system state closer to the target state hence
amplifying the output state measurement probability.

We consider a circuit construction making use of an identifying phase as the
oracle [67], as shown in Fig. 6(a). This has an intuitive implementation on
Rydberg atom devices [68], as the native $CCZ$ gates allow for an
implementation of both this oracle and the diffusion operator through a
procedure based on concatenated Toffoli gates with ancilla qubits [69] which
we translate into the native $CCZ$ gate, as illustrated in Fig. 6(b) to
provide a 6-qubit search algorithm on a 9-qubit device.

Figure 7: The results for the Grover’s algorithm simulations are presented for
all three implementation schemes in a reconfigurable processor. (a) The raw
(unfilled) and post-selected (filled) success probabilities after each
iteration step. (b) The probabilities for the next-most-probable output. (c)
The loss probability $P_{\mathrm{Loss}}$.

For this 6+3 qubit circuit, we define a movement protocol illustrated in Fig
6(c) to perform successive $CCZ$ gate operations between groups of qubits,
where in each stage a trio of qubits are moved to provide the necessary
connectivity to implement the next required $CCZ$ gate. Additionally, we
compare against two-qubit gate decomposition’s using both ARP and LP gate
protocols. The circuits we consider are manually transpiled to attempt to
minimise the number of gates used in the implementation, however an efficient
automated transpilation routine tailored to the system specifications would
likely reduce the number of gates and hence minimise the error incurred in the
circuit.

To benchmark performance we simulate the algorithm for all possible outputs in
the search space for increasing numbers of oracle queries to see how errors in
imperfect gates negate improvements in output state amplification from
successive oracle applications. The results of these simulations are shown in
Fig. 7, where we show the probability of observing the target output state,
$P_{\mathrm{Target}}$, and the probability associated with the next most
likely output, $P_{\mathrm{2nd}}$, to facilitate analysis of the ability to
identify the target state from the distribution.

Here the $CCZ$ implementation yields raw output probabilities exceeding 0.50
after 5 iterations, whilst achieving the lowest loss probability and largest
suppression of the incorrect output state amplitudes below 0.002. By
comparison, for the LP and ARP $CZ$ gate circuits the raw output probabilities
peak after only 4 iterations at around 0.35 and 0.25 respectively, with
reduced suppression of the next-most likely output and, in the case of the ARP
$CZ$ gate, significant losses.

In the regime of loss-correction, the output probabilities peak an iteration
higher, with the corrected $CCZ$ circuit yielding 0.97 success probability,
whilst in the $CZ$ based circuits the ARP protocol outperforms LP due to
reduced phase errors but with a peak success probability closer to only 0.80.
These results clearly demonstrate the advantages of being able to apply native
multi-qubit gates for efficient and high-fidelity implementation of quantum
algorithms.

##  4 Discussion and Outlook

In this paper we have analyzed the theoretical performance of near-term
neutral atom quantum processors by using algorithmic benchmarks and estimating
the attainable quantum volume, comparing different operation modalities and
gate protocols.

Comparison of quantum volume for circuits up to a depth of 9 layers on 9
qubits shows that significantly higher performance can be obtained using
dynamically reconfigurable qubit connectivity instead of relying on static
qubit geometries. Further, we show that it is important to consider not only
the absolute gate fidelity, but also the dominant error channels, where the
low loss of the LP protocol yields improved output probabilities compared to
the low-phase error ARP $CZ$ gates unless post-processing is possible, in
which case this comparison is in some instances reversed. For moveable
tweezers using the LP gate protocol we estimate a lower bound of $V_{Q}=2^{9}$
without loss correction. With post-selection we see both gate schemes reach
$V_{Q}=2^{9}$, with a higher heavy output probability for the ARP $CZ$ gate.
In both cases movement based connectivity represents an improvement on static
array SWAP gate protocols.

By simulation of paradigmatic algorithm implementations on Rydberg quantum
computers we have shown that the 9+1 qubit BV algorithm can yield raw success
probabilities $>0.95$, and that exploiting the native implementation of multi-
qubit $CCZ$ gates provides an efficient approach to Grover’s search algorithm,
significantly increasing performance and suppressing losses compared to a $CZ$
gate based decomposition, which many other hardwares are limited to.

Through this work we have demonstrated that current neutral atom quantum
computers are capable of efficient, high quality algorithmic implementation in
the NISQ era, with the predicted quantum volume metrics highly competitive
against current superconducting circuit systems. Future work to extend these
simulations to larger qubit numbers, combined with implementation of improved
circuit transpilation and efficient routing of atom movements [44] will enable
accurate estimation of the limiting quantum volume for larger systems, along
with demonstration of experimental verification using real hardware.

_Note:_ Whilst preparing this manuscript we became aware of similar work by
Wagner _et al._ [70] performing numerical simulations of algorithmic
performance of up to 11 qubits based on the experimental hardware from Ref.
[42], demonstrating a 10-15% improvement in the average success probability of
a number of algorithms in the limit of all-to-all connectivity.

Simulation Parameters | Value
---|---
$T_{1}$ [43] | 4.00 s
$T_{2}$ [43] | 1.49 s
$\Omega$ [43] | 1 MHz
$\epsilon_{\mathrm{Init}}\leavevmode\nobreak\ \cite[cite]{[\@@bibref{}{evered23}{}{}]}$ | 0.003
$t_{\mathrm{Init}}$ [37] |  $300\leavevmode\nobreak\ \mu$s
$v_{\mathrm{move}}$ [43] |  $0.55\leavevmode\nobreak\ \mu$m$\,\mu$s-1
$\tau_{\mathrm{move}}^{\mathrm{A}}$ |  $100\leavevmode\nobreak\ \mu$s
$\tau_{\mathrm{move}}^{\mathrm{B}}$ |  $40\leavevmode\nobreak\ \mu$s
Table 1: Default simulation parameters for the Rydberg Virtual Quantum Device
simulated in QuEST. Other input parameters are bespoke or irrelevant to the
tasks considered in this work

##  5 Acknowledgements

The authors would like to acknowledge the QuEST team, particularly C.
Gustiani, for development of and providing early access to the virtual quantum
device package on which these simulations were performed. We also thank Andrew
Daley, Viv Kendon and Gerard Peligri for useful discussions and careful
reading of the manuscript. This work is supported by the EPSRC Prosperity
Partnership SQuAre (Grant No. EP/T005386/1) with funding from M Squared Lasers
Ltd. The data presented in this work are available at [71].

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