# A Baseline Approach for Modeling and Characterization of Commercial Off-The-
Shelf (COTS) Droop Controlled Converter

Muhammad Anees  FREEDM System Center
North Carolina State University
Raleigh, USA
<EMAIL_ADDRESS>Lisa Qi
Srdjan Lukic  ABB Corporate Research Center
ABB Inc.
Raleigh, USA
<EMAIL_ADDRESS>FREEDM System Center
North Carolina State University
Raleigh, USA
<EMAIL_ADDRESS>Mehnaz Khan  ABB Corporate Research Center
ABB Inc.
Raleigh, USA
<EMAIL_ADDRESS>
###### Abstract

Due to advancements in power electronics, new converter topologies are
introduced day by day. It’s hard to get an equivalent model from any
manufacturer of any Commercial Off-The-Shelf (COTS) power electronics
converters because of intellectual property (IP) and safety concerns. Most
COTS products don’t reveal the exact topology of the converter as well as the
control architecture and corresponding control gains. Because of these
reasons, it’s very hard to implement an exact equivalent model of COTS
converters. Hierarchical control is widely used in microgrid applications,
where different control layers are decoupled on the timescale. This article
gives a baseline approach to build an equivalent model of any droop controlled
COTS converter to mimic its control performance. Bandwidths of the different
control loops are estimated along with the control logic from experiments on
COTS converter and then hierarchical control is followed to come up with the
equivalent model. The approach is verified on COTS CE+T Stabiliti 30C3
converter with its equivalent model build in MATLAB Simulink.

###### Index Terms:

Microgrids, hierarchical control, classical control

##  I Introduction and Literature Review

DC Microgrids are getting more and more applications due to the advancements
in power electronics, simple control - no need for synchronization, inherent
DC nature of resources i.e Photovoltaics and Batteries [1]. Droop is widely
used decentralized control approach to ensure uniform power sharing between
multiple resources in a DC microgrid [1]. Commonly used linear droop control
approaches are classified as power based droop (PV, VP) and current based
droop (VI, IV) [2,3]. Adaptive and non linear droops are also investigated by
different researchers [4-7] to improve the voltage regulation along with
uniform power sharing.

Linear droop (VI, VP, IV, PV) is a simple proportional control and does not
involve dynamics, any change in output load power/current, will appear
directly in the output voltages following the droop curve. To deal with the
fluctuations, concept of virtual inertia is borrowed from AC microgrid control
[8]. There are two main approaches to implement virtual inertia in DC systems
1) Low Pass Filter (LPF) [8], 2) virtual machine emulation [9,10]. Both
approaches are proved equivalent and can be designed to have similar
performance by the correct selection of parameters [11].

Hierarchical control is used to ensure coordinated power flow from low to high
levels in microgrids [5], where tracking control is the faster control that
ensures tracking of voltage and current respectively. While designing the
control loops for any converter, bandwidth decoupling of control loops is
important from control hierarchy perspective. Idea of bandwidth decoupling in
standard droop controlled DC systems can be seen in Fig 1. The fastest control
loop is usually kept slower than the switching frequency, so that controller
don’t get distracted by the switching dynamics. Following the similar
hierarchical approach, any upper control is slower than the inner control
layer.

Figure 1: Bandwidth decoupling of droop controlled converter

Most manufactureres don’t reveal their converter topology, control structure
and corresponding control gains. Considering that it is impossible to come up
with an exact model of COTS converter. One approach is to get the impedance
scans of the COTS converter and then a small signal model can be estimated
[12,13], which can be used for different types of passivity based control
[14,15] and EMC analysis [13]. But it is hard to identify the overall control
topology and bandwidths of the corresponding control loops just from the
impedance scans.

The main contribution of this paper is to give a baseline approach to identify
the bandwidths (BWs) of control loops of a COTS converter and then identify
the control logic and come up with an equivalent model. Such equivalent model
of an actual COTS product can help the researchers to study the response in a
cost effective way for different scenarios including fault, load changes,
instability due to constant power loads and current limitations etc. CE+T
Stabiliti 30C3 converter is chosen as COTS converter for modeling and
characterization of control.

Rest of the paper is organized as follow, section II describes the modeling
approach, section III verifies the modeling by comparing the BW of control
loops and control logic in equivalent model and COTS converter, Section IV
proves the effectiveness of the model through two use cases 1) performance
under different droop coefficient/resistance and 2) Instability in DC
microgrids due to Constant Power Loads (CPL). At end, section V concludes the
article.

##  II Modeling Approach

The chosen COTS converter is a multi port (1x AC, 2x DC) converter, which can
be controlled in different ways. As we are interested in knowing the droop
behavior so its modeling is simplified for the case when COTS converter is
used as droop controlled DC bus. In this study, its other DC port is ignored
and input AC side dynamics are also ignored. A DC/DC boost converter with dual
loop control regulating with nominal voltage regulation of 350V is chosen as
an equivalent switching model of CE+T converter, parameters are given in Table
1. We can choose any other topology of switching converter for equivalent
model because switching and converter dynamics can be ignored for the
characterization of control behavior of CE+T converter by assuming that
fastest control loop is decoupled from switching harmonics (even average model
is enough for control design and evaluation). Individual design of control
loops is as follow and bode plots are used to verify the control design.

TABLE I: Boost Converter Parameters Parameters | Value
---|---
Global no-load voltage ref [Vo] | 350V
Source Voltages [E] | 130V
Source resistance [rBAT] | 0.03$\Omega$
Inductance [L] | 2mH
Inductor ESR [r] | 0.01$\Omega$
Capacitance [C] | 3.3mF
VP Droop coefficient [Kvp] | 10V/3600W
Equivalent VI droop resistance [K] | 1$\Omega$
Current control bandwidth | 20KHz
Voltage ramp rate | 50V/sec
Voltage control bandwidth | 200Hz
Low Pass Filter (LPF) bandwidth | 200Hz

###  II-A Modeling of Current Control Loop

For the inner current loop design, transfer function from inductor current
(iL) to duty cycle (d) (Fig. 2) can be formulated using perturbation and
linearization around steady state.

$Gid(s)=\frac{((1-Dc)V_{o}-sLI_{L})}{(LCs^{2}+L/Rs+(1-Dc)^{2})}$ (1)

Dc is duty cycle and Rs is sum of inductor ESR and source resistance. Using
(1), as the plant model, bode plot method on loop gain as in (2) is used to
come up with PI gains of the current controller. Bode plot for open loop gain
of current control loop is shown in Fig. 3, where we can see that chosen
current loop gains results in Phase Margin (PM) of 90 degrees and Bandwidth of
20KHz. 20KHz bandwidth for current controller is selected in model based on
estimation from actual CE+T converter as in subsection A of section III.

Figure 2: Modeling of current loop

$T_{c}(s)=Gid(s)G_{c}(s)$ (2)

Figure 3: Bode plot for current loop gain

###  II-B Modeling of Voltage Control Loop

Similar approach is followed for the design of outer voltage loop. Close Loop
Transfer Function (CLTF) of inner current loop in (3) is used to calculate the
open loop gain Tv(s) for outer voltage loop , shown in Fig 4,where (4)
represents the plant transfer function for output voltage to inductor current
for boost converter.

Figure 4: Modeling of voltage loop

$Tci(s)=\frac{Gid(s)G_{c}(s)}{1+Gid(s)G_{c}(s)}$ (3)
$Gvi(s)=\frac{v_{o}}{i_{L}}=\frac{(1-Dc)V_{o}-(sL)I_{L}}{V_{o}Cs+2(1-Dc)I_{L}}$
(4) $T_{v}(s)=G_{v}i(s)G_{v}(s)Tci(s)$ (5)

From some simple tests on COTS CE+T converter, it is found that CE+T has ramp
rate controller from 0.25V/sec to 1000V/sec. Keeping that in mind a voltage
ramp rate controller is implemented on a fast 200Hz voltage loop.Bode plot
design for 200Hz voltage loop is shown in Fig 5. Ramp rate controller is
activated when voltage setpoint is changed, so it is implemented in series
with voltage reference command as in Fig 7.

Figure 5: Bode plot for voltage loop gain

###  II-C Modeling of Droop Characteristics

As confirmed from the conveter’s operating manual that CE+T allows maximum
droop coefficient upto 1000V/60KW using VP droop. Following simple test is
designed to verify the steady state VP droop characteristics of CE+T for two
different droop coefficients as given in Fig. 6. Orange line corresponds to
droop coefficient of 500V/60KW and blue line corresponds to 1000V/60KW droop
coefficient. Droop characteristics on COTS converter are evaluated for steady
state no voltage reference of 100V and power transfer upto 320W against two
mentioned droop gains. Purpose of this test is to evaluate the droop
characteristics on COTS converter and then model and design the droop
characteristics in equivalent model accordingly. This tests also confirms that
droop follows Low Pass Filter (LPF) of about 200Hz, this will be explained
later in the subsections B, section III. LPF is implemented in series with
droop cofficient, finalized control scheme is shown in Fig 7.

Figure 6: VP droop steady state characteristics for CE+T

Figure 7: Finalized control scheme for CE+T equivalent model

##  III Verification of Modeling

Table 1 parameters are used to implement the control scheme of Fig 7 for time
domain equivalent model of COTS converter - implemented in MATLAB Simulink.
For hardware characterization, CE+T is connected to Chroma 1000V/100A/5.2KW
electronic load. Line length between electronic load and CE+T is short and its
impedance is ignored for this section. But additional 760uH line inductance is
inserted between load and source converter to verify the instability, that is
explained in Subection B of section IV. Results of time domain simulation in
MATLAB Simulink vs hardware characterization of COTS converter are compared to
verify the modeling approach.

###  III-A Verification of Current Controller

For an approximate switching frequency of 30KHz (verified from CE+T) , CE+T’s
current control loop have a bandwidth of 20KHz. A step response of current
controller from both time domain simulation and CE+T are shown in Fig. 8 and
Fig. 9 respectively, verifying the modeling of current control loop. BW from
step response is estimated by modeling the current control as first order
system’s time constant.

Figure 8: Current controller BW estimation from time domain model

Figure 9: Current controller BW estimation from CE+T converter

As we know, change in current for one time constant for 5A step is  3.2A (63
percent of 5A), as shown for 5-10A step in Fig 8 and 0-5A step in Fig 9.
Estimated time for one time constant is 0.00005sec which corresponds to 20KHz
BW of current controller. This section verifies that the current controller BW
in time domain model is close to the CE+T current controller.

###  III-B Verification of Voltage Controller and Droop Controller

As discussed in subsection B and C in section II, CE+T follows the ramp rate
controller for any change in voltage reference, and a Low pass filter like
response in series with droop cofficient. Fig 10 shows the time domain
simulations where initially at t=0sec, converter is regulating the constant
350Vdc and supply 3600W CPL, and at t=1sec, PV droop (Kvp=60V/3600W) is
enabled and converter voltage drops to 290V by following a designed 200Hz LPF
response. Then voltage are restored by adjusting the voltage reference (at
t=2sec), that follows the ramp rate of 50V/sec \- taking 1.2secs to restore
60V difference.

Figure 10: Voltage and droop loop characteristics from time domain model

Figure 11: Voltage and droop loop characteristics from CE+T converter

Fig 11 verifies the voltage ramp rate controller and droop characteristics of
CE+T converter by putting the same parameters of droop coefficient,ramp rate
and LPF in CE+T as in model. Load of 3600W is enabled at t=14sec without
droop, and then a droop of 60V/3600W is enabled at t=17.72sec by following a
200Hz droop LPF. We can see in zoomed in snippet that the time constant of
about 0.00487sec (corresponds to 208Hz) for droop BW. At the same time,
voltage ramp rate of 50V/sec can be seen when voltage restoration command is
given at t=25.2sec, restoring 60V difference in 1.2sec. This section verifies
the mapping of steady state (droop coefficient) and dynamic (low pass filter)
performance of equivalent model with COTS converter.

##  IV RESULTS: Use Cases of Equivalent Model

This section proves the effectiveness of equivalent model by comparing the
performance of the equivalent model to actual COTS converter for two different
use cases. A) Performance under different droop coefficients, B) CPL
instability in inductive DC microgrid.

###  IV-A Performance Under Different Droop Variable

As the equivalent model uses VP droop, modulating the output voltage based on
net power transfer to/from the converter. This case is performed under ideal
transmission lines (line inductance and resistance are both zero) with
constant power load connected at the output. Dynamics of droop (LPF bandwidth)
is already verified in subsection B , section II of the article. This section
verifies the steady state performance under different droop coefficients. Fig
12 (equivalent model) and Fig 13 (CE+T converter) shows the performance under
two different droop gains 10V/3600W and 20V/3600W for a CPL load of 3600W. Two
different droop gains results in two different steady state voltages; 340V
(Kvp=10V/3600W, K=1ohms) and 330V (Kvp=20V/3600W, K=2ohms), can be seen in Fig
12 and Fig 13 correspondingly.

Figure 12: Varying droop gain results from time domain model

Figure 13: Varying droop gain results from CE+T converter

###  IV-B CPL Instability in DC Microgrids

Line inductance and bus capacitance together with CPL forms
instability/oscillations in DC microgrids. This instability is modeled by
different researchers [11][16,17]. As per [11], we need some minimum/base
value of the bus capacitance (Co) to stabilize a DC microgrid.

$(C=Co)>\frac{L}{KRe}$ (6)

Here L is line inductance, K is droop resistance, Re is equivalent negative
impedance of CPL. Oscillation/instability in CPL is because of the interaction
of line inductance together with bus capacitance which limits the max CPL
power transfer or minimum resistance for CPL power. Lets rearrange the above
equation (6) as below to get (7).

$Lo<{KCRe}$ (7)

Lets assume we want to see the CPL instability for Bus capacitance C=30.8uF,
K=1 ohms,(Kvp=10V/3600W) for a max power transfer of 4600W (Re=24.68 ohms),
maximum inductance Lo is considered to be 760uH. Lets evaluate the model
performance against the mentioned parameters. As per Fig 14, converter was
initially running without droop at 4000W and then load power start ramping at
t=1 sec at ramping rate of 1000W/sec. We can see system goes unstable when CPL
power reaches to about 4600W. Zoomed in snippets are shown for further
clarity. Now lets evaluate the performance of CE+T under same set of
parameters in Fig 15, where at t=65sec load of 4000W with droop (10V/3600W) is
enabled, then load is increased in 100W steps for each 5 seconds. We can see
CE+T goes unstable at t=95sec and disconnects at around 97secs. Zoomed in
snippets shows the oscillations in voltages, current and power.

Figure 14: CPL instability from time domain model

Figure 15: CPL instability from CE+T converter

This test case verifies that performance of equivalent model is close to
actual converter, where power limit for CPL is same in both model and actual
converter but the oscillation amplitude differs, this could be because of the
different topology and different passives in the actual converter as compared
to the model.

##  V Conclusion

DC microgrids are a preferable choice over AC microgrids because of
simplicity, easy control and direct integration of resources. Power
electronics COTS products don’t clearly reveal their topology and control
structure and gains etc because of the IP and safety concerns. This article
gives a baseline approach which can be used to build an equivalent model of
any COTS converter to mimic the control performance. Proposed idea is
evaluated on actual COTS CE+T Stabiliti 30C3 converter by comparing its
performance with its equivalent model developed in MATLAB Simulink. Proposed
approach models the control performance by assuming that the converter
dynamics are faster than the control loops bandwidth. Keeping that in mind,
proposed approach can be extended to any type of the converter without knowing
the topology and architecture.

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