

def _translate_mul(self, tb, instruction):
    oprnd0 = tb.read(instruction.operands[0])
    if (oprnd0.size == 8):
        oprnd1 = ReilRegisterOperand('al', 8)
        tmp0 = tb.temporal(16)
        result_low = ReilRegisterOperand('al', 8)
        result_high = ReilRegisterOperand('ah', 8)
    elif (oprnd0.size == 16):
        oprnd1 = ReilRegisterOperand('ax', 16)
        tmp0 = tb.temporal(32)
        result_low = ReilRegisterOperand('ax', 16)
        result_high = ReilRegisterOperand('dx', 16)
    elif (oprnd0.size == 32):
        oprnd1 = ReilRegisterOperand('eax', 32)
        tmp0 = tb.temporal(64)
        result_low = ReilRegisterOperand('eax', 32)
        result_high = ReilRegisterOperand('edx', 32)
    elif (oprnd0.size == 64):
        oprnd1 = ReilRegisterOperand('rax', 64)
        tmp0 = tb.temporal(128)
        result_low = ReilRegisterOperand('rax', 64)
        result_high = ReilRegisterOperand('rdx', 64)
    imm0 = tb.immediate((- oprnd0.size), (oprnd0.size * 2))
    tb.add(self._builder.gen_mul(oprnd0, oprnd1, tmp0))
    if ((self._arch_info.architecture_mode == ARCH_X86_MODE_64) and (oprnd0.size == 32)):
        zero = tb.immediate(0, 64)
        tb.add(self._builder.gen_str(zero, ReilRegisterOperand('rdx', 64)))
        tb.add(self._builder.gen_str(zero, ReilRegisterOperand('rax', 64)))
    tb.add(self._builder.gen_bsh(tmp0, imm0, result_high))
    tb.add(self._builder.gen_str(tmp0, result_low))
    if (tb._translation_mode == FULL_TRANSLATION):
        fimm0 = tb.immediate(1, 1)
        ftmp0 = tb.temporal((oprnd0.size * 2))
        ftmp1 = tb.temporal(1)
        tb.add(self._builder.gen_bsh(tmp0, imm0, ftmp0))
        tb.add(self._builder.gen_bisz(ftmp0, ftmp1))
        tb.add(self._builder.gen_xor(ftmp1, fimm0, self._flags['of']))
        tb.add(self._builder.gen_xor(ftmp1, fimm0, self._flags['cf']))
        self._undefine_flag(tb, self._flags['sf'])
        self._undefine_flag(tb, self._flags['zf'])
        self._undefine_flag(tb, self._flags['af'])
        self._undefine_flag(tb, self._flags['pf'])

dataset/ETHPy150Open programa-stic/barf-project/barf/barf/arch/x86/x86translator.py X86Translator._translate_mul/VarMisuse@373/543 `self`->`tb`