a method for automatically determining models signals of an fpga program which are readable from the fpga with the aid of a readback following an fpga build , including the following steps : generating an fpga model and generating an fpga code from the fpga model , the method comprising the additional step of an automatic analysis for the purpose of identifying signals which are readable from the fpga with the aid of a readback , prior to the completion of the step of generating the fpga code from the fpga model , and the method comprises the step of outputting signals which are readable from the fpga with the aid of a readback . a data processing device is also provided for carrying out the method .