a block repair device is disclosed for use in a semiconductor memory having an array including a defective cell and a redundant row . the block repair device includes a set of fuses , antifuses , or flash eeprom cells to store a block repair configuration that determines the dimensions of a repair block used to repair the defective cell . routing circuitry , such as multiplexer circuitry , in the block repair device is directed by the stored block repair configuration to output selected row and column address bits from received row and column addresses in a selected ratio . comparison circuitry in the block repair device then compares the row and column address bits output by the routing circuitry with a stored portion of the address of the defective cell that defines the repair block . when a match occurs , the comparison circuitry implements a block repair by activating the redundant row and by causing data to be written to or read from the activated redundant row .