one embodiment of the present invention provides a system that efficiently emulates sub - instructions in a very long instruction word processor . the system operates by receiving an exception condition during execution of a vliw instruction within a vliw program . this exception condition indicates that at least one sub - instruction within the vliw instruction requires emulation in software or software assistance . in processing this exception condition , the system emulates the sub - instructions that require emulation in software and stores the results . the system also selectively executes in hardware any remaining sub - instructions in the vliw instruction that do not require emulation in software . the system finally combines the results from the sub - instructions emulated in software with the results from the remaining sub - instructions executed in hardware , and resumes execution of the vliw program .