a single instruction multiple data processor comprises a processing element array including a plurality of processing elements , and a memory array operably divided into memory portions , each memory portion being assigned to a particular processing element . a first processing element is operable to access a portion of the memory array assigned to that first processing element and also to access a portion of the memory array assigned to a second processing element . such access is made using an index value indicative of the processing element assigned to the memory position to be accessed .