a floating gate tunneling metal oxide semiconductor transistor is formed on a semiconductive substrate as a cell of electrically erasable programmable read - only memory . the transistor includes a source and a drain spaced apart to define a channel region therebetween in the substrate . an insulated floating gate at least partially overlies the channel region and is capacitively coupled with the substrate . a control gate is insulatively disposed above the conductive layer and spans the channel region . the withstanding voltage of the drain is specifically set to range from a first voltage adapted to be applied to the drain during a read operation to a second voltage applied thereto for forcing the conductive layer to discharge .