a n - stage synchronizer for synchronizing asynchronous signals in a destination system &# 39 ; s time domain . the synchronizer has n - stages with each stage having a series connected logic gate and flip - flop , and each of the n - stages are connected in series . each logic gate has the output of the previous stage input thereto along with an abort signal . the abort signal when asserted blocks the synchronization of the asynchronous signal . the synchronizer permits a reduction in the latency associated with the synchronization process while not affecting reliability .