a control circuit of a memory system including a dynamic random access memory may include a first integrated circuit formed on a common substrate . the first integrated circuit may include a circuit responsive to an external memory access request signal for generating a control signal for controlling an operation timing of the dynamic random access memory to supply the control signal to the dynamic random access memory and a circuit for generating an address signal for specifying an address of the dynamic random access memory to be accessed to supply the address signal to the dynamic random access memory . a second integrated circuit includes a read / write circuit for reading data from the dynamic random access memory and for writing data in the dynamic random access memory .