a method and apparatus for handling events , such as those which occur in a processor . an event vector is formed by combining event type information indicating a type of event in the processor and mode information indicating an operating mode of the processor . a microcode event handler vector is generated therefrom , for example , by referencing a lookup table . the microcode event handler vector is then used for invoking a microcode event handler to handle occurrence of these events in the processor . by the formation of an event vector , and the microcode event handler vector , execution performance is increased due to avoiding conditional branching within the processor , such as modem high performance architectures , including those which execute instructions in and out - of - order .