a switched mode power supply device comprising a power transistor periodically set to conduction and supplying a regulated voltage that comprises a ramp generation circuit controlled by a clock signal and periodically generating a ramp voltage . the device includes an amplifier error circuit between a reference voltage and said regulated output voltage and generates an error signal , and a comparator comparing the ramp voltage with said error voltage and providing an output signal for controlling said power circuit . the circuit is characterized in that it comprises a delay element delaying the setting to conduction of the power transistor so as to desynchronize the starting of the ramp and said setting to conduction .