a memory array for a multi - port memory having a common memory interface and a plurality of memory ports through which the memory array is accessed is provided . the memory array includes memory locations with the memory array organized as a first memory sub - array accessible through a first of the plurality of memory ports as a memory array and organized as a second memory sub - array accessible through a second of the plurality of memory ports as a memory array . both m and n are multiples of a value r , and the sum of and is equal to s . the memory array further organized as a common memory array accessible through the common memory interface as a memory array .