a pll circuit includes a phase comparator for outputting a frequency control signal based on a result of comparison between phases of an input reference clock signal and a fed - back oscillation signal ; an oscillation circuit , connected to the phase comparator , for outputting an oscillation signal having a frequency in accordance with the frequency control signal , a power source voltage , and a predetermined reference voltage ; and a bias control circuit , connected to the oscillation circuit , for increasing either the potential difference between the reference voltage of the oscillation circuit and a ground voltage or the potential difference between the power source voltage of the oscillation circuit and the ground voltage . a transistor in the oscillation circuit can operate in a saturation area , thereby operating the pll circuit at a high speed with a low power source voltage , without being easily affected by a variation in the temperature or other process conditions .