a method of fabricating a gate structure in a metal oxide semiconductor field effect transistor and the structure thereof is provided . the mosfet may be n - doped or p - doped . the gate structure , disposed on a substrate , includes a plurality of gates . each of the plurality of gates is separated by a vertical space from an adjacent gate . the method deposits at least one dual - layer liner over the gate structure filling each vertical space . the dual - layer liner includes at least two thin high density plasma films . the deposition of both hdp films occurs in a single hdp chemical vapor deposition process . the dual - layer liner has properties conducive for coupling with plasma enhanced chemical vapor deposition films to form tri - layer or quadric - layer film stacks in the gate structure .