a method generates test vectors for a customer designed integrated circuit having an embedded vendor circuit . the embedded vendor circuit has a proprietary circuit and a nonproprietary circuit . at least one pseudo input is defined to represent a portion of the nonproprietary circuit to emulate the nonproprietary circuit output . an output node of the embedded vendor circuit to which an input of the customer designed circuit is connectable is identified . a test netlist is created which represents circuitry that produces output states at the output node which would be generated by the embedded vendor circuit thereat . the test netlist includes at least one pseudo input and the output node , without including a full netlist of either the proprietary or nonproprietary circuits , and can be used to generate scan test vectors for the customer designed integrated circuit by the automatic test vector generating software program .