a semiconductor nonvolatile memory device which can adopt a folded bit line system and can achieve an enhancement of speed of the read out time etc ., which device adopting a differential type sensing system comprising a bit line bl and an inverted bit line bl -- connected in parallel to a sense amplifier sa f , wherein provision is made of a first memory cell mc1 connected to a word line wl and the bit line bl ; a second memory cell mc2 connected to the word line wl which is common also for the first memory cell mc1 , and , connected to the inverted bit line bl -- ; and a circuit bva which retains the potential of either one of bit lines of the bit line bl and the inverted bit line bl -- at the first potential at the time of a read out operation , and , sets the potential of the other bit line at the second potential made to have a difference from the first potential for a predetermined time .