scheduling instructions by eliminating copy instructions to reduce code size and increase performance in a computer program compiler . according to one embodiment of the present invention copy instructions are coalesced prior to preparing a ready list . the ready list is polled and instructions selected for scheduling . after selection of a next instruction , liveness conflicts are determined , where a live register contains a valid value that is needed at a later step . conflicts are then resolved and instruction scheduling continues . the process is continued until the ready list is empty .