disclosed are a precharge circuit employing an inactive weak precharging and equalizing scheme , a memory device including the same and a precharging method . the inactive weak precharging and equalizing scheme equalizes a non - selected bit line and complementary bit line while sensing and amplifying memory cell data delivered to a selected bit line and complementary bit line to evaluate the voltage difference between the selected bit line and complementary bit line . then , the scheme precharges the selected bit line and complementary bit line and the non - selected bit line and complementary bit line . this does not require high precharge driving capability for inactivated bit line and complementary bit line equalized to a predetermined voltage level so that precharge current and operating current can be reduced .