a nonvolatile memory cell includes first and second mos transistors , such as a pmos transistor and nmos transistor in a cmos cell . one of the two transistors provides a floating gate for storing data while the other transistor is provided with a control gate for selecting the memory cell , and is connected with a bit line for reading data stored in the cell . the nonvolatile memory cell may be integrated into a logic device , such as a cmos gate array , using pmos and nmos transistor cells formed in the gate array . in that case , the nonvolatile memory cell may be fabricated in a logic device with the standard processes used to produce the logic device .