the circuit configuration has a memory array , a memory access controller , a control unit , and an input / output circuit . the control unit outputs a control signal simultaneously to the memory access controller and to the input / output circuit . when the control signal is received , the input / output circuit outputs data to the memory access controller via the data bus . when the control signal is received , the memory access controller stores the data present on the data bus in memory cells of the memory array . owing to different geometric arrangements and different electrical capacitances , differences in propagation time of the control signals may occur on the path from the control unit to the memory access controller and from the control unit to the input / output circuit . for this purpose , a delay circuit or delay line is provided on the signal path to the memory access controller which brings about a delay of the control signal . this enables precise synchronization of the writing of data into the memory array .