disclosed herein is a method and apparatus used to detect phase error information between edges of an input data signal and a clock signal for use at ultra - high frequencies and where linear phase error information is required . this invention extends the usefulness of a given integrated circuit logic technology to twice the frequency range of application while maintaining the desired linear phase error measurement operation . flip flops are used to sample the data input signal with the clocking signal and processing is done separately for rising and falling data edges . analog recombination of phase error information from both edges is then done in a fashion that is not limited by the integrated circuit speed . this invention overcomes limitations of prior methods in that it operates in data applications , provides linear phase error information at very high phase - error bandwidth and can operate at the same maximum speed as the flip flop and logic process technology will allow by operating on bit cells that are a full 1 - bit minimum rather than half - bit cells .