an integrated circuit device includes a serial peripheral interface adapted for receiving a first command supporting an address of a first configuration , wherein the serial peripheral interface supports an address of a second configuration upon receipt of a second command , the second configuration being different from the first configuration . in a specific embodiment , the first and the second configurations are different in address length . in another embodiment , a second address cooperated with the second command has a first part and a second part , the second part comprising a plurality of byte addresses , each of the byte addresses being associated with a corresponding byte of data . in another embodiment , integrated circuit device also includes a mode logic circuit for controlling operations of the first command and the second command . various other embodiments are also described .