a data processing system the central processing unit of which is responsive to and executes microinstructions generated by the decoding of macroinstructions so as to provide one or more data processing operations . the system is arranged so that such microinstructions can be supplied to the cpu from a cpu - resident microcode decoding logic or from one or more external microcode decoding units . each of the external units can identify a macroinstruction which it is capable of decoding and includes logic for externally providing one or more microinstructions which result from the decoding process . if an external microcode unit and the cpu - resident decode logic are both capable of such decoding operation , the external unit overrides the cpu decoding logic and controls the decoding operation externally . the external microcode unit includes logic for monitoring the number of microinstructions supplied to the cpu which have not yet been executed by the cpu .