in a semiconductor memory device in which row and column address signals are serially supplied using a multiplexer or serial address signals are supplied without using a multiplex , a ram interface is provided which easily makes it possible to replace a dram with a sram . a memory ic which is formed by a dram is changed to a sram , and a resulting sram memory ic is controlled using a logic ic 10 which is originally constructed for use with the original dram memory ic . between the logic ic and the sram memory ic , a ram interface is disposed . according to the present invention , it is possible to divide row - column address signals which are supplied in serial form into row address signals and column address signals and to modify a control signal which controls a dynamic ram to control a static ram .