an sram device includes a first inverter ; a second inverter cross - coupled with the first inverter ; a first pass gate transistor connecting the first inverter to a bit line ; and a second pass gate transistor connecting the second inverter to a complementary bit line , wherein the first or second pass gate transistor has a layout structure where a first distance between its gate conductive layer and its source contact is purposefully designed to be substantially different from a second distance between its gate conductive layer and its drain contact for reducing leakage current induced by misalignment of the gate conductive layer with respect to the source contact .