in order to solve a problem of occurrence of delamination of interlayer film due to occurrence of a crack in an lsi wiring layer in a ubm lower layer immediately under a solder bump in an outer periphery of an lsi chip , a semiconductor apparatus of the present invention includes a stress boundary between compressive stress and tensile stress in an lsi wiring layer of a bump lower layer and in order to alleviate the stress present in the bump lower layer tensile stress material is arranged on a compressive stress side or compressive stress material is arranged on a tensile stress side with a stress boundary of the lsi wiring layer as a boundary .