an input buffer chooses , in accordance with first control clocks , to output an input data signal or output a high - impedance signal . a master flip - flop chooses , in accordance with second control clocks , to output a data signal received from the input buffer or retain a currently output data signal . a master - slave switch chooses , in accordance with the second control clocks , to output a high - impedance signal or output a data signal received from the master flip - flop . a slave flip - flop chooses , in accordance with the second control clocks , to retain a currently output data signal or output a data signal received from the master - slave switch . a clock buffer inputs the second control clocks , and generates and outputs the first control clocks .