it is an object of the present invention to provide a new and improved method and equipment for nondestructive testing of structual material such as plate stock or the like having front and rear surfaces , but a nonuniform thickness under utilization of ultrasonic test pulses which are set into the front surface and under further ultilization of echoes which are being detected , converted into electrical signals and processed further . it is another object of the present invention to provide a new and improved method for nondestructive reproducible testing of structural material and workpieces of variable thickness under utilization of equipment which in the past permitted merely testing of zones within the material equal to minimal wall thickness . in accordance with the preferred embodiment of the present invention , a first gating and signal detection period is provided for echo signals which covers at least a period in which a rear wall echo signal will appear ; any echo signal which occurs within that first gating period is detected . such an echo signal may be a defect echo or a rear wall echo , in either case this detection is used for generating a second gating and detection period ; and finally a rear wall echo is detected , if it occurs in the second gating period as an indication of the presence of a defect . it can thus be seen that the principal behind the invention is the intentional extension of a detection period for searching additionally for further away defects , but also for the rear wall echo . if an echo occurs within this preliminary detection period it cannot per se be identified as a defect echo or a rear wall echo but is used for the setting up of a further detection period . if no echo occurs within this supplemental detection period then the previously detected echo was the rear wall echo . if , however , within the supplemental detection period another echo ( i . e ., from the true rear wall ) occurs then the previous echo was generated by reflection from a defect . that defect now is indicated indirectly by the supplemental detection of the rear wall echo . moreover , it can readily be seen that the principal of the invention involves supplementing the existing circuitry such as ultrasonic test equipment whose use was previously restricted to the detection of flaws within the minimal wall thickness zone behind the front surface through which the test pulses are launched . the inventive principal extends the detection range further by means of equipment which simply can be added on to existing equipment . the original detection period should remain separate ; the extension of detection covers the transit time equivalents of rear wall echoes of minimum and maximum thickness portions . the supplemental detection period is preferably equal in length to the extension period . while the specification concludes with claims , particularly pointing out and distinctly claiming the subject matter which is regarded as the invention , it is believed that the invention , the objects and features of the invention , and further objects , features and advantages thereof , will be better understood from the following description taken in connection with the accompanying drawings , in which : fig1 illustrates somewhat schematically ultrasonic testing of a piece of stock of variable thickness ; fig2 , and 4 are pulse - time diagrams derivable from and pursuant to testing as illustrated in fig1 in three different relative positions of the test head vis - a - vis the test stock ; fig5 is a block diagram of a test system that incorporates an example of the preferred embodiment of the invention for practicing the best mode thereof ; and fig6 is a more detailed diagram of a relevant component shown in fig5 . proceeding now to the detailed description of the drawing , fig1 illustrates a piece of generally flat stock 1 having , however , variable wall thickness as represented here by an indent . the stock is nondestructively tested by ultrasonic test equipment which includes a test head 2 launching ultrasonic pulses into the material , possibly via a water column that bridges the physical input and output of the test head 2 with the solid material of which the workpiece 1 is made . the ultrasonic pulse launched by the test head 2 traverses the surface 3 of the workpiece 1 at right angles thereto . the test pulse propagates through the material and is reflected in part by the opposite surface 4 and returns as an echo signal into the test head 2 which in the meantime , for example , has been switched over from a transmitter mode to a receiver mode . it can readily be seen that in the position a of the testhead , the rear wall echo occurs relatively late . in the position b , however , the rear wall echo occurs significantly earlier . if one now assumes that the stock thickness and the bottom of the indent defines the minimum wall thickness of the sheet stock , the minimum being established by the level 5 , and if one assumes further that echo detection by itself is restricted to echos occurring prior to the earliest possible rear wall echo ( this condition exists as position b ) then one can see that in the position c the defect 6 will not be detected for the following reasons . the echo produced by the defect 6 occurs at a time that is earlier than the true rear wall echo will occur , namely a reflection on surface portion 4 when the testhead is in position c . however , the rule according to which rear wall echoes are to be excluded from the detection sequence , requires in turn that the test equipment be desensitized for periods after the earliest possible rear wall echo could have occured which is of course determined by the minimum wall thickness level 5 . a defect situated in the material between that minimum wall thickness level 5 , on one hand , and the true rear surface of the material to be tested will not be detected . turning briefly to the timing diagrams of fig2 , and 4 it will suffice for the moment that the pulse diagram of fig2 pertains to the position a of the testhead in fig1 . typically , there will be a front wall or entrance echo 7 which follows immediately the launch , after the transmitted ultrasonic signal has traversed the distance between the testhead and the front surface 3 . reference numeral 8 delineates the range within which defect echoes are to be detected . a certain period thereafter elapses until the rear wall echo 9 arrives . at a somewhat later time , a second rear wall echo 11 arrives resulting from a reflection of the first rear wall echo in parts on the surface 3 , back into the material and again by surface 4 . fig3 illustrates an analogous pulse and timing diagram but for the position b of the testhead 2 and here one can see that the rear wall echo 9 appears immediately after the end of the detection interval 8 . the timing distance or spacing between the two echo peaks 7 and 9 for this particular case defines , in terms of transit time difference , the minimum wall thickness which represents the restricted detection interwall . one can readily see that in the diagram of fig4 the wall thickness has its normal value , but an echo peak 12 results from the reflection of the test pulse by the flaw or defect 6 . that particular pulse will not be detected within the detection interval 8 . we will return to these figures after explaining in detail the effect and operation of the inventive circuit which remedies the situation and makes it possible that a defect such as 6 will in fact be detected . briefly , the principle behind the invention is to use any echo that subsequently to the regular detection interval 8 to open up another looking window and detection period . if a rear wall echo occurs within that particular supplemental period , then the pulse which was detected previously and gave rise to the setting up of this supplemental detection period and looking window was a defect echo ; if no echo occurs within the supplemental detection period and looking window then the pulse which resulted in the last mentioned setup was in fact the rear wall echo and there is no defect within the zone defined by the minimum wall thickness and the actual wall thickness . proceeding now to the description of fig5 a test piece such as a piece of plate stock of a conceivably irregular wall thickness is nondestructively tested by ultrasonic test pulses using a testhead 23 being suitably coupled to the surface of the workpiece and in progressive portions thereto . the test piece has a front wall 24 and a rear wall 25 . the testhead serves as a transmitter for ultrasonic pulses as well as receiver in alternating transmit and receive cycles , a pair of such cycles constituting a test cycle . the circuit accordingly has a transmit or transmitter branch and a receiver branch . the transmitter branch includes a trigger circuit 21 which may be suitably computer controlled in accordance with the particular test program and a timing operation commensurate with a test task at hand . that particular circuit 21 issues trigger pulses to a transmitter 22 proper , which provides a contoured signal for purposes of triggering and stimulating the transmitter portion of the transducer 23 for purposes of launching an ultrasonic test pulse into the test piece through the front wall 24 . a representative example of a defect is shown near the rear wall . ultrasonic pulses reflected for any reason including front and rear wall echoes as well as echoes on defects as they may occur , are returned into the transducer head 23 then being operated in the receiver mode and converting the ultrasonic vibrations it receives into an electrical signal to be passed on to a suitable amplifier 26 . the circuit 26 may be comprised of several stages and has accordingly , for purposes of impedance matching or the like , different output branches . one output circuit of the amplifier 26 leads to a display monitor 27 , but that is not essential as far as practicing the invention is concerned . the second output branch 31 of amplifier 26 leads to a circuit 28 to be described in greater detail below with reference to fig6 and including several gating circuits . these gating circuits are cyclically operated to some extent in response to particular signals derived from the amplifier 26 , but the detection cycle for each test cycle begins with a trigger pulse which is , of course , derived from the trigger circuit 21 . reference numeral 29 refers generally to a flaw or defect indicating or registrating device which in a more simple form may simply signal absence and presence of a defect signal , but the circuit 29 can be a bit more involved in nature and may include electronic processing and storage of signals representing defects in order to work a redundancy control etc . the particular gate circuit shown in fig6 includes an input line 31 from which measuring signals are derived from amplifier 26 in fig5 . the signal is to some extent free from noise as can be obtained through proper response and threshold adjustment in amplifier 26 , but basically the signals that arrive in line 31 , are comprised of echoes that have been returned by the reflecting surfaces in the test piece . the circuit 28 is comprised of two threshold circuits 81 and 82 each receiving the test signal from line 31 and each including a comparator or differential amplifier being denoted 811 , and 821 respectively for the two circuits 81 and 82 ; the line 31 being accordingly connected to one input each of these two comparators . the second input of each of these comparators receives reference signals , from the circuits 812 , and 822 respectively , which are individually adjustable in order to adjust the response level for the two threshold circuits 81 and 82 to different levels . for reasons below , it can be seen that the threshold adjusted by the circuit 812 for the circuit 811 is lower , possibly considerably lower , than the threshold adjusted by means of circuit 822 for the comparator 821 . the output of comparator 811 is fed to one input of a logic coincidence gate such as an and gate 83 while the output of comparator 821 is fed to a similar and gate 84 . and gate 83 has a second input which can be regarded as an enabling signal or gating - open signal derived from a timing circuit 85 . circuit 85 receives a trigger signal from the circuit 21 being indicative of the beginning of a test cycle and of the launching of a new test pulse by the transmitter 23 . the timing signal provided by circuit 85 to the and gate 83 is an enabling signal of a particular duration which is indicated by reference numeral 15 in fig2 and 4 . it is a timing signal which begins at an instant immediately succeeding the end of the detection period 8 . period 8 covers the portion of the plate stock defined by the front surface through which ultrasonic test pulses are launched and the level representing the minimum plate stock thickness ( level 5 in fig1 ). the period 15 is metered by the circuit 85 for use in the and gate 83 ; it begins when period 8 ends , and ends for example , at an instant measured from the time of triggering ( circuit 21 ) and elapsing after a rear wall echo will occur for a maximum plate stock thickness ( see fig2 ). the period 15 thus covers , in terms of a transit time range equivalent , the variation or differential between minimum and maximum plate thickness . the immediate detection within the interval 8 is provided through a gate 88 receiving a second timing signal from circuit 85 that begins shortly after the trigger pulse 21 or more precisely shortly after the front wall echo ( 7 in fig2 , and 4 ) has decayed and it ends when the period 15 begins . therefore , the and gate 88 is enabled during the period 8 ( being in fact defined by this enabling state ) and gate 88 with pass an output signal from the threshold device 81 which may occur as a result of a defect within the more frontal portion of the plate stock as defined . the gate 83 is enabled after gate 88 is disabled again and will pass subsequently occurring echo signals which , however , can be a rear wall echo or the echo from a defect such as 6 in fig1 . the output of and gate 88 is fed to one input of an or gate 89 whose output is fed to the defect indicator 29 . the output of and gate 83 is processed otherwise . the trigger signal from circuit 21 is used in addition to reset a regular , set - reset type flip flop or latch 87 . any output signal from threshold circuit 81 that passes gate 83 is used to set the flip flop 87 . the output of flip flop 87 , particularly the set state or q signal is used to trigger another timing circuit 86 which provides the supplemental time interval 10 ( see fig2 , and 4 ). the output of 86 is also in the form of a suitable gating signal for the and gate 84 . that particularly timing signal begins shortly after the flip flop 87 has been set by an echo pulse from gate 83 and in order to wait for the completion of that particular echo signal that caused circuit 81 to respond and to pass through the and gate 83 and trigger or set flip flop 87 . the time interval period 10 as provided by the circuit 86 may be of a like duration as the time period 8 or , more appropriately , like the period 15 . this timing and gating signal from circuit 86 is fed to the second input of the and gate 84 whose first input receives the output of the comparator 821 as mentioned above . therefore , the and gate 84 constitutes a second input for the or gate 89 and passes its output on to the circuit 29 as another alternative way of signaling the presence of a defect . the circuit as described operates as follows during a particular test cycle . circuit 21 provides a trigger pulse signal which begins a test cycle and that trigger signal gives rise to the launching of a ultrasonic test pulse by the transducer 23 . in addition that trigger signal resets flip flop 87 and starts the timer 85 . shortly thereafter , the first timing signal is provided through the and gate 88 and the detection period 8 thus begins . if a defect exists in a more frontal portion of the plate stock being tested an echo signal will appear during this period 8 and will pass though and gate 88 and or gate 89 tube registered in 29 . as stated above , the period 8 is selected such that a rear wall echo cannot possibly occur within that detection period because the minimum wall thickness is such that a rear wall echo of the thinest portion still will arise a little after the period 8 has elapsed . now , however , timing circuit 85 provides another enabling signal to the and gate 83 for detecting later occurring echoes during the period 15 . the echo signal that occurs during 15 in the situation depicted in fig2 and 3 is the rear wall echo . the rear wall echo when detected sets the flip flop 87 and the timer 86 begins to run beginning shortly after that rear wall has decayed and the gate 84 is enabled for the period 10 . in the cases of test positions a and b ( fig2 and 3 ) no further pulses occur except a second rear wall echo at some later time , but that is delayed well beyond the expiration of supplemental detection period 10 , therefore , no pulse passes gate 84 and a defect is not indicated . the situation is different in position c the timing being shown in fig4 . again it is assumed that no defect exists in the frontal portion of the material so that the period 8 expires uneventfully . in the now ensuing period 15 during which gate 83 is open an echo from defect 6 appears and passes through gate 83 to set the flip flop 87 , and timing circuit 86 begins to furnish the detection interval 10 after this echo signal has decayed . the rear wall echo 9 will occur at some time thereafter . the rear wall echo 9 may pass also through the gate 83 which will still be open , but flip flop 87 is in the set state so that no further action occurs . the gate 88 is closed when the rear wall echo arrives so that the rear wall echo will not in fact go beyond the circuit 81 - 83 . however , the rear wall echo is also fed to the comparator 821 of the threshold circuit 82 . the threshold level for the comparator 821 may well be selected to be sufficiently high to suppress any other pulses except the relatively large rear wall echo . that output signal from the comparator 821 now passes the and gate 84 and is fed through the or gate 89 to the error detection circuit 29 . the rear wall echo is used here as an indicator for the presence of a defect close to the rear wall of the plate stock to be tested . this way one does in fact detect the presence of defects in the zone which otherwise is excluded from the regular or normal detection carried out through the and gate 88 as described . it is an important feature of the apparatus as described that in the conventional testing equipment the basic components are already included , such as a trigger circuit and the transmitter and launch circuit to operate the transducer , an amplifier for the detected signal as well as gating circuitry for receiving echo signals limited to a particular interval , such as interval period 8 as mentioned above . the inventive system ( i . e ., the realization of the inventive concept ) can be carried out through supplementing circuitry which establishes additional time intervals for purposes of recognizing under certain circumstances the rear wall echo as a defect signal . the invention is not limited to the embodiments described above , but all changes and modifications thereof not constituting departures from the spirit and scope of the invention , are intended to be included .