a boost converter is one dc / dc converter topology commonly used to drive a string of leds . in the prior art , pwm dimming techniques are used that allow controlling the led brightness in a boost converter within reasonably wide limits . referring now to fig1 , one example of a pwm dimming scheme in a prior art led driver of the boost type is shown . the boost converter power train ( hereinafter boost converter ) in the fig1 includes an inductor 103 receiving input power from an input voltage source 101 via a power switch 102 , and delivering power to an output filter capacitor 106 and an led string 107 via a rectifier diode 105 . the brightness control circuit of the boost converter of fig1 includes a pwm switch 108 receiving a brightness control signal from a pwm pulse generator , the pwm switch 108 periodically disconnecting the led string 107 from the output of the boost converter when the output of the pwm pulse generator 100 is low . the brightness control circuit also includes an led current sense element 109 ; an error amplifier 110 having a reference iref and a compensator network 112 ; a hold switch 111 for disconnecting the compensator network 112 from the output of the error amplifier 110 when the output of the pwm pulse generator 100 is low ; a peak current sense element 104 for detecting peak current in the inductor 103 ; a current sense comparator 115 for comparing the output of the current sense element 104 with an error voltage at the compensator network 112 , and for generating a reset signal when the error voltage is exceeded ; a pwm latch turning the power switch 102 on upon receiving a clock signal 117 , and turning the switch 112 off upon receiving the reset signal ; a logic gate 118 for inhibiting the turn on of the switch 102 when the output of the pwm pulse generator 100 is low . the brightness control range of the circuit of fig1 is limited to the minimum on time of the switch 102 needed to maintain the current magnitude in the led string 107 . when the output pulse width of the generator 100 becomes shorter than the on - time of the switch 102 needed for the current sense 104 voltage to reach the error voltage level , the control over the led string current is lost , and the current drops out of regulation . this limit is more restrictive , when the inductor 103 is operated in continuous conduction mode ( ccm ), since a longer time is needed for it to develop its steady - state current . referring now to fig2 , an led driver 130 of the boost type employing a modified pwm dimming control scheme of the present invention is shown . the led driver 200 of fig2 overcomes the above limitation of the minimum dimming duty ratio . the led driver of fig2 includes an inductor 103 receiving input power from an input voltage source 101 via a power switch 102 , and delivering power to an output filter capacitor 106 and an led string 107 via a rectifier diode 105 . like in fig1 , a brightness control circuit 132 of the boost converter 130 of fig2 includes a pwm switch 108 which is coupled to the led string 107 . the pwm switch 108 receives a brightness control signal from a pwm pulse generator 100 . the pwm switch 108 periodically disconnects the led string 107 from the output of the boost converter when the output of the pwm pulse generator 100 is low . the brightness control circuit 202 further includes an led current sense element 109 coupled to the pwm switch 108 . an error amplifier 110 has a first input coupled to the led current sense element 109 . a second input of the error amplifier 110 is coupled to a reference iref . the output of the error amplifier 110 is coupled to a hold switch 111 . the hold switch 111 is used for disconnecting a compensator network 112 from the output of the error amplifier 110 when the output of the pwm pulse generator 100 is low . a peak current sense element 104 is coupled to the power switch 102 . the peak current sense element is used for detecting peak current in the inductor 103 . a current sense comparator 115 has a first input coupled to the peak current sense element 104 and a second input coupled to the compensator network 112 . the current sense comparator 115 is used for comparing the output of the current sense element 104 with an error voltage at the compensator network 112 and for generating a reset signal when the error voltage is exceeded . a pwm latch 116 has a reset input coupled to the output of the current sense comparator 115 and a set input coupled to a clock signal 117 . the pwm latch 116 turns the power switch 102 on upon receiving a clock signal 117 , and turning the switch 112 off upon receiving the reset signal . a logic gate 118 is used for inhibiting the turn on of the switch 102 when the output of the pwm pulse generator 100 is low . in fig2 , a logic block 120 is used for maintaining the power switch 102 in the conductive state until the signal of the current sense element 104 exceeds the error voltage at the compensator network 112 , regardless of the pwm pulse generator 100 state . in accordance with one embodiment , the logic block 120 comprises a logic gate 113 and a d - type flip - flop 114 . the gate 113 has a first input coupled to the output of the current sense comparator 115 and a second input coupled to the pwm pulse generator 100 . the output of the logic gate 113 is coupled to a clock input of the d - type flip - flop 114 . in the embodiment shown in fig2 , the logic gate 113 is an or gate . the d input of the d - type flip - flop 114 is coupled to the pwm pulse generator 100 . the q output of the d - type flip - flop 114 is coupled to a first input of the logic gate 118 . the second input of the logic gate 118 is coupled to the output of the pwm latch 116 . referring now to fig3 , fig3 illustrates operation of the circuit of fig2 . the rising edge of the pwm signal 200 from the generator 100 propagates through the logic gate 113 , and the d - type flip - flop 114 stores a logic - high state . this high output state of the d - type flip - flop 114 enables turn - on of the power switch 102 through the logic gate 118 . the beginning pulse of the clock signal 117 represented by the waveform 217 is synchronized with the rising edge of the pwm signal 200 . at the falling edge of the pwm signal 200 , the switching of the power switch 102 will continue until the current in the inductor 103 represented by the waveform 203 reaches the reference 212 reflecting the error voltage at the compensator 112 . at this moment , the flip - flop 114 receives a signal from the comparator 115 through the logic gate 113 , and the output of the flip - flop 114 stores the logic - low state of the pwm signal generator 100 . therefore , the actual turn - off transition of the boost converter occurs after a delay δt . thus , the circuit depicted in fig2 is able to maintain the current control loop closed even when the pwm dimming signal 200 pulse width is shorter than one switching cycle of the boost converter . fig4 shows the corresponding waveforms similar to the ones of fig3 . upon the rising edge of the signal 200 , the inductor current 203 must reach the reference 212 at least once , before switching of the switch 102 is disabled . the clock signal 117 may be kept running , or it may be stopped after the delay δt , as long as it is synchronized with the rising edge in every cycle of the waveform 200 . referring to fig2 - 4 , a method of operation is disclosed that achieves a wide dimming range in the led driver 140 of the boost type having an inductor 103 and a current control feedback . first , one should synchronize switching of the boost converter with the rising edge of the pwm signal 200 from the generator 100 . next , the state of the current control feedback upon the falling edge of the pwm signal 200 is stored . the led load 107 is disconnected from the output of the boost converter upon the falling edge of the pwm signal 200 . switching of the boost converter is disabled after the falling edge of the pwm signal 200 , but not until the inductor 103 meets a reference corresponding to the stored state of the current control feedback . while embodiments of the disclosure have been described in terms of various specific embodiments , those skilled in the art will recognize that the embodiments of the disclosure can be practiced with modifications within the spirit and scope of the claims .