the invention supports four types of energy management modes for a monitor , such as normal , standby , dpms and off . the technique of the invention is to change the action of the monitor in the dpms mode to reduce the energy consuming . please refer to fig1 of a block diagram of a monitor 10 according to the invention . as shown in fig1 , the monitor 10 includes a connecting interface 101 , a logic gate 102 , a micro - controller 103 , and a signal processor 104 . the connecting interface 101 couples to the logic gate 102 and the signal processor 104 , the micro - controller 103 couples to the logic gate 102 and the signal processor 104 and at least one electric signal will transmit between the coupled devices . in the invention , the micro - controller 103 is used in the dpms mode to replace the signal processor 104 to detect whether there is a signal input to the connecting interface 101 in order to save the energy . fig2 a and 2b show the processes of the monitor 10 in the dpms mode . when a user switches the monitor 10 from a first working mode to a second working mode in the normal mode at the beginning ( step 201 ), the monitor 10 will end the first working mode and then enter the dpms mode ( step 202 ). in the dpms mode , the signal processor 104 will detect the signal source of the second working mode first , where it will detect whether there is a signal input to the connecting interface 101 ( step 203 ). if there is a signal input , the monitor 10 will end the dpms mode and enter the second working mode , and the signal processor 104 will process the image display in the second working mode ( step 204 ). following the step 203 , if there is no signal input , the signal processor 104 will inform the micro - controller 103 to open the signal detecting function to detect the signal input of the connecting interface 101 ( step 205 ), and the signal processor 104 will carry on the turn off procedure to be off and inform the micro - controller 103 to be off too ( step 206 ). following the step 206 , the micro - controller 103 opens the signal detecting function to detect whether the signal source of the second working mode , which is also the connecting interface has a signal input ( step 207 ). the invention uses the logic gate 102 to connect the micro - controller 103 and the connecting interface 101 . the micro - controller 103 will check whether the pin which connects the logic gate 102 to the micro - controller 103 has a potential change to determine whether there is a signal input to the connecting interface 101 ( step 208 ). if there is a potential change , the micro - controller 103 will check whether the frequency of the potential change has reached a predetermined value ( step 209 ). if the frequency of the potential change has reached the predetermined value , the micro - controller 103 will open the signal processor 104 to process the step 203 ( step 210 ). following the step 209 , if the frequency of the potential change does not reach the predetermined value , the step 208 will then proceed . following the step 208 , if there is no potential change , the micro - controller 103 will check whether the pin has no potential change for a predetermined time ( step 211 ). if the pin has no potential change during the predetermined time , the micro - controller 103 will then be in the sleep status and wait the pin has a potential change ( step 212 ). following the step 211 , if the pin has a potential change during the predetermined time , then the step 208 will proceed . according to one preferred embodiment of the invention , the monitor 10 can be a display , such as a liquid crystal television , where its first working mode can be a television mode and its second working mode can be a computer mode . the signal source of the second working mode is the connecting interface 101 , which can be a d - sub port , a digital visual interface ( dvi ), a high - definition multimedia interface ( hdmi ) or a unified display interface ( udi ). using the d - sub port as an example in this embodiment , the signal lines are connected from the tenth , eleventh , thirteenth and fourteenth pins of the d - sub port to the pins of the logic gate 102 and the signal processor 104 , where the tenth and eleventh pins are used for ground connection of the h - sync signal and the v - sync signal respectively , and the thirteenth and fourteenth pins are used for transmitting the h - sync signal and the v - sync signal respectively . in this embodiment , the logic gate 102 connects to the general purpose input / output pin of the micro - controller 103 and outputs the signal to it . if the general purpose input / output pin is low potential enabled , the logic gate 102 can be a nor type logic gate . that is , when there is no signal input to the d - sub port and the thirteenth and fourteenth pin are low potential , the general purpose input / output pin of the micro - controller 103 which connects to the nor type logic gate 102 will be high potential . on the other hand , when there is a signal input to the d - sub port , the thirteenth and fourteenth pins will be high potential and the nor type logic gate will be low potential so the micro - controller 103 will be enabled . when a user switches the monitor 10 from the television mode to the computer mode ( similar to step 201 ) at the beginning , the monitor 10 will end the television mode and then enter the dpms mode ( similar to step 202 ). in the dpms mode , the signal processor 104 will detect whether the d - sub port has an h - sync and a v - sync signal input , that is , whether there is a potential change to the pin which connects the d - sub port to the signal processor 104 ( similar to step 203 ). if the signal processor detects there is an h - sync and a v - sync signal input , the monitor 10 will end the dpms mode and enter the second working mode , and the signal processor 104 will process the image display of the computer mode ( similar to step 204 ). if the signal processor detects there is no signal input , the signal processor 104 will inform the micro - controller 103 to open the signal detecting function to detect the signal input of the d - sub port ( similar to step 205 ). the signal processor 104 will then carry on the turn off procedure to be off and inform the micro - controller 103 to be off too ( similar to step 206 ). the micro - controller 103 will open the signal detecting functions to detect whether the d - sub port has a signal input through the output of the nor type logic gate ( similar to step 207 ). the micro - controller 103 will check whether the pin which connects the nor type logic gate to the micro - controller 103 has a potential change ( similar to step 208 ). if the nor type logic gate outputs a low potential , which means the d - sub port has an h - sync signal and a v - sync signal input , then the micro - controller 103 will check whether the frequency of the potential change has reached a predetermined value ( similar to step 209 ). if the frequency of the potential change has reached the predetermined value , the micro - controller 103 will open the signal processor 104 to process the step 203 ( similar to step 210 ). following the step 209 , if the frequency of the potential change does not reach the predetermined value , the step 208 will then proceed . following the step 208 , if there is no potential change , the micro - controller 103 will check whether the pin has no potential change for a predetermined time ( similar to step 211 ). if the pin has no potential change during the predetermined time , the micro - controller 103 will then switch from the working status to the sleep status and wait for the pin having a potential change ( similar to step 212 ). following the step 211 , if the pin has a potential change during the predetermined time , then the step 208 will proceed . while the preferred embodiments of the invention have been set forth for the purpose of disclosure , modifications of the disclosed embodiments of the invention as well as other embodiments thereof may occur to those skilled in the art . accordingly , the appended claims are intended to cover all embodiments , which do not depart from the spirit and scope of the invention .