building on the advances disclosed in application ser . no . 09 / 604 , 688 ( which is hereby incorporated by reference in its entirety ), the present invention contemplates a “ 2 / 2 solution ” for utilizing drive line / sense line combinations to increase key discrimination capacity ( for a given number of pin connections ). this approach is well suited for implementation in computer keyboards , wherein ( 1 ) functionalities are provided by certain “ special ” simultaneous key press conditions ( e . g ., use of modifier keys ); ( 2 ) inadvertent illegal simultaneous key press conditions are likely to arise ; and ( 3 ) a large number of keys dictates simplicity and efficiency in the layout of the conductive drive line / sense line traces on the membrane switch layers . based on an arrangement of multiple drive line / sense line contact points for each key , the 2 / 2 matrix layout includes : a single drive line that contacts a single sense line in the event of a key press ; and a second drive line , different from the drive line of component 1 , that contacts a second sense line , different from and preferably adjacent to the sense line of component 1 , in the event of a key press . these contacts occur directly under the keycap , preferably for all regular ( non - modifier ) keys . an exemplary organization of a computer keyboard keyswitch matrix employing the 2 / 2 solution is indicated below : 3 . two special drive lines that use a standard ( single ) drive line / sense line pair of contacts for modifier keys . for this arrangement , a total of 14 input / output pins are used on the microprocessor for the switch matrix , allowing the connection of up to 180 non - modifier keys and 12 modifier keys . this is in contrast to a standard single drive / sense line pair arrangement which , using 25 pins , would have a maximum of 156 keys . the matrix is scanned in a conventional manner . ( scanning can occur more quickly , however , since there are only six drive lines instead of the conventional seventeen .) typically , this involves setting each of the drive lines to a logical low level , individually and momentarily , in a sequential manner . at each time that a drive line is driven to a logical low state , the logic levels of the sense lines are inputted to a microprocessor ( which may be keyboard mounted ) via input pins . this inputted data contains a unique pattern . when no keys are pressed , all of the data read into the microprocessor from the sense lines will contain logical highs . when a key is pressed , this will cause a unique pattern of two low bits to be read from the six sense lines by the microprocessor . the bit position of the two logical low signals will correspond with the two drive / sense line pairs contacted by the keys . if there are six drive lines and six sense lines , then there will be six data reads ( one for each drive line ), each containing six bits ( one for each sense line ). the pattern of the two bits that are low in associated registers provide the necessary information to determine which key was pressed . by identifying the low bits , the correct key code can be obtained and then transmitted to the associated computer . identification of the bits read in , i . e ., the scan words , is preferably performed by microprocessor firmware employing a simple look - up . a subtraction algorithm is employed to handle inadvertent multiple key press conditions , e . g ., to distinguish between keys that are just being pressed and keys that are being released . in the subtraction algorithm , the last ( old ) state of the switch circuit matrix is saved and compared with the new ( just read ) state . these states are compared using conventional digital logic to subtract out the relevant information which is needed to detect the keys . the firmware is preferably equipped to handle all states likely to be encountered by the matrix , and to assure that certain combinations of keys ( special simultaneous key press conditions ) can be detected . the 2 / 2 solution is now described in greater detail by way of a specific example , wherein the key switch circuit matrix includes : six regular drive lines ( a , b , c , d , e , f ) connectible in pairs at regular key points to respective pairs of the six sense lines ; and two special drive lines ( g , h ), each connectible to single sense lines at special key points . for drive lines a - f , the contacts effected by a key press are as follows . one drive line is contacted with one sense line , and a second separate drive line is connected with a second , preferably adjacent , sense line . this arrangement is illustrated in fig4 for drive lines a and b . as can be seen , the contact pattern formed on the upper and lower membrane switch layers can be of straightforward design . contacts of drive lines a and b can be overlaid sense lines 1 and 2 . the contact pattern as shown would yield , on depression of an associated key , the key code a1 - b2 . as shown in fig5 drive lines ( provided on a first membrane switch layer ) and sense lines ( provided on a second membrane switch layer ) can be run in parallel pairs and provided with opposed contact pads . designers may use rectangular , semicircular or even interdigitated pads , depending on mechanical and esd requirements . the sense lines are preferably contacted in an adjacent fashion such that none are “ skipped .” thus , the sense line combinations are preferably 1 - 2 , 2 - 3 , 3 - 4 , 4 - 5 and 5 - 6 . this continuity is desirable to achieve simplicity in routing of the conductive traces of the key switch circuit patterns ( drive lines and sense lines ). preferably , all six sense lines are routed in a continuous fashion so that there is no starting or stopping of the conductive traces on the membrane switch layers . ( skipping sense lines in key drive / sense line pair assignments would require starting and stopping the traces , which would substantially complicate the routing of the traces .) in addition , this design rule facilitates effective implementation of a subtraction algorithm ( described below ) for handling inadvertent multiple key press conditions . from the indicated sets , the following five drive line / sense line combinations ( five unique key codes ) are obtained . an additional five codes can be obtained by interchanging the positioning of drive lines a and b . thus , any pair of drive lines can generate the following ten unique key codes : from the set of drive lines ( a - f ), the following fifteen drive line pairs can be generated : since each of these fifteen unique pairs can generate ten key codes , the total possible number of keys that can be generated by this system is 15 × 10 = 150 . the following method may be used to detect ( discriminate ) keys . each of the drive lines ( a - f ) may be signaled low individually in a known sequential manner . after each of these lines reaches a low state , the six sense lines will be read as microprocessor input . for each drive line , six bits of data ( a bit corresponding to each sense line ) will be stored in an appropriate temporary register . once the six drive lines have been signaled , and each of the sense lines has inputted its state , six temporary registers will contain six bits of significant data . for each non - modifier key that is pressed , two bits will be 0 — each occurring in a different register . if a single , non - modifier key is pressed , this will result in the following six reads : two six bit register reads with one 0 and five 1 bits ; and four six bit register reads with six 1 bits . a total of 36 bits of data is read in , collectively referred to as the “ scan word .” so long as only two 0 bits appear in the predetermined sequences , then only one key is pressed and its identity can be uniquely determined by the scan word . if , however , more than two 0 bits are found , a subtraction algorithm ( described below ) is preferably implemented in order to either uniquely determine which keys are pressed or to ( optionally ) signal to the host computer that the state of the matrix is indeterminate . once the key or keys have been uniquely identified , the resulting key code ( s ) is ( are ) then translated to code ( s ) readable by the host computer using a look - up table , and then used to update a buffer for transmission to the host computer . microsoft &# 39 ; s windows hardware quality labs ( whql ) specifications define a set of up to eight modifier keys that , if present , must be are uniquely detectible when depressed in pairs , and when depressed together , individually or in certain pairs , with a key from a set of keys called the valid final keys . whql defines keys as one of three types : modifier keys , valid final keys , and regular keys ( i . e ., keys which are neither modifier keys nor valid final keys ). the valid final keys are a set of keys that must be uniquely detectable while any one modifier key or specific combinations of two modifier keys are concurrently pressed . for example , in the case of ctrl - shift - enter , for example , enter is a final key , and ctrl - shift is an allowed combination of two modifier keys . to allow for discrimination of the eight modifier keys ( depressed with another other modifier key and / or a valid final key ), a separate matrix configuration may be designed as follows . two additional drive lines ( g , h ) may form a single contact point with a single sense line under respective modifier keys . the contact pattern for the modifier keys may thus be of the same type conventionally used in keyboard keyswitch matrices . the drive lines may be connected to each of sense lines 1 - 6 . thus , the following are possible key codes ( only eight of these twelve possibilities are needed to meet whql specification ): fig6 illustrates the above - described matrix layout . this layout allows for any two modifier keys to be detected at one time , and will provide a standard ghosting ( a . k . a . phantom ) signal when three keys are pressed to form an l - shaped conduction pattern . such a ghosting condition does not adversely affect whql functionality , since only two of the special keys are required to be correctly detected at once . with the addition of a third drive line , i , the modifier keys may be arranged , as shown in fig7 so that an indeterminate ghost condition cannot occur . this is an eight key pattern . fig8 shows a nine key pattern which similarly will avoid an indeterminate ghosting condition upon depression of three modifier keys simultaneously . technically , a ghost can occur , but it will always involve one position in the matrix where a switch does not exist , thus permitting the firmware to make a proper identification by elimination . as with drive lines a - f , the two drive lines g , h will be driven low individually and the sense lines will be read for each drive line . the data will be read into temporary registers , as previously described . given the conventional single drive line / sense line pair contacts of the key switch matrix for the modifier keys , the translation to key scan code involves a simple look - up in a table to find the key corresponding to the bits contained in the temporary registers . a ghost detection check can be implemented here to avoid errors caused by inadvertent simultaneous depression of three modifier keys . an example ( only eight of twelve possible bits needed for whql compliance ): the routing of the conductive traces for the modifier keys may follow conventional methods and can be implemented accordingly . with regard to the regular keyswitch matrix , the six sense lines on the bottom ( or top ) membrane switch layer can advantageously be routed as substantially parallel adjacent lines extending in a serpentine manner across the associated membrane switch layer . the drive line trace routings can also be made fairly simple . for the case where six sense lines are provided , adjacent drive lines can be paired off to create respective groups of ten keys . if this group of keys is selected such that the keys within a group are normally depressed by a given finger , it is less likely that 2 - key combinations involving common drive lines will arise . another advantage of this layout relates to ghost key rejection . as will be described , with the subtraction algorithm of the present invention , it may be possible to have a “ best guess ” when more than one non - modifier key is pressed , based on whether or not one of two candidates is usually typed by the same finger as is the known key . in this respect , if it is known that all keys shared by a given finger share the same drive lines , it is a simple matter for firmware to determine if two keys share a finger , and to deduce that it is not likely that those two keys are pressed at the same time . fig9 illustrates the key layout of a standard 104 key keyboard . exemplary key switch circuit pattern layouts for the drive lines and sense lines ( upper and lower membrane switch layers ) generally applicable to the key layout of fig9 are shown , respectively , in fig1 and 11 . the illustrated circuit pattern layouts are diagrammatic . an actual production layout would likely differ in respects that one of ordinary skill in the art will readily appreciate , e . g ., taking into account spatial considerations such as the actual positions of the keys , line widths and drawing rules for manufacturing , and the inclusion of “ keep - out ” areas for physical case supports , screw holes , etc . fig1 shows traces for drive lines a - i that may be placed on the upper ( or lower ) layer of the membrane switch structure . drive lines a - i are laid out in adjacent interdigitated pairs , to obtain the scan word pattern desired for regular key drive lines a - f . drive lines g - i , for the modifier keys , are laid out individually . advantageously , the artwork for the drive line layout of fig1 may be generated with only two symbols which can be easily entered into a symbol library and then copied to the various key locations . fig1 a shows , close - up , the symbol used for the regular ( non - modifier ) keys . fig1 b shows , close - up , the symbol used for the modifier keys . the layout of fig1 shows traces for sense lines 1 - 5 that may be formed on the lower ( or upper ) layer of the membrane switch structure . these trace lines are snaked across the substrate sheet in a serpentine manner to provide complete coverage of the keyboard . advantageously , with the illustrated layout , all five sense lines are available at any key location . such a layout is robust and especially helpful in selecting key codes that minimize ghosting . the artwork of the sense line layer shown in fig1 may be formed with a total of six different symbols . for the non - modifier keys , three symbols , shown respectively in fig1 a - 11c , may be used , rotated as necessary . for the modifier keys , three symbols as shown respectively in fig1 d - 11f may be used , rotated as necessary . exemplary key code tables , corresponding to the circuit layouts shown in fig1 - 11 , appear below in tables 1 and 2 . table 1 shows how each adjacent pairing of drive lines a - f provides , with sense lines 1 - 6 , a group of 10 regular keys . table 2 shows a group of eight exemplary modifier keys provided by a standard matrix of sense lines 1 - 6 with additional drive lines g - i . fig1 shows , in principle , how the conductive tracings of a pair of interdigitated drive lines a , b ( e . g ., as shown in fig1 ) may be overlayed with sense six lines ( 1 - 6 ) laid out in a serpentine manner ( e . g ., as shown in fig1 ) to create contact patterns of the drive lines and sense lines permitting discrimination of ten keys . it can be seen that a key can be discriminated for every combination of two drive lines contacting two respective sense lines ( a “ 2 / 2 ” pattern ). with a total of six sense lines , ten keys can be discriminated for each pair of drive lines that is provided . in accordance with the 2 / 2 solution , key discrimination can be carried out notwithstanding certain inadvertent ( unintentional ) simultaneous key press conditions , through use of subtraction algorithm techniques as described below . the principle of the inventive subtraction technique arises from the inventors &# 39 ; recognition that two pressed keys will form a pattern that can be deciphered if the key code for the “ first key ” pressed is known . by taking the unknown two key state and subtracting the initial one key state , the key code for the second key can be obtained . subtraction is then , basically , the process of reading in a new status of the keyboard and comparing it to an old status to detect any new key presses or releases . in general , the subtraction algorithm should ( 1 ) be able to detect any likely combination of two keys pressed , given the history of the system ; and ( 2 ) be able to determine when it cannot perform function ( 1 ) and return that the system is indeterminate . the algorithm may return ambiguous results if more than two keys are pressed . if more than one key is pressed , then more than 2 bits in the scan word will be 0 . the effective value of the scan word will be the logical and of the scan words representing the individual keys . for example , if a1c2 and b2f3 are both pressed then the scan word will appear as : in this example , four bits are 0 : a1 , b2 , c2 and f3 . the scan word could alternatively be expressed as a1b2c2f3 . if more than four bits are 0 , then more than two keys are pressed , and the subtraction algorithm can reject this condition as indeterminate even though specific cases may actually be determinate . therefore , the subtraction algorithm may consider only those scan words with three or four 0 bits , as less than three are determinate , and more than four are indeterminate . furthermore , the subtraction algorithm need only consider permutations of exactly two keys that might cause those three - or four - 0 - bit scan words as it is not required to correctly determine combinations of more than two keys . one simplifying assumption is that , if the scan word contains more than two bits , and the previous scan word was determinate , then a key in the previous scan word , if any , is still pressed , rather than the alternative that it was released and two different keys pressed . another simplifying assumption is that the designer followed the recommendation that sense lines be logically adjacent in any given key . if the subtraction algorithm succeeds , it will return two keys pressed . if those keys are illegal , for example , if a key does not have adjacent sense lines , then subsequent conversion to a ps2 scan code or a usb usage will fail and the system can be called indeterminate at that point . if three 0 bits appear in the scan word , then the two keys are sharing the sense line / drive line pair that contains the sense line that is adjacent the other two sense lines . the system is determinate because each key shares a drive line / sense line pair 0 bit , and the drive line / sense line pairs represented by the other two 0 bits are not shared . an example of three 0 bits not sharing a drive line is a1 , b2 , c3 . in this case the only allowed permutation is : an example of three 0 bits sharing a drive line is a1 , b2 , a3 . in this case , the only allowed permutation is : determination of two - key combinations wherein four 0 bits appear in the scan word depends upon how many sense lines and drive lines are shared by those two keys . any two keys may share zero , one or two adjacent sense lines and / or may share zero , one or two drive lines . if the previous state of the system was determinate , then zero , one or two keys were pressed previously . with four 0 bits down , the subtraction algorithm should first attempt to or in , separately , each of the previously pressed keys , if any . if the result of the or operation with each of those keys contains a valid 2 - bit scan word , then , according to one of the simplifying assumptions above , firmware can deduce that the new key represented by those two bits is being pressed along with the previously pressed key whose or operation isolated those two 0 bits . if no previously pressed key produces a valid two - 0 - bit scan word when the or operation is performed , then the following cases come into play . in this case , the system is determinate , as the key with the lowest numbered sense line must have as its other 0 bit the drive line / sense line pair having next highest sense line , leaving the other two 0 bits as the second key &# 39 ; s bits . four 0 bits with one sense line shared between three drive lines if the four 0 bits share one sense line between three drive lines , then one drive line / sense line pair is shared among three switches and the system is determinate . for example , the scan word a1b1c1d2 is produced by a1 - d2 + b1 - d2 + c1 - d2 . however , the algorithm is allowed to return an indeterminate result since more than three keys are pressed . if desired , the firmware may be designed to properly report and track this condition . four 0 bits with one or two sense lines shared between two drive lines if the four 0 bits share one or two sense lines between two drive lines , then the system is indeterminate . for example , if four 0 bits are in the scan word and an or operation with any previously pressed key isolates a valid two - 0 - bit scan word , then the new state of the system contains the previously pressed key and the new key produced by the or operation . if the or operation with each previously - pressed key fails to isolate a valid two - 0 - bit scan word , and the scan word is sharing neither sense lines nor drive lines , then the two keys are determined by pairing the two 0 bits having the lowest sense line numbers together in a key , and the remaining 0 bits together for the other key . all other cases of four 0 bits in the scan word are indeterminate . there are several general cases that can be handled by a subtraction algorithm in accordance with the invention . when a new key is pressed , the subtraction algorithm must identify which bits have changed since the last sample . when these bits are identified , they can be translated into the corresponding key code for the event which occurred between the samples . the comparison is carried out by first xoring the old and new states of the keyboard . the result of the xor is then anded with the old state of the keyboard . the result of this and determines the next step . if there are exactly two “ 1 ” bits in the result , then the most likely event is that a key shares no signals with the old key and can be directly translated to the corresponding key code , and the appropriate “ make ” signals can be sent . if only one bit is set , then the algorithm must proceed to the case 3 handler ( see below ) that will be used to determine the key code for the make signal . if no bits are set , then no new keys have been pressed . if more than two bits are set , then more than one key has been pressed and / or bridging has occurred , and the keyboard will transition to a ghost state . key β — c3 - d4 is just being pressed ( while key α remains down ). the result can be used to discriminate c3 - d4 ( the β key ). key β — b1 - c2 is just being pressed ( while α key remains down ). the result is a2 - b1 - c1 - c2 , which does not properly translate into a key . since there are more than two bits set , discrimination processing should transition to the ghost state . when a key is released , the subtraction algorithm should identify which bits have gone from the low to the high state . this bit identification is obtained by comparing the old and new states of the keyboard to see which bits have changed in value . the comparison is carried out by first xoring the old and new states of the keyboard . the result of the xor is then anded with the new state of the keyboard . the result of this and determines the next step . if there are two high bits set in the result , then the result can be directly translated to the corresponding key code and the appropriate “ break ” signals can be sent . if only one bit is set , then the algorithm must proceed to the case 3 handler ( see below ) to determine the key code that will be used in the break signal . if no bits are set , then no keys have been released . if more than two bits are set , then more than one key has been released and the keyboard should transition to the ghost state . the result can be used to discriminate c3 - d4 ( the β key ). the result is a1 - b2 - c3 - d4 , which does not properly translate to a key . since there are more than two bits set , the keyboard would transition to the ghost state . however , since the keyboard knows which keys were down , and now knows that no keys are down , it can send break codes for the two keys that were down . case 3 : a key is pressed or released and shares an identification bit with another key that is already pressed . when a key is pressed and it shares an identification bit with a key that is already pressed , then the comparison done in cases 1 and 2 is not sufficient to identify which key was most recently pressed . here the algorithm will do one of two things : 2 . determine that the shared bit cannot be identified and go to the ghost state . in accordance with the invention , an attempt is made to find the bit paired to an already known single bit , so that a correct key code can be determined . if the matrix is set up such that all key patterns use adjacent sense lines ( as has been described ), it may be possible to determine if the unknown bit is being used by another key . when a first key is pressed , then a the second key is pressed having a switch sharing a bit with the switch of the first key , exactly one new 0 bit will appear , and it will be on a sense line adjacent to only one of the previous 0 bits . a mask is used to identify which bit of the previous code is on a sense line adjacent to the new bit , and thus identify the shared line , and then deduce the entire code for the new key . the first step in this process is to create a mask signal . the mask signal is a data set containing 1 &# 39 ; s in the possible locations of the matching bit . the “ 1 ” bits in the mask occur to the left and to the right of the single known bit . this mask is then anded with the complement of the new state register . the result of this operation should result in a single bit , which when paired with the single known bit can be translated into the correct key code . these bits are put together with an or . if the result of the and of the mask and the complemented new registers contains more than 1 bit high , then there is more than one potential match to the single known bit , and it is impossible to tell which of these multiple bits is the correct matching bit . accordingly , the algorithm should transition to the ghost state . the result is b2 - c3 , which is the correct code for the β key . note that the mask was used to identify bit 2 and bit 4 as possible matches , which resulted in b2 as the correct second bit . case 4 : illegal “ bridged ” state . the algorithm should identify that an invalid state has been reached and transition to the ghost state . a bridge condition occurs when a drive line is connecting two sense lines and another drive line attempts to use one of those sense lines . the signal from the second drive line will use the first drive line as a bridge and incorrectly pass the signal to both sense lines . this will prevent the correct translation of the keys that are pressed . this situation is handled in either case 1 or case 2 . if bridging occurs , then more than two bits will be set after the xor and the and steps . as specified above , if more than two bits are set then the algorithm may go into the ghost condition . the exit condition of the ghost state can be determined by examining the new state of the keyboard . condition # 1 — if the new state contains 0 low bits , then the keyboard has no keys pressed . condition # 2 — if the new state has 2 bits set , then there is a single detectible key pressed . the keyboard can correctly detect these conditions once the old state is set to all 1 &# 39 ; s . therefore , once a ghost state is entered the old registers are automatically set to all 1 &# 39 ; s . thus , if the old state is the ghost state and the number of low bits in the new state is 0 or 2 , then the keyboard can correctly perform key detection and continue normal operation . what follows is a text description of an exemplary routine for executing a subtraction algorithm in accordance with the invention : key scanning is performed and the data is saved into new status registers . 1 . if a ghost condition exists , then a check is performed to see if the ghost condition has been exited . if yes , the ghost condition flag is cleared and control proceeds to step 2 . if the condition is not cleared , then the check maintains the ghost condition and skips the rest of the routine ( go to step 7 ). 2 . a check is done to see if a new key has been pressed . ( performing this check prior to the release check ( step 3 ) allows for a hidden key which was pressed to get a make code , before one of the keys that was hiding it gets a break code .) a . if more than two bits are set , then the ghost condition flag is set ( step 6 ) unless the new state indicates no keys are pressed . if this is the case , appropriate key codes are formed , the keys are removed from the key_buffer , and the key bits are ored into a new register . control then skips to step 4 . b . if no bits are set , then no new key has been pressed , and control proceeds to step 3 . c . if two bits are set , then a single valid key press has been obtained . a key code is formed the key is and put into key_buffer . control then proceeds to step 3 . d . if one bit is set , then a mask ( as previously described ) is used to try to find the matching second bit . i . if successful , a key code is retrieved and added to the buffer . control then process to step 3 . 3 . a check is done to see if a key has been released . a . if more than two bits are set , then the ghost condition flag is set ( step 6 ) unless the new state indicates no keys are pressed . if this is the case , appropriate key codes are formed , the keys are removed from the key_buffer , and the key bits are ored into a new register . control then skips to step 4 . b . if no bits are set , then no key was released and the algorithm skips to changing the new state to old ( step 4 ). c . if two bits are set , then a single valid key release has been obtained . a key code is formed , the key is removed from key_buffer and the key bits are ored into a new register . control then skips to step 4 . d . if one bit is set , then a mask used to try to find the matching second bit . i . if successful , a key code is obtained and removed from the buffer . the key bit is ored into the new registers , and control proceeds to step 4 . ii . if unsuccessful , a ghost condition is set and control skips to step 6 . 4 . once the routine reaches this point , the pressed and released keys have been successfully calculated , and their status updated . 5 . now the new_reg registers are saved into the old_reg registers , since the new status will become the old status for the next key_scan . go to step 7 . 6 . the ghost flag bit is set and all 1 &# 39 ; s are saved into the old_reg registers . when a subtraction algorithm is implemented in accordance with the invention , the matrix can make a proper key discrimination even under illegal simultaneous key press conditions ( two keys , or more than two keys in some cases ). if cases arise that prevent proper key detection , then the algorithm will go into the ghost state until a known state of one or no keys pressed is reached . cases that may give rise to error states are described below . generally , the algorithm will be able to properly detect a maximum of one key change up and one key change down for every new key scan . this is because of the xor step in the process . the purpose of the xor is to isolate which two bits have changed and update the corresponding key status . if more than two bits change , it is impossible to isolate which bits correspond to which key action from the perspective of the microprocessor . the subtraction algorithm will be unable to detect proper key presses if one drive line is contacting two sense lines , and a separate drive line is contacting one of those two sense lines . this occurs because the drive line contacting two sense lines acts as a bridge between these sense lines . another drive line attempting to signal on either of these lines will inadvertently ( and incorrectly ) have its signal branch to both sense lines . an example of this failure is illustrated in fig1 . in the illustrated case , drive b is connected to sense 1 and sense 2 . this forms a signal bridge between the two sense lines and prevents the other signals on the lines from propagating correctly . notice that the signal from drive a is passed across this bridge from sense 1 to sense 2 . similarly , the signal from drive c is bridged from sense 2 to sense 1 . when the actual key scan is performed , the following signal will be read in : note that there is an extra low in a2 and c1 , where the incorrect signal crossed the bridge . “ hidden ” keys will not be properly detected under certain conditions . for example , say : if both key α and key β are pressed , then it will not be possible to detect if key γ is pressed . this is because the signal bits for key γ , a2 and b3 , are already used by other pressed keys . this is a more complex version of the bridging condition described above . in general , such three key combinations not involving a modifier key are rare . in this case , both identification bits are already in use . this can be handled by ignoring key γ , until either the key α or key β are released . the above example is depicted in fig1 . if key α and key β are pressed , then the following identification bits are being used : a2 , b1 , b3 , c2 . the bits are already low in the current state . when key γ is pressed , it attempts to drive a2 and b3 low . this is impossible since they are already forced low by the α and β other keys . therefore , key γ will be ignored since its identification bits are already being used . in the above example , when α and β are pressed , γ is hidden “ behind ” those keys . when β is released , bit d4 will change to high while bit c3 will remain low . in this case , there will be no bit changing from high to low , and therefore nothing to trigger the xor to make it see γ as a key that is being pressed down . therefore , when the β key is released , its two bits c3 - d4 should be saved as high in the old register . thus , when the next new read is done , c3 will be seen as going from the high to low state and thus be able to detect γ . when a key is released , its two identification bits should be ored into the upcoming old state . this allows keys which are hidden to be detected as if they are being pressed in the next key scan . if this operation is not performed , then the identification bits ( c3 ) would not be detected by the xor . by oring in the released key , the hidden key is given the opportunity to cause a bit change in the xor as though it had been just pressed . there is no change in functionality arising from a switch of sense and drive lines . in the exemplary embodiment , since there are six of each , the result is six reads of six bits of data , i . e ., a 36 - bit string either way . the number of sense lines and drive lines can be increased or decreased in accordance with the required number of keys . for example , the addition of a seventh sense line would increase the number of key combinations to twelve ( from ten ) for any pair of drive lines , thus increasing the number of detectible keys for six drive lines ( a - f ), from 150 to 180 keys , at the expense of an increase of one in the pin count . addition of a seventh sense line would also allow the advantages of the three - drive - line modifier key matrix but with only two drive lines , since the single key on drive line i would be moved to the new sense line . another way to increase the number of keys per pair of drive lines is to add an additional trace of an existing sense line , e . g ., sense 1 , as shown in fig1 . this would mean , e . g ., extending the sense 1 trace next to the sense 6 trace . this would then allow each drive line to have a 1 and 6 contact pattern , for example , a1 - b6 . this would allow sense 1 to form two contact patterns ( 1 - 6 and 1 - 2 ), instead of just one ( 1 - 2 ). in turn , this would allow each pair of drive lines to detect twelve keys instead of ten , and increase the overall detectible number of non - modifier keys ( for six drive lines ) to 180 ( 15 drive line pairings × 12 keys per drive line pair ). the twelve contacts could be arranged as shown in fig1 . with twelve keys now detectible by a pair of sense lines , it may be possible to drop a drive line ( e . g ., go from six drive lines to five ) and still have sufficient key discrimination capacity for a typical computer keyboard application . five drive lines can create ten distinct pairs of drive lines ( ab , ac , bc , ad , bd , cd , ae , be , ce , de ). these ten pairs of drive lines could detect 120 keys . if two more drive lines are added to discriminate twelve special keys , a total of 132 keys can be detected using seven drive lines and six sense lines . this is an overall pin count of thirteen , which can detect all possible 131 keys of , e . g ., the microsoft internet keyboard pro or natural keyboard pro keyboards , and also meet whql standards . a drawback of the above - described reduced drive line option is that it may cause a lessened impact of the subtraction algorithm , because of the smaller number of diverse key contacts . essentially , there would be more overlap of key codes and therefore the previously described subtraction algorithm would improve functionality to a lesser degree . the above - described exemplary implementation of the 2 / 2 solution includes a matrix that uses a total of fourteen pins . typically , there may be sixteen pins available that can be used indirectly to improve key discrimination . if a larger matrix is provided to support the same number of keys , some points in the matrix will be empty . knowing this , the firmware can then logically eliminate “ ghosts ” that include an empty spot . as previously explained , a ghost occurs when three of four switches that form the comers of a rectangle in the matrix are closed . if one of those switches does not exist , then firmware can deduce that the other three switches are down and report them properly . thus , if 130 keys are to be supported and a matrix that supports 180 keys is provided , then there are fifty ghost combinations that can be eliminated by firmware . the 2 / 2 solution can be implemented to whql standards . as explained above , those standards require that a set of special keys ( used in two key and three key combinations ) must be detectible individually and in pairs . more specifically , whql requires that any one of the keys be detectable with any one key from a table of valid final keys for two key combinations , and that certain combinations of two of the modifier keys be detectable when pressed together with any one key from the valid final keys . since all of the valid final keys can be made to fall along drive lines a - f , any one of these keys can be detected independently of the status of the special keys . similarly , any one of the special keys , and any pair of the special keys , can be detected as long as no more than one key from the a - f matrix is pressed . the present invention has been described in terms of preferred and exemplary embodiments thereof . numerous other embodiments , modifications and variations within the scope and spirit of the appended claims will occur to persons of ordinary skill in the art from a review of this disclosure .