a preferred embodiment of the present invention and its advantages are better understood by referring to the figures , like numerals being used for like and corresponding parts of the accompanying figures . the invention is preferably realized using a well - known computing platform , such as an ibm rs / 6000 server running the ibm aix operating system . however , it may be realized in other popular computer system platforms , such as an ibm personal computer running the microsoft windows operating system or a sun microsystems workstation running operating systems such as unix or linux , without departing from the spirit and scope of the invention . with reference now to the figures , fig1 depicts a pictorial representation of a network of data processing systems in which the present invention may be implemented . network data processing system 100 is a network of computers in which the present invention may be implemented . network data processing system 100 contains a network 102 , which is the medium used to provide communications links between various devices and computers connected together within network data processing system 100 . network 102 may include connections , such as wire , wireless communication links , or fiber optic cables . in the depicted example , a server 104 is connected to network 102 along with storage unit 106 . in addition , clients 108 , 110 , and 112 also are connected to network 102 . these clients 108 , 110 , and 112 may be , for example , personal computers or network computers . in the depicted example , server 104 provides data , such as boot files , operating system images , and applications to clients 108 - 112 . clients 108 , 110 , and 112 are clients to server 104 . network data processing system 100 may include additional servers , clients , and other devices not shown . in the depicted example , network data processing system 100 is the internet with network 102 representing a worldwide collection of networks and gateways that use the tcp / ip suite of protocols to communicate with one another . at the heart of the internet is a backbone of high - speed data communication lines between major nodes or host computers , consisting of thousands of commercial , government , educational and other computer systems that route data and messages . of course , network data processing system 100 also may be implemented as a number of different types of networks , such as for example , an intranet , a local area network ( lan ), or a wide area network ( wan ). fig1 is intended as an example , and not as an architectural limitation for the present invention . referring to fig2 a block diagram of a data processing system that may be implemented as a server , such as server 104 in fig1 is depicted in accordance with a preferred embodiment of the present invention . data processing system 200 may be a symmetric multiprocessor ( smp ) system including a plurality of processors 202 and 204 connected to system bus 206 . alternatively , a single processor system may be employed . also connected to system bus 206 is memory controller / cache 208 , which provides an interface to local memory 209 . i / o bus bridge 210 is connected to system bus 206 and provides an interface to i / o bus 212 . memory controller / cache 208 and i / o bus bridge 210 may be integrated as depicted . memory controller / cache 208 includes a protocol control block ( pcb ) cache 208 a . pcb cache 208 a is used to stored pcbs . typically , pcbs will be prioritized . the highest priority pcbs will then be stored in pcb cache 208 a . a network option may be used to set the size of pcb cache 208 a . alternatively , the pcb cache may be stored within each processor . the pcb cache is small and contains the most frequently accessed pcbs . peripheral component interconnect ( pci ) bus bridge 214 connected to i / o bus 212 provides an interface to pci local bus 216 . a number of modems may be connected to pci bus 216 . typical pci bus implementations will support four pci expansion slots or add - in connectors . communications links to network computers 108 - 112 in fig1 may be provided through modem 218 and network adapter 220 connected to pci local bus 216 through add - in boards . additional pci bus bridges 222 and 224 provide interfaces for additional pci buses 226 and 228 , from which additional modems or network adapters may be supported . in this manner , data processing system 200 allows connections to multiple network computers . a memory - mapped graphics adapter 230 and hard disk 232 may also be connected to i / o bus 212 as depicted , either directly or indirectly . those of ordinary skill in the art will appreciate that the hardware depicted in fig2 may vary . for example , other peripheral devices , such as optical disk drives and the like , also may be used in addition to or in place of the hardware depicted . the depicted example is not meant to imply architectural limitations with respect to the present invention . the data processing system depicted in fig2 may be , for example , an ibm risc / system 6000 system , a product of international business machines corporation in armonk , n . y ., running the advanced interactive executive ( aix ) operating system . with reference now to fig3 a block diagram illustrating a data processing system is depicted in which the present invention may be implemented . data processing system 300 is an example of a client computer . data processing system 300 employs a peripheral component interconnect ( pci ) local bus architecture . although the depicted example employs a pci bus , other bus architectures such as accelerated graphics port ( agp ) and industry standard architecture ( isa ) may be used . processor 302 and main memory 304 are connected to pci local bus 306 through pci bridge 308 . pci bridge 308 also may include an integrated memory controller and cache memory for processor 302 . additional connections to pci local bus 306 may be made through direct component interconnection or through add - in boards . in the depicted example , local area network ( lan ) adapter 310 , scsi host bus adapter 312 , and expansion bus interface 314 are connected to pci local bus 306 by direct component connection . in contrast , audio adapter 316 , graphics adapter 318 , and audio / video adapter 319 are connected to pci local bus 306 by add - in boards inserted into expansion slots . expansion bus interface 314 provides a connection for a keyboard and mouse adapter 320 , modem 322 , and additional memory 324 . small computer system interface ( scsi ) host bus adapter 312 provides a connection for hard disk drive 326 , tape drive 328 , and cd - rom drive 330 . typical pci local bus implementations will support three or four pci expansion slots or add - in connectors . an operating system runs on processor 302 and is used to coordinate and provide control of various components within data processing system 300 in fig3 . the operating system may be a commercially available operating system , such as windows 2000 , which is available from microsoft corporation . an object oriented programming system such as java may run in conjunction with the operating system and provide calls to the operating system from java programs or applications executing on data processing system 300 . “ java ” is a trademark of sun microsystems , inc . instructions for the operating system , the object - oriented operating system , and applications or programs are located on storage devices , such as hard disk drive 326 , and may be loaded into main memory 304 for execution by processor 302 . those of ordinary skill in the art will appreciate that the hardware in fig3 may vary depending on the implementation . other internal hardware or peripheral devices , such as flash rom ( or equivalent nonvolatile memory ) or optical disk drives and the like , may be used in addition to or in place of the hardware depicted in fig3 . also , the processes of the present invention may be applied to a multiprocessor data processing system . as another example , data processing system 300 may be a stand - alone system configured to be bootable without relying on some type of network communication interface , whether or not data processing system 300 comprises some type of network communication interface . as a further example , data processing system 300 may be a personal digital assistant ( pda ) device , which is configured with rom and / or flash rom in order to provide non - volatile memory for storing operating system files and / or user - generated data . the depicted example in fig3 and above - described examples are not meant to imply architectural limitations . for example , data processing system 300 also may be a notebook computer or hand held computer in addition to taking the form of a pda . data processing system 300 also may be a kiosk or a web appliance . fig4 is a high level flow chart which depicts a storage of protocol control blocks ( pcbs ) in a pcb cache in accordance with the present invention . the process starts as depicted by block 400 and thereafter passes to block 402 which illustrates establishing a connection and creating a socket for the connection . a protocol control block ( pcb ) is also created which is associated with this socket . next , block 404 depicts a determination of whether or not this is a high priority connection . if a determination is made that this is not a high priority connection , the process passes to block 406 which illustrates storing the pcb associated with this socket in a hash table . thereafter , the process terminates as depicted by block 408 . referring again to block 404 , if a determination is made that this is a high priority connection , the process passes to block 410 which illustrates setting an option in this socket to indicate its high priority . one of a range of priorities may be specified . next , block 412 depicts a determination of whether or not there is any empty space in pcb cache 208 a . if a determination is made that there is empty space in pcb cache 208 a , the process passes to block 414 which depicts a storage of the pcb associated with this socket in pcb cache 208 a . the process then terminates as illustrated by block 408 . referring again to block 412 , if a determination is made that there is no empty space in pcb cache 208 a , the process passes to block 416 which depicts an identification of the lowest priority pcb currently stored in pcb cache 208 a . next , block 418 illustrates a removal of the lowest priority pcb from pcb cache 208 a , and the storage of this lowest priority pcb in the hash table . the process then passes to block 414 . fig5 is a high level flow chart which illustrates a retrieval of protocol control blocks ( pcbs ) from a pcb cache in accordance with the present invention . the process starts as depicted by block 500 and thereafter passes to block 502 which illustrates a receipt of a packet . next , block 504 depicts using the source and destination addresses , and the local and destination port numbers obtained from the packet to identify a particular pcb associated with the connection through which this packet was transmitted . thereafter , block 508 depicts searching the pcb table for this pcb . next , block 510 illustrates a determination of whether or not the pcb was found in pcb cache 208 a . if a determination is made that the pcb was found in pcb cache 208 a , the process passes to block 512 which depicts getting this pcb from pcb cache 208 a . next , block 513 depicts using this pcb to locate the appropriate socket which is associated with this connection . this socket is then used to do connection processing . block 514 , then , illustrates using the pcb to determine the destination entity which is to receive the data . the data is delivered and the appropriate processing is performed . the process then terminates as depicted by block 524 . referring again to block 510 , if a determination is made that the pcb was not found in pcb cache 208 a , the process passes to block 516 which illustrates searching the pcb hash table to locate the pcb and executing connection processing . thereafter , block 517 depicts using this pcb to locate the appropriate socket which is associated with this connection . next , block 518 depicts a determination of whether or not this particular pcb has been accessed frequently . a software counter could be included for each pcb to maintain a current number of times a particular pcb has been accessed . a particular number of accesses could also be specified . if a particular pcb has been accessed more than the specified number of accesses , the pcb could be considered to be accessed frequently . if a determination is made that this particular pcb has not been accessed frequently , the process terminates as illustrated by block 524 . referring again to block 518 , if a determination is made that a particular pcb has been accessed frequently , the process passes to block 520 which illustrates a determination of whether or not there is any unused space in pcb cache 208 a . if a determination is made that there is unused space in pcb cache 208 a , the process passes to block 522 which depicts copying the pcb associated with this socket from the hash table into pcb cache 208 a . the process then terminates as illustrated by block 524 . referring again to block 520 , if a determination is made that there is no unused space in pcb cache 208 a , the process passes to block 526 which illustrates the identification of the lowest priority pcb stored in pcb cache 208 a . next , block 528 depicts the removal of the lowest priority pcb from pcb cache 208 a and the storage of this lowest priority pcb into the hash table . the process then passes to block 522 . it is important to note that while the present invention has been described in the context of a fully functioning data processing system , those of ordinary skill in the art will appreciate that the processes of the present invention are capable of being distributed in the form of a computer readable medium of instructions and a variety of forms and that the present invention applies equally regardless of the particular type of signal bearing media actually used to carry out the distribution . examples of computer readable media include recordable - type media such a floppy disc , a hard disk drive , a ram , and cd - roms and transmission - type media such as digital and analog communications links . the description of the present invention has been presented for purposes of illustration and description , but is not intended to be exhaustive or limited to the invention in the form disclosed . many modifications and variations will be apparent to those of ordinary skill in the art . the embodiment was chosen and described in order to best explain the principles of the invention , the practical application , and to enable others of ordinary skill in the art to understand the invention for various embodiments with various modifications as are suited to the particular use contemplated .