reference now will be made in detail to the presently preferred embodiments of the invention , one or more examples of which are illustrated in the accompanying drawings . each example is provided by way of explanation of the invention , which is not restricted to the specifics of the examples . in fact , it will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the scope or spirit of the invention . for instance , features illustrated or described as part of one embodiment , can be used on another embodiment to yield a still further embodiment . thus , it is intended that the present invention cover such modifications and variations as come within the scope of the appended claims and their equivalents . the same numerals are assigned to the same components throughout the drawings and description . referring to fig2 , a variable capacitance circuit arrangement 100 has a variable capacitance formed by three varactors 110 , 112 , 114 which are connected in parallel . the varactors 110 , 112 , 114 are each connected at one of their electrodes to a respective dc offset voltage source v 1 , v 2 , v 3 and , at the other electrode , to a common control input 116 for supplying a control voltage v control via a series impedance 118 . in this embodiment each of the offset voltage sources v 1 , v 2 , v 3 is connected in series between the anode of the respective varactor and one of the supply rails of the arrangement , in this case to ground , the varactors cathodes being coupled to the control input . the dc offset voltage sources v 1 , v 2 , v 3 each have a different offset voltage level such that each of the varactors 110 , 112 , 114 contributes to the variation in overall capacitance only when the difference between the control and the respective offset bias falls within the voltage range ( in terms of the voltage across the varactor ) over which the varactor exhibits a variation in capacitance . in this embodiment , the different offset voltages v 1 , v 2 , and v 3 are such that v 1 is smaller than v 2 which is , in turn , smaller than v 3 . therefore , assuming that the individual characteristics of the varactors are similar , if the control voltage is raised progressively from the lower limit of its range to its upper limit , the operation of the circuit 100 will sequentially bring the first varactor 110 into the variable part of its characteristic , followed by the second varactor 112 , and finally the third varactor 114 . the different offset voltage levels may be achieved by a number of different arrangements , as would be known by a person of ordinary skill in the art . these arrangements can include the use of a voltage divider circuit , zener diodes , individual dc power sources and the like . the characteristics of the varactors 110 , 112 , 114 are selected such that the sum of their maximum respective capacitances is equal to the required total maximum capacitance of the circuit arrangement 100 . in addition , the varactor characteristics are selected such that the sum of the maximum ranges of variation in capacitance of the varactors is equal to the required total variation in capacitance of the circuit arrangement 100 . if a substantially linear variation of the overall , capacitance with control voltage is required , the varactors are selected so as to have the same or generally similar characteristics , at least insofar as they have at least approximately equal capacitance ranges and capacitance - versus - voltage slopes . if the overall capacitance is to follow an approximate square law characteristic with respect to voltage , as may be required to achieve a linearized tuning frequency - versus - voltage characteristic in a resonant inductance / capacitance circuit such as in an rf voltage - controlled oscillator ( vco ), the varactors 110 , 112 , 114 may be selected to have different capacitance ranges . for instance , the varactor associated with the highest offset voltage may be chosen to have a greater range of variation of capacitance and a steeper capacitance - versus - voltage slope . the offset bias voltages applied to the varactors are preferably set such that there is an overlap , with respect to control voltage , between the high capacitance part of the variable capacitance range of one varactor and the low capacitance part of the range of capacitance of another of the varactors . overlapping of the variable portions of respective characteristics in this way , as depicted in fig3 , contributes to the linearity of the capacitance / voltage characteristics of the composite arrangement 100 . the circuit arrangement 100 is operable such that as the control voltage is increased from a minimum to a maximum voltage , each of the varactors is sequentially operated . that is to say , as the control voltage is increased the varactors are activated such that there is an overlap between the high capacitance range of one varactor and the low capacitance part of the range of capacitance variation of another of the varactors . the total capacitance of the circuit arrangement 100 is equivalent to the sum of the capacitance of each of the varactors . fig4 shows the capacitance versus voltage characteristic of the circuit arrangement 100 of fig2 superimposed on the equivalent curve of a circuit having a typical single mosvar , as shown in fig1 a . it can be seen that the curve of the circuit arrangement 100 is more linear than that of the mosvar . this fact is more clearly seen in fig5 which illustrates the first derivative dc / dv of the characteristic of fig3 . it can be see that the circuit arrangement 100 produces less variation in the dc / dv characteristic over the operational control voltage range compared with that of the dc / dv characteristic of the typical mosvar , as evidenced by the approximately flat character of the relevant part of the curve . to summarize , the circuit arrangement 100 has a capacitive network made up of a number of varactors connected in parallel , each varactor being inherently non - linear over its operating range , and yet the network as a whole having the advantage of a more linear capacitance versus control input response compared to that of the typical varactor implementation capable of capacitance variation over the same range . the circuit arrangement 100 has many different applications . however , it is of particular benefit in rf tuning circuits such as voltage controlled oscillators , filters and tuned amplifiers . referring now to fig6 of the drawings , the capacitance part of a voltage controlled oscillator 200 in accordance with the invention includes a modulator 220 . tuning of the oscillator is accomplished by a network of parallel varactors coupled to a control input and respective offset sources as described above with reference to fig2 . the modulator 220 comprises a varactor 222 connected effectively in parallel with the varactors 110 , 112 , 114 of the tuning network . the modulator varactor is connected at one of its electrodes to a dc offset bias voltage source v 4 and at its other electrode to a modulation input 223 for receiving a modulation signal v mod . the varactor 222 is coupled to the circuit arrangement 100 via a dc blocking capacitor 224 , thereby isolating the modulation input 223 from the control input 116 . use of an additional varactor 222 specifically for frequency modulation of the vco output signal , the modulation being applied to this varactor directly from a modulation input which is isolated from the control input 116 , has the advantage that the sensitivity of the modulation process can be set substantially independently of the vco tuning frequency . that is to say , the variations in capacitance produced by the modulation signal applied to the modulation input 226 do not vary significantly in magnitude for a given modulation voltage amplitude as the vco operating frequency alters . accordingly , the depth of modulation remains substantially constant . referring to fig7 , an emitter coupled lc oscillator 300 in accordance with the invention has a cross - coupled transistor pair q 0 , q 1 arranged as a voltage controllable oscillator with a differential output across the collectors of the transistors q 0 , q 1 . the frequency of the oscillator 300 is determined by the inductive and capacitive components connected to the collectors of the cross - coupled transistor pair q 0 , q 1 and the virtual ground formed by a bias block 302 which incorporates a plurality of offset voltage sources producing varactor bias voltages v 1 , v 2 and v 3 . in this circuit , the frequency - determining components are inductors l 1 and l 2 , capacitors c 0 and c 1 and varactors c 10 , c 11 , c 12 , c 13 , c 14 and c 15 . each varactor is connected to a respective dc offset voltage source v 1 , v 2 or v 3 in the bias block 302 and the total capacitance of the varactors is adjusted by varying the value of the control voltage , v control . accordingly , the connections between the voltage bias block 302 and the varactors connected to bias voltages sources v 1 , v 2 and v 3 can be considered to be an rf ground . therefore , the varactors c 10 , c 1 and c 13 , located on the left hand side ( lhs ) of the circuit , are effectively connected in parallel at radio frequencies . the total capacitance of the frequency - determining components on the lhs of the circuit is the capacitance resulting from the connection of capacitor c 0 in series with the total capacitance of the parallel - connected varactors c 10 , c 1 and c 13 . similarly , the capacitance of the frequency - determining components on the right - hand side of the circuit comprises capacitor c 0 in series with the parallel combination of the varactors c 13 , c 14 and c 15 . the total capacitance of the frequency - determining components in the oscillator 300 is equal to the overall capacitance of the frequency determining capacitances ( c 1 , c 13 , c 14 , c 15 ) on the rhs in series with the overall capacitance of the frequency determining capacitances ( c 0 , c 10 , c 11 , c 12 ) on the lhs . the total inductance of the inductive frequency - determining components in the oscillator 300 is equal to the inductance of inductor l 1 in series with that of the inductor l 2 . the transistors q 0 , q 1 are connected at their bases to a bias voltage source vb via resistors r 3 and r 4 respectively so as to forward bias their base - emitter junctions . the transistors q 0 , q 1 are capacitively cross - coupled . specifically , coupling capacitors c 2 and c 3 couple the signals generated at the collectors of transistors q 1 and q 0 to the bases of the transistors q 0 , q 1 respectively to cause oscillation in a well - known manner . the varactor pairs c 10 , c 13 ; c 10 , c 14 ; and c 12 , c 15 are selected such that the varactors of each pair have the same cn characteristic . however , the cn characteristic of each pair may be selected to have a different characteristic and in particular different capacitance ranges . in a preferred embodiment , the cn characteristic of the complete set of varactors follows a square law curve in order to achieve a linearized frequency / voltage characteristic for the voltage controllable oscillator . this can be achieved , for example , by use of a varactor associated with the highest offset voltage which has a characteristic having a steeper cn curve and extends over a larger capacitive range . variations may be made without departing from the scope of the invention . for example , the control means may comprise a plurality of control sources connected to the plurality of variable capacitance elements ; or a common offset bias and a plurality of different value control sources connected to the capacitance elements . furthermore , the circuit arrangement 100 may be used for a tunable filter or any other application requiring a linearized variable capacitance . a presently preferred embodiment of the subject invention is shown in fig2 . while at least one presently preferred embodiment of the invention has been described using specific terms , such description is for illustrative purposes only , and it is to be understood that changes and variations may be made without departing from the spirit or scope of the following claims .