fig1 and 2 are diagrams illustrating the position detecting principle of the position detecting device of the present invention and fig3 ( a ) through 3 ( c ) are diagrams illustrating the alignment process of the present invention . fig1 is a perspective view showing an exposure light source 1 , a mask ( first object ) 2 and a wafer ( second object ) 3 as well as the relative positional relationship between a plurality of alignment marks provided on the mask 2 and the wafer 3 . in fig1 an exposure beam emitted from the exposure light source 1 is applied to an irradiation area of the mask 2 to expose alignment marks 4 and 5 and an integrated circuit ( ic ) pattern ( not shown ) on the mask 2 onto the wafer 3 . fig2 is a schematic side view of fig1 . next , an alignment error , which is a deviation amount due to exposure distortion , will be explained with reference to fig2 . in fig2 since the exposure light source ( light emitting surface ) 1 has a limited size , the exposure position on the wafer 3 of the alignment mark 4 of the mask 2 is not position 3a , which is directly under the alignment mark 4 , but is position 3b , which is deviated from position 3a by an amount proportional to the distance between the optical axis of the exposure light and the alignment mark 4 . in fig2 assuming that symbol l indicates the distance between the exposure light source 1 and the mask 2 , symbol g indicates the distance between the mask 2 and the wafer 3 and symbol h indicates the distance in the y - direction between the optical axis 1a of the exposure beam and the alignment mark 4 , the deviation amount δh due to exposure distortion of the transfer position on the wafer 3 of the alignment mark 4 is given by the following equation : thus , as shown in fig3 ( a ), when the alignment marks 4 and 5 of the mask 2 for the n - th layer exposure ought to be exposed on the wafer 3 as alignment marks 8 and 9 on the wafer 3 , indicated by the dotted lines , alignment marks 6 and 7 , respectively , are actually formed at positions which are shifted in the x - direction by δh due to exposure distortion . when a mask 10 for the ( n + 1 ) th layer exposure , as shown in fig3 ( b ) is aligned with respect to the wafer 3 shown in fig3 ( a ) by using the position detecting device shown in fig1 alignment is effected such that the mask 10 is rotated by an angle θ , as shown in fig3 ( c ). assuming that the length of the normal extending from the center of the alignment mark 6 on the wafer 3 to the center line in the x - direction is y1 , the alignment of the mask 10 is effected such that it is rotated by θ = δh / y1 with respect to the wafer 3 . in this embodiment , information regarding the exposure condition when the alignment mark of the mask for the n - th layer exposure is exposed on the wafer is stored beforehand . here , the information regarding the exposure condition consists of the distance l between the exposure light source 1 and the mask 2 and the distance between the mask 2 and the wafer 3 at the time of exposure . the distance g between the mask 2 and the wafer 3 is measured by the position detection device of the present invention at the time of exposure . then , from the exposure condition stored and the distance of the alignment mark from the optical axis of the exposure beam , the shift amount of the alignment mark on the wafer 3 due to exposure distortion is obtained , or stored after being obtained , and , after relative alignment between the wafer 3 and the mask 10 for the ( n + 1 ) th layer exposure is effected by correction means , the mask 10 is reversely rotated by the rotation amount θ obtained or stored , whereby the alignment error due to exposure distortion is compensated for . fig4 is a flowchart showing the sequence discussed above for the alignment error correction . fig7 is a schematic diagram showing the essential portion of the position detecting device of the present invention as applied to a proximity type exposure device for semiconductor device production . fig8 is an enlarged view illustrating a portion of fig7 . in these drawings , reference numeral 2 indicates a mask constituting the first object , on the surface of which an electronic circuit pattern and an alignment mark 41 are formed . reference numeral 3 indicates a wafer constituting the second object , on the surface of which an alignment mark 42 is formed . reference numerals 43 , 44 , 45 and 46 indicate alignment marks consisting of physical optical elements provided on the mask 2 . the physical optical elements 43 , 44 , 45 and 46 are alignment marks ( af marks ) for detecting the distance between the mask 2 and the wafer 3 . the physical optical elements 41 and 42 are alignment marks ( aa marks ) for the in - plane direction detection of the mask 2 and the wafer 3 , i . e ., alignment marks for detecting so - called lateral deviation . the physical optical elements of this embodiment consist of grating lenses with a one - dimensional or a two - dimensional lens function , fresnel zone plates , diffraction gratings with no lens function or the like . reference numeral 72 indicates a laser beam source , which emits a coherent beam 50 with satisfactory directivity . reference numeral 132 indicates a collimator lens . reference numeral 33 indicates a projection lens , which projects a laser beam 50 from laser beam source 72 onto the alignment marks 41 , 43 , 44 , 45 and 46 on the mask 2 through a mirror 34 and a filter 35 . reference numeral 38 indicates a detecting section , which consists , for example , of a line sensor such as a ccd . reference numeral 36 indicates a light receiving lens , which condenses beams 51 and 52 , including distance information from the mask 2 , and a beam 53 , including in - plane misalignment information , and guides the beams to the detecting section 38 . in fig8 the beam 51 ( 52 ) is a beam obtained by diffracting the beam 50 by the first physical - optical elements 43 and 44 on the mask 2 , reflecting it at the wafer 3 , and diffracting it by the second physical - optical elements 45 and 46 on the mask 2 . the beam 53 is a beam obtained by subjecting the beam 50 to optical action by the physical - optical element 41 on the mask 2 and the physical - optical element 42 on the mask 3 . a method based on image processing , an optical heterodyne method or the like is applicable to the misalignment detection method of this embodiment . while in the case shown in fig3 ( a ) through 3 ( c ), the alignment in the x - direction is effected by using two alignment marks 6 and 7 arranged symmetrically with respect to the central point of the wafer 3 , when two alignment marks are arranged symmetrically with respect to the center line in the x - direction or when alignment is performed by using a single alignment mark , any error in alignment due to exposure distortion appears as a parallel shift in the x - direction of the mask 3 . in that case , parallel movement of the mask 10 is effected in the direction opposite to the shifting direction of the alignment mark by the amount of parallel shift of the alignment mark due to exposure distortion after the alignment of the wafer 3 and the mask 10 . while in this embodiment the correction of the alignment error due to exposure distortion is effected through rotation or parallel shift of the mask 10 , it is also possible to effect the correction by moving the wafer 3 instead of the mask 10 . further , while this embodiment has been described with reference to a case in which alignment is effected in the x - direction , it is also possible to correct the alignment error due to exposure distortion in a similar manner in the case of the alignment in the y - direction . next , a second embodiment of the present invention will be described . while in the first embodiment the alignment error due to exposure distortion is corrected by moving the mask or the wafer , in the second embodiment , the correction is effected by previously imparting the shift amount of the alignment mark due to the influence of exposure distortion to the alignment value of mask and the wafer as an offset . suppose , as shown in fig3 ( a ), exposure of the alignment mark on the wafer 3 is effected , with the alignment mark being shifted by δh from the position where it ought to be formed due to the influence of exposure distortion . here , - δh is imparted beforehand as an offset to the alignment value obtained as a result of the relative alignment of the wafer 3 and the mask 10 , whereby the alignment error due to the influence of exposure distortion is corrected to thereby effect proper alignment . thus , this embodiment is characterized in that , in the processes of effecting relative alignment between first and second objects and exposing the pattern on the first object onto the second object to form the pattern on the first object onto the second object , an offset value , in which the shift amount of the alignment mark formation position on the second object is taken into account , is given beforehand in order that no relative alignment error may be generated between the first and second objects by the shifting of the alignment mark formation position for the alignment on the second object due to the influence of exposure distortion . next , a third embodiment of the present invention will be described with reference to fig5 ( a ), 5 ( b ) and 6 . as shown in fig5 ( a ), the alignment marks 4 and 5 ( see fig1 ) of the mask 2 for the n - th layer exposure ought to be exposed at the positions indicated by the dotted lines as alignment marks 8 and 9 on the wafer . however , due to the influence of exposure distortion , alignment marks 6 and 7 are formed at positions shifted in the x - direction by δh . in view of this , in this embodiment , as shown in fig6 there are arranged , in correspondence with the alignment marks 6 and 7 on the wafer 3 , alignment marks 14 and 15 , which are drawn on the mask taking the shift amount δh of the alignment marks 6 and 7 on the wafer 3 into consideration . using a mask 13 for the ( n + 1 ) th layer ( fig5 ( b ), the alignment of the mask 13 and the wafer 3 is effected . fig6 shows how relative alignment is effected between the mask 13 and the wafer 3 . fig9 is a schematic diagram showing the essential portion of the position detecting device of the present invention as applied to an exposure device for semiconductor device production utilizing x - rays . in fig9 reference numeral 139 indicates an x - ray beam , which is substantially a parallel beam , which is applied to the surface of a mask 134 . reference numeral 135 indicates a wafer whose surface is coated , for example , with a resist for x - rays . reference numeral 133 indicates a mask frame , and reference numeral 134 indicates a mask membrane ( mask ), on the surface of which the patterning of a circuit pattern is effected by an x - ray absorber . reference numeral 232 indicates a mask support member ; reference numeral 136 indicates a wafer fixing member such as a wafer chuck ; and reference numeral 137 indicates a z - axis stage , which is actually constructed so as to allow tilting . reference numeral 138 indicates an x - axis stage , and reference numeral 144 indicates a y - axis stage . the mask / wafer alignment detecting function sections ( the position detecting device ) described with reference to the above embodiments are accommodated in casings 130a and 130b , from which information regarding the gap between the mask 134 and the wafer 135 and on the misalignment in the x - and y - in - plane directions is obtained . further , the alignment detecting function sections also measure the exposure condition when the alignment mark is exposed on the wafer , i . e ., the gap . while fig9 only shows two alignment detecting function sections 130a and 130b , two more alignment detecting function sections are provided in correspondence with the other sides of the square ic circuit pattern area on the mask 134 . optical systems and detection systems are also accommodated in the casings 130a and 130b . reference numerals 146a and 146b indicate alignment beams from the alignment systems . signals obtained by these alignment detecting function sections are processed by processing means 140 to obtain misalignment information in the x - y plane and the gap value . the results thus obtained are judged and , when they are not within predetermined values , the driving systems 142 , 141 and 143 of the axis stages are moved by controller 145 so as to obtain a value within a predetermined mask / wafer misalignment , and the mask 134 or the wafer 135 is moved through the driving system 147 of the mask support member by an amount that corrects the alignment error due to exposure distortion . after this , an x - ray exposure beam 139 is applied to the mask 134 . until the alignment is completed , an x - ray shielding member ( not shown ) is maintained shut . in fig9 the x - ray source , the x - ray illumination system , etc ., are omitted . further , the processing means stores the exposure condition when the alignment mark is formed on the wafer , and obtains and stores the exposure distortion therefrom . while the example shown in fig9 is an x - ray exposure device of a proximity type , the present invention also applies to an optical stepper . further , in the present invention , an i - beam ( 365 nm ), a krf - excimer beam ( 248 nm ), an arf - excimer beam ( 193 nm ) or the like may be used as the light source , and the invention is applicable to a reduction projecting exposure device of a sequential movement type having an illumination beam from such a light source or a one - to - one mirror projection type exposure device . next , an embodiment of the semiconductor device producing method using the above - described projection exposure device will be described . fig1 is a flowchart of the production of a semiconductor device ( a semiconductor chip , such as , an ic or an lsi , a liquid crystal panel , a ccd , etc .). in step 1 ( circuit design ), the circuit design of a semiconductor device is conducted . in step 2 ( mask production ), a mask on which the designed circuit pattern is formed is produced . in step 3 ( wafer production ), a wafer is produced by using a material such as silicon . in step 4 ( wafer process ), which is called a preprocess , the actual circuit is formed on the wafer by lithography by using the mask and the wafer previously prepared . next , in step 5 ( assembly ), which is called a postprocess , semiconductor chips are obtained by using the wafer prepared in step 4 , this step including an assembly step ( dicing , bonding ), a packaging step ( chip sealing ), etc . in step 6 ( inspection ), inspection processes , such as the checking of the operation of the semiconductor devices prepared in step 5 , a durability test , etc ., are conducted . through these processes , the semiconductor devices are completed and shipped ( step 7 ). fig1 is a detailed flowchart of the above - mentioned wafer process ( step 3 ). first , in step 11 ( oxidation ), the wafer surface is oxidized . in step 12 ( cvd ), an insulating layer is formed on the wafer surface . in step 13 ( electrode formation ), electrodes are formed on the wafer by evaporation . in step 14 ( ion implantation ), ions are implanted in the wafer . in step 15 ( resist processing ), a photosensitive material is applied to the wafer . in step 16 ( exposure ), the circuit pattern of the mask is exposed on the wafer by the above - described exposure device . in step 17 ( development ), the exposed wafer is developed . in step 18 ( etching ), the portion other than the developed resist is cut off . in step 19 ( resist separation ), the resist which has become unnecessary after etching is removed . by repeating these processes , a multiplex circuit pattern is formed on the wafer . by using the production method of this embodiment , it is possible to easily produce a high - integration semiconductor device which has conventionally been difficult to produce . except otherwise disclosed herein , the various components shown in outline or in block form in the figures are individually well known and their internal construction and operation are not critical either to the making or using of this invention or to a description of the best mode of the invention . while the present invention has been described with respect to what is at present considered to be the preferred embodiments , it is to be understood that the invention is not limited to the disclosed embodiments . to the contrary , the invention is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims . the scope of the following claims is to be accorded the broadest interpretation so as to encompass all such modifications and equivalent structures and functions .