referring to the circuit diagram of fig1 there is shown a regulated power supply 10 which is especially adapted for use in a video display terminal having a monitor in accordance with a preferred embodiment of the present invention . typically , a utility - provided ac input 12 is available for energizing the display terminal . this input line generally provides 120 or 240 vac at 50 or 60 hz . the input voltage is provided to step - down transformer 14 which reduces the input voltage to approximately 20 vac . rectifier and regulator circuitry 16 then converts the ac input to a regulated dc output voltage of approximately 15 vdc . this dc voltage is then provided to deflection circuitry 18 of the video display ( not shown ). the horizontal deflection circuit 18 oscillates at a very high frequency and energizes the high voltage output transformer 20 . the high voltage output transformer 20 , in turn , supplies voltage to the video display &# 39 ; s cathode ray tube ( crt ). it is to be noted here that the system configuration thus far discussed is intended to be general in nature and not to place limitations on the present invention . what has been described thus far is the power supply chain to a typical video display operated from a standard 120 vac , 60 hz line . the numbers assigned are intended merely for descriptive purposes in describing the preferred embodiments of the present invention and are not intended to limit the scope or definition of the present invention . in accordance with the present invention , the primary winding 22 of transformer 24 is coupled to the output of horizontal driver 18 . one side of primary coil 22 is connected to the horizontal output transistor voltage ( approximately 150 v ) while the other side is coupled to a + 15 v output from rectifier and regulator circuit 16 . secondary coil 26 is inductively coupled to primary coil 22 with the number of turns and direction of secondary coil 26 relative to the number of turns and direction of primary coil 22 determining the magnitude and polarity of the output voltages of transformer 24 . as shown in fig1 secondary coil 26 is wired such that its start and finish portions cause the flyback pulse to be inverted and a + 5 output voltage signal during scan to be produced . this reduced voltage level also indicates that secondary coil 26 includes a proportionately fewer number of turns than primary coil 22 . a tertiary coil 28 is also shown and will be discussed in detail later , but the present invention is not limited to the use of one or two secondary coils , but may accommodate any number of secondary coils depending on the particular application involved . thus , transformer 24 performs the functions of reducing the magnitude of the input voltage level from 150 v to 50 v and inverting the input signal to provide a positive 5 v output during the horizontal scan portion of crt deflection . fig2 a shows the input signal provided to primary coil 22 while the output signal of secondary coil 26 is shown in fig2 b . transformer 24 thus converts the regulated + 150 v retrace pulse to a regulated reduced voltage negative pulse . the ac signal output of secondary coil 26 is rectified by means of diode 30 and capacitor 32 . diode 30 is rendered conducting when a potential of at least 0 . 7 v is applied across it . thus , during horizontal scan diode 30 is in a conducting state and charges capacitor 32 which is coupled between the cathode of diode 30 and ground . when conducting , diode 30 delivers an output voltage to terminal 34 and when not conducting , the discharge of capacitor 32 provides for the dc output signal at terminal 34 . with a flyback pulse width of 10 microseconds or less and a total sweep period of 70 microseconds or less , the size of capacitor 32 may be kept quite small because of the short discharging period . fig2 c shows the rectified voltage waveform at the output of diode 30 which , in combination with the discharge of capacitor 32 , provides a level dc output to terminal 34 . the voltage level of this dc signal depends upon the input signal voltage level at primary coil 22 and the number of turns in secondary coil 26 relative to the number of turns in primary coil 22 . the phase of this output signal is determined by the polarity of secondary coil 26 relative to that of primary coil 22 . coil 38 and capacitor 40 act in combination as a high frequency filter so that the output dc voltage is maintained within ± 50 millivolts of the 5 v output voltage of diode 30 and discharging capacitor 32 as shown in fig2 ( d ). again , because the system is operating at a frequency of either 15 kilohertz or more , depending upon the horizontal deflection rate of the particular video display involved , small component values and sizes may be used in the present invention . thus , it can be seen that the present invention provides well - regulated dc output voltages of either polarity using only a minimal number of passive devices without utilizing any extra active devices which add to power supply complexity and cost . in addition , the diode switching involved in producing the level dc output voltage occurs during the retrace portion of horizontal sweep thus avoiding spurious inputs during horizontal scan and video image distortions associated therewith . thus , the dc output signal provided to terminal 34 is a scan - derived voltage . in the present invention the scan - derived voltage delivered to terminal 34 is complemented with a pulse - derived voltage provided to terminal 42 by means of diode 44 and associated circuitry . diode 44 is coupled between secondary winding 26 and the anode of diode 30 and is rendered conducting when the voltage thereacross exceeds 0 . 7 v . the anode of diode 44 is coupled to ground through the resistor , capacitor and a zener diode combination shown in fig1 . when the voltage between secondary coil 26 and diode 30 goes below - 0 . 7 v during retrace , diode 44 is rendered conducting . thus , diode 44 is off during the scan portion of horizontal deflection and is turned on during retrace . because of the short duration of retrace diode 44 conducts for only a short period of time and produces a high voltage pulse of approximately - 50 v . resistor 46 reduces this - 50 v pulse to approximately - 30 v in charging up capacitor 48 . storage of this voltage is provided by the discharge of capacitor 48 when diode 44 is in a non - conducting state and regulation and filtering of the negative output voltage applied to terminal 42 is accomplished by means of resistor 50 , zener diode 52 and filter capacitor 54 . voltage regulation is accomplished primarily by means of zener diode 52 . incorporation of zener diode 52 minimizes voltage swings and permits a more level dc output voltage at terminal 42 with varying loads . resistor 50 reduces the - 30 v applied across resistor 46 which is generated by the discharge of capacitor 48 to approximately - 12 v . zener diode 52 is selected so that it turns on at - 12 v which provides for precise regulation of the voltage applied to terminal 42 . thus , a - 12 v level voltage is applied to terminal 42 with capacitor 54 providing filtering action for the output voltage . thus , this output dc voltage is pulse - derived , or originates from the horizontal drive circuit retrace pulse . shown in dotted line form in fig1 is a tertiary coil 28 which if incorporated in the circuit as shown in fig1 will provide the same output signal as provided by zener diode 52 . the polarity of tertiary coil 28 is the same as primary coil 22 as indicated by the s ( start ) and f ( finish ) positions in fig1 . as shown in fig1 the polarity of secondary coil 26 is reversed from that of primary coil 22 . with tertiary coil 28 incorporated in the present invention and zener diode 52 and associated connections removed , a - 12 v scan voltage may be delivered to diode 56 upon the proper selection of turns in tertiary coil 28 relative to the number of turns in primary coil 22 . similarity of polarity between primary coil 22 and tertiary coil 28 will ensure that a negative scan voltage is provided to diode 56 and that diode 56 will produce a - 12 v dc output on capacitor 54 as can be seen in fig1 . the incorporation of tertiary coil 28 permits the removal of diode 44 , resistor 46 , resistor 50 , capacitor 48 and zener diode 52 and thus represents another embodiment of the present invention . there has thus been shown a power supply for use in a video display terminal which offers the advantages of small size , excellent voltage regulation by means of a single regulation device and a high degree of isolation between input and output stages . the power supply of the present invention permits any number of regulated dc voltages to be generated for the various logic and monitor requirements of the video display terminal without creating unwanted spurious interference . while particular embodiments of the invention have been shown and described , it will be obvious to those skilled in the art that changes and modifications may be made without departing from the invention in its broader aspects and , therefore , the aim in the appended claims is to cover all such changes and modifications as fall within the true spirit and scope of the invention . the matter set forth in the foregoing description and accompanying drawings is offered by way of illustration only and not as a limitation . the actual scope of the invention is intended to be defined in the following claims when viewed in their proper perspective based on the prior art .