referring to fig1 , a typical computer system 10 may include a processor 12 coupled by a bus 14 to other components . in some embodiments , multiple processors 12 may be utilized . in other embodiments , a variety of different system architectures may be implemented . a bus 14 may be connected to an input device 16 , such as a camera , a scanner , a storage device , or any other input device . also coupled to the bus 14 may be a memory 18 . the memory 18 may be any kind of storage device and may store a sequence 20 in the form of software or firmware in one embodiment . a display interface 22 and a display 24 may be coupled to the bus 24 as well . finally , a coder / decoder 26 may be coupled to the bus . the coder / decoder 26 may be implemented in software , in some embodiments , and in hardware in other embodiments . it may receive an input image in the form of data and may compress that information into a coded sequence for storage in a memory , such as the memory 18 . it may also receive data stored in compressed form in the memory 18 and may implement decompression . in accordance with one embodiment of the present invention , a triangular mesh may be simplified using a set of triangles strips . a strip of triangles is merely a run of adjacent triangles which can be conveniently handled as a group . the strips may then be coded based on the indices of the individual vertices making up the strip . each strip may be coded as follows : n , 1 st index , 2 nd index . . . n th index , thus , in the above sequence , the first number will be the number of indices in the strip and each of the indices points to corresponding vertex in the mesh . rather than simply saving indices , sequences of indices that occur frequently in the strips are identified . the sequences are then coded using fewer bits than would be utilized if every index were coded using dynamic or static histograms . in one embodiment , four different types of sequences are identified . for each type , a two - bit sequence code ( sc ) is provided . in one embodiment , if separate storage is chosen where geometry and connectivity data are stored in separate blocks , a sequence code of 0 indicates that the index may be reconstructed from the previous index plus 1 . a sequence code of 1 indicates that the index may be reconstructed from the previous code minus 1 . a sequence code of 2 indicates that the sequence may be reconstructed from the second previous code plus 1 . a sequence code of 3 indicates a long sequence of sequence code 0 . in one embodiment , if a mixed storage is chosen where geometry and connectivity data are mixed in one block , then a sequence code of 0 is reconstructed from the previous index plus 1 . a sequence code of 1 indicates that the index may be reconstructed from the previous index minus 1 . a sequence code of 2 indicates that the sequence may be reconstructed from the second previous sequence code plus 1 . a sequence code of 3 indicates that the sequence code may be reconstructed from the second previous code minus 1 . the more elements in the strips that fit a sequence code , the better the compression ratio that is achieved . to improve the compression ratio , an indices reordering procedure may be done before coding . each of the vertex indices , in the order that they are encountered along the strip , are coded starting with 0 and incrementing by one . when a vertex with the same index repeats , it is then recoded with the same numeric code . for example , if an initial strip with 14 vertices has the code 14 , 2 , 7 , 4 , 3 , 9 , 8 , 0 , 1 , 3 , 5 , 7 , 6 , 9 , 0 it would be recoded as 14 , 0 , 1 , 2 , 3 , 4 , 5 , 6 , 7 , 3 , 8 , 1 , 9 , 4 , 6 . the first index in the code ( 2 ) is arbitrarily reset as 0 . the second index of 7 is arbitrarily set as 1 . since the indices do not repeat , the indices 2 , 7 , 4 , 3 , 9 , 8 , 0 , 1 are simply coded consecutively from 0 to 7 . the first index that repeats is the index 3 . since the index 3 has already been set equal to 3 in the new code , it maintains that code in the new code when repeated at a different position . then the flow continues incrementing to 8 . then the next index in the old code is 7 , which has already been set equal to 1 . the next position in the old code is 6 which is given the next sequential number 9 , the next position in the old code is 9 which has already been set equal to 4 , and the last position in the old code 0 , is set equal to 6 because 0 has already been assigned for 6 . after this coding is done , the sequence codes are assigned based on the new code . thus , the sequence codes in this example , if separate storage is chosen , are 14 , ( 0 , 0 ), ( 1 , 0 ), ( 1 , 0 ), ( 1 , 0 ), ( 1 , 0 ), ( 1 , 0 ), ( 1 , 0 ), ( 1 , 0 ), ( 0 , 3 ), ( 1 , 2 ), ( 0 , 1 ), ( 1 , 2 ), ( 0 , 4 ), ( 0 , 6 ) where first element in each pair is “ is sc flag ” and the second one is a sequence code or plain index depending on the flag . the zero sequence codes repeat in along sequence so the subsequence ( 1 , 0 ), ( 1 , 0 ), ( 1 , 0 ), ( 1 , 0 ), ( 1 , 0 ), ( 1 , 0 ), ( 1 , 0 ) can be reduced to a triple ( 1 , 3 ,) where 1 is “ is sc flag ”, 3 is a sequence code and 7 is a length of the subsequence . referring to fig2 , the coding algorithm 20 may be encoded in software , hardware , or firmware in some embodiments . the algorithm 20 may , for example , be software stored on the memory 18 as shown in fig1 . in fig2 , prior to starting the processing , the triangle strips are generated from the triangle base mesh ( as indicated in block 22 ) in a well known fashion . initially , at block 24 , a first triangle strip i , index j is assigned to be processed . at 26 , the sequence codes ( sc ) are assigned . if the sequence code assumed is successful , as determined in diamond 28 , a sequence code flag is set equal to 1 in block 30 and in block 32 the flag and the sequence code are saved . if no sequence code can be assigned , then the sequence code flag is set equal to 0 in block 34 and the flag and index itself are saved ( block 36 ). references throughout this specification to “ one embodiment ” or “ an embodiment ” mean that a particular feature , structure , or characteristic described in connection with the embodiment is included in at least one implementation encompassed within the present invention . thus , appearances of the phrase “ one embodiment ” or “ in an embodiment ” are not necessarily referring to the same embodiment . furthermore , the particular features , structures , or characteristics may be instituted in other suitable forms other than the particular embodiment illustrated and all such forms may be encompassed within the claims of the present application . while the present invention has been described with respect to a limited number of embodiments , those skilled in the art will appreciate numerous modifications and variations therefrom . it is intended that the appended claims cover all such modifications and variations as fall within the true spirit and scope of this present invention .