referring initially to fig1 a heart contraction monitor , generally designated 10 , is shown covered by a housing 12 and electrically connected to a heart muscle 14 by transmission line 16 . more particularly , transmission line 16 interconnects heart contraction monitor 10 with sonic transducer 18 and sonic transducer 20 ( shown in phantom in fig1 ) for signal processing as more fully disclosed below . as seen in fig1 the present embodiment of heart contraction monitor 10 envisions transducers 18 and 20 being mounted in sonic alignment on an adjustable caliper 22 . according to the desires of the operator , caliper 22 is positioned to hold both transducers 18 , 20 in contact with heart muscle 14 . further details of the configuration and cooperation of the sonic caliper sensor system which comprises caliper 22 and transducers 18 , 20 are disclosed in co - pending u . s . patent application ser . no . 383 , 205 , assigned to the same assignee as the present invention . it will be understood , however , that heart contraction monitor 10 may be used in conjunction with a wide variety of heart contraction sensors , such as strain gauge deflection sensors , without departing from the spirit and intent of the present invention . fig1 also shows data display windows 24 , 26 , for displaying processed heart contraction data , and controls 28 for controlling the displays on windows 24 , 26 , and for energizing heart contraction monitor 10 . the details of the major electrical componentry of heart contraction monitor 10 are best seen in schematic in figure 2 . there , it will be seen that a combined digital micro processor / microcontroller 30 is electrically coupled to various other components of heart contraction monitor 10 . in order to effectively perform the signal processing described below , microprocessor 30 should operate at a processing frequency of approximately ten ( 10 ) megaherz ( mhz ), and preferably operate at a processing frequency of approximately twenty ( 20 ) mhz . as implied above , fig2 shows microprocessor 30 electrically connected to several other components of heart contraction monitor 10 by a sixteen ( 16 ) bit data bus 32 . while most of the data passed over data bus 32 requires only twelve ( 12 ) to fourteen ( 14 ) bits , it will be appreciated that capacity for future improvements in heart contraction measurement precision , as well as capacity to provide measurements of abnormally large hearts , is provided by a sixteen ( 16 ) bit data bus 32 . specifically , the skilled artisan will recognize that twelve ( 12 ) to fourteen ( 14 ) bit long data sets , representing a standard - sized heart muscle 14 , are currently required in order to achieve a measurement for heart muscle 14 that is precise to within one - tenth ( 1 / 10 ) of one millimeter . more specifically , a standard - sized human heart has dimensions which are roughly in the range of thirty ( 30 ) to one hundred twenty ( 120 ) millimeters ( mm ). for applications requiring a heart size measurement that is accurate to within one - tenth ( 1 / 10 ) of one mm , it is therefore necessary to provide a data set which has a capacity to represent roughly one thousand to two thousand measurement divisions . as can be derived using sample mathematics , a twelve ( 12 ) to fourteen ( 14 ) bit long data set is capable of representing two to the twelfth ( 2 12 ) power to two to the fourteenth ( 2 14 ) power divisions of a single measurement , or four thousand ninety six ( 4096 ) to sixteen thousand three hundred eighty four ( 16384 ) divisions . thus , a twelve ( 12 ) to fourteen ( 14 ) bit long data set has sufficient capacity to represent most standard sized heart measurments to within one tenth ( 1 / 10 ) of one mm . accordingly , a sixteen ( 16 ) bit data bus provides capacity for more precise measurements of heart muscle 14 , in addition to providing capacity to measure abnormally large heart muscles 14 or other relatively large muscles . shown connected to microprocessor 30 via line 38 is a digital counter 46 , which records pulse transit times as more fully disclosed below . also shown connected to microprocessor 30 via line 34 is a pulse generator 48 , which generates electrical pulses that excite transducer 18 in response to control signals from microprocessor 30 . in addition , counter 46 is itself connected to line 34 via line 50 . it will therefore be appreciated that when microprocessor 30 sends a control signal to pulse generator 48 for transmission of a pulse by transducer 18 , the control signal travelling over line 34 is also sent to counter 46 via line 50 to signal counter 46 to commence timing the pulse transit time . as indicated , pulse generator 48 is in turn electrically connected to transmitting transducer 18 via line 52 for electrically exciting transducer 18 to generate and direct an acoustic , or sonic , pulse through heart muscle 14 toward receiving transducer 20 . although not shown in fig2 appropriate analog and digital signal conditioning electronics may be electrically interdisposed between pulse generator 48 and transducer 18 to properly condition the electrical pulse generated by pulse generator 48 . while the electronic characteristics of the electrical pulse generated by pulse generator 48 will vary according to the requirements of the transducers 18 , 20 and associated electronics , in the preferred embodiment of the present invention pulse generator 48 generates a square wave having an approximate amplitude in the range of one hundred thirty - five ( 135 ) to two hundred ( 200 ) volts and a duration in the approximate range of ten ( 10 ) to twenty ( 20 ) nanoseconds . when transducer 18 receives the electrical pulse , described above , generated by pulse generator 48 , the crystals of piezoelectric transducer 18 are excited and are thereby induced to generate an acoustic pulse . upon propagation through heart muscle 14 of the acoustic wave pulse transmitted by transducer 18 in response to the pulse generation signal described above , receiving transducer 20 , when properly disposed on heart muscle 14 in acoustic alignment with transducer 18 , detects the acoustic pulse . receiving piezoelectric transducer 20 , in response to its detection of the acoustic pulse , in turn transmits an electrical detection signal . stated differently , the electrical energy - to - acoustic energy transformation described above in regard to transducer 18 operation is reversed in the case of transducer 20 operation . the electrical detection signal generated by transducer 20 is transmitted across line 54 to analog conditioning circuitry 56 . it will be appreciated that the function of analog conditioning circuitry 56 is to properly condition ( i . e . amplify and smooth ) the relatively small voltage signal generated by transducer 20 , which is on the order of microvolts , for further processing . the conditioned signal is then sent via line 58 to comparator 60 , which generates a square wave signal on line 62 in response to a properly - sized analog electrical signal on line 58 . as seen in fig2 the square wave receive signal on line 62 is conducted to counter 46 , which signals counter 46 to stop timing the pulse transit time . thus , counter 46 determines a pulse transit time across heart muscle 14 , and sends this data set to microprocessor 30 via line 38 . it will be appreciated that the resulting pulse transit time determined by counter 46 ignores electrical time delays which are external to the acoustic pulse transit time between transducers 18 and 20 . it will be further appreciated , however , that these electrical delays are relatively insignificant compared to the acoustic delay between transducers 18 , 20 , and may therefore be ignored . fig2 also shows an external program read only memory ( eprom ) device 64 and a random access memory ( ram ) device 66 in electrical connection with microprocessor 30 via line 40 . as is well known in the art , microprocessor 30 accesses eprom 64 for executing program commands and ram 66 for data storage and retrieval . as is further known in the art , eprom 64 and ram 66 may comprise portions of the physical embodiment of microprocessor 30 . in addition , microprocessor 30 is electrically connected to liquid crystal interface board 68 and latches 70 via lines 42 , 44 , respectively . it will be appreciated that liquid crystal interface board 68 drives data display 72 which , in the present embodiment , is a liquid crystal display . similarly , latches 70 provide parallel information for hard copy display 74 , which may comprise any appropriate printing device . it will be recognized by those skilled in the art , however , that any suitable means for displaying data processed by microprocessor 30 may be incorporated into heart contraction monitor 10 without departing from the scope and intent of the present invention . in the operation of heart contraction monitor 10 , reference is initially made to fig2 and 4 . to initiate a heart contraction measurement pulse , microprocessor 30 , shown in fig2 sends a pulse generator command 76 , shown schematically in fig4 to pulse generator 48 . this command signal 76 is also conducted to pulse counter 46 , which begins timing the transit of the generated pulse , represented by t 0 in order to provide for a sufficiently large number of data points per unit time , microprocessor 30 commands pulse generator 48 to initiate a pulse approximately one thousand ( 1000 ) times per second , although greater or lesser pulse generation frequencies may be used . now referring to fig2 upon receiving the pulse command from microprocessor 30 , pulse generator 48 generates an electrical square wave which is sent via line 52 to transmitting transducer 18 . transducer 18 transforms the electrical pulse from pulse generator 48 into a sonic , or acoustic , pulse , which is directed into heart muscle 14 . upon propagation of the sonic pulse through heart muscle 14 , receiving transducer 20 , when properly aligned with transmitting transducer 18 , detects the sonic pulse and transforms the received sonic pulse into an electrical signal . this electrical signal is then conditioned by conditioning circuitry 56 and is subsequently passed to comparator 60 . upon receipt of a properly conditioned ( i . e ., properly shaped and amplified ) signal from circuitry 56 , comparator 60 generates a square response wave 80 , shown in schematic in fig4 and transmits this signal to counter 46 . counter 46 stops timing the transit of the pulse at ( t r ) of square wave 80 to thereby determine a pulse transit time 84 . in particular , as seen in fig4 pulse transit time 84 is the time delay , as sensed by counter 46 , between the leading edge 86 of pulse command wave 76 and leading edge 88 of square response wave 80 . once counter 46 computes pulse transit time 84 , pulse transit time 84 is sent to microprocessor 30 for processing as described below . the signal processing performed by microprocessor 30 on pulse transit times 84 is best appreciated with reference to fig3 . in fig3 pulse transit time 84 is denoted t i ; with subscript i denoting the temporal sequence of the particular pulse transit time 84 under test . the logic processing loop of microprocessor 30 may be seen to begin at block 90 , where microprocessor 30 receives pulse transit time 84 from counter 46 . next , microprocessor 30 determines whether pulse transit time 84 is excessively long ( i . e ., approaching or exceeding sixteen ( 16 ) bits in length ) or excessively short ( i . e ., a zero value ) at block 92 . specifically , a normally sized heart muscle 14 typically is of a dimension that will require approximately twelve ( 12 ) to fourteen ( 14 ) bits of data to represent , depending on the required degree of measurement precision . therefore , a pulse transit time 84 data set which significantly exceeds or falls short of 12 - 14 bits in length is discounted , or rejected , and is processed across line 94 to discard block 96 . on the other hand , for pulse transit times 84 which are not plainly erroneous as determined at block 92 , microprocessor 30 performs a second determination to assess the relative reasonableness of the particular pulse transit time 84 under test . to perform this second test , microprocessor 30 compares the particular pulse transit time 84 under test to the immediately precedent pulse transit time 84 that has not been discarded , or rejected , at blocks 92 or 98 . specifically , as seen in fig3 microprocessor 30 performs the operation described above at block 98 by accessing immediate storage block 100 , which stores a plurality of the non - discarded temporally precedent pulse transit times 84 . microprocessor 30 retrieves for comparison the pulse transit time 84 which is immediately precedent to the pulse transit time 84 under test . microprocessor 30 then performs the comparison described above and , if the current pulse transit time 84 exceeds or falls short of the immediately precedent pulse transmission time 84 by a predetermined amount , the current pulse transmission time 84 is discarded through lines 102 and 94 to discard box 96 . as those skilled in the art will recognize , the logic underlying the microprocessor 30 comparison at block 98 is that the heart muscle 14 cannot undergo a relatively instantaneous change in size which is of a relatively large magnitude . thus , any pulse transit time 84 which indicates an unrealistically large instantaneous change of size of heart muscle 14 may be considered to be a false signal . while the present invention contemplates the use of a wide range of other predetermined values for rejecting such false pulse transit times 84 may be used , the present invention rejects at block 98 any pulse transit times 84 which are approximately thirty ( 30 ) per cent greater or lesser than the immediately precedent pulse transit time 84 . if pulse transit time 84 passes both the block 92 and block 98 tests , it is stored for temporary referral at block 100 . then , regardless whether pulse transit time 84 has been rejected or accepted , microprocessor 30 resets the i value to i + 1 at block 104 and determines if now - reset i is an integer multiple of eight ( 8 ), at block 106 . as seen in fig3 if i is an integer multiple of eight ( 8 ), microproccessor 30 proceeds along line 108 to average the most recent eight ( 8 ) pulse transmission times 84 at block 110 . it will therefore be understood that while a wide size range of pulse transit time 84 data sets may be selected for averaging , the present invention averages the eight most recent pulse transit times 84 in order to present more meaningful data to the operators of heart contraction monitor 10 . moreover , microprocessor 30 may be programmed to average the eight most recent pulse transit times 84 which have passed the tests at blocks 92 and 98 , or average the eight most recent pulse transit times 84 regardless of whether the times 84 have been rejected or accepted . in the latter case , it will be understood that when the averaged group contains one or more rejected data sets , the rejected data set will be ignored and the effective group size for averaging will be decreased accordingly . after averaging at block 110 , the now - averaged data set comprising up to eight ( 8 ) individual pulse transit times 84 is passed along line 112 to be stored in ram 66 , the storage process taking place at block 114 . in addition , the now - averaged data set is sent to block 116 to signal microprocessor 30 to reset the i value to one ( 1 ). the microprocessor 30 logic then proceeds along line 118 to block 120 , which signals microprocessor 30 to continue to block 90 and to standby for the processing of subsequent pulse transit times 84 . on the other hand , for those cases wherein now reset i at block 106 is not an integer multiple of 8 , microprocessor 30 immediately proceeds along line 122 to block 120 , and thence returns to block 90 in standby for the testing of subsequent pulse transit times 84 . it will therefore be appreciated that independent of the number of pulse transit times 84 actually averaged by microprocessor 30 , microprocessor 30 proceeds to store and average the next set of eight ( 8 ) pulse transit times when i is reset to unity . regarding the particular provisions for data display of heart contraction monitor 10 , reference is made to fig5 . while various displays may be designed which can effectively present the data as processed according to the foregoing disclosure , the present embodiment of monitor 10 envisions both a short time averaged ( sta ) display window 26 and a long time averaged ( lta ) display window 24 , as shown in fig5 . in particular , sta window 26 displays approximately the three most recent seconds of averaged data which have been generated by microprocessor 30 ( see block 110 in fig3 ) and subsequently converted to a corresponding distance signal by microprocessor 30 . it will be recalled that each data set generated at block 110 comprises the average of eight ( 8 ) individual pulse transit times 84 , which are in turn generated by counter 46 one thousand ( 1000 ) times per second . thus , it will be understood that one hundred twenty five ( 125 ) averaged data sets are generated by microprocessor 30 at block 110 each second . in accordance with the above discussion , then , width 124 of sta display 26 , in the present embodiment , is at least three times one hundred twenty five ( 3 × 125 ) pixels wide , or three hundred seventy five ( 375 ) pixels . referring now to fig5 three - second curve 126 of sta display 26 is seen to be comprised of a plurality of pixels 128 , each of which represents a single averaged data set generated by microprocessor 30 at block 110 . it will therefore be appreciated , in cross - reference to fig2 and 5 , that three second curve 126 is updated by microprocessor 30 through liquid crystal counter 68 one hundred twenty five ( 125 ) times per second . in addition to driving three second curve 126 as disclosed above , microprocessor 30 also generates and updates the data presented on lta display 24 . specifically , each pixel 130 of lta display 24 corresponds to a peak maximum 132 or minimum 134 of three second curve 126 . moreover , heart contraction monitor 10 provides for operator shifting of the time period encompassed by lta display 24 . for example , one of the control knobs 28 shown in fig1 may be interconnected to microprocessor 30 and lta display 24 to selectively display data as disclosed above for the most recent one , two , four , eight , or sixteen hour monitoring period . to this end , it will now be appreciated that ram 66 , shown in schematic in fig2 maintains and updates tables of averaged pulse transit time 84 data sets , the size of which tables correspond to available time period selections for sta display 24 and lta display 26 . while the particular muscle contraction monitor as herein shown and disclosed in detail is fully capable of obtaining the objects and providing the advantages herein before stated , it is to be understood that it is merely illustrative of the presently preferred embodiments of the invention and that no limitations are intended to the details of construction or design herein shown other than as defined in the appended claims .