embodiments of the invention relate generally to the field of duty cycle correction , and more particularly to method and apparatus for correcting duty cycle of a cmos level signal when converted from a current - mode - logic to a cmos level signal via a cml to cmos converter . the converter comprises a first differential pair unit to receive a cml level signal ; a second differential pair unit to receive the cml level signal ; and an embedded differential biasing unit , coupled with the first and the second differential pair units , to adjust drive strength of the first and second differential pair units based on a duty cycle of the cml level signal . the method for correcting duty cycle of the cmos level signal output comprises receiving by the first differential pair unit a cml level signal ; receiving by the second differential pair unit the cml level signal ; and adjusting drive strength of the first and the second differential pair units based on a duty cycle of the cmos level signal .