an integrated circuit includes a digital signal processor and an error correction co - processor that implements a viterbi decoding function . the dsp and eccp share a block of multi - port memory , typically by bus multiplexing a dual - port ram . when the eccp possesses the ram , it inhibits the dsp from accessing that block of the ram by asserting an ebusy flag . this technique conserves and optimizes the ram usage , allowing the dsp and eccp to advantageously be formed on the same integrated circuit chip .