a receiver circuit uses two or more comparators to detect the received data signal . each comparator is set to compare the data signal to a different reference signal . the output signals of the comparators are received into a detector circuit , which provides a third output signal that establishes the logic state of the received signal based on whether or not the output signals of the comparators are equal . depending on the logic state of the data signal , one of the comparators provides its output signal sooner than the other . each comparator may be implemented by a differential amplifier . in one embodiment , the reference signals are threshold voltages which may be provided by the tripping voltages at the trip points for the logic high and low states .