an apparatus and method for tracking and interception of instructions as they are presented to the memory , selectively passing harmless data to the device and disallowing the sequences which instruct the device to perform harmful functions , such as self - erase . a software trap is provided to be transparent to the operation of the device and the host system , imposing no harmful timing delays or software overhead . accordingly , the invention allows the use of standard electrically erasable read - only memories in an application which requires that the device be protected from global erasure . a hardware front end intercepts the software command which is used to globally erase the device . the apparatus receives address signals from the computer system corresponding to the protected peripheral device , receives data signals from the computer system to the protected peripheral device , tracks a predetermined sequence of address and address signals , substitutes at least one of the data signals received with a replacement data signal , and sends a replacement data signal .