a semiconductor structure has a semiconductor substrate and an nfet and a pfet disposed upon the substrate . the pfet has a semiconductor sige channel region formed upon or within a surface of the semiconductor substrate and a gate dielectric having an oxide layer overlying the channel region and a high - k dielectric layer overlying the oxide layer . a gate electrode overlies the gate dielectric and has a lower metal layer abutting the high - k layer , a scavenging metal layer abutting the lower metal layer , and an upper metal layer abutting the scavenging metal layer . the metal layer scavenges oxygen from the substrate and sige interface with the oxide layer resulting in an effective reduction in t inv and v t of the pfet , while scaling tinv and maintaining vt for the nfet , resulting in the v t of the pfet becoming closer to the v t of a similarly constructed nfet with scaled t inv values .