a method for forming wirings of an integrated circuit comprises a step of forming wirings on a substrate , a step of coating the wirings with a thin under metal layer , a step of coating the under metal layer with a mask except a part of the under metal layer , a first etching step of removing the under metal layer which is not coated by the mask to expose upper portions of at least ones of the wirings , an electroplating step of depositing a plating metal layer on the exposed upper portions , a step of removing the mask , and a second etching step of removing all of the remaining under metal layer , whereby said plating metal layer is formed by substantially same material as that of the exposed upper portions or by a material which can be closely contacted with the exposed upper portions and whereby said under metal layer is formed by a material which can be preferentially removed from the exposed upper portions .