in a semiconductor memory module having a plurality of drams , when an input command is detected as a refresh command according to external control signals externally input for command - execution to a register buffer , internal control signals for a partial number of the drams preliminarily selected among the plurality of drams are delayed . thus , the refresh command is executed with a time difference , and the semiconductor memory module prevents the plurality of dynamic semiconductor memories from simultaneously entering refresh modes to cause a great peak current to flow , and thereby implementing a stable operation .