a process for forming a semiconductor device comprises the steps of providing a semiconductor substrate assembly comprising a semiconductor wafer having an active area formed therein , a plurality of transistor gates each having a teos cap thereon and a pair of nitride spacers along each gate , a plurality of conductive plugs each contacting the wafer , and a bpsg layer overlying the transistor gates and contacting the active area . a portion of the bpsg layer is etched thereby exposing the teos caps . a portion of the bpsg layer remains on the active area after completion of the etch . subsequently , a portion of the teos caps are removed to expose the transistor gates and a titanium silicide layer is formed simultaneously to contact the transistor gates and the plugs . an inventive structure resulting from the inventive process is also described .