a field effect transistor is formed having wrap - around , vertically - aligned , dual gate electrodes . starting with a silicon - on - insulator structure having a buried silicon island , a vertical reference edge is defined , by creating a cavity within the soi structure , and used during two etch - back steps that can be reliably performed . the first etch - back removes a portion of an oxide layer for a first distance over which a gate conductor material is then applied . the second etch - back removes a portion of the gate conductor material for a second distance . the difference between the first and second distances defines the gate length of the eventual device . after stripping away the oxide layers , a vertical gate electrode is revealed that surrounds the buried silicon island on all four side surfaces .