a resistive non - volatile memory cell with a bipolar junction transistor access device formed in conjunction with the entire memory cell . the memory cell includes a substrate acting as a collector , a semiconductor base layer acting as a base , and a semiconductor emitter layer acting as an emitter . additionally , metal plugs and the phase change memory element are formed above the bjt access device while the emitter , metal plugs , and phase change memory element are contained within an insulating region . in one embodiment of the invention , a spacer layer is formed and the emitter layer is contained within the protective spacer layer . the spacer layer is contained within the insulating region .