a method of fabricating an integrated circuit having air - gaps between interconnect levels . in a preferred embodiment , an integrated circuit is partially fabricated . the partially fabricated integrated circuit includes a top layer , interconnect structures having a cladding layer , dielectric layers and an etch stop layer resistant to certain first types of etchants . the top layer of the integrated circuit is etched with a second type of etchant . the dielectric layers are then etched with one of the first types of etchants until the etch stop layer is reached . thus , portions of the interconnect structures are exposed to create interconnect islands surrounded by air . a cover is mechanically placed over the exposed interconnect islands to protect the integrated circuit from dust particles .