this invention discloses a dual port static random access memory cell , which comprises at least one inverter coupled between a positive supply voltage and a complementary low supply voltage and having an input and an output terminals , at least one pmos transistor with its gate , source and drain connected to the output terminal , vcc and input terminal , respectively , a write port connected to the input terminal and having a write - word - line , a write - enable and a write - bit - line , and a read port connected to either the input or output terminal and having a read - word - line and a read - bit - line .