a method for characterizing defects of integrated circuits on a semiconductor wafer includes storing at least one reference wafer map in a memory corresponding to a known defect pattern of the integrated circuits caused during a manufacturing step thereof , testing the integrated circuits for defects , generating a test wafer map for the semiconductor wafer comprising a pattern of each defective integrated circuit thereon , comparing the test wafer map to the at least one reference wafer map to determine if the known defect pattern is present in the test wafer map , and generating a new reference wafer map corresponding to the test wafer map if the test wafer map has an unknown defect pattern . an apparatus for characterizing defects of integrated circuit die on a semiconductor wafer is also provided .