this invention discloses a heterojunction type field effect transistor such as 2deg - fet and a heterojunction type bipolar transistor such as 2deg - hbt . the former is fabricated by applying to the formation of its source and drain regions a technique which causes the disorder of the heterojunction by introduction of an impurity such as by ion implantation or a technique which causes the disorder of the heterojunction by forming a film made of at least one kind of material selected from insulators , metals and semiconductors which have a different linear coefficient of thermal expansion from that of the material of a semiconductor substrate on the heterojunction semiconductor region which is to be disordered . the latter is fabricated by applying either of the techniques described above to a base ohmic contact region . these semiconductor devices can reduce the source - gate resistance and the parasitic base resistance . the invention discloses also the structure of the ohmic contact layer which has a trench on the surface thereof and is particularly effective for reducing the source - gate parasitic resistance .