three - dimensional nonvolatile memory devices include a substrate having a well region of second conductivity type therein and a common source region of first conductivity type on the well region . a recess is provided , which extends partially through the common source region . a vertical stack of nonvolatile memory cells are provided on the substrate . this vertical stack of nonvolatile memory cells includes a vertical stack of spaced - apart gate electrodes and a vertical active region , which extends on sidewalls of the vertical stack of spaced - apart gate electrodes and on a sidewall of the recess . gate dielectric layers are provided , which extend between respective ones of the vertical stack of spaced - apart gate electrodes and the vertical active region . the gate dielectric layers may include a composite of a tunnel insulating layer , a charge storage layer , a relatively high bandgap barrier dielectric layer and a blocking insulating layer having a relatively high dielectric strength .