a method for the manufacture of lsi complementary mos field effect transistor circuits to increase the latch - up hardness of the n - channel and p - channel field effect transistors while retaining good transistor properties by incorporating a further epitaxial layer and highly doped implantation regions into a lower epitaxial layer from which the wells are generated by out - diffusion into the upper epitaxial layer . in addition to achieving optimum transistor properties , the reduced lateral diffusion provided enables a lower n + / p + spacing , and thus achieves a higher packing density with improved latch - up hardness .