an improved system and method is disclosed for performing a design rule check on a proposed integrated circuit layout , and for creating customized design rule check command files . the individual layers of the ic are separated into different regions having different kinds of features . each different type of region is then analyzed in accordance with the customized design rule command file so that so - called “ false errors ” are eliminated . the invention thus improves , among other things , a development time for getting a design implemented in silicon .