an output preconditioning circuit with an output level latch is provided to precondition the output to an intermediate level and to clamp the output to that level before the actual data from a memory cell arrives at the output . since the actual data has to charge or discharge the output from some intermediate level rather than the maximum output swing level or the minimum output swing level , as in the normal case , this results in a reduced delay in charging or discharging the output . the output preconditioning circuit which may be coupled to a heavy load or a light load can eliminate oscillation of the output because of the output level latch . the preconditioning system includes a level sense circuit for sensing a voltage level of the circuit output and comparing the voltage level to two different reference voltages and a preconditioning circuit including a latch circuit for latching the values in response to the comparison and a driver - and - clamp circuit for clamping the circuit output to an intermediate voltage level when the values indicate that the circuit output is out of the desired range .