a circuit for maintaining the order of transmission of information in a computer interconnect including control circuitry for sending a signal from a source of data to a destination for data indicating that data is ready for transfer , the control circuitry comprising a plurality of buffers for storing information relating to the data , the information including information regarding the order in which the information was received by the control circuitry , means for incrementing the information regarding the order in which the information was received by the control circuitry , and apparatus for sending the information relating to the data to the destination for data in the order of receipt by the control circuitry .