a data transfer apparatus and method that can make efficient use of a memory and a common bus by controlling a dma controller through descriptor control , and can thereby achieve a data transfer with increased communication processing speed . the data transfer apparatus , which executes a dma transfer by controlling the dma controller through the use of a descriptor , includes : a first storage mechanism for storing descriptor common information that can be shared among a plurality of descriptors ; a second storage mechanism for storing descriptor individual information that differs for each individual descriptor ; and a conversion circuit for taking as inputs the descriptor common information read out of the first storage mechanism and the descriptor individual information read out of the second storage mechanism , and for outputting descriptor information to be supplied to the dma controller .