a data round - off device receives a digital input signal of m - bit form which has arithmetically been processed by addition , subtraction , multiplication , and division by an orthogonal transformer or predictive encoder is summed , if it is positive , with a value of 2 . sup . - 1 and if negative , with a value of 2 . sup . and the higher bits of a resultant sum signal are delivered as the output of the data round - off device . preferably , it is used for control of the number of bits if there is a difference in the number of bits between the data output of an orthogonal transformer and the data input of an encoder for encoding the data output of the orthogonal transformer .