an interface circuit for coupling the output of an integrated circuit designed for a relatively low supply voltage to a circuit designed to operate at a higher supply voltage employs a cascoded architecture and makes use of two purposely derived reference voltages . the circuit comprises a level rising stage , an output buffer stage , an overdrive stage for the pull - up device of the output buffer and a drain follower stage , the pull - up element of which is driven by a second output node of the level rising stage and the pull - down element of which is driven by the inverted input data stream .