a cmos device formed with a silicon on insulator technology with reduced drain induced barrier lowering characteristics and a method for producing the same . the method involves a high energy , high dose implant of boron and phosphorus through the p - and n - wells , into the insulator layer , thereby creating a borophosphosilicate glass structure within the insulation layer underlying the p - and n - wells of the soi wafer . backend high temperature processing steps induce diffusion of the boron and phosphorus contained in the bpsg into the p - and n - wells , thereby forming a retrograde dopant profile in the wells . the retrograde dopant profile reduces dibl and also provides recombination centers adjacent the insulator layer and the active layer to thereby reduce floating body effects for the cmos device .