an adaptive threshold logic circuit is provided in which the switching threshold levels of the logic circuit are automatically changed to accommodate variations in the level of applied data signals to the switching circuit . a detector stage detects the voltage level of the incoming data signals and selectively adjusts the threshold level of a threshold adaptor stage in accordance with the output of the detector stage . the threshold adaptor stage is essentially an adaptive cmos inverter having various switching paths turned on or off in accordance with the output of the detector stage .