an output driver circuit for fast memories and microprocessors and the li the driver circuit is responsive to a binary input voltage and includes first and second signal control paths respectively coupled to a pair of series connected output stage transistors coupled between two high and low reference voltages and switched alternately between conducting and non - conducting states in mutual opposition to provide a binary output voltage substantially equal to either of the two reference voltages depending upon the binary state of the input voltage . additionally included is an anticipatory circuit having means responsive to both an externally applied precharge signal and a feedback signal corresponding to the binary state of the output voltage which alternately predrive the transistors close to their respective conducting switching points for increasing the speed of transition of the transistors between conductive and non - conductive states .