disclosed is a serial access memory and a method of writing in said memory comprising at least one matrix of memory cells , a clock signal input terminal receiving a clock signal , a data input terminal receiving a defined number of data bits in series and a selection terminal receiving a selection signal , said method being initialized when the selection signal changes state from a first state to a second state . the writing in the matrix of memory cells occurs only if the selection signal goes from the second state to the first state during a window located just after the last of the data bits has been received .