a structure and method of fabricating reversible fuse and antifuse structures for semiconductor devices is provided . in one embodiment , the method includes forming at least one line having a via opening for exposing a portion of a plurality of interconnect features ; conformally depositing a first material layer over the via opening ; depositing a second material layer over the first material layer , wherein the depositing overhangs a portion of the second material layer on a top portion of the via opening ; and depositing a blanket layer of insulating material , where the depositing forms a plurality of fuse elements each having an airgap between the insulating material and the second material layer . the method further includes forming a plurality of electroplates in the insulator material connecting the fuse elements . in another embodiment , the method includes depositing a first and a second material layer on a semiconductor substrate , wherein the second material layer having a higher electrical conductivity than the first material layer ; selectively etching the first and second material layer to create at least one constricted region to facilitate electromigration of the second material ; wherein the electromigration creates a plurality of micro voids ; and forming a plurality of electrical contacts on the second material layer .