the present invention relates generally to a new scheme of providing a seal for semi - conductor substrates and chip carriers . more particularly , the invention encompasses a structure and a method that uses a multi - layer metallic seal to provide protection to chips on a chip carrier . this multi - layer metal seal provides both enhanced hermeticity lifetime and environmental protection . for the preferred embodiment the multi - layer metallic seal is a two layer , solder structure which is used to create a low cost , high reliability , hermetic seal for the module . this solder structure has a thick high melting point temperature region that is attached to a cap , and a thin interconnecting region of lower melting point temperature region for sealing the substrate to the cap .