an apparatus for operating on the contents of an input register to generate the contents of an output register which contains a permutation , with or without repetitions , or a combination of the contents of the input register . the apparatus partitions the input register into a plurality of sub - words , each sub - word being characterized by a location in the input register and a length greater than one bit . in response to an instruction specifying a rearrangement of the input register , the present invention directs at least one of the sub - words in the input register to a location in the output register that differs from the location occupied by the sub - word in the input register . the ordering of the sub - words in the output register differ from the order obtainable by a single shift instruction . in the preferred embodiment of the present invention , the invention is implemented by modifying a conventional shifter comprising a plurality of layers of multiplexers . the modification comprises independently setting the control signals for at least one of the multiplexers in at least one of the layers .