a mechanism is provided to reuse functional data buffers . with extreme data rate dynamic random access memory , test patterns are employed to dynamically calibrate data with the clock . to perform this task , data buffers are employed to store data and commands for the calibration patterns . however , there are different procedures and requirements for transmission and reception calibrations . hence , to reduce the amount of hardware needed to perform transmission and reception calibrations , the data buffers employ additional front end circuitry to reuse the buffers for both tasks .