a semiconductor memory device including : a package ; a first semiconductor chip provided in the package ; a first nonvolatile memory provided on the first semiconductor chip ; a second semiconductor chip provided in the package ; a second nonvolatile memory provided on the second semiconductor chip ; a system bus provided in the package , the system bus connecting the first and second nonvolatile memories ; a plurality of data terminals exposed to outside of the package , the data terminals being connected to the first and second nonvolatile memories through the system bus ; and an enable terminal exposed to the outside of the package , the enable terminal being connected to the first and second nonvolatile memories .