disclosed are novel methods and apparatus for efficiently providing power buses and bump patterns with reduced inductance and / or resistance . in an embodiment , an apparatus is disclosed . the apparatus includes a plurality of power and ground bus pairs . each power and ground bus pair may have a power bus and a ground bus . the apparatus further includes a first power bus from a first pair of the plurality of power and ground bus pairs . the first power bus may include a plurality of power bumps . the apparatus also includes a first ground bus from the first pair of the plurality of power and ground bus pairs . the first ground bus may include a plurality of ground bumps . each of the plurality of power / ground bumps may be substantially equidistance from any immediately neighboring ground bump of the first ground bus .