a cmos device includes first and second wells formed in first and second regions of a semiconductor substrate , respectively . first and second transistors are formed in the respective wells . a third transistor is formed in a third region of the semiconductor substrate outside of the wells . a first impurity layer is formed in the vicinity of the depletion region of at least one but not more than two of the first , second , and third regions , and a second impurity layer , deeper than the first impurity layer , is formed in the region of the substrate in which the first impurity layer is not formed . a method for manufacturing such a cmos device enables the punch - through voltage characteristics of the first , second , and third transistors to be optimally different , without requiring any additional , separate mask processing steps .