a memory system includes multiple memory banks and multiple ports , wherein n is greater than or equal to m . each of the memory banks is coupled to each of the ports . access requests are transmitted simultaneously on each of the ports . however , each of the simultaneous access requests specifies a different memory bank . each memory bank monitors the access requests on the ports , and determines whether any of the access requests specify the memory bank . upon determining that an access request specifies the memory bank , the memory bank performs an access to an array of single - port memory cells . simultaneous accesses are performed in multiple memory banks , providing a bandwidth equal to the bandwidth of one memory bank times the number of ports . an additional level of hierarchy may be provided , which allows further multiplication of the number of simultaneously accessed ports , with minimal area overhead .