a method of reducing gated diode leakage in trench capacitor type field plate isolated dynamic random access memory devices is disclosed . trenches are etched into a face of a body of semiconductor material . storage nodes surrounding the trenches are created . a polysilicon layer is formed on the trench walls . a storage dielectric layer is formed on the trench walls , adjacent to the layer of polysilicon on the trench walls , so that the layer of polysilicon on the trench walls lies between the storage dielectric layer and the storage node . the layer of polysilicon on the trench walls reduces leakage current from the storage node . a trench type field plate isolated random access memory cell structure is also disclosed .