a computer system identifies active nets in a netlist of a circuit design by performing simulation of the netlist . active nets are interconnections between circuit components showing a level of activity during the simulation . the computer system extracts , from a layout of the circuit design , a parasitic netlist of a part of the circuit design , where the part determined by the active nets . the parasitic netlist is a list of parasitic nets , or unwanted circuit interconnections that are unavoidable adjuncts of the active nets . the computer system performs simulation of the circuit design including the netlist of a circuit design and the parasitic netlist of the part of the circuit design .