a structure and method of fabricating a metallization fuse line is disclosed . the structure can be formed on a semiconductor substrate , including an insulator structure formed on the substrate , the insulator structure having an upper layer and a lower layer , the upper being thinner than the lower , the insulator structure having a plurality of openings of varying depth , and a metal structure inlaid in the insulator structure , the metal structure having first and second portions and a third portion there between that is substantially more resistive than the first and second portions , the third portion having a thickness substantially - similar to the thickness of the upper layer of the insulator structure . the upper layer includes a nitride , the lower layer includes an oxide and the metal structure includes copper . the fuse structure allows formation of “ easy to laser delete ” thin metal fuses within segments of thick metal lines . this applies to wiring layers formed from “ high ” melting temperature metals and those defined using a damascene process . for example , copper back end of line damascene wiring , as used with cmos can use the invention . the technique achieves high yield fusing for technologies that use thick wiring layers . the structure separates the thickness of the fuse segment from the remainder of the wiring line . the structure can be used with very thick , e . g ., & gt ; 1 . 2μ wiring and very thin , e . g ., & lt ; 0 . 5μ fuses .