a metal layer is deposited on the patterned semiconductor material layer containing a cathode semiconductor portion , a fuselink semiconductor portion , and an anode semiconductor portion . the metal layer may be patterned so that a middle portion of the fuselink semiconductor portion has a thin metal layer , which upon annealing produces a thinner metal semiconductor alloy portion than surrounding metal semiconductor alloy portion on the fuselink semiconductor portion . alternatively , a middle portion of the metal semiconductor alloy having a uniform thickness throughout the fuselink may be lithographically patterned and etched to form a thin metal semiconductor alloy portion in the middle of the fuselink , while thick metal semiconductor alloy portions are formed on the end portions of the fuselink . the resulting inventive electrical fuse has interfaces at which a thinner metal semiconductor alloy abuts a thicker metal semiconductor alloy in the fuselink to enhance the divergence of electrical current .