a modular multiplication method implemented in an electronic digital processing system takes advantage of the case where one of the operands w is known in advance or used multiple times with different second operands v to speed calculation . the operands v and w and the modulus m may be integers or polynomials over a variable x . a possible choice for the type of polynomials can be polynomials of the binary finite field gf . once operand w is loaded into a data storage location , a value p =└ w · x n + δ / m ┘ is pre - computed by the processing system . then when a second operand v is loaded , the quotient q ̂ for the product v · w being reduced modulo m is quickly estimated , q ̂=└ v · p / x n + δ ┘, optionally randomized , q ′= q ̂− e , and can be used to obtain the remainder r ′= v · w − q ′· m , which is congruent to mod m . a final reduction can be carried out , and the later steps repeated with other second operands v .