the present invention is directed to a semiconductor integrated circuit automatic lay - out method using a cell group constituted of a core cell in which a transistor and / or a logic gate are arranged and a wiring cell through which a power line and an inter - cell signal line between the core cells pass , comprising the steps of using the core cell and the wiring cell in an environment in which the number of grids for the inter - cell signal line is arbitrarily set in initial setting for automatic lay - out ; detecting the number of the inter - cell signal lines which pass through the wiring cell of data obtained through cell arrangement and wiring processing ; comparing the detected number of the inter - cell signal lines to the number of the initially set grids ; and if the number of the grids is excessive or insufficient , replacing an initially set wiring cell with a wiring cell having the detected number of inter - cell signal lines .