as part of a memory array , a circuit is provided for altering the drive applied to an access transistor that regulates electrical communication within the memory array . in one embodiment , the circuit is used to alter the drive applied to a sense amp &# 39 ; s voltage - pulling transistor , thereby allowing modification of the voltage - pulling rate for components of the sense amp . a sample of test data is written to the memory array and read several times at varying drive rates in order to determine the sense amp &# 39 ; s ability to accommodate external circuitry . in another embodiment , the circuit is used to alter the drive applied to a bleeder device that regulates communication between the digit lines of the memory array and its cell plate . slowing said communication allows defects within the memory array to have a more pronounced effect and hence increases the chances of finding such defects during testing . the circuit is configured to accept and apply a plurality of voltages , either through a contact pad or from a series of discrete voltage sources coupled to the circuit .