a pixel modulation apparatus for converting pixel data d composed of n 1 bits to a pixel data signal composed of one bit . the pixel data d is input into the apparatus at a pixel period t 0 . the apparatus includes a first data conversion unit which converts the pixel data d to pixel data d 1 expanded to n 2 bits at the period t 0 , a second data conversion unit which converts the pixel data d 1 to pixel data d 2 composed of n 3 / m bits at a period t 0 / m , a third data conversion unit which inputs n data from among the pixel data d 2 and pixel data dd 2 constituting the pixel data d 2 before having the period t 0 / m to execute logical sum operations a predetermined number of times to convert the n data to pixel data d 3 composed of n 3 bits , including additional data corresponding to the predetermined number , and a fourth data conversion unit which converts the pixel data d 3 to the pixel data signal composed of one bit at the period t 0 / m .