an electrically erasable programmable read only memory memory array is disclosed . the memory array includes a plurality of memory cells arranged in rows and columns . each memory cell has a switch , an access transistor , and a sense transistor . a current path of each access transistor is connected in series with a current path of each respective sense transistor . a first program data lead is connected to the switch of each memory cell in a first column . a bit line is connected to the current path of each access transistor in the first column . a read select lead is connected to a control terminal of each access transistor in the first row . a first row select lead is connected to a control terminal of the switch in each memory cell in a first row .