a noise suppression interface circuit , using field effect transistors of mos type , for non - superimposed two - phase timing signal generators is described . the upper level and the lower level of the output timing signals are determined by the potentials of two circuit nodes which are respectively coupled , by a first transistor and a second transistor , operating at saturation , to a first supply terminal and a second supply terminal having potentials which are respectively equal and opposite to a common potential . the circuit nodes are both coupled to the common potential by identical number of transistors each coupled in a diode configuration .