a ceramic - glass integrated circuit package utilizing low temperature sealing glass and having reduced lead to lead capacitance . the inventive package includes a cap and a base . the base includes a ceramic base substrate and a layer of conductive material adjacent the ceramic base substrate to serve as a ground plane . a glass material is selectively deposited on the base substrate to form at least one discrete void for housing an integrated circuit chip , and a lead frame having a plurality of leads is embedded in the glass material and electrically connected to the ground plane but physically separated therefrom . incorporation of a ground plane into a ceramic - glass integrated circuit package adapts these low cost packages to high - speed applications .