a high aperture ratio emissive tiled display comprised of a plurality of tiles including a substrate with discrete layers of integrated drive circuits , thin film transistors , circuit conductor layer and light - emitting pixel array wherein all the electronic circuitry is contained under the pixel array . vertical interconnects are made between the drive circuits , circuits and pixel electrodes , as necessary , and can include vertical interconnections through the substrate . large flat panel displays including at least two of said tiles are aligned to maintain pixel pitch from one tile to another to produce a seamless image .