a thin film transistor liquid crystal display pixel structure comprising : a gate line and a gate electrode formed on a substrate ; a first insulating layer , a semiconductor layer , and a doped semiconductor layer formed sequentially on the gate electrode and the gate line , wherein an isolating groove is formed above the gate line which disconnects the semiconductor layer on the gate line ; a second insulating layer covering the isolating groove and a portion of the substrate where the gate line and the gate are not formed ; a pixel electrode formed on the second insulating layer , wherein the pixel electrode is integral with a drain electrode and is connected with the doped semiconductor layer on the gate electrode at a place where the drain electrode is formed ; a source electrode , which is a portion of a data line , formed on the doped semiconductor layer ; and a channel formed between the source electrode and the drain electrode .