the present invention allows a verification environment to be used to control and coordinate interaction with a design running on an accelerator or emulator without significant speed penalty . for example , an interface capable of communicating with test software running on an embedded processor is used to control and monitor the flow of data into the external interface of the design . thus , a connection is made between the verification environment and the design under test running on the accelerator / emulator via a connection formed directly between the verification environment and embedded software running on the emulator for simulation and monitoring purpose at a very low frequency so that high - speed acceleration may still be achieved .