an apparatus for use with a host computing system for controlling access to a first data bus which is external of the host computing system and which first data bus is operatively connected with a second data bus internal of the host computing system . the apparatus comprises a local processing unit which is configured substantially the same as the host processing unit and is driven by a separate local program distinct from the host processing program driving the host processing unit . the apparatus further comprises a supplemental processing circuit for processing information , which supplemental processing circuit is responsive to the host processing unit and to the local processing unit to determine whether the host processing unit or the local processing unit has operative access to the first data bus . in its preferred embodiment , the first data bus and the second data bus are operatively connected by a configurable buffer circuit for effecting data bus connection . further , in the preferred embodiment of the present invention , the supplemental processing circuit generates an intervention signal in response to the local processing unit , the buffer circuit responding to the intervention signal by configuring appropriately to provide operative access by the apparatus of the second data bus .