a circuit for producing multiple pulse width modulated outputs . the circuit includes a logic device for each pulse width modulated output . each of the logic devices includes a first input , a second input , and a clock input , and each of logic device produces a logical high output in response to a logical high at its first input in coincidence with a clock signal at its clock input . the logical high output of the logic device remains high until a logical high is applied at its second input in coincidence with a clock signal at the clock input , whereupon the logic device produces a logical low output . the logical low output of the logic device remains low until a logical high is again applied at its first input in coincidence with a clock signal at the clock input . the circuit includes programmable circuitry for selectively applying logical high and low signals to the first and second inputs of the logic devices .