an output buffer circuit for preconditioning an output signal at an output node so as to provide a higher speed of operation and less ground bounce noise includes an output buffer stage , a precondition feedback circuit , an output predriver , an output tristate control circuit , and an output state retention circuit . the output pre - driver with input equalization , which is also part of precondition control , combined with the output buffer stage designed with its threshold voltage matching component &# 39 ; s input and output threshold voltage such that the output feedback , which bring the output and the input nodes of the output buffer stage together , will drive the output level to the threshold point enabled by the precondition signals before the data input signals arrive . the output buffer noise can be reduced by slowly driving output level to the output threshold point about three to four nanoseconds earlier than the data input signals arrive . the output state retention circuit is provided to help in minimizing the output glitch which occurs during output high - to - high or output low - to - low transition .