a method of controlling an apparatus including a processor including a plurality of cores , the method includes , when a number of the cores to be activated is m , determining whether or not a first power consumed by the m activated core is within a range of a second power to be consumed when the number of the cores to be activated is m + n , and when the first power is out of the range of the second power , prohibiting to increase the number of the cores to be activated from m to m + n .