a dc braking system for an inverter - driven induction motor , . when a braking command occurs , the normal gating sequence of the inverter stops . mode 1 of the braking procedure starts . in mode 1 , two semiconductor phase switches of the group connected with one of the dc buses and the semiconductor switch of the third phase that is connected with the other dc bus are latched in a conducting state . the motor essentially receives dc current , which increases until it actuates a current limit device , clearing the latch . then all six switches are turned off . that drives the motor current through the back - biased parallel diodes . the negative dc bus voltage is available to suppress motor current despite large motor speed voltages . the apparatus repeats the mode 1 procedure for a predetermined time interval , after which mode 2 of the braking procedure starts . in mode 2 , just as in mode 1 , two switches of one bus and one switch of another bus conduct until an overcurrent limit is reached . then the one switch which is connected to a different bus turns off and its complement turns on , allowing motor current to circulate in the motor windings . this allows current to decay at a slower rate than it would in mode 1 . the procedure of mode 2 is repeated for a predetermined time interval . if the motor speed is below a predetermined threshold when the braking command occurs , mode 1 is skipped and only mode 2 is used .