a system for determining the logic state of a resistive memory cell element , for example an mram resistive cell element . the system includes a controlled voltage supply , an electronic charge reservoir , a current source , and a pulse counter . the controlled voltage supply is connected to the resistive memory cell element to maintain a constant voltage across the resistive element . the charge reservoir is connected to the voltage supply to provide a current through the resistive element . the current source is connected to the charge reservoir to repeatedly supply a pulse of current to recharge the reservoir upon depletion of electronic charge from the reservoir , and the pulse counter provides a count of the number of pulses supplied by the current source over a predetermined time . the count represents a logic state of the memory cell element .