a ferroelectric memory device includes : a memory cell having a transistor and a ferroelectric capacitor connected in series between a bit line and a plate line , and a connecting section below the ferroelectric capacitor ; a dummy cell having a transistor , a ferroelectric capacitor and a connecting section , wherein the dummy cell has an electrically disconnected section among the bit line , the transistor , the ferroelectric capacitor , the connecting section and the plate line .