a semiconductor device is provided for controlling entry to and exit from a power down mode of a semiconductor memory comprising ; a plurality of voltage generators for providing operating voltages to the semiconductor memory ; a dpd controller for detecting a dpd condition and generating a dpd signal to control the application of the operating voltages to the semiconductor memory ; and biasing circuitry for biasing a plurality of nodes of at least one of the plurality of voltage generators to at least one predetermined voltage potential to prevent false triggering of circuits upon entry / exit of dpd mode . also provided is a semiconductor device , comprising : a plurality of input buffers for buffering a plurality of dpd - type signals for signaling a power down condition including a dpd enter / exit signal : an auxiliary buffer for separately buffering the dpd enter / exit signal ; a plurality of voltage generators for supplying operating voltages to internal circuit ; dpd control circuit for receiving the dpd - type signals to decode dpd enter and exit commands and for outputting a voltage generator control signal to turn off the voltage generators when dpd enter command is decoded , and to turn off the plurality of buffers excluding the auxiliary buffer ; and an auto - pulse generator for generating a voltage pulse upon receiving the dpd exit command to initialize internal circuits of the semiconductor device .