an apparatus and process are described that allow electroplating to fill sub - micron , high aspect ratio semiconductor substrate features using a non - copper / pre - electroplating layer on at least upper portions of side walls of the features , thereby providing reliable bottom up accumulation of the electroplating fill material in the feature . this apparatus and process eliminates feature filling material voids and enhances reliability of the electroplating in the diminishing size of features associated with future technology nodes of 22 , 15 , 11 , and 8 nm . the presence of non - copper pre - electroplating material on the side walls allows the feature whose side walls , but not bottom surface , are lined with such pre - electroplating material to fill the feature using electroplated fill material accumulating from the bottom of the feature up to reliability and predictability and substantially void - free .