design data including circuit data on a test point and information about a test mode , which has been attached to the test point , is inputted to an apparatus for designing a semiconductor integrated circuit . a design data code analysis unit in a data input unit performs the code analysis of the design data and , after the code analysis , the resulting design data is stored by a database storage unit in a storage device . a test point deletion unit receives the test mode specified from the outside and deletes data on an unnecessary test point from the design data stored in the storage device . the design data which does not include the unnecessary test point is outputted from a data output unit . accordingly , even when the test mode is changed , there is no need to calculate the test efficiency again in response to each change or add the step of inserting a new test point .