the invention is a positive peak level comparator for generating a positive peak pulse when a tes is higher than a predetermined positive level , a negative peak level comparator for generating a negative peak pulse when the tes is lower than a predetermined negative level , and a logic circuit for generating an output pulse when said positive peak pulse and said negative peak pulse have been alternately input thereto . the arrangement prevents the tes from being miscounted even if the tes is distrubed due to the occurrence of , for example , a noise at a level close to either said predetermined positive level or said predetermined negative level and either said peak pulse or said negative pulse is successively generated .