provided is a method for chip packaging , including the steps of : providing a semi - packaged wafer which has a cutting trail and a metal bonding pad of the chip ; forming on the metal bonding pad a sub - ball metal electrode , using a selective formation process ; forming a protective layer on the wafer in a region not including the sub - ball metal electrode , with the protective layer covering the cutting trail ; forming a solder ball on the sub - ball metal electrode ; dicing the wafer along the cutting trail . the present invention can prevent metal in the cutting trail from being affected during the production of the sub - ball metal electrode , and protect the lateral sides of a discrete chip after cutting . the process flow thereof is simple , and enhances the efficiency of the packaging as well as its yield .