a random access memory includes a plurality of one - transistor storage cells . a plurality of sense - write conductors are included , each connected to a plurality of storage cells in a row of storage cells . a plurality of regenerative sense amplifiers are each coupled to two sense - write conductors . a one - transistor dummy storage cell is connected to each sense - write conductor . read - write circuitry is coupled between a data conductor of the memory chip and a storage node of one of the dummy storage cells of each row of storage cells . the dummy storage cell is selected whenever a storage cell on the opposite side of the regenerative sense amplifier is selected . charge initially stored in the selected storage cell is redistributed on the opposite sense - write conductor and is subsequently amplified by the sense amplifier , and produced in inverted amplified form at the storage node of the dummy storage cell . capacitive loading on all of the sense - write conductors of the memory chip during redistribution of charge in the selected storage cell is thereby reduced , thereby increasing the magnitude of the sense - write conductor voltage transitions when a storage cell is selected .