a decimator is used to process a multi - channel audio signal , and includes a memory , a controller and a processing unit . the processing unit is used to decimate each input audio component of a multi - channel audio signal to generate corresponding multi - channel operational data . the controller is used to control read and write actions for each audio component of the multi - channel audio signal and the multi - channel operational data into or from the memory . the memory provides a digital signal process for decimation together with the processing unit . the input of the multi - channel audio and the output of the multi - channel operational data are performed through time division . compared with conventional decimator circuits , the decimator circuit of the present invention reduces the cost and the power consumption of the hardware circuitry .