a 3d stacked multichip module comprises a stack of w ic die . each die has a patterned conductor layer , including an electrical contact region with electrical conductors and , in some examples , device circuitry over a substrate . the electrical conductors of the stacked die are aligned . electrical connectors extend into the stack to contact landing pads on the electrical conductors to create a 3d stacked multichip module . the electrical connectors may pass through vertical vias in the electrical contact regions . the landing pads may be arranged in a stair stepped arrangement . the stacked multichip module may be made using a set of n etch masks with 2 n - 1 being less than w and 2 n being greater than or equal to w , with the etch masks alternatingly covering and exposing 2 n - 1 landing pads for each mask n = 1 , 2 . . . n .