this relates to an apparatus for performing single error correction , double error detection of binary words , each section of the apparatus processing one byte of raw data . each section includes first logic means for producing a first plurality of intermediate sector matrix parity outputs . a second logic means receives one of the first plurality of intermediate sector matrix parity outputs and a second plurality of intermediates matrix parity outputs from other sections and generates therefrom a syndrome signal . a third logic means receives this syndrome signal and syndrome signals from other sections and generates therefrom the corrected data bits .