the invention encompasses methods of forming dram constructions , methods of forming capacitor constructions , dram constructions , and capacitor constructions . the invention includes a method in which a ) a first layer is formed over a node location ; b ) a semiconductive material masking layer is formed over the first layer ; c ) an opening is formed through the semiconductive material masking layer and the first layer to the node location ; d ) an upwardly open capacitor storage node layer is formed within the opening ; e ) a storage node is formed from the masking layer and the storage node layer ; and f ) a capacitor dielectric layer and a capacitor plate are formed over the storage node . the invention also includes a capacitor structure comprising : a ) an insulative layer over a substrate ; b ) a polysilicon layer over the insulative layer ; c ) an opening extending through the polysilicon layer and the insulative layer to a node , the opening comprising an upper portion and a lower portion , the upper portion comprising a first minimum cross - sectional dimension and the lower portion comprising a second minimum cross - sectional dimension which is narrower than the first minimum cross - sectional dimension , the opening further comprising a step at an interface of the upper and lower portions ; d ) a spacer over the step ; e ) a storage node layer over the spacer , polysilicon layer and the node ; and f ) a dielectric layer and a cell plate layer capacitively coupled to the storage node layer .