a semiconductor device having at least one semiconductor chip loaded on a lower surface of a printed circuit board , electrode terminals of the semiconductor chip wire - bonded to terminals on the printed circuit board , and a connection portion of the semiconductor chip and wires encapsulated by means of encapsulating resin includes a semiconductor device of three - dimensional structure having the printed circuit board reversely mounted , the terminals of the printed circuit board connected to external terminals via through holes , and at least one semiconductor device stacked on an upper surface of the printed circuit board , thereby interconnecting respective semiconductor devices while interposing solder balls to be mounted to other printed circuit boards by leads being the external terminals . thus , a ball grid array package able to be stacked inside a small out - line j - lead package is used for performing interconnection to make the bga overcome a typically two - dimensional flat mounting and attain a three - dimensional surface mounting structure while being perfectly compatible with a currently - available mounting process on the main substrate , thereby improving mounting efficiency .