when errors arise in a computing system that has plural modules , this invention corrects those errors . in the first instance , the invention excludes the computing system itself , but receives error messages from the plural modules of that system — along plural receiving connections , respectively . plural sending connections return corrective responses to plural modules of that system , respectively . in a second instance , the invention further incorporates that system . the invention is hierarchical : plural levels or tiers of apparatus and function are present — a first one directly serving that system as described above , and others that analogously serve the first tier of the invention — and then also the subsequent tiers , in a cascading or nested fashion , down to preferably a bottom - level tier supporting all the upper ones . each level preferably controls power interruption and restoration to higher levels . ideally the hierarchy is in the form of a “ system on chip ”.