the present invention provides a lateral igbt transistor comprising a bipolar transistor and an igfet . the lateral igbt comprises a low resistive connection between the drain of the igfet and the base of the bipolar transistor , and an isolating layer arranged between the igfet and the bipolar transistor . the novel structure provides a device which is immune to latch and gives high gain and reliability . the structure can be realized with standard cmos technology available at foundries .