the present invention provides a flash memory integrated circuit and a method for fabricating the same . the method includes etching a gate stack that includes an initial oxide layer directly in contact with a silicon layer , defining an oxide - silicon interface therebetween . by exposing the etched gate stack to elevated temperatures and a dilute steam ambient , additional oxide material is formed substantially uniformly along the oxide - silicon interface . polysilicon grain boundaries at the interface are thereby passivated after etching . in the preferred embodiment , the interface is formed between a tunnel oxide and a floating gate , and passivating the grain boundaries reduces erase variability due to enhanced charge transfer along grain boundaries . at the same time , oxide in an upper storage dielectric layer is enhanced in the dilute steam oxidation . thermal budget can be radically conserved by growing thin oxide layers on either side of a nitride layer prior to etching , and enhancing the oxide layers by dilute steam oxidation through the exposed sidewall after etching . the thin oxide layers , like the initial tunnel oxide , serve as diffusion paths to enhance uniform distribution of oh species across the buried interfaces being oxidized .