a digital system and a method for operating the same . the digital system includes a first logic circuit and a second logic circuit , a first register , a second register , a third register , a clock generator circuit , and a controller circuit . the first logic circuit is capable of obtaining first data and sending second data . the second logic circuit is capable of obtaining the second data and sending third data . the clock generator circuit is capable of asserting a first register clock signal at a first time point , a second register clock signal at a second time point , and a third register clock signal at a third time point . the controller circuit is capable of determining a fourth time point , determining a fifth time point , controlling the clock generator circuit to assert the second register clock signal .