a method of forming a package on package , semiconductor package arrangement is described . in one aspect , solder bumps on a lower surface of a first grid array package substrate are fused to corresponding unencapsulated solder bumps on an upper surface of a second grid array package substrate . the fused solder bumps form solder joints that electrically connect the first and second packages . the height of the resulting solder joints is greater than a height of a die that is flip chip mounted to the second substrate such that the first substrate does not contact any portion of the second package and an air gap is formed that separates the second die from the first package . corresponding pop packages structures are also described .