a self - cascoding transconductance circuit has cascoding and current sink / source fets , serially connected with their gates tied together to receive an input voltage , wherein the cascoding fet has a threshold voltage having an absolute value at least 0 . 1 volts less than that of the current sink / source fet to ensure that the current sink / source fet operates in its saturated region . a cmos structure implementing the self - cascoding transconductance circuit has two doped threshold adjust regions formed beneath a gate electrode such that the two doped threshold adjust regions respectively effectuate the cascode and current sink / source fets which then share the gate electrode . a method of forming the cmos structure includes forming two self - cascoding transconductance circuits electrically connected in parallel such that they share a common drain region between their respective gate electrodes , and each has one source region . by forming the two self - cascoding transconductance circuits in such a fashion , the effect of alignment errors contributed by each of the parallel connected self - cascoding transconductance circuits is cancelled out for the combined circuit .