a method of performing tie net routing within an integrated circuit chip is disclosed without using wiring . due to repeated use of designs in modern chip , there are often unused portions of the design that need to be connected permanently to a local logical1 or logical 0 . these connections , known as tie nets , are not timing critical signals that , when poorly implemented can get in the way of functional signals in an integrated circuit . the current method is to connect the pin to the nearest power connections of the correct polarity . this requires some amount of wiring resources that may be needed for other functions or pin access . accordingly , the present invention avoids this situation by avoiding wiring .