a bootstrap circuit with a word line of a semiconductor memory device comprises a bootstrap unit having a bootstrap capacitor coupled at one electrode thereof to an output node and supplied from an input node with an input signal , and responsive to a booting signal of a power voltage level supplied to the other electrode of the bootstrap capacitor for bootstrapping an output voltage at the output node over the power voltage to a first predetermined level in cooperation with a load capacitor ; a constant voltage source operative to produce a second predetermined voltage level higher than the low voltage level and lower than the booting signal ; and a switching unit operative to supply the booting signal to the other electrode in the presence of the input signal and to feed the second predetermined voltage level to the other electrode in the absence of the input signal , wherein the other electrode of the bootstrap capacitor varies the voltage level between the power voltage level and the second predetermined voltage level so that the output node is saturated at the first predetermined voltage level through the bootstrapping phenomenon only .