a general purpose communications processor for communicating data between an asynchronous data terminal and a synchronous data communication facility , includes a transmit module , having a transmit processor , an input serial communication controller , for receiving a serial asynchronous data input from the data terminal , and stripping start and stop bits from each received byte , a transmit buffer , operatively connected to the controller , for temporarily storing the data , an adder for adding at least a control byte to the data , and an output serial communications controller for outputting the data and control byte to the synchronous data communication facility ; and a receive module , having a receive processor , a second input serial communications controller for receiving a synchronous input from the synchronous data communication facility , a receive buffer , operatively connected to the second input controller , for temporarily storing the incoming synchronous data bytes , a framing circuit for adding start and stop bits to the synchronous data bytes , and a second output serial communications controller for outputting the data to the asynchronous data terminal .