a complete solution to block noise from edram macro to the analog core , and vice verse , in a system - on - chip ic design . specifically , there is provided a first isolated triple well structure formed in the ic for reducing noise component resulting from operative elements of a dc generator circuit fabricated therein ; and , a second isolated triple well structure formed in the ic for reducing noise component resulting from operative elements of a noise sense amplifier bank and dram arrays fabricated therein . a power supply source is provided for supplying power to each dc generator circuit , noise sense amplifier bank and dram array ; as is a power bus for providing power and a separate power bus for providing a ground to each of the dc generator circuit , and the noise sense amplifier circuit and dram array components . in this manner , noise contamination with noise sensitive devices in said ic is reduced and , further noise contamination of the dram array as sourced from the ic is reduced .