a phase change memory system includes m phase change memory cells , where m is an integer greater than or equal to one . a write module selectively writes at least one of the m phase change memory cells based on a write parameter . a read module selectively reads back a resistance value for the at least one of the m phase change memory cells . a control module communicates with the write module and the read module and triggers write / read cycles n times where n is an integer greater than one . the control module also adjusts a write parameter of one of the n write / read cycles based on at least one prior resistance value and a target resistance value .