described herein are the methods the cact and tg non - volatile program erase methods , for programming and erasing nvm cells . this combination allows use of low voltage methods for program , and erases . the typical cell described uses the “ channel accelerated carrier tunneling method for programming memories ” for accumulating one type of carriers in the floating gate , and another method , the tunnel gun method , for accumulating the other type of carriers in the floating gate of the cells . these methods use low applied voltages to program and erase the non - volatile memory cell . the proposed catt cells by elimination of high voltage requirements are scalable with technology and easily manufacturable using current processes technologies . these cells also have multi - bit storage capability as the program erase methods used are self - limiting in character . another advantage is the increase in reliability of cells using this method due to reduced voltage stress .