a field configurable function element offers multi - function use of memory cells by organizing the cells in memory banks and by providing internal configurable interconnections of the memory banks . a versatile logic function configuration is obtained by storing the truth table of the desired logic functions in the memory cells . an arithmetic functions configuration is obtained by internally interconnecting the memory cells . a read / write memory function configuration is obtained by adding write address decoding , write enablement capability and input data leads . the configuration permits a parallel writing and reading of the memory cells , thereby effectuating a two - port memory operation . an added set of latches connected to the configurable function element and a configurable routing network connected to the inputs of the configurable function element , to the output of the configurable function element and to the output of the latches , form a powerful device that can be easily configured to any one of the three primary modes . a generalized routing fabric coupled to the routing network provides for configurable connections to other configurable function devices . to minimize the load that such a device may present to the routing fabric because of the various configurable interconnections that it can effect , the input leads from the routing fabric to the routing network in configurable function device are all multiplexed to one , or a few contact points , via an intermediate level of routing .