a method of manufacturing a master - slice integrated circuit device , implemented based on a total circuit diagram , including one or more logic blocks , each including a plurality of basic logic blocks such as flip - flops , nand gates , and the like . the total circuit diagram is reformed by deleting unused basic logic blocks in each of the logic blocks whose output terminals are not used , by deleting unused wirings and other unused basic logic blocks whose output terminals are not connected to any basic logic blocks as a result of the deletion of the basic logic blocks , and by sequentially deleting unused basic logic blocks and unused wirings in the same manner , so as to retain only those basic logic blocks actually used as effective basic logic blocks . the circuit patterns of the master slice integrated circuit device are produced by using the total circuit diagram thus reformed .