a semiconductor memory device includes a substrate , a first insulation layer formed on the substrate , a plurality of bit lines arranged on the first insulation layer , a second insulation layer formed all over the bit lines and having a plurality of first openings , an element isolating region formed on the second insulation layer , a plurality of island - like element forming semiconductor regions formed as surrounded by the element isolating region , a plurality of transistors respectively formed in the element forming semiconductor regions , and a plurality of capacitors respectively formed on the transistors . each of the transistors includes a gate electrode insulatively formed on the element forming region , and a first and a second diffusion region formed on either side of the gate electrode , the first diffusion region being connected to a corresponding one of the bit lines through a via conductor formed in one of the first openings . each of the capacitors has a storage electrode formed on the second diffusion region of each of the transistors .