Low Power Interconnect Design pp 3-31 | Cite as

Introduction to Interconnects

Due to the importance of interconnects in current and future ICs, significant research is going on over the past two decades, covering different areas such as parasitic extraction, interconnect models, and interconnect design methodologies. In this chapter, a brief review of the background of on-chip electrical interconnect is provided. In Sect. 1.1, a typical design flow for application-specific integrated circuits (ASICs) is described. Challenges in DSM technologies due to interconnect dominant behavior are discussed. In Sect. 1.2, different design criteria that need to be considered during the interconnect design procedure are described. The impedance characteristics of interconnect are presented in Sect. 1.3; specially, the resistance, capacitance, and inductance. Interconnect characteristics, models, and design methodologies are reviewed in Sects. 1.4, 1.5, and 1.6, respectively. Finally, some conclusions are offered in Sect. 1.7.

Capacitive Coupling Gate Delay Partial Inductance Buffer Insertion Clock Distribution Network
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