The purpose of STIL is to provide a common language for the representation of test patterns and waveforms that are created from the simulation of a digital integrated circuit. The language represents the data in terms of intent (i.e., the waveform that is to be created at the device under test), rather than in terms of a specific piece of ATE hardware. The language is flexible enough to represent patterns from simple to the most complex devices, and has built in optimizing features to minimize the volume of data that is generated by today’s designs.