	.file	"512783.c"
	.intel_syntax noprefix
	.text
	.globl	__VERIFIER_nondet_bool
	.type	__VERIFIER_nondet_bool, @function
__VERIFIER_nondet_bool:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	__VERIFIER_nondet_int@PLT
	test	eax, eax
	setne	al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	__VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
	.globl	p14_l3
	.bss
	.type	p14_l3, @object
	.size	p14_l3, 1
p14_l3:
	.zero	1
	.globl	_x_p14_l3
	.type	_x_p14_l3, @object
	.size	_x_p14_l3, 1
_x_p14_l3:
	.zero	1
	.globl	p15_l3
	.type	p15_l3, @object
	.size	p15_l3, 1
p15_l3:
	.zero	1
	.globl	_x_p15_l3
	.type	_x_p15_l3, @object
	.size	_x_p15_l3, 1
_x_p15_l3:
	.zero	1
	.globl	p12_l3
	.type	p12_l3, @object
	.size	p12_l3, 1
p12_l3:
	.zero	1
	.globl	_x_p12_l3
	.type	_x_p12_l3, @object
	.size	_x_p12_l3, 1
_x_p12_l3:
	.zero	1
	.globl	p15_l2
	.type	p15_l2, @object
	.size	p15_l2, 1
p15_l2:
	.zero	1
	.globl	_x_p15_l2
	.type	_x_p15_l2, @object
	.size	_x_p15_l2, 1
_x_p15_l2:
	.zero	1
	.globl	p12_l2
	.type	p12_l2, @object
	.size	p12_l2, 1
p12_l2:
	.zero	1
	.globl	_x_p12_l2
	.type	_x_p12_l2, @object
	.size	_x_p12_l2, 1
_x_p12_l2:
	.zero	1
	.globl	p15_l1
	.type	p15_l1, @object
	.size	p15_l1, 1
p15_l1:
	.zero	1
	.globl	_x_p15_l1
	.type	_x_p15_l1, @object
	.size	_x_p15_l1, 1
_x_p15_l1:
	.zero	1
	.globl	p12_l1
	.type	p12_l1, @object
	.size	p12_l1, 1
p12_l1:
	.zero	1
	.globl	_x_p12_l1
	.type	_x_p12_l1, @object
	.size	_x_p12_l1, 1
_x_p12_l1:
	.zero	1
	.globl	p15_l0
	.type	p15_l0, @object
	.size	p15_l0, 1
p15_l0:
	.zero	1
	.globl	_x_p15_l0
	.type	_x_p15_l0, @object
	.size	_x_p15_l0, 1
_x_p15_l0:
	.zero	1
	.globl	p12_l0
	.type	p12_l0, @object
	.size	p12_l0, 1
p12_l0:
	.zero	1
	.globl	_x_p12_l0
	.type	_x_p12_l0, @object
	.size	_x_p12_l0, 1
_x_p12_l0:
	.zero	1
	.globl	p15_evt
	.type	p15_evt, @object
	.size	p15_evt, 1
p15_evt:
	.zero	1
	.globl	_x_p15_evt
	.type	_x_p15_evt, @object
	.size	_x_p15_evt, 1
_x_p15_evt:
	.zero	1
	.globl	p12_evt
	.type	p12_evt, @object
	.size	p12_evt, 1
p12_evt:
	.zero	1
	.globl	_x_p12_evt
	.type	_x_p12_evt, @object
	.size	_x_p12_evt, 1
_x_p12_evt:
	.zero	1
	.globl	p15_c
	.align 4
	.type	p15_c, @object
	.size	p15_c, 4
p15_c:
	.zero	4
	.globl	_x_p15_c
	.align 4
	.type	_x_p15_c, @object
	.size	_x_p15_c, 4
_x_p15_c:
	.zero	4
	.globl	p12_c
	.align 4
	.type	p12_c, @object
	.size	p12_c, 4
p12_c:
	.zero	4
	.globl	_x_p12_c
	.align 4
	.type	_x_p12_c, @object
	.size	_x_p12_c, 4
_x_p12_c:
	.zero	4
	.globl	p10_l3
	.type	p10_l3, @object
	.size	p10_l3, 1
p10_l3:
	.zero	1
	.globl	_x_p10_l3
	.type	_x_p10_l3, @object
	.size	_x_p10_l3, 1
_x_p10_l3:
	.zero	1
	.globl	p10_l2
	.type	p10_l2, @object
	.size	p10_l2, 1
p10_l2:
	.zero	1
	.globl	_x_p10_l2
	.type	_x_p10_l2, @object
	.size	_x_p10_l2, 1
_x_p10_l2:
	.zero	1
	.globl	p10_l1
	.type	p10_l1, @object
	.size	p10_l1, 1
p10_l1:
	.zero	1
	.globl	_x_p10_l1
	.type	_x_p10_l1, @object
	.size	_x_p10_l1, 1
_x_p10_l1:
	.zero	1
	.globl	p10_l0
	.type	p10_l0, @object
	.size	p10_l0, 1
p10_l0:
	.zero	1
	.globl	_x_p10_l0
	.type	_x_p10_l0, @object
	.size	_x_p10_l0, 1
_x_p10_l0:
	.zero	1
	.globl	p10_evt
	.type	p10_evt, @object
	.size	p10_evt, 1
p10_evt:
	.zero	1
	.globl	_x_p10_evt
	.type	_x_p10_evt, @object
	.size	_x_p10_evt, 1
_x_p10_evt:
	.zero	1
	.globl	_diverge_delta
	.align 4
	.type	_diverge_delta, @object
	.size	_diverge_delta, 4
_diverge_delta:
	.zero	4
	.globl	_x__diverge_delta
	.align 4
	.type	_x__diverge_delta, @object
	.size	_x__diverge_delta, 4
_x__diverge_delta:
	.zero	4
	.globl	p10_c
	.align 4
	.type	p10_c, @object
	.size	p10_c, 4
p10_c:
	.zero	4
	.globl	_x_p10_c
	.align 4
	.type	_x_p10_c, @object
	.size	_x_p10_c, 4
_x_p10_c:
	.zero	4
	.globl	p3_l3
	.type	p3_l3, @object
	.size	p3_l3, 1
p3_l3:
	.zero	1
	.globl	_x_p3_l3
	.type	_x_p3_l3, @object
	.size	_x_p3_l3, 1
_x_p3_l3:
	.zero	1
	.globl	p3_evt
	.type	p3_evt, @object
	.size	p3_evt, 1
p3_evt:
	.zero	1
	.globl	_x_p3_evt
	.type	_x_p3_evt, @object
	.size	_x_p3_evt, 1
_x_p3_evt:
	.zero	1
	.globl	p0_l2
	.type	p0_l2, @object
	.size	p0_l2, 1
p0_l2:
	.zero	1
	.globl	_x_p0_l2
	.type	_x_p0_l2, @object
	.size	_x_p0_l2, 1
_x_p0_l2:
	.zero	1
	.globl	p14_l2
	.type	p14_l2, @object
	.size	p14_l2, 1
p14_l2:
	.zero	1
	.globl	_x_p14_l2
	.type	_x_p14_l2, @object
	.size	_x_p14_l2, 1
_x_p14_l2:
	.zero	1
	.globl	p8_l3
	.type	p8_l3, @object
	.size	p8_l3, 1
p8_l3:
	.zero	1
	.globl	_x_p8_l3
	.type	_x_p8_l3, @object
	.size	_x_p8_l3, 1
_x_p8_l3:
	.zero	1
	.globl	p0_l1
	.type	p0_l1, @object
	.size	p0_l1, 1
p0_l1:
	.zero	1
	.globl	_x_p0_l1
	.type	_x_p0_l1, @object
	.size	_x_p0_l1, 1
_x_p0_l1:
	.zero	1
	.globl	p2_l3
	.type	p2_l3, @object
	.size	p2_l3, 1
p2_l3:
	.zero	1
	.globl	_x_p2_l3
	.type	_x_p2_l3, @object
	.size	_x_p2_l3, 1
_x_p2_l3:
	.zero	1
	.globl	p2_evt
	.type	p2_evt, @object
	.size	p2_evt, 1
p2_evt:
	.zero	1
	.globl	_x_p2_evt
	.type	_x_p2_evt, @object
	.size	_x_p2_evt, 1
_x_p2_evt:
	.zero	1
	.globl	p14_evt
	.type	p14_evt, @object
	.size	p14_evt, 1
p14_evt:
	.zero	1
	.globl	_x_p14_evt
	.type	_x_p14_evt, @object
	.size	_x_p14_evt, 1
_x_p14_evt:
	.zero	1
	.globl	delta
	.align 4
	.type	delta, @object
	.size	delta, 4
delta:
	.zero	4
	.globl	_x_delta
	.align 4
	.type	_x_delta, @object
	.size	_x_delta, 4
_x_delta:
	.zero	4
	.globl	v1
	.align 4
	.type	v1, @object
	.size	v1, 4
v1:
	.zero	4
	.globl	_x_v1
	.align 4
	.type	_x_v1, @object
	.size	_x_v1, 4
_x_v1:
	.zero	4
	.globl	v2
	.type	v2, @object
	.size	v2, 1
v2:
	.zero	1
	.globl	_x_v2
	.type	_x_v2, @object
	.size	_x_v2, 1
_x_v2:
	.zero	1
	.globl	p8_c
	.align 4
	.type	p8_c, @object
	.size	p8_c, 4
p8_c:
	.zero	4
	.globl	_x_p8_c
	.align 4
	.type	_x_p8_c, @object
	.size	_x_p8_c, 4
_x_p8_c:
	.zero	4
	.globl	p0_l3
	.type	p0_l3, @object
	.size	p0_l3, 1
p0_l3:
	.zero	1
	.globl	_x_p0_l3
	.type	_x_p0_l3, @object
	.size	_x_p0_l3, 1
_x_p0_l3:
	.zero	1
	.globl	p14_c
	.align 4
	.type	p14_c, @object
	.size	p14_c, 4
p14_c:
	.zero	4
	.globl	_x_p14_c
	.align 4
	.type	_x_p14_c, @object
	.size	_x_p14_c, 4
_x_p14_c:
	.zero	4
	.globl	p8_evt
	.type	p8_evt, @object
	.size	p8_evt, 1
p8_evt:
	.zero	1
	.globl	_x_p8_evt
	.type	_x_p8_evt, @object
	.size	_x_p8_evt, 1
_x_p8_evt:
	.zero	1
	.globl	p14_l1
	.type	p14_l1, @object
	.size	p14_l1, 1
p14_l1:
	.zero	1
	.globl	_x_p14_l1
	.type	_x_p14_l1, @object
	.size	_x_p14_l1, 1
_x_p14_l1:
	.zero	1
	.globl	p8_l2
	.type	p8_l2, @object
	.size	p8_l2, 1
p8_l2:
	.zero	1
	.globl	_x_p8_l2
	.type	_x_p8_l2, @object
	.size	_x_p8_l2, 1
_x_p8_l2:
	.zero	1
	.globl	p16_evt
	.type	p16_evt, @object
	.size	p16_evt, 1
p16_evt:
	.zero	1
	.globl	_x_p16_evt
	.type	_x_p16_evt, @object
	.size	_x_p16_evt, 1
_x_p16_evt:
	.zero	1
	.globl	p13_evt
	.type	p13_evt, @object
	.size	p13_evt, 1
p13_evt:
	.zero	1
	.globl	_x_p13_evt
	.type	_x_p13_evt, @object
	.size	_x_p13_evt, 1
_x_p13_evt:
	.zero	1
	.globl	p4_evt
	.type	p4_evt, @object
	.size	p4_evt, 1
p4_evt:
	.zero	1
	.globl	_x_p4_evt
	.type	_x_p4_evt, @object
	.size	_x_p4_evt, 1
_x_p4_evt:
	.zero	1
	.globl	p1_c
	.align 4
	.type	p1_c, @object
	.size	p1_c, 4
p1_c:
	.zero	4
	.globl	_x_p1_c
	.align 4
	.type	_x_p1_c, @object
	.size	_x_p1_c, 4
_x_p1_c:
	.zero	4
	.globl	p9_l3
	.type	p9_l3, @object
	.size	p9_l3, 1
p9_l3:
	.zero	1
	.globl	_x_p9_l3
	.type	_x_p9_l3, @object
	.size	_x_p9_l3, 1
_x_p9_l3:
	.zero	1
	.globl	p3_l2
	.type	p3_l2, @object
	.size	p3_l2, 1
p3_l2:
	.zero	1
	.globl	_x_p3_l2
	.type	_x_p3_l2, @object
	.size	_x_p3_l2, 1
_x_p3_l2:
	.zero	1
	.globl	p6_l3
	.type	p6_l3, @object
	.size	p6_l3, 1
p6_l3:
	.zero	1
	.globl	_x_p6_l3
	.type	_x_p6_l3, @object
	.size	_x_p6_l3, 1
_x_p6_l3:
	.zero	1
	.globl	p1_l3
	.type	p1_l3, @object
	.size	p1_l3, 1
p1_l3:
	.zero	1
	.globl	_x_p1_l3
	.type	_x_p1_l3, @object
	.size	_x_p1_l3, 1
_x_p1_l3:
	.zero	1
	.globl	p0_l0
	.type	p0_l0, @object
	.size	p0_l0, 1
p0_l0:
	.zero	1
	.globl	_x_p0_l0
	.type	_x_p0_l0, @object
	.size	_x_p0_l0, 1
_x_p0_l0:
	.zero	1
	.globl	p14_l0
	.type	p14_l0, @object
	.size	p14_l0, 1
p14_l0:
	.zero	1
	.globl	_x_p14_l0
	.type	_x_p14_l0, @object
	.size	_x_p14_l0, 1
_x_p14_l0:
	.zero	1
	.globl	p8_l1
	.type	p8_l1, @object
	.size	p8_l1, 1
p8_l1:
	.zero	1
	.globl	_x_p8_l1
	.type	_x_p8_l1, @object
	.size	_x_p8_l1, 1
_x_p8_l1:
	.zero	1
	.globl	p1_evt
	.type	p1_evt, @object
	.size	p1_evt, 1
p1_evt:
	.zero	1
	.globl	_x_p1_evt
	.type	_x_p1_evt, @object
	.size	_x_p1_evt, 1
_x_p1_evt:
	.zero	1
	.globl	p16_l2
	.type	p16_l2, @object
	.size	p16_l2, 1
p16_l2:
	.zero	1
	.globl	_x_p16_l2
	.type	_x_p16_l2, @object
	.size	_x_p16_l2, 1
_x_p16_l2:
	.zero	1
	.globl	p13_l2
	.type	p13_l2, @object
	.size	p13_l2, 1
p13_l2:
	.zero	1
	.globl	_x_p13_l2
	.type	_x_p13_l2, @object
	.size	_x_p13_l2, 1
_x_p13_l2:
	.zero	1
	.globl	p1_l1
	.type	p1_l1, @object
	.size	p1_l1, 1
p1_l1:
	.zero	1
	.globl	_x_p1_l1
	.type	_x_p1_l1, @object
	.size	_x_p1_l1, 1
_x_p1_l1:
	.zero	1
	.globl	p7_l3
	.type	p7_l3, @object
	.size	p7_l3, 1
p7_l3:
	.zero	1
	.globl	_x_p7_l3
	.type	_x_p7_l3, @object
	.size	_x_p7_l3, 1
_x_p7_l3:
	.zero	1
	.globl	p4_l2
	.type	p4_l2, @object
	.size	p4_l2, 1
p4_l2:
	.zero	1
	.globl	_x_p4_l2
	.type	_x_p4_l2, @object
	.size	_x_p4_l2, 1
_x_p4_l2:
	.zero	1
	.globl	p16_l3
	.type	p16_l3, @object
	.size	p16_l3, 1
p16_l3:
	.zero	1
	.globl	_x_p16_l3
	.type	_x_p16_l3, @object
	.size	_x_p16_l3, 1
_x_p16_l3:
	.zero	1
	.globl	p13_l3
	.type	p13_l3, @object
	.size	p13_l3, 1
p13_l3:
	.zero	1
	.globl	_x_p13_l3
	.type	_x_p13_l3, @object
	.size	_x_p13_l3, 1
_x_p13_l3:
	.zero	1
	.globl	p1_l2
	.type	p1_l2, @object
	.size	p1_l2, 1
p1_l2:
	.zero	1
	.globl	_x_p1_l2
	.type	_x_p1_l2, @object
	.size	_x_p1_l2, 1
_x_p1_l2:
	.zero	1
	.globl	p4_l3
	.type	p4_l3, @object
	.size	p4_l3, 1
p4_l3:
	.zero	1
	.globl	_x_p4_l3
	.type	_x_p4_l3, @object
	.size	_x_p4_l3, 1
_x_p4_l3:
	.zero	1
	.globl	p11_c
	.align 4
	.type	p11_c, @object
	.size	p11_c, 4
p11_c:
	.zero	4
	.globl	_x_p11_c
	.align 4
	.type	_x_p11_c, @object
	.size	_x_p11_c, 4
_x_p11_c:
	.zero	4
	.globl	p5_c
	.align 4
	.type	p5_c, @object
	.size	p5_c, 4
p5_c:
	.zero	4
	.globl	_x_p5_c
	.align 4
	.type	_x_p5_c, @object
	.size	_x_p5_c, 4
_x_p5_c:
	.zero	4
	.globl	p11_evt
	.type	p11_evt, @object
	.size	p11_evt, 1
p11_evt:
	.zero	1
	.globl	_x_p11_evt
	.type	_x_p11_evt, @object
	.size	_x_p11_evt, 1
_x_p11_evt:
	.zero	1
	.globl	p2_c
	.align 4
	.type	p2_c, @object
	.size	p2_c, 4
p2_c:
	.zero	4
	.globl	_x_p2_c
	.align 4
	.type	_x_p2_c, @object
	.size	_x_p2_c, 4
_x_p2_c:
	.zero	4
	.globl	p5_evt
	.type	p5_evt, @object
	.size	p5_evt, 1
p5_evt:
	.zero	1
	.globl	_x_p5_evt
	.type	_x_p5_evt, @object
	.size	_x_p5_evt, 1
_x_p5_evt:
	.zero	1
	.globl	p11_l0
	.type	p11_l0, @object
	.size	p11_l0, 1
p11_l0:
	.zero	1
	.globl	_x_p11_l0
	.type	_x_p11_l0, @object
	.size	_x_p11_l0, 1
_x_p11_l0:
	.zero	1
	.globl	p0_c
	.align 4
	.type	p0_c, @object
	.size	p0_c, 4
p0_c:
	.zero	4
	.globl	_x_p0_c
	.align 4
	.type	_x_p0_c, @object
	.size	_x_p0_c, 4
_x_p0_c:
	.zero	4
	.globl	p5_l0
	.type	p5_l0, @object
	.size	p5_l0, 1
p5_l0:
	.zero	1
	.globl	_x_p5_l0
	.type	_x_p5_l0, @object
	.size	_x_p5_l0, 1
_x_p5_l0:
	.zero	1
	.globl	p11_l1
	.type	p11_l1, @object
	.size	p11_l1, 1
p11_l1:
	.zero	1
	.globl	_x_p11_l1
	.type	_x_p11_l1, @object
	.size	_x_p11_l1, 1
_x_p11_l1:
	.zero	1
	.globl	p2_l0
	.type	p2_l0, @object
	.size	p2_l0, 1
p2_l0:
	.zero	1
	.globl	_x_p2_l0
	.type	_x_p2_l0, @object
	.size	_x_p2_l0, 1
_x_p2_l0:
	.zero	1
	.globl	p0_evt
	.type	p0_evt, @object
	.size	p0_evt, 1
p0_evt:
	.zero	1
	.globl	_x_p0_evt
	.type	_x_p0_evt, @object
	.size	_x_p0_evt, 1
_x_p0_evt:
	.zero	1
	.globl	p5_l1
	.type	p5_l1, @object
	.size	p5_l1, 1
p5_l1:
	.zero	1
	.globl	_x_p5_l1
	.type	_x_p5_l1, @object
	.size	_x_p5_l1, 1
_x_p5_l1:
	.zero	1
	.globl	p11_l2
	.type	p11_l2, @object
	.size	p11_l2, 1
p11_l2:
	.zero	1
	.globl	_x_p11_l2
	.type	_x_p11_l2, @object
	.size	_x_p11_l2, 1
_x_p11_l2:
	.zero	1
	.globl	p2_l1
	.type	p2_l1, @object
	.size	p2_l1, 1
p2_l1:
	.zero	1
	.globl	_x_p2_l1
	.type	_x_p2_l1, @object
	.size	_x_p2_l1, 1
_x_p2_l1:
	.zero	1
	.globl	p5_l2
	.type	p5_l2, @object
	.size	p5_l2, 1
p5_l2:
	.zero	1
	.globl	_x_p5_l2
	.type	_x_p5_l2, @object
	.size	_x_p5_l2, 1
_x_p5_l2:
	.zero	1
	.globl	p11_l3
	.type	p11_l3, @object
	.size	p11_l3, 1
p11_l3:
	.zero	1
	.globl	_x_p11_l3
	.type	_x_p11_l3, @object
	.size	_x_p11_l3, 1
_x_p11_l3:
	.zero	1
	.globl	p2_l2
	.type	p2_l2, @object
	.size	p2_l2, 1
p2_l2:
	.zero	1
	.globl	_x_p2_l2
	.type	_x_p2_l2, @object
	.size	_x_p2_l2, 1
_x_p2_l2:
	.zero	1
	.globl	p5_l3
	.type	p5_l3, @object
	.size	p5_l3, 1
p5_l3:
	.zero	1
	.globl	_x_p5_l3
	.type	_x_p5_l3, @object
	.size	_x_p5_l3, 1
_x_p5_l3:
	.zero	1
	.globl	p9_l0
	.type	p9_l0, @object
	.size	p9_l0, 1
p9_l0:
	.zero	1
	.globl	_x_p9_l0
	.type	_x_p9_l0, @object
	.size	_x_p9_l0, 1
_x_p9_l0:
	.zero	1
	.globl	p6_l0
	.type	p6_l0, @object
	.size	p6_l0, 1
p6_l0:
	.zero	1
	.globl	_x_p6_l0
	.type	_x_p6_l0, @object
	.size	_x_p6_l0, 1
_x_p6_l0:
	.zero	1
	.globl	p9_l1
	.type	p9_l1, @object
	.size	p9_l1, 1
p9_l1:
	.zero	1
	.globl	_x_p9_l1
	.type	_x_p9_l1, @object
	.size	_x_p9_l1, 1
_x_p9_l1:
	.zero	1
	.globl	p3_l0
	.type	p3_l0, @object
	.size	p3_l0, 1
p3_l0:
	.zero	1
	.globl	_x_p3_l0
	.type	_x_p3_l0, @object
	.size	_x_p3_l0, 1
_x_p3_l0:
	.zero	1
	.globl	p6_l1
	.type	p6_l1, @object
	.size	p6_l1, 1
p6_l1:
	.zero	1
	.globl	_x_p6_l1
	.type	_x_p6_l1, @object
	.size	_x_p6_l1, 1
_x_p6_l1:
	.zero	1
	.globl	p9_l2
	.type	p9_l2, @object
	.size	p9_l2, 1
p9_l2:
	.zero	1
	.globl	_x_p9_l2
	.type	_x_p9_l2, @object
	.size	_x_p9_l2, 1
_x_p9_l2:
	.zero	1
	.globl	p3_l1
	.type	p3_l1, @object
	.size	p3_l1, 1
p3_l1:
	.zero	1
	.globl	_x_p3_l1
	.type	_x_p3_l1, @object
	.size	_x_p3_l1, 1
_x_p3_l1:
	.zero	1
	.globl	p6_l2
	.type	p6_l2, @object
	.size	p6_l2, 1
p6_l2:
	.zero	1
	.globl	_x_p6_l2
	.type	_x_p6_l2, @object
	.size	_x_p6_l2, 1
_x_p6_l2:
	.zero	1
	.globl	p7_c
	.align 4
	.type	p7_c, @object
	.size	p7_c, 4
p7_c:
	.zero	4
	.globl	_x_p7_c
	.align 4
	.type	_x_p7_c, @object
	.size	_x_p7_c, 4
_x_p7_c:
	.zero	4
	.globl	p16_c
	.align 4
	.type	p16_c, @object
	.size	p16_c, 4
p16_c:
	.zero	4
	.globl	_x_p16_c
	.align 4
	.type	_x_p16_c, @object
	.size	_x_p16_c, 4
_x_p16_c:
	.zero	4
	.globl	p13_c
	.align 4
	.type	p13_c, @object
	.size	p13_c, 4
p13_c:
	.zero	4
	.globl	_x_p13_c
	.align 4
	.type	_x_p13_c, @object
	.size	_x_p13_c, 4
_x_p13_c:
	.zero	4
	.globl	p4_c
	.align 4
	.type	p4_c, @object
	.size	p4_c, 4
p4_c:
	.zero	4
	.globl	_x_p4_c
	.align 4
	.type	_x_p4_c, @object
	.size	_x_p4_c, 4
_x_p4_c:
	.zero	4
	.globl	p7_evt
	.type	p7_evt, @object
	.size	p7_evt, 1
p7_evt:
	.zero	1
	.globl	_x_p7_evt
	.type	_x_p7_evt, @object
	.size	_x_p7_evt, 1
_x_p7_evt:
	.zero	1
	.globl	p7_l0
	.type	p7_l0, @object
	.size	p7_l0, 1
p7_l0:
	.zero	1
	.globl	_x_p7_l0
	.type	_x_p7_l0, @object
	.size	_x_p7_l0, 1
_x_p7_l0:
	.zero	1
	.globl	p16_l0
	.type	p16_l0, @object
	.size	p16_l0, 1
p16_l0:
	.zero	1
	.globl	_x_p16_l0
	.type	_x_p16_l0, @object
	.size	_x_p16_l0, 1
_x_p16_l0:
	.zero	1
	.globl	p13_l0
	.type	p13_l0, @object
	.size	p13_l0, 1
p13_l0:
	.zero	1
	.globl	_x_p13_l0
	.type	_x_p13_l0, @object
	.size	_x_p13_l0, 1
_x_p13_l0:
	.zero	1
	.globl	p4_l0
	.type	p4_l0, @object
	.size	p4_l0, 1
p4_l0:
	.zero	1
	.globl	_x_p4_l0
	.type	_x_p4_l0, @object
	.size	_x_p4_l0, 1
_x_p4_l0:
	.zero	1
	.globl	p7_l1
	.type	p7_l1, @object
	.size	p7_l1, 1
p7_l1:
	.zero	1
	.globl	_x_p7_l1
	.type	_x_p7_l1, @object
	.size	_x_p7_l1, 1
_x_p7_l1:
	.zero	1
	.globl	p16_l1
	.type	p16_l1, @object
	.size	p16_l1, 1
p16_l1:
	.zero	1
	.globl	_x_p16_l1
	.type	_x_p16_l1, @object
	.size	_x_p16_l1, 1
_x_p16_l1:
	.zero	1
	.globl	p13_l1
	.type	p13_l1, @object
	.size	p13_l1, 1
p13_l1:
	.zero	1
	.globl	_x_p13_l1
	.type	_x_p13_l1, @object
	.size	_x_p13_l1, 1
_x_p13_l1:
	.zero	1
	.globl	p1_l0
	.type	p1_l0, @object
	.size	p1_l0, 1
p1_l0:
	.zero	1
	.globl	_x_p1_l0
	.type	_x_p1_l0, @object
	.size	_x_p1_l0, 1
_x_p1_l0:
	.zero	1
	.globl	p4_l1
	.type	p4_l1, @object
	.size	p4_l1, 1
p4_l1:
	.zero	1
	.globl	_x_p4_l1
	.type	_x_p4_l1, @object
	.size	_x_p4_l1, 1
_x_p4_l1:
	.zero	1
	.globl	p7_l2
	.type	p7_l2, @object
	.size	p7_l2, 1
p7_l2:
	.zero	1
	.globl	_x_p7_l2
	.type	_x_p7_l2, @object
	.size	_x_p7_l2, 1
_x_p7_l2:
	.zero	1
	.globl	p8_l0
	.type	p8_l0, @object
	.size	p8_l0, 1
p8_l0:
	.zero	1
	.globl	_x_p8_l0
	.type	_x_p8_l0, @object
	.size	_x_p8_l0, 1
_x_p8_l0:
	.zero	1
	.globl	p6_c
	.align 4
	.type	p6_c, @object
	.size	p6_c, 4
p6_c:
	.zero	4
	.globl	_x_p6_c
	.align 4
	.type	_x_p6_c, @object
	.size	_x_p6_c, 4
_x_p6_c:
	.zero	4
	.globl	p9_c
	.align 4
	.type	p9_c, @object
	.size	p9_c, 4
p9_c:
	.zero	4
	.globl	_x_p9_c
	.align 4
	.type	_x_p9_c, @object
	.size	_x_p9_c, 4
_x_p9_c:
	.zero	4
	.globl	p3_c
	.align 4
	.type	p3_c, @object
	.size	p3_c, 4
p3_c:
	.zero	4
	.globl	_x_p3_c
	.align 4
	.type	_x_p3_c, @object
	.size	_x_p3_c, 4
_x_p3_c:
	.zero	4
	.globl	p6_evt
	.type	p6_evt, @object
	.size	p6_evt, 1
p6_evt:
	.zero	1
	.globl	_x_p6_evt
	.type	_x_p6_evt, @object
	.size	_x_p6_evt, 1
_x_p6_evt:
	.zero	1
	.globl	p9_evt
	.type	p9_evt, @object
	.size	p9_evt, 1
p9_evt:
	.zero	1
	.globl	_x_p9_evt
	.type	_x_p9_evt, @object
	.size	_x_p9_evt, 1
_x_p9_evt:
	.zero	1
	.text
	.globl	main
	.type	main, @function
main:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p14_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p15_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p12_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p15_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p12_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p15_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p12_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p15_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p12_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p15_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p12_evt[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p15_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p12_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p10_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p10_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p10_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p10_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p10_evt[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _diverge_delta[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p10_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p3_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p3_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p0_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p14_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p8_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p0_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p2_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p2_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p14_evt[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR delta[rip], eax
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR v1[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR v2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p8_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p0_l3[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p14_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p8_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p14_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p8_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p16_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p13_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p4_evt[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p1_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p9_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p3_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p6_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p1_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p0_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p14_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p8_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p1_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p16_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p13_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p1_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p7_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p4_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p16_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p13_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p1_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p4_l3[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p11_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p5_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p11_evt[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p2_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p5_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p11_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p0_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p5_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p11_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p2_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p0_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p5_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p11_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p2_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p5_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p11_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p2_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p5_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p9_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p6_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p9_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p3_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p6_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p9_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p3_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p6_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p7_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p16_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p13_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p4_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p7_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p7_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p16_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p13_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p4_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p7_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p16_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p13_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p1_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p4_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p7_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p8_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p6_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p9_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p3_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p6_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p9_evt[rip], al
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p16_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	je	.L6
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L6
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L6
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L7
.L6:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L7
.L8:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L9
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	je	.L9
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L9
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L7
.L9:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L10
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	je	.L10
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L10
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L7
.L10:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L11
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	je	.L11
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L11
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L7
.L11:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L12
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L12
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L12
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L7
.L12:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L13
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L7
.L13:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L14
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L14
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L14
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L7
.L14:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L4
.L7:
	movss	xmm1, DWORD PTR p16_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L15
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L16
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L16
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L16
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L4
.L16:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L17
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	je	.L17
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L17
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L4
.L17:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L18
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	je	.L18
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L18
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L4
.L18:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	je	.L15
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L15
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L15
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L4
.L15:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p15_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	je	.L20
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L20
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L20
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L21
.L20:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L22
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	je	.L22
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L22
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L21
.L22:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L23
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	je	.L23
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L23
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L21
.L23:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L24
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	je	.L24
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L24
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L21
.L24:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L25
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	je	.L25
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L25
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L21
.L25:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L26
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L26
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L26
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L21
.L26:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L27
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L27
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L27
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L21
.L27:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L28
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L28
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L28
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L21
.L28:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L4
.L21:
	movss	xmm1, DWORD PTR p15_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L29
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L30
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L30
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L30
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L4
.L30:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L31
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	je	.L31
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L31
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L4
.L31:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L32
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	je	.L32
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L32
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L4
.L32:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	je	.L29
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L29
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L29
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L4
.L29:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p14_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	je	.L34
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L34
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L34
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L35
.L34:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L36
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L36
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L36
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L35
.L36:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L37
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L37
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L37
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L35
.L37:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L38
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L38
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L38
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L35
.L38:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L39
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L39
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L39
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L35
.L39:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L40
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L40
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L40
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L35
.L40:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L41
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L41
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L41
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L35
.L41:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L42
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L42
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L42
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L35
.L42:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L4
.L35:
	movss	xmm1, DWORD PTR p14_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L43
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L44
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L44
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L44
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L4
.L44:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L45
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L45
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L45
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L4
.L45:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L46
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L46
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L46
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L4
.L46:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	je	.L43
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L43
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L43
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L4
.L43:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p13_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	je	.L48
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L48
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L48
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L49
.L48:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L50
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L50
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L50
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L49
.L50:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L51
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L51
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L51
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L49
.L51:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L52
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L52
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L52
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L49
.L52:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L53
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L53
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L53
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L49
.L53:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L54
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L54
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L54
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L49
.L54:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L55
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L55
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L55
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L49
.L55:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L56
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L56
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L56
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L49
.L56:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L4
.L49:
	movss	xmm1, DWORD PTR p13_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L57
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L58
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L58
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L58
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L4
.L58:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L59
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L59
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L59
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L4
.L59:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L60
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L60
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L60
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L4
.L60:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	je	.L57
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L57
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L57
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L4
.L57:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p12_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	je	.L62
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L62
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L62
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L63
.L62:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L64
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L64
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L64
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L63
.L64:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L65
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L65
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L65
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L63
.L65:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L66
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L66
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L66
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L63
.L66:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L67
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L67
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L67
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L63
.L67:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L68
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L68
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L68
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L63
.L68:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L69
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L69
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L69
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L63
.L69:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L70
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L70
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L70
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L63
.L70:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L4
.L63:
	movss	xmm1, DWORD PTR p12_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L71
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L72
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L72
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L72
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L4
.L72:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L73
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L73
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L73
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L4
.L73:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L74
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L74
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L74
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L4
.L74:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	je	.L71
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L71
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L71
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L4
.L71:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p11_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	je	.L76
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L76
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L76
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L77
.L76:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L78
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L78
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L78
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L77
.L78:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L79
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L79
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L79
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L77
.L79:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L80
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L80
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L80
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L77
.L80:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L81
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L81
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L81
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L77
.L81:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L82
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L82
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L82
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L77
.L82:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L83
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L83
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L83
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L77
.L83:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L84
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L84
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L84
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L77
.L84:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L4
.L77:
	movss	xmm1, DWORD PTR p11_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L85
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L86
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L86
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L86
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L4
.L86:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L87
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L87
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L87
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L4
.L87:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L88
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L88
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L88
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L4
.L88:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	je	.L85
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L85
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L85
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L4
.L85:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p10_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	je	.L90
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L90
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L90
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L91
.L90:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L92
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L92
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L92
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L91
.L92:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L93
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L93
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L93
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L91
.L93:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L94
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L94
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L94
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L91
.L94:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L95
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L95
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L95
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L91
.L95:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L96
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L96
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L96
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L91
.L96:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L97
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L97
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L97
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L91
.L97:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L98
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L98
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L98
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L91
.L98:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L4
.L91:
	movss	xmm1, DWORD PTR p10_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L99
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L100
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L100
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L100
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L4
.L100:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L101
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L101
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L101
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L4
.L101:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L102
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L102
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L102
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L4
.L102:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	je	.L99
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L99
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L99
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L4
.L99:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p9_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	je	.L104
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L104
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L104
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L105
.L104:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L106
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L106
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L106
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L105
.L106:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L107
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L107
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L107
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L105
.L107:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L108
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L108
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L108
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L105
.L108:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L109
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L109
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L109
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L105
.L109:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L110
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L110
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L110
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L105
.L110:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L111
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L111
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L111
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L105
.L111:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L112
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L112
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L112
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L105
.L112:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L4
.L105:
	movss	xmm1, DWORD PTR p9_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L113
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L114
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L114
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L114
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L4
.L114:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L115
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L115
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L115
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L4
.L115:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L116
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L116
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L116
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L4
.L116:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	je	.L113
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L113
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L113
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L4
.L113:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p8_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	je	.L118
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L118
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L118
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L119
.L118:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L120
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L120
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L120
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L119
.L120:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L121
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L121
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L121
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L119
.L121:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L122
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L122
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L122
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L119
.L122:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L123
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L123
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L123
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L119
.L123:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L124
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L124
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L124
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L119
.L124:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L125
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L125
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L125
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L119
.L125:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L126
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L126
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L126
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L119
.L126:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L4
.L119:
	movss	xmm1, DWORD PTR p8_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L127
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L128
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L128
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L128
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L4
.L128:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L129
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L129
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L129
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L4
.L129:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L130
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L130
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L130
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L4
.L130:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	je	.L127
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L127
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L127
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L4
.L127:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p7_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	je	.L132
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L132
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L132
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L133
.L132:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L134
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L134
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L134
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L133
.L134:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L135
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L135
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L135
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L133
.L135:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L136
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L136
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L136
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L133
.L136:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L137
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L137
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L137
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L133
.L137:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L138
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L138
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L138
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L133
.L138:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L139
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L139
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L139
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L133
.L139:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L140
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L140
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L140
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L133
.L140:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L4
.L133:
	movss	xmm1, DWORD PTR p7_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L141
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L142
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L142
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L142
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L4
.L142:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L143
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L143
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L143
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L4
.L143:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L144
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L144
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L144
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L4
.L144:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	je	.L141
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L141
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L141
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L4
.L141:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p6_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	je	.L146
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L146
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L146
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L147
.L146:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L148
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L148
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L148
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L147
.L148:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L147
.L149:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L150
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L150
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L150
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L147
.L150:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L151
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L151
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L151
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L147
.L151:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L152
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L152
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L152
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L147
.L152:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L153
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L153
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L153
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L147
.L153:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L154
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L154
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L154
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L147
.L154:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L4
.L147:
	movss	xmm1, DWORD PTR p6_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L155
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L156
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L156
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L156
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L4
.L156:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L4
.L157:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L158
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L158
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L158
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L4
.L158:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	je	.L155
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L155
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L155
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L4
.L155:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p5_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	je	.L160
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L160
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L160
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L161
.L160:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L162
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L162
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L162
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L161
.L162:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L163
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L163
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L163
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L161
.L163:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L164
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L164
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L164
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L161
.L164:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L165
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L165
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L165
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L161
.L165:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L166
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L166
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L166
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L161
.L166:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L167
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L167
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L167
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L161
.L167:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L168
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L168
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L168
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L161
.L168:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L4
.L161:
	movss	xmm1, DWORD PTR p5_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L169
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L170
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L170
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L170
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L4
.L170:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L171
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L171
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L171
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L4
.L171:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L172
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L172
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L172
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L4
.L172:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	je	.L169
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L169
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L169
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L4
.L169:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p4_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	je	.L174
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L174
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L174
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L175
.L174:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L176
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L176
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L176
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L175
.L176:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L177
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L177
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L177
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L175
.L177:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L178
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L178
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L178
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L175
.L178:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L179
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L179
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L179
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L175
.L179:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L180
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L180
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L180
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L175
.L180:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L181
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L181
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L181
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L175
.L181:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L182
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L182
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L182
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L175
.L182:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L4
.L175:
	movss	xmm1, DWORD PTR p4_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L183
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L184
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L184
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L184
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L4
.L184:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L185
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L185
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L185
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L4
.L185:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L186
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L186
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L186
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L4
.L186:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	je	.L183
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L183
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L183
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L4
.L183:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p3_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	je	.L188
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L188
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L188
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L189
.L188:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L190
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L190
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L190
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L189
.L190:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L191
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L191
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L191
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L189
.L191:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L189
.L192:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L193
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L193
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L193
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L189
.L193:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L194
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L194
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L194
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L189
.L194:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L195
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L195
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L195
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L189
.L195:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L196
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L196
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L196
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L189
.L196:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L4
.L189:
	movss	xmm1, DWORD PTR p3_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L197
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L198
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L198
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L198
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L4
.L198:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L199
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L199
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L199
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L4
.L199:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L200
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L200
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L200
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L4
.L200:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	je	.L197
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L197
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L197
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L4
.L197:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p2_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	je	.L202
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L202
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L202
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L203
.L202:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L204
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L204
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L204
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L203
.L204:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L205
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L205
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L205
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L203
.L205:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L206
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L206
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L206
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L203
.L206:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L207
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L207
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L207
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L203
.L207:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L208
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L208
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L208
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L203
.L208:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L209
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L209
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L209
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L203
.L209:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L210
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L210
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L210
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L203
.L210:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L4
.L203:
	movss	xmm1, DWORD PTR p2_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L211
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L212
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L212
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L212
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L4
.L212:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L213
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L213
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L213
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L4
.L213:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L214
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L214
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L214
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L4
.L214:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	je	.L211
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L211
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L211
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L4
.L211:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p1_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	je	.L216
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L216
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L216
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L217
.L216:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L218
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L218
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L218
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L217
.L218:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L219
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L219
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L219
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L217
.L219:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L220
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L220
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L220
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L217
.L220:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L221
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L221
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L221
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L217
.L221:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L222
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L222
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L222
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L217
.L222:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L223
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L223
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L223
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L217
.L223:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L224
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L224
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L224
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L217
.L224:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L4
.L217:
	movss	xmm1, DWORD PTR p1_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L225
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L226
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L226
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L226
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L4
.L226:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L227
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L227
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L227
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L4
.L227:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L228
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L228
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L228
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L4
.L228:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	je	.L225
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L225
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L225
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L4
.L225:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p0_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	je	.L230
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L230
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L230
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L231
.L230:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L232
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L232
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L232
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L231
.L232:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L233
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L233
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L233
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L231
.L233:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L234
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L234
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L234
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L231
.L234:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L235
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L235
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L235
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L231
.L235:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L236
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L236
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L236
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L231
.L236:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L237
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L237
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L237
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L231
.L237:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L238
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L238
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L238
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L231
.L238:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L4
.L231:
	movss	xmm1, DWORD PTR p0_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L239
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L240
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L240
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L240
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L4
.L240:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L241
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L241
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L241
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L4
.L241:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L242
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L242
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L242
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L4
.L242:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	je	.L239
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L239
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L239
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L4
.L239:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jb	.L4
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 17
	je	.L244
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 16
	je	.L244
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 15
	je	.L244
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 14
	je	.L244
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 13
	je	.L244
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 12
	je	.L244
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 11
	je	.L244
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 10
	je	.L244
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 9
	je	.L244
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 8
	je	.L244
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 7
	je	.L244
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 6
	je	.L244
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 5
	je	.L244
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 4
	je	.L244
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 3
	je	.L244
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 2
	je	.L244
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	je	.L244
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 1
	jne	.L4
.L244:
	movss	xmm0, DWORD PTR delta[rip]
	movss	xmm1, DWORD PTR _diverge_delta[rip]
	ucomiss	xmm0, xmm1
	jp	.L4
	ucomiss	xmm0, xmm1
	jne	.L4
	mov	eax, 1
	jmp	.L246
.L4:
	mov	eax, 0
.L246:
	mov	DWORD PTR -4[rbp], eax
	jmp	.L247
.L1256:
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p14_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p15_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p12_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p15_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p12_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p15_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p12_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p15_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p12_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p15_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p12_evt[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p15_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p12_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p10_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p10_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p10_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p10_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p10_evt[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x__diverge_delta[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p10_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p3_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p3_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p0_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p14_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p8_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p0_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p2_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p2_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p14_evt[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_delta[rip], eax
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR _x_v1[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_v2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p8_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p0_l3[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p14_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p8_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p14_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p8_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p16_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p13_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p4_evt[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p1_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p9_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p3_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p6_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p1_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p0_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p14_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p8_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p1_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p16_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p13_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p1_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p7_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p4_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p16_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p13_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p1_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p4_l3[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p11_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p5_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p11_evt[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p2_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p5_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p11_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p0_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p5_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p11_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p2_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p0_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p5_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p11_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p2_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p5_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p11_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p2_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p5_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p9_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p6_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p9_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p3_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p6_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p9_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p3_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p6_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p7_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p16_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p13_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p4_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p7_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p7_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p16_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p13_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p4_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p7_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p16_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p13_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p1_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p4_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p7_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p8_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p6_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p9_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p3_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p6_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p9_evt[rip], al
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	je	.L248
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L248
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L248
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L249
.L248:
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L250
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	je	.L250
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L250
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L249
.L250:
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L251
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	je	.L251
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L251
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L249
.L251:
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L252
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	je	.L252
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L252
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L249
.L252:
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L253
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	je	.L253
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L253
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L249
.L253:
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L254
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L254
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L254
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L249
.L254:
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L255
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L255
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L255
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L249
.L255:
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L256
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L256
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L256
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L249
.L256:
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L257
.L249:
	movss	xmm1, DWORD PTR _x_p16_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L258
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L259
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L259
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L259
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L257
.L259:
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L260
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	je	.L260
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L260
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L257
.L260:
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L261
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	je	.L261
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L261
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L257
.L261:
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	je	.L258
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L258
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L258
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L257
.L258:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L262
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p16_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p16_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L262:
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	jne	.L264
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p16_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p16_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L264:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L266
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L266
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L266
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L266
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L266
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L266
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L266
	movss	xmm0, DWORD PTR _x_p16_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L266
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L267
.L266:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L267
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L267
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L267
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L267
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L267
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L267
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	jne	.L257
.L267:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L269
	movss	xmm0, DWORD PTR _x_p16_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L269
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L269
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L269
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L269
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L269
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L269
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 17
	je	.L271
.L269:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L271
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L271
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L271
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L271
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L271
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L271
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	jne	.L257
.L271:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L272
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L272
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L273
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L273
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L273
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L274
.L273:
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L272
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L272
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L272
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L272
.L274:
	movss	xmm0, DWORD PTR p16_c[rip]
	movss	xmm1, DWORD PTR _x_p16_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L272
	ucomiss	xmm0, xmm1
	je	.L275
.L272:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L275
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L275
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L275
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L275
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L275
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L275
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	jne	.L257
.L275:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 17
	jne	.L277
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L277
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L277
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L277
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L277
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L277
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L277
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L277
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L277
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L277
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L277
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	jne	.L257
.L277:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 17
	jne	.L278
	movss	xmm1, DWORD PTR p16_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L279
.L278:
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L279
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L279
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L279
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L279
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L279
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L279
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L279
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L279
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L279
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L279
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	jne	.L257
.L279:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L280
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L280
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L281
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L281
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L281
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L282
.L281:
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L280
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	je	.L280
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L280
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L282
.L280:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L282
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L282
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L282
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L282
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L282
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L282
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	jne	.L257
.L282:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L283
	movss	xmm0, DWORD PTR p16_c[rip]
	movss	xmm1, DWORD PTR _x_p16_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L283
	ucomiss	xmm0, xmm1
	je	.L284
.L283:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L284
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L284
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	je	.L284
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L284
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L284
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L284
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L284
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L284
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L284
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L284
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L257
.L284:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L286
	movss	xmm0, DWORD PTR _x_p16_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L286
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L287
.L286:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L287
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L287
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	je	.L287
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L287
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L287
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L287
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L287
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L287
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	je	.L287
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L287
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L257
.L287:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L289
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L289
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	je	.L289
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L289
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L289
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L289
	movss	xmm0, DWORD PTR _x_p16_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L289
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L290
.L289:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L290
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	je	.L290
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L290
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L290
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L290
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L290
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	jne	.L257
.L290:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L292
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L292
	movss	xmm0, DWORD PTR p16_c[rip]
	movss	xmm1, DWORD PTR _x_p16_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L292
	ucomiss	xmm0, xmm1
	jne	.L292
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L294
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L294
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L294
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L295
.L294:
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L292
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	je	.L292
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L292
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L295
.L292:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L295
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	je	.L295
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L295
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L295
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L295
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L295
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	jne	.L257
.L295:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 17
	jne	.L296
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L296
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L296
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	je	.L296
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L296
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L296
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L296
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L296
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L296
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	je	.L296
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L296
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L257
.L296:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 17
	je	.L297
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L297
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L297
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	je	.L297
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L297
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	je	.L297
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L297
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L297
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L297
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	je	.L297
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L297
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L257
.L297:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L298
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L298
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L298
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	je	.L298
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L298
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L298
	movss	xmm0, DWORD PTR _x_p16_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L298
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L299
.L298:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L299
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	je	.L299
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L299
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L299
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L299
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L299
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	jne	.L257
.L299:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L301
	movss	xmm0, DWORD PTR _x_p16_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L301
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L301
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L301
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	je	.L301
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L301
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L301
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L303
.L301:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L303
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	je	.L303
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L303
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L303
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L303
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L303
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	jne	.L257
.L303:
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L304
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L304
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L304
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L304
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L304
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L304
	movss	xmm0, DWORD PTR p16_c[rip]
	movss	xmm1, DWORD PTR _x_p16_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L304
	ucomiss	xmm0, xmm1
	je	.L305
.L304:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	je	.L305
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L305
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L305
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L305
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L305
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L305
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	jne	.L257
.L305:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	je	.L307
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L307
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L307
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L308
.L307:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L309
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	je	.L309
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L309
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L308
.L309:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L310
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	je	.L310
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L310
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L308
.L310:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L311
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	je	.L311
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L311
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L308
.L311:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L312
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	je	.L312
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L312
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L308
.L312:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L313
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L313
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L313
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L308
.L313:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L314
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L314
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L314
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L308
.L314:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L315
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L315
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L315
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L308
.L315:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L257
.L308:
	movss	xmm1, DWORD PTR _x_p15_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L316
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L317
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L317
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L317
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L257
.L317:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L318
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	je	.L318
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L318
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L257
.L318:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L319
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	je	.L319
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L319
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L257
.L319:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	je	.L316
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L316
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L316
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L257
.L316:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L320
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p15_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p15_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L320:
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	jne	.L322
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p15_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p15_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L322:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L324
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L324
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L324
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L324
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L324
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L324
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L324
	movss	xmm0, DWORD PTR _x_p15_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L324
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L325
.L324:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L325
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L325
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L325
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L325
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L325
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L325
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	jne	.L257
.L325:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L327
	movss	xmm0, DWORD PTR _x_p15_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L327
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L327
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L327
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L327
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L327
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L327
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 16
	je	.L329
.L327:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L329
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L329
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L329
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L329
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L329
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L329
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	jne	.L257
.L329:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L330
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L330
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L331
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L331
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L331
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L332
.L331:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L330
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L330
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L330
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L330
.L332:
	movss	xmm0, DWORD PTR p15_c[rip]
	movss	xmm1, DWORD PTR _x_p15_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L330
	ucomiss	xmm0, xmm1
	je	.L333
.L330:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L333
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L333
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L333
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L333
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L333
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L333
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	jne	.L257
.L333:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 16
	jne	.L335
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L335
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L335
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L335
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L335
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L335
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L335
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L335
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L335
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L335
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L335
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	jne	.L257
.L335:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 16
	jne	.L336
	movss	xmm1, DWORD PTR p15_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L337
.L336:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L337
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L337
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L337
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L337
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L337
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L337
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L337
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L337
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L337
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L337
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	jne	.L257
.L337:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L338
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L338
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L339
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L339
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L339
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L340
.L339:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L338
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	je	.L338
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L338
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L340
.L338:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L340
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L340
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L340
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L340
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L340
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L340
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	jne	.L257
.L340:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L341
	movss	xmm0, DWORD PTR p15_c[rip]
	movss	xmm1, DWORD PTR _x_p15_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L341
	ucomiss	xmm0, xmm1
	je	.L342
.L341:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L342
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L342
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	je	.L342
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L342
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L342
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L342
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L342
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L342
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L342
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L342
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L257
.L342:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L344
	movss	xmm0, DWORD PTR _x_p15_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L344
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L345
.L344:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L345
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L345
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	je	.L345
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L345
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L345
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L345
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L345
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L345
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	je	.L345
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L345
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L257
.L345:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L347
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L347
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	je	.L347
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L347
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L347
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L347
	movss	xmm0, DWORD PTR _x_p15_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L347
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L348
.L347:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L348
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	je	.L348
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L348
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L348
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L348
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L348
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	jne	.L257
.L348:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L350
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L350
	movss	xmm0, DWORD PTR p15_c[rip]
	movss	xmm1, DWORD PTR _x_p15_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L350
	ucomiss	xmm0, xmm1
	jne	.L350
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L352
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L352
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L352
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L353
.L352:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L350
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	je	.L350
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L350
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L353
.L350:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L353
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	je	.L353
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L353
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L353
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L353
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L353
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	jne	.L257
.L353:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 16
	jne	.L354
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L354
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L354
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	je	.L354
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L354
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L354
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L354
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L354
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L354
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	je	.L354
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L354
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L257
.L354:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 16
	je	.L355
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L355
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L355
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	je	.L355
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L355
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	je	.L355
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L355
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L355
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L355
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	je	.L355
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L355
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L257
.L355:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L356
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L356
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L356
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	je	.L356
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L356
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L356
	movss	xmm0, DWORD PTR _x_p15_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L356
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L357
.L356:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L357
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	je	.L357
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L357
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L357
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L357
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L357
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	jne	.L257
.L357:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L359
	movss	xmm0, DWORD PTR _x_p15_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L359
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L359
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L359
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	je	.L359
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L359
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L359
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L361
.L359:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L361
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	je	.L361
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L361
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L361
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L361
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L361
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	jne	.L257
.L361:
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L362
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L362
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L362
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L362
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L362
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L362
	movss	xmm0, DWORD PTR p15_c[rip]
	movss	xmm1, DWORD PTR _x_p15_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L362
	ucomiss	xmm0, xmm1
	je	.L363
.L362:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	je	.L363
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L363
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L363
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L363
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L363
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L363
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	jne	.L257
.L363:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	je	.L365
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L365
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L365
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L366
.L365:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L367
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L367
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L367
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L366
.L367:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L368
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L368
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L368
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L366
.L368:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L369
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L369
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L369
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L366
.L369:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L370
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L370
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L370
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L366
.L370:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L371
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L371
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L371
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L366
.L371:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L372
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L372
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L372
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L366
.L372:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L373
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L373
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L373
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L366
.L373:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L257
.L366:
	movss	xmm1, DWORD PTR _x_p14_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L374
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L375
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L375
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L375
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L257
.L375:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L376
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L376
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L376
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L257
.L376:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L377
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L377
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L257
.L377:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	je	.L374
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L374
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L374
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L257
.L374:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L378
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p14_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p14_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L378:
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L380
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p14_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p14_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L380:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L382
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L382
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L382
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L382
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L382
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L382
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L382
	movss	xmm0, DWORD PTR _x_p14_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L382
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L383
.L382:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L383
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L383
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L383
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L383
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L383
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L383
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L257
.L383:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L385
	movss	xmm0, DWORD PTR _x_p14_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L385
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L385
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L385
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L385
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L385
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L385
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 15
	je	.L387
.L385:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L387
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L387
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L387
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L387
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L387
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L387
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L257
.L387:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L388
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L388
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L389
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L389
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L389
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L390
.L389:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L388
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L388
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L388
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L388
.L390:
	movss	xmm0, DWORD PTR p14_c[rip]
	movss	xmm1, DWORD PTR _x_p14_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L388
	ucomiss	xmm0, xmm1
	je	.L391
.L388:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L391
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L391
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L391
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L391
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L391
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L391
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L257
.L391:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 15
	jne	.L393
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L393
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L393
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L393
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L393
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L393
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L393
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L393
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L393
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L393
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L393
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L257
.L393:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 15
	jne	.L394
	movss	xmm1, DWORD PTR p14_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L395
.L394:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L395
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L395
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L395
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L395
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L395
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L395
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L395
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L395
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L395
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L395
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L257
.L395:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L396
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L396
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L397
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L397
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L397
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L398
.L397:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L396
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L396
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L396
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L398
.L396:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L398
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L398
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L398
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L398
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L398
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L398
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L257
.L398:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L399
	movss	xmm0, DWORD PTR p14_c[rip]
	movss	xmm1, DWORD PTR _x_p14_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L399
	ucomiss	xmm0, xmm1
	je	.L400
.L399:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L400
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L400
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	je	.L400
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L400
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L257
.L400:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L402
	movss	xmm0, DWORD PTR _x_p14_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L402
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L403
.L402:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L403
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L403
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	je	.L403
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L403
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L403
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L403
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L403
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L403
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L403
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L403
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L257
.L403:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L405
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L405
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L405
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L405
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L405
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L405
	movss	xmm0, DWORD PTR _x_p14_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L405
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L406
.L405:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L406
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L406
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L406
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L406
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L406
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L406
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L257
.L406:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L408
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L408
	movss	xmm0, DWORD PTR p14_c[rip]
	movss	xmm1, DWORD PTR _x_p14_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L408
	ucomiss	xmm0, xmm1
	jne	.L408
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L410
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L410
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L410
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L411
.L410:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L408
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L408
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L408
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L411
.L408:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L411
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L411
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L411
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L411
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L411
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L411
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L257
.L411:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 15
	jne	.L412
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L412
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L412
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	je	.L412
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L412
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L412
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L412
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L412
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L412
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L412
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L412
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L257
.L412:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 15
	je	.L413
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L413
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L413
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	je	.L413
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L413
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L413
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L413
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L413
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L413
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L413
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L413
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L257
.L413:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L414
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L414
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L414
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L414
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L414
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L414
	movss	xmm0, DWORD PTR _x_p14_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L414
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L415
.L414:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L415
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L415
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L415
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L415
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L415
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L415
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L257
.L415:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L417
	movss	xmm0, DWORD PTR _x_p14_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L417
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L417
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L417
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	je	.L417
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L417
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L417
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L419
.L417:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L419
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L419
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L419
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L419
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L419
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L419
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L257
.L419:
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L420
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L420
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L420
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L420
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L420
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L420
	movss	xmm0, DWORD PTR p14_c[rip]
	movss	xmm1, DWORD PTR _x_p14_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L420
	ucomiss	xmm0, xmm1
	je	.L421
.L420:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	je	.L421
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L421
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L421
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L421
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L421
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L421
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L257
.L421:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	je	.L423
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L423
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L423
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L424
.L423:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L425
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L425
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L425
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L424
.L425:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L426
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L426
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L426
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L424
.L426:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L427
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L427
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L427
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L424
.L427:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L428
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L428
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L428
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L424
.L428:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L429
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L429
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L429
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L424
.L429:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L430
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L430
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L430
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L424
.L430:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L431
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L431
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L431
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L424
.L431:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L257
.L424:
	movss	xmm1, DWORD PTR _x_p13_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L432
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L433
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L433
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L433
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L257
.L433:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L434
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L434
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L434
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L257
.L434:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L435
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L435
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L435
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L257
.L435:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	je	.L432
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L432
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L432
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L257
.L432:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L436
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p13_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p13_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L436:
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L438
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p13_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p13_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L438:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L440
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L440
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L440
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L440
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L440
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L440
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L440
	movss	xmm0, DWORD PTR _x_p13_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L440
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L441
.L440:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L441
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L441
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L441
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L441
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L441
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L441
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L257
.L441:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L443
	movss	xmm0, DWORD PTR _x_p13_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L443
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L443
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L443
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L443
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L443
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L443
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 14
	je	.L445
.L443:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L445
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L445
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L445
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L445
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L445
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L445
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L257
.L445:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L446
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L446
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L447
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L447
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L447
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L448
.L447:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L446
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L446
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L446
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L446
.L448:
	movss	xmm0, DWORD PTR p13_c[rip]
	movss	xmm1, DWORD PTR _x_p13_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L446
	ucomiss	xmm0, xmm1
	je	.L449
.L446:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L449
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L449
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L449
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L449
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L449
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L449
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L257
.L449:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 14
	jne	.L451
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L451
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L451
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L451
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L451
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L451
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L451
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L451
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L451
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L451
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L451
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L257
.L451:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 14
	jne	.L452
	movss	xmm1, DWORD PTR p13_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L453
.L452:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L453
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L453
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L453
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L453
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L453
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L453
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L453
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L453
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L453
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L453
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L257
.L453:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L454
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L454
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L455
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L455
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L455
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L456
.L455:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L454
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L454
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L454
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L456
.L454:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L456
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L456
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L456
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L456
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L456
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L456
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L257
.L456:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L457
	movss	xmm0, DWORD PTR p13_c[rip]
	movss	xmm1, DWORD PTR _x_p13_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L457
	ucomiss	xmm0, xmm1
	je	.L458
.L457:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L458
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L458
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	je	.L458
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L458
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L458
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L458
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L458
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L458
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L458
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L458
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L257
.L458:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L460
	movss	xmm0, DWORD PTR _x_p13_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L460
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L461
.L460:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L461
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L461
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	je	.L461
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L461
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L461
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L461
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L461
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L461
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L461
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L461
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L257
.L461:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L463
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L463
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L463
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L463
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L463
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L463
	movss	xmm0, DWORD PTR _x_p13_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L463
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L464
.L463:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L464
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L464
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L464
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L464
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L464
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L464
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L257
.L464:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L466
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L466
	movss	xmm0, DWORD PTR p13_c[rip]
	movss	xmm1, DWORD PTR _x_p13_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L466
	ucomiss	xmm0, xmm1
	jne	.L466
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L468
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L468
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L468
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L469
.L468:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L466
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L466
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L466
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L469
.L466:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L469
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L469
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L469
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L469
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L469
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L469
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L257
.L469:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 14
	jne	.L470
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L470
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L470
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	je	.L470
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L470
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L470
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L470
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L470
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L470
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L470
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L470
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L257
.L470:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 14
	je	.L471
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L471
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L471
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	je	.L471
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L471
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L471
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L471
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L471
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L471
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L471
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L471
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L257
.L471:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L472
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L472
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L472
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L472
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L472
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L472
	movss	xmm0, DWORD PTR _x_p13_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L472
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L473
.L472:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L473
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L473
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L473
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L473
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L473
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L473
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L257
.L473:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L475
	movss	xmm0, DWORD PTR _x_p13_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L475
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L475
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L475
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	je	.L475
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L475
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L475
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L477
.L475:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L477
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L477
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L477
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L477
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L477
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L477
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L257
.L477:
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L478
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L478
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L478
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L478
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L478
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L478
	movss	xmm0, DWORD PTR p13_c[rip]
	movss	xmm1, DWORD PTR _x_p13_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L478
	ucomiss	xmm0, xmm1
	je	.L479
.L478:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	je	.L479
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L479
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L479
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L479
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L479
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L479
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L257
.L479:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	je	.L481
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L481
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L481
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L482
.L481:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L483
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L483
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L483
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L482
.L483:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L484
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L484
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L484
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L482
.L484:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L485
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L485
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L485
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L482
.L485:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L486
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L486
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L486
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L482
.L486:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L487
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L487
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L487
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L482
.L487:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L488
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L488
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L488
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L482
.L488:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L489
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L489
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L489
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L482
.L489:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L257
.L482:
	movss	xmm1, DWORD PTR _x_p12_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L490
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L491
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L491
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L491
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L257
.L491:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L492
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L492
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L492
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L257
.L492:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L493
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L493
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L493
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L257
.L493:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	je	.L490
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L490
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L490
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L257
.L490:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L494
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p12_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p12_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L494:
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L496
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p12_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p12_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L496:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L498
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L498
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L498
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L498
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L498
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L498
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L498
	movss	xmm0, DWORD PTR _x_p12_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L498
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L499
.L498:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L499
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L499
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L499
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L499
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L499
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L499
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L257
.L499:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L501
	movss	xmm0, DWORD PTR _x_p12_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L501
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L501
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L501
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L501
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L501
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L501
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 13
	je	.L503
.L501:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L503
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L503
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L503
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L503
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L503
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L503
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L257
.L503:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L504
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L504
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L505
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L505
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L505
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L506
.L505:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L504
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L504
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L504
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L504
.L506:
	movss	xmm0, DWORD PTR p12_c[rip]
	movss	xmm1, DWORD PTR _x_p12_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L504
	ucomiss	xmm0, xmm1
	je	.L507
.L504:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L507
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L507
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L507
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L507
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L507
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L507
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L257
.L507:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 13
	jne	.L509
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L509
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L509
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L509
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L509
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L509
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L509
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L509
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L509
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L509
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L509
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L257
.L509:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 13
	jne	.L510
	movss	xmm1, DWORD PTR p12_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L511
.L510:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L511
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L511
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L511
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L511
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L511
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L511
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L511
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L511
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L511
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L511
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L257
.L511:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L512
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L512
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L513
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L513
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L513
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L514
.L513:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L512
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L512
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L512
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L514
.L512:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L514
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L514
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L514
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L514
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L514
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L514
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L257
.L514:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L515
	movss	xmm0, DWORD PTR p12_c[rip]
	movss	xmm1, DWORD PTR _x_p12_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L515
	ucomiss	xmm0, xmm1
	je	.L516
.L515:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L516
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L516
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	je	.L516
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L516
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L516
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L516
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L516
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L516
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L516
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L516
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L257
.L516:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L518
	movss	xmm0, DWORD PTR _x_p12_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L518
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L519
.L518:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L519
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L519
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	je	.L519
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L519
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L519
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L519
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L519
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L519
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L519
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L519
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L257
.L519:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L521
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L521
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L521
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L521
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L521
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L521
	movss	xmm0, DWORD PTR _x_p12_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L521
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L522
.L521:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L522
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L522
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L522
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L522
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L522
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L522
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L257
.L522:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L524
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L524
	movss	xmm0, DWORD PTR p12_c[rip]
	movss	xmm1, DWORD PTR _x_p12_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L524
	ucomiss	xmm0, xmm1
	jne	.L524
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L526
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L526
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L526
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L527
.L526:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L524
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L524
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L524
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L527
.L524:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L527
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L527
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L527
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L527
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L527
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L527
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L257
.L527:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 13
	jne	.L528
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L528
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L528
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	je	.L528
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L528
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L528
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L528
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L528
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L528
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L528
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L528
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L257
.L528:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 13
	je	.L529
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L529
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L529
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	je	.L529
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L529
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L529
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L529
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L529
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L529
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L529
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L529
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L257
.L529:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L530
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L530
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L530
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L530
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L530
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L530
	movss	xmm0, DWORD PTR _x_p12_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L530
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L531
.L530:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L531
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L531
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L531
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L531
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L531
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L531
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L257
.L531:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L533
	movss	xmm0, DWORD PTR _x_p12_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L533
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L533
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L533
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	je	.L533
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L533
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L533
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L535
.L533:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L535
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L535
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L535
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L535
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L535
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L535
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L257
.L535:
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L536
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L536
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L536
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L536
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L536
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L536
	movss	xmm0, DWORD PTR p12_c[rip]
	movss	xmm1, DWORD PTR _x_p12_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L536
	ucomiss	xmm0, xmm1
	je	.L537
.L536:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	je	.L537
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L537
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L537
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L537
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L537
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L537
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L257
.L537:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	je	.L539
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L539
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L539
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L540
.L539:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L541
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L541
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L541
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L540
.L541:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L542
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L542
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L542
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L540
.L542:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L543
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L543
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L543
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L540
.L543:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L544
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L544
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L544
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L540
.L544:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L545
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L545
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L545
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L540
.L545:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L546
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L546
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L546
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L540
.L546:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L547
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L547
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L547
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L540
.L547:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L257
.L540:
	movss	xmm1, DWORD PTR _x_p11_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L548
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L549
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L549
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L549
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L257
.L549:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L550
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L550
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L550
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L257
.L550:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L551
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L551
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L551
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L257
.L551:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	je	.L548
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L548
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L548
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L257
.L548:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L552
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p11_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p11_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L552:
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L554
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p11_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p11_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L554:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L556
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L556
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L556
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L556
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L556
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L556
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L556
	movss	xmm0, DWORD PTR _x_p11_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L556
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L557
.L556:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L557
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L557
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L557
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L557
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L557
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L557
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L257
.L557:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L559
	movss	xmm0, DWORD PTR _x_p11_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L559
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L559
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L559
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L559
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L559
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L559
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 12
	je	.L561
.L559:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L561
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L561
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L561
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L561
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L561
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L561
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L257
.L561:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L562
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L562
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L563
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L563
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L563
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L564
.L563:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L562
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L562
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L562
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L562
.L564:
	movss	xmm0, DWORD PTR p11_c[rip]
	movss	xmm1, DWORD PTR _x_p11_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L562
	ucomiss	xmm0, xmm1
	je	.L565
.L562:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L565
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L565
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L565
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L565
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L565
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L565
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L257
.L565:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 12
	jne	.L567
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L567
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L567
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L567
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L567
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L567
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L567
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L567
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L567
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L567
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L567
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L257
.L567:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 12
	jne	.L568
	movss	xmm1, DWORD PTR p11_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L569
.L568:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L569
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L569
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L569
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L569
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L569
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L569
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L569
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L569
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L569
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L569
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L257
.L569:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L570
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L570
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L571
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L571
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L571
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L572
.L571:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L570
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L570
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L570
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L572
.L570:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L572
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L572
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L572
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L572
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L572
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L572
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L257
.L572:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L573
	movss	xmm0, DWORD PTR p11_c[rip]
	movss	xmm1, DWORD PTR _x_p11_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L573
	ucomiss	xmm0, xmm1
	je	.L574
.L573:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L574
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L574
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	je	.L574
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L574
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L574
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L574
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L574
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L574
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L574
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L574
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L257
.L574:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L576
	movss	xmm0, DWORD PTR _x_p11_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L576
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L577
.L576:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L577
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L577
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	je	.L577
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L577
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L577
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L577
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L577
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L577
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L577
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L577
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L257
.L577:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L579
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L579
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L579
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L579
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L579
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L579
	movss	xmm0, DWORD PTR _x_p11_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L579
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L580
.L579:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L580
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L580
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L580
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L580
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L580
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L580
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L257
.L580:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L582
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L582
	movss	xmm0, DWORD PTR p11_c[rip]
	movss	xmm1, DWORD PTR _x_p11_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L582
	ucomiss	xmm0, xmm1
	jne	.L582
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L584
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L584
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L584
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L585
.L584:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L582
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L582
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L582
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L585
.L582:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L585
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L585
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L585
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L585
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L585
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L585
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L257
.L585:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 12
	jne	.L586
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L586
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L586
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	je	.L586
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L586
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L586
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L586
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L586
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L586
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L586
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L586
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L257
.L586:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 12
	je	.L587
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L587
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L587
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	je	.L587
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L587
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L587
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L587
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L587
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L587
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L587
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L587
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L257
.L587:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L588
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L588
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L588
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L588
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L588
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L588
	movss	xmm0, DWORD PTR _x_p11_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L588
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L589
.L588:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L589
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L589
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L589
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L589
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L589
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L589
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L257
.L589:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L591
	movss	xmm0, DWORD PTR _x_p11_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L591
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L591
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L591
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	je	.L591
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L591
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L591
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L593
.L591:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L593
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L593
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L593
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L593
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L593
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L593
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L257
.L593:
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L594
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L594
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L594
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L594
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L594
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L594
	movss	xmm0, DWORD PTR p11_c[rip]
	movss	xmm1, DWORD PTR _x_p11_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L594
	ucomiss	xmm0, xmm1
	je	.L595
.L594:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	je	.L595
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L595
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L595
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L595
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L595
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L595
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L257
.L595:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	je	.L597
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L597
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L597
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L598
.L597:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L599
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L599
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L599
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L598
.L599:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L600
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L600
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L600
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L598
.L600:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L601
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L601
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L601
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L598
.L601:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L602
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L602
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L602
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L598
.L602:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L603
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L603
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L603
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L598
.L603:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L604
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L604
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L604
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L598
.L604:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L605
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L605
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L605
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L598
.L605:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L257
.L598:
	movss	xmm1, DWORD PTR _x_p10_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L606
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L607
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L607
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L607
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L257
.L607:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L608
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L608
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L608
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L257
.L608:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L609
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L609
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L609
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L257
.L609:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	je	.L606
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L606
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L606
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L257
.L606:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L610
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p10_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p10_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L610:
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L612
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p10_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p10_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L612:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L614
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L614
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L614
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L614
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L614
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L614
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L614
	movss	xmm0, DWORD PTR _x_p10_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L614
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L615
.L614:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L615
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L615
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L615
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L615
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L615
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L615
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L257
.L615:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L617
	movss	xmm0, DWORD PTR _x_p10_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L617
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L617
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L617
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L617
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L617
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L617
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 11
	je	.L619
.L617:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L619
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L619
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L619
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L619
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L619
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L619
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L257
.L619:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L620
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L620
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L621
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L621
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L621
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L622
.L621:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L620
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L620
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L620
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L620
.L622:
	movss	xmm0, DWORD PTR p10_c[rip]
	movss	xmm1, DWORD PTR _x_p10_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L620
	ucomiss	xmm0, xmm1
	je	.L623
.L620:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L623
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L623
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L623
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L623
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L623
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L623
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L257
.L623:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 11
	jne	.L625
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L625
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L625
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L625
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L625
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L625
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L625
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L625
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L625
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L625
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L625
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L257
.L625:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 11
	jne	.L626
	movss	xmm1, DWORD PTR p10_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L627
.L626:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L627
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L627
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L627
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L627
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L627
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L627
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L627
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L627
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L627
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L627
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L257
.L627:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L628
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L628
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L629
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L629
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L629
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L630
.L629:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L628
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L628
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L628
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L630
.L628:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L630
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L630
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L630
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L630
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L630
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L630
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L257
.L630:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L631
	movss	xmm0, DWORD PTR p10_c[rip]
	movss	xmm1, DWORD PTR _x_p10_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L631
	ucomiss	xmm0, xmm1
	je	.L632
.L631:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L632
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L632
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	je	.L632
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L632
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L632
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L632
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L632
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L632
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L632
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L632
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L257
.L632:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L634
	movss	xmm0, DWORD PTR _x_p10_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L634
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L635
.L634:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L635
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L635
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	je	.L635
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L635
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L635
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L635
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L635
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L635
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L635
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L635
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L257
.L635:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L637
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L637
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L637
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L637
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L637
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L637
	movss	xmm0, DWORD PTR _x_p10_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L637
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L638
.L637:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L638
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L638
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L638
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L638
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L638
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L638
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L257
.L638:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L640
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L640
	movss	xmm0, DWORD PTR p10_c[rip]
	movss	xmm1, DWORD PTR _x_p10_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L640
	ucomiss	xmm0, xmm1
	jne	.L640
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L642
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L642
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L642
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L643
.L642:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L640
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L640
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L640
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L643
.L640:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L643
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L643
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L643
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L643
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L643
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L643
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L257
.L643:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 11
	jne	.L644
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L644
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L644
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	je	.L644
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L644
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L644
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L644
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L644
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L644
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L644
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L644
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L257
.L644:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 11
	je	.L645
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L645
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L645
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	je	.L645
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L645
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L645
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L645
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L645
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L645
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L645
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L645
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L257
.L645:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L646
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L646
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L646
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L646
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L646
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L646
	movss	xmm0, DWORD PTR _x_p10_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L646
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L647
.L646:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L647
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L647
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L647
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L647
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L647
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L647
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L257
.L647:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L649
	movss	xmm0, DWORD PTR _x_p10_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L649
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L649
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L649
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	je	.L649
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L649
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L649
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L651
.L649:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L651
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L651
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L651
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L651
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L651
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L651
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L257
.L651:
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L652
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L652
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L652
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L652
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L652
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L652
	movss	xmm0, DWORD PTR p10_c[rip]
	movss	xmm1, DWORD PTR _x_p10_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L652
	ucomiss	xmm0, xmm1
	je	.L653
.L652:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	je	.L653
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L653
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L653
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L653
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L653
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L653
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L257
.L653:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	je	.L655
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L655
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L655
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L656
.L655:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L657
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L657
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L657
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L656
.L657:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L658
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L658
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L658
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L656
.L658:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L659
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L659
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L659
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L656
.L659:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L660
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L660
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L660
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L656
.L660:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L661
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L661
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L661
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L656
.L661:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L662
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L662
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L662
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L656
.L662:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L663
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L663
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L663
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L656
.L663:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L257
.L656:
	movss	xmm1, DWORD PTR _x_p9_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L664
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L665
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L665
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L665
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L257
.L665:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L666
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L666
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L666
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L257
.L666:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L667
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L667
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L667
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L257
.L667:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	je	.L664
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L664
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L664
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L257
.L664:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L668
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p9_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p9_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L668:
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L670
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p9_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p9_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L670:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L672
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L672
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L672
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L672
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L672
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L672
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L672
	movss	xmm0, DWORD PTR _x_p9_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L672
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L673
.L672:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L673
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L673
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L673
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L673
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L673
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L673
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L257
.L673:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L675
	movss	xmm0, DWORD PTR _x_p9_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L675
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L675
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L675
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L675
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L675
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L675
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 10
	je	.L677
.L675:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L677
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L677
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L677
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L677
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L677
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L677
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L257
.L677:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L678
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L678
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L679
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L679
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L679
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L680
.L679:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L678
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L678
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L678
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L678
.L680:
	movss	xmm0, DWORD PTR p9_c[rip]
	movss	xmm1, DWORD PTR _x_p9_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L678
	ucomiss	xmm0, xmm1
	je	.L681
.L678:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L681
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L681
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L681
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L681
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L681
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L681
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L257
.L681:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 10
	jne	.L683
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L683
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L683
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L683
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L683
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L683
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L683
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L683
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L683
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L683
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L683
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L257
.L683:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 10
	jne	.L684
	movss	xmm1, DWORD PTR p9_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L685
.L684:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L685
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L685
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L685
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L685
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L685
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L685
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L685
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L685
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L685
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L685
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L257
.L685:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L686
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L686
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L687
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L687
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L687
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L688
.L687:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L686
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L686
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L686
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L688
.L686:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L688
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L688
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L688
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L688
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L688
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L688
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L257
.L688:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L689
	movss	xmm0, DWORD PTR p9_c[rip]
	movss	xmm1, DWORD PTR _x_p9_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L689
	ucomiss	xmm0, xmm1
	je	.L690
.L689:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L690
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L690
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	je	.L690
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L690
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L690
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L690
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L690
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L690
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L690
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L690
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L257
.L690:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L692
	movss	xmm0, DWORD PTR _x_p9_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L692
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L693
.L692:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L693
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L693
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	je	.L693
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L693
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L693
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L693
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L693
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L693
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L693
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L693
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L257
.L693:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L695
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L695
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L695
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L695
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L695
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L695
	movss	xmm0, DWORD PTR _x_p9_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L695
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L696
.L695:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L696
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L696
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L696
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L696
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L696
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L696
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L257
.L696:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L698
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L698
	movss	xmm0, DWORD PTR p9_c[rip]
	movss	xmm1, DWORD PTR _x_p9_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L698
	ucomiss	xmm0, xmm1
	jne	.L698
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L700
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L700
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L700
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L701
.L700:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L698
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L698
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L698
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L701
.L698:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L701
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L701
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L701
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L701
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L701
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L701
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L257
.L701:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 10
	jne	.L702
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L702
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L702
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	je	.L702
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L702
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L702
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L702
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L702
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L702
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L702
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L702
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L257
.L702:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 10
	je	.L703
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L703
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L703
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	je	.L703
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L703
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L703
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L703
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L703
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L703
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L703
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L703
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L257
.L703:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L704
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L704
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L704
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L704
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L704
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L704
	movss	xmm0, DWORD PTR _x_p9_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L704
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L705
.L704:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L705
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L705
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L705
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L705
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L705
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L705
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L257
.L705:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L707
	movss	xmm0, DWORD PTR _x_p9_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L707
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L707
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L707
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	je	.L707
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L707
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L707
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L709
.L707:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L709
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L709
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L709
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L709
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L709
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L709
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L257
.L709:
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L710
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L710
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L710
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L710
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L710
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L710
	movss	xmm0, DWORD PTR p9_c[rip]
	movss	xmm1, DWORD PTR _x_p9_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L710
	ucomiss	xmm0, xmm1
	je	.L711
.L710:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	je	.L711
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L711
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L711
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L711
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L711
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L711
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L257
.L711:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	je	.L713
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L713
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L713
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L714
.L713:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L715
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L715
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L715
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L714
.L715:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L716
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L716
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L716
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L714
.L716:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L717
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L717
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L717
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L714
.L717:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L718
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L718
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L718
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L714
.L718:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L719
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L719
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L719
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L714
.L719:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L720
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L720
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L720
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L714
.L720:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L721
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L721
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L721
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L714
.L721:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L257
.L714:
	movss	xmm1, DWORD PTR _x_p8_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L722
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L723
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L723
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L723
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L257
.L723:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L724
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L724
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L724
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L257
.L724:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L725
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L725
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L725
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L257
.L725:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	je	.L722
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L722
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L722
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L257
.L722:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L726
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p8_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p8_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L726:
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L728
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p8_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p8_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L728:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L730
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L730
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L730
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L730
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L730
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L730
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L730
	movss	xmm0, DWORD PTR _x_p8_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L730
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L731
.L730:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L731
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L731
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L731
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L731
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L731
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L731
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L257
.L731:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L733
	movss	xmm0, DWORD PTR _x_p8_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L733
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L733
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L733
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L733
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L733
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L733
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 9
	je	.L735
.L733:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L735
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L735
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L735
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L735
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L735
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L735
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L257
.L735:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L736
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L736
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L737
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L737
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L737
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L738
.L737:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L736
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L736
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L736
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L736
.L738:
	movss	xmm0, DWORD PTR p8_c[rip]
	movss	xmm1, DWORD PTR _x_p8_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L736
	ucomiss	xmm0, xmm1
	je	.L739
.L736:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L739
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L739
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L739
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L739
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L739
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L739
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L257
.L739:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 9
	jne	.L741
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L741
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L741
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L741
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L741
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L741
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L741
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L741
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L741
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L741
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L741
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L257
.L741:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 9
	jne	.L742
	movss	xmm1, DWORD PTR p8_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L743
.L742:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L743
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L743
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L743
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L743
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L743
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L743
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L743
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L743
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L743
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L743
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L257
.L743:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L744
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L744
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L745
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L745
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L745
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L746
.L745:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L744
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L744
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L744
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L746
.L744:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L746
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L746
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L746
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L746
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L746
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L746
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L257
.L746:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L747
	movss	xmm0, DWORD PTR p8_c[rip]
	movss	xmm1, DWORD PTR _x_p8_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L747
	ucomiss	xmm0, xmm1
	je	.L748
.L747:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L748
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L748
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	je	.L748
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L748
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L748
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L748
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L748
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L748
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L748
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L748
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L257
.L748:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L750
	movss	xmm0, DWORD PTR _x_p8_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L750
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L751
.L750:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L751
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L751
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	je	.L751
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L751
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L751
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L751
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L751
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L751
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L751
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L751
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L257
.L751:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L753
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L753
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L753
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L753
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L753
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L753
	movss	xmm0, DWORD PTR _x_p8_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L753
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L754
.L753:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L754
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L754
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L754
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L754
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L754
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L754
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L257
.L754:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L756
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L756
	movss	xmm0, DWORD PTR p8_c[rip]
	movss	xmm1, DWORD PTR _x_p8_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L756
	ucomiss	xmm0, xmm1
	jne	.L756
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L758
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L758
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L758
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L759
.L758:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L756
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L756
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L756
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L759
.L756:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L759
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L759
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L759
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L759
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L759
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L759
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L257
.L759:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 9
	jne	.L760
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L760
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L760
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	je	.L760
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L760
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L760
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L760
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L760
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L760
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L760
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L760
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L257
.L760:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 9
	je	.L761
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L761
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L761
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	je	.L761
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L761
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L761
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L761
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L761
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L761
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L761
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L761
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L257
.L761:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L762
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L762
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L762
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L762
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L762
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L762
	movss	xmm0, DWORD PTR _x_p8_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L762
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L763
.L762:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L763
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L763
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L763
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L763
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L763
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L763
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L257
.L763:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L765
	movss	xmm0, DWORD PTR _x_p8_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L765
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L765
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L765
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	je	.L765
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L765
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L765
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L767
.L765:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L767
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L767
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L767
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L767
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L767
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L767
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L257
.L767:
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L768
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L768
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L768
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L768
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L768
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L768
	movss	xmm0, DWORD PTR p8_c[rip]
	movss	xmm1, DWORD PTR _x_p8_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L768
	ucomiss	xmm0, xmm1
	je	.L769
.L768:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	je	.L769
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L769
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L769
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L769
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L769
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L769
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L257
.L769:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	je	.L771
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L771
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L771
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L772
.L771:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L773
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L773
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L773
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L772
.L773:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L774
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L774
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L774
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L772
.L774:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L775
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L775
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L775
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L772
.L775:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L776
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L776
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L776
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L772
.L776:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L777
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L777
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L777
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L772
.L777:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L778
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L778
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L778
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L772
.L778:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L779
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L779
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L779
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L772
.L779:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L257
.L772:
	movss	xmm1, DWORD PTR _x_p7_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L780
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L781
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L781
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L781
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L257
.L781:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L782
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L782
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L782
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L257
.L782:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L783
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L783
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L783
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L257
.L783:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	je	.L780
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L780
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L780
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L257
.L780:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L784
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p7_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p7_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L784:
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L786
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p7_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p7_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L786:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L788
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L788
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L788
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L788
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L788
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L788
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L788
	movss	xmm0, DWORD PTR _x_p7_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L788
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L789
.L788:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L789
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L789
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L789
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L789
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L789
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L789
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L257
.L789:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L791
	movss	xmm0, DWORD PTR _x_p7_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L791
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L791
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L791
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L791
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L791
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L791
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 8
	je	.L793
.L791:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L793
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L793
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L793
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L793
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L793
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L793
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L257
.L793:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L794
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L794
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L795
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L795
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L795
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L796
.L795:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L794
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L794
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L794
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L794
.L796:
	movss	xmm0, DWORD PTR p7_c[rip]
	movss	xmm1, DWORD PTR _x_p7_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L794
	ucomiss	xmm0, xmm1
	je	.L797
.L794:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L797
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L797
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L797
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L797
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L797
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L797
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L257
.L797:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 8
	jne	.L799
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L799
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L799
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L799
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L799
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L799
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L799
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L799
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L799
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L799
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L799
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L257
.L799:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 8
	jne	.L800
	movss	xmm1, DWORD PTR p7_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L801
.L800:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L801
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L801
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L801
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L801
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L801
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L801
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L801
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L801
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L801
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L801
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L257
.L801:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L802
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L802
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L803
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L803
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L803
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L804
.L803:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L802
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L802
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L802
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L804
.L802:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L804
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L804
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L804
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L804
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L804
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L804
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L257
.L804:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L805
	movss	xmm0, DWORD PTR p7_c[rip]
	movss	xmm1, DWORD PTR _x_p7_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L805
	ucomiss	xmm0, xmm1
	je	.L806
.L805:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L806
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L806
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	je	.L806
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L806
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L806
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L806
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L806
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L806
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L806
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L806
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L257
.L806:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L808
	movss	xmm0, DWORD PTR _x_p7_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L808
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L809
.L808:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L809
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L809
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	je	.L809
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L809
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L809
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L809
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L809
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L809
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L809
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L809
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L257
.L809:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L811
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L811
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L811
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L811
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L811
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L811
	movss	xmm0, DWORD PTR _x_p7_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L811
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L812
.L811:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L812
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L812
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L812
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L812
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L812
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L812
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L257
.L812:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L814
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L814
	movss	xmm0, DWORD PTR p7_c[rip]
	movss	xmm1, DWORD PTR _x_p7_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L814
	ucomiss	xmm0, xmm1
	jne	.L814
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L816
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L816
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L816
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L817
.L816:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L814
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L814
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L814
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L817
.L814:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L817
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L817
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L817
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L817
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L817
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L817
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L257
.L817:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 8
	jne	.L818
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L818
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L818
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	je	.L818
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L818
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L818
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L818
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L818
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L818
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L818
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L818
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L257
.L818:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 8
	je	.L819
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L819
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L819
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	je	.L819
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L819
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L819
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L819
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L819
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L819
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L819
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L819
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L257
.L819:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L820
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L820
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L820
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L820
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L820
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L820
	movss	xmm0, DWORD PTR _x_p7_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L820
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L821
.L820:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L821
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L821
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L821
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L821
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L821
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L821
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L257
.L821:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L823
	movss	xmm0, DWORD PTR _x_p7_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L823
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L823
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L823
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	je	.L823
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L823
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L823
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L825
.L823:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L825
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L825
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L825
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L825
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L825
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L825
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L257
.L825:
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L826
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L826
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L826
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L826
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L826
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L826
	movss	xmm0, DWORD PTR p7_c[rip]
	movss	xmm1, DWORD PTR _x_p7_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L826
	ucomiss	xmm0, xmm1
	je	.L827
.L826:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	je	.L827
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L827
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L827
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L827
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L827
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L827
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L257
.L827:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	je	.L829
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L829
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L829
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L830
.L829:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L831
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L831
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L831
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L830
.L831:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L832
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L832
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L832
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L830
.L832:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L833
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L833
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L833
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L830
.L833:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L834
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L834
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L834
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L830
.L834:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L835
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L835
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L835
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L830
.L835:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L836
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L836
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L836
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L830
.L836:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L837
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L837
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L837
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L830
.L837:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L257
.L830:
	movss	xmm1, DWORD PTR _x_p6_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L838
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L839
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L839
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L839
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L257
.L839:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L840
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L840
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L840
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L257
.L840:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L841
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L841
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L841
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L257
.L841:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	je	.L838
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L838
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L838
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L257
.L838:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L842
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p6_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p6_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L842:
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L844
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p6_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p6_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L844:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L846
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L846
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L846
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L846
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L846
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L846
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L846
	movss	xmm0, DWORD PTR _x_p6_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L846
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L847
.L846:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L847
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L847
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L847
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L847
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L847
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L847
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L257
.L847:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L849
	movss	xmm0, DWORD PTR _x_p6_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L849
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L849
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L849
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L849
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L849
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L849
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 7
	je	.L851
.L849:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L851
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L851
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L851
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L851
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L851
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L851
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L257
.L851:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L852
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L852
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L853
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L853
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L853
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L854
.L853:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L852
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L852
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L852
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L852
.L854:
	movss	xmm0, DWORD PTR p6_c[rip]
	movss	xmm1, DWORD PTR _x_p6_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L852
	ucomiss	xmm0, xmm1
	je	.L855
.L852:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L855
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L855
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L855
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L855
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L855
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L855
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L257
.L855:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 7
	jne	.L857
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L857
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L857
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L857
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L857
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L857
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L857
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L857
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L857
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L857
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L857
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L257
.L857:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 7
	jne	.L858
	movss	xmm1, DWORD PTR p6_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L859
.L858:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L859
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L859
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L859
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L859
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L859
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L859
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L859
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L859
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L859
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L859
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L257
.L859:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L860
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L860
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L861
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L861
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L861
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L862
.L861:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L860
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L860
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L860
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L862
.L860:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L862
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L862
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L862
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L862
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L862
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L862
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L257
.L862:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L863
	movss	xmm0, DWORD PTR p6_c[rip]
	movss	xmm1, DWORD PTR _x_p6_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L863
	ucomiss	xmm0, xmm1
	je	.L864
.L863:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L864
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L864
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	je	.L864
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L864
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L864
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L864
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L864
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L864
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L864
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L864
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L257
.L864:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L866
	movss	xmm0, DWORD PTR _x_p6_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L866
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L867
.L866:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L867
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L867
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	je	.L867
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L867
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L867
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L867
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L867
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L867
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L867
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L867
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L257
.L867:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L869
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L869
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L869
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L869
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L869
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L869
	movss	xmm0, DWORD PTR _x_p6_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L869
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L870
.L869:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L870
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L870
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L870
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L870
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L870
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L870
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L257
.L870:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L872
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L872
	movss	xmm0, DWORD PTR p6_c[rip]
	movss	xmm1, DWORD PTR _x_p6_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L872
	ucomiss	xmm0, xmm1
	jne	.L872
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L874
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L874
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L874
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L875
.L874:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L872
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L872
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L872
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L875
.L872:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L875
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L875
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L875
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L875
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L875
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L875
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L257
.L875:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 7
	jne	.L876
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L876
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L876
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	je	.L876
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L876
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L876
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L876
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L876
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L876
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L876
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L876
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L257
.L876:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 7
	je	.L877
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L877
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L877
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	je	.L877
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L877
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L877
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L877
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L877
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L877
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L877
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L877
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L257
.L877:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L878
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L878
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L878
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L878
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L878
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L878
	movss	xmm0, DWORD PTR _x_p6_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L878
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L879
.L878:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L879
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L879
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L879
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L879
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L879
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L879
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L257
.L879:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L881
	movss	xmm0, DWORD PTR _x_p6_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L881
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L881
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L881
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	je	.L881
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L881
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L881
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L883
.L881:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L883
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L883
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L883
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L883
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L883
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L883
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L257
.L883:
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L884
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L884
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L884
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L884
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L884
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L884
	movss	xmm0, DWORD PTR p6_c[rip]
	movss	xmm1, DWORD PTR _x_p6_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L884
	ucomiss	xmm0, xmm1
	je	.L885
.L884:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	je	.L885
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L885
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L885
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L885
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L885
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L885
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L257
.L885:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	je	.L887
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L887
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L887
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L888
.L887:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L889
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L889
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L889
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L888
.L889:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L890
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L890
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L890
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L888
.L890:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L891
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L891
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L891
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L888
.L891:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L892
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L892
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L892
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L888
.L892:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L893
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L893
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L893
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L888
.L893:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L894
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L894
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L894
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L888
.L894:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L895
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L895
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L895
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L888
.L895:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L257
.L888:
	movss	xmm1, DWORD PTR _x_p5_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L896
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L897
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L897
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L897
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L257
.L897:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L898
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L898
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L898
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L257
.L898:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L899
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L899
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L899
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L257
.L899:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	je	.L896
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L896
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L896
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L257
.L896:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L900
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p5_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p5_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L900:
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L902
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p5_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p5_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L902:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L904
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L904
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L904
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L904
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L904
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L904
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L904
	movss	xmm0, DWORD PTR _x_p5_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L904
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L905
.L904:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L905
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L905
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L905
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L905
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L905
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L905
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L257
.L905:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L907
	movss	xmm0, DWORD PTR _x_p5_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L907
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L907
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L907
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L907
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L907
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L907
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 6
	je	.L909
.L907:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L909
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L909
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L909
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L909
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L909
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L909
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L257
.L909:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L910
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L910
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L911
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L911
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L911
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L912
.L911:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L910
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L910
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L910
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L910
.L912:
	movss	xmm0, DWORD PTR p5_c[rip]
	movss	xmm1, DWORD PTR _x_p5_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L910
	ucomiss	xmm0, xmm1
	je	.L913
.L910:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L913
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L913
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L913
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L913
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L913
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L913
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L257
.L913:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 6
	jne	.L915
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L915
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L915
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L915
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L915
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L915
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L915
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L915
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L915
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L915
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L915
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L257
.L915:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 6
	jne	.L916
	movss	xmm1, DWORD PTR p5_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L917
.L916:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L917
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L917
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L917
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L917
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L917
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L917
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L917
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L917
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L917
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L917
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L257
.L917:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L918
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L918
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L919
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L919
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L919
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L920
.L919:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L918
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L918
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L918
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L920
.L918:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L920
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L920
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L920
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L920
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L920
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L920
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L257
.L920:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L921
	movss	xmm0, DWORD PTR p5_c[rip]
	movss	xmm1, DWORD PTR _x_p5_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L921
	ucomiss	xmm0, xmm1
	je	.L922
.L921:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L922
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L922
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	je	.L922
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L922
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L922
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L922
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L922
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L922
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L922
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L922
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L257
.L922:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L924
	movss	xmm0, DWORD PTR _x_p5_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L924
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L925
.L924:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L925
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L925
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	je	.L925
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L925
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L925
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L925
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L925
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L925
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L925
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L925
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L257
.L925:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L927
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L927
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L927
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L927
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L927
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L927
	movss	xmm0, DWORD PTR _x_p5_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L927
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L928
.L927:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L928
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L928
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L928
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L928
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L928
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L928
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L257
.L928:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L930
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L930
	movss	xmm0, DWORD PTR p5_c[rip]
	movss	xmm1, DWORD PTR _x_p5_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L930
	ucomiss	xmm0, xmm1
	jne	.L930
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L932
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L932
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L932
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L933
.L932:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L930
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L930
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L930
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L933
.L930:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L933
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L933
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L933
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L933
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L933
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L933
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L257
.L933:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 6
	jne	.L934
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L934
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L934
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	je	.L934
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L934
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L934
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L934
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L934
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L934
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L934
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L934
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L257
.L934:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 6
	je	.L935
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L935
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L935
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	je	.L935
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L935
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L935
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L935
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L935
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L935
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L935
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L935
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L257
.L935:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L936
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L936
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L936
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L936
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L936
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L936
	movss	xmm0, DWORD PTR _x_p5_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L936
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L937
.L936:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L937
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L937
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L937
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L937
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L937
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L937
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L257
.L937:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L939
	movss	xmm0, DWORD PTR _x_p5_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L939
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L939
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L939
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	je	.L939
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L939
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L939
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L941
.L939:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L941
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L941
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L941
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L941
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L941
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L941
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L257
.L941:
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L942
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L942
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L942
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L942
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L942
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L942
	movss	xmm0, DWORD PTR p5_c[rip]
	movss	xmm1, DWORD PTR _x_p5_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L942
	ucomiss	xmm0, xmm1
	je	.L943
.L942:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	je	.L943
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L943
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L943
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L943
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L943
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L943
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L257
.L943:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	je	.L945
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L945
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L945
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L946
.L945:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L947
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L947
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L947
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L946
.L947:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L948
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L948
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L948
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L946
.L948:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L949
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L949
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L949
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L946
.L949:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L950
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L950
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L950
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L946
.L950:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L951
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L951
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L951
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L946
.L951:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L952
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L952
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L952
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L946
.L952:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L953
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L953
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L953
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L946
.L953:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L257
.L946:
	movss	xmm1, DWORD PTR _x_p4_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L954
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L955
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L955
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L955
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L257
.L955:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L956
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L956
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L956
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L257
.L956:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L957
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L957
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L957
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L257
.L957:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	je	.L954
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L954
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L954
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L257
.L954:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L958
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p4_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p4_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L958:
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L960
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p4_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p4_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L960:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L962
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L962
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L962
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L962
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L962
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L962
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L962
	movss	xmm0, DWORD PTR _x_p4_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L962
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L963
.L962:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L963
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L963
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L963
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L963
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L963
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L963
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L257
.L963:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L965
	movss	xmm0, DWORD PTR _x_p4_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L965
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L965
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L965
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L965
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L965
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L965
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 5
	je	.L967
.L965:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L967
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L967
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L967
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L967
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L967
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L967
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L257
.L967:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L968
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L968
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L969
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L969
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L969
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L970
.L969:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L968
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L968
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L968
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L968
.L970:
	movss	xmm0, DWORD PTR p4_c[rip]
	movss	xmm1, DWORD PTR _x_p4_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L968
	ucomiss	xmm0, xmm1
	je	.L971
.L968:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L971
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L971
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L971
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L971
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L971
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L971
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L257
.L971:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 5
	jne	.L973
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L973
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L973
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L973
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L973
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L973
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L973
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L973
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L973
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L973
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L973
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L257
.L973:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 5
	jne	.L974
	movss	xmm1, DWORD PTR p4_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L975
.L974:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L975
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L975
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L975
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L975
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L975
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L975
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L975
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L975
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L975
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L975
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L257
.L975:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L976
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L976
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L977
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L977
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L977
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L978
.L977:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L976
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L976
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L976
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L978
.L976:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L978
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L978
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L978
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L978
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L978
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L978
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L257
.L978:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L979
	movss	xmm0, DWORD PTR p4_c[rip]
	movss	xmm1, DWORD PTR _x_p4_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L979
	ucomiss	xmm0, xmm1
	je	.L980
.L979:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L980
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L980
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	je	.L980
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L980
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L980
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L980
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L980
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L980
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L980
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L980
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L257
.L980:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L982
	movss	xmm0, DWORD PTR _x_p4_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L982
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L983
.L982:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L983
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L983
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	je	.L983
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L983
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L983
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L983
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L983
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L983
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L983
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L983
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L257
.L983:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L985
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L985
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L985
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L985
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L985
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L985
	movss	xmm0, DWORD PTR _x_p4_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L985
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L986
.L985:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L986
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L986
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L986
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L986
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L986
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L986
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L257
.L986:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L988
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L988
	movss	xmm0, DWORD PTR p4_c[rip]
	movss	xmm1, DWORD PTR _x_p4_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L988
	ucomiss	xmm0, xmm1
	jne	.L988
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L990
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L990
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L990
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L991
.L990:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L988
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L988
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L988
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L991
.L988:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L991
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L991
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L991
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L991
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L991
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L991
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L257
.L991:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 5
	jne	.L992
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L992
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L992
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	je	.L992
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L992
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L992
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L992
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L992
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L992
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L992
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L992
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L257
.L992:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 5
	je	.L993
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L993
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L993
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	je	.L993
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L993
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L993
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L993
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L993
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L993
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L993
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L993
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L257
.L993:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L994
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L994
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L994
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L994
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L994
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L994
	movss	xmm0, DWORD PTR _x_p4_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L994
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L995
.L994:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L995
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L995
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L995
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L995
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L995
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L995
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L257
.L995:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L997
	movss	xmm0, DWORD PTR _x_p4_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L997
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L997
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L997
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	je	.L997
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L997
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L997
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L999
.L997:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L999
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L999
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L999
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L999
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L999
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L999
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L257
.L999:
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L1000
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L1000
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L1000
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L1000
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L1000
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1000
	movss	xmm0, DWORD PTR p4_c[rip]
	movss	xmm1, DWORD PTR _x_p4_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1000
	ucomiss	xmm0, xmm1
	je	.L1001
.L1000:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	je	.L1001
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L1001
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L1001
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L1001
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1001
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1001
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L257
.L1001:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	je	.L1003
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1003
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1003
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1004
.L1003:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1005
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L1005
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L1005
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L1004
.L1005:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1006
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L1006
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1006
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L1004
.L1006:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1007
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L1007
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L1007
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1004
.L1007:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1008
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L1008
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1008
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1004
.L1008:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1009
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1009
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L1009
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L1004
.L1009:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1010
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1010
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1010
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L1004
.L1010:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1011
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1011
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1011
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1004
.L1011:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L257
.L1004:
	movss	xmm1, DWORD PTR _x_p3_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L1012
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1013
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1013
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L1013
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L257
.L1013:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1014
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L1014
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1014
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L257
.L1014:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1015
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L1015
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L1015
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L257
.L1015:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	je	.L1012
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1012
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1012
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L257
.L1012:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L1016
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p3_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p3_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L1016:
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L1018
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p3_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p3_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L1018:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1020
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L1020
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1020
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1020
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L1020
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L1020
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1020
	movss	xmm0, DWORD PTR _x_p3_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1020
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1021
.L1020:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L1021
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L1021
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L1021
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L1021
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1021
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1021
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L257
.L1021:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1023
	movss	xmm0, DWORD PTR _x_p3_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1023
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1023
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1023
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1023
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1023
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1023
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 4
	je	.L1025
.L1023:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L1025
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L1025
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L1025
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L1025
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1025
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1025
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L257
.L1025:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1026
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1026
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1027
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1027
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1027
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1028
.L1027:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1026
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1026
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L1026
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1026
.L1028:
	movss	xmm0, DWORD PTR p3_c[rip]
	movss	xmm1, DWORD PTR _x_p3_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1026
	ucomiss	xmm0, xmm1
	je	.L1029
.L1026:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L1029
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L1029
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L1029
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L1029
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1029
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1029
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L257
.L1029:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 4
	jne	.L1031
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1031
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1031
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1031
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L1031
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L1031
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L1031
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L1031
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L1031
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1031
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1031
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L257
.L1031:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 4
	jne	.L1032
	movss	xmm1, DWORD PTR p3_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L1033
.L1032:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1033
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1033
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L1033
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1033
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L1033
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L1033
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L1033
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L1033
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1033
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1033
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L257
.L1033:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1034
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1034
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1035
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1035
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1035
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1036
.L1035:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L1034
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1036
.L1034:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L1036
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L1036
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L1036
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L1036
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1036
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1036
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L257
.L1036:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L1037
	movss	xmm0, DWORD PTR p3_c[rip]
	movss	xmm1, DWORD PTR _x_p3_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1037
	ucomiss	xmm0, xmm1
	je	.L1038
.L1037:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1038
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1038
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	je	.L1038
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1038
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1038
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1038
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L1038
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L1038
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L1038
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L1038
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L257
.L1038:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L1040
	movss	xmm0, DWORD PTR _x_p3_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1040
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1041
.L1040:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1041
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1041
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	je	.L1041
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L1041
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L1041
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L1041
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L1041
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1041
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L1041
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1041
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L257
.L1041:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L1043
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1043
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L1043
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L1043
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L1043
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1043
	movss	xmm0, DWORD PTR _x_p3_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1043
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1044
.L1043:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L1044
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L1044
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L1044
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L1044
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1044
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1044
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L257
.L1044:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1046
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1046
	movss	xmm0, DWORD PTR p3_c[rip]
	movss	xmm1, DWORD PTR _x_p3_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1046
	ucomiss	xmm0, xmm1
	jne	.L1046
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1048
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1048
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1048
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1049
.L1048:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1046
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L1046
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1046
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L1049
.L1046:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L1049
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L1049
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L1049
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L1049
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1049
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1049
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L257
.L1049:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 4
	jne	.L1050
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1050
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1050
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	je	.L1050
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1050
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1050
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1050
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L1050
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L1050
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L1050
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L1050
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L257
.L1050:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 4
	je	.L1051
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1051
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1051
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	je	.L1051
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L1051
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L1051
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L1051
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L1051
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1051
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L1051
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1051
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L257
.L1051:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1052
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1052
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1052
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L1052
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L1052
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1052
	movss	xmm0, DWORD PTR _x_p3_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1052
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1053
.L1052:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L1053
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L1053
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L1053
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L1053
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1053
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1053
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L257
.L1053:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1055
	movss	xmm0, DWORD PTR _x_p3_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1055
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1055
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L1055
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	je	.L1055
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1055
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1055
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1057
.L1055:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L1057
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L1057
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L1057
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L1057
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1057
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1057
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L257
.L1057:
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L1058
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1058
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1058
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1058
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L1058
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1058
	movss	xmm0, DWORD PTR p3_c[rip]
	movss	xmm1, DWORD PTR _x_p3_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1058
	ucomiss	xmm0, xmm1
	je	.L1059
.L1058:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	je	.L1059
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L1059
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L1059
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L1059
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1059
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1059
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L257
.L1059:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	je	.L1061
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1061
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1061
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1062
.L1061:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1063
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L1063
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L1063
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L1062
.L1063:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1064
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L1064
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1064
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L1062
.L1064:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1065
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L1065
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L1065
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1062
.L1065:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1066
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L1066
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1066
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1062
.L1066:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1067
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1067
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L1067
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L1062
.L1067:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1068
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1068
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1068
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L1062
.L1068:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1069
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1069
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1069
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1062
.L1069:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L257
.L1062:
	movss	xmm1, DWORD PTR _x_p2_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L1070
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1071
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1071
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L1071
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L257
.L1071:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1072
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L1072
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1072
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L257
.L1072:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1073
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L1073
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L1073
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L257
.L1073:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	je	.L1070
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1070
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1070
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L257
.L1070:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L1074
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p2_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p2_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L1074:
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L1076
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p2_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p2_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L1076:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1078
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L1078
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1078
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1078
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L1078
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L1078
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1078
	movss	xmm0, DWORD PTR _x_p2_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1078
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1079
.L1078:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L1079
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L1079
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L1079
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L1079
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1079
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1079
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L257
.L1079:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1081
	movss	xmm0, DWORD PTR _x_p2_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1081
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1081
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1081
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1081
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1081
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1081
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 3
	je	.L1083
.L1081:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L1083
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L1083
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L1083
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L1083
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1083
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1083
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L257
.L1083:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1084
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1084
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1085
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1085
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1085
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1086
.L1085:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1084
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1084
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L1084
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1084
.L1086:
	movss	xmm0, DWORD PTR p2_c[rip]
	movss	xmm1, DWORD PTR _x_p2_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1084
	ucomiss	xmm0, xmm1
	je	.L1087
.L1084:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L1087
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L1087
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L1087
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L1087
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1087
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1087
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L257
.L1087:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 3
	jne	.L1089
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1089
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1089
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1089
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L1089
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L1089
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L1089
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L1089
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L1089
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1089
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1089
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L257
.L1089:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 3
	jne	.L1090
	movss	xmm1, DWORD PTR p2_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L1091
.L1090:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1091
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1091
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L1091
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1091
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L1091
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L1091
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L1091
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L1091
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1091
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1091
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L257
.L1091:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1092
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1092
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1093
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1093
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1093
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1094
.L1093:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1092
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L1092
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1092
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1094
.L1092:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L1094
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L1094
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L1094
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L1094
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1094
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1094
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L257
.L1094:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L1095
	movss	xmm0, DWORD PTR p2_c[rip]
	movss	xmm1, DWORD PTR _x_p2_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1095
	ucomiss	xmm0, xmm1
	je	.L1096
.L1095:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1096
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1096
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	je	.L1096
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1096
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1096
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1096
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L1096
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L1096
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L1096
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L1096
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L257
.L1096:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L1098
	movss	xmm0, DWORD PTR _x_p2_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1098
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1099
.L1098:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1099
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1099
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	je	.L1099
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L1099
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L1099
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L1099
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L1099
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1099
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L1099
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1099
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L257
.L1099:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L1101
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1101
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L1101
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L1101
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L1101
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1101
	movss	xmm0, DWORD PTR _x_p2_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1101
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1102
.L1101:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L1102
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L1102
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L1102
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L1102
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1102
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1102
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L257
.L1102:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1104
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1104
	movss	xmm0, DWORD PTR p2_c[rip]
	movss	xmm1, DWORD PTR _x_p2_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1104
	ucomiss	xmm0, xmm1
	jne	.L1104
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1106
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1106
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1106
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1107
.L1106:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1104
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L1104
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1104
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L1107
.L1104:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L1107
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L1107
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L1107
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L1107
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1107
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1107
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L257
.L1107:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 3
	jne	.L1108
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1108
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1108
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	je	.L1108
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1108
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1108
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1108
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L1108
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L1108
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L1108
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L1108
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L257
.L1108:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 3
	je	.L1109
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1109
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1109
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	je	.L1109
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L1109
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L1109
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L1109
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L1109
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1109
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L1109
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1109
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L257
.L1109:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1110
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1110
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1110
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L1110
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L1110
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1110
	movss	xmm0, DWORD PTR _x_p2_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1110
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1111
.L1110:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L1111
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L1111
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L1111
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L1111
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1111
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1111
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L257
.L1111:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1113
	movss	xmm0, DWORD PTR _x_p2_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1113
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1113
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L1113
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	je	.L1113
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1113
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1113
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1115
.L1113:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L1115
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L1115
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L1115
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L1115
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1115
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1115
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L257
.L1115:
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L1116
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1116
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1116
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1116
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L1116
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1116
	movss	xmm0, DWORD PTR p2_c[rip]
	movss	xmm1, DWORD PTR _x_p2_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1116
	ucomiss	xmm0, xmm1
	je	.L1117
.L1116:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	je	.L1117
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L1117
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L1117
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L1117
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1117
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1117
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L257
.L1117:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	je	.L1119
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1119
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1119
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1120
.L1119:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1121
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L1121
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L1121
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L1120
.L1121:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1122
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L1122
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1122
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L1120
.L1122:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1123
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L1123
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L1123
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1120
.L1123:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1124
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L1124
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1124
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1120
.L1124:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1125
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1125
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L1125
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L1120
.L1125:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1126
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1126
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1126
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L1120
.L1126:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1127
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1127
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1127
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1120
.L1127:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L257
.L1120:
	movss	xmm1, DWORD PTR _x_p1_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L1128
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1129
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1129
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L1129
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L257
.L1129:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1130
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L1130
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1130
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L257
.L1130:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1131
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L1131
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L1131
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L257
.L1131:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	je	.L1128
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1128
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1128
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L257
.L1128:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L1132
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p1_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p1_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L1132:
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L1134
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p1_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p1_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L1134:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1136
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L1136
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1136
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1136
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L1136
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L1136
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1136
	movss	xmm0, DWORD PTR _x_p1_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1136
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1137
.L1136:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1137
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L1137
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L1137
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L1137
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1137
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1137
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L257
.L1137:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1139
	movss	xmm0, DWORD PTR _x_p1_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1139
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1139
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1139
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1139
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1139
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1139
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 2
	je	.L1141
.L1139:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1141
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L1141
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L1141
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L1141
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1141
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1141
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L257
.L1141:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1142
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1142
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1143
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1143
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1143
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1144
.L1143:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1142
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1142
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L1142
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1142
.L1144:
	movss	xmm0, DWORD PTR p1_c[rip]
	movss	xmm1, DWORD PTR _x_p1_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1142
	ucomiss	xmm0, xmm1
	je	.L1145
.L1142:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1145
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L1145
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L1145
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L1145
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1145
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1145
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L257
.L1145:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 2
	jne	.L1147
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1147
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1147
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1147
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L1147
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1147
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L1147
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L1147
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L1147
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1147
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1147
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L257
.L1147:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 2
	jne	.L1148
	movss	xmm1, DWORD PTR p1_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L1149
.L1148:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1149
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1149
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L1149
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1149
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1149
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L1149
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L1149
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L1149
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1149
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1149
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L257
.L1149:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1150
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1150
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1151
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1151
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1151
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1152
.L1151:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1150
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L1150
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1150
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1152
.L1150:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1152
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L1152
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L1152
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L1152
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1152
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1152
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L257
.L1152:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L1153
	movss	xmm0, DWORD PTR p1_c[rip]
	movss	xmm1, DWORD PTR _x_p1_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1153
	ucomiss	xmm0, xmm1
	je	.L1154
.L1153:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1154
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1154
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	je	.L1154
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1154
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1154
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1154
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L1154
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1154
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L1154
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L1154
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L257
.L1154:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L1156
	movss	xmm0, DWORD PTR _x_p1_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1156
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1157
.L1156:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1157
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1157
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	je	.L1157
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1157
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L1157
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L1157
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L1157
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1157
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L1157
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1157
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L257
.L1157:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L1159
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1159
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L1159
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L1159
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L1159
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1159
	movss	xmm0, DWORD PTR _x_p1_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1159
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1160
.L1159:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1160
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L1160
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L1160
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L1160
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1160
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1160
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L257
.L1160:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1162
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1162
	movss	xmm0, DWORD PTR p1_c[rip]
	movss	xmm1, DWORD PTR _x_p1_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1162
	ucomiss	xmm0, xmm1
	jne	.L1162
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1164
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1164
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1164
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1165
.L1164:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1162
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L1162
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1162
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L1165
.L1162:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1165
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L1165
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L1165
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L1165
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1165
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1165
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L257
.L1165:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 2
	jne	.L1166
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1166
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1166
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	je	.L1166
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1166
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1166
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1166
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L1166
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1166
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L1166
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L1166
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L257
.L1166:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 2
	je	.L1167
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1167
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1167
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	je	.L1167
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1167
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L1167
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L1167
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L1167
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1167
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L1167
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1167
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L257
.L1167:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1168
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1168
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1168
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L1168
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L1168
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1168
	movss	xmm0, DWORD PTR _x_p1_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1168
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1169
.L1168:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1169
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L1169
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L1169
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L1169
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1169
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1169
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L257
.L1169:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1171
	movss	xmm0, DWORD PTR _x_p1_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1171
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1171
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L1171
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	je	.L1171
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1171
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1171
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1173
.L1171:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1173
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L1173
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L1173
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L1173
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1173
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1173
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L257
.L1173:
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L1174
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1174
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1174
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1174
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L1174
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1174
	movss	xmm0, DWORD PTR p1_c[rip]
	movss	xmm1, DWORD PTR _x_p1_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1174
	ucomiss	xmm0, xmm1
	je	.L1175
.L1174:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	je	.L1175
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L1175
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L1175
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L1175
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1175
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1175
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L257
.L1175:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	je	.L1177
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1177
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1177
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1178
.L1177:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1179
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1179
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1179
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L1178
.L1179:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1180
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1180
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1180
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1178
.L1180:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1181
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1181
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1181
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1178
.L1181:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1182
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1182
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1182
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1178
.L1182:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1183
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1183
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1183
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L1178
.L1183:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1184
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1184
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1184
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1178
.L1184:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1185
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1185
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1185
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1178
.L1185:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L257
.L1178:
	movss	xmm1, DWORD PTR _x_p0_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L1186
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1187
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1187
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1187
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L257
.L1187:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1188
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1188
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1188
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L257
.L1188:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1189
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1189
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1189
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L257
.L1189:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	je	.L1186
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1186
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1186
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L257
.L1186:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L1190
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p0_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p0_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L1190:
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	jne	.L1192
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p0_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p0_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L1192:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1194
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1194
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1194
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L1194
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L1194
	movss	xmm0, DWORD PTR _x_p0_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1194
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1194
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1194
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	je	.L1196
.L1194:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1196
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L1196
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L1196
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L1196
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1196
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1196
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L257
.L1196:
	movss	xmm0, DWORD PTR _x_p0_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1198
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1198
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1198
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1198
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1198
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1198
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1198
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 1
	je	.L1200
.L1198:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1200
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L1200
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L1200
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L1200
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1200
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1200
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L257
.L1200:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1202
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1202
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1202
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1203
.L1202:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1204
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1204
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1204
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1204
.L1203:
	movss	xmm0, DWORD PTR p0_c[rip]
	movss	xmm1, DWORD PTR _x_p0_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1204
	ucomiss	xmm0, xmm1
	jne	.L1204
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1204
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	je	.L1206
.L1204:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1206
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L1206
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L1206
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L1206
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1206
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1206
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L257
.L1206:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 1
	jne	.L1208
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1208
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1208
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1208
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L1208
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1208
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L1208
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L1208
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L1208
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1208
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1208
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L257
.L1208:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 1
	jne	.L1210
	movss	xmm1, DWORD PTR p0_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L1211
.L1210:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1211
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1211
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1211
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1211
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1211
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L1211
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L1211
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L1211
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1211
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1211
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L257
.L1211:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1213
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1213
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1214
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1214
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1214
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1215
.L1214:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1213
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1213
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1213
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1215
.L1213:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1215
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L1215
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L1215
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L1215
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1215
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1215
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L257
.L1215:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L1217
	movss	xmm0, DWORD PTR p0_c[rip]
	movss	xmm1, DWORD PTR _x_p0_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1217
	ucomiss	xmm0, xmm1
	je	.L1218
.L1217:
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1218
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1218
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1218
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1218
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1218
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1218
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L1218
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1218
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L1218
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L1218
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L257
.L1218:
	movss	xmm0, DWORD PTR _x_p0_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1220
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1220
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L1222
.L1220:
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1222
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1222
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1222
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1222
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L1222
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L1222
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L1222
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1222
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1222
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1222
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L257
.L1222:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L1223
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1223
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1223
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1223
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L1223
	movss	xmm0, DWORD PTR _x_p0_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1223
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1223
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	je	.L1225
.L1223:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1225
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L1225
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L1225
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L1225
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1225
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1225
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L257
.L1225:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1227
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1227
	movss	xmm0, DWORD PTR p0_c[rip]
	movss	xmm1, DWORD PTR _x_p0_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1227
	ucomiss	xmm0, xmm1
	jne	.L1227
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1229
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1229
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1229
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1230
.L1229:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1227
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1227
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1227
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1230
.L1227:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1230
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L1230
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L1230
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L1230
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1230
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1230
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L257
.L1230:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 1
	jne	.L1232
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1232
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1232
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1232
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1232
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1232
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1232
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L1232
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1232
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L1232
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L1232
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L257
.L1232:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 1
	je	.L1233
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1233
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1233
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1233
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1233
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L1233
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L1233
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L1233
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1233
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1233
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1233
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L257
.L1233:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1234
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1234
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1234
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1234
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1234
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1234
	movss	xmm0, DWORD PTR _x_p0_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1234
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1235
.L1234:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1235
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L1235
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L1235
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L1235
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1235
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1235
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L257
.L1235:
	movss	xmm0, DWORD PTR _x_p0_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1238
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1238
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1238
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	je	.L1238
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1238
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1238
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L1238
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L1240
.L1238:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1240
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L1240
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L1240
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L1240
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1240
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1240
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L257
.L1240:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1242
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1242
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1242
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L1242
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L1242
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1242
	movss	xmm0, DWORD PTR p0_c[rip]
	movss	xmm1, DWORD PTR _x_p0_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1242
	ucomiss	xmm0, xmm1
	je	.L1243
.L1242:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	je	.L1243
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L1243
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L1243
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L1243
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1243
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1243
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L257
.L1243:
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 17
	je	.L1246
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 16
	je	.L1246
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 15
	je	.L1246
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 14
	je	.L1246
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 13
	je	.L1246
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 12
	je	.L1246
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 11
	je	.L1246
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 10
	je	.L1246
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 9
	je	.L1246
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 8
	je	.L1246
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 7
	je	.L1246
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 6
	je	.L1246
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 5
	je	.L1246
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 4
	je	.L1246
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 3
	je	.L1246
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 2
	je	.L1246
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 1
	je	.L1246
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L257
.L1246:
	movss	xmm0, DWORD PTR _x_delta[rip]
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jb	.L257
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L1248
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L257
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L257
.L1248:
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	jne	.L1249
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	jne	.L1249
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L1249
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L1249
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L1249
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L1249
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L1249
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L1249
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L1249
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L1249
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L1249
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L1249
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L1249
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L1249
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L1249
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	jne	.L1249
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L1249
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1249
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L257
.L1249:
	movss	xmm0, DWORD PTR delta[rip]
	movss	xmm1, DWORD PTR _x__diverge_delta[rip]
	ucomiss	xmm0, xmm1
	jp	.L1333
	ucomiss	xmm0, xmm1
	je	.L1251
.L1333:
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	movss	xmm1, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L257
.L1251:
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	movss	xmm1, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	jnb	.L1253
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x__diverge_delta[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L257
.L1253:
	mov	eax, 1
	jmp	.L1255
.L257:
	mov	eax, 0
.L1255:
	mov	DWORD PTR -4[rbp], eax
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	mov	BYTE PTR p14_l3[rip], al
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	mov	BYTE PTR p15_l3[rip], al
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	mov	BYTE PTR p12_l3[rip], al
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	mov	BYTE PTR p15_l2[rip], al
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	mov	BYTE PTR p12_l2[rip], al
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	mov	BYTE PTR p15_l1[rip], al
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	mov	BYTE PTR p12_l1[rip], al
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	mov	BYTE PTR p15_l0[rip], al
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	mov	BYTE PTR p12_l0[rip], al
	movzx	eax, BYTE PTR _x_p15_evt[rip]
	mov	BYTE PTR p15_evt[rip], al
	movzx	eax, BYTE PTR _x_p12_evt[rip]
	mov	BYTE PTR p12_evt[rip], al
	movss	xmm0, DWORD PTR _x_p15_c[rip]
	movss	DWORD PTR p15_c[rip], xmm0
	movss	xmm0, DWORD PTR _x_p12_c[rip]
	movss	DWORD PTR p12_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	mov	BYTE PTR p10_l3[rip], al
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	mov	BYTE PTR p10_l2[rip], al
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	mov	BYTE PTR p10_l1[rip], al
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	mov	BYTE PTR p10_l0[rip], al
	movzx	eax, BYTE PTR _x_p10_evt[rip]
	mov	BYTE PTR p10_evt[rip], al
	movss	xmm0, DWORD PTR _x__diverge_delta[rip]
	movss	DWORD PTR _diverge_delta[rip], xmm0
	movss	xmm0, DWORD PTR _x_p10_c[rip]
	movss	DWORD PTR p10_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	mov	BYTE PTR p3_l3[rip], al
	movzx	eax, BYTE PTR _x_p3_evt[rip]
	mov	BYTE PTR p3_evt[rip], al
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	mov	BYTE PTR p0_l2[rip], al
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	mov	BYTE PTR p14_l2[rip], al
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	mov	BYTE PTR p8_l3[rip], al
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	mov	BYTE PTR p0_l1[rip], al
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	mov	BYTE PTR p2_l3[rip], al
	movzx	eax, BYTE PTR _x_p2_evt[rip]
	mov	BYTE PTR p2_evt[rip], al
	movzx	eax, BYTE PTR _x_p14_evt[rip]
	mov	BYTE PTR p14_evt[rip], al
	movss	xmm0, DWORD PTR _x_delta[rip]
	movss	DWORD PTR delta[rip], xmm0
	mov	eax, DWORD PTR _x_v1[rip]
	mov	DWORD PTR v1[rip], eax
	movzx	eax, BYTE PTR _x_v2[rip]
	mov	BYTE PTR v2[rip], al
	movss	xmm0, DWORD PTR _x_p8_c[rip]
	movss	DWORD PTR p8_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	mov	BYTE PTR p0_l3[rip], al
	movss	xmm0, DWORD PTR _x_p14_c[rip]
	movss	DWORD PTR p14_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p8_evt[rip]
	mov	BYTE PTR p8_evt[rip], al
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	mov	BYTE PTR p14_l1[rip], al
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	mov	BYTE PTR p8_l2[rip], al
	movzx	eax, BYTE PTR _x_p16_evt[rip]
	mov	BYTE PTR p16_evt[rip], al
	movzx	eax, BYTE PTR _x_p13_evt[rip]
	mov	BYTE PTR p13_evt[rip], al
	movzx	eax, BYTE PTR _x_p4_evt[rip]
	mov	BYTE PTR p4_evt[rip], al
	movss	xmm0, DWORD PTR _x_p1_c[rip]
	movss	DWORD PTR p1_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	mov	BYTE PTR p9_l3[rip], al
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	mov	BYTE PTR p3_l2[rip], al
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	mov	BYTE PTR p6_l3[rip], al
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	mov	BYTE PTR p1_l3[rip], al
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	mov	BYTE PTR p0_l0[rip], al
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	mov	BYTE PTR p14_l0[rip], al
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	mov	BYTE PTR p8_l1[rip], al
	movzx	eax, BYTE PTR _x_p1_evt[rip]
	mov	BYTE PTR p1_evt[rip], al
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	mov	BYTE PTR p16_l2[rip], al
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	mov	BYTE PTR p13_l2[rip], al
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	mov	BYTE PTR p1_l1[rip], al
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	mov	BYTE PTR p7_l3[rip], al
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	mov	BYTE PTR p4_l2[rip], al
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	mov	BYTE PTR p16_l3[rip], al
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	mov	BYTE PTR p13_l3[rip], al
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	mov	BYTE PTR p1_l2[rip], al
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	mov	BYTE PTR p4_l3[rip], al
	movss	xmm0, DWORD PTR _x_p11_c[rip]
	movss	DWORD PTR p11_c[rip], xmm0
	movss	xmm0, DWORD PTR _x_p5_c[rip]
	movss	DWORD PTR p5_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p11_evt[rip]
	mov	BYTE PTR p11_evt[rip], al
	movss	xmm0, DWORD PTR _x_p2_c[rip]
	movss	DWORD PTR p2_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p5_evt[rip]
	mov	BYTE PTR p5_evt[rip], al
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	mov	BYTE PTR p11_l0[rip], al
	movss	xmm0, DWORD PTR _x_p0_c[rip]
	movss	DWORD PTR p0_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	mov	BYTE PTR p5_l0[rip], al
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	mov	BYTE PTR p11_l1[rip], al
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	mov	BYTE PTR p2_l0[rip], al
	movzx	eax, BYTE PTR _x_p0_evt[rip]
	mov	BYTE PTR p0_evt[rip], al
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	mov	BYTE PTR p5_l1[rip], al
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	mov	BYTE PTR p11_l2[rip], al
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	mov	BYTE PTR p2_l1[rip], al
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	mov	BYTE PTR p5_l2[rip], al
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	mov	BYTE PTR p11_l3[rip], al
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	mov	BYTE PTR p2_l2[rip], al
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	mov	BYTE PTR p5_l3[rip], al
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	mov	BYTE PTR p9_l0[rip], al
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	mov	BYTE PTR p6_l0[rip], al
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	mov	BYTE PTR p9_l1[rip], al
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	mov	BYTE PTR p3_l0[rip], al
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	mov	BYTE PTR p6_l1[rip], al
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	mov	BYTE PTR p9_l2[rip], al
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	mov	BYTE PTR p3_l1[rip], al
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	mov	BYTE PTR p6_l2[rip], al
	movss	xmm0, DWORD PTR _x_p7_c[rip]
	movss	DWORD PTR p7_c[rip], xmm0
	movss	xmm0, DWORD PTR _x_p16_c[rip]
	movss	DWORD PTR p16_c[rip], xmm0
	movss	xmm0, DWORD PTR _x_p13_c[rip]
	movss	DWORD PTR p13_c[rip], xmm0
	movss	xmm0, DWORD PTR _x_p4_c[rip]
	movss	DWORD PTR p4_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p7_evt[rip]
	mov	BYTE PTR p7_evt[rip], al
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	mov	BYTE PTR p7_l0[rip], al
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	mov	BYTE PTR p16_l0[rip], al
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	mov	BYTE PTR p13_l0[rip], al
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	mov	BYTE PTR p4_l0[rip], al
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	mov	BYTE PTR p7_l1[rip], al
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	mov	BYTE PTR p16_l1[rip], al
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	mov	BYTE PTR p13_l1[rip], al
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	mov	BYTE PTR p1_l0[rip], al
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	mov	BYTE PTR p4_l1[rip], al
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	mov	BYTE PTR p7_l2[rip], al
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	mov	BYTE PTR p8_l0[rip], al
	movss	xmm0, DWORD PTR _x_p6_c[rip]
	movss	DWORD PTR p6_c[rip], xmm0
	movss	xmm0, DWORD PTR _x_p9_c[rip]
	movss	DWORD PTR p9_c[rip], xmm0
	movss	xmm0, DWORD PTR _x_p3_c[rip]
	movss	DWORD PTR p3_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p6_evt[rip]
	mov	BYTE PTR p6_evt[rip], al
	movzx	eax, BYTE PTR _x_p9_evt[rip]
	mov	BYTE PTR p9_evt[rip], al
.L247:
	cmp	DWORD PTR -4[rbp], 0
	jne	.L1256
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	main, .-main
	.section	.rodata
	.align 4
.LC1:
	.long	1098907648
	.align 4
.LC3:
	.long	1065353216
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"512783.c"
	.text
	.align	2
	.global	__VERIFIER_nondet_bool
	.syntax unified
	.arm
	.fpu softvfp
	.type	__VERIFIER_nondet_bool, %function
__VERIFIER_nondet_bool:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	pop	{fp, pc}
	.size	__VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
	.comm	p14_l3,1,1
	.comm	_x_p14_l3,1,1
	.comm	p15_l3,1,1
	.comm	_x_p15_l3,1,1
	.comm	p12_l3,1,1
	.comm	_x_p12_l3,1,1
	.comm	p15_l2,1,1
	.comm	_x_p15_l2,1,1
	.comm	p12_l2,1,1
	.comm	_x_p12_l2,1,1
	.comm	p15_l1,1,1
	.comm	_x_p15_l1,1,1
	.comm	p12_l1,1,1
	.comm	_x_p12_l1,1,1
	.comm	p15_l0,1,1
	.comm	_x_p15_l0,1,1
	.comm	p12_l0,1,1
	.comm	_x_p12_l0,1,1
	.comm	p15_evt,1,1
	.comm	_x_p15_evt,1,1
	.comm	p12_evt,1,1
	.comm	_x_p12_evt,1,1
	.comm	p15_c,4,4
	.comm	_x_p15_c,4,4
	.comm	p12_c,4,4
	.comm	_x_p12_c,4,4
	.comm	p10_l3,1,1
	.comm	_x_p10_l3,1,1
	.comm	p10_l2,1,1
	.comm	_x_p10_l2,1,1
	.comm	p10_l1,1,1
	.comm	_x_p10_l1,1,1
	.comm	p10_l0,1,1
	.comm	_x_p10_l0,1,1
	.comm	p10_evt,1,1
	.comm	_x_p10_evt,1,1
	.comm	_diverge_delta,4,4
	.comm	_x__diverge_delta,4,4
	.comm	p10_c,4,4
	.comm	_x_p10_c,4,4
	.comm	p3_l3,1,1
	.comm	_x_p3_l3,1,1
	.comm	p3_evt,1,1
	.comm	_x_p3_evt,1,1
	.comm	p0_l2,1,1
	.comm	_x_p0_l2,1,1
	.comm	p14_l2,1,1
	.comm	_x_p14_l2,1,1
	.comm	p8_l3,1,1
	.comm	_x_p8_l3,1,1
	.comm	p0_l1,1,1
	.comm	_x_p0_l1,1,1
	.comm	p2_l3,1,1
	.comm	_x_p2_l3,1,1
	.comm	p2_evt,1,1
	.comm	_x_p2_evt,1,1
	.comm	p14_evt,1,1
	.comm	_x_p14_evt,1,1
	.comm	delta,4,4
	.comm	_x_delta,4,4
	.comm	v1,4,4
	.comm	_x_v1,4,4
	.comm	v2,1,1
	.comm	_x_v2,1,1
	.comm	p8_c,4,4
	.comm	_x_p8_c,4,4
	.comm	p0_l3,1,1
	.comm	_x_p0_l3,1,1
	.comm	p14_c,4,4
	.comm	_x_p14_c,4,4
	.comm	p8_evt,1,1
	.comm	_x_p8_evt,1,1
	.comm	p14_l1,1,1
	.comm	_x_p14_l1,1,1
	.comm	p8_l2,1,1
	.comm	_x_p8_l2,1,1
	.comm	p16_evt,1,1
	.comm	_x_p16_evt,1,1
	.comm	p13_evt,1,1
	.comm	_x_p13_evt,1,1
	.comm	p4_evt,1,1
	.comm	_x_p4_evt,1,1
	.comm	p1_c,4,4
	.comm	_x_p1_c,4,4
	.comm	p9_l3,1,1
	.comm	_x_p9_l3,1,1
	.comm	p3_l2,1,1
	.comm	_x_p3_l2,1,1
	.comm	p6_l3,1,1
	.comm	_x_p6_l3,1,1
	.comm	p1_l3,1,1
	.comm	_x_p1_l3,1,1
	.comm	p0_l0,1,1
	.comm	_x_p0_l0,1,1
	.comm	p14_l0,1,1
	.comm	_x_p14_l0,1,1
	.comm	p8_l1,1,1
	.comm	_x_p8_l1,1,1
	.comm	p1_evt,1,1
	.comm	_x_p1_evt,1,1
	.comm	p16_l2,1,1
	.comm	_x_p16_l2,1,1
	.comm	p13_l2,1,1
	.comm	_x_p13_l2,1,1
	.comm	p1_l1,1,1
	.comm	_x_p1_l1,1,1
	.comm	p7_l3,1,1
	.comm	_x_p7_l3,1,1
	.comm	p4_l2,1,1
	.comm	_x_p4_l2,1,1
	.comm	p16_l3,1,1
	.comm	_x_p16_l3,1,1
	.comm	p13_l3,1,1
	.comm	_x_p13_l3,1,1
	.comm	p1_l2,1,1
	.comm	_x_p1_l2,1,1
	.comm	p4_l3,1,1
	.comm	_x_p4_l3,1,1
	.comm	p11_c,4,4
	.comm	_x_p11_c,4,4
	.comm	p5_c,4,4
	.comm	_x_p5_c,4,4
	.comm	p11_evt,1,1
	.comm	_x_p11_evt,1,1
	.comm	p2_c,4,4
	.comm	_x_p2_c,4,4
	.comm	p5_evt,1,1
	.comm	_x_p5_evt,1,1
	.comm	p11_l0,1,1
	.comm	_x_p11_l0,1,1
	.comm	p0_c,4,4
	.comm	_x_p0_c,4,4
	.comm	p5_l0,1,1
	.comm	_x_p5_l0,1,1
	.comm	p11_l1,1,1
	.comm	_x_p11_l1,1,1
	.comm	p2_l0,1,1
	.comm	_x_p2_l0,1,1
	.comm	p0_evt,1,1
	.comm	_x_p0_evt,1,1
	.comm	p5_l1,1,1
	.comm	_x_p5_l1,1,1
	.comm	p11_l2,1,1
	.comm	_x_p11_l2,1,1
	.comm	p2_l1,1,1
	.comm	_x_p2_l1,1,1
	.comm	p5_l2,1,1
	.comm	_x_p5_l2,1,1
	.comm	p11_l3,1,1
	.comm	_x_p11_l3,1,1
	.comm	p2_l2,1,1
	.comm	_x_p2_l2,1,1
	.comm	p5_l3,1,1
	.comm	_x_p5_l3,1,1
	.comm	p9_l0,1,1
	.comm	_x_p9_l0,1,1
	.comm	p6_l0,1,1
	.comm	_x_p6_l0,1,1
	.comm	p9_l1,1,1
	.comm	_x_p9_l1,1,1
	.comm	p3_l0,1,1
	.comm	_x_p3_l0,1,1
	.comm	p6_l1,1,1
	.comm	_x_p6_l1,1,1
	.comm	p9_l2,1,1
	.comm	_x_p9_l2,1,1
	.comm	p3_l1,1,1
	.comm	_x_p3_l1,1,1
	.comm	p6_l2,1,1
	.comm	_x_p6_l2,1,1
	.comm	p7_c,4,4
	.comm	_x_p7_c,4,4
	.comm	p16_c,4,4
	.comm	_x_p16_c,4,4
	.comm	p13_c,4,4
	.comm	_x_p13_c,4,4
	.comm	p4_c,4,4
	.comm	_x_p4_c,4,4
	.comm	p7_evt,1,1
	.comm	_x_p7_evt,1,1
	.comm	p7_l0,1,1
	.comm	_x_p7_l0,1,1
	.comm	p16_l0,1,1
	.comm	_x_p16_l0,1,1
	.comm	p13_l0,1,1
	.comm	_x_p13_l0,1,1
	.comm	p4_l0,1,1
	.comm	_x_p4_l0,1,1
	.comm	p7_l1,1,1
	.comm	_x_p7_l1,1,1
	.comm	p16_l1,1,1
	.comm	_x_p16_l1,1,1
	.comm	p13_l1,1,1
	.comm	_x_p13_l1,1,1
	.comm	p1_l0,1,1
	.comm	_x_p1_l0,1,1
	.comm	p4_l1,1,1
	.comm	_x_p4_l1,1,1
	.comm	p7_l2,1,1
	.comm	_x_p7_l2,1,1
	.comm	p8_l0,1,1
	.comm	_x_p8_l0,1,1
	.comm	p6_c,4,4
	.comm	_x_p6_c,4,4
	.comm	p9_c,4,4
	.comm	_x_p9_c,4,4
	.comm	p3_c,4,4
	.comm	_x_p3_c,4,4
	.comm	p6_evt,1,1
	.comm	_x_p6_evt,1,1
	.comm	p9_evt,1,1
	.comm	_x_p9_evt,1,1
	.global	__aeabi_fcmpeq
	.global	__aeabi_fcmple
	.global	__aeabi_fcmpge
	.global	__aeabi_f2d
	.global	__aeabi_dsub
	.global	__aeabi_dadd
	.global	__aeabi_dcmpeq
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #8
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+4
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+8
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+12
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+16
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+20
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+24
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+28
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+32
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+36
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+40
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1235+44
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1235+48
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+52
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+56
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+60
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+64
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+68
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1235+72
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1235+76
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+80
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+84
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+88
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+376
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+92
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+96
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+100
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+104
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+108
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1235+112
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L1235+116
	str	r3, [r2]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+120
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1235+124
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+128
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1235+368
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+132
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+384
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+136
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+140
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+144
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+148
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1235+152
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+156
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+160
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+164
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+168
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+172
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+380
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+176
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+180
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+184
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+396
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+188
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+192
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+196
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+200
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+392
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+204
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+208
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1235+428
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1235+212
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+216
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1235+220
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+224
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+444
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1235+228
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+232
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+448
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+236
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+240
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+244
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+440
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+248
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+252
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+436
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+256
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+260
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+264
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+268
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+272
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+276
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+280
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+284
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+288
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+292
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1235+296
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1235+300
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1235+388
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1235+304
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+308
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+312
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+316
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+400
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+320
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+324
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+328
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+404
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+332
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+336
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+340
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+344
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1235+348
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1235+352
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1235+356
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+360
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1235+364
	strb	r2, [r3]
	ldr	r3, .L1235+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+316
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+300
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1235+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L6
	ldr	r3, .L1235+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L6
	ldr	r3, .L1235+316
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L6
	ldr	r3, .L1235+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L6:
	ldr	r3, .L1235+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1235+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1235+316
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1235+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L7
.L8:
	ldr	r3, .L1235+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L9
	ldr	r3, .L1235+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L9
	ldr	r3, .L1235+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L9
	ldr	r3, .L1235+316
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L9:
	ldr	r3, .L1235+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L10
	ldr	r3, .L1235+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L10
	ldr	r3, .L1235+316
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L10
	ldr	r3, .L1235+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L10:
	ldr	r3, .L1235+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L11
	ldr	r3, .L1235+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L11
	ldr	r3, .L1235+316
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L11
	ldr	r3, .L1235+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L11:
	ldr	r3, .L1235+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L12
	ldr	r3, .L1235+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L12
	ldr	r3, .L1235+316
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L12
	ldr	r3, .L1235+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L7
.L12:
	ldr	r3, .L1235+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L1235+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L1235+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L1235+316
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L13:
	ldr	r3, .L1235+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L14
	ldr	r3, .L1235+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L14
	ldr	r3, .L1235+316
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L14
	ldr	r3, .L1235+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L14:
	ldr	r3, .L1235+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+316
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1235+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L7:
	ldr	r3, .L1235+300
	ldr	r3, [r3]	@ float
	ldr	r1, .L1235+432
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L15
	ldr	r3, .L1235+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L16
	ldr	r3, .L1235+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L16
	ldr	r3, .L1235+316
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L16
	ldr	r3, .L1235+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L16:
	ldr	r3, .L1235+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L17
	ldr	r3, .L1235+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L17
	ldr	r3, .L1235+316
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L17
	ldr	r3, .L1235+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L17:
	ldr	r3, .L1235+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L18
	ldr	r3, .L1235+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L18
	ldr	r3, .L1235+316
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L18
	ldr	r3, .L1235+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L18:
	ldr	r3, .L1235+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L15
	ldr	r3, .L1235+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L15
	ldr	r3, .L1235+316
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L15
	ldr	r3, .L1235+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L15:
	ldr	r3, .L1235+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1235+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L20
	ldr	r3, .L1235+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L20
	ldr	r3, .L1235+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L20
	ldr	r3, .L1235+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L21
.L20:
	ldr	r3, .L1235+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L22
	ldr	r3, .L1235+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L22
	ldr	r3, .L1235+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L22
	ldr	r3, .L1235+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L21
.L22:
	ldr	r3, .L1235+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L23
	ldr	r3, .L1235+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L23
	ldr	r3, .L1235+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L23
	ldr	r3, .L1235+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L21
.L23:
	ldr	r3, .L1235+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L24
	ldr	r3, .L1235+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L24
	ldr	r3, .L1235+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L24
	ldr	r3, .L1235+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L21
.L24:
	ldr	r3, .L1235+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L25
	ldr	r3, .L1235+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L25
	ldr	r3, .L1235+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L25
	ldr	r3, .L1235+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L21
.L25:
	ldr	r3, .L1235+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L26
	ldr	r3, .L1235+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L26
	ldr	r3, .L1235+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L26
	ldr	r3, .L1235+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L21
.L26:
	ldr	r3, .L1235+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L27
	ldr	r3, .L1235+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L27
	ldr	r3, .L1235+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L27
	ldr	r3, .L1235+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L21
.L27:
	ldr	r3, .L1235+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L28
	ldr	r3, .L1235+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L28
	ldr	r3, .L1235+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L28
	ldr	r3, .L1235+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L21
.L28:
	ldr	r3, .L1235+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1235+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L21:
	ldr	r3, .L1235+44
	ldr	r3, [r3]	@ float
	ldr	r1, .L1235+432
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L29
	ldr	r3, .L1235+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L30
	ldr	r3, .L1235+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L30
	ldr	r3, .L1235+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L30
	ldr	r3, .L1235+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L30:
	ldr	r3, .L1235+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L31
	ldr	r3, .L1235+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L31
	ldr	r3, .L1235+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L31
	ldr	r3, .L1235+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L31:
	ldr	r3, .L1235+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L32
	ldr	r3, .L1235+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L32
	ldr	r3, .L1235+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L32
	ldr	r3, .L1235+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L32:
	ldr	r3, .L1235+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L29
	ldr	r3, .L1235+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L29
	ldr	r3, .L1235+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L29
	ldr	r3, .L1235+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L29:
	ldr	r3, .L1235
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+368
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1235
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L34
	ldr	r3, .L1235+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L34
	ldr	r3, .L1235+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L34
	b	.L1236
.L1237:
	.align	2
.L1235:
	.word	p14_l3
	.word	p15_l3
	.word	p12_l3
	.word	p15_l2
	.word	p12_l2
	.word	p15_l1
	.word	p12_l1
	.word	p15_l0
	.word	p12_l0
	.word	p15_evt
	.word	p12_evt
	.word	p15_c
	.word	p12_c
	.word	p10_l3
	.word	p10_l2
	.word	p10_l1
	.word	p10_l0
	.word	p10_evt
	.word	_diverge_delta
	.word	p10_c
	.word	p3_l3
	.word	p3_evt
	.word	p0_l2
	.word	p8_l3
	.word	p0_l1
	.word	p2_l3
	.word	p2_evt
	.word	p14_evt
	.word	delta
	.word	v1
	.word	v2
	.word	p8_c
	.word	p0_l3
	.word	p8_evt
	.word	p8_l2
	.word	p16_evt
	.word	p13_evt
	.word	p4_evt
	.word	p1_c
	.word	p9_l3
	.word	p3_l2
	.word	p6_l3
	.word	p1_l3
	.word	p0_l0
	.word	p8_l1
	.word	p1_evt
	.word	p16_l2
	.word	p1_l1
	.word	p7_l3
	.word	p4_l2
	.word	p16_l3
	.word	p1_l2
	.word	p4_l3
	.word	p5_c
	.word	p11_evt
	.word	p2_c
	.word	p5_evt
	.word	p0_c
	.word	p5_l0
	.word	p2_l0
	.word	p0_evt
	.word	p5_l1
	.word	p2_l1
	.word	p5_l2
	.word	p2_l2
	.word	p5_l3
	.word	p9_l0
	.word	p6_l0
	.word	p9_l1
	.word	p3_l0
	.word	p6_l1
	.word	p9_l2
	.word	p3_l1
	.word	p6_l2
	.word	p7_c
	.word	p16_c
	.word	p4_c
	.word	p7_evt
	.word	p7_l0
	.word	p16_l0
	.word	p4_l0
	.word	p7_l1
	.word	p16_l1
	.word	p1_l0
	.word	p4_l1
	.word	p7_l2
	.word	p8_l0
	.word	p6_c
	.word	p9_c
	.word	p3_c
	.word	p6_evt
	.word	p9_evt
	.word	p14_c
	.word	p14_l3
	.word	p14_l2
	.word	p14_l0
	.word	p14_l1
	.word	p13_c
	.word	p13_l3
	.word	p13_l2
	.word	p13_l0
	.word	p13_l1
	.word	p12_c
	.word	p12_l3
	.word	p12_l2
	.word	p12_l0
	.word	p12_l1
	.word	p11_c
	.word	1098907648
	.word	p11_l3
	.word	p11_l2
	.word	p11_l0
	.word	p11_l1
	.word	p10_c
	.word	p10_l1
	.word	p10_l3
	.word	p10_l2
	.word	p10_l0
.L1236:
	ldr	r3, .L1235+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L35
.L34:
	ldr	r3, .L1235+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L36
	ldr	r3, .L1235+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L36
	ldr	r3, .L1235+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L36
	ldr	r3, .L1235+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L35
.L36:
	ldr	r3, .L1235+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L37
	ldr	r3, .L1235+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L37
	ldr	r3, .L1235+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L37
	ldr	r3, .L1235+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L35
.L37:
	ldr	r3, .L1235+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L38
	ldr	r3, .L1235+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L38
	ldr	r3, .L1235+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L38
	ldr	r3, .L1235+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L35
.L38:
	ldr	r3, .L1235+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L39
	ldr	r3, .L1235+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L39
	ldr	r3, .L1235+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L39
	ldr	r3, .L1235+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L35
.L39:
	ldr	r3, .L1235+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L40
	ldr	r3, .L1235+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L40
	ldr	r3, .L1235+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L40
	ldr	r3, .L1235+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L35
.L40:
	ldr	r3, .L1235+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L41
	ldr	r3, .L1235+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L41
	ldr	r3, .L1235+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L41
	ldr	r3, .L1235+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L35
.L41:
	ldr	r3, .L1235+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L42
	ldr	r3, .L1235+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L42
	ldr	r3, .L1235+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L42
	ldr	r3, .L1235+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L35
.L42:
	ldr	r3, .L1235+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1235+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L35:
	ldr	r3, .L1235+368
	ldr	r3, [r3]	@ float
	ldr	r1, .L1235+432
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L43
	ldr	r3, .L1235+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L44
	ldr	r3, .L1235+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L44
	ldr	r3, .L1235+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L44
	ldr	r3, .L1235+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L44:
	ldr	r3, .L1235+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L45
	ldr	r3, .L1235+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L45
	ldr	r3, .L1235+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L45
	ldr	r3, .L1235+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L45:
	ldr	r3, .L1235+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L46
	ldr	r3, .L1235+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L46
	ldr	r3, .L1235+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L46
	ldr	r3, .L1235+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L46:
	ldr	r3, .L1235+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L43
	ldr	r3, .L1235+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L43
	ldr	r3, .L1235+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L43
	ldr	r3, .L1235+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L43:
	ldr	r3, .L1235+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+388
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1235+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L48
	ldr	r3, .L1235+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L48
	ldr	r3, .L1235+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L48
	ldr	r3, .L1235+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L49
.L48:
	ldr	r3, .L1235+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L50
	ldr	r3, .L1235+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L50
	ldr	r3, .L1235+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L50
	ldr	r3, .L1235+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L49
.L50:
	ldr	r3, .L1235+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L51
	ldr	r3, .L1235+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L51
	ldr	r3, .L1235+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L51
	ldr	r3, .L1235+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L49
.L51:
	ldr	r3, .L1235+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L52
	ldr	r3, .L1235+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L52
	ldr	r3, .L1235+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L52
	ldr	r3, .L1235+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L49
.L52:
	ldr	r3, .L1235+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L53
	ldr	r3, .L1235+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L53
	ldr	r3, .L1235+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L53
	ldr	r3, .L1235+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L49
.L53:
	ldr	r3, .L1235+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L54
	ldr	r3, .L1235+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L54
	ldr	r3, .L1235+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L54
	ldr	r3, .L1235+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L49
.L54:
	ldr	r3, .L1235+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L55
	ldr	r3, .L1235+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L55
	ldr	r3, .L1235+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L55
	ldr	r3, .L1235+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L49
.L55:
	ldr	r3, .L1235+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L56
	ldr	r3, .L1235+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L56
	ldr	r3, .L1235+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L56
	ldr	r3, .L1235+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L49
.L56:
	ldr	r3, .L1235+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1235+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L49:
	ldr	r3, .L1235+388
	ldr	r3, [r3]	@ float
	ldr	r1, .L1235+432
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L57
	ldr	r3, .L1235+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L58
	ldr	r3, .L1235+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L58
	ldr	r3, .L1235+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L58
	ldr	r3, .L1235+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L58:
	ldr	r3, .L1235+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L59
	ldr	r3, .L1235+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L59
	ldr	r3, .L1235+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L59
	ldr	r3, .L1235+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L59:
	ldr	r3, .L1235+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L60
	ldr	r3, .L1235+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L60
	ldr	r3, .L1235+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L60
	ldr	r3, .L1235+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L60:
	ldr	r3, .L1235+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L57
	ldr	r3, .L1235+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L57
	ldr	r3, .L1235+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L57
	ldr	r3, .L1235+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L57:
	ldr	r3, .L1235+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+408
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1235+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L62
	ldr	r3, .L1235+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L62
	ldr	r3, .L1235+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L62
	ldr	r3, .L1235+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L63
.L62:
	ldr	r3, .L1235+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L64
	ldr	r3, .L1235+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L64
	ldr	r3, .L1235+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L64
	ldr	r3, .L1235+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L63
.L64:
	ldr	r3, .L1235+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L65
	ldr	r3, .L1235+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L65
	ldr	r3, .L1235+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L65
	ldr	r3, .L1235+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L63
.L65:
	ldr	r3, .L1235+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L66
	ldr	r3, .L1235+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L66
	ldr	r3, .L1235+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L66
	ldr	r3, .L1235+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L63
.L66:
	ldr	r3, .L1235+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L67
	ldr	r3, .L1235+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L67
	ldr	r3, .L1235+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L67
	ldr	r3, .L1235+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L63
.L67:
	ldr	r3, .L1235+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L68
	ldr	r3, .L1235+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L68
	ldr	r3, .L1235+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L68
	ldr	r3, .L1235+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L63
.L68:
	ldr	r3, .L1235+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L69
	ldr	r3, .L1235+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L69
	ldr	r3, .L1235+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L69
	ldr	r3, .L1235+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L63
.L69:
	ldr	r3, .L1235+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L70
	ldr	r3, .L1235+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L70
	ldr	r3, .L1235+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L70
	ldr	r3, .L1235+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L63
.L70:
	ldr	r3, .L1235+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1235+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L63:
	ldr	r3, .L1235+408
	ldr	r3, [r3]	@ float
	ldr	r1, .L1235+432
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L71
	ldr	r3, .L1235+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L72
	ldr	r3, .L1235+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L72
	ldr	r3, .L1235+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L72
	ldr	r3, .L1235+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L72:
	ldr	r3, .L1235+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L73
	ldr	r3, .L1235+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L73
	ldr	r3, .L1235+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L73
	ldr	r3, .L1235+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L73:
	ldr	r3, .L1235+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L74
	ldr	r3, .L1235+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L74
	ldr	r3, .L1235+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L74
	ldr	r3, .L1235+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L74:
	ldr	r3, .L1235+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L71
	ldr	r3, .L1235+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L71
	ldr	r3, .L1235+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L71
	ldr	r3, .L1235+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L71:
	ldr	r3, .L1235+436
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+448
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+428
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1235+436
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L76
	ldr	r3, .L1235+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L76
	ldr	r3, .L1235+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L76
	ldr	r3, .L1235+448
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L77
.L76:
	ldr	r3, .L1235+436
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L78
	ldr	r3, .L1235+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L78
	ldr	r3, .L1235+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L78
	ldr	r3, .L1235+448
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L77
.L78:
	ldr	r3, .L1235+436
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L79
	ldr	r3, .L1235+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L79
	ldr	r3, .L1235+448
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L79
	ldr	r3, .L1235+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L77
.L79:
	ldr	r3, .L1235+436
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L80
	ldr	r3, .L1235+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L80
	ldr	r3, .L1235+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L80
	ldr	r3, .L1235+448
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L77
.L80:
	ldr	r3, .L1235+436
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L81
	ldr	r3, .L1235+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L81
	ldr	r3, .L1235+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L81
	ldr	r3, .L1235+448
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L77
.L81:
	ldr	r3, .L1235+436
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L82
	ldr	r3, .L1235+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L82
	ldr	r3, .L1235+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L82
	ldr	r3, .L1235+448
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L77
.L82:
	ldr	r3, .L1235+436
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L83
	ldr	r3, .L1235+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L83
	ldr	r3, .L1235+448
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L83
	ldr	r3, .L1235+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L77
.L83:
	ldr	r3, .L1235+436
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L84
	ldr	r3, .L1235+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L84
	ldr	r3, .L1235+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L84
	ldr	r3, .L1235+448
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L77
.L84:
	ldr	r3, .L1235+436
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1235+448
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L77:
	ldr	r3, .L1235+428
	ldr	r3, [r3]	@ float
	ldr	r1, .L1235+432
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L85
	ldr	r3, .L1235+436
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L86
	ldr	r3, .L1235+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L86
	ldr	r3, .L1235+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L86
	ldr	r3, .L1235+448
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L86:
	ldr	r3, .L1235+436
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L87
	ldr	r3, .L1235+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L87
	ldr	r3, .L1235+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L87
	ldr	r3, .L1235+448
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L87:
	ldr	r3, .L1235+436
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L88
	ldr	r3, .L1235+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L88
	ldr	r3, .L1235+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L88
	ldr	r3, .L1235+448
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L88:
	ldr	r3, .L1235+436
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L85
	ldr	r3, .L1235+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L85
	ldr	r3, .L1235+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L85
	ldr	r3, .L1235+448
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L85:
	ldr	r3, .L1235+460
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+464
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+468
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+456
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1235+452
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1235+460
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L90
	ldr	r3, .L1235+464
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L90
	ldr	r3, .L1235+468
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L90
	ldr	r3, .L1235+456
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L90:
	ldr	r3, .L1235+460
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L92
	ldr	r3, .L1235+464
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L92
	ldr	r3, .L1235+468
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L92
	ldr	r3, .L1235+456
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L91
.L92:
	ldr	r3, .L1235+460
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L93
	ldr	r3, .L1235+464
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L93
	ldr	r3, .L1235+456
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L93
	ldr	r3, .L1235+468
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L93:
	ldr	r3, .L1235+460
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L94
	ldr	r3, .L1235+464
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L94
	ldr	r3, .L1235+468
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L94
	ldr	r3, .L1235+456
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L94:
	ldr	r3, .L1235+460
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L95
	ldr	r3, .L1235+464
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L95
	ldr	r3, .L1235+468
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L95
	ldr	r3, .L1238
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L95:
	ldr	r3, .L1238+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L96
	ldr	r3, .L1238+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L96
	ldr	r3, .L1238+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L96
	ldr	r3, .L1238
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L91
.L96:
	ldr	r3, .L1238+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L97
	ldr	r3, .L1238+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L97
	ldr	r3, .L1238
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L97
	ldr	r3, .L1238+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L97:
	ldr	r3, .L1238+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L98
	ldr	r3, .L1238+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L98
	ldr	r3, .L1238+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L98
	ldr	r3, .L1238
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L98:
	ldr	r3, .L1238+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1238
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L91:
	ldr	r3, .L1238+16
	ldr	r3, [r3]	@ float
	ldr	r1, .L1238+164
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L99
	ldr	r3, .L1238+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L100
	ldr	r3, .L1238+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L100
	ldr	r3, .L1238+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L100
	ldr	r3, .L1238
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L100:
	ldr	r3, .L1238+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L101
	ldr	r3, .L1238+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L101
	ldr	r3, .L1238+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L101
	ldr	r3, .L1238
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L101:
	ldr	r3, .L1238+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L102
	ldr	r3, .L1238+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L102
	ldr	r3, .L1238+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L102
	ldr	r3, .L1238
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L102:
	ldr	r3, .L1238+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L99
	ldr	r3, .L1238+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L99
	ldr	r3, .L1238+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L99
	ldr	r3, .L1238
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L99:
	ldr	r3, .L1238+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+36
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1238+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L104
	ldr	r3, .L1238+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L104
	ldr	r3, .L1238+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L104
	ldr	r3, .L1238+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L105
.L104:
	ldr	r3, .L1238+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L106
	ldr	r3, .L1238+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L106
	ldr	r3, .L1238+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L106
	ldr	r3, .L1238+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L105
.L106:
	ldr	r3, .L1238+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L107
	ldr	r3, .L1238+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L107
	ldr	r3, .L1238+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L107
	ldr	r3, .L1238+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L105
.L107:
	ldr	r3, .L1238+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L108
	ldr	r3, .L1238+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L108
	ldr	r3, .L1238+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L108
	ldr	r3, .L1238+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L105
.L108:
	ldr	r3, .L1238+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L109
	ldr	r3, .L1238+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L109
	ldr	r3, .L1238+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L109
	ldr	r3, .L1238+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L105
.L109:
	ldr	r3, .L1238+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L110
	ldr	r3, .L1238+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L110
	ldr	r3, .L1238+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L110
	ldr	r3, .L1238+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L105
.L110:
	ldr	r3, .L1238+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L111
	ldr	r3, .L1238+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L111
	ldr	r3, .L1238+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L111
	ldr	r3, .L1238+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L105
.L111:
	ldr	r3, .L1238+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L112
	ldr	r3, .L1238+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L112
	ldr	r3, .L1238+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L112
	ldr	r3, .L1238+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L105
.L112:
	ldr	r3, .L1238+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1238+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L105:
	ldr	r3, .L1238+36
	ldr	r3, [r3]	@ float
	ldr	r1, .L1238+164
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L113
	ldr	r3, .L1238+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L114
	ldr	r3, .L1238+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L114
	ldr	r3, .L1238+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L114
	ldr	r3, .L1238+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L114:
	ldr	r3, .L1238+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L115
	ldr	r3, .L1238+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L115
	ldr	r3, .L1238+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L115
	ldr	r3, .L1238+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L115:
	ldr	r3, .L1238+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L116
	ldr	r3, .L1238+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L116
	ldr	r3, .L1238+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L116
	ldr	r3, .L1238+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L116:
	ldr	r3, .L1238+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L113
	ldr	r3, .L1238+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L113
	ldr	r3, .L1238+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L113
	ldr	r3, .L1238+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L113:
	ldr	r3, .L1238+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1238+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L118
	ldr	r3, .L1238+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L118
	ldr	r3, .L1238+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L118
	ldr	r3, .L1238+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L119
.L118:
	ldr	r3, .L1238+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L120
	ldr	r3, .L1238+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L120
	ldr	r3, .L1238+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L120
	ldr	r3, .L1238+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L119
.L120:
	ldr	r3, .L1238+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L121
	ldr	r3, .L1238+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L121
	ldr	r3, .L1238+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L121
	ldr	r3, .L1238+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L119
.L121:
	ldr	r3, .L1238+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L122
	ldr	r3, .L1238+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L122
	ldr	r3, .L1238+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L122
	ldr	r3, .L1238+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L119
.L122:
	ldr	r3, .L1238+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L123
	ldr	r3, .L1238+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L123
	ldr	r3, .L1238+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L123
	ldr	r3, .L1238+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L119
.L123:
	ldr	r3, .L1238+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L124
	ldr	r3, .L1238+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L124
	ldr	r3, .L1238+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L124
	ldr	r3, .L1238+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L119
.L124:
	ldr	r3, .L1238+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L125
	ldr	r3, .L1238+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L125
	ldr	r3, .L1238+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L125
	ldr	r3, .L1238+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L119
.L125:
	ldr	r3, .L1238+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L126
	ldr	r3, .L1238+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L126
	ldr	r3, .L1238+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L126
	ldr	r3, .L1238+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L119
.L126:
	ldr	r3, .L1238+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1238+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L119:
	ldr	r3, .L1238+56
	ldr	r3, [r3]	@ float
	ldr	r1, .L1238+164
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L127
	ldr	r3, .L1238+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L128
	ldr	r3, .L1238+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L128
	ldr	r3, .L1238+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L128
	ldr	r3, .L1238+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L128:
	ldr	r3, .L1238+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L129
	ldr	r3, .L1238+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L129
	ldr	r3, .L1238+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L129
	ldr	r3, .L1238+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L129:
	ldr	r3, .L1238+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L130
	ldr	r3, .L1238+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L130
	ldr	r3, .L1238+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L130
	ldr	r3, .L1238+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L130:
	ldr	r3, .L1238+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L127
	ldr	r3, .L1238+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L127
	ldr	r3, .L1238+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L127
	ldr	r3, .L1238+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L127:
	ldr	r3, .L1238+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+76
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1238+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L132
	ldr	r3, .L1238+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L132
	ldr	r3, .L1238+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L132
	ldr	r3, .L1238+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L133
.L132:
	ldr	r3, .L1238+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L134
	ldr	r3, .L1238+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L134
	ldr	r3, .L1238+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L134
	ldr	r3, .L1238+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L133
.L134:
	ldr	r3, .L1238+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L135
	ldr	r3, .L1238+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L135
	ldr	r3, .L1238+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L135
	ldr	r3, .L1238+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L133
.L135:
	ldr	r3, .L1238+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L136
	ldr	r3, .L1238+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L136
	ldr	r3, .L1238+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L136
	ldr	r3, .L1238+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L133
.L136:
	ldr	r3, .L1238+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L137
	ldr	r3, .L1238+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L137
	ldr	r3, .L1238+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L137
	ldr	r3, .L1238+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L133
.L137:
	ldr	r3, .L1238+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L138
	ldr	r3, .L1238+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L138
	ldr	r3, .L1238+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L138
	ldr	r3, .L1238+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L133
.L138:
	ldr	r3, .L1238+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L139
	ldr	r3, .L1238+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L139
	ldr	r3, .L1238+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L139
	ldr	r3, .L1238+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L133
.L139:
	ldr	r3, .L1238+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L140
	ldr	r3, .L1238+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L140
	ldr	r3, .L1238+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L140
	ldr	r3, .L1238+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L133
.L140:
	ldr	r3, .L1238+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1238+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L133:
	ldr	r3, .L1238+76
	ldr	r3, [r3]	@ float
	ldr	r1, .L1238+164
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L141
	ldr	r3, .L1238+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L142
	ldr	r3, .L1238+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L142
	ldr	r3, .L1238+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L142
	ldr	r3, .L1238+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L142:
	ldr	r3, .L1238+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L143
	ldr	r3, .L1238+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L143
	ldr	r3, .L1238+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L143
	ldr	r3, .L1238+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L143:
	ldr	r3, .L1238+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L144
	ldr	r3, .L1238+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L144
	ldr	r3, .L1238+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L144
	ldr	r3, .L1238+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L144:
	ldr	r3, .L1238+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L141
	ldr	r3, .L1238+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L141
	ldr	r3, .L1238+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L141
	ldr	r3, .L1238+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L141:
	ldr	r3, .L1238+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1238+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L146
	ldr	r3, .L1238+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L146
	ldr	r3, .L1238+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L146
	ldr	r3, .L1238+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L147
.L146:
	ldr	r3, .L1238+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L148
	ldr	r3, .L1238+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L148
	ldr	r3, .L1238+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L148
	ldr	r3, .L1238+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L147
.L148:
	ldr	r3, .L1238+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1238+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1238+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1238+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L147
.L149:
	ldr	r3, .L1238+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L150
	ldr	r3, .L1238+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L150
	ldr	r3, .L1238+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L150
	ldr	r3, .L1238+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L147
.L150:
	ldr	r3, .L1238+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L151
	ldr	r3, .L1238+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L151
	ldr	r3, .L1238+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L151
	ldr	r3, .L1238+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L147
.L151:
	ldr	r3, .L1238+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L152
	ldr	r3, .L1238+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L152
	ldr	r3, .L1238+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L152
	ldr	r3, .L1238+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L147
.L152:
	ldr	r3, .L1238+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L153
	ldr	r3, .L1238+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L153
	ldr	r3, .L1238+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L153
	ldr	r3, .L1238+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L147
.L153:
	ldr	r3, .L1238+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L154
	ldr	r3, .L1238+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L154
	ldr	r3, .L1238+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L154
	ldr	r3, .L1238+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L147
.L154:
	ldr	r3, .L1238+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	b	.L1239
.L1240:
	.align	2
.L1238:
	.word	p10_l1
	.word	p10_l3
	.word	p10_l2
	.word	p10_l0
	.word	p10_c
	.word	p9_l3
	.word	p9_l2
	.word	p9_l0
	.word	p9_l1
	.word	p9_c
	.word	p8_l3
	.word	p8_l2
	.word	p8_l0
	.word	p8_l1
	.word	p8_c
	.word	p7_l3
	.word	p7_l2
	.word	p7_l0
	.word	p7_l1
	.word	p7_c
	.word	p6_c
	.word	p6_l3
	.word	p6_l2
	.word	p6_l0
	.word	p6_l1
	.word	p5_c
	.word	p5_l3
	.word	p5_l2
	.word	p5_l0
	.word	p5_l1
	.word	p4_c
	.word	p4_l3
	.word	p4_l2
	.word	p4_l0
	.word	p4_l1
	.word	p3_c
	.word	p3_l3
	.word	p3_l2
	.word	p3_l0
	.word	p3_l1
	.word	p2_c
	.word	1098907648
	.word	p2_l3
	.word	p2_l2
	.word	p2_l0
	.word	p2_l1
.L1239:
	beq	.L4
	ldr	r3, .L1238+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L147:
	ldr	r3, .L1238+80
	ldr	r3, [r3]	@ float
	ldr	r1, .L1238+164
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L155
	ldr	r3, .L1238+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L156
	ldr	r3, .L1238+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L156
	ldr	r3, .L1238+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L156
	ldr	r3, .L1238+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L156:
	ldr	r3, .L1238+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L1238+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L1238+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L1238+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L157:
	ldr	r3, .L1238+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L158
	ldr	r3, .L1238+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L158
	ldr	r3, .L1238+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L158
	ldr	r3, .L1238+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L158:
	ldr	r3, .L1238+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L155
	ldr	r3, .L1238+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L155
	ldr	r3, .L1238+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L155
	ldr	r3, .L1238+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L155:
	ldr	r3, .L1238+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1238+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L160
	ldr	r3, .L1238+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L160
	ldr	r3, .L1238+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L160
	ldr	r3, .L1238+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L161
.L160:
	ldr	r3, .L1238+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L162
	ldr	r3, .L1238+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L162
	ldr	r3, .L1238+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L162
	ldr	r3, .L1238+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L161
.L162:
	ldr	r3, .L1238+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L163
	ldr	r3, .L1238+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L163
	ldr	r3, .L1238+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L163
	ldr	r3, .L1238+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L161
.L163:
	ldr	r3, .L1238+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L164
	ldr	r3, .L1238+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L164
	ldr	r3, .L1238+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L164
	ldr	r3, .L1238+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L161
.L164:
	ldr	r3, .L1238+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L165
	ldr	r3, .L1238+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L165
	ldr	r3, .L1238+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L165
	ldr	r3, .L1238+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L161
.L165:
	ldr	r3, .L1238+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L166
	ldr	r3, .L1238+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L166
	ldr	r3, .L1238+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L166
	ldr	r3, .L1238+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L161
.L166:
	ldr	r3, .L1238+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L167
	ldr	r3, .L1238+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L167
	ldr	r3, .L1238+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L167
	ldr	r3, .L1238+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L161
.L167:
	ldr	r3, .L1238+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L168
	ldr	r3, .L1238+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L168
	ldr	r3, .L1238+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L168
	ldr	r3, .L1238+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L161
.L168:
	ldr	r3, .L1238+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1238+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L161:
	ldr	r3, .L1238+100
	ldr	r3, [r3]	@ float
	ldr	r1, .L1238+164
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L169
	ldr	r3, .L1238+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L170
	ldr	r3, .L1238+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L170
	ldr	r3, .L1238+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L170
	ldr	r3, .L1238+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L170:
	ldr	r3, .L1238+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L171
	ldr	r3, .L1238+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L171
	ldr	r3, .L1238+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L171
	ldr	r3, .L1238+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L171:
	ldr	r3, .L1238+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L172
	ldr	r3, .L1238+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L172
	ldr	r3, .L1238+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L172
	ldr	r3, .L1238+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L172:
	ldr	r3, .L1238+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L169
	ldr	r3, .L1238+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L169
	ldr	r3, .L1238+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L169
	ldr	r3, .L1238+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L169:
	ldr	r3, .L1238+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1238+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L174
	ldr	r3, .L1238+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L174
	ldr	r3, .L1238+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L174
	ldr	r3, .L1238+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L175
.L174:
	ldr	r3, .L1238+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L176
	ldr	r3, .L1238+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L176
	ldr	r3, .L1238+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L176
	ldr	r3, .L1238+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L175
.L176:
	ldr	r3, .L1238+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L177
	ldr	r3, .L1238+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L177
	ldr	r3, .L1238+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L177
	ldr	r3, .L1238+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L175
.L177:
	ldr	r3, .L1238+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L178
	ldr	r3, .L1238+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L178
	ldr	r3, .L1238+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L178
	ldr	r3, .L1238+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L175
.L178:
	ldr	r3, .L1238+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L179
	ldr	r3, .L1238+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L179
	ldr	r3, .L1238+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L179
	ldr	r3, .L1238+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L175
.L179:
	ldr	r3, .L1238+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L180
	ldr	r3, .L1238+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L180
	ldr	r3, .L1238+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L180
	ldr	r3, .L1238+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L175
.L180:
	ldr	r3, .L1238+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L181
	ldr	r3, .L1238+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L181
	ldr	r3, .L1238+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L181
	ldr	r3, .L1238+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L175
.L181:
	ldr	r3, .L1238+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L182
	ldr	r3, .L1238+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L182
	ldr	r3, .L1238+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L182
	ldr	r3, .L1238+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L175
.L182:
	ldr	r3, .L1238+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1238+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L175:
	ldr	r3, .L1238+120
	ldr	r3, [r3]	@ float
	ldr	r1, .L1238+164
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L183
	ldr	r3, .L1238+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L184
	ldr	r3, .L1238+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L184
	ldr	r3, .L1238+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L184
	ldr	r3, .L1238+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L184:
	ldr	r3, .L1238+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L185
	ldr	r3, .L1238+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L185
	ldr	r3, .L1238+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L185
	ldr	r3, .L1238+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L185:
	ldr	r3, .L1238+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L186
	ldr	r3, .L1238+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L186
	ldr	r3, .L1238+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L186
	ldr	r3, .L1238+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L186:
	ldr	r3, .L1238+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L183
	ldr	r3, .L1238+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L183
	ldr	r3, .L1238+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L183
	ldr	r3, .L1238+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L183:
	ldr	r3, .L1238+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+140
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1238+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L188
	ldr	r3, .L1238+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L188
	ldr	r3, .L1238+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L188
	ldr	r3, .L1238+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L189
.L188:
	ldr	r3, .L1238+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L190
	ldr	r3, .L1238+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L190
	ldr	r3, .L1238+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L190
	ldr	r3, .L1238+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L189
.L190:
	ldr	r3, .L1238+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L191
	ldr	r3, .L1238+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L191
	ldr	r3, .L1238+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L191
	ldr	r3, .L1238+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L189
.L191:
	ldr	r3, .L1238+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L192
	ldr	r3, .L1238+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L192
	ldr	r3, .L1238+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L192
	ldr	r3, .L1238+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L189
.L192:
	ldr	r3, .L1238+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L193
	ldr	r3, .L1238+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L193
	ldr	r3, .L1238+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L193
	ldr	r3, .L1238+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L189
.L193:
	ldr	r3, .L1238+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L194
	ldr	r3, .L1238+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L194
	ldr	r3, .L1238+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L194
	ldr	r3, .L1238+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L189
.L194:
	ldr	r3, .L1238+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L195
	ldr	r3, .L1238+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L195
	ldr	r3, .L1238+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L195
	ldr	r3, .L1238+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L189
.L195:
	ldr	r3, .L1238+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L196
	ldr	r3, .L1238+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L196
	ldr	r3, .L1238+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L196
	ldr	r3, .L1238+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L189
.L196:
	ldr	r3, .L1238+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1238+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L189:
	ldr	r3, .L1238+140
	ldr	r3, [r3]	@ float
	ldr	r1, .L1238+164
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L197
	ldr	r3, .L1238+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L198
	ldr	r3, .L1238+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L198
	ldr	r3, .L1238+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L198
	ldr	r3, .L1238+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L198:
	ldr	r3, .L1238+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L199
	ldr	r3, .L1238+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L199
	ldr	r3, .L1238+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L199
	ldr	r3, .L1238+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L199:
	ldr	r3, .L1238+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L200
	ldr	r3, .L1238+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L200
	ldr	r3, .L1238+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L200
	ldr	r3, .L1238+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L200:
	ldr	r3, .L1238+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L197
	ldr	r3, .L1238+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L197
	ldr	r3, .L1238+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L197
	ldr	r3, .L1238+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L197:
	ldr	r3, .L1238+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1238+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L202
	ldr	r3, .L1238+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L202
	ldr	r3, .L1238+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L202
	ldr	r3, .L1238+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L203
.L202:
	ldr	r3, .L1238+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L204
	ldr	r3, .L1238+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L204
	ldr	r3, .L1238+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L204
	ldr	r3, .L1238+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L203
.L204:
	ldr	r3, .L1238+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L205
	ldr	r3, .L1238+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L205
	ldr	r3, .L1238+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L205
	ldr	r3, .L1238+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L203
.L205:
	ldr	r3, .L1238+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L206
	ldr	r3, .L1238+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L206
	ldr	r3, .L1238+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L206
	ldr	r3, .L1238+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L203
.L206:
	ldr	r3, .L1238+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1238+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1238+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1238+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L203
.L207:
	ldr	r3, .L1238+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L208
	ldr	r3, .L1238+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L208
	ldr	r3, .L1238+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L208
	ldr	r3, .L1238+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L203
.L208:
	ldr	r3, .L1238+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L209
	ldr	r3, .L1238+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L209
	ldr	r3, .L1238+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L209
	ldr	r3, .L1238+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L203
.L209:
	ldr	r3, .L1238+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L210
	ldr	r3, .L1238+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L210
	ldr	r3, .L1238+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L210
	ldr	r3, .L1238+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L203
.L210:
	ldr	r3, .L1238+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1238+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1238+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L203:
	ldr	r3, .L1238+160
	ldr	r3, [r3]	@ float
	ldr	r1, .L1238+164
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L211
	ldr	r3, .L1238+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L212
	ldr	r3, .L1238+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L212
	ldr	r3, .L1238+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L212
	ldr	r3, .L1238+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L212:
	ldr	r3, .L1238+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L213
	ldr	r3, .L1238+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L213
	ldr	r3, .L1238+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L213
	ldr	r3, .L1238+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L213:
	ldr	r3, .L1238+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L214
	ldr	r3, .L1238+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L214
	ldr	r3, .L1238+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L214
	ldr	r3, .L1238+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L214:
	ldr	r3, .L1241
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L211
	ldr	r3, .L1241+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L211
	ldr	r3, .L1241+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L211
	ldr	r3, .L1241+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L211:
	ldr	r3, .L1241+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1241+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1241+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1241+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1241+32
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1241+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L216
	ldr	r3, .L1241+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L216
	ldr	r3, .L1241+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L216
	ldr	r3, .L1241+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L217
.L216:
	ldr	r3, .L1241+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L218
	ldr	r3, .L1241+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L218
	ldr	r3, .L1241+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L218
	ldr	r3, .L1241+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L217
.L218:
	ldr	r3, .L1241+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L219
	ldr	r3, .L1241+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L219
	ldr	r3, .L1241+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L219
	ldr	r3, .L1241+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L217
.L219:
	ldr	r3, .L1241+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L220
	ldr	r3, .L1241+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L220
	ldr	r3, .L1241+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L220
	ldr	r3, .L1241+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L217
.L220:
	ldr	r3, .L1241+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L221
	ldr	r3, .L1241+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L221
	ldr	r3, .L1241+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L221
	ldr	r3, .L1241+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L217
.L221:
	ldr	r3, .L1241+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L222
	ldr	r3, .L1241+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L222
	ldr	r3, .L1241+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L222
	ldr	r3, .L1241+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L217
.L222:
	ldr	r3, .L1241+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L223
	ldr	r3, .L1241+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L223
	ldr	r3, .L1241+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L223
	ldr	r3, .L1241+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L217
.L223:
	ldr	r3, .L1241+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L224
	ldr	r3, .L1241+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L224
	ldr	r3, .L1241+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L224
	ldr	r3, .L1241+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L217
.L224:
	ldr	r3, .L1241+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1241+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1241+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1241+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L217:
	ldr	r3, .L1241+32
	ldr	r3, [r3]	@ float
	ldr	r1, .L1241+456
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L225
	ldr	r3, .L1241+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L226
	ldr	r3, .L1241+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L226
	ldr	r3, .L1241+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L226
	ldr	r3, .L1241+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L226:
	ldr	r3, .L1241+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L227
	ldr	r3, .L1241+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L227
	ldr	r3, .L1241+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L227
	ldr	r3, .L1241+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L227:
	ldr	r3, .L1241+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L228
	ldr	r3, .L1241+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L228
	ldr	r3, .L1241+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L228
	ldr	r3, .L1241+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L228:
	ldr	r3, .L1241+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L225
	ldr	r3, .L1241+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L225
	ldr	r3, .L1241+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L225
	ldr	r3, .L1241+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L225:
	ldr	r3, .L1241+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1241+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1241+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1241+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1241+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1241+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L230
	ldr	r3, .L1241+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L230
	ldr	r3, .L1241+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L230
	ldr	r3, .L1241+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L231
.L230:
	ldr	r3, .L1241+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L232
	ldr	r3, .L1241+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L232
	ldr	r3, .L1241+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L232
	ldr	r3, .L1241+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L231
.L232:
	ldr	r3, .L1241+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L233
	ldr	r3, .L1241+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L233
	ldr	r3, .L1241+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L233
	ldr	r3, .L1241+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L231
.L233:
	ldr	r3, .L1241+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L234
	ldr	r3, .L1241+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L234
	ldr	r3, .L1241+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L234
	ldr	r3, .L1241+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L231
.L234:
	ldr	r3, .L1241+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L235
	ldr	r3, .L1241+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L235
	ldr	r3, .L1241+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L235
	ldr	r3, .L1241+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L231
.L235:
	ldr	r3, .L1241+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L236
	ldr	r3, .L1241+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L236
	ldr	r3, .L1241+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L236
	ldr	r3, .L1241+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L231
.L236:
	ldr	r3, .L1241+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L237
	ldr	r3, .L1241+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L237
	ldr	r3, .L1241+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L237
	ldr	r3, .L1241+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L231
.L237:
	ldr	r3, .L1241+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L238
	ldr	r3, .L1241+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L238
	ldr	r3, .L1241+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L238
	ldr	r3, .L1241+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L231
.L238:
	ldr	r3, .L1241+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1241+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1241+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1241+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L231:
	ldr	r3, .L1241+52
	ldr	r3, [r3]	@ float
	ldr	r1, .L1241+456
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L239
	ldr	r3, .L1241+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L240
	ldr	r3, .L1241+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L240
	ldr	r3, .L1241+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L240
	ldr	r3, .L1241+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L240:
	ldr	r3, .L1241+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L241
	ldr	r3, .L1241+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L241
	ldr	r3, .L1241+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L241
	ldr	r3, .L1241+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L241:
	ldr	r3, .L1241+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L242
	ldr	r3, .L1241+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L242
	ldr	r3, .L1241+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L242
	ldr	r3, .L1241+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L242:
	ldr	r3, .L1241+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L239
	ldr	r3, .L1241+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L239
	ldr	r3, .L1241+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L239
	ldr	r3, .L1241+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L239:
	ldr	r3, .L1241+512
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1241+468
	ldr	r3, [r3]
	cmp	r3, #17
	beq	.L244
	ldr	r3, .L1241+468
	ldr	r3, [r3]
	cmp	r3, #16
	beq	.L244
	ldr	r3, .L1241+468
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L244
	ldr	r3, .L1241+468
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L244
	ldr	r3, .L1241+468
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L244
	ldr	r3, .L1241+468
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L244
	ldr	r3, .L1241+468
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L244
	ldr	r3, .L1241+468
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L244
	ldr	r3, .L1241+468
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L244
	ldr	r3, .L1241+468
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L244
	ldr	r3, .L1241+468
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L244
	ldr	r3, .L1241+468
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L244
	ldr	r3, .L1241+468
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L244
	ldr	r3, .L1241+468
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L244
	ldr	r3, .L1241+468
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L244
	ldr	r3, .L1241+468
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L244
	ldr	r3, .L1241+468
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L244
	ldr	r3, .L1241+468
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L4
.L244:
	ldr	r3, .L1241+512
	ldr	r3, [r3]	@ float
	ldr	r2, .L1241+56
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	mov	r3, #1
	b	.L246
.L4:
	mov	r3, #0
.L246:
	str	r3, [fp, #-24]
	b	.L247
.L1242:
	.align	2
.L1241:
	.word	p2_l3
	.word	p2_l2
	.word	p2_l0
	.word	p2_l1
	.word	p1_l3
	.word	p1_l2
	.word	p1_l0
	.word	p1_l1
	.word	p1_c
	.word	p0_l3
	.word	p0_l2
	.word	p0_l0
	.word	p0_l1
	.word	p0_c
	.word	_diverge_delta
	.word	_x_p14_l3
	.word	_x_p15_l3
	.word	_x_p12_l3
	.word	_x_p15_l2
	.word	_x_p12_l2
	.word	_x_p15_l1
	.word	_x_p12_l1
	.word	_x_p15_l0
	.word	_x_p12_l0
	.word	_x_p15_evt
	.word	_x_p12_evt
	.word	_x_p15_c
	.word	_x_p12_c
	.word	_x_p10_l3
	.word	_x_p10_l2
	.word	_x_p10_l1
	.word	_x_p10_l0
	.word	_x_p10_evt
	.word	_x__diverge_delta
	.word	_x_p10_c
	.word	_x_p3_l3
	.word	_x_p3_evt
	.word	_x_p0_l2
	.word	_x_p14_l2
	.word	_x_p8_l3
	.word	_x_p0_l1
	.word	_x_p2_l3
	.word	_x_p2_evt
	.word	_x_p14_evt
	.word	_x_delta
	.word	_x_p8_c
	.word	_x_p0_l3
	.word	_x_p14_c
	.word	_x_p8_evt
	.word	_x_p14_l1
	.word	_x_p8_l2
	.word	_x_p16_evt
	.word	_x_p13_evt
	.word	_x_p4_evt
	.word	_x_p1_c
	.word	_x_p9_l3
	.word	_x_p3_l2
	.word	_x_p6_l3
	.word	_x_p1_l3
	.word	_x_p0_l0
	.word	_x_p14_l0
	.word	_x_p8_l1
	.word	_x_p1_evt
	.word	_x_p13_l2
	.word	_x_p1_l1
	.word	_x_p7_l3
	.word	_x_p4_l2
	.word	_x_p13_l3
	.word	_x_p1_l2
	.word	_x_p4_l3
	.word	_x_p11_c
	.word	_x_p5_c
	.word	_x_p11_evt
	.word	_x_p2_c
	.word	_x_p5_evt
	.word	_x_p11_l0
	.word	_x_p0_c
	.word	_x_p5_l0
	.word	_x_p11_l1
	.word	_x_p2_l0
	.word	_x_p0_evt
	.word	_x_p5_l1
	.word	_x_p11_l2
	.word	_x_p2_l1
	.word	_x_p5_l2
	.word	_x_p11_l3
	.word	_x_p2_l2
	.word	_x_p5_l3
	.word	_x_p9_l0
	.word	_x_p6_l0
	.word	_x_p9_l1
	.word	_x_p3_l0
	.word	_x_p6_l1
	.word	_x_p9_l2
	.word	_x_p3_l1
	.word	_x_p6_l2
	.word	_x_p7_c
	.word	_x_p13_c
	.word	_x_p4_c
	.word	_x_p7_evt
	.word	_x_p7_l0
	.word	_x_p13_l0
	.word	_x_p4_l0
	.word	_x_p7_l1
	.word	_x_p13_l1
	.word	_x_p1_l0
	.word	_x_p4_l1
	.word	_x_p7_l2
	.word	_x_p8_l0
	.word	_x_p6_c
	.word	_x_p9_c
	.word	_x_p3_c
	.word	_x_p6_evt
	.word	_x_p9_evt
	.word	1098907648
	.word	p16_c
	.word	_x_v1
	.word	v1
	.word	_x_p16_l3
	.word	_x_p16_l2
	.word	_x_p16_l0
	.word	_x_p16_l1
	.word	_x_v2
	.word	_x_p16_c
	.word	p16_l3
	.word	p16_l2
	.word	p16_l0
	.word	p16_l1
	.word	delta
	.word	p16_evt
	.word	v2
.L1158:
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+60
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+64
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+68
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+72
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+76
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+80
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+84
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+88
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+92
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+96
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+100
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1241+104
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1241+108
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+112
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+116
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+120
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+124
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+128
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1241+132
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1241+136
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+140
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+144
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+148
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+152
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+156
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+160
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+164
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+168
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+172
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1241+176
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L1241+464
	str	r3, [r2]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+488
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1241+180
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+184
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1241+188
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+192
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+196
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+200
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+204
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+208
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+212
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1241+216
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+220
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+224
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+228
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+232
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+236
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+240
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+244
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+248
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+476
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+252
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+256
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+260
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+264
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+472
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+268
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+272
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+276
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1241+280
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1241+284
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+288
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1241+292
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+296
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+300
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1241+304
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+308
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+312
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+316
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+320
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+324
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+328
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+332
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+336
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+340
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+344
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+348
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+352
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+356
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+360
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+364
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+368
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+372
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+376
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+380
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1241+384
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1241+492
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1241+388
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1241+392
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+396
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+400
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+480
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+404
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+408
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+412
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+484
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+416
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+420
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+424
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+428
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+432
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1241+436
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1241+440
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1241+444
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+448
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1241+452
	strb	r2, [r3]
	ldr	r3, .L1241+472
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L248
	ldr	r3, .L1241+476
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L248
	ldr	r3, .L1241+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L248
	ldr	r3, .L1241+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L249
.L248:
	ldr	r3, .L1241+472
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L250
	ldr	r3, .L1241+476
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L250
	ldr	r3, .L1241+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L250
	ldr	r3, .L1241+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L249
.L250:
	ldr	r3, .L1241+472
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L251
	ldr	r3, .L1241+476
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L251
	ldr	r3, .L1241+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L251
	ldr	r3, .L1241+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L249
.L251:
	ldr	r3, .L1241+472
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L252
	ldr	r3, .L1241+476
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L252
	ldr	r3, .L1241+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L252
	ldr	r3, .L1241+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L249
.L252:
	ldr	r3, .L1241+472
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L253
	ldr	r3, .L1241+476
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L253
	ldr	r3, .L1241+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L253
	ldr	r3, .L1241+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L249
.L253:
	ldr	r3, .L1241+472
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L254
	ldr	r3, .L1241+476
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L254
	ldr	r3, .L1241+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L254
	ldr	r3, .L1241+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L249
.L254:
	ldr	r3, .L1241+472
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L255
	ldr	r3, .L1241+476
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L255
	ldr	r3, .L1241+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L255
	ldr	r3, .L1241+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L249
.L255:
	ldr	r3, .L1241+472
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L256
	ldr	r3, .L1241+476
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L256
	ldr	r3, .L1241+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L256
	ldr	r3, .L1241+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L249
.L256:
	ldr	r3, .L1241+472
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1241+476
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1241+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1241+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L249:
	ldr	r3, .L1241+492
	ldr	r3, [r3]	@ float
	ldr	r1, .L1241+456
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L258
	ldr	r3, .L1241+472
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L259
	ldr	r3, .L1241+476
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L259
	ldr	r3, .L1241+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L259
	ldr	r3, .L1241+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L259:
	ldr	r3, .L1241+472
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L260
	ldr	r3, .L1241+476
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L260
	ldr	r3, .L1241+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L260
	ldr	r3, .L1241+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L260:
	ldr	r3, .L1241+472
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L261
	ldr	r3, .L1241+476
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L261
	ldr	r3, .L1241+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L261
	ldr	r3, .L1241+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L261:
	ldr	r3, .L1241+472
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L258
	ldr	r3, .L1241+476
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L258
	ldr	r3, .L1241+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L258
	ldr	r3, .L1241+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L258:
	ldr	r3, .L1241+512
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L262
	ldr	r3, .L1241+504
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1241+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1241+508
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1241+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1241+500
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1241+476
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1241+496
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1241+472
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1241+512
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1241+460
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1241+492
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L262:
	ldr	r3, .L1241+516
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L264
	ldr	r3, .L1241+504
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1241+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1241+508
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1241+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1241+500
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1241+476
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1241+496
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1241+472
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1241+512
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1241+460
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1241+492
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L264:
	ldr	r3, .L1241+468
	ldr	r2, [r3]
	ldr	r3, .L1241+464
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L266
	ldr	r3, .L1241+468
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L266
	ldr	r3, .L1241+472
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L266
	ldr	r3, .L1241+476
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L266
	ldr	r3, .L1241+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L266
	ldr	r3, .L1241+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L266
	ldr	r3, .L1241+520
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1241+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L266
	ldr	r3, .L1241+492
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L267
.L266:
	ldr	r3, .L1241+496
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L267
	ldr	r3, .L1241+500
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L267
	ldr	r3, .L1241+504
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L267
	ldr	r3, .L1241+508
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L267
	ldr	r3, .L1241+512
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L267
	ldr	r3, .L1241+516
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L267:
	ldr	r3, .L1241+520
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1243
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L268
	ldr	r3, .L1243+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L268
	ldr	r3, .L1243+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L268
	ldr	r3, .L1243+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L268
	ldr	r3, .L1243+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L268
	ldr	r3, .L1243+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L268
	ldr	r3, .L1243+76
	ldr	r3, [r3]
	cmp	r3, #17
	beq	.L270
.L268:
	ldr	r3, .L1243+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L270
	ldr	r3, .L1243+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L270
	ldr	r3, .L1243+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L270
	ldr	r3, .L1243+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L270
	ldr	r3, .L1243+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L270
	ldr	r3, .L1243+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L270:
	ldr	r3, .L1243+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1243
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L271
	ldr	r3, .L1243+72
	ldr	r2, [r3]
	ldr	r3, .L1243+76
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L271
	ldr	r3, .L1243+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L272
	ldr	r3, .L1243+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L272
	ldr	r3, .L1243+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L272
	ldr	r3, .L1243+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L273
.L272:
	ldr	r3, .L1243+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L271
	ldr	r3, .L1243+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L271
	ldr	r3, .L1243+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L271
	ldr	r3, .L1243+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L271
.L273:
	ldr	r3, .L1243+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1243+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L274
.L271:
	ldr	r3, .L1243+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L274
	ldr	r3, .L1243+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L274
	ldr	r3, .L1243+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L274
	ldr	r3, .L1243+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L274
	ldr	r3, .L1243+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L274
	ldr	r3, .L1243+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L274:
	ldr	r3, .L1243+72
	ldr	r3, [r3]
	cmp	r3, #17
	bne	.L275
	ldr	r3, .L1243+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L275
	ldr	r3, .L1243+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L275
	ldr	r3, .L1243+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L275
	ldr	r3, .L1243+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L275
	ldr	r3, .L1243+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L275
	ldr	r3, .L1243+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L275
	ldr	r3, .L1243+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L275
	ldr	r3, .L1243+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L275
	ldr	r3, .L1243+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L275
	ldr	r3, .L1243+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L275:
	ldr	r3, .L1243+72
	ldr	r3, [r3]
	cmp	r3, #17
	bne	.L276
	ldr	r3, .L1243+44
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1243+48
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L277
	mov	r3, #0
	mov	r4, r3
.L277:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L278
.L276:
	ldr	r3, .L1243+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L278
	ldr	r3, .L1243+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L278
	ldr	r3, .L1243+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L278
	ldr	r3, .L1243+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L278
	ldr	r3, .L1243+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L278
	ldr	r3, .L1243+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L278
	ldr	r3, .L1243+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L278
	ldr	r3, .L1243+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L278
	ldr	r3, .L1243+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L278
	ldr	r3, .L1243+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L278:
	ldr	r3, .L1243+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1243
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L279
	ldr	r3, .L1243+72
	ldr	r2, [r3]
	ldr	r3, .L1243+76
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L279
	ldr	r3, .L1243+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L280
	ldr	r3, .L1243+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L280
	ldr	r3, .L1243+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L280
	ldr	r3, .L1243+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L281
.L280:
	ldr	r3, .L1243+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L279
	ldr	r3, .L1243+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L279
	ldr	r3, .L1243+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L279
	ldr	r3, .L1243+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L281
.L279:
	ldr	r3, .L1243+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L281
	ldr	r3, .L1243+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L281
	ldr	r3, .L1243+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L281
	ldr	r3, .L1243+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L281
	ldr	r3, .L1243+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L281
	ldr	r3, .L1243+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L281:
	ldr	r3, .L1243+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L282
	ldr	r3, .L1243+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1243+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L283
.L282:
	ldr	r3, .L1243+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L283
	ldr	r3, .L1243+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L283
	ldr	r3, .L1243+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L283
	ldr	r3, .L1243+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L283
	ldr	r3, .L1243+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L283
	ldr	r3, .L1243+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L283
	ldr	r3, .L1243+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L283
	ldr	r3, .L1243+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L283
	ldr	r3, .L1243+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L283
	ldr	r3, .L1243+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L283:
	ldr	r3, .L1243+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L284
	ldr	r3, .L1243+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L285
.L284:
	ldr	r3, .L1243+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L285
	ldr	r3, .L1243+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L285
	ldr	r3, .L1243+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L285
	ldr	r3, .L1243+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L285
	ldr	r3, .L1243+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L285
	ldr	r3, .L1243+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L285
	ldr	r3, .L1243+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L285
	ldr	r3, .L1243+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L285
	ldr	r3, .L1243+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L285
	ldr	r3, .L1243+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L285:
	ldr	r3, .L1243
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L286
	ldr	r3, .L1243+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L286
	ldr	r3, .L1243+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L286
	ldr	r3, .L1243+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L286
	ldr	r3, .L1243+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L286
	ldr	r3, .L1243+72
	ldr	r2, [r3]
	ldr	r3, .L1243+76
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L286
	ldr	r3, .L1243+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L287
.L286:
	ldr	r3, .L1243+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L287
	ldr	r3, .L1243+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L287
	ldr	r3, .L1243+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L287
	ldr	r3, .L1243+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L287
	ldr	r3, .L1243+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L287
	ldr	r3, .L1243+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L287:
	ldr	r3, .L1243+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1243
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L288
	ldr	r3, .L1243+72
	ldr	r2, [r3]
	ldr	r3, .L1243+76
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L288
	ldr	r3, .L1243+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1243+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L288
	ldr	r3, .L1243+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L290
	ldr	r3, .L1243+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L290
	ldr	r3, .L1243+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L290
	ldr	r3, .L1243+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L291
.L290:
	ldr	r3, .L1243+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L288
	ldr	r3, .L1243+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L288
	ldr	r3, .L1243+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L288
	ldr	r3, .L1243+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L291
.L288:
	ldr	r3, .L1243+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L291
	ldr	r3, .L1243+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L291
	ldr	r3, .L1243+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L291
	ldr	r3, .L1243+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L291
	ldr	r3, .L1243+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L291
	ldr	r3, .L1243+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L291:
	ldr	r3, .L1243+72
	ldr	r3, [r3]
	cmp	r3, #17
	bne	.L292
	ldr	r3, .L1243+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L292
	ldr	r3, .L1243+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L292
	ldr	r3, .L1243+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L292
	ldr	r3, .L1243+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L292
	ldr	r3, .L1243+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L292
	ldr	r3, .L1243+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L292
	ldr	r3, .L1243+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L292
	ldr	r3, .L1243+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L292
	ldr	r3, .L1243+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L292
	ldr	r3, .L1243+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L292:
	ldr	r3, .L1243+72
	ldr	r3, [r3]
	cmp	r3, #17
	beq	.L293
	ldr	r3, .L1243+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L293
	ldr	r3, .L1243+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L293
	ldr	r3, .L1243+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L293
	ldr	r3, .L1243+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L293
	ldr	r3, .L1243+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L293
	ldr	r3, .L1243+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L293
	ldr	r3, .L1243+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L293
	ldr	r3, .L1243+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L293
	ldr	r3, .L1243+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L293
	ldr	r3, .L1243+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L293:
	ldr	r3, .L1243+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1243
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L294
	ldr	r3, .L1243+72
	ldr	r2, [r3]
	ldr	r3, .L1243+76
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L294
	ldr	r3, .L1243+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L294
	ldr	r3, .L1243+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L294
	ldr	r3, .L1243+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L294
	ldr	r3, .L1243+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L294
	ldr	r3, .L1243+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L295
.L294:
	ldr	r3, .L1243+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L295
	ldr	r3, .L1243+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L295
	ldr	r3, .L1243+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L295
	ldr	r3, .L1243+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L295
	ldr	r3, .L1243+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L295
	ldr	r3, .L1243+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L295:
	ldr	r3, .L1243+72
	ldr	r2, [r3]
	ldr	r3, .L1243+76
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L296
	ldr	r3, .L1243+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L296
	ldr	r3, .L1243
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L296
	ldr	r3, .L1243+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L296
	ldr	r3, .L1243+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L296
	ldr	r3, .L1243+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L296
	ldr	r3, .L1243+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L298
.L296:
	ldr	r3, .L1243+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L298
	ldr	r3, .L1243+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L298
	ldr	r3, .L1243+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L298
	ldr	r3, .L1243+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L298
	ldr	r3, .L1243+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L298
	ldr	r3, .L1243+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L298:
	ldr	r3, .L1243+76
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L299
	ldr	r3, .L1243+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L299
	ldr	r3, .L1243+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L299
	ldr	r3, .L1243+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L299
	ldr	r3, .L1243+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L299
	ldr	r3, .L1243+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1243
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L299
	ldr	r3, .L1243+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1243+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L300
.L299:
	ldr	r3, .L1243+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L300
	ldr	r3, .L1243+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L300
	ldr	r3, .L1243+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L300
	ldr	r3, .L1243+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L300
	ldr	r3, .L1243+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L300
	ldr	r3, .L1243+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L300:
	ldr	r3, .L1243+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L301
	ldr	r3, .L1243+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L301
	ldr	r3, .L1243+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L301
	ldr	r3, .L1243+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L302
.L301:
	ldr	r3, .L1243+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L303
	ldr	r3, .L1243+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L303
	ldr	r3, .L1243+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L303
	ldr	r3, .L1243+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L302
.L303:
	ldr	r3, .L1243+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L304
	ldr	r3, .L1243+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L304
	ldr	r3, .L1243+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L304
	ldr	r3, .L1243+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L302
.L304:
	ldr	r3, .L1243+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L305
	ldr	r3, .L1243+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L305
	ldr	r3, .L1243+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L305
	ldr	r3, .L1243+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L302
.L305:
	ldr	r3, .L1243+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L306
	ldr	r3, .L1243+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L306
	ldr	r3, .L1243+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L306
	ldr	r3, .L1243+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L302
.L306:
	ldr	r3, .L1243+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L307
	ldr	r3, .L1243+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L307
	ldr	r3, .L1243+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L307
	ldr	r3, .L1243+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L302
	b	.L1244
.L1245:
	.align	2
.L1243:
	.word	_x_v2
	.word	_x_p16_c
	.word	_x_p16_l3
	.word	_x_p16_l2
	.word	_x_p16_l1
	.word	_x_p16_l0
	.word	p16_l3
	.word	p16_l2
	.word	p16_l0
	.word	p16_l1
	.word	p16_evt
	.word	p16_c
	.word	1098907648
	.word	p15_l1
	.word	delta
	.word	p15_evt
	.word	v2
	.word	_x_v2
	.word	v1
	.word	_x_v1
	.word	p15_c
	.word	_x_p15_c
	.word	_x_p15_l3
	.word	_x_p15_l2
	.word	_x_p15_l1
	.word	_x_p15_l0
	.word	p15_l3
	.word	p15_l2
	.word	p15_l0
.L1244:
.L307:
	ldr	r3, .L1243+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L308
	ldr	r3, .L1243+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L308
	ldr	r3, .L1243+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L308
	ldr	r3, .L1243+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L302
.L308:
	ldr	r3, .L1243+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L309
	ldr	r3, .L1243+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L309
	ldr	r3, .L1243+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L309
	ldr	r3, .L1243+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L302
.L309:
	ldr	r3, .L1243+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1243+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1243+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1243+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L302:
	ldr	r3, .L1243+84
	ldr	r3, [r3]	@ float
	ldr	r1, .L1243+48
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L310
	ldr	r3, .L1243+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L311
	ldr	r3, .L1243+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L311
	ldr	r3, .L1243+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L311
	ldr	r3, .L1243+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L311:
	ldr	r3, .L1243+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L312
	ldr	r3, .L1243+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L312
	ldr	r3, .L1243+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L312
	ldr	r3, .L1243+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L312:
	ldr	r3, .L1243+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L313
	ldr	r3, .L1243+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L313
	ldr	r3, .L1243+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L313
	ldr	r3, .L1243+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L313:
	ldr	r3, .L1243+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L310
	ldr	r3, .L1243+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L310
	ldr	r3, .L1243+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L310
	ldr	r3, .L1243+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L310:
	ldr	r3, .L1243+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L314
	ldr	r3, .L1243+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1243+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1243+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1243+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1243+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1243+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1243+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1243+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1243+56
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1243+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1243+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L314:
	ldr	r3, .L1243+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L316
	ldr	r3, .L1243+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1243+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1243+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1243+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1243+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1243+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1243+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1243+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1243+56
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1243+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1243+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L316:
	ldr	r3, .L1243+72
	ldr	r2, [r3]
	ldr	r3, .L1243+76
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L318
	ldr	r3, .L1243+72
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L318
	ldr	r3, .L1243+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L318
	ldr	r3, .L1243+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L318
	ldr	r3, .L1243+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L318
	ldr	r3, .L1243+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L318
	ldr	r3, .L1243+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1243+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L318
	ldr	r3, .L1243+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L319
.L318:
	ldr	r3, .L1243+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L319
	ldr	r3, .L1243+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L319
	ldr	r3, .L1243+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L319
	ldr	r3, .L1243+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L319
	ldr	r3, .L1243+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L319
	ldr	r3, .L1243+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L319:
	ldr	r3, .L1243+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1243+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L320
	ldr	r3, .L1243+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L320
	ldr	r3, .L1243+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L320
	ldr	r3, .L1243+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L320
	ldr	r3, .L1243+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L320
	ldr	r3, .L1243+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L320
	ldr	r3, .L1243+76
	ldr	r3, [r3]
	cmp	r3, #16
	beq	.L322
.L320:
	ldr	r3, .L1243+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L322
	ldr	r3, .L1243+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L322
	ldr	r3, .L1243+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L322
	ldr	r3, .L1243+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L322
	ldr	r3, .L1243+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L322
	ldr	r3, .L1243+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L322:
	ldr	r3, .L1243+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1243+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L323
	ldr	r3, .L1243+72
	ldr	r2, [r3]
	ldr	r3, .L1243+76
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L323
	ldr	r3, .L1243+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L324
	ldr	r3, .L1243+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L324
	ldr	r3, .L1243+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L324
	ldr	r3, .L1243+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L325
.L324:
	ldr	r3, .L1243+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L323
	ldr	r3, .L1243+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L323
	ldr	r3, .L1243+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L323
	ldr	r3, .L1243+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L323
.L325:
	ldr	r3, .L1243+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1243+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L326
.L323:
	ldr	r3, .L1243+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L326
	ldr	r3, .L1243+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L326
	ldr	r3, .L1243+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L326
	ldr	r3, .L1243+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L326
	ldr	r3, .L1243+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L326
	ldr	r3, .L1243+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L326:
	ldr	r3, .L1243+72
	ldr	r3, [r3]
	cmp	r3, #16
	bne	.L327
	ldr	r3, .L1243+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L327
	ldr	r3, .L1243+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L327
	ldr	r3, .L1243+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L327
	ldr	r3, .L1243+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L327
	ldr	r3, .L1243+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L327
	ldr	r3, .L1243+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L327
	ldr	r3, .L1243+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L327
	ldr	r3, .L1243+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L327
	ldr	r3, .L1243+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L327
	ldr	r3, .L1243+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L327:
	ldr	r3, .L1243+72
	ldr	r3, [r3]
	cmp	r3, #16
	bne	.L328
	ldr	r3, .L1243+80
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1243+48
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L329
	mov	r3, #0
	mov	r4, r3
.L329:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L330
.L328:
	ldr	r3, .L1243+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L330
	ldr	r3, .L1243+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L330
	ldr	r3, .L1243+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L330
	ldr	r3, .L1243+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L330
	ldr	r3, .L1243+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L330
	ldr	r3, .L1243+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L330
	ldr	r3, .L1243+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L330
	ldr	r3, .L1243+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L330
	ldr	r3, .L1243+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L330
	ldr	r3, .L1243+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L330:
	ldr	r3, .L1243+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1243+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L331
	ldr	r3, .L1243+72
	ldr	r2, [r3]
	ldr	r3, .L1243+76
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L331
	ldr	r3, .L1243+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L332
	ldr	r3, .L1243+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L332
	ldr	r3, .L1243+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L332
	ldr	r3, .L1243+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L333
.L332:
	ldr	r3, .L1243+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L331
	ldr	r3, .L1243+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L331
	ldr	r3, .L1243+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L331
	ldr	r3, .L1243+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L333
.L331:
	ldr	r3, .L1243+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L333
	ldr	r3, .L1243+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L333
	ldr	r3, .L1243+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L333
	ldr	r3, .L1243+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L333
	ldr	r3, .L1243+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L333
	ldr	r3, .L1243+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L333:
	ldr	r3, .L1243+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L334
	ldr	r3, .L1243+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1243+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L335
.L334:
	ldr	r3, .L1243+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L335
	ldr	r3, .L1243+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L335
	ldr	r3, .L1243+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L335
	ldr	r3, .L1243+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L335
	ldr	r3, .L1243+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L335
	ldr	r3, .L1243+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L335
	ldr	r3, .L1243+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L335
	ldr	r3, .L1243+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L335
	ldr	r3, .L1243+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L335
	ldr	r3, .L1243+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L335:
	ldr	r3, .L1243+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L336
	ldr	r3, .L1243+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L337
.L336:
	ldr	r3, .L1243+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L337
	ldr	r3, .L1243+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L337
	ldr	r3, .L1243+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L337
	ldr	r3, .L1243+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L337
	ldr	r3, .L1243+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L337
	ldr	r3, .L1243+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L337
	ldr	r3, .L1243+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L337
	ldr	r3, .L1243+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L337
	ldr	r3, .L1243+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L337
	ldr	r3, .L1243+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L337:
	ldr	r3, .L1243+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L338
	ldr	r3, .L1243+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L338
	ldr	r3, .L1243+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L338
	ldr	r3, .L1243+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L338
	ldr	r3, .L1243+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L338
	ldr	r3, .L1243+72
	ldr	r2, [r3]
	ldr	r3, .L1243+76
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L338
	ldr	r3, .L1243+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L339
.L338:
	ldr	r3, .L1243+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L339
	ldr	r3, .L1243+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L339
	ldr	r3, .L1243+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L339
	ldr	r3, .L1243+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L339
	ldr	r3, .L1243+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L339
	ldr	r3, .L1243+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L339:
	ldr	r3, .L1243+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1243+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L340
	ldr	r3, .L1243+72
	ldr	r2, [r3]
	ldr	r3, .L1243+76
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L340
	ldr	r3, .L1243+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1243+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L340
	ldr	r3, .L1243+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L342
	ldr	r3, .L1243+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L342
	ldr	r3, .L1243+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L342
	ldr	r3, .L1243+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L343
.L342:
	ldr	r3, .L1243+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L340
	ldr	r3, .L1243+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L340
	ldr	r3, .L1243+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L340
	ldr	r3, .L1243+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L343
.L340:
	ldr	r3, .L1243+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L343
	ldr	r3, .L1243+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L343
	ldr	r3, .L1243+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L343
	ldr	r3, .L1246
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L343
	ldr	r3, .L1246+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L343
	ldr	r3, .L1246+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L343:
	ldr	r3, .L1246+12
	ldr	r3, [r3]
	cmp	r3, #16
	bne	.L344
	ldr	r3, .L1246+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L344
	ldr	r3, .L1246+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L344
	ldr	r3, .L1246+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L344
	ldr	r3, .L1246+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L344
	ldr	r3, .L1246+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L344
	ldr	r3, .L1246+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L344
	ldr	r3, .L1246+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L344
	ldr	r3, .L1246+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L344
	ldr	r3, .L1246+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L344
	ldr	r3, .L1246
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L344:
	ldr	r3, .L1246+12
	ldr	r3, [r3]
	cmp	r3, #16
	beq	.L345
	ldr	r3, .L1246+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L345
	ldr	r3, .L1246+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L345
	ldr	r3, .L1246+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L345
	ldr	r3, .L1246+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L345
	ldr	r3, .L1246+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L345
	ldr	r3, .L1246
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L345
	ldr	r3, .L1246+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L345
	ldr	r3, .L1246+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L345
	ldr	r3, .L1246+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L345
	ldr	r3, .L1246+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L345:
	ldr	r3, .L1246+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1246+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L346
	ldr	r3, .L1246+12
	ldr	r2, [r3]
	ldr	r3, .L1246+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L346
	ldr	r3, .L1246+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L346
	ldr	r3, .L1246+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L346
	ldr	r3, .L1246+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L346
	ldr	r3, .L1246+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L346
	ldr	r3, .L1246+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L347
.L346:
	ldr	r3, .L1246+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L347
	ldr	r3, .L1246+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L347
	ldr	r3, .L1246
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L347
	ldr	r3, .L1246+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L347
	ldr	r3, .L1246+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L347
	ldr	r3, .L1246+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L347:
	ldr	r3, .L1246+12
	ldr	r2, [r3]
	ldr	r3, .L1246+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L348
	ldr	r3, .L1246+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L348
	ldr	r3, .L1246+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L348
	ldr	r3, .L1246+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L348
	ldr	r3, .L1246+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L348
	ldr	r3, .L1246+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L348
	ldr	r3, .L1246+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L350
.L348:
	ldr	r3, .L1246+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L350
	ldr	r3, .L1246+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L350
	ldr	r3, .L1246+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L350
	ldr	r3, .L1246
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L350
	ldr	r3, .L1246+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L350
	ldr	r3, .L1246+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L350:
	ldr	r3, .L1246+56
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L351
	ldr	r3, .L1246+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L351
	ldr	r3, .L1246+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L351
	ldr	r3, .L1246+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L351
	ldr	r3, .L1246+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L351
	ldr	r3, .L1246+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1246+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L351
	ldr	r3, .L1246+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L1246+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L352
.L351:
	ldr	r3, .L1246+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L352
	ldr	r3, .L1246+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L352
	ldr	r3, .L1246+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L352
	ldr	r3, .L1246
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L352
	ldr	r3, .L1246+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L352
	ldr	r3, .L1246+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L352:
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L353
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L353
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L353
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L354
.L353:
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L355
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L355
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L355
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L354
.L355:
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L356
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L356
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L356
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L354
.L356:
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L357
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L357
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L357
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L354
.L357:
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L358
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L358
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L358
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L354
.L358:
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L359
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L359
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L359
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L354
.L359:
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L360
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L360
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L360
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L354
.L360:
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L361
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L361
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L361
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L354
.L361:
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L354:
	ldr	r3, .L1246+88
	ldr	r3, [r3]	@ float
	ldr	r1, .L1246+116
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L362
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L363
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L363
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L363
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L363:
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L364
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L364
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L364
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L364:
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L365
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L365
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L365
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L365:
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L362
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L362
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L362
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L362:
	ldr	r3, .L1246+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L366
	ldr	r3, .L1246+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1246+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1246+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1246+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1246+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1246+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1246+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L366:
	ldr	r3, .L1246+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L368
	ldr	r3, .L1246+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1246+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1246+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1246+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1246+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1246+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1246+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L368:
	ldr	r3, .L1246+12
	ldr	r2, [r3]
	ldr	r3, .L1246+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L370
	ldr	r3, .L1246+12
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L370
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L370
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L370
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L370
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L370
	ldr	r3, .L1246+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1246+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L370
	ldr	r3, .L1246+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L371
.L370:
	ldr	r3, .L1246+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L371
	ldr	r3, .L1246+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L371
	ldr	r3, .L1246+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L371
	ldr	r3, .L1246+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L371
	ldr	r3, .L1246+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L371
	ldr	r3, .L1246+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L371:
	ldr	r3, .L1246+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1246+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L372
	ldr	r3, .L1246+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L372
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L372
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L372
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L372
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L372
	ldr	r3, .L1246+56
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L374
.L372:
	ldr	r3, .L1246+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L374
	ldr	r3, .L1246+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L374
	ldr	r3, .L1246+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L374
	ldr	r3, .L1246+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L374
	ldr	r3, .L1246+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L374
	ldr	r3, .L1246+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L374:
	ldr	r3, .L1246+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1246+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L375
	ldr	r3, .L1246+12
	ldr	r2, [r3]
	ldr	r3, .L1246+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L375
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L376
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L376
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L376
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L377
.L376:
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L375
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L375
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L375
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L375
.L377:
	ldr	r3, .L1246+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1246+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L378
.L375:
	ldr	r3, .L1246+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L1246+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L1246+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L1246+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L1246+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L1246+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L378:
	ldr	r3, .L1246+12
	ldr	r3, [r3]
	cmp	r3, #15
	bne	.L379
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L379
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L379
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L379
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L379
	ldr	r3, .L1246+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L379
	ldr	r3, .L1246+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L379
	ldr	r3, .L1246+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	b	.L1247
.L1248:
	.align	2
.L1246:
	.word	p15_l1
	.word	delta
	.word	p15_evt
	.word	v1
	.word	_x_p15_l3
	.word	_x_p15_l2
	.word	_x_p15_l0
	.word	_x_p15_l1
	.word	p15_l3
	.word	p15_l2
	.word	p15_l0
	.word	_x_p15_c
	.word	p15_c
	.word	v1
	.word	_x_v1
	.word	_x_p14_l3
	.word	_x_p14_l2
	.word	_x_p14_l0
	.word	_x_p14_l1
	.word	v2
	.word	_x_v2
	.word	p14_c
	.word	_x_p14_c
	.word	p14_l3
	.word	p14_l2
	.word	p14_l0
	.word	p14_l1
	.word	p14_evt
	.word	_x_p13_c
	.word	1098907648
	.word	delta
	.word	p13_l0
	.word	_x_p13_l0
	.word	p13_l1
	.word	_x_p13_l1
	.word	p13_l2
	.word	_x_p13_l2
	.word	p13_l3
	.word	_x_p13_l3
.L1247:
	beq	.L379
	ldr	r3, .L1246+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L379
	ldr	r3, .L1246+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L379
	ldr	r3, .L1246+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L379:
	ldr	r3, .L1246+52
	ldr	r3, [r3]
	cmp	r3, #15
	bne	.L380
	ldr	r3, .L1246+84
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1246+116
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L381
	mov	r3, #0
	mov	r4, r3
.L381:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L382
.L380:
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L382
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L382
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L382
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L382
	ldr	r3, .L1246+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L382
	ldr	r3, .L1246+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L382
	ldr	r3, .L1246+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L382
	ldr	r3, .L1246+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L382
	ldr	r3, .L1246+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L382
	ldr	r3, .L1246+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L382:
	ldr	r3, .L1246+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1246+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L383
	ldr	r3, .L1246+52
	ldr	r2, [r3]
	ldr	r3, .L1246+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L383
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L384
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L384
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L384
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L385
.L384:
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L383
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L383
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L383
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L385
.L383:
	ldr	r3, .L1246+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L385
	ldr	r3, .L1246+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L385
	ldr	r3, .L1246+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L385
	ldr	r3, .L1246+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L385
	ldr	r3, .L1246+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L385
	ldr	r3, .L1246+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L385:
	ldr	r3, .L1246+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L386
	ldr	r3, .L1246+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1246+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L387
.L386:
	ldr	r3, .L1246+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L387
	ldr	r3, .L1246+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L387
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L387
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L387
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L387
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L387
	ldr	r3, .L1246+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L387
	ldr	r3, .L1246+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L387
	ldr	r3, .L1246+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L387
	ldr	r3, .L1246+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L387:
	ldr	r3, .L1246+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L388
	ldr	r3, .L1246+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L389
.L388:
	ldr	r3, .L1246+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L389
	ldr	r3, .L1246+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L389
	ldr	r3, .L1246+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L389
	ldr	r3, .L1246+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L389
	ldr	r3, .L1246+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L389
	ldr	r3, .L1246+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L389
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L389
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L389
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L389
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L389:
	ldr	r3, .L1246+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L390
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L390
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L390
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L390
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L390
	ldr	r3, .L1246+52
	ldr	r2, [r3]
	ldr	r3, .L1246+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L390
	ldr	r3, .L1246+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L391
.L390:
	ldr	r3, .L1246+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L391
	ldr	r3, .L1246+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L391
	ldr	r3, .L1246+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L391
	ldr	r3, .L1246+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L391
	ldr	r3, .L1246+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L391
	ldr	r3, .L1246+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L391:
	ldr	r3, .L1246+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1246+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L392
	ldr	r3, .L1246+52
	ldr	r2, [r3]
	ldr	r3, .L1246+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L392
	ldr	r3, .L1246+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1246+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L392
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L394
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L394
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L394
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L395
.L394:
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L392
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L392
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L392
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L395
.L392:
	ldr	r3, .L1246+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L395
	ldr	r3, .L1246+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L395
	ldr	r3, .L1246+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L395
	ldr	r3, .L1246+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L395
	ldr	r3, .L1246+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L395
	ldr	r3, .L1246+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L395:
	ldr	r3, .L1246+52
	ldr	r3, [r3]
	cmp	r3, #15
	bne	.L396
	ldr	r3, .L1246+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L396
	ldr	r3, .L1246+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L396
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L396
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L396
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L396
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L396
	ldr	r3, .L1246+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L396
	ldr	r3, .L1246+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L396
	ldr	r3, .L1246+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L396
	ldr	r3, .L1246+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L396:
	ldr	r3, .L1246+52
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L397
	ldr	r3, .L1246+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L397
	ldr	r3, .L1246+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L397
	ldr	r3, .L1246+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L397
	ldr	r3, .L1246+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L397
	ldr	r3, .L1246+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L397
	ldr	r3, .L1246+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L397
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L397
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L397
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L397
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L397:
	ldr	r3, .L1246+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1246+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L398
	ldr	r3, .L1246+52
	ldr	r2, [r3]
	ldr	r3, .L1246+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L398
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L398
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L398
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L398
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L398
	ldr	r3, .L1246+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L399
.L398:
	ldr	r3, .L1246+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L399
	ldr	r3, .L1246+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L399
	ldr	r3, .L1246+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L399
	ldr	r3, .L1246+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L399
	ldr	r3, .L1246+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L399
	ldr	r3, .L1246+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L399:
	ldr	r3, .L1246+52
	ldr	r2, [r3]
	ldr	r3, .L1246+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L400
	ldr	r3, .L1246+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L400
	ldr	r3, .L1246+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L400
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L400
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L400
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L400
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L402
.L400:
	ldr	r3, .L1246+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L402
	ldr	r3, .L1246+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L402
	ldr	r3, .L1246+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L402
	ldr	r3, .L1246+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L402
	ldr	r3, .L1246+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L402
	ldr	r3, .L1246+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L402:
	ldr	r3, .L1246+56
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L403
	ldr	r3, .L1246+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L403
	ldr	r3, .L1246+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L403
	ldr	r3, .L1246+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L403
	ldr	r3, .L1246+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L403
	ldr	r3, .L1246+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1246+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L403
	ldr	r3, .L1246+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1246+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L404
.L403:
	ldr	r3, .L1246+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L404
	ldr	r3, .L1246+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L404
	ldr	r3, .L1246+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L404
	ldr	r3, .L1246+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L404
	ldr	r3, .L1246+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L404
	ldr	r3, .L1246+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L404:
	ldr	r3, .L1246+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L405
	ldr	r3, .L1246+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L405
	ldr	r3, .L1246+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L405
	ldr	r3, .L1246+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L406
.L405:
	ldr	r3, .L1246+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L407
	ldr	r3, .L1246+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L407
	ldr	r3, .L1246+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L407
	ldr	r3, .L1246+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L406
.L407:
	ldr	r3, .L1246+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L408
	ldr	r3, .L1246+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L408
	ldr	r3, .L1246+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L408
	ldr	r3, .L1246+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L406
.L408:
	ldr	r3, .L1246+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L409
	ldr	r3, .L1246+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L409
	ldr	r3, .L1246+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L409
	ldr	r3, .L1246+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L406
.L409:
	ldr	r3, .L1246+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L410
	ldr	r3, .L1246+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L410
	ldr	r3, .L1246+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L410
	ldr	r3, .L1246+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L406
.L410:
	ldr	r3, .L1246+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L411
	ldr	r3, .L1246+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L411
	ldr	r3, .L1246+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L411
	ldr	r3, .L1246+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L406
.L411:
	ldr	r3, .L1246+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L412
	ldr	r3, .L1246+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L412
	ldr	r3, .L1246+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L412
	ldr	r3, .L1246+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L406
.L412:
	ldr	r3, .L1246+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L413
	ldr	r3, .L1246+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L413
	ldr	r3, .L1246+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L413
	ldr	r3, .L1246+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L406
.L413:
	ldr	r3, .L1246+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1246+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1246+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1246+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L406:
	ldr	r3, .L1246+112
	ldr	r3, [r3]	@ float
	ldr	r1, .L1246+116
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L414
	ldr	r3, .L1246+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L415
	ldr	r3, .L1246+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L415
	ldr	r3, .L1246+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L415
	ldr	r3, .L1246+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L415:
	ldr	r3, .L1246+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L416
	ldr	r3, .L1246+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L416
	ldr	r3, .L1246+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L416
	ldr	r3, .L1246+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L416:
	ldr	r3, .L1246+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L417
	ldr	r3, .L1246+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L417
	ldr	r3, .L1246+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L417
	ldr	r3, .L1246+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L417:
	ldr	r3, .L1246+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L414
	ldr	r3, .L1246+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L414
	ldr	r3, .L1246+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L414
	ldr	r3, .L1246+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L414:
	ldr	r3, .L1246+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L418
	ldr	r3, .L1246+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1246+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1246+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1246+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1246+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1246+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1246+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1246+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1249
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1249+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1249+8
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L418:
	ldr	r3, .L1249+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L420
	ldr	r3, .L1249+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1249+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1249+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1249+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1249+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1249+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1249+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1249+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1249
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1249+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1249+8
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L420:
	ldr	r3, .L1249+64
	ldr	r2, [r3]
	ldr	r3, .L1249+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L422
	ldr	r3, .L1249+64
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L422
	ldr	r3, .L1249+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L422
	ldr	r3, .L1249+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L422
	ldr	r3, .L1249+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L422
	ldr	r3, .L1249+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L422
	ldr	r3, .L1249+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1249+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L422
	ldr	r3, .L1249+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L423
.L422:
	ldr	r3, .L1249+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L423
	ldr	r3, .L1249+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L423
	ldr	r3, .L1249+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L423
	ldr	r3, .L1249+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L423
	ldr	r3, .L1249
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L423
	ldr	r3, .L1249+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L423:
	ldr	r3, .L1249+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1249+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L424
	ldr	r3, .L1249+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L424
	ldr	r3, .L1249+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L424
	ldr	r3, .L1249+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L424
	ldr	r3, .L1249+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L424
	ldr	r3, .L1249+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L424
	ldr	r3, .L1249+68
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L426
.L424:
	ldr	r3, .L1249+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L426
	ldr	r3, .L1249+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L426
	ldr	r3, .L1249+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L426
	ldr	r3, .L1249+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L426
	ldr	r3, .L1249
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L426
	ldr	r3, .L1249+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L426:
	ldr	r3, .L1249+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1249+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L427
	ldr	r3, .L1249+64
	ldr	r2, [r3]
	ldr	r3, .L1249+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L427
	ldr	r3, .L1249+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L428
	ldr	r3, .L1249+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L428
	ldr	r3, .L1249+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L428
	ldr	r3, .L1249+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L429
.L428:
	ldr	r3, .L1249+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L427
	ldr	r3, .L1249+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L427
	ldr	r3, .L1249+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L427
	ldr	r3, .L1249+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L427
.L429:
	ldr	r3, .L1249+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L1249+8
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L430
.L427:
	ldr	r3, .L1249+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L430
	ldr	r3, .L1249+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L430
	ldr	r3, .L1249+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L430
	ldr	r3, .L1249+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L430
	ldr	r3, .L1249
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L430
	ldr	r3, .L1249+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L430:
	ldr	r3, .L1249+64
	ldr	r3, [r3]
	cmp	r3, #14
	bne	.L431
	ldr	r3, .L1249+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L431
	ldr	r3, .L1249+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L431
	ldr	r3, .L1249+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L431
	ldr	r3, .L1249+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L431
	ldr	r3, .L1249+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L431
	ldr	r3, .L1249+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L431
	ldr	r3, .L1249+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L431
	ldr	r3, .L1249+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L431
	ldr	r3, .L1249
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L431
	ldr	r3, .L1249+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L431:
	ldr	r3, .L1249+64
	ldr	r3, [r3]
	cmp	r3, #14
	bne	.L432
	ldr	r3, .L1249+4
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1249+56
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L433
	mov	r3, #0
	mov	r4, r3
.L433:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L434
.L432:
	ldr	r3, .L1249+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L434
	ldr	r3, .L1249+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L434
	ldr	r3, .L1249+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L434
	ldr	r3, .L1249+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L434
	ldr	r3, .L1249+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L434
	ldr	r3, .L1249+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L434
	ldr	r3, .L1249+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L434
	ldr	r3, .L1249+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L434
	ldr	r3, .L1249
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L434
	ldr	r3, .L1249+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L434:
	ldr	r3, .L1249+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1249+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L435
	ldr	r3, .L1249+64
	ldr	r2, [r3]
	ldr	r3, .L1249+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L435
	ldr	r3, .L1249+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L436
	ldr	r3, .L1249+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L436
	ldr	r3, .L1249+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L436
	ldr	r3, .L1249+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L437
.L436:
	ldr	r3, .L1249+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L435
	ldr	r3, .L1249+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L435
	ldr	r3, .L1249+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L435
	ldr	r3, .L1249+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L437
.L435:
	ldr	r3, .L1249+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L437
	ldr	r3, .L1249+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L437
	ldr	r3, .L1249+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L437
	ldr	r3, .L1249+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L437
	ldr	r3, .L1249
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L437
	ldr	r3, .L1249+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L437:
	ldr	r3, .L1249+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L438
	ldr	r3, .L1249+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L1249+8
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L439
.L438:
	ldr	r3, .L1249
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L439
	ldr	r3, .L1249+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L439
	ldr	r3, .L1249+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L439
	ldr	r3, .L1249+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L439
	ldr	r3, .L1249+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L439
	ldr	r3, .L1249+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L439
	ldr	r3, .L1249+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L439
	ldr	r3, .L1249+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L439
	ldr	r3, .L1249+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L439
	ldr	r3, .L1249+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L439:
	ldr	r3, .L1249+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L440
	ldr	r3, .L1249+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L441
.L440:
	ldr	r3, .L1249
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L441
	ldr	r3, .L1249+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L441
	ldr	r3, .L1249+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L441
	ldr	r3, .L1249+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L441
	ldr	r3, .L1249+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L441
	ldr	r3, .L1249+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L441
	ldr	r3, .L1249+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L441
	ldr	r3, .L1249+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L441
	ldr	r3, .L1249+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L441
	ldr	r3, .L1249+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L441:
	ldr	r3, .L1249+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L442
	ldr	r3, .L1249+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L442
	ldr	r3, .L1249+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L442
	ldr	r3, .L1249+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L442
	ldr	r3, .L1249+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L442
	ldr	r3, .L1249+64
	ldr	r2, [r3]
	ldr	r3, .L1249+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L442
	ldr	r3, .L1249+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L443
.L442:
	ldr	r3, .L1249+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L443
	ldr	r3, .L1249+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L443
	ldr	r3, .L1249+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L443
	ldr	r3, .L1249+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L443
	ldr	r3, .L1249
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L443
	ldr	r3, .L1249+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L443:
	ldr	r3, .L1249+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1249+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L444
	ldr	r3, .L1249+64
	ldr	r2, [r3]
	ldr	r3, .L1249+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L444
	ldr	r3, .L1249+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L1249+8
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L444
	ldr	r3, .L1249+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L446
	ldr	r3, .L1249+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L446
	ldr	r3, .L1249+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L446
	ldr	r3, .L1249+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L447
.L446:
	ldr	r3, .L1249+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L444
	ldr	r3, .L1249+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L444
	ldr	r3, .L1249+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L444
	ldr	r3, .L1249+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L447
.L444:
	ldr	r3, .L1249+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L447
	ldr	r3, .L1249+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L447
	ldr	r3, .L1249+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L447
	ldr	r3, .L1249+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L447
	ldr	r3, .L1249
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L447
	ldr	r3, .L1249+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L447:
	ldr	r3, .L1249+64
	ldr	r3, [r3]
	cmp	r3, #14
	bne	.L448
	ldr	r3, .L1249
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L448
	ldr	r3, .L1249+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L448
	ldr	r3, .L1249+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L448
	ldr	r3, .L1249+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L448
	ldr	r3, .L1249+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L448
	ldr	r3, .L1249+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L448
	ldr	r3, .L1249+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L448
	ldr	r3, .L1249+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L448
	ldr	r3, .L1249+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L448
	ldr	r3, .L1249+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L448:
	ldr	r3, .L1249+64
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L449
	ldr	r3, .L1249
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L449
	ldr	r3, .L1249+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L449
	ldr	r3, .L1249+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L449
	ldr	r3, .L1249+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L449
	ldr	r3, .L1249+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L449
	ldr	r3, .L1249+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L449
	ldr	r3, .L1249+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L449
	ldr	r3, .L1249+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L449
	ldr	r3, .L1249+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L449
	ldr	r3, .L1249+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L449:
	ldr	r3, .L1249+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1249+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L450
	ldr	r3, .L1249+64
	ldr	r2, [r3]
	ldr	r3, .L1249+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L450
	ldr	r3, .L1249+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L450
	ldr	r3, .L1249+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L450
	ldr	r3, .L1249+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L450
	ldr	r3, .L1249+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L450
	ldr	r3, .L1249+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L451
.L450:
	ldr	r3, .L1249+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L451
	ldr	r3, .L1249+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L451
	ldr	r3, .L1249+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L451
	ldr	r3, .L1249+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L451
	ldr	r3, .L1249
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L451
	ldr	r3, .L1249+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L451:
	ldr	r3, .L1249+64
	ldr	r2, [r3]
	ldr	r3, .L1249+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L452
	ldr	r3, .L1249+8
	ldr	r3, [r3]	@ float
	b	.L1250
.L1251:
	.align	2
.L1249:
	.word	delta
	.word	p13_c
	.word	_x_p13_c
	.word	_x_p13_l3
	.word	_x_p13_l2
	.word	_x_p13_l0
	.word	_x_p13_l1
	.word	p13_c
	.word	_x_p13_c
	.word	p13_l3
	.word	p13_l2
	.word	p13_l0
	.word	p13_l1
	.word	p13_evt
	.word	1098907648
	.word	_x_v2
	.word	v1
	.word	_x_v1
	.word	_x_p12_l2
	.word	_x_p12_l0
	.word	_x_p12_l1
	.word	p12_l3
	.word	p12_l2
	.word	p12_l0
	.word	p12_l1
	.word	v2
	.word	p12_c
	.word	_x_p12_c
	.word	delta
	.word	p12_evt
	.word	_x_p12_l3
.L1250:
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L452
	ldr	r3, .L1249+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L452
	ldr	r3, .L1249+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L452
	ldr	r3, .L1249+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L452
	ldr	r3, .L1249+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L452
	ldr	r3, .L1249+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L454
.L452:
	ldr	r3, .L1249+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L454
	ldr	r3, .L1249+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L454
	ldr	r3, .L1249+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L454
	ldr	r3, .L1249+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L454
	ldr	r3, .L1249+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L454
	ldr	r3, .L1249+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L454:
	ldr	r3, .L1249+68
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L455
	ldr	r3, .L1249+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L455
	ldr	r3, .L1249+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L455
	ldr	r3, .L1249+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L455
	ldr	r3, .L1249+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L455
	ldr	r3, .L1249+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1249+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L455
	ldr	r3, .L1249+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L1249+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L456
.L455:
	ldr	r3, .L1249+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L456
	ldr	r3, .L1249+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L456
	ldr	r3, .L1249+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L456
	ldr	r3, .L1249+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L456
	ldr	r3, .L1249+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L456
	ldr	r3, .L1249+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L456:
	ldr	r3, .L1249+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L457
	ldr	r3, .L1249+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L457
	ldr	r3, .L1249+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L457
	ldr	r3, .L1249+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L458
.L457:
	ldr	r3, .L1249+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L459
	ldr	r3, .L1249+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L459
	ldr	r3, .L1249+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L459
	ldr	r3, .L1249+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L458
.L459:
	ldr	r3, .L1249+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L460
	ldr	r3, .L1249+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L460
	ldr	r3, .L1249+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L460
	ldr	r3, .L1249+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L458
.L460:
	ldr	r3, .L1249+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L461
	ldr	r3, .L1249+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L461
	ldr	r3, .L1249+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L461
	ldr	r3, .L1249+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L458
.L461:
	ldr	r3, .L1249+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L462
	ldr	r3, .L1249+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L462
	ldr	r3, .L1249+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L462
	ldr	r3, .L1249+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L458
.L462:
	ldr	r3, .L1249+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L463
	ldr	r3, .L1249+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L463
	ldr	r3, .L1249+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L463
	ldr	r3, .L1249+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L458
.L463:
	ldr	r3, .L1249+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L464
	ldr	r3, .L1249+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L464
	ldr	r3, .L1249+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L464
	ldr	r3, .L1249+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L458
.L464:
	ldr	r3, .L1249+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L465
	ldr	r3, .L1249+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L465
	ldr	r3, .L1249+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L465
	ldr	r3, .L1249+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L458
.L465:
	ldr	r3, .L1249+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1249+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1249+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1249+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L458:
	ldr	r3, .L1249+108
	ldr	r3, [r3]	@ float
	ldr	r1, .L1249+56
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L466
	ldr	r3, .L1249+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L467
	ldr	r3, .L1249+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L467
	ldr	r3, .L1249+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L467
	ldr	r3, .L1249+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L467:
	ldr	r3, .L1249+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L468
	ldr	r3, .L1249+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L468
	ldr	r3, .L1249+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L468
	ldr	r3, .L1249+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L468:
	ldr	r3, .L1249+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L469
	ldr	r3, .L1249+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L469
	ldr	r3, .L1249+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L469
	ldr	r3, .L1249+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L469:
	ldr	r3, .L1249+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L466
	ldr	r3, .L1249+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L466
	ldr	r3, .L1249+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L466
	ldr	r3, .L1249+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L466:
	ldr	r3, .L1249+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L470
	ldr	r3, .L1249+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1249+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1249+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1249+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1249+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1249+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1249+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1249+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1249+112
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1249+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1249+108
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L470:
	ldr	r3, .L1249+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L472
	ldr	r3, .L1249+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1249+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1249+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1249+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1249+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1249+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1249+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1249+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1249+112
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1249+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1249+108
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L472:
	ldr	r3, .L1249+64
	ldr	r2, [r3]
	ldr	r3, .L1249+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L474
	ldr	r3, .L1249+64
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L474
	ldr	r3, .L1249+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L474
	ldr	r3, .L1249+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L474
	ldr	r3, .L1249+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L474
	ldr	r3, .L1249+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L474
	ldr	r3, .L1249+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1249+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L474
	ldr	r3, .L1249+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L475
.L474:
	ldr	r3, .L1249+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L475
	ldr	r3, .L1249+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L475
	ldr	r3, .L1249+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L475
	ldr	r3, .L1249+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L475
	ldr	r3, .L1249+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L475
	ldr	r3, .L1249+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L475:
	ldr	r3, .L1249+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1249+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L476
	ldr	r3, .L1249+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L476
	ldr	r3, .L1249+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L476
	ldr	r3, .L1249+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L476
	ldr	r3, .L1249+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L476
	ldr	r3, .L1249+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L476
	ldr	r3, .L1249+68
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L478
.L476:
	ldr	r3, .L1249+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L478
	ldr	r3, .L1249+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L478
	ldr	r3, .L1249+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L478
	ldr	r3, .L1249+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L478
	ldr	r3, .L1249+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L478
	ldr	r3, .L1249+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L478:
	ldr	r3, .L1249+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1249+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L479
	ldr	r3, .L1249+64
	ldr	r2, [r3]
	ldr	r3, .L1249+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L479
	ldr	r3, .L1249+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L480
	ldr	r3, .L1249+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L480
	ldr	r3, .L1249+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L480
	ldr	r3, .L1249+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L481
.L480:
	ldr	r3, .L1249+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L479
	ldr	r3, .L1249+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L479
	ldr	r3, .L1249+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L479
	ldr	r3, .L1249+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L479
.L481:
	ldr	r3, .L1249+104
	ldr	r3, [r3]	@ float
	ldr	r2, .L1249+108
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L482
.L479:
	ldr	r3, .L1249+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L482
	ldr	r3, .L1249+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L482
	ldr	r3, .L1249+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L482
	ldr	r3, .L1249+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L482
	ldr	r3, .L1249+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L482
	ldr	r3, .L1249+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L482:
	ldr	r3, .L1249+64
	ldr	r3, [r3]
	cmp	r3, #13
	bne	.L483
	ldr	r3, .L1249+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L483
	ldr	r3, .L1249+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L483
	ldr	r3, .L1249+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L483
	ldr	r3, .L1249+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L483
	ldr	r3, .L1249+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L483
	ldr	r3, .L1249+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L483
	ldr	r3, .L1249+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L483
	ldr	r3, .L1249+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L483
	ldr	r3, .L1249+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L483
	ldr	r3, .L1249+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L483:
	ldr	r3, .L1249+64
	ldr	r3, [r3]
	cmp	r3, #13
	bne	.L484
	ldr	r3, .L1249+104
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1249+56
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L485
	mov	r3, #0
	mov	r4, r3
.L485:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L486
.L484:
	ldr	r3, .L1249+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L486
	ldr	r3, .L1249+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L486
	ldr	r3, .L1249+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L486
	ldr	r3, .L1249+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L486
	ldr	r3, .L1249+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L486
	ldr	r3, .L1249+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L486
	ldr	r3, .L1249+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L486
	ldr	r3, .L1249+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L486
	ldr	r3, .L1249+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L486
	ldr	r3, .L1249+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L486:
	ldr	r3, .L1249+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1249+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L487
	ldr	r3, .L1249+64
	ldr	r2, [r3]
	ldr	r3, .L1249+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L487
	ldr	r3, .L1249+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L488
	ldr	r3, .L1249+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L488
	ldr	r3, .L1249+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L488
	ldr	r3, .L1249+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L489
.L488:
	ldr	r3, .L1249+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L487
	ldr	r3, .L1249+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L487
	ldr	r3, .L1249+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L487
	ldr	r3, .L1249+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L489
.L487:
	ldr	r3, .L1249+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L489
	ldr	r3, .L1249+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L489
	ldr	r3, .L1249+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L489
	ldr	r3, .L1249+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L489
	ldr	r3, .L1249+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L489
	ldr	r3, .L1249+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L489:
	ldr	r3, .L1249+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L490
	ldr	r3, .L1249+104
	ldr	r3, [r3]	@ float
	ldr	r2, .L1249+108
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L491
.L490:
	ldr	r3, .L1249+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L491
	ldr	r3, .L1249+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L491
	ldr	r3, .L1249+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L491
	ldr	r3, .L1252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L491
	ldr	r3, .L1252+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L491
	ldr	r3, .L1252+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L491
	ldr	r3, .L1252+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L491
	ldr	r3, .L1252+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L491
	ldr	r3, .L1252+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L491
	ldr	r3, .L1252+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L491:
	ldr	r3, .L1252+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L492
	ldr	r3, .L1252+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L493
.L492:
	ldr	r3, .L1252+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L493
	ldr	r3, .L1252+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L493
	ldr	r3, .L1252+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L493
	ldr	r3, .L1252+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L493
	ldr	r3, .L1252+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L493
	ldr	r3, .L1252+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L493
	ldr	r3, .L1252+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L493
	ldr	r3, .L1252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L493
	ldr	r3, .L1252+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L493
	ldr	r3, .L1252+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L493:
	ldr	r3, .L1252+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L494
	ldr	r3, .L1252+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L494
	ldr	r3, .L1252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L494
	ldr	r3, .L1252+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L494
	ldr	r3, .L1252+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L494
	ldr	r3, .L1252+48
	ldr	r2, [r3]
	ldr	r3, .L1252+52
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L494
	ldr	r3, .L1252+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L495
.L494:
	ldr	r3, .L1252+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L495
	ldr	r3, .L1252+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L495
	ldr	r3, .L1252+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L495
	ldr	r3, .L1252+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L495
	ldr	r3, .L1252+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L495
	ldr	r3, .L1252+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L495:
	ldr	r3, .L1252+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1252+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L496
	ldr	r3, .L1252+48
	ldr	r2, [r3]
	ldr	r3, .L1252+52
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L496
	ldr	r3, .L1252+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L1252+28
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L496
	ldr	r3, .L1252+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L498
	ldr	r3, .L1252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L498
	ldr	r3, .L1252+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L498
	ldr	r3, .L1252+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L499
.L498:
	ldr	r3, .L1252+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L496
	ldr	r3, .L1252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L496
	ldr	r3, .L1252+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L496
	ldr	r3, .L1252+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L499
.L496:
	ldr	r3, .L1252+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L499
	ldr	r3, .L1252+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L499
	ldr	r3, .L1252+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L499
	ldr	r3, .L1252+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L499
	ldr	r3, .L1252+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L499
	ldr	r3, .L1252+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L499:
	ldr	r3, .L1252+48
	ldr	r3, [r3]
	cmp	r3, #13
	bne	.L500
	ldr	r3, .L1252+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L500
	ldr	r3, .L1252+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L500
	ldr	r3, .L1252+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L500
	ldr	r3, .L1252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L500
	ldr	r3, .L1252+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L500
	ldr	r3, .L1252+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L500
	ldr	r3, .L1252+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L500
	ldr	r3, .L1252+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L500
	ldr	r3, .L1252+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L500
	ldr	r3, .L1252+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L500:
	ldr	r3, .L1252+48
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L501
	ldr	r3, .L1252+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L501
	ldr	r3, .L1252+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L501
	ldr	r3, .L1252+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L501
	ldr	r3, .L1252+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L501
	ldr	r3, .L1252+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L501
	ldr	r3, .L1252+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L501
	ldr	r3, .L1252+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L501
	ldr	r3, .L1252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L501
	ldr	r3, .L1252+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L501
	ldr	r3, .L1252+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L501:
	ldr	r3, .L1252+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1252+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L502
	ldr	r3, .L1252+48
	ldr	r2, [r3]
	ldr	r3, .L1252+52
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L502
	ldr	r3, .L1252+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L502
	ldr	r3, .L1252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L502
	ldr	r3, .L1252+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L502
	ldr	r3, .L1252+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L502
	ldr	r3, .L1252+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L503
.L502:
	ldr	r3, .L1252+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L503
	ldr	r3, .L1252+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L503
	ldr	r3, .L1252+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L503
	ldr	r3, .L1252+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L503
	ldr	r3, .L1252+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L503
	ldr	r3, .L1252+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L503:
	ldr	r3, .L1252+48
	ldr	r2, [r3]
	ldr	r3, .L1252+52
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L504
	ldr	r3, .L1252+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L504
	ldr	r3, .L1252+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L504
	ldr	r3, .L1252+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L504
	ldr	r3, .L1252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L504
	ldr	r3, .L1252+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L504
	ldr	r3, .L1252+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L506
.L504:
	ldr	r3, .L1252+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L506
	ldr	r3, .L1252+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L506
	ldr	r3, .L1252+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L506
	ldr	r3, .L1252+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L506
	ldr	r3, .L1252+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L506
	ldr	r3, .L1252+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L506:
	ldr	r3, .L1252+52
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L507
	ldr	r3, .L1252+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L507
	ldr	r3, .L1252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L507
	ldr	r3, .L1252+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L507
	ldr	r3, .L1252+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L507
	ldr	r3, .L1252+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1252+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L507
	ldr	r3, .L1252+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L1252+28
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L508
.L507:
	ldr	r3, .L1252+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L508
	ldr	r3, .L1252+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L508
	ldr	r3, .L1252+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L508
	ldr	r3, .L1252+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L508
	ldr	r3, .L1252+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L508
	ldr	r3, .L1252+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L508:
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L509
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L509
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L509
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L510
.L509:
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L511
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L511
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L511
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L510
.L511:
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L512
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L512
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L512
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L510
.L512:
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L513
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L513
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L513
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L510
.L513:
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L514
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L514
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L514
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L510
.L514:
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L515
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L515
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L515
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L510
.L515:
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L516
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L516
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L516
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L510
.L516:
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L517
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L517
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L517
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L510
.L517:
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L510:
	ldr	r3, .L1252+84
	ldr	r3, [r3]	@ float
	ldr	r1, .L1252+44
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L518
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L519
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L519
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L519
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L519:
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L520
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L520
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L520
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L520:
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L521
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L521
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L521
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L521:
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L518
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L518
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L518
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L518:
	ldr	r3, .L1252+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L522
	ldr	r3, .L1252+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1252+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1252+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1252+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1252+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1252+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1252+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L522:
	ldr	r3, .L1252+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L524
	ldr	r3, .L1252+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1252+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1252+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1252+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1252+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1252+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1252+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L524:
	ldr	r3, .L1252+48
	ldr	r2, [r3]
	ldr	r3, .L1252+52
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L526
	ldr	r3, .L1252+48
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L526
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L526
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L526
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L526
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L526
	ldr	r3, .L1252+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1252+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L526
	ldr	r3, .L1252+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L527
	b	.L1253
.L1254:
	.align	2
.L1252:
	.word	_x_p12_l2
	.word	_x_p12_l0
	.word	_x_p12_l1
	.word	p12_l3
	.word	p12_l2
	.word	p12_l0
	.word	p12_l1
	.word	_x_p12_c
	.word	p12_evt
	.word	_x_p12_l3
	.word	p12_c
	.word	1098907648
	.word	v1
	.word	_x_v1
	.word	_x_p11_l3
	.word	_x_p11_l2
	.word	_x_p11_l0
	.word	_x_p11_l1
	.word	v2
	.word	_x_v2
	.word	p11_c
	.word	_x_p11_c
	.word	p11_l3
	.word	p11_l2
	.word	p11_l0
	.word	p11_l1
	.word	delta
	.word	p11_evt
	.word	_x_p10_l1
	.word	_x_p10_l3
	.word	_x_p10_l2
	.word	_x_p10_l0
.L1253:
.L526:
	ldr	r3, .L1252+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L527
	ldr	r3, .L1252+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L527
	ldr	r3, .L1252+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L527
	ldr	r3, .L1252+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L527
	ldr	r3, .L1252+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L527
	ldr	r3, .L1252+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L527:
	ldr	r3, .L1252+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1252+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L528
	ldr	r3, .L1252+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L528
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L528
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L528
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L528
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L528
	ldr	r3, .L1252+52
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L530
.L528:
	ldr	r3, .L1252+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L530
	ldr	r3, .L1252+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L530
	ldr	r3, .L1252+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L530
	ldr	r3, .L1252+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L530
	ldr	r3, .L1252+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L530
	ldr	r3, .L1252+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L530:
	ldr	r3, .L1252+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1252+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L531
	ldr	r3, .L1252+48
	ldr	r2, [r3]
	ldr	r3, .L1252+52
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L531
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L532
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L532
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L532
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L533
.L532:
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L531
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L531
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L531
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L531
.L533:
	ldr	r3, .L1252+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1252+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L534
.L531:
	ldr	r3, .L1252+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L534
	ldr	r3, .L1252+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L534
	ldr	r3, .L1252+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L534
	ldr	r3, .L1252+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L534
	ldr	r3, .L1252+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L534
	ldr	r3, .L1252+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L534:
	ldr	r3, .L1252+48
	ldr	r3, [r3]
	cmp	r3, #12
	bne	.L535
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L535
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L535
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L535
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L535
	ldr	r3, .L1252+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L535
	ldr	r3, .L1252+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L535
	ldr	r3, .L1252+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L535
	ldr	r3, .L1252+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L535
	ldr	r3, .L1252+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L535
	ldr	r3, .L1252+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L535:
	ldr	r3, .L1252+48
	ldr	r3, [r3]
	cmp	r3, #12
	bne	.L536
	ldr	r3, .L1252+80
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1252+44
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L537
	mov	r3, #0
	mov	r4, r3
.L537:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L538
.L536:
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L538
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L538
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L538
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L538
	ldr	r3, .L1252+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L538
	ldr	r3, .L1252+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L538
	ldr	r3, .L1252+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L538
	ldr	r3, .L1252+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L538
	ldr	r3, .L1252+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L538
	ldr	r3, .L1252+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L538:
	ldr	r3, .L1252+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1252+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L539
	ldr	r3, .L1252+48
	ldr	r2, [r3]
	ldr	r3, .L1252+52
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L539
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L540
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L540
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L540
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L541
.L540:
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L539
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L539
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L539
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L541
.L539:
	ldr	r3, .L1252+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L541
	ldr	r3, .L1252+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L541
	ldr	r3, .L1252+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L541
	ldr	r3, .L1252+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L541
	ldr	r3, .L1252+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L541
	ldr	r3, .L1252+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L541:
	ldr	r3, .L1252+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L542
	ldr	r3, .L1252+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1252+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L543
.L542:
	ldr	r3, .L1252+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L543
	ldr	r3, .L1252+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L543
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L543
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L543
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L543
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L543
	ldr	r3, .L1252+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L543
	ldr	r3, .L1252+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L543
	ldr	r3, .L1252+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L543
	ldr	r3, .L1252+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L543:
	ldr	r3, .L1252+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L544
	ldr	r3, .L1252+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L545
.L544:
	ldr	r3, .L1252+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L545
	ldr	r3, .L1252+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L545
	ldr	r3, .L1252+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L545
	ldr	r3, .L1252+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L545
	ldr	r3, .L1252+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L545
	ldr	r3, .L1252+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L545
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L545
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L545
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L545
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L545:
	ldr	r3, .L1252+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L546
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L546
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L546
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L546
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L546
	ldr	r3, .L1252+48
	ldr	r2, [r3]
	ldr	r3, .L1252+52
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L546
	ldr	r3, .L1252+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L547
.L546:
	ldr	r3, .L1252+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L547
	ldr	r3, .L1252+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L547
	ldr	r3, .L1252+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L547
	ldr	r3, .L1252+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L547
	ldr	r3, .L1252+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L547
	ldr	r3, .L1252+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L547:
	ldr	r3, .L1252+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1252+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L548
	ldr	r3, .L1252+48
	ldr	r2, [r3]
	ldr	r3, .L1252+52
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L548
	ldr	r3, .L1252+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1252+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L548
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L550
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L550
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L550
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L551
.L550:
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L548
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L548
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L548
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L551
.L548:
	ldr	r3, .L1252+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L551
	ldr	r3, .L1252+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L551
	ldr	r3, .L1252+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L551
	ldr	r3, .L1252+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L551
	ldr	r3, .L1252+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L551
	ldr	r3, .L1252+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L551:
	ldr	r3, .L1252+48
	ldr	r3, [r3]
	cmp	r3, #12
	bne	.L552
	ldr	r3, .L1252+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L552
	ldr	r3, .L1252+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L552
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L552
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L552
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L552
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L552
	ldr	r3, .L1252+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L552
	ldr	r3, .L1252+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L552
	ldr	r3, .L1252+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L552
	ldr	r3, .L1252+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L552:
	ldr	r3, .L1252+48
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L553
	ldr	r3, .L1252+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L553
	ldr	r3, .L1252+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L553
	ldr	r3, .L1252+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L553
	ldr	r3, .L1252+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L553
	ldr	r3, .L1252+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L553
	ldr	r3, .L1252+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L553
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L553
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L553
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L553
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L553:
	ldr	r3, .L1252+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1252+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L554
	ldr	r3, .L1252+48
	ldr	r2, [r3]
	ldr	r3, .L1252+52
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L554
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L554
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L554
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L554
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L554
	ldr	r3, .L1252+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L555
.L554:
	ldr	r3, .L1252+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L555
	ldr	r3, .L1252+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L555
	ldr	r3, .L1252+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L555
	ldr	r3, .L1252+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L555
	ldr	r3, .L1252+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L555
	ldr	r3, .L1252+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L555:
	ldr	r3, .L1252+48
	ldr	r2, [r3]
	ldr	r3, .L1252+52
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L556
	ldr	r3, .L1252+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L556
	ldr	r3, .L1252+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L556
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L556
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L556
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L556
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L558
.L556:
	ldr	r3, .L1252+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L558
	ldr	r3, .L1252+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L558
	ldr	r3, .L1252+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L558
	ldr	r3, .L1252+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L558
	ldr	r3, .L1252+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L558
	ldr	r3, .L1252+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L558:
	ldr	r3, .L1252+52
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L559
	ldr	r3, .L1252+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L559
	ldr	r3, .L1252+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L559
	ldr	r3, .L1252+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L559
	ldr	r3, .L1252+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L559
	ldr	r3, .L1252+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1252+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L559
	ldr	r3, .L1252+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1252+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L560
.L559:
	ldr	r3, .L1252+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L560
	ldr	r3, .L1252+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L560
	ldr	r3, .L1252+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L560
	ldr	r3, .L1252+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L560
	ldr	r3, .L1252+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L560
	ldr	r3, .L1252+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L560:
	ldr	r3, .L1252+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L561
	ldr	r3, .L1252+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L561
	ldr	r3, .L1252+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L561
	ldr	r3, .L1252+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L562
.L561:
	ldr	r3, .L1252+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L563
	ldr	r3, .L1252+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L563
	ldr	r3, .L1252+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L563
	ldr	r3, .L1252+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L562
.L563:
	ldr	r3, .L1252+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L564
	ldr	r3, .L1252+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L564
	ldr	r3, .L1252+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L564
	ldr	r3, .L1252+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L562
.L564:
	ldr	r3, .L1252+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L565
	ldr	r3, .L1252+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L565
	ldr	r3, .L1252+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L565
	ldr	r3, .L1255
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L562
.L565:
	ldr	r3, .L1255+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L566
	ldr	r3, .L1255+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L566
	ldr	r3, .L1255+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L566
	ldr	r3, .L1255
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L562
.L566:
	ldr	r3, .L1255+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L567
	ldr	r3, .L1255+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L567
	ldr	r3, .L1255+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L567
	ldr	r3, .L1255
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L562
.L567:
	ldr	r3, .L1255+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L568
	ldr	r3, .L1255+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L568
	ldr	r3, .L1255
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L568
	ldr	r3, .L1255+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L562
.L568:
	ldr	r3, .L1255+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L569
	ldr	r3, .L1255+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L569
	ldr	r3, .L1255+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L569
	ldr	r3, .L1255
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L562
.L569:
	ldr	r3, .L1255+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1255+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1255+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1255
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L562:
	ldr	r3, .L1255+36
	ldr	r3, [r3]	@ float
	ldr	r1, .L1255+60
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L570
	ldr	r3, .L1255+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L571
	ldr	r3, .L1255+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L571
	ldr	r3, .L1255+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L571
	ldr	r3, .L1255
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L571:
	ldr	r3, .L1255+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L572
	ldr	r3, .L1255+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L572
	ldr	r3, .L1255+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L572
	ldr	r3, .L1255
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L572:
	ldr	r3, .L1255+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L573
	ldr	r3, .L1255+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L573
	ldr	r3, .L1255+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L573
	ldr	r3, .L1255
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L573:
	ldr	r3, .L1255+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L570
	ldr	r3, .L1255+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L570
	ldr	r3, .L1255+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L570
	ldr	r3, .L1255
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L570:
	ldr	r3, .L1255+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L574
	ldr	r3, .L1255+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1255+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1255+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1255
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1255+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1255+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1255+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1255+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1255+124
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1255+32
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1255+36
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L574:
	ldr	r3, .L1255+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L576
	ldr	r3, .L1255+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1255+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1255+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1255
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1255+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1255+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1255+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1255+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1255+124
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1255+32
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1255+36
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L576:
	ldr	r3, .L1255+76
	ldr	r2, [r3]
	ldr	r3, .L1255+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L578
	ldr	r3, .L1255+76
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L578
	ldr	r3, .L1255+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L578
	ldr	r3, .L1255+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L578
	ldr	r3, .L1255+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L578
	ldr	r3, .L1255
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L578
	ldr	r3, .L1255+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1255+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L578
	ldr	r3, .L1255+36
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L579
.L578:
	ldr	r3, .L1255+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L579
	ldr	r3, .L1255+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L579
	ldr	r3, .L1255+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L579
	ldr	r3, .L1255+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L579
	ldr	r3, .L1255+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L579
	ldr	r3, .L1255+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L579:
	ldr	r3, .L1255+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1255+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L580
	ldr	r3, .L1255+36
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L580
	ldr	r3, .L1255+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L580
	ldr	r3, .L1255+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L580
	ldr	r3, .L1255
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L580
	ldr	r3, .L1255+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L580
	ldr	r3, .L1255+80
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L582
.L580:
	ldr	r3, .L1255+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L582
	ldr	r3, .L1255+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L582
	ldr	r3, .L1255+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L582
	ldr	r3, .L1255+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L582
	ldr	r3, .L1255+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L582
	ldr	r3, .L1255+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L582:
	ldr	r3, .L1255+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1255+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L583
	ldr	r3, .L1255+76
	ldr	r2, [r3]
	ldr	r3, .L1255+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L583
	ldr	r3, .L1255+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L584
	ldr	r3, .L1255+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L584
	ldr	r3, .L1255+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L584
	ldr	r3, .L1255
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L585
.L584:
	ldr	r3, .L1255+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L583
	ldr	r3, .L1255+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L583
	ldr	r3, .L1255+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L583
	ldr	r3, .L1255
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L583
.L585:
	ldr	r3, .L1255+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L1255+36
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L586
.L583:
	ldr	r3, .L1255+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L586
	ldr	r3, .L1255+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L586
	ldr	r3, .L1255+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L586
	ldr	r3, .L1255+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L586
	ldr	r3, .L1255+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L586
	ldr	r3, .L1255+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L586:
	ldr	r3, .L1255+76
	ldr	r3, [r3]
	cmp	r3, #11
	bne	.L587
	ldr	r3, .L1255+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L587
	ldr	r3, .L1255+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L587
	ldr	r3, .L1255+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L587
	ldr	r3, .L1255
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L587
	ldr	r3, .L1255+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L587
	ldr	r3, .L1255+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L587
	ldr	r3, .L1255+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L587
	ldr	r3, .L1255+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L587
	ldr	r3, .L1255+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L587
	ldr	r3, .L1255+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L587:
	ldr	r3, .L1255+76
	ldr	r3, [r3]
	cmp	r3, #11
	bne	.L588
	ldr	r3, .L1255+32
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1255+60
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L589
	mov	r3, #0
	mov	r4, r3
.L589:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L590
.L588:
	ldr	r3, .L1255+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L590
	ldr	r3, .L1255+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L590
	ldr	r3, .L1255+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L590
	ldr	r3, .L1255
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L590
	ldr	r3, .L1255+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L590
	ldr	r3, .L1255+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L590
	ldr	r3, .L1255+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L590
	ldr	r3, .L1255+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L590
	ldr	r3, .L1255+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L590
	ldr	r3, .L1255+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L590:
	ldr	r3, .L1255+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1255+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L591
	ldr	r3, .L1255+76
	ldr	r2, [r3]
	ldr	r3, .L1255+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L591
	ldr	r3, .L1255+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L592
	ldr	r3, .L1255+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L592
	ldr	r3, .L1255+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L592
	ldr	r3, .L1255
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L593
.L592:
	ldr	r3, .L1255+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L591
	ldr	r3, .L1255+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L591
	ldr	r3, .L1255+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L591
	ldr	r3, .L1255
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L593
.L591:
	ldr	r3, .L1255+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L593
	ldr	r3, .L1255+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L593
	ldr	r3, .L1255+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L593
	ldr	r3, .L1255+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L593
	ldr	r3, .L1255+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L593
	ldr	r3, .L1255+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L593:
	ldr	r3, .L1255+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L594
	ldr	r3, .L1255+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L1255+36
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L595
.L594:
	ldr	r3, .L1255+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L595
	ldr	r3, .L1255+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L595
	ldr	r3, .L1255+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L595
	ldr	r3, .L1255+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L595
	ldr	r3, .L1255+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L595
	ldr	r3, .L1255
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L595
	ldr	r3, .L1255+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L595
	ldr	r3, .L1255+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L595
	ldr	r3, .L1255+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L595
	ldr	r3, .L1255+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L595:
	ldr	r3, .L1255+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L596
	ldr	r3, .L1255+36
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L597
.L596:
	ldr	r3, .L1255+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L597
	ldr	r3, .L1255+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L597
	ldr	r3, .L1255+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L597
	ldr	r3, .L1255+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L597
	ldr	r3, .L1255+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L597
	ldr	r3, .L1255+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L597
	ldr	r3, .L1255+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L597
	ldr	r3, .L1255+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L597
	ldr	r3, .L1255+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L597
	ldr	r3, .L1255
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L597:
	ldr	r3, .L1255+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L598
	ldr	r3, .L1255+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L598
	ldr	r3, .L1255+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L598
	ldr	r3, .L1255+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L598
	ldr	r3, .L1255
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L598
	ldr	r3, .L1255+76
	ldr	r2, [r3]
	ldr	r3, .L1255+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L598
	ldr	r3, .L1255+36
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L599
.L598:
	ldr	r3, .L1255+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L599
	ldr	r3, .L1255+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L599
	ldr	r3, .L1255+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L599
	ldr	r3, .L1255+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L599
	ldr	r3, .L1255+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L599
	ldr	r3, .L1255+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L599:
	ldr	r3, .L1255+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1255+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L600
	ldr	r3, .L1255+76
	ldr	r2, [r3]
	ldr	r3, .L1255+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L600
	ldr	r3, .L1255+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L1255+36
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L600
	ldr	r3, .L1255+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L602
	ldr	r3, .L1255+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L602
	ldr	r3, .L1255+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	b	.L1256
.L1257:
	.align	2
.L1255:
	.word	_x_p10_l1
	.word	_x_p10_l3
	.word	_x_p10_l2
	.word	_x_p10_l0
	.word	_x_p10_l3
	.word	_x_p10_l2
	.word	_x_p10_l0
	.word	_x_p10_l1
	.word	p10_c
	.word	_x_p10_c
	.word	p10_l3
	.word	p10_l2
	.word	p10_l0
	.word	p10_l1
	.word	p10_evt
	.word	1098907648
	.word	p9_evt
	.word	v2
	.word	_x_v2
	.word	v1
	.word	_x_v1
	.word	_x_p9_l3
	.word	_x_p9_l2
	.word	_x_p9_l0
	.word	_x_p9_l1
	.word	p9_c
	.word	_x_p9_c
	.word	p9_l3
	.word	p9_l2
	.word	p9_l1
	.word	p9_l0
	.word	delta
.L1256:
	cmp	r3, #0
	bne	.L602
	ldr	r3, .L1255+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L603
.L602:
	ldr	r3, .L1255+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L600
	ldr	r3, .L1255+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L600
	ldr	r3, .L1255+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L600
	ldr	r3, .L1255+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L603
.L600:
	ldr	r3, .L1255+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L603
	ldr	r3, .L1255+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L603
	ldr	r3, .L1255+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L603
	ldr	r3, .L1255+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L603
	ldr	r3, .L1255+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L603
	ldr	r3, .L1255+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L603:
	ldr	r3, .L1255+76
	ldr	r3, [r3]
	cmp	r3, #11
	bne	.L604
	ldr	r3, .L1255+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L604
	ldr	r3, .L1255+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L604
	ldr	r3, .L1255+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L604
	ldr	r3, .L1255+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L604
	ldr	r3, .L1255+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L604
	ldr	r3, .L1255+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L604
	ldr	r3, .L1255+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L604
	ldr	r3, .L1255+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L604
	ldr	r3, .L1255+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L604
	ldr	r3, .L1255+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L604:
	ldr	r3, .L1255+76
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L605
	ldr	r3, .L1255+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L605
	ldr	r3, .L1255+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L605
	ldr	r3, .L1255+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L605
	ldr	r3, .L1255+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L605
	ldr	r3, .L1255+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L605
	ldr	r3, .L1255+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L605
	ldr	r3, .L1255+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L605
	ldr	r3, .L1255+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L605
	ldr	r3, .L1255+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L605
	ldr	r3, .L1255+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L605:
	ldr	r3, .L1255+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1255+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L606
	ldr	r3, .L1255+76
	ldr	r2, [r3]
	ldr	r3, .L1255+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L606
	ldr	r3, .L1255+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L606
	ldr	r3, .L1255+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L606
	ldr	r3, .L1255+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L606
	ldr	r3, .L1255+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L606
	ldr	r3, .L1255+36
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L607
.L606:
	ldr	r3, .L1255+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L607
	ldr	r3, .L1255+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L607
	ldr	r3, .L1255+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L607
	ldr	r3, .L1255+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L607
	ldr	r3, .L1255+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L607
	ldr	r3, .L1255+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L607:
	ldr	r3, .L1255+76
	ldr	r2, [r3]
	ldr	r3, .L1255+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L608
	ldr	r3, .L1255+36
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L608
	ldr	r3, .L1255+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L608
	ldr	r3, .L1255+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L608
	ldr	r3, .L1255+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L608
	ldr	r3, .L1255+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L608
	ldr	r3, .L1255+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L610
.L608:
	ldr	r3, .L1255+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L610
	ldr	r3, .L1255+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L610
	ldr	r3, .L1255+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L610
	ldr	r3, .L1255+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L610
	ldr	r3, .L1255+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L610
	ldr	r3, .L1255+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L610:
	ldr	r3, .L1255+80
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L611
	ldr	r3, .L1255+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L611
	ldr	r3, .L1255+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L611
	ldr	r3, .L1255+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L611
	ldr	r3, .L1255+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L611
	ldr	r3, .L1255+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1255+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L611
	ldr	r3, .L1255+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L1255+36
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L612
.L611:
	ldr	r3, .L1255+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L612
	ldr	r3, .L1255+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L612
	ldr	r3, .L1255+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L612
	ldr	r3, .L1255+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L612
	ldr	r3, .L1255+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L612
	ldr	r3, .L1255+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L612:
	ldr	r3, .L1255+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L613
	ldr	r3, .L1255+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L613
	ldr	r3, .L1255+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L613
	ldr	r3, .L1255+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L614
.L613:
	ldr	r3, .L1255+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L615
	ldr	r3, .L1255+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L615
	ldr	r3, .L1255+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L615
	ldr	r3, .L1255+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L614
.L615:
	ldr	r3, .L1255+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L616
	ldr	r3, .L1255+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L616
	ldr	r3, .L1255+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L616
	ldr	r3, .L1255+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L614
.L616:
	ldr	r3, .L1255+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L617
	ldr	r3, .L1255+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L617
	ldr	r3, .L1255+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L617
	ldr	r3, .L1255+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L614
.L617:
	ldr	r3, .L1255+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L618
	ldr	r3, .L1255+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L618
	ldr	r3, .L1255+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L618
	ldr	r3, .L1255+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L614
.L618:
	ldr	r3, .L1255+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L619
	ldr	r3, .L1255+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L619
	ldr	r3, .L1255+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L619
	ldr	r3, .L1255+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L614
.L619:
	ldr	r3, .L1255+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L620
	ldr	r3, .L1255+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L620
	ldr	r3, .L1255+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L620
	ldr	r3, .L1255+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L614
.L620:
	ldr	r3, .L1255+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L621
	ldr	r3, .L1255+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L621
	ldr	r3, .L1255+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L621
	ldr	r3, .L1255+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L614
.L621:
	ldr	r3, .L1255+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1255+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1255+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1255+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L614:
	ldr	r3, .L1255+104
	ldr	r3, [r3]	@ float
	ldr	r1, .L1255+60
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L622
	ldr	r3, .L1255+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L623
	ldr	r3, .L1255+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L623
	ldr	r3, .L1255+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L623
	ldr	r3, .L1255+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L623:
	ldr	r3, .L1255+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L624
	ldr	r3, .L1255+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L624
	ldr	r3, .L1255+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L624
	ldr	r3, .L1255+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L624:
	ldr	r3, .L1255+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L625
	ldr	r3, .L1255+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L625
	ldr	r3, .L1255+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L625
	ldr	r3, .L1255+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L625:
	ldr	r3, .L1255+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L622
	ldr	r3, .L1255+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L622
	ldr	r3, .L1255+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L622
	ldr	r3, .L1255+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L622:
	ldr	r3, .L1255+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L626
	ldr	r3, .L1255+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1255+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1255+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1255+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1255+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1255+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1255+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1255+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1255+124
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1255+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1255+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L626:
	ldr	r3, .L1255+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L628
	ldr	r3, .L1255+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1255+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1255+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1255+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1255+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1255+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1255+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1255+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1255+124
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1255+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1255+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L628:
	ldr	r3, .L1255+76
	ldr	r2, [r3]
	ldr	r3, .L1255+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L630
	ldr	r3, .L1255+76
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L630
	ldr	r3, .L1255+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L630
	ldr	r3, .L1255+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L630
	ldr	r3, .L1255+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L630
	ldr	r3, .L1255+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L630
	ldr	r3, .L1255+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1255+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L630
	ldr	r3, .L1255+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L631
.L630:
	ldr	r3, .L1255+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L631
	ldr	r3, .L1255+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L631
	ldr	r3, .L1255+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L631
	ldr	r3, .L1255+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L631
	ldr	r3, .L1255+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L631
	ldr	r3, .L1255+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L631:
	ldr	r3, .L1255+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1255+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L632
	ldr	r3, .L1255+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L632
	ldr	r3, .L1255+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L632
	ldr	r3, .L1255+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L632
	ldr	r3, .L1255+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L632
	ldr	r3, .L1255+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L632
	ldr	r3, .L1255+80
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L634
.L632:
	ldr	r3, .L1255+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L634
	ldr	r3, .L1255+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L634
	ldr	r3, .L1255+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L634
	ldr	r3, .L1255+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L634
	ldr	r3, .L1255+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L634
	ldr	r3, .L1255+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L634:
	ldr	r3, .L1255+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1255+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L635
	ldr	r3, .L1255+76
	ldr	r2, [r3]
	ldr	r3, .L1255+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L635
	ldr	r3, .L1255+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L636
	ldr	r3, .L1255+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L636
	ldr	r3, .L1255+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L636
	ldr	r3, .L1255+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L637
.L636:
	ldr	r3, .L1255+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L635
	ldr	r3, .L1255+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L635
	ldr	r3, .L1255+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L635
	ldr	r3, .L1255+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L635
.L637:
	ldr	r3, .L1255+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L1255+104
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L638
.L635:
	ldr	r3, .L1255+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L638
	ldr	r3, .L1255+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L638
	ldr	r3, .L1255+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L638
	ldr	r3, .L1255+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L638
	ldr	r3, .L1255+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L638
	ldr	r3, .L1258
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L638:
	ldr	r3, .L1258+4
	ldr	r3, [r3]
	cmp	r3, #10
	bne	.L639
	ldr	r3, .L1258+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L639
	ldr	r3, .L1258+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L639
	ldr	r3, .L1258+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L639
	ldr	r3, .L1258+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L639
	ldr	r3, .L1258+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L639
	ldr	r3, .L1258+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L639
	ldr	r3, .L1258+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L639
	ldr	r3, .L1258+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L639
	ldr	r3, .L1258+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L639
	ldr	r3, .L1258
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L639:
	ldr	r3, .L1258+4
	ldr	r3, [r3]
	cmp	r3, #10
	bne	.L640
	ldr	r3, .L1258+40
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1258+48
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L641
	mov	r3, #0
	mov	r4, r3
.L641:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L642
.L640:
	ldr	r3, .L1258+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L642
	ldr	r3, .L1258+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L642
	ldr	r3, .L1258+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L642
	ldr	r3, .L1258+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L642
	ldr	r3, .L1258+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L642
	ldr	r3, .L1258+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L642
	ldr	r3, .L1258+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L642
	ldr	r3, .L1258+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L642
	ldr	r3, .L1258+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L642
	ldr	r3, .L1258
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L642:
	ldr	r3, .L1258+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1258+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L643
	ldr	r3, .L1258+4
	ldr	r2, [r3]
	ldr	r3, .L1258+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L643
	ldr	r3, .L1258+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L644
	ldr	r3, .L1258+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L644
	ldr	r3, .L1258+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L644
	ldr	r3, .L1258+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L645
.L644:
	ldr	r3, .L1258+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L643
	ldr	r3, .L1258+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L643
	ldr	r3, .L1258+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L643
	ldr	r3, .L1258+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L645
.L643:
	ldr	r3, .L1258+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L645
	ldr	r3, .L1258+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L645
	ldr	r3, .L1258+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L645
	ldr	r3, .L1258+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L645
	ldr	r3, .L1258+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L645
	ldr	r3, .L1258
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L645:
	ldr	r3, .L1258+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L646
	ldr	r3, .L1258+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L1258+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L647
.L646:
	ldr	r3, .L1258+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L647
	ldr	r3, .L1258
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L647
	ldr	r3, .L1258+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L647
	ldr	r3, .L1258+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L647
	ldr	r3, .L1258+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L647
	ldr	r3, .L1258+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L647
	ldr	r3, .L1258+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L647
	ldr	r3, .L1258+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L647
	ldr	r3, .L1258+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L647
	ldr	r3, .L1258+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L647:
	ldr	r3, .L1258+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L648
	ldr	r3, .L1258+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L649
.L648:
	ldr	r3, .L1258+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L649
	ldr	r3, .L1258
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L649
	ldr	r3, .L1258+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L649
	ldr	r3, .L1258+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L649
	ldr	r3, .L1258+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L649
	ldr	r3, .L1258+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L649
	ldr	r3, .L1258+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L649
	ldr	r3, .L1258+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L649
	ldr	r3, .L1258+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L649
	ldr	r3, .L1258+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L649:
	ldr	r3, .L1258+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L650
	ldr	r3, .L1258+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L650
	ldr	r3, .L1258+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L650
	ldr	r3, .L1258+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L650
	ldr	r3, .L1258+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L650
	ldr	r3, .L1258+4
	ldr	r2, [r3]
	ldr	r3, .L1258+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L650
	ldr	r3, .L1258+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L651
.L650:
	ldr	r3, .L1258+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L651
	ldr	r3, .L1258+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L651
	ldr	r3, .L1258+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L651
	ldr	r3, .L1258+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L651
	ldr	r3, .L1258+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L651
	ldr	r3, .L1258
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L651:
	ldr	r3, .L1258+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1258+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L652
	ldr	r3, .L1258+4
	ldr	r2, [r3]
	ldr	r3, .L1258+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L652
	ldr	r3, .L1258+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L1258+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L652
	ldr	r3, .L1258+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L654
	ldr	r3, .L1258+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L654
	ldr	r3, .L1258+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L654
	ldr	r3, .L1258+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L655
.L654:
	ldr	r3, .L1258+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L652
	ldr	r3, .L1258+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L652
	ldr	r3, .L1258+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L652
	ldr	r3, .L1258+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L655
.L652:
	ldr	r3, .L1258+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L655
	ldr	r3, .L1258+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L655
	ldr	r3, .L1258+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L655
	ldr	r3, .L1258+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L655
	ldr	r3, .L1258+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L655
	ldr	r3, .L1258
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L655:
	ldr	r3, .L1258+4
	ldr	r3, [r3]
	cmp	r3, #10
	bne	.L656
	ldr	r3, .L1258+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L656
	ldr	r3, .L1258
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L656
	ldr	r3, .L1258+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L656
	ldr	r3, .L1258+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L656
	ldr	r3, .L1258+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L656
	ldr	r3, .L1258+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L656
	ldr	r3, .L1258+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L656
	ldr	r3, .L1258+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L656
	ldr	r3, .L1258+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L656
	ldr	r3, .L1258+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L656:
	ldr	r3, .L1258+4
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L657
	ldr	r3, .L1258+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L657
	ldr	r3, .L1258
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L657
	ldr	r3, .L1258+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L657
	ldr	r3, .L1258+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L657
	ldr	r3, .L1258+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L657
	ldr	r3, .L1258+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L657
	ldr	r3, .L1258+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L657
	ldr	r3, .L1258+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L657
	ldr	r3, .L1258+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L657
	ldr	r3, .L1258+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L657:
	ldr	r3, .L1258+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1258+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L658
	ldr	r3, .L1258+4
	ldr	r2, [r3]
	ldr	r3, .L1258+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L658
	ldr	r3, .L1258+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L658
	ldr	r3, .L1258+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L658
	ldr	r3, .L1258+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L658
	ldr	r3, .L1258+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L658
	ldr	r3, .L1258+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L659
.L658:
	ldr	r3, .L1258+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L659
	ldr	r3, .L1258+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L659
	ldr	r3, .L1258+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L659
	ldr	r3, .L1258+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L659
	ldr	r3, .L1258+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L659
	ldr	r3, .L1258
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L659:
	ldr	r3, .L1258+4
	ldr	r2, [r3]
	ldr	r3, .L1258+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L660
	ldr	r3, .L1258+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L660
	ldr	r3, .L1258+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L660
	ldr	r3, .L1258+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L660
	ldr	r3, .L1258+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L660
	ldr	r3, .L1258+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L660
	ldr	r3, .L1258+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L662
.L660:
	ldr	r3, .L1258+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L662
	ldr	r3, .L1258+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L662
	ldr	r3, .L1258+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L662
	ldr	r3, .L1258+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L662
	ldr	r3, .L1258+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L662
	ldr	r3, .L1258
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L662:
	ldr	r3, .L1258+92
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L663
	ldr	r3, .L1258+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L663
	ldr	r3, .L1258+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L663
	ldr	r3, .L1258+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L663
	ldr	r3, .L1258+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L663
	ldr	r3, .L1258+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1258+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L663
	ldr	r3, .L1258+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L1258+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L664
.L663:
	ldr	r3, .L1258+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L664
	ldr	r3, .L1258+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L664
	ldr	r3, .L1258+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L664
	ldr	r3, .L1258+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L664
	ldr	r3, .L1258+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L664
	ldr	r3, .L1258
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L664:
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L665
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L665
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L665
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L666
.L665:
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L667
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L667
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L667
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L666
.L667:
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L668
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L668
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L668
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L666
.L668:
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L669
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L669
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L669
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L666
.L669:
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L670
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L670
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L670
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L666
.L670:
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L671
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L671
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L671
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L666
.L671:
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L672
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L672
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L672
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L666
.L672:
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L673
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L673
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L673
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L666
.L673:
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L666:
	ldr	r3, .L1258+112
	ldr	r3, [r3]	@ float
	ldr	r1, .L1258+48
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L674
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L675
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L675
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L675
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L675:
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L676
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L676
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L676
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L676:
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L677
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L677
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L677
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L677:
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L674
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L674
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L674
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L674:
	ldr	r3, .L1258+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L678
	ldr	r3, .L1258+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1258+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	b	.L1259
.L1260:
	.align	2
.L1258:
	.word	p9_evt
	.word	v1
	.word	_x_p9_l3
	.word	_x_p9_l2
	.word	_x_p9_l0
	.word	_x_p9_l1
	.word	p9_l3
	.word	p9_l2
	.word	p9_l1
	.word	p9_l0
	.word	p9_c
	.word	_x_p9_c
	.word	1098907648
	.word	p8_c
	.word	delta
	.word	p8_evt
	.word	p8_l3
	.word	p8_l2
	.word	p8_l0
	.word	p8_l1
	.word	v2
	.word	_x_v2
	.word	v1
	.word	_x_v1
	.word	_x_p8_l3
	.word	_x_p8_l2
	.word	_x_p8_l0
	.word	_x_p8_l1
	.word	_x_p8_c
.L1259:
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1258+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1258+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1258+56
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1258+52
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1258+112
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L678:
	ldr	r3, .L1258+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L680
	ldr	r3, .L1258+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1258+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1258+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1258+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1258+56
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1258+52
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1258+112
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L680:
	ldr	r3, .L1258+88
	ldr	r2, [r3]
	ldr	r3, .L1258+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L682
	ldr	r3, .L1258+88
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L682
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L682
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L682
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L682
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L682
	ldr	r3, .L1258+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1258+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L682
	ldr	r3, .L1258+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L683
.L682:
	ldr	r3, .L1258+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L683
	ldr	r3, .L1258+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L683
	ldr	r3, .L1258+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L683
	ldr	r3, .L1258+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L683
	ldr	r3, .L1258+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L683
	ldr	r3, .L1258+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L683:
	ldr	r3, .L1258+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1258+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L684
	ldr	r3, .L1258+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L684
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L684
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L684
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L684
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L684
	ldr	r3, .L1258+92
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L686
.L684:
	ldr	r3, .L1258+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L686
	ldr	r3, .L1258+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L686
	ldr	r3, .L1258+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L686
	ldr	r3, .L1258+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L686
	ldr	r3, .L1258+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L686
	ldr	r3, .L1258+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L686:
	ldr	r3, .L1258+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1258+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L687
	ldr	r3, .L1258+88
	ldr	r2, [r3]
	ldr	r3, .L1258+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L687
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L688
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L688
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L688
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L689
.L688:
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L687
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L687
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L687
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L687
.L689:
	ldr	r3, .L1258+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L1258+112
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L690
.L687:
	ldr	r3, .L1258+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L690
	ldr	r3, .L1258+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L690
	ldr	r3, .L1258+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L690
	ldr	r3, .L1258+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L690
	ldr	r3, .L1258+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L690
	ldr	r3, .L1258+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L690:
	ldr	r3, .L1258+88
	ldr	r3, [r3]
	cmp	r3, #9
	bne	.L691
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L691
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L691
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L691
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L691
	ldr	r3, .L1258+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L691
	ldr	r3, .L1258+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L691
	ldr	r3, .L1258+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L691
	ldr	r3, .L1258+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L691
	ldr	r3, .L1258+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L691
	ldr	r3, .L1258+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L691:
	ldr	r3, .L1258+88
	ldr	r3, [r3]
	cmp	r3, #9
	bne	.L692
	ldr	r3, .L1258+52
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1258+48
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L693
	mov	r3, #0
	mov	r4, r3
.L693:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L694
.L692:
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L694
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L694
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L694
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L694
	ldr	r3, .L1258+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L694
	ldr	r3, .L1258+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L694
	ldr	r3, .L1258+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L694
	ldr	r3, .L1258+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L694
	ldr	r3, .L1258+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L694
	ldr	r3, .L1258+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L694:
	ldr	r3, .L1258+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1258+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L695
	ldr	r3, .L1258+88
	ldr	r2, [r3]
	ldr	r3, .L1258+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L695
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L696
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L696
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L696
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L697
.L696:
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L695
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L695
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L695
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L697
.L695:
	ldr	r3, .L1258+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L697
	ldr	r3, .L1258+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L697
	ldr	r3, .L1258+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L697
	ldr	r3, .L1258+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L697
	ldr	r3, .L1258+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L697
	ldr	r3, .L1258+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L697:
	ldr	r3, .L1258+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L698
	ldr	r3, .L1258+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L1258+112
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L699
.L698:
	ldr	r3, .L1258+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L699
	ldr	r3, .L1258+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L699
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L699
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L699
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L699
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L699
	ldr	r3, .L1258+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L699
	ldr	r3, .L1258+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L699
	ldr	r3, .L1258+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L699
	ldr	r3, .L1258+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L699:
	ldr	r3, .L1258+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L700
	ldr	r3, .L1258+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L701
.L700:
	ldr	r3, .L1258+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L701
	ldr	r3, .L1258+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L701
	ldr	r3, .L1258+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L701
	ldr	r3, .L1258+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L701
	ldr	r3, .L1258+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L701
	ldr	r3, .L1258+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L701
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L701
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L701
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L701
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L701:
	ldr	r3, .L1258+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L702
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L702
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L702
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L702
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L702
	ldr	r3, .L1258+88
	ldr	r2, [r3]
	ldr	r3, .L1258+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L702
	ldr	r3, .L1258+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L703
.L702:
	ldr	r3, .L1258+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L703
	ldr	r3, .L1258+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L703
	ldr	r3, .L1258+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L703
	ldr	r3, .L1258+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L703
	ldr	r3, .L1258+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L703
	ldr	r3, .L1258+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L703:
	ldr	r3, .L1258+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1258+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L704
	ldr	r3, .L1258+88
	ldr	r2, [r3]
	ldr	r3, .L1258+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L704
	ldr	r3, .L1258+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L1258+112
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L704
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L706
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L706
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L706
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L707
.L706:
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L704
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L704
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L704
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L707
.L704:
	ldr	r3, .L1258+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L707
	ldr	r3, .L1258+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L707
	ldr	r3, .L1258+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L707
	ldr	r3, .L1258+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L707
	ldr	r3, .L1258+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L707
	ldr	r3, .L1258+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L707:
	ldr	r3, .L1258+88
	ldr	r3, [r3]
	cmp	r3, #9
	bne	.L708
	ldr	r3, .L1258+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L708
	ldr	r3, .L1258+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L708
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L708
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L708
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L708
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L708
	ldr	r3, .L1258+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L708
	ldr	r3, .L1258+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L708
	ldr	r3, .L1258+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L708
	ldr	r3, .L1258+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L708:
	ldr	r3, .L1258+88
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L709
	ldr	r3, .L1258+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L709
	ldr	r3, .L1258+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L709
	ldr	r3, .L1258+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L709
	ldr	r3, .L1258+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L709
	ldr	r3, .L1258+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L709
	ldr	r3, .L1258+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L709
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L709
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L709
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L709
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L709:
	ldr	r3, .L1258+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1258+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L710
	ldr	r3, .L1258+88
	ldr	r2, [r3]
	ldr	r3, .L1258+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L710
	ldr	r3, .L1258+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L710
	ldr	r3, .L1258+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L710
	ldr	r3, .L1258+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L710
	ldr	r3, .L1258+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L710
	ldr	r3, .L1258+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L711
.L710:
	ldr	r3, .L1261
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L711
	ldr	r3, .L1261+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L711
	ldr	r3, .L1261+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L711
	ldr	r3, .L1261+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L711
	ldr	r3, .L1261+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L711
	ldr	r3, .L1261+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L711:
	ldr	r3, .L1261+24
	ldr	r2, [r3]
	ldr	r3, .L1261+52
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L712
	ldr	r3, .L1261+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L712
	ldr	r3, .L1261+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L712
	ldr	r3, .L1261+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L712
	ldr	r3, .L1261+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L712
	ldr	r3, .L1261+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L712
	ldr	r3, .L1261+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L714
.L712:
	ldr	r3, .L1261
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L714
	ldr	r3, .L1261+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L714
	ldr	r3, .L1261+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L714
	ldr	r3, .L1261+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L714
	ldr	r3, .L1261+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L714
	ldr	r3, .L1261+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L714:
	ldr	r3, .L1261+52
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L715
	ldr	r3, .L1261+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L715
	ldr	r3, .L1261+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L715
	ldr	r3, .L1261+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L715
	ldr	r3, .L1261+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L715
	ldr	r3, .L1261+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1261+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L715
	ldr	r3, .L1261+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L1261+28
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L716
.L715:
	ldr	r3, .L1261
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L716
	ldr	r3, .L1261+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L716
	ldr	r3, .L1261+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L716
	ldr	r3, .L1261+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L716
	ldr	r3, .L1261+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L716
	ldr	r3, .L1261+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L716:
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L717
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L717
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L717
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L718
.L717:
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L719
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L719
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L719
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L718
.L719:
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L720
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L720
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L720
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L718
.L720:
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L721
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L721
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L721
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L718
.L721:
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L722
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L722
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L722
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L718
.L722:
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L723
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L723
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L723
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L718
.L723:
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L724
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L724
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L724
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L718
.L724:
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L725
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L725
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L725
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L718
.L725:
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L718:
	ldr	r3, .L1261+84
	ldr	r3, [r3]	@ float
	ldr	r1, .L1261+108
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L726
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L727
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L727
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L727
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L727:
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L728
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L728
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L728
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L728:
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L729
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L729
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L729
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L729:
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L726
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L726
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L726
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L726:
	ldr	r3, .L1261+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L730
	ldr	r3, .L1261+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1261+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1261+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1261+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1261+16
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1261+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1261+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L730:
	ldr	r3, .L1261+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L732
	ldr	r3, .L1261+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1261+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1261+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1261+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1261+16
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1261+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1261+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L732:
	ldr	r3, .L1261+24
	ldr	r2, [r3]
	ldr	r3, .L1261+52
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L734
	ldr	r3, .L1261+24
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L734
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L734
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L734
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L734
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L734
	ldr	r3, .L1261+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1261+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L734
	ldr	r3, .L1261+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L735
.L734:
	ldr	r3, .L1261+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L735
	ldr	r3, .L1261+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L735
	ldr	r3, .L1261+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L735
	ldr	r3, .L1261+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L735
	ldr	r3, .L1261+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L735
	ldr	r3, .L1261+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L735:
	ldr	r3, .L1261+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1261+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L736
	ldr	r3, .L1261+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L736
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L736
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L736
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L736
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L736
	ldr	r3, .L1261+52
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L738
.L736:
	ldr	r3, .L1261+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L738
	ldr	r3, .L1261+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L738
	ldr	r3, .L1261+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L738
	ldr	r3, .L1261+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L738
	ldr	r3, .L1261+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L738
	ldr	r3, .L1261+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L738:
	ldr	r3, .L1261+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1261+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L739
	ldr	r3, .L1261+24
	ldr	r2, [r3]
	ldr	r3, .L1261+52
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L739
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L740
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L740
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L740
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L741
.L740:
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L739
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L739
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L739
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L739
.L741:
	ldr	r3, .L1261+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1261+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L742
.L739:
	ldr	r3, .L1261+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L742
	ldr	r3, .L1261+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L742
	ldr	r3, .L1261+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L742
	ldr	r3, .L1261+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L742
	ldr	r3, .L1261+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L742
	ldr	r3, .L1261+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L742:
	ldr	r3, .L1261+24
	ldr	r3, [r3]
	cmp	r3, #8
	bne	.L743
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L743
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L743
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L743
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L743
	ldr	r3, .L1261+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L743
	ldr	r3, .L1261+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L743
	ldr	r3, .L1261+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L743
	ldr	r3, .L1261+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L743
	ldr	r3, .L1261+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L743
	ldr	r3, .L1261+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L743:
	ldr	r3, .L1261+24
	ldr	r3, [r3]
	cmp	r3, #8
	bne	.L744
	ldr	r3, .L1261+80
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1261+108
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L745
	mov	r3, #0
	mov	r4, r3
.L745:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L746
.L744:
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L746
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L746
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L746
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L746
	ldr	r3, .L1261+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L746
	ldr	r3, .L1261+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L746
	ldr	r3, .L1261+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L746
	ldr	r3, .L1261+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L746
	ldr	r3, .L1261+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L746
	ldr	r3, .L1261+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L746:
	ldr	r3, .L1261+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1261+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L747
	ldr	r3, .L1261+24
	ldr	r2, [r3]
	ldr	r3, .L1261+52
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L747
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L748
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L748
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L748
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L749
.L748:
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L747
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L747
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L747
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L749
.L747:
	ldr	r3, .L1261+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L749
	ldr	r3, .L1261+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L749
	ldr	r3, .L1261+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L749
	ldr	r3, .L1261+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L749
	ldr	r3, .L1261+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	b	.L1262
.L1263:
	.align	2
.L1261:
	.word	p8_l3
	.word	p8_l2
	.word	p8_l1
	.word	p8_l0
	.word	delta
	.word	p8_evt
	.word	v1
	.word	_x_p8_c
	.word	_x_p8_l3
	.word	_x_p8_l2
	.word	_x_p8_l0
	.word	_x_p8_l1
	.word	p8_c
	.word	_x_v1
	.word	_x_p7_l3
	.word	_x_p7_l2
	.word	_x_p7_l0
	.word	_x_p7_l1
	.word	v2
	.word	_x_v2
	.word	p7_c
	.word	_x_p7_c
	.word	p7_l3
	.word	p7_l2
	.word	p7_l0
	.word	p7_l1
	.word	p7_evt
	.word	1098907648
	.word	p6_evt
	.word	p6_l0
	.word	_x_p6_l0
	.word	p6_l1
	.word	_x_p6_l1
	.word	p6_l2
	.word	_x_p6_l2
	.word	p6_l3
	.word	delta
	.word	p6_c
	.word	_x_p6_c
	.word	_x_v1
	.word	v1
	.word	_x_p6_l3
.L1262:
	cmp	r3, #0
	beq	.L749
	ldr	r3, .L1261+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L749:
	ldr	r3, .L1261+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L750
	ldr	r3, .L1261+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1261+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L751
.L750:
	ldr	r3, .L1261+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L751
	ldr	r3, .L1261+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L751
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L751
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L751
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L751
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L751
	ldr	r3, .L1261+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L751
	ldr	r3, .L1261+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L751
	ldr	r3, .L1261+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L751
	ldr	r3, .L1261+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L751:
	ldr	r3, .L1261+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L752
	ldr	r3, .L1261+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L753
.L752:
	ldr	r3, .L1261+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L753
	ldr	r3, .L1261+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L753
	ldr	r3, .L1261+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L753
	ldr	r3, .L1261+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L753
	ldr	r3, .L1261+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L753
	ldr	r3, .L1261+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L753
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L753
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L753
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L753
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L753:
	ldr	r3, .L1261+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L754
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L754
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L754
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L754
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L754
	ldr	r3, .L1261+160
	ldr	r2, [r3]
	ldr	r3, .L1261+52
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L754
	ldr	r3, .L1261+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L755
.L754:
	ldr	r3, .L1261+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L755
	ldr	r3, .L1261+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L755
	ldr	r3, .L1261+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L755
	ldr	r3, .L1261+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L755
	ldr	r3, .L1261+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L755
	ldr	r3, .L1261+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L755:
	ldr	r3, .L1261+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1261+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L756
	ldr	r3, .L1261+160
	ldr	r2, [r3]
	ldr	r3, .L1261+52
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L756
	ldr	r3, .L1261+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1261+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L756
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L758
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L758
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L758
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L759
.L758:
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L756
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L756
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L756
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L759
.L756:
	ldr	r3, .L1261+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L759
	ldr	r3, .L1261+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L759
	ldr	r3, .L1261+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L759
	ldr	r3, .L1261+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L759
	ldr	r3, .L1261+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L759
	ldr	r3, .L1261+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L759:
	ldr	r3, .L1261+160
	ldr	r3, [r3]
	cmp	r3, #8
	bne	.L760
	ldr	r3, .L1261+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L760
	ldr	r3, .L1261+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L760
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L760
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L760
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L760
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L760
	ldr	r3, .L1261+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L760
	ldr	r3, .L1261+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L760
	ldr	r3, .L1261+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L760
	ldr	r3, .L1261+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L760:
	ldr	r3, .L1261+160
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L761
	ldr	r3, .L1261+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L761
	ldr	r3, .L1261+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L761
	ldr	r3, .L1261+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L761
	ldr	r3, .L1261+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L761
	ldr	r3, .L1261+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L761
	ldr	r3, .L1261+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L761
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L761
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L761
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L761
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L761:
	ldr	r3, .L1261+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1261+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L762
	ldr	r3, .L1261+160
	ldr	r2, [r3]
	ldr	r3, .L1261+52
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L762
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L762
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L762
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L762
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L762
	ldr	r3, .L1261+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L763
.L762:
	ldr	r3, .L1261+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L763
	ldr	r3, .L1261+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L763
	ldr	r3, .L1261+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L763
	ldr	r3, .L1261+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L763
	ldr	r3, .L1261+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L763
	ldr	r3, .L1261+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L763:
	ldr	r3, .L1261+160
	ldr	r2, [r3]
	ldr	r3, .L1261+52
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L764
	ldr	r3, .L1261+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L764
	ldr	r3, .L1261+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L764
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L764
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L764
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L764
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L766
.L764:
	ldr	r3, .L1261+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L766
	ldr	r3, .L1261+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L766
	ldr	r3, .L1261+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L766
	ldr	r3, .L1261+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L766
	ldr	r3, .L1261+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L766
	ldr	r3, .L1261+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L766:
	ldr	r3, .L1261+52
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L767
	ldr	r3, .L1261+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L767
	ldr	r3, .L1261+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L767
	ldr	r3, .L1261+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L767
	ldr	r3, .L1261+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L767
	ldr	r3, .L1261+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1261+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L767
	ldr	r3, .L1261+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1261+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L768
.L767:
	ldr	r3, .L1261+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L768
	ldr	r3, .L1261+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L768
	ldr	r3, .L1261+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L768
	ldr	r3, .L1261+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L768
	ldr	r3, .L1261+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L768
	ldr	r3, .L1261+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L768:
	ldr	r3, .L1261+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L769
	ldr	r3, .L1261+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L769
	ldr	r3, .L1261+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L769
	ldr	r3, .L1261+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L770
.L769:
	ldr	r3, .L1261+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L771
	ldr	r3, .L1261+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L771
	ldr	r3, .L1261+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L771
	ldr	r3, .L1261+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L770
.L771:
	ldr	r3, .L1261+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L772
	ldr	r3, .L1261+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L772
	ldr	r3, .L1261+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L772
	ldr	r3, .L1261+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L770
.L772:
	ldr	r3, .L1261+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L773
	ldr	r3, .L1261+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L773
	ldr	r3, .L1261+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L773
	ldr	r3, .L1261+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L770
.L773:
	ldr	r3, .L1261+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L774
	ldr	r3, .L1261+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L774
	ldr	r3, .L1261+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L774
	ldr	r3, .L1261+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L770
.L774:
	ldr	r3, .L1261+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L775
	ldr	r3, .L1261+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L775
	ldr	r3, .L1261+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L775
	ldr	r3, .L1261+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L770
.L775:
	ldr	r3, .L1261+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L776
	ldr	r3, .L1261+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L776
	ldr	r3, .L1261+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L776
	ldr	r3, .L1261+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L770
.L776:
	ldr	r3, .L1261+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L777
	ldr	r3, .L1261+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L777
	ldr	r3, .L1261+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L777
	ldr	r3, .L1261+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L770
.L777:
	ldr	r3, .L1261+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1261+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1261+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1261+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L770:
	ldr	r3, .L1261+152
	ldr	r3, [r3]	@ float
	ldr	r1, .L1261+108
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L778
	ldr	r3, .L1261+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L779
	ldr	r3, .L1261+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L779
	ldr	r3, .L1261+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L779
	ldr	r3, .L1261+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L779:
	ldr	r3, .L1261+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L780
	ldr	r3, .L1261+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L780
	ldr	r3, .L1261+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L780
	ldr	r3, .L1261+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L780:
	ldr	r3, .L1261+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L781
	ldr	r3, .L1261+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L781
	ldr	r3, .L1261+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L781
	ldr	r3, .L1261+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L781:
	ldr	r3, .L1261+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L778
	ldr	r3, .L1261+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L778
	ldr	r3, .L1261+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L778
	ldr	r3, .L1261+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L778:
	ldr	r3, .L1261+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L782
	ldr	r3, .L1261+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1261+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1261+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1261+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1261+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1261+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1261+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1261+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1261+144
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1261+148
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1261+152
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L782:
	ldr	r3, .L1261+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L784
	ldr	r3, .L1261+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1261+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1261+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1261+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1261+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1261+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1261+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1261+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1261+144
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1261+148
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1261+152
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L784:
	ldr	r3, .L1261+160
	ldr	r2, [r3]
	ldr	r3, .L1261+156
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L786
	ldr	r3, .L1261+160
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L786
	ldr	r3, .L1261+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L786
	ldr	r3, .L1264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L786
	ldr	r3, .L1264+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L786
	ldr	r3, .L1264+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L786
	ldr	r3, .L1264+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1264+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L786
	ldr	r3, .L1264+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L787
.L786:
	ldr	r3, .L1264+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L787
	ldr	r3, .L1264+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L787
	ldr	r3, .L1264+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L787
	ldr	r3, .L1264+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L787
	ldr	r3, .L1264+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L787
	ldr	r3, .L1264+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L787:
	ldr	r3, .L1264+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1264+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L788
	ldr	r3, .L1264+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L788
	ldr	r3, .L1264+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L788
	ldr	r3, .L1264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L788
	ldr	r3, .L1264+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L788
	ldr	r3, .L1264+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L788
	ldr	r3, .L1264+84
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L790
.L788:
	ldr	r3, .L1264+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L790
	ldr	r3, .L1264+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L790
	ldr	r3, .L1264+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L790
	ldr	r3, .L1264+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L790
	ldr	r3, .L1264+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L790
	ldr	r3, .L1264+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L790:
	ldr	r3, .L1264+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1264+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L791
	ldr	r3, .L1264+80
	ldr	r2, [r3]
	ldr	r3, .L1264+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L791
	ldr	r3, .L1264+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L792
	ldr	r3, .L1264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L792
	ldr	r3, .L1264+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L792
	ldr	r3, .L1264+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L793
.L792:
	ldr	r3, .L1264+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L791
	ldr	r3, .L1264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L791
	ldr	r3, .L1264+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L791
	ldr	r3, .L1264+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L791
.L793:
	ldr	r3, .L1264+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L1264+20
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L794
.L791:
	ldr	r3, .L1264+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L794
	ldr	r3, .L1264+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L794
	ldr	r3, .L1264+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L794
	ldr	r3, .L1264+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L794
	ldr	r3, .L1264+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L794
	ldr	r3, .L1264+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L794:
	ldr	r3, .L1264+80
	ldr	r3, [r3]
	cmp	r3, #7
	bne	.L795
	ldr	r3, .L1264+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L795
	ldr	r3, .L1264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L795
	ldr	r3, .L1264+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L795
	ldr	r3, .L1264+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L795
	ldr	r3, .L1264+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L795
	ldr	r3, .L1264+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L795
	ldr	r3, .L1264+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L795
	ldr	r3, .L1264+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L795
	ldr	r3, .L1264+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L795
	ldr	r3, .L1264+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L795:
	ldr	r3, .L1264+80
	ldr	r3, [r3]
	cmp	r3, #7
	bne	.L796
	ldr	r3, .L1264+48
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1264+52
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L797
	mov	r3, #0
	mov	r4, r3
.L797:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L798
.L796:
	ldr	r3, .L1264+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L798
	ldr	r3, .L1264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L798
	ldr	r3, .L1264+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L798
	ldr	r3, .L1264+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L798
	ldr	r3, .L1264+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L798
	ldr	r3, .L1264+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L798
	ldr	r3, .L1264+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L798
	ldr	r3, .L1264+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L798
	ldr	r3, .L1264+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L798
	ldr	r3, .L1264+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L798:
	ldr	r3, .L1264+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1264+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L799
	ldr	r3, .L1264+80
	ldr	r2, [r3]
	ldr	r3, .L1264+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L799
	ldr	r3, .L1264+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L800
	ldr	r3, .L1264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L800
	ldr	r3, .L1264+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L800
	ldr	r3, .L1264+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L801
.L800:
	ldr	r3, .L1264+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L799
	ldr	r3, .L1264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L799
	ldr	r3, .L1264+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L799
	ldr	r3, .L1264+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L801
.L799:
	ldr	r3, .L1264+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L801
	ldr	r3, .L1264+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L801
	ldr	r3, .L1264+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L801
	ldr	r3, .L1264+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L801
	ldr	r3, .L1264+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L801
	ldr	r3, .L1264+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L801:
	ldr	r3, .L1264+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L802
	ldr	r3, .L1264+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L1264+20
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L803
.L802:
	ldr	r3, .L1264+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L803
	ldr	r3, .L1264+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L803
	ldr	r3, .L1264+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L803
	ldr	r3, .L1264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L803
	ldr	r3, .L1264+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L803
	ldr	r3, .L1264+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L803
	ldr	r3, .L1264+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L803
	ldr	r3, .L1264+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L803
	ldr	r3, .L1264+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L803
	ldr	r3, .L1264+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L803:
	ldr	r3, .L1264+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L804
	ldr	r3, .L1264+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L805
.L804:
	ldr	r3, .L1264+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L805
	ldr	r3, .L1264+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L805
	ldr	r3, .L1264+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L805
	ldr	r3, .L1264+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L805
	ldr	r3, .L1264+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L805
	ldr	r3, .L1264+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L805
	ldr	r3, .L1264+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L805
	ldr	r3, .L1264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L805
	ldr	r3, .L1264+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L805
	ldr	r3, .L1264+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L805:
	ldr	r3, .L1264+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L806
	ldr	r3, .L1264+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L806
	ldr	r3, .L1264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L806
	ldr	r3, .L1264+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L806
	ldr	r3, .L1264+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L806
	ldr	r3, .L1264+80
	ldr	r2, [r3]
	ldr	r3, .L1264+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L806
	ldr	r3, .L1264+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L807
.L806:
	ldr	r3, .L1264+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L807
	ldr	r3, .L1264+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L807
	ldr	r3, .L1264+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L807
	ldr	r3, .L1264+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L807
	ldr	r3, .L1264+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L807
	ldr	r3, .L1264+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L807:
	ldr	r3, .L1264+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1264+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L808
	ldr	r3, .L1264+80
	ldr	r2, [r3]
	ldr	r3, .L1264+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L808
	ldr	r3, .L1264+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L1264+20
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L808
	ldr	r3, .L1264+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L810
	ldr	r3, .L1264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L810
	ldr	r3, .L1264+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L810
	ldr	r3, .L1264+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L811
.L810:
	ldr	r3, .L1264+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L808
	ldr	r3, .L1264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L808
	ldr	r3, .L1264+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L808
	ldr	r3, .L1264+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L811
.L808:
	ldr	r3, .L1264+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L811
	ldr	r3, .L1264+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L811
	ldr	r3, .L1264+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L811
	ldr	r3, .L1264+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L811
	ldr	r3, .L1264+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L811
	ldr	r3, .L1264+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L811:
	ldr	r3, .L1264+80
	ldr	r3, [r3]
	cmp	r3, #7
	bne	.L812
	ldr	r3, .L1264+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L812
	ldr	r3, .L1264+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L812
	ldr	r3, .L1264+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L812
	ldr	r3, .L1264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L812
	ldr	r3, .L1264+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L812
	ldr	r3, .L1264+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L812
	ldr	r3, .L1264+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L812
	ldr	r3, .L1264+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L812
	ldr	r3, .L1264+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L812
	ldr	r3, .L1264+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L812:
	ldr	r3, .L1264+80
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L813
	ldr	r3, .L1264+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L813
	ldr	r3, .L1264+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L813
	ldr	r3, .L1264+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L813
	ldr	r3, .L1264+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L813
	ldr	r3, .L1264+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L813
	ldr	r3, .L1264+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L813
	ldr	r3, .L1264+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L813
	ldr	r3, .L1264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L813
	ldr	r3, .L1264+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L813
	ldr	r3, .L1264+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L813:
	ldr	r3, .L1264+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1264+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L814
	ldr	r3, .L1264+80
	ldr	r2, [r3]
	ldr	r3, .L1264+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L814
	ldr	r3, .L1264+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L814
	ldr	r3, .L1264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L814
	ldr	r3, .L1264+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L814
	ldr	r3, .L1264+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L814
	ldr	r3, .L1264+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L815
.L814:
	ldr	r3, .L1264+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L815
	ldr	r3, .L1264+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L815
	ldr	r3, .L1264+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L815
	ldr	r3, .L1264+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L815
	ldr	r3, .L1264+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L815
	ldr	r3, .L1264+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L815:
	ldr	r3, .L1264+80
	ldr	r2, [r3]
	ldr	r3, .L1264+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L816
	ldr	r3, .L1264+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L816
	ldr	r3, .L1264+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L816
	ldr	r3, .L1264+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L816
	ldr	r3, .L1264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L816
	ldr	r3, .L1264+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L816
	ldr	r3, .L1264+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L818
.L816:
	ldr	r3, .L1264+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L818
	ldr	r3, .L1264+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L818
	ldr	r3, .L1264+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L818
	ldr	r3, .L1264+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L818
	ldr	r3, .L1264+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L818
	ldr	r3, .L1264+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L818:
	ldr	r3, .L1264+84
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L819
	ldr	r3, .L1264+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L819
	ldr	r3, .L1264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L819
	ldr	r3, .L1264+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L819
	ldr	r3, .L1264+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L819
	ldr	r3, .L1264+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1264+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L819
	ldr	r3, .L1264+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L1264+20
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L820
.L819:
	ldr	r3, .L1264+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L820
	ldr	r3, .L1264+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L820
	ldr	r3, .L1264+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L820
	ldr	r3, .L1264+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L820
	ldr	r3, .L1264+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L820
	ldr	r3, .L1264+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L820:
	ldr	r3, .L1264+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L821
	ldr	r3, .L1264+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L821
	ldr	r3, .L1264+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L821
	ldr	r3, .L1264+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L822
.L821:
	ldr	r3, .L1264+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L823
	ldr	r3, .L1264+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L823
	ldr	r3, .L1264+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	b	.L1265
.L1266:
	.align	2
.L1264:
	.word	_x_p6_l2
	.word	_x_p6_l0
	.word	_x_p6_l1
	.word	v2
	.word	_x_v2
	.word	_x_p6_c
	.word	p6_l3
	.word	p6_l2
	.word	p6_l0
	.word	p6_l1
	.word	p6_evt
	.word	_x_p6_l3
	.word	p6_c
	.word	1098907648
	.word	p5_c
	.word	_x_v2
	.word	_x_p5_l3
	.word	_x_p5_l2
	.word	_x_p5_l0
	.word	_x_p5_l1
	.word	v1
	.word	_x_v1
	.word	_x_p5_c
	.word	p5_l3
	.word	p5_l2
	.word	p5_l0
	.word	p5_l1
	.word	delta
	.word	p5_evt
	.word	v2
.L1265:
	cmp	r3, #0
	beq	.L823
	ldr	r3, .L1264+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L822
.L823:
	ldr	r3, .L1264+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L824
	ldr	r3, .L1264+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L824
	ldr	r3, .L1264+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L824
	ldr	r3, .L1264+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L822
.L824:
	ldr	r3, .L1264+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L825
	ldr	r3, .L1264+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L825
	ldr	r3, .L1264+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L825
	ldr	r3, .L1264+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L822
.L825:
	ldr	r3, .L1264+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L826
	ldr	r3, .L1264+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L826
	ldr	r3, .L1264+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L826
	ldr	r3, .L1264+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L822
.L826:
	ldr	r3, .L1264+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L827
	ldr	r3, .L1264+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L827
	ldr	r3, .L1264+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L827
	ldr	r3, .L1264+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L822
.L827:
	ldr	r3, .L1264+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L828
	ldr	r3, .L1264+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L828
	ldr	r3, .L1264+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L828
	ldr	r3, .L1264+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L822
.L828:
	ldr	r3, .L1264+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L829
	ldr	r3, .L1264+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L829
	ldr	r3, .L1264+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L829
	ldr	r3, .L1264+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L822
.L829:
	ldr	r3, .L1264+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1264+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1264+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1264+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L822:
	ldr	r3, .L1264+88
	ldr	r3, [r3]	@ float
	ldr	r1, .L1264+52
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L830
	ldr	r3, .L1264+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L831
	ldr	r3, .L1264+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L831
	ldr	r3, .L1264+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L831
	ldr	r3, .L1264+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L831:
	ldr	r3, .L1264+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L832
	ldr	r3, .L1264+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L832
	ldr	r3, .L1264+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L832
	ldr	r3, .L1264+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L832:
	ldr	r3, .L1264+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L833
	ldr	r3, .L1264+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L833
	ldr	r3, .L1264+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L833
	ldr	r3, .L1264+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L833:
	ldr	r3, .L1264+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L830
	ldr	r3, .L1264+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L830
	ldr	r3, .L1264+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L830
	ldr	r3, .L1264+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L830:
	ldr	r3, .L1264+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L834
	ldr	r3, .L1264+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1264+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1264+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1264+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1264+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1264+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1264+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1264+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1264+108
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1264+56
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1264+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L834:
	ldr	r3, .L1264+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L836
	ldr	r3, .L1264+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1264+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1264+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1264+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1264+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1264+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1264+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1264+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1264+108
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1264+56
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1264+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L836:
	ldr	r3, .L1264+80
	ldr	r2, [r3]
	ldr	r3, .L1264+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L838
	ldr	r3, .L1264+80
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L838
	ldr	r3, .L1264+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L838
	ldr	r3, .L1264+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L838
	ldr	r3, .L1264+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L838
	ldr	r3, .L1264+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L838
	ldr	r3, .L1264+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1264+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L838
	ldr	r3, .L1264+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L839
.L838:
	ldr	r3, .L1264+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L839
	ldr	r3, .L1264+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L839
	ldr	r3, .L1264+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L839
	ldr	r3, .L1264+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L839
	ldr	r3, .L1264+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L839
	ldr	r3, .L1264+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L839:
	ldr	r3, .L1264+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1264+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L840
	ldr	r3, .L1264+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L840
	ldr	r3, .L1264+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L840
	ldr	r3, .L1264+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L840
	ldr	r3, .L1264+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L840
	ldr	r3, .L1264+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L840
	ldr	r3, .L1264+84
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L842
.L840:
	ldr	r3, .L1264+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L842
	ldr	r3, .L1264+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L842
	ldr	r3, .L1264+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L842
	ldr	r3, .L1264+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L842
	ldr	r3, .L1264+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L842
	ldr	r3, .L1264+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L842:
	ldr	r3, .L1264+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1264+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L843
	ldr	r3, .L1264+80
	ldr	r2, [r3]
	ldr	r3, .L1264+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L843
	ldr	r3, .L1264+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L844
	ldr	r3, .L1264+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L844
	ldr	r3, .L1264+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L844
	ldr	r3, .L1264+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L845
.L844:
	ldr	r3, .L1264+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L843
	ldr	r3, .L1264+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L843
	ldr	r3, .L1264+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L843
	ldr	r3, .L1264+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L843
.L845:
	ldr	r3, .L1264+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L1264+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L846
.L843:
	ldr	r3, .L1264+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L846
	ldr	r3, .L1264+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L846
	ldr	r3, .L1264+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L846
	ldr	r3, .L1264+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L846
	ldr	r3, .L1264+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L846
	ldr	r3, .L1264+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L846:
	ldr	r3, .L1264+80
	ldr	r3, [r3]
	cmp	r3, #6
	bne	.L847
	ldr	r3, .L1264+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L847
	ldr	r3, .L1264+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L847
	ldr	r3, .L1264+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L847
	ldr	r3, .L1264+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L847
	ldr	r3, .L1264+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L847
	ldr	r3, .L1264+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L847
	ldr	r3, .L1264+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L847
	ldr	r3, .L1264+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L847
	ldr	r3, .L1264+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L847
	ldr	r3, .L1264+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L847:
	ldr	r3, .L1264+80
	ldr	r3, [r3]
	cmp	r3, #6
	bne	.L848
	ldr	r3, .L1264+56
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1264+52
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L849
	mov	r3, #0
	mov	r4, r3
.L849:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L850
.L848:
	ldr	r3, .L1264+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L850
	ldr	r3, .L1264+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L850
	ldr	r3, .L1264+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L850
	ldr	r3, .L1264+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L850
	ldr	r3, .L1264+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L850
	ldr	r3, .L1264+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L850
	ldr	r3, .L1264+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L850
	ldr	r3, .L1264+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L850
	ldr	r3, .L1264+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L850
	ldr	r3, .L1264+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L850:
	ldr	r3, .L1264+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1264+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L851
	ldr	r3, .L1264+80
	ldr	r2, [r3]
	ldr	r3, .L1264+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L851
	ldr	r3, .L1264+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L852
	ldr	r3, .L1264+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L852
	ldr	r3, .L1264+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L852
	ldr	r3, .L1264+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L853
.L852:
	ldr	r3, .L1264+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L851
	ldr	r3, .L1264+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L851
	ldr	r3, .L1264+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L851
	ldr	r3, .L1264+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L853
.L851:
	ldr	r3, .L1264+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L853
	ldr	r3, .L1264+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L853
	ldr	r3, .L1264+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L853
	ldr	r3, .L1264+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L853
	ldr	r3, .L1264+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L853
	ldr	r3, .L1264+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L853:
	ldr	r3, .L1264+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L854
	ldr	r3, .L1264+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L1264+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L855
.L854:
	ldr	r3, .L1264+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L855
	ldr	r3, .L1264+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L855
	ldr	r3, .L1264+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L855
	ldr	r3, .L1264+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L855
	ldr	r3, .L1264+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L855
	ldr	r3, .L1264+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L855
	ldr	r3, .L1264+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L855
	ldr	r3, .L1264+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L855
	ldr	r3, .L1264+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L855
	ldr	r3, .L1264+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L855:
	ldr	r3, .L1264+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L856
	ldr	r3, .L1264+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L857
.L856:
	ldr	r3, .L1264+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L857
	ldr	r3, .L1264+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L857
	ldr	r3, .L1264+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L857
	ldr	r3, .L1264+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L857
	ldr	r3, .L1264+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L857
	ldr	r3, .L1264+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L857
	ldr	r3, .L1264+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L857
	ldr	r3, .L1264+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L857
	ldr	r3, .L1264+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L857
	ldr	r3, .L1264+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L857:
	ldr	r3, .L1264+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L858
	ldr	r3, .L1264+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L858
	ldr	r3, .L1264+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L858
	ldr	r3, .L1264+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L858
	ldr	r3, .L1264+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L858
	ldr	r3, .L1264+80
	ldr	r2, [r3]
	ldr	r3, .L1264+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L858
	ldr	r3, .L1264+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L859
.L858:
	ldr	r3, .L1264+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L859
	ldr	r3, .L1264+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L859
	ldr	r3, .L1264+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L859
	ldr	r3, .L1264+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L859
	ldr	r3, .L1264+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L859
	ldr	r3, .L1264+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L859:
	ldr	r3, .L1264+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1267
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L860
	ldr	r3, .L1267+4
	ldr	r2, [r3]
	ldr	r3, .L1267+8
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L860
	ldr	r3, .L1267+12
	ldr	r3, [r3]	@ float
	ldr	r2, .L1267+16
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L860
	ldr	r3, .L1267+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L862
	ldr	r3, .L1267+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L862
	ldr	r3, .L1267+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L862
	ldr	r3, .L1267+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L863
.L862:
	ldr	r3, .L1267+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L860
	ldr	r3, .L1267+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L860
	ldr	r3, .L1267+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L860
	ldr	r3, .L1267+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L863
.L860:
	ldr	r3, .L1267+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L863
	ldr	r3, .L1267+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L863
	ldr	r3, .L1267+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L863
	ldr	r3, .L1267+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L863
	ldr	r3, .L1267+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L863
	ldr	r3, .L1267+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L863:
	ldr	r3, .L1267+4
	ldr	r3, [r3]
	cmp	r3, #6
	bne	.L864
	ldr	r3, .L1267+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L864
	ldr	r3, .L1267+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L864
	ldr	r3, .L1267+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L864
	ldr	r3, .L1267+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L864
	ldr	r3, .L1267+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L864
	ldr	r3, .L1267+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L864
	ldr	r3, .L1267+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L864
	ldr	r3, .L1267+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L864
	ldr	r3, .L1267+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L864
	ldr	r3, .L1267+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L864:
	ldr	r3, .L1267+4
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L865
	ldr	r3, .L1267+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L865
	ldr	r3, .L1267+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L865
	ldr	r3, .L1267+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L865
	ldr	r3, .L1267+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L865
	ldr	r3, .L1267+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L865
	ldr	r3, .L1267+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L865
	ldr	r3, .L1267+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L865
	ldr	r3, .L1267+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L865
	ldr	r3, .L1267+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L865
	ldr	r3, .L1267+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L865:
	ldr	r3, .L1267+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1267
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L866
	ldr	r3, .L1267+4
	ldr	r2, [r3]
	ldr	r3, .L1267+8
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L866
	ldr	r3, .L1267+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L866
	ldr	r3, .L1267+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L866
	ldr	r3, .L1267+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L866
	ldr	r3, .L1267+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L866
	ldr	r3, .L1267+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L867
.L866:
	ldr	r3, .L1267+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L867
	ldr	r3, .L1267+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L867
	ldr	r3, .L1267+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L867
	ldr	r3, .L1267+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L867
	ldr	r3, .L1267+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L867
	ldr	r3, .L1267+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L867:
	ldr	r3, .L1267+4
	ldr	r2, [r3]
	ldr	r3, .L1267+8
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L868
	ldr	r3, .L1267+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L868
	ldr	r3, .L1267
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L868
	ldr	r3, .L1267+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L868
	ldr	r3, .L1267+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L868
	ldr	r3, .L1267+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L868
	ldr	r3, .L1267+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L870
.L868:
	ldr	r3, .L1267+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L870
	ldr	r3, .L1267+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L870
	ldr	r3, .L1267+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L870
	ldr	r3, .L1267+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L870
	ldr	r3, .L1267+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L870
	ldr	r3, .L1267+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L870:
	ldr	r3, .L1267+8
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L871
	ldr	r3, .L1267+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L871
	ldr	r3, .L1267+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L871
	ldr	r3, .L1267+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L871
	ldr	r3, .L1267+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L871
	ldr	r3, .L1267+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1267
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L871
	ldr	r3, .L1267+12
	ldr	r3, [r3]	@ float
	ldr	r2, .L1267+16
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L872
.L871:
	ldr	r3, .L1267+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L872
	ldr	r3, .L1267+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L872
	ldr	r3, .L1267+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L872
	ldr	r3, .L1267+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L872
	ldr	r3, .L1267+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L872
	ldr	r3, .L1267+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L872:
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L873
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L873
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L873
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L874
.L873:
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L875
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L875
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L875
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L874
.L875:
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L876
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L876
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L876
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L874
.L876:
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L877
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L877
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L877
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L874
.L877:
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L878
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L878
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L878
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L874
.L878:
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L879
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L879
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L879
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L874
.L879:
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L880
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L880
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L880
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L874
.L880:
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L881
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L881
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L881
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L874
.L881:
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L874:
	ldr	r3, .L1267+92
	ldr	r3, [r3]	@ float
	ldr	r1, .L1267+124
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L882
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L883
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L883
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L883
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L883:
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L884
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L884
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L884
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L884:
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L885
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L885
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L885
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L885:
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L882
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L882
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L882
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L882:
	ldr	r3, .L1267+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L886
	ldr	r3, .L1267+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1267+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1267+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1267+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1267+112
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1267+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1267+92
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L886:
	ldr	r3, .L1267+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L888
	ldr	r3, .L1267+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1267+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1267+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1267+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1267+112
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1267+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1267+92
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L888:
	ldr	r3, .L1267+4
	ldr	r2, [r3]
	ldr	r3, .L1267+8
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L890
	ldr	r3, .L1267+4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L890
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L890
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L890
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L890
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L890
	ldr	r3, .L1267+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1267
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L890
	ldr	r3, .L1267+92
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L891
.L890:
	ldr	r3, .L1267+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L891
	ldr	r3, .L1267+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L891
	ldr	r3, .L1267+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L891
	ldr	r3, .L1267+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L891
	ldr	r3, .L1267+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L891
	ldr	r3, .L1267+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L891:
	ldr	r3, .L1267+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1267
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L892
	ldr	r3, .L1267+92
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L892
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L892
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L892
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L892
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L892
	ldr	r3, .L1267+8
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L894
.L892:
	ldr	r3, .L1267+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L894
	ldr	r3, .L1267+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L894
	ldr	r3, .L1267+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L894
	ldr	r3, .L1267+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L894
	ldr	r3, .L1267+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L894
	ldr	r3, .L1267+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L894:
	ldr	r3, .L1267+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1267
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L895
	ldr	r3, .L1267+4
	ldr	r2, [r3]
	ldr	r3, .L1267+8
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L895
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L896
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L896
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L896
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L897
.L896:
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L895
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L895
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L895
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	b	.L1268
.L1269:
	.align	2
.L1267:
	.word	_x_v2
	.word	v1
	.word	_x_v1
	.word	p5_c
	.word	_x_p5_c
	.word	_x_p5_l3
	.word	_x_p5_l2
	.word	_x_p5_l0
	.word	_x_p5_l1
	.word	p5_l3
	.word	p5_l2
	.word	p5_l0
	.word	p5_l1
	.word	p5_evt
	.word	v1
	.word	_x_v1
	.word	_x_p4_l3
	.word	_x_p4_l2
	.word	_x_p4_l0
	.word	_x_p4_l1
	.word	v2
	.word	_x_v2
	.word	p4_c
	.word	_x_p4_c
	.word	p4_l3
	.word	p4_l2
	.word	p4_l0
	.word	p4_l1
	.word	delta
	.word	p4_evt
	.word	_x_p3_c
	.word	1098907648
	.word	_x_p3_l3
	.word	_x_p3_l2
	.word	_x_p3_l0
	.word	_x_p3_l1
.L1268:
	beq	.L895
.L897:
	ldr	r3, .L1267+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1267+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L898
.L895:
	ldr	r3, .L1267+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L898
	ldr	r3, .L1267+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L898
	ldr	r3, .L1267+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L898
	ldr	r3, .L1267+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L898
	ldr	r3, .L1267+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L898
	ldr	r3, .L1267+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L898:
	ldr	r3, .L1267+56
	ldr	r3, [r3]
	cmp	r3, #5
	bne	.L899
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L899
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L899
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L899
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L899
	ldr	r3, .L1267+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L899
	ldr	r3, .L1267+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L899
	ldr	r3, .L1267+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L899
	ldr	r3, .L1267+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L899
	ldr	r3, .L1267+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L899
	ldr	r3, .L1267+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L899:
	ldr	r3, .L1267+56
	ldr	r3, [r3]
	cmp	r3, #5
	bne	.L900
	ldr	r3, .L1267+88
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1267+124
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L901
	mov	r3, #0
	mov	r4, r3
.L901:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L902
.L900:
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L902
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L902
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L902
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L902
	ldr	r3, .L1267+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L902
	ldr	r3, .L1267+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L902
	ldr	r3, .L1267+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L902
	ldr	r3, .L1267+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L902
	ldr	r3, .L1267+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L902
	ldr	r3, .L1267+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L902:
	ldr	r3, .L1267+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1267+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L903
	ldr	r3, .L1267+56
	ldr	r2, [r3]
	ldr	r3, .L1267+60
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L903
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L904
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L904
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L904
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L905
.L904:
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L903
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L903
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L903
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L905
.L903:
	ldr	r3, .L1267+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L905
	ldr	r3, .L1267+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L905
	ldr	r3, .L1267+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L905
	ldr	r3, .L1267+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L905
	ldr	r3, .L1267+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L905
	ldr	r3, .L1267+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L905:
	ldr	r3, .L1267+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L906
	ldr	r3, .L1267+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1267+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L907
.L906:
	ldr	r3, .L1267+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L907
	ldr	r3, .L1267+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L907
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L907
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L907
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L907
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L907
	ldr	r3, .L1267+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L907
	ldr	r3, .L1267+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L907
	ldr	r3, .L1267+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L907
	ldr	r3, .L1267+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L907:
	ldr	r3, .L1267+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L908
	ldr	r3, .L1267+92
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L909
.L908:
	ldr	r3, .L1267+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L909
	ldr	r3, .L1267+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L909
	ldr	r3, .L1267+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L909
	ldr	r3, .L1267+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L909
	ldr	r3, .L1267+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L909
	ldr	r3, .L1267+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L909
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L909
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L909
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L909
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L909:
	ldr	r3, .L1267+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L910
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L910
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L910
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L910
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L910
	ldr	r3, .L1267+56
	ldr	r2, [r3]
	ldr	r3, .L1267+60
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L910
	ldr	r3, .L1267+92
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L911
.L910:
	ldr	r3, .L1267+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L911
	ldr	r3, .L1267+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L911
	ldr	r3, .L1267+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L911
	ldr	r3, .L1267+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L911
	ldr	r3, .L1267+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L911
	ldr	r3, .L1267+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L911:
	ldr	r3, .L1267+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1267+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L912
	ldr	r3, .L1267+56
	ldr	r2, [r3]
	ldr	r3, .L1267+60
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L912
	ldr	r3, .L1267+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1267+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L912
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L914
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L914
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L914
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L915
.L914:
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L912
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L912
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L912
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L915
.L912:
	ldr	r3, .L1267+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L915
	ldr	r3, .L1267+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L915
	ldr	r3, .L1267+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L915
	ldr	r3, .L1267+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L915
	ldr	r3, .L1267+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L915
	ldr	r3, .L1267+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L915:
	ldr	r3, .L1267+56
	ldr	r3, [r3]
	cmp	r3, #5
	bne	.L916
	ldr	r3, .L1267+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L916
	ldr	r3, .L1267+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L916
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L916
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L916
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L916
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L916
	ldr	r3, .L1267+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L916
	ldr	r3, .L1267+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L916
	ldr	r3, .L1267+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L916
	ldr	r3, .L1267+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L916:
	ldr	r3, .L1267+56
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L917
	ldr	r3, .L1267+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L917
	ldr	r3, .L1267+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L917
	ldr	r3, .L1267+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L917
	ldr	r3, .L1267+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L917
	ldr	r3, .L1267+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L917
	ldr	r3, .L1267+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L917
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L917
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L917
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L917
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L917:
	ldr	r3, .L1267+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1267+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L918
	ldr	r3, .L1267+56
	ldr	r2, [r3]
	ldr	r3, .L1267+60
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L918
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L918
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L918
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L918
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L918
	ldr	r3, .L1267+92
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L919
.L918:
	ldr	r3, .L1267+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L919
	ldr	r3, .L1267+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L919
	ldr	r3, .L1267+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L919
	ldr	r3, .L1267+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L919
	ldr	r3, .L1267+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L919
	ldr	r3, .L1267+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L919:
	ldr	r3, .L1267+56
	ldr	r2, [r3]
	ldr	r3, .L1267+60
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L920
	ldr	r3, .L1267+92
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L920
	ldr	r3, .L1267+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L920
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L920
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L920
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L920
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L922
.L920:
	ldr	r3, .L1267+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L922
	ldr	r3, .L1267+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L922
	ldr	r3, .L1267+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L922
	ldr	r3, .L1267+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L922
	ldr	r3, .L1267+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L922
	ldr	r3, .L1267+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L922:
	ldr	r3, .L1267+60
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L923
	ldr	r3, .L1267+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L923
	ldr	r3, .L1267+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L923
	ldr	r3, .L1267+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L923
	ldr	r3, .L1267+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L923
	ldr	r3, .L1267+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1267+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L923
	ldr	r3, .L1267+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1267+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L924
.L923:
	ldr	r3, .L1267+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L924
	ldr	r3, .L1267+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L924
	ldr	r3, .L1267+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L924
	ldr	r3, .L1267+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L924
	ldr	r3, .L1267+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L924
	ldr	r3, .L1267+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L924:
	ldr	r3, .L1267+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L925
	ldr	r3, .L1267+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L925
	ldr	r3, .L1267+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L925
	ldr	r3, .L1267+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L926
.L925:
	ldr	r3, .L1267+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L927
	ldr	r3, .L1267+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L927
	ldr	r3, .L1267+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L927
	ldr	r3, .L1267+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L926
.L927:
	ldr	r3, .L1267+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L928
	ldr	r3, .L1267+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L928
	ldr	r3, .L1267+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L928
	ldr	r3, .L1267+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L926
.L928:
	ldr	r3, .L1267+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L929
	ldr	r3, .L1267+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L929
	ldr	r3, .L1267+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L929
	ldr	r3, .L1267+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L926
.L929:
	ldr	r3, .L1267+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L930
	ldr	r3, .L1267+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L930
	ldr	r3, .L1267+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L930
	ldr	r3, .L1267+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L926
.L930:
	ldr	r3, .L1267+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L931
	ldr	r3, .L1267+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L931
	ldr	r3, .L1267+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L931
	ldr	r3, .L1267+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L926
.L931:
	ldr	r3, .L1267+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L932
	ldr	r3, .L1267+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L932
	ldr	r3, .L1267+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L932
	ldr	r3, .L1267+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L926
.L932:
	ldr	r3, .L1267+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L933
	ldr	r3, .L1267+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L933
	ldr	r3, .L1267+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L933
	ldr	r3, .L1267+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L926
.L933:
	ldr	r3, .L1267+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1267+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1267+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1267+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L926:
	ldr	r3, .L1267+120
	ldr	r3, [r3]	@ float
	ldr	r1, .L1267+124
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L934
	ldr	r3, .L1267+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L935
	ldr	r3, .L1267+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L935
	ldr	r3, .L1267+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L935
	ldr	r3, .L1267+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L935:
	ldr	r3, .L1267+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L936
	ldr	r3, .L1267+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L936
	ldr	r3, .L1267+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L936
	ldr	r3, .L1267+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L936:
	ldr	r3, .L1267+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L937
	ldr	r3, .L1267+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L937
	ldr	r3, .L1267+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L937
	ldr	r3, .L1267+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L937:
	ldr	r3, .L1267+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L934
	ldr	r3, .L1267+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L934
	ldr	r3, .L1267+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L934
	ldr	r3, .L1267+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L934:
	ldr	r3, .L1270
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L938
	ldr	r3, .L1270+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1270+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1270+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1270+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1270+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1270+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1270+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1270+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1270
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1270+28
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1270+32
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L938:
	ldr	r3, .L1270+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L940
	ldr	r3, .L1270+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1270+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1270+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1270+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1270+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1270+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1270+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1270+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1270
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1270+28
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1270+32
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L940:
	ldr	r3, .L1270+100
	ldr	r2, [r3]
	ldr	r3, .L1270+104
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L942
	ldr	r3, .L1270+100
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L942
	ldr	r3, .L1270+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L942
	ldr	r3, .L1270+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L942
	ldr	r3, .L1270+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L942
	ldr	r3, .L1270+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L942
	ldr	r3, .L1270+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1270+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L942
	ldr	r3, .L1270+32
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L943
.L942:
	ldr	r3, .L1270+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L943
	ldr	r3, .L1270+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L943
	ldr	r3, .L1270+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L943
	ldr	r3, .L1270+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L943
	ldr	r3, .L1270
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L943
	ldr	r3, .L1270+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L943:
	ldr	r3, .L1270+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1270+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L944
	ldr	r3, .L1270+32
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L944
	ldr	r3, .L1270+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L944
	ldr	r3, .L1270+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L944
	ldr	r3, .L1270+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L944
	ldr	r3, .L1270+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L944
	ldr	r3, .L1270+104
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L946
.L944:
	ldr	r3, .L1270+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L946
	ldr	r3, .L1270+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L946
	ldr	r3, .L1270+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L946
	ldr	r3, .L1270+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L946
	ldr	r3, .L1270
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L946
	ldr	r3, .L1270+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L946:
	ldr	r3, .L1270+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1270+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L947
	ldr	r3, .L1270+100
	ldr	r2, [r3]
	ldr	r3, .L1270+104
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L947
	ldr	r3, .L1270+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L948
	ldr	r3, .L1270+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L948
	ldr	r3, .L1270+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L948
	ldr	r3, .L1270+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L949
.L948:
	ldr	r3, .L1270+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L947
	ldr	r3, .L1270+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L947
	ldr	r3, .L1270+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L947
	ldr	r3, .L1270+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L947
.L949:
	ldr	r3, .L1270+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L1270+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L950
.L947:
	ldr	r3, .L1270+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L950
	ldr	r3, .L1270+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L950
	ldr	r3, .L1270+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L950
	ldr	r3, .L1270+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L950
	ldr	r3, .L1270
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L950
	ldr	r3, .L1270+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L950:
	ldr	r3, .L1270+100
	ldr	r3, [r3]
	cmp	r3, #4
	bne	.L951
	ldr	r3, .L1270+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L951
	ldr	r3, .L1270+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L951
	ldr	r3, .L1270+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L951
	ldr	r3, .L1270+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L951
	ldr	r3, .L1270+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L951
	ldr	r3, .L1270+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L951
	ldr	r3, .L1270+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L951
	ldr	r3, .L1270+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L951
	ldr	r3, .L1270
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L951
	ldr	r3, .L1270+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L951:
	ldr	r3, .L1270+100
	ldr	r3, [r3]
	cmp	r3, #4
	bne	.L952
	ldr	r3, .L1270+28
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1270+64
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L953
	mov	r3, #0
	mov	r4, r3
.L953:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L954
.L952:
	ldr	r3, .L1270+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L954
	ldr	r3, .L1270+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L954
	ldr	r3, .L1270+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L954
	ldr	r3, .L1270+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L954
	ldr	r3, .L1270+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L954
	ldr	r3, .L1270+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L954
	ldr	r3, .L1270+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L954
	ldr	r3, .L1270+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L954
	ldr	r3, .L1270
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L954
	ldr	r3, .L1270+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L954:
	ldr	r3, .L1270+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1270+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L955
	ldr	r3, .L1270+100
	ldr	r2, [r3]
	ldr	r3, .L1270+104
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L955
	ldr	r3, .L1270+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L956
	ldr	r3, .L1270+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L956
	ldr	r3, .L1270+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L956
	ldr	r3, .L1270+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L957
.L956:
	ldr	r3, .L1270+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L955
	ldr	r3, .L1270+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L955
	ldr	r3, .L1270+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L955
	ldr	r3, .L1270+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L957
.L955:
	ldr	r3, .L1270+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L957
	ldr	r3, .L1270+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L957
	ldr	r3, .L1270+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L957
	ldr	r3, .L1270+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L957
	ldr	r3, .L1270
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L957
	ldr	r3, .L1270+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L957:
	ldr	r3, .L1270+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L958
	ldr	r3, .L1270+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L1270+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L959
.L958:
	ldr	r3, .L1270
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L959
	ldr	r3, .L1270+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L959
	ldr	r3, .L1270+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L959
	ldr	r3, .L1270+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L959
	ldr	r3, .L1270+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L959
	ldr	r3, .L1270+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L959
	ldr	r3, .L1270+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L959
	ldr	r3, .L1270+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L959
	ldr	r3, .L1270+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L959
	ldr	r3, .L1270+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L959:
	ldr	r3, .L1270+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L960
	ldr	r3, .L1270+32
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L961
.L960:
	ldr	r3, .L1270
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L961
	ldr	r3, .L1270+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L961
	ldr	r3, .L1270+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L961
	ldr	r3, .L1270+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L961
	ldr	r3, .L1270+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L961
	ldr	r3, .L1270+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L961
	ldr	r3, .L1270+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L961
	ldr	r3, .L1270+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L961
	ldr	r3, .L1270+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L961
	ldr	r3, .L1270+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L961:
	ldr	r3, .L1270+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L962
	ldr	r3, .L1270+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L962
	ldr	r3, .L1270+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L962
	ldr	r3, .L1270+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L962
	ldr	r3, .L1270+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L962
	ldr	r3, .L1270+100
	ldr	r2, [r3]
	ldr	r3, .L1270+104
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L962
	ldr	r3, .L1270+32
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L963
.L962:
	ldr	r3, .L1270+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L963
	ldr	r3, .L1270+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L963
	ldr	r3, .L1270+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L963
	ldr	r3, .L1270+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L963
	ldr	r3, .L1270
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L963
	ldr	r3, .L1270+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L963:
	ldr	r3, .L1270+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1270+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L964
	ldr	r3, .L1270+100
	ldr	r2, [r3]
	ldr	r3, .L1270+104
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L964
	ldr	r3, .L1270+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L1270+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L964
	ldr	r3, .L1270+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L966
	ldr	r3, .L1270+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L966
	ldr	r3, .L1270+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L966
	ldr	r3, .L1270+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L967
.L966:
	ldr	r3, .L1270+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L964
	ldr	r3, .L1270+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L964
	ldr	r3, .L1270+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L964
	ldr	r3, .L1270+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L967
.L964:
	ldr	r3, .L1270+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L967
	ldr	r3, .L1270+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L967
	ldr	r3, .L1270+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L967
	ldr	r3, .L1270+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L967
	ldr	r3, .L1270
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L967
	ldr	r3, .L1270+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L967:
	ldr	r3, .L1270+100
	ldr	r3, [r3]
	cmp	r3, #4
	bne	.L968
	ldr	r3, .L1270
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L968
	ldr	r3, .L1270+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L968
	ldr	r3, .L1270+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L968
	ldr	r3, .L1270+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L968
	ldr	r3, .L1270+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L968
	ldr	r3, .L1270+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L968
	ldr	r3, .L1270+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L968
	ldr	r3, .L1270+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L968
	ldr	r3, .L1270+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L968
	ldr	r3, .L1270+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L968:
	ldr	r3, .L1270+100
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L969
	ldr	r3, .L1270
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L969
	ldr	r3, .L1270+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L969
	ldr	r3, .L1270+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L969
	ldr	r3, .L1270+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L969
	ldr	r3, .L1270+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L969
	ldr	r3, .L1270+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L969
	ldr	r3, .L1270+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L969
	ldr	r3, .L1270+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L969
	ldr	r3, .L1270+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L969
	ldr	r3, .L1270+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L969:
	ldr	r3, .L1270+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1270+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	b	.L1271
.L1272:
	.align	2
.L1270:
	.word	delta
	.word	p3_l0
	.word	_x_p3_l0
	.word	_x_p3_l3
	.word	_x_p3_l2
	.word	_x_p3_l0
	.word	_x_p3_l1
	.word	p3_c
	.word	_x_p3_c
	.word	p3_l3
	.word	p3_l2
	.word	p3_l0
	.word	p3_l1
	.word	p3_evt
	.word	_x_p2_c
	.word	p2_c
	.word	1098907648
	.word	p2_l3
	.word	p2_l2
	.word	p2_l1
	.word	p2_l0
	.word	delta
	.word	p2_evt
	.word	v2
	.word	_x_v2
	.word	v1
	.word	_x_v1
	.word	_x_p2_l3
	.word	_x_p2_l2
	.word	_x_p2_l0
	.word	_x_p2_l1
.L1271:
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L970
	ldr	r3, .L1270+100
	ldr	r2, [r3]
	ldr	r3, .L1270+104
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L970
	ldr	r3, .L1270+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L970
	ldr	r3, .L1270+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L970
	ldr	r3, .L1270+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L970
	ldr	r3, .L1270+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L970
	ldr	r3, .L1270+32
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L971
.L970:
	ldr	r3, .L1270+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L971
	ldr	r3, .L1270+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L971
	ldr	r3, .L1270+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L971
	ldr	r3, .L1270+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L971
	ldr	r3, .L1270+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L971
	ldr	r3, .L1270+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L971:
	ldr	r3, .L1270+100
	ldr	r2, [r3]
	ldr	r3, .L1270+104
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L972
	ldr	r3, .L1270+32
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L972
	ldr	r3, .L1270+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L972
	ldr	r3, .L1270+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L972
	ldr	r3, .L1270+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L972
	ldr	r3, .L1270+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L972
	ldr	r3, .L1270+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L974
.L972:
	ldr	r3, .L1270+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L974
	ldr	r3, .L1270+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L974
	ldr	r3, .L1270+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L974
	ldr	r3, .L1270+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L974
	ldr	r3, .L1270+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L974
	ldr	r3, .L1270+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L974:
	ldr	r3, .L1270+104
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L975
	ldr	r3, .L1270+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L975
	ldr	r3, .L1270+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L975
	ldr	r3, .L1270+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L975
	ldr	r3, .L1270+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L975
	ldr	r3, .L1270+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1270+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L975
	ldr	r3, .L1270+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L1270+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L976
.L975:
	ldr	r3, .L1270+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L976
	ldr	r3, .L1270+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L976
	ldr	r3, .L1270+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L976
	ldr	r3, .L1270+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L976
	ldr	r3, .L1270+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L976
	ldr	r3, .L1270+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L976:
	ldr	r3, .L1270+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L977
	ldr	r3, .L1270+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L977
	ldr	r3, .L1270+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L977
	ldr	r3, .L1270+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L978
.L977:
	ldr	r3, .L1270+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L979
	ldr	r3, .L1270+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L979
	ldr	r3, .L1270+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L979
	ldr	r3, .L1270+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L978
.L979:
	ldr	r3, .L1270+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L980
	ldr	r3, .L1270+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L980
	ldr	r3, .L1270+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L980
	ldr	r3, .L1270+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L978
.L980:
	ldr	r3, .L1270+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L981
	ldr	r3, .L1270+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L981
	ldr	r3, .L1270+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L981
	ldr	r3, .L1270+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L978
.L981:
	ldr	r3, .L1270+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L982
	ldr	r3, .L1270+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L982
	ldr	r3, .L1270+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L982
	ldr	r3, .L1270+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L978
.L982:
	ldr	r3, .L1270+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L983
	ldr	r3, .L1270+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L983
	ldr	r3, .L1270+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L983
	ldr	r3, .L1270+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L978
.L983:
	ldr	r3, .L1270+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L984
	ldr	r3, .L1270+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L984
	ldr	r3, .L1270+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L984
	ldr	r3, .L1270+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L978
.L984:
	ldr	r3, .L1270+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L985
	ldr	r3, .L1270+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L985
	ldr	r3, .L1270+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L985
	ldr	r3, .L1270+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L978
.L985:
	ldr	r3, .L1270+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1270+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1270+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1270+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L978:
	ldr	r3, .L1270+56
	ldr	r3, [r3]	@ float
	ldr	r1, .L1270+64
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L986
	ldr	r3, .L1270+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L987
	ldr	r3, .L1270+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L987
	ldr	r3, .L1270+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L987
	ldr	r3, .L1270+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L987:
	ldr	r3, .L1270+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L988
	ldr	r3, .L1270+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L988
	ldr	r3, .L1270+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L988
	ldr	r3, .L1270+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L988:
	ldr	r3, .L1270+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L989
	ldr	r3, .L1270+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L989
	ldr	r3, .L1270+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L989
	ldr	r3, .L1270+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L989:
	ldr	r3, .L1270+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L986
	ldr	r3, .L1270+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L986
	ldr	r3, .L1270+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L986
	ldr	r3, .L1270+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L986:
	ldr	r3, .L1270+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L990
	ldr	r3, .L1270+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1270+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1270+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1270+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1270+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1270+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1270+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1270+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1270+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1270+60
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1270+56
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L990:
	ldr	r3, .L1270+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L992
	ldr	r3, .L1270+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1270+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1270+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1270+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1270+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1270+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1270+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1270+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1270+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1270+60
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1270+56
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L992:
	ldr	r3, .L1270+100
	ldr	r2, [r3]
	ldr	r3, .L1270+104
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L994
	ldr	r3, .L1270+100
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L994
	ldr	r3, .L1270+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L994
	ldr	r3, .L1270+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L994
	ldr	r3, .L1270+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L994
	ldr	r3, .L1270+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L994
	ldr	r3, .L1270+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1270+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L994
	ldr	r3, .L1270+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L995
.L994:
	ldr	r3, .L1270+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L995
	ldr	r3, .L1270+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L995
	ldr	r3, .L1270+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L995
	ldr	r3, .L1270+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L995
	ldr	r3, .L1270+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L995
	ldr	r3, .L1270+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L995:
	ldr	r3, .L1270+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1270+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L996
	ldr	r3, .L1270+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L996
	ldr	r3, .L1270+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L996
	ldr	r3, .L1270+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L996
	ldr	r3, .L1270+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L996
	ldr	r3, .L1270+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L996
	ldr	r3, .L1270+104
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L998
.L996:
	ldr	r3, .L1270+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L998
	ldr	r3, .L1270+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L998
	ldr	r3, .L1270+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L998
	ldr	r3, .L1270+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L998
	ldr	r3, .L1270+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L998
	ldr	r3, .L1270+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L998:
	ldr	r3, .L1270+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1270+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L999
	ldr	r3, .L1270+100
	ldr	r2, [r3]
	ldr	r3, .L1270+104
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L999
	ldr	r3, .L1270+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1000
	ldr	r3, .L1270+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1000
	ldr	r3, .L1270+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1000
	ldr	r3, .L1270+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1001
.L1000:
	ldr	r3, .L1270+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L999
	ldr	r3, .L1270+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L999
	ldr	r3, .L1270+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L999
	ldr	r3, .L1270+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L999
.L1001:
	ldr	r3, .L1270+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L1270+56
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1002
.L999:
	ldr	r3, .L1270+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1270+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1270+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1002
	ldr	r3, .L1270+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1270+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1002
	ldr	r3, .L1270+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L1002:
	ldr	r3, .L1270+100
	ldr	r3, [r3]
	cmp	r3, #3
	bne	.L1003
	ldr	r3, .L1270+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1003
	ldr	r3, .L1270+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1003
	ldr	r3, .L1270+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1003
	ldr	r3, .L1270+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1003
	ldr	r3, .L1270+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1003
	ldr	r3, .L1270+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1003
	ldr	r3, .L1270+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1003
	ldr	r3, .L1270+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1003
	ldr	r3, .L1270+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1003
	ldr	r3, .L1270+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L1003:
	ldr	r3, .L1270+100
	ldr	r3, [r3]
	cmp	r3, #3
	bne	.L1004
	ldr	r3, .L1270+60
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1270+64
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1005
	mov	r3, #0
	mov	r4, r3
.L1005:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L1006
.L1004:
	ldr	r3, .L1270+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1006
	ldr	r3, .L1270+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1006
	ldr	r3, .L1270+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1006
	ldr	r3, .L1270+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1006
	ldr	r3, .L1270+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1006
	ldr	r3, .L1270+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1006
	ldr	r3, .L1270+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1006
	ldr	r3, .L1270+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1006
	ldr	r3, .L1270+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1006
	ldr	r3, .L1270+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L1006:
	ldr	r3, .L1270+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1270+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1007
	ldr	r3, .L1270+100
	ldr	r2, [r3]
	ldr	r3, .L1270+104
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1007
	ldr	r3, .L1270+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1008
	ldr	r3, .L1270+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1008
	ldr	r3, .L1270+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1008
	ldr	r3, .L1270+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1009
.L1008:
	ldr	r3, .L1273
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1007
	ldr	r3, .L1273+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1007
	ldr	r3, .L1273+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1007
	ldr	r3, .L1273+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1009
.L1007:
	ldr	r3, .L1273+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1009
	ldr	r3, .L1273+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1009
	ldr	r3, .L1273+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1009
	ldr	r3, .L1273+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1009
	ldr	r3, .L1273+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1009
	ldr	r3, .L1273+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L1009:
	ldr	r3, .L1273+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1010
	ldr	r3, .L1273+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L1273+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1011
.L1010:
	ldr	r3, .L1273+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1011
	ldr	r3, .L1273+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1011
	ldr	r3, .L1273
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1011
	ldr	r3, .L1273+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1011
	ldr	r3, .L1273+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1011
	ldr	r3, .L1273+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1011
	ldr	r3, .L1273+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1011
	ldr	r3, .L1273+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1011
	ldr	r3, .L1273+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1011
	ldr	r3, .L1273+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L1011:
	ldr	r3, .L1273+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1012
	ldr	r3, .L1273+40
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1013
.L1012:
	ldr	r3, .L1273+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1013
	ldr	r3, .L1273+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1013
	ldr	r3, .L1273+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1013
	ldr	r3, .L1273+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1013
	ldr	r3, .L1273+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1013
	ldr	r3, .L1273+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1013
	ldr	r3, .L1273
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1013
	ldr	r3, .L1273+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1013
	ldr	r3, .L1273+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1013
	ldr	r3, .L1273+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L1013:
	ldr	r3, .L1273+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1014
	ldr	r3, .L1273
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1014
	ldr	r3, .L1273+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1014
	ldr	r3, .L1273+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1014
	ldr	r3, .L1273+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1014
	ldr	r3, .L1273+48
	ldr	r2, [r3]
	ldr	r3, .L1273+60
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1014
	ldr	r3, .L1273+40
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1015
.L1014:
	ldr	r3, .L1273+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1015
	ldr	r3, .L1273+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1015
	ldr	r3, .L1273+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1015
	ldr	r3, .L1273+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1015
	ldr	r3, .L1273+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1015
	ldr	r3, .L1273+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L1015:
	ldr	r3, .L1273+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1273+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1016
	ldr	r3, .L1273+48
	ldr	r2, [r3]
	ldr	r3, .L1273+60
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1016
	ldr	r3, .L1273+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L1273+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1016
	ldr	r3, .L1273
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1018
	ldr	r3, .L1273+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1018
	ldr	r3, .L1273+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1018
	ldr	r3, .L1273+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1019
.L1018:
	ldr	r3, .L1273
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1016
	ldr	r3, .L1273+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1016
	ldr	r3, .L1273+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1016
	ldr	r3, .L1273+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1019
.L1016:
	ldr	r3, .L1273+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1019
	ldr	r3, .L1273+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1019
	ldr	r3, .L1273+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1019
	ldr	r3, .L1273+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1019
	ldr	r3, .L1273+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1019
	ldr	r3, .L1273+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L1019:
	ldr	r3, .L1273+48
	ldr	r3, [r3]
	cmp	r3, #3
	bne	.L1020
	ldr	r3, .L1273+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1020
	ldr	r3, .L1273+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1020
	ldr	r3, .L1273
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1020
	ldr	r3, .L1273+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1020
	ldr	r3, .L1273+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1020
	ldr	r3, .L1273+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1020
	ldr	r3, .L1273+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1020
	ldr	r3, .L1273+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1020
	ldr	r3, .L1273+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1020
	ldr	r3, .L1273+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L1020:
	ldr	r3, .L1273+48
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L1021
	ldr	r3, .L1273+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1021
	ldr	r3, .L1273+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1021
	ldr	r3, .L1273+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1021
	ldr	r3, .L1273+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1021
	ldr	r3, .L1273+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1021
	ldr	r3, .L1273+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1021
	ldr	r3, .L1273
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1021
	ldr	r3, .L1273+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1021
	ldr	r3, .L1273+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1021
	ldr	r3, .L1273+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L1021:
	ldr	r3, .L1273+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1273+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1022
	ldr	r3, .L1273+48
	ldr	r2, [r3]
	ldr	r3, .L1273+60
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1022
	ldr	r3, .L1273
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1022
	ldr	r3, .L1273+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1022
	ldr	r3, .L1273+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1022
	ldr	r3, .L1273+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1022
	ldr	r3, .L1273+40
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1023
.L1022:
	ldr	r3, .L1273+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1023
	ldr	r3, .L1273+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1023
	ldr	r3, .L1273+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1023
	ldr	r3, .L1273+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1023
	ldr	r3, .L1273+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1023
	ldr	r3, .L1273+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L1023:
	ldr	r3, .L1273+48
	ldr	r2, [r3]
	ldr	r3, .L1273+60
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1024
	ldr	r3, .L1273+40
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1024
	ldr	r3, .L1273+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1024
	ldr	r3, .L1273
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1024
	ldr	r3, .L1273+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1024
	ldr	r3, .L1273+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1024
	ldr	r3, .L1273+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1026
.L1024:
	ldr	r3, .L1273+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1026
	ldr	r3, .L1273+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1026
	ldr	r3, .L1273+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1026
	ldr	r3, .L1273+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1026
	ldr	r3, .L1273+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1026
	ldr	r3, .L1273+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L1026:
	ldr	r3, .L1273+60
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1027
	ldr	r3, .L1273
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1027
	ldr	r3, .L1273+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1027
	ldr	r3, .L1273+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1027
	ldr	r3, .L1273+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1027
	ldr	r3, .L1273+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1273+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1027
	ldr	r3, .L1273+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L1273+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1028
.L1027:
	ldr	r3, .L1273+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1028
	ldr	r3, .L1273+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1028
	ldr	r3, .L1273+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1028
	ldr	r3, .L1273+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1028
	ldr	r3, .L1273+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1028
	ldr	r3, .L1273+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L1028:
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1029
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1029
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1029
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1030
.L1029:
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1031
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1031
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1031
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1030
.L1031:
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1032
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1032
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1032
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1030
.L1032:
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1033
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1033
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1033
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1030
.L1033:
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1034
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1034
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1034
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1030
.L1034:
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1035
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1035
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1035
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1030
.L1035:
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1036
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1036
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1036
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1030
.L1036:
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1037
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1037
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1037
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1030
.L1037:
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L1030:
	ldr	r3, .L1273+92
	ldr	r3, [r3]	@ float
	ldr	r1, .L1273+44
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1038
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1039
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1039
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1039
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L1039:
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1040
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1040
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1040
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L1040:
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1041
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1041
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1041
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L1041:
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1038
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1038
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1038
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L1038:
	ldr	r3, .L1273+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1042
	ldr	r3, .L1273+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1273+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1273+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1273+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1273+52
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1273+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1273+92
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L1042:
	ldr	r3, .L1273+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1044
	ldr	r3, .L1273+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1273+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1273+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1273+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1273+52
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1273+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	b	.L1274
.L1275:
	.align	2
.L1273:
	.word	_x_p2_l3
	.word	_x_p2_l2
	.word	_x_p2_l0
	.word	_x_p2_l1
	.word	p2_l3
	.word	p2_l2
	.word	p2_l0
	.word	p2_l1
	.word	p2_evt
	.word	p2_c
	.word	_x_p2_c
	.word	1098907648
	.word	v1
	.word	delta
	.word	p1_evt
	.word	_x_v1
	.word	_x_p1_l3
	.word	_x_p1_l2
	.word	_x_p1_l0
	.word	_x_p1_l1
	.word	v2
	.word	_x_v2
	.word	p1_c
	.word	_x_p1_c
	.word	p1_l3
	.word	p1_l2
	.word	p1_l0
	.word	p1_l1
.L1274:
	ldr	r3, .L1273+92
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L1044:
	ldr	r3, .L1273+48
	ldr	r2, [r3]
	ldr	r3, .L1273+60
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1046
	ldr	r3, .L1273+48
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1046
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1046
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1046
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1046
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1046
	ldr	r3, .L1273+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1273+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1046
	ldr	r3, .L1273+92
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1047
.L1046:
	ldr	r3, .L1273+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1047
	ldr	r3, .L1273+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1047
	ldr	r3, .L1273+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1047
	ldr	r3, .L1273+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1047
	ldr	r3, .L1273+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1047
	ldr	r3, .L1273+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L1047:
	ldr	r3, .L1273+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1273+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1048
	ldr	r3, .L1273+92
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1048
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1048
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1048
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1048
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1048
	ldr	r3, .L1273+60
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L1050
.L1048:
	ldr	r3, .L1273+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1050
	ldr	r3, .L1273+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1050
	ldr	r3, .L1273+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1050
	ldr	r3, .L1273+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1050
	ldr	r3, .L1273+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1050
	ldr	r3, .L1273+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L1050:
	ldr	r3, .L1273+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1273+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1051
	ldr	r3, .L1273+48
	ldr	r2, [r3]
	ldr	r3, .L1273+60
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1051
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1052
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1052
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1052
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1053
.L1052:
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1051
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1051
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1051
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1051
.L1053:
	ldr	r3, .L1273+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1273+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1054
.L1051:
	ldr	r3, .L1273+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1054
	ldr	r3, .L1273+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1054
	ldr	r3, .L1273+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1054
	ldr	r3, .L1273+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1054
	ldr	r3, .L1273+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1054
	ldr	r3, .L1273+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L1054:
	ldr	r3, .L1273+48
	ldr	r3, [r3]
	cmp	r3, #2
	bne	.L1055
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1055
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1055
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1055
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1055
	ldr	r3, .L1273+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1055
	ldr	r3, .L1273+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1055
	ldr	r3, .L1273+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1055
	ldr	r3, .L1273+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1055
	ldr	r3, .L1273+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1055
	ldr	r3, .L1273+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L1055:
	ldr	r3, .L1273+48
	ldr	r3, [r3]
	cmp	r3, #2
	bne	.L1056
	ldr	r3, .L1273+88
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1273+44
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1057
	mov	r3, #0
	mov	r4, r3
.L1057:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L1058
.L1056:
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1058
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1058
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1058
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1058
	ldr	r3, .L1273+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1058
	ldr	r3, .L1273+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1058
	ldr	r3, .L1273+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1058
	ldr	r3, .L1273+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1058
	ldr	r3, .L1273+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1058
	ldr	r3, .L1273+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L1058:
	ldr	r3, .L1273+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1273+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1059
	ldr	r3, .L1273+48
	ldr	r2, [r3]
	ldr	r3, .L1273+60
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1059
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1060
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1060
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1060
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1061
.L1060:
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1059
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1059
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1059
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1061
.L1059:
	ldr	r3, .L1273+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1061
	ldr	r3, .L1273+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1061
	ldr	r3, .L1273+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1061
	ldr	r3, .L1273+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1061
	ldr	r3, .L1273+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1061
	ldr	r3, .L1273+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L1061:
	ldr	r3, .L1273+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1062
	ldr	r3, .L1273+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1273+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1063
.L1062:
	ldr	r3, .L1273+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1063
	ldr	r3, .L1273+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1063
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1063
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1063
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1063
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1063
	ldr	r3, .L1273+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1063
	ldr	r3, .L1273+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1063
	ldr	r3, .L1273+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1063
	ldr	r3, .L1273+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L1063:
	ldr	r3, .L1273+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1064
	ldr	r3, .L1273+92
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1065
.L1064:
	ldr	r3, .L1273+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1065
	ldr	r3, .L1273+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1065
	ldr	r3, .L1273+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1065
	ldr	r3, .L1273+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1065
	ldr	r3, .L1273+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1065
	ldr	r3, .L1273+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1065
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1065
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1065
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1065
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L1065:
	ldr	r3, .L1273+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1066
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1066
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1066
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1066
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1066
	ldr	r3, .L1273+48
	ldr	r2, [r3]
	ldr	r3, .L1273+60
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1066
	ldr	r3, .L1273+92
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1067
.L1066:
	ldr	r3, .L1273+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1067
	ldr	r3, .L1273+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1067
	ldr	r3, .L1273+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1067
	ldr	r3, .L1273+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1067
	ldr	r3, .L1273+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1067
	ldr	r3, .L1273+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L1067:
	ldr	r3, .L1273+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1273+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1068
	ldr	r3, .L1273+48
	ldr	r2, [r3]
	ldr	r3, .L1273+60
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1068
	ldr	r3, .L1273+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1273+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1068
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1070
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1070
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1070
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1071
.L1070:
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1068
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1068
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1068
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1071
.L1068:
	ldr	r3, .L1273+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1071
	ldr	r3, .L1273+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1071
	ldr	r3, .L1273+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1071
	ldr	r3, .L1273+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1071
	ldr	r3, .L1273+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1071
	ldr	r3, .L1273+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L1071:
	ldr	r3, .L1273+48
	ldr	r3, [r3]
	cmp	r3, #2
	bne	.L1072
	ldr	r3, .L1273+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1072
	ldr	r3, .L1273+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1072
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1072
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1072
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1072
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1072
	ldr	r3, .L1273+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1072
	ldr	r3, .L1273+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1072
	ldr	r3, .L1273+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1072
	ldr	r3, .L1273+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L1072:
	ldr	r3, .L1273+48
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L1073
	ldr	r3, .L1273+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1073
	ldr	r3, .L1273+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1073
	ldr	r3, .L1273+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1073
	ldr	r3, .L1273+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1073
	ldr	r3, .L1273+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1073
	ldr	r3, .L1273+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1073
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1073
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1073
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1073
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L1073:
	ldr	r3, .L1273+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1273+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1074
	ldr	r3, .L1273+48
	ldr	r2, [r3]
	ldr	r3, .L1273+60
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1074
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1074
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1074
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1074
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1074
	ldr	r3, .L1273+92
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1075
.L1074:
	ldr	r3, .L1273+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1075
	ldr	r3, .L1273+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1075
	ldr	r3, .L1273+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1075
	ldr	r3, .L1273+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1075
	ldr	r3, .L1273+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1075
	ldr	r3, .L1273+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L1075:
	ldr	r3, .L1273+48
	ldr	r2, [r3]
	ldr	r3, .L1273+60
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1076
	ldr	r3, .L1273+92
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1076
	ldr	r3, .L1273+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1076
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1076
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1076
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1076
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1078
.L1076:
	ldr	r3, .L1273+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1078
	ldr	r3, .L1273+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1078
	ldr	r3, .L1273+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1078
	ldr	r3, .L1273+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1078
	ldr	r3, .L1273+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1078
	ldr	r3, .L1273+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L1078:
	ldr	r3, .L1273+60
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1079
	ldr	r3, .L1273+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1079
	ldr	r3, .L1273+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1079
	ldr	r3, .L1273+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1079
	ldr	r3, .L1273+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1079
	ldr	r3, .L1273+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1273+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1079
	ldr	r3, .L1273+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1273+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1080
.L1079:
	ldr	r3, .L1273+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1080
	ldr	r3, .L1273+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1080
	ldr	r3, .L1273+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1080
	ldr	r3, .L1273+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1080
	ldr	r3, .L1276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1080
	ldr	r3, .L1276+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L1080:
	ldr	r3, .L1276+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1081
	ldr	r3, .L1276+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1081
	ldr	r3, .L1276+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1081
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1082
.L1081:
	ldr	r3, .L1276+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1083
	ldr	r3, .L1276+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1083
	ldr	r3, .L1276+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1083
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1082
.L1083:
	ldr	r3, .L1276+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1084
	ldr	r3, .L1276+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1084
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1084
	ldr	r3, .L1276+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1082
.L1084:
	ldr	r3, .L1276+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1085
	ldr	r3, .L1276+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1085
	ldr	r3, .L1276+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1085
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1082
.L1085:
	ldr	r3, .L1276+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1086
	ldr	r3, .L1276+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1086
	ldr	r3, .L1276+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1086
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1082
.L1086:
	ldr	r3, .L1276+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1087
	ldr	r3, .L1276+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1087
	ldr	r3, .L1276+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1087
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1082
.L1087:
	ldr	r3, .L1276+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1088
	ldr	r3, .L1276+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1088
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1088
	ldr	r3, .L1276+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1082
.L1088:
	ldr	r3, .L1276+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1089
	ldr	r3, .L1276+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1089
	ldr	r3, .L1276+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1089
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1082
.L1089:
	ldr	r3, .L1276+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1276+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1276+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L1082:
	ldr	r3, .L1276+560
	ldr	r3, [r3]	@ float
	ldr	r1, .L1276+20
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1090
	ldr	r3, .L1276+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1091
	ldr	r3, .L1276+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1091
	ldr	r3, .L1276+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1091
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L1091:
	ldr	r3, .L1276+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1092
	ldr	r3, .L1276+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1092
	ldr	r3, .L1276+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1092
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L1092:
	ldr	r3, .L1276+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1093
	ldr	r3, .L1276+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1093
	ldr	r3, .L1276+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1093
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L1093:
	ldr	r3, .L1276+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1090
	ldr	r3, .L1276+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1090
	ldr	r3, .L1276+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1090
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L1090:
	ldr	r3, .L1276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1094
	ldr	r3, .L1276+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1276+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1276+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1276+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1276+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1276+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1276+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1276
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1276+564
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1276+560
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L1094:
	ldr	r3, .L1276+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1096
	ldr	r3, .L1276+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1276+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1276+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1276+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1276+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1276+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1276+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1276
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1276+564
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1276+560
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L1096:
	ldr	r3, .L1276+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1098
	ldr	r3, .L1276+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1098
	ldr	r3, .L1276+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1098
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1098
	ldr	r3, .L1276+284
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1098
	ldr	r3, .L1276+560
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1098
	ldr	r3, .L1276+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1276+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1098
	ldr	r3, .L1276+284
	ldr	r2, [r3]
	ldr	r3, .L1276+280
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L1100
.L1098:
	ldr	r3, .L1276+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1100
	ldr	r3, .L1276+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1100
	ldr	r3, .L1276+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1100
	ldr	r3, .L1276+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1100
	ldr	r3, .L1276+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1100
	ldr	r3, .L1276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L257
.L1100:
	ldr	r3, .L1276+560
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1102
	ldr	r3, .L1276+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1276+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1102
	ldr	r3, .L1276+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1102
	ldr	r3, .L1276+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1102
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1102
	ldr	r3, .L1276+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1102
	ldr	r3, .L1276+280
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L1104
.L1102:
	ldr	r3, .L1276+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1104
	ldr	r3, .L1276+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1104
	ldr	r3, .L1276+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1104
	ldr	r3, .L1276+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1104
	ldr	r3, .L1276+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1104
	ldr	r3, .L1276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L257
.L1104:
	ldr	r3, .L1276+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1106
	ldr	r3, .L1276+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1106
	ldr	r3, .L1276+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1106
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1107
.L1106:
	ldr	r3, .L1276+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1108
	ldr	r3, .L1276+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1108
	ldr	r3, .L1276+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1108
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1108
.L1107:
	ldr	r3, .L1276+564
	ldr	r3, [r3]	@ float
	ldr	r2, .L1276+560
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1108
	ldr	r3, .L1276+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1276+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1108
	ldr	r3, .L1276+284
	ldr	r2, [r3]
	ldr	r3, .L1276+280
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L1110
.L1108:
	ldr	r3, .L1276+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1110
	ldr	r3, .L1276+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1110
	ldr	r3, .L1276+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1110
	ldr	r3, .L1276+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1110
	ldr	r3, .L1276+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1110
	ldr	r3, .L1276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L257
.L1110:
	ldr	r3, .L1276+284
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L1112
	ldr	r3, .L1276+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1112
	ldr	r3, .L1276+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1112
	ldr	r3, .L1276+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1112
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1112
	ldr	r3, .L1276+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1112
	ldr	r3, .L1276+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1112
	ldr	r3, .L1276+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1112
	ldr	r3, .L1276+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1112
	ldr	r3, .L1276+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1112
	ldr	r3, .L1276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L257
.L1112:
	ldr	r3, .L1276+284
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L1114
	ldr	r3, .L1276+564
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1276+20
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1115
	mov	r3, #0
	mov	r4, r3
.L1115:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L1116
.L1114:
	ldr	r3, .L1276+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1116
	ldr	r3, .L1276+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1116
	ldr	r3, .L1276+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1116
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1116
	ldr	r3, .L1276+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1116
	ldr	r3, .L1276+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1116
	ldr	r3, .L1276+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1116
	ldr	r3, .L1276+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1116
	ldr	r3, .L1276+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1116
	ldr	r3, .L1276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L257
.L1116:
	ldr	r3, .L1276+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1276+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1118
	ldr	r3, .L1276+284
	ldr	r2, [r3]
	ldr	r3, .L1276+280
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1118
	ldr	r3, .L1276+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1119
	ldr	r3, .L1276+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1119
	ldr	r3, .L1276+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1119
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1120
.L1119:
	ldr	r3, .L1276+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1118
	ldr	r3, .L1276+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1118
	ldr	r3, .L1276+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1118
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1120
.L1118:
	ldr	r3, .L1276+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1120
	ldr	r3, .L1276+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1120
	ldr	r3, .L1276+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1120
	ldr	r3, .L1276+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1120
	ldr	r3, .L1276+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1120
	ldr	r3, .L1276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L257
.L1120:
	ldr	r3, .L1276+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1122
	ldr	r3, .L1276+564
	ldr	r3, [r3]	@ float
	ldr	r2, .L1276+560
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1123
.L1122:
	ldr	r3, .L1276+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1123
	ldr	r3, .L1276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1123
	ldr	r3, .L1276+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1123
	ldr	r3, .L1276+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1123
	ldr	r3, .L1276+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1123
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1123
	ldr	r3, .L1276+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1123
	ldr	r3, .L1276+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1123
	ldr	r3, .L1276+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1123
	ldr	r3, .L1276+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
.L1123:
	ldr	r3, .L1276+560
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1124
	ldr	r3, .L1276+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1126
.L1124:
	ldr	r3, .L1276+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1126
	ldr	r3, .L1276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1126
	ldr	r3, .L1276+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1126
	ldr	r3, .L1276+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1126
	ldr	r3, .L1276+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1126
	ldr	r3, .L1276+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1126
	ldr	r3, .L1276+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1126
	ldr	r3, .L1276+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1126
	ldr	r3, .L1276+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1126
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L1126:
	ldr	r3, .L1276+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1127
	ldr	r3, .L1276+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1127
	ldr	r3, .L1276+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1127
	ldr	r3, .L1276+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1127
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1127
	ldr	r3, .L1276+560
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1127
	ldr	r3, .L1276+284
	ldr	r2, [r3]
	ldr	r3, .L1276+280
	ldr	r3, [r3]
	b	.L1277
.L1278:
	.align	2
.L1276:
	.word	delta
	.word	p1_evt
	.word	_x_p0_l3
	.word	_x_p0_l2
	.word	_x_p0_l0
	.word	1098907648
	.word	_x_p0_l1
	.word	p9_evt
	.word	p7_evt
	.word	p6_evt
	.word	_x_p14_l3
	.word	p14_l3
	.word	_x_p15_l3
	.word	p15_l3
	.word	_x_p12_l3
	.word	p12_l3
	.word	_x_p15_l2
	.word	p15_l2
	.word	_x_p12_l2
	.word	p12_l2
	.word	_x_p15_l1
	.word	p15_l1
	.word	_x_p12_l1
	.word	p12_l1
	.word	_x_p15_l0
	.word	p15_l0
	.word	_x_p12_l0
	.word	p12_l0
	.word	_x_p15_evt
	.word	p15_evt
	.word	_x_p12_evt
	.word	p12_evt
	.word	_x_p15_c
	.word	p15_c
	.word	_x_p12_c
	.word	p12_c
	.word	_x_p10_l3
	.word	p10_l3
	.word	_x_p10_l2
	.word	p10_l2
	.word	_x_p10_l1
	.word	p10_l1
	.word	_x_p10_l0
	.word	p10_l0
	.word	_x_p10_evt
	.word	p10_evt
	.word	_x__diverge_delta
	.word	_diverge_delta
	.word	_x_p10_c
	.word	p10_c
	.word	_x_p3_l3
	.word	p3_l3
	.word	_x_p3_evt
	.word	p3_evt
	.word	_x_p0_l2
	.word	p0_l2
	.word	_x_p14_l2
	.word	p14_l2
	.word	_x_p8_l3
	.word	p8_l3
	.word	_x_p0_l1
	.word	p0_l1
	.word	_x_p2_l3
	.word	p2_l3
	.word	_x_p2_evt
	.word	p2_evt
	.word	_x_p14_evt
	.word	p14_evt
	.word	_x_delta
	.word	delta
	.word	_x_v1
	.word	v1
	.word	_x_v2
	.word	v2
	.word	_x_p8_c
	.word	p8_c
	.word	_x_p0_l3
	.word	p0_l3
	.word	_x_p14_c
	.word	p14_c
	.word	_x_p8_evt
	.word	p8_evt
	.word	_x_p14_l1
	.word	p14_l1
	.word	_x_p8_l2
	.word	p8_l2
	.word	_x_p16_evt
	.word	p16_evt
	.word	_x_p13_evt
	.word	p13_evt
	.word	_x_p4_evt
	.word	p4_evt
	.word	_x_p1_c
	.word	p1_c
	.word	_x_p9_l3
	.word	p9_l3
	.word	_x_p3_l2
	.word	p3_l2
	.word	_x_p6_l3
	.word	p6_l3
	.word	_x_p1_l3
	.word	p1_l3
	.word	_x_p0_l0
	.word	p0_l0
	.word	_x_p14_l0
	.word	p14_l0
	.word	_x_p8_l1
	.word	p8_l1
	.word	_x_p1_evt
	.word	p1_evt
	.word	_x_p16_l2
	.word	p16_l2
	.word	_x_p13_l2
	.word	p13_l2
	.word	_x_p1_l1
	.word	p1_l1
	.word	_x_p7_l3
	.word	p7_l3
	.word	_x_p4_l2
	.word	p4_l2
	.word	_x_p16_l3
	.word	p16_l3
	.word	_x_p13_l3
	.word	p13_l3
	.word	_x_p1_l2
	.word	p1_l2
	.word	_x_p4_l3
	.word	p4_l3
	.word	_x_p11_c
	.word	p11_c
	.word	_x_p5_c
	.word	p5_c
	.word	_x_p11_evt
	.word	p11_evt
	.word	_x_p2_c
	.word	p2_c
	.word	_x_p5_evt
	.word	p5_evt
	.word	_x_p11_l0
	.word	p11_l0
	.word	_x_p0_c
	.word	p0_c
	.word	_x_p5_l0
	.word	p5_l0
	.word	_x_p11_l1
	.word	p11_l1
	.word	_x_p2_l0
	.word	p2_l0
	.word	_x_p0_evt
	.word	p0_evt
	.word	_x_p5_l1
	.word	p5_l1
	.word	_x_p11_l2
	.word	p11_l2
	.word	_x_p2_l1
	.word	p2_l1
	.word	_x_p5_l2
	.word	p5_l2
	.word	_x_p11_l3
	.word	p11_l3
	.word	_x_p2_l2
	.word	p2_l2
	.word	_x_p5_l3
	.word	p5_l3
	.word	_x_p9_l0
	.word	p9_l0
	.word	_x_p6_l0
	.word	p6_l0
	.word	_x_p9_l1
	.word	p9_l1
	.word	_x_p3_l0
	.word	p3_l0
	.word	_x_p6_l1
	.word	p6_l1
	.word	_x_p9_l2
	.word	p9_l2
.L1277:
	cmp	r2, r3
	beq	.L1129
.L1127:
	ldr	r3, .L1276+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1129
	ldr	r3, .L1276+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1129
	ldr	r3, .L1276+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1129
	ldr	r3, .L1276+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1129
	ldr	r3, .L1276+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1129
	ldr	r3, .L1276+276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L257
.L1129:
	ldr	r3, .L1276+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1276+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1131
	ldr	r3, .L1276+284
	ldr	r2, [r3]
	ldr	r3, .L1276+280
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1131
	ldr	r3, .L1276+564
	ldr	r3, [r3]	@ float
	ldr	r2, .L1276+560
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1131
	ldr	r3, .L1276+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1133
	ldr	r3, .L1276+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1133
	ldr	r3, .L1276+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1133
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1134
.L1133:
	ldr	r3, .L1276+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1131
	ldr	r3, .L1276+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1131
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1131
	ldr	r3, .L1276+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1134
.L1131:
	ldr	r3, .L1276+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1134
	ldr	r3, .L1276+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1134
	ldr	r3, .L1276+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1134
	ldr	r3, .L1276+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1134
	ldr	r3, .L1276+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1134
	ldr	r3, .L1276+276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L257
.L1134:
	ldr	r3, .L1276+284
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L1136
	ldr	r3, .L1276+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1136
	ldr	r3, .L1276+276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1136
	ldr	r3, .L1276+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1136
	ldr	r3, .L1276+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1136
	ldr	r3, .L1276+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1136
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1136
	ldr	r3, .L1276+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1136
	ldr	r3, .L1276+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1136
	ldr	r3, .L1276+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1136
	ldr	r3, .L1276+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L1136:
	ldr	r3, .L1276+284
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L1137
	ldr	r3, .L1276+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
	ldr	r3, .L1276+276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1137
	ldr	r3, .L1276+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1137
	ldr	r3, .L1276+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
	ldr	r3, .L1276+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
	ldr	r3, .L1276+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1137
	ldr	r3, .L1276+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1137
	ldr	r3, .L1276+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
	ldr	r3, .L1276+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
.L1137:
	ldr	r3, .L1276+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1276+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1138
	ldr	r3, .L1276+284
	ldr	r2, [r3]
	ldr	r3, .L1276+280
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1138
	ldr	r3, .L1276+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1138
	ldr	r3, .L1276+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1138
	ldr	r3, .L1276+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1138
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1138
	ldr	r3, .L1276+560
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1139
.L1138:
	ldr	r3, .L1276+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1139
	ldr	r3, .L1276+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1139
	ldr	r3, .L1276+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1139
	ldr	r3, .L1276+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1139
	ldr	r3, .L1276+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1139
	ldr	r3, .L1276+276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L257
.L1139:
	ldr	r3, .L1276+560
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1141
	ldr	r3, .L1276+284
	ldr	r2, [r3]
	ldr	r3, .L1276+280
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1141
	ldr	r3, .L1276+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1141
	ldr	r3, .L1276+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1141
	ldr	r3, .L1276+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1141
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1141
	ldr	r3, .L1276+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1143
.L1141:
	ldr	r3, .L1276+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1143
	ldr	r3, .L1276+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1143
	ldr	r3, .L1276+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1143
	ldr	r3, .L1276+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1143
	ldr	r3, .L1276+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1143
	ldr	r3, .L1276+276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L257
.L1143:
	ldr	r3, .L1276+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1145
	ldr	r3, .L1276+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1145
	ldr	r3, .L1276+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1145
	ldr	r3, .L1276+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1145
	ldr	r3, .L1276+280
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1145
	ldr	r3, .L1276+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1276+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1145
	ldr	r3, .L1276+564
	ldr	r3, [r3]	@ float
	ldr	r2, .L1276+560
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1146
.L1145:
	ldr	r3, .L1276+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1146
	ldr	r3, .L1276+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1146
	ldr	r3, .L1276+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1146
	ldr	r3, .L1276+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1146
	ldr	r3, .L1276+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1146
	ldr	r3, .L1276+276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L257
.L1146:
	ldr	r3, .L1276+280
	ldr	r3, [r3]
	cmp	r3, #17
	beq	.L1148
	ldr	r3, .L1276+280
	ldr	r3, [r3]
	cmp	r3, #16
	beq	.L1148
	ldr	r3, .L1276+280
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L1148
	ldr	r3, .L1276+280
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L1148
	ldr	r3, .L1276+280
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L1148
	ldr	r3, .L1276+280
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L1148
	ldr	r3, .L1276+280
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L1148
	ldr	r3, .L1276+280
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L1148
	ldr	r3, .L1276+280
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L1148
	ldr	r3, .L1276+280
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L1148
	ldr	r3, .L1276+280
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L1148
	ldr	r3, .L1276+280
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L1148
	ldr	r3, .L1276+280
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L1148
	ldr	r3, .L1276+280
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L1148
	ldr	r3, .L1276+280
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L1148
	ldr	r3, .L1276+280
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L1148
	ldr	r3, .L1276+280
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L1148
	ldr	r3, .L1276+280
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L257
.L1148:
	ldr	r3, .L1276+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1276+276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1150
	ldr	r3, .L1276+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1276+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1276+284
	ldr	r2, [r3]
	ldr	r3, .L1276+280
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L257
.L1150:
	ldr	r3, .L1276+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1151
	ldr	r3, .L1276+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1151
	ldr	r3, .L1276+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1151
	ldr	r3, .L1276+356
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1151
	ldr	r3, .L1276+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1151
	ldr	r3, .L1276+532
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1151
	ldr	r3, .L1276+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1151
	ldr	r3, .L1276+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1151
	ldr	r3, .L1276+324
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1151
	ldr	r3, .L1276+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1151
	ldr	r3, .L1276+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1151
	ldr	r3, .L1276+548
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1151
	ldr	r3, .L1276+364
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1151
	ldr	r3, .L1276+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1151
	ldr	r3, .L1276+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1151
	ldr	r3, .L1276+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1151
	ldr	r3, .L1276+436
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1151
	ldr	r3, .L1276+276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L257
.L1151:
	ldr	r3, .L1276+276
	ldr	r3, [r3]	@ float
	ldr	r2, .L1276+184
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1153
	ldr	r3, .L1276+188
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L1154
	mov	r3, #0
	mov	r4, r3
.L1154:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L257
.L1153:
	ldr	r3, .L1276+188
	ldr	r3, [r3]	@ float
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L1155
	ldr	r3, .L1276+276
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1276+188
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1276+184
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
.L1155:
	mov	r3, #1
	b	.L1157
.L257:
	mov	r3, #0
.L1157:
	str	r3, [fp, #-24]
	ldr	r3, .L1276+40
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+44
	strb	r2, [r3]
	ldr	r3, .L1276+48
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+52
	strb	r2, [r3]
	ldr	r3, .L1276+56
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+60
	strb	r2, [r3]
	ldr	r3, .L1276+64
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+68
	strb	r2, [r3]
	ldr	r3, .L1276+72
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+76
	strb	r2, [r3]
	ldr	r3, .L1276+80
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+84
	strb	r2, [r3]
	ldr	r3, .L1276+88
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+92
	strb	r2, [r3]
	ldr	r3, .L1276+96
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+100
	strb	r2, [r3]
	ldr	r3, .L1276+104
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+108
	strb	r2, [r3]
	ldr	r3, .L1276+112
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+116
	strb	r2, [r3]
	ldr	r3, .L1276+120
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+124
	strb	r2, [r3]
	ldr	r3, .L1276+128
	ldr	r3, [r3]	@ float
	ldr	r2, .L1276+132
	str	r3, [r2]	@ float
	ldr	r3, .L1276+136
	ldr	r3, [r3]	@ float
	ldr	r2, .L1276+140
	str	r3, [r2]	@ float
	ldr	r3, .L1276+144
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+148
	strb	r2, [r3]
	ldr	r3, .L1276+152
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+156
	strb	r2, [r3]
	ldr	r3, .L1276+160
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+164
	strb	r2, [r3]
	ldr	r3, .L1276+168
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+172
	strb	r2, [r3]
	ldr	r3, .L1276+176
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+180
	strb	r2, [r3]
	ldr	r3, .L1276+184
	ldr	r3, [r3]	@ float
	ldr	r2, .L1276+188
	str	r3, [r2]	@ float
	ldr	r3, .L1276+192
	ldr	r3, [r3]	@ float
	ldr	r2, .L1276+196
	str	r3, [r2]	@ float
	ldr	r3, .L1276+200
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+204
	strb	r2, [r3]
	ldr	r3, .L1276+208
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+212
	strb	r2, [r3]
	ldr	r3, .L1276+216
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+220
	strb	r2, [r3]
	ldr	r3, .L1276+224
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+228
	strb	r2, [r3]
	ldr	r3, .L1276+232
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+236
	strb	r2, [r3]
	ldr	r3, .L1276+240
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+244
	strb	r2, [r3]
	ldr	r3, .L1276+248
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+252
	strb	r2, [r3]
	ldr	r3, .L1276+256
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+260
	strb	r2, [r3]
	ldr	r3, .L1276+264
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+268
	strb	r2, [r3]
	ldr	r3, .L1276+272
	ldr	r3, [r3]	@ float
	ldr	r2, .L1276+276
	str	r3, [r2]	@ float
	ldr	r3, .L1276+280
	ldr	r3, [r3]
	ldr	r2, .L1276+284
	str	r3, [r2]
	ldr	r3, .L1276+288
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+292
	strb	r2, [r3]
	ldr	r3, .L1276+296
	ldr	r3, [r3]	@ float
	ldr	r2, .L1276+300
	str	r3, [r2]	@ float
	ldr	r3, .L1276+304
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+308
	strb	r2, [r3]
	ldr	r3, .L1276+312
	ldr	r3, [r3]	@ float
	ldr	r2, .L1276+316
	str	r3, [r2]	@ float
	ldr	r3, .L1276+320
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+324
	strb	r2, [r3]
	ldr	r3, .L1276+328
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+332
	strb	r2, [r3]
	ldr	r3, .L1276+336
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+340
	strb	r2, [r3]
	ldr	r3, .L1276+344
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+348
	strb	r2, [r3]
	ldr	r3, .L1276+352
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+356
	strb	r2, [r3]
	ldr	r3, .L1276+360
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+364
	strb	r2, [r3]
	ldr	r3, .L1276+368
	ldr	r3, [r3]	@ float
	ldr	r2, .L1276+372
	str	r3, [r2]	@ float
	ldr	r3, .L1276+376
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+380
	strb	r2, [r3]
	ldr	r3, .L1276+384
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+388
	strb	r2, [r3]
	ldr	r3, .L1276+392
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+396
	strb	r2, [r3]
	ldr	r3, .L1276+400
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+404
	strb	r2, [r3]
	ldr	r3, .L1276+408
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+412
	strb	r2, [r3]
	ldr	r3, .L1276+416
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+420
	strb	r2, [r3]
	ldr	r3, .L1276+424
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+428
	strb	r2, [r3]
	ldr	r3, .L1276+432
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+436
	strb	r2, [r3]
	ldr	r3, .L1276+440
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+444
	strb	r2, [r3]
	ldr	r3, .L1276+448
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+452
	strb	r2, [r3]
	ldr	r3, .L1276+456
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+460
	strb	r2, [r3]
	ldr	r3, .L1276+464
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+468
	strb	r2, [r3]
	ldr	r3, .L1276+472
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+476
	strb	r2, [r3]
	ldr	r3, .L1276+480
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+484
	strb	r2, [r3]
	ldr	r3, .L1276+488
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+492
	strb	r2, [r3]
	ldr	r3, .L1276+496
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+500
	strb	r2, [r3]
	ldr	r3, .L1276+504
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+508
	strb	r2, [r3]
	ldr	r3, .L1276+512
	ldr	r3, [r3]	@ float
	ldr	r2, .L1276+516
	str	r3, [r2]	@ float
	ldr	r3, .L1276+520
	ldr	r3, [r3]	@ float
	ldr	r2, .L1276+524
	str	r3, [r2]	@ float
	ldr	r3, .L1276+528
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+532
	strb	r2, [r3]
	ldr	r3, .L1276+536
	ldr	r3, [r3]	@ float
	ldr	r2, .L1276+540
	str	r3, [r2]	@ float
	ldr	r3, .L1276+544
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+548
	strb	r2, [r3]
	ldr	r3, .L1276+552
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+556
	strb	r2, [r3]
	ldr	r3, .L1276+560
	ldr	r3, [r3]	@ float
	ldr	r2, .L1276+564
	str	r3, [r2]	@ float
	ldr	r3, .L1276+568
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+572
	strb	r2, [r3]
	ldr	r3, .L1276+576
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+580
	strb	r2, [r3]
	ldr	r3, .L1276+584
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+588
	strb	r2, [r3]
	ldr	r3, .L1276+592
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+596
	strb	r2, [r3]
	ldr	r3, .L1276+600
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+604
	strb	r2, [r3]
	ldr	r3, .L1276+608
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+612
	strb	r2, [r3]
	ldr	r3, .L1276+616
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+620
	strb	r2, [r3]
	ldr	r3, .L1276+624
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+628
	strb	r2, [r3]
	ldr	r3, .L1276+632
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+636
	strb	r2, [r3]
	ldr	r3, .L1276+640
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+644
	strb	r2, [r3]
	ldr	r3, .L1276+648
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+652
	strb	r2, [r3]
	ldr	r3, .L1276+656
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+660
	strb	r2, [r3]
	ldr	r3, .L1276+664
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+668
	strb	r2, [r3]
	ldr	r3, .L1276+672
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+676
	strb	r2, [r3]
	ldr	r3, .L1276+680
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+684
	strb	r2, [r3]
	ldr	r3, .L1276+688
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+692
	strb	r2, [r3]
	ldr	r3, .L1276+696
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1276+700
	strb	r2, [r3]
	ldr	r3, .L1279
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1279+4
	strb	r2, [r3]
	ldr	r3, .L1279+8
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1279+12
	strb	r2, [r3]
	ldr	r3, .L1279+16
	ldr	r3, [r3]	@ float
	ldr	r2, .L1279+20
	str	r3, [r2]	@ float
	ldr	r3, .L1279+24
	ldr	r3, [r3]	@ float
	ldr	r2, .L1279+28
	str	r3, [r2]	@ float
	ldr	r3, .L1279+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L1279+36
	str	r3, [r2]	@ float
	ldr	r3, .L1279+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L1279+44
	str	r3, [r2]	@ float
	ldr	r3, .L1279+48
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1279+52
	strb	r2, [r3]
	ldr	r3, .L1279+56
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1279+60
	strb	r2, [r3]
	ldr	r3, .L1279+64
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1279+68
	strb	r2, [r3]
	ldr	r3, .L1279+72
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1279+76
	strb	r2, [r3]
	ldr	r3, .L1279+80
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1279+84
	strb	r2, [r3]
	ldr	r3, .L1279+88
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1279+92
	strb	r2, [r3]
	ldr	r3, .L1279+96
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1279+100
	strb	r2, [r3]
	ldr	r3, .L1279+104
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1279+108
	strb	r2, [r3]
	ldr	r3, .L1279+112
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1279+116
	strb	r2, [r3]
	ldr	r3, .L1279+120
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1279+124
	strb	r2, [r3]
	ldr	r3, .L1279+128
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1279+132
	strb	r2, [r3]
	ldr	r3, .L1279+136
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1279+140
	strb	r2, [r3]
	ldr	r3, .L1279+144
	ldr	r3, [r3]	@ float
	ldr	r2, .L1279+148
	str	r3, [r2]	@ float
	ldr	r3, .L1279+152
	ldr	r3, [r3]	@ float
	ldr	r2, .L1279+156
	str	r3, [r2]	@ float
	ldr	r3, .L1279+160
	ldr	r3, [r3]	@ float
	ldr	r2, .L1279+164
	str	r3, [r2]	@ float
	ldr	r3, .L1279+168
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1279+172
	strb	r2, [r3]
	ldr	r3, .L1279+176
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1279+180
	strb	r2, [r3]
.L247:
	ldr	r3, [fp, #-24]
	cmp	r3, #0
	bne	.L1158
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
.L1280:
	.align	2
.L1279:
	.word	_x_p3_l1
	.word	p3_l1
	.word	_x_p6_l2
	.word	p6_l2
	.word	_x_p7_c
	.word	p7_c
	.word	_x_p16_c
	.word	p16_c
	.word	_x_p13_c
	.word	p13_c
	.word	_x_p4_c
	.word	p4_c
	.word	_x_p7_evt
	.word	p7_evt
	.word	_x_p7_l0
	.word	p7_l0
	.word	_x_p16_l0
	.word	p16_l0
	.word	_x_p13_l0
	.word	p13_l0
	.word	_x_p4_l0
	.word	p4_l0
	.word	_x_p7_l1
	.word	p7_l1
	.word	_x_p16_l1
	.word	p16_l1
	.word	_x_p13_l1
	.word	p13_l1
	.word	_x_p1_l0
	.word	p1_l0
	.word	_x_p4_l1
	.word	p4_l1
	.word	_x_p7_l2
	.word	p7_l2
	.word	_x_p8_l0
	.word	p8_l0
	.word	_x_p6_c
	.word	p6_c
	.word	_x_p9_c
	.word	p9_c
	.word	_x_p3_c
	.word	p3_c
	.word	_x_p6_evt
	.word	p6_evt
	.word	_x_p9_evt
	.word	p9_evt
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
