	.file	"894219.c"
	.intel_syntax noprefix
	.text
	.globl	g
	.bss
	.align 32
	.type	g, @object
	.size	g, 102204
g:
	.zero	102204
	.globl	disc
	.align 32
	.type	disc, @object
	.size	disc, 51
disc:
	.zero	51
	.globl	valid
	.align 32
	.type	valid, @object
	.size	valid, 51
valid:
	.zero	51
	.globl	cap
	.align 32
	.type	cap, @object
	.size	cap, 5202
cap:
	.zero	5202
	.globl	p
	.align 32
	.type	p, @object
	.size	p, 102
p:
	.zero	102
	.globl	X
	.align 32
	.type	X, @object
	.size	X, 102
X:
	.zero	102
	.globl	r
	.align 4
	.type	r, @object
	.size	r, 4
r:
	.zero	4
	.globl	t
	.align 4
	.type	t, @object
	.size	t, 4
t:
	.zero	4
	.text
	.globl	min
	.type	min, @function
min:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -4[rbp]
	cmp	DWORD PTR -8[rbp], eax
	cmovle	eax, DWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	min, .-min
	.globl	init_queue
	.type	init_queue, @function
init_queue:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR 204[rax], 0
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR 208[rax], 50
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR 212[rax], 0
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	init_queue, .-init_queue
	.globl	enqueue
	.type	enqueue, @function
enqueue:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	DWORD PTR -12[rbp], esi
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 208[rax]
	lea	edx, 1[rax]
	movsx	rax, edx
	imul	rax, rax, -1600085855
	shr	rax, 32
	add	eax, edx
	sar	eax, 5
	mov	ecx, edx
	sar	ecx, 31
	sub	eax, ecx
	imul	ecx, eax, 51
	mov	eax, edx
	sub	eax, ecx
	mov	rdx, QWORD PTR -8[rbp]
	mov	DWORD PTR 208[rdx], eax
	mov	rax, QWORD PTR -8[rbp]
	mov	edx, DWORD PTR 208[rax]
	mov	rax, QWORD PTR -8[rbp]
	movsx	rdx, edx
	mov	ecx, DWORD PTR -12[rbp]
	mov	DWORD PTR [rax+rdx*4], ecx
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 212[rax]
	lea	edx, 1[rax]
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR 212[rax], edx
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	enqueue, .-enqueue
	.globl	dequeue
	.type	dequeue, @function
dequeue:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	edx, DWORD PTR 204[rax]
	mov	rax, QWORD PTR -24[rbp]
	movsx	rdx, edx
	mov	eax, DWORD PTR [rax+rdx*4]
	mov	DWORD PTR -4[rbp], eax
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 204[rax]
	lea	edx, 1[rax]
	movsx	rax, edx
	imul	rax, rax, -1600085855
	shr	rax, 32
	add	eax, edx
	sar	eax, 5
	mov	ecx, edx
	sar	ecx, 31
	sub	eax, ecx
	imul	ecx, eax, 51
	mov	eax, edx
	sub	eax, ecx
	mov	rdx, QWORD PTR -24[rbp]
	mov	DWORD PTR 204[rdx], eax
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 212[rax]
	lea	edx, -1[rax]
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR 212[rax], edx
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	dequeue, .-dequeue
	.globl	empty
	.type	empty, @function
empty:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 212[rax]
	test	eax, eax
	sete	al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	empty, .-empty
	.globl	bfs
	.type	bfs, @function
bfs:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 256
	mov	DWORD PTR -244[rbp], edi
	mov	DWORD PTR -248[rbp], esi
	mov	QWORD PTR -256[rbp], rdx
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	lea	rax, -224[rbp]
	mov	rdi, rax
	call	init_queue
	mov	edx, DWORD PTR -244[rbp]
	lea	rax, -224[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	enqueue
	mov	DWORD PTR -236[rbp], 0
	jmp	.L10
.L11:
	mov	eax, DWORD PTR -236[rbp]
	cdqe
	lea	rdx, disc[rip]
	mov	BYTE PTR [rax+rdx], 0
	mov	eax, DWORD PTR -236[rbp]
	cdqe
	lea	rdx, [rax+rax]
	lea	rax, p[rip]
	mov	WORD PTR [rdx+rax], -1
	add	DWORD PTR -236[rbp], 1
.L10:
	mov	eax, DWORD PTR r[rip]
	cmp	DWORD PTR -236[rbp], eax
	jle	.L11
	mov	eax, DWORD PTR -244[rbp]
	cdqe
	lea	rdx, disc[rip]
	mov	BYTE PTR [rax+rdx], 1
	jmp	.L12
.L17:
	lea	rax, -224[rbp]
	mov	rdi, rax
	call	dequeue
	mov	DWORD PTR -228[rbp], eax
	mov	DWORD PTR -236[rbp], 0
	jmp	.L13
.L15:
	mov	eax, DWORD PTR -236[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -228[rbp]
	cdqe
	imul	rax, rax, 1001
	add	rax, rdx
	lea	rdx, [rax+rax]
	lea	rax, g[rip]
	movzx	eax, WORD PTR [rdx+rax]
	cwde
	mov	DWORD PTR -240[rbp], eax
	mov	eax, DWORD PTR -228[rbp]
	cdqe
	imul	rdx, rax, 102
	mov	rax, QWORD PTR -256[rbp]
	add	rdx, rax
	mov	eax, DWORD PTR -240[rbp]
	cdqe
	movzx	eax, WORD PTR [rdx+rax*2]
	test	ax, ax
	jle	.L14
	mov	eax, DWORD PTR -240[rbp]
	cdqe
	lea	rdx, disc[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	jne	.L14
	mov	eax, DWORD PTR -240[rbp]
	cdqe
	lea	rdx, valid[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	je	.L14
	mov	eax, DWORD PTR -240[rbp]
	cdqe
	lea	rdx, disc[rip]
	mov	BYTE PTR [rax+rdx], 1
	mov	edx, DWORD PTR -240[rbp]
	lea	rax, -224[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	enqueue
	mov	eax, DWORD PTR -228[rbp]
	mov	ecx, eax
	mov	eax, DWORD PTR -240[rbp]
	cdqe
	lea	rdx, [rax+rax]
	lea	rax, p[rip]
	mov	WORD PTR [rdx+rax], cx
	mov	eax, DWORD PTR -240[rbp]
	cmp	eax, DWORD PTR -248[rbp]
	jne	.L14
	jmp	.L12
.L14:
	add	DWORD PTR -236[rbp], 1
.L13:
	mov	eax, DWORD PTR -228[rbp]
	cdqe
	add	rax, 51048
	lea	rdx, [rax+rax]
	lea	rax, g[rip+6]
	movzx	eax, WORD PTR [rdx+rax]
	cwde
	cmp	DWORD PTR -236[rbp], eax
	jl	.L15
.L12:
	lea	rax, -224[rbp]
	mov	rdi, rax
	call	empty
	test	al, al
	jne	.L16
	mov	eax, DWORD PTR -248[rbp]
	cdqe
	lea	rdx, disc[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	je	.L17
.L16:
	mov	DWORD PTR -232[rbp], 1000000000
	mov	eax, DWORD PTR -248[rbp]
	mov	DWORD PTR -240[rbp], eax
	jmp	.L18
.L19:
	mov	eax, DWORD PTR -240[rbp]
	cdqe
	lea	rdx, [rax+rax]
	lea	rax, p[rip]
	movzx	eax, WORD PTR [rdx+rax]
	cwde
	mov	DWORD PTR -228[rbp], eax
	mov	eax, DWORD PTR -228[rbp]
	cdqe
	imul	rdx, rax, 102
	mov	rax, QWORD PTR -256[rbp]
	add	rdx, rax
	mov	eax, DWORD PTR -240[rbp]
	cdqe
	movzx	eax, WORD PTR [rdx+rax*2]
	movsx	edx, ax
	mov	eax, DWORD PTR -232[rbp]
	mov	esi, edx
	mov	edi, eax
	call	min
	mov	DWORD PTR -232[rbp], eax
	mov	eax, DWORD PTR -228[rbp]
	mov	DWORD PTR -240[rbp], eax
.L18:
	mov	eax, DWORD PTR -240[rbp]
	cdqe
	lea	rdx, [rax+rax]
	lea	rax, p[rip]
	movzx	eax, WORD PTR [rdx+rax]
	test	ax, ax
	jns	.L19
	mov	eax, DWORD PTR -248[rbp]
	mov	DWORD PTR -240[rbp], eax
	jmp	.L20
.L21:
	mov	eax, DWORD PTR -240[rbp]
	cdqe
	lea	rdx, [rax+rax]
	lea	rax, p[rip]
	movzx	eax, WORD PTR [rdx+rax]
	cwde
	mov	DWORD PTR -228[rbp], eax
	mov	eax, DWORD PTR -228[rbp]
	cdqe
	imul	rdx, rax, 102
	mov	rax, QWORD PTR -256[rbp]
	add	rdx, rax
	mov	eax, DWORD PTR -240[rbp]
	cdqe
	movzx	eax, WORD PTR [rdx+rax*2]
	mov	edx, eax
	mov	eax, DWORD PTR -232[rbp]
	mov	ecx, edx
	sub	ecx, eax
	mov	eax, DWORD PTR -228[rbp]
	cdqe
	imul	rdx, rax, 102
	mov	rax, QWORD PTR -256[rbp]
	add	rdx, rax
	mov	eax, DWORD PTR -240[rbp]
	cdqe
	mov	WORD PTR [rdx+rax*2], cx
	mov	eax, DWORD PTR -240[rbp]
	cdqe
	imul	rdx, rax, 102
	mov	rax, QWORD PTR -256[rbp]
	add	rdx, rax
	mov	eax, DWORD PTR -228[rbp]
	cdqe
	movzx	eax, WORD PTR [rdx+rax*2]
	mov	edx, eax
	mov	eax, DWORD PTR -232[rbp]
	lea	ecx, [rdx+rax]
	mov	eax, DWORD PTR -240[rbp]
	cdqe
	imul	rdx, rax, 102
	mov	rax, QWORD PTR -256[rbp]
	add	rdx, rax
	mov	eax, DWORD PTR -228[rbp]
	cdqe
	mov	WORD PTR [rdx+rax*2], cx
	mov	eax, DWORD PTR -228[rbp]
	mov	DWORD PTR -240[rbp], eax
.L20:
	mov	eax, DWORD PTR -240[rbp]
	cdqe
	lea	rdx, [rax+rax]
	lea	rax, p[rip]
	movzx	eax, WORD PTR [rdx+rax]
	test	ax, ax
	jns	.L21
	cmp	DWORD PTR -232[rbp], 1000000000
	jne	.L22
	mov	eax, 0
	jmp	.L24
.L22:
	mov	eax, DWORD PTR -232[rbp]
.L24:
	mov	rsi, QWORD PTR -8[rbp]
	sub	rsi, QWORD PTR fs:40
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	bfs, .-bfs
	.globl	maxflow
	.type	maxflow, @function
maxflow:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	QWORD PTR -32[rbp], rdx
	mov	DWORD PTR -8[rbp], 0
	jmp	.L27
.L28:
	mov	eax, DWORD PTR -4[rbp]
	add	DWORD PTR -8[rbp], eax
.L27:
	mov	rdx, QWORD PTR -32[rbp]
	mov	ecx, DWORD PTR -24[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	esi, ecx
	mov	edi, eax
	call	bfs
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 0
	jne	.L28
	mov	eax, DWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	maxflow, .-maxflow
	.section	.rodata
.LC0:
	.string	"%d %d"
.LC1:
	.string	"Case %d: %d\n\n"
	.text
	.globl	main
	.type	main, @function
main:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 4096
	or	QWORD PTR [rsp], 0
	sub	rsp, 1152
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -5220[rbp], 0
	jmp	.L31
.L71:
	mov	eax, DWORD PTR r[rip]
	test	eax, eax
	jne	.L32
	mov	eax, DWORD PTR t[rip]
	test	eax, eax
	je	.L74
.L32:
	add	DWORD PTR -5220[rbp], 1
	mov	DWORD PTR -5236[rbp], 0
	jmp	.L34
.L35:
	mov	eax, DWORD PTR -5236[rbp]
	cdqe
	add	rax, 51048
	lea	rdx, [rax+rax]
	lea	rax, g[rip+6]
	mov	WORD PTR [rdx+rax], 0
	add	DWORD PTR -5236[rbp], 1
.L34:
	mov	eax, DWORD PTR r[rip]
	cmp	DWORD PTR -5236[rbp], eax
	jle	.L35
	mov	DWORD PTR -5232[rbp], 0
	jmp	.L36
.L39:
	mov	DWORD PTR -5228[rbp], 0
	jmp	.L37
.L38:
	mov	eax, DWORD PTR -5228[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -5232[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	mov	rdx, rax
	sal	rdx, 4
	add	rax, rdx
	add	rax, rcx
	lea	rdx, [rax+rax]
	lea	rax, cap[rip]
	mov	WORD PTR [rdx+rax], 0
	add	DWORD PTR -5228[rbp], 1
.L37:
	mov	eax, DWORD PTR r[rip]
	cmp	DWORD PTR -5228[rbp], eax
	jle	.L38
	add	DWORD PTR -5232[rbp], 1
.L36:
	mov	eax, DWORD PTR r[rip]
	cmp	DWORD PTR -5232[rbp], eax
	jle	.L39
	mov	DWORD PTR -5236[rbp], 0
	jmp	.L40
.L47:
	lea	rdx, -5240[rbp]
	lea	rax, -5244[rbp]
	mov	rsi, rax
	lea	rdi, .LC0[rip]
	mov	eax, 0
	call	__isoc99_scanf@PLT
	mov	DWORD PTR -5232[rbp], 0
	jmp	.L41
.L44:
	mov	eax, DWORD PTR -5244[rbp]
	mov	edx, DWORD PTR -5232[rbp]
	movsx	rdx, edx
	cdqe
	imul	rax, rax, 1001
	add	rax, rdx
	lea	rdx, [rax+rax]
	lea	rax, g[rip]
	movzx	eax, WORD PTR [rdx+rax]
	movsx	edx, ax
	mov	eax, DWORD PTR -5240[rbp]
	cmp	edx, eax
	je	.L75
	add	DWORD PTR -5232[rbp], 1
.L41:
	mov	eax, DWORD PTR -5244[rbp]
	cdqe
	add	rax, 51048
	lea	rdx, [rax+rax]
	lea	rax, g[rip+6]
	movzx	eax, WORD PTR [rdx+rax]
	cwde
	cmp	DWORD PTR -5232[rbp], eax
	jl	.L44
	jmp	.L43
.L75:
	nop
.L43:
	mov	eax, DWORD PTR -5244[rbp]
	cdqe
	add	rax, 51048
	lea	rdx, [rax+rax]
	lea	rax, g[rip+6]
	movzx	eax, WORD PTR [rdx+rax]
	cwde
	cmp	DWORD PTR -5232[rbp], eax
	jne	.L45
	mov	edx, DWORD PTR -5240[rbp]
	mov	ecx, DWORD PTR -5244[rbp]
	movsx	rdi, ecx
	movsx	rsi, edx
	mov	rax, rsi
	add	rax, rax
	add	rax, rsi
	mov	rsi, rax
	sal	rsi, 4
	add	rax, rsi
	add	rax, rdi
	lea	rsi, [rax+rax]
	lea	rax, cap[rip]
	mov	WORD PTR [rsi+rax], 1
	mov	esi, DWORD PTR -5244[rbp]
	mov	edi, DWORD PTR -5240[rbp]
	movsx	rcx, ecx
	movsx	rdx, edx
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	mov	rdx, rax
	sal	rdx, 4
	add	rax, rdx
	add	rax, rcx
	lea	rdx, [rax+rax]
	lea	rax, cap[rip]
	movzx	edx, WORD PTR [rdx+rax]
	movsx	rdi, edi
	movsx	rcx, esi
	mov	rax, rcx
	add	rax, rax
	add	rax, rcx
	mov	rcx, rax
	sal	rcx, 4
	add	rax, rcx
	add	rax, rdi
	lea	rcx, [rax+rax]
	lea	rax, cap[rip]
	mov	WORD PTR [rcx+rax], dx
	mov	esi, DWORD PTR -5240[rbp]
	mov	ecx, DWORD PTR -5244[rbp]
	mov	edx, DWORD PTR -5244[rbp]
	movsx	rax, edx
	add	rax, 51048
	lea	rdi, [rax+rax]
	lea	rax, g[rip+6]
	movzx	eax, WORD PTR [rdi+rax]
	mov	edi, eax
	add	edi, 1
	mov	r8d, edi
	movsx	rdx, edx
	add	rdx, 51048
	lea	rdi, [rdx+rdx]
	lea	rdx, g[rip+6]
	mov	WORD PTR [rdi+rdx], r8w
	cwde
	movsx	rdx, eax
	movsx	rax, ecx
	imul	rax, rax, 1001
	add	rax, rdx
	lea	rdx, [rax+rax]
	lea	rax, g[rip]
	mov	WORD PTR [rdx+rax], si
	mov	esi, DWORD PTR -5244[rbp]
	mov	ecx, DWORD PTR -5240[rbp]
	mov	edx, DWORD PTR -5240[rbp]
	movsx	rax, edx
	add	rax, 51048
	lea	rdi, [rax+rax]
	lea	rax, g[rip+6]
	movzx	eax, WORD PTR [rdi+rax]
	mov	edi, eax
	add	edi, 1
	mov	r8d, edi
	movsx	rdx, edx
	add	rdx, 51048
	lea	rdi, [rdx+rdx]
	lea	rdx, g[rip+6]
	mov	WORD PTR [rdi+rdx], r8w
	cwde
	movsx	rdx, eax
	movsx	rax, ecx
	imul	rax, rax, 1001
	add	rax, rdx
	lea	rdx, [rax+rax]
	lea	rax, g[rip]
	mov	WORD PTR [rdx+rax], si
	jmp	.L46
.L45:
	mov	edx, DWORD PTR -5240[rbp]
	mov	ecx, DWORD PTR -5244[rbp]
	movsx	rdi, ecx
	movsx	rsi, edx
	mov	rax, rsi
	add	rax, rax
	add	rax, rsi
	mov	rsi, rax
	sal	rsi, 4
	add	rax, rsi
	add	rax, rdi
	lea	rsi, [rax+rax]
	lea	rax, cap[rip]
	movzx	eax, WORD PTR [rsi+rax]
	add	eax, 1
	mov	edi, eax
	movsx	r8, ecx
	movsx	rsi, edx
	mov	rax, rsi
	add	rax, rax
	add	rax, rsi
	mov	rsi, rax
	sal	rsi, 4
	add	rax, rsi
	add	rax, r8
	lea	rsi, [rax+rax]
	lea	rax, cap[rip]
	mov	WORD PTR [rsi+rax], di
	mov	esi, DWORD PTR -5244[rbp]
	mov	edi, DWORD PTR -5240[rbp]
	movsx	rcx, ecx
	movsx	rdx, edx
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	mov	rdx, rax
	sal	rdx, 4
	add	rax, rdx
	add	rax, rcx
	lea	rdx, [rax+rax]
	lea	rax, cap[rip]
	movzx	edx, WORD PTR [rdx+rax]
	movsx	rdi, edi
	movsx	rcx, esi
	mov	rax, rcx
	add	rax, rax
	add	rax, rcx
	mov	rcx, rax
	sal	rcx, 4
	add	rax, rcx
	add	rax, rdi
	lea	rcx, [rax+rax]
	lea	rax, cap[rip]
	mov	WORD PTR [rcx+rax], dx
.L46:
	add	DWORD PTR -5236[rbp], 1
.L40:
	mov	eax, DWORD PTR t[rip]
	cmp	DWORD PTR -5236[rbp], eax
	jl	.L47
	mov	DWORD PTR -5236[rbp], 0
	jmp	.L48
.L49:
	mov	eax, DWORD PTR -5236[rbp]
	cdqe
	lea	rdx, valid[rip]
	mov	BYTE PTR [rax+rdx], 1
	add	DWORD PTR -5236[rbp], 1
.L48:
	mov	eax, DWORD PTR r[rip]
	cmp	DWORD PTR -5236[rbp], eax
	jle	.L49
	mov	DWORD PTR -5236[rbp], 1
	jmp	.L50
.L55:
	mov	DWORD PTR -5232[rbp], 0
	jmp	.L51
.L54:
	mov	DWORD PTR -5228[rbp], 0
	jmp	.L52
.L53:
	mov	eax, DWORD PTR -5228[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -5232[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	mov	rdx, rax
	sal	rdx, 4
	add	rax, rdx
	add	rax, rcx
	lea	rdx, [rax+rax]
	lea	rax, cap[rip]
	movzx	edx, WORD PTR [rdx+rax]
	mov	eax, DWORD PTR -5228[rbp]
	movsx	rsi, eax
	mov	eax, DWORD PTR -5232[rbp]
	movsx	rcx, eax
	mov	rax, rcx
	add	rax, rax
	add	rax, rcx
	mov	rcx, rax
	sal	rcx, 4
	add	rax, rcx
	add	rax, rsi
	mov	WORD PTR -5216[rbp+rax*2], dx
	add	DWORD PTR -5228[rbp], 1
.L52:
	mov	eax, DWORD PTR r[rip]
	cmp	DWORD PTR -5228[rbp], eax
	jle	.L53
	add	DWORD PTR -5232[rbp], 1
.L51:
	mov	eax, DWORD PTR r[rip]
	cmp	DWORD PTR -5232[rbp], eax
	jle	.L54
	lea	rdx, -5216[rbp]
	mov	eax, DWORD PTR -5236[rbp]
	mov	esi, 0
	mov	edi, eax
	call	maxflow
	mov	ecx, eax
	mov	eax, DWORD PTR -5236[rbp]
	cdqe
	lea	rdx, [rax+rax]
	lea	rax, X[rip]
	mov	WORD PTR [rdx+rax], cx
	add	DWORD PTR -5236[rbp], 1
.L50:
	mov	eax, DWORD PTR r[rip]
	cmp	DWORD PTR -5236[rbp], eax
	jle	.L55
	jmp	.L56
.L70:
	mov	DWORD PTR -5224[rbp], 1000000000
	mov	DWORD PTR -5236[rbp], 1
	jmp	.L57
.L59:
	mov	eax, DWORD PTR -5236[rbp]
	cdqe
	lea	rdx, valid[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	je	.L58
	mov	eax, DWORD PTR -5236[rbp]
	cdqe
	lea	rdx, [rax+rax]
	lea	rax, X[rip]
	movzx	eax, WORD PTR [rdx+rax]
	cwde
	cmp	DWORD PTR -5224[rbp], eax
	jle	.L58
	mov	eax, DWORD PTR -5236[rbp]
	cdqe
	lea	rdx, [rax+rax]
	lea	rax, X[rip]
	movzx	eax, WORD PTR [rdx+rax]
	cwde
	mov	DWORD PTR -5224[rbp], eax
.L58:
	add	DWORD PTR -5236[rbp], 1
.L57:
	mov	eax, DWORD PTR r[rip]
	cmp	DWORD PTR -5236[rbp], eax
	jle	.L59
	mov	DWORD PTR -5236[rbp], 1
	jmp	.L60
.L62:
	mov	eax, DWORD PTR -5236[rbp]
	cdqe
	lea	rdx, [rax+rax]
	lea	rax, X[rip]
	movzx	eax, WORD PTR [rdx+rax]
	cwde
	cmp	DWORD PTR -5224[rbp], eax
	jne	.L61
	mov	eax, DWORD PTR -5236[rbp]
	cdqe
	lea	rdx, valid[rip]
	mov	BYTE PTR [rax+rdx], 0
.L61:
	add	DWORD PTR -5236[rbp], 1
.L60:
	mov	eax, DWORD PTR r[rip]
	cmp	DWORD PTR -5236[rbp], eax
	jle	.L62
	mov	DWORD PTR -5236[rbp], 1
	jmp	.L63
.L69:
	mov	eax, DWORD PTR -5236[rbp]
	cdqe
	lea	rdx, valid[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	je	.L64
	mov	DWORD PTR -5232[rbp], 0
	jmp	.L65
.L68:
	mov	DWORD PTR -5228[rbp], 0
	jmp	.L66
.L67:
	mov	eax, DWORD PTR -5228[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -5232[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	mov	rdx, rax
	sal	rdx, 4
	add	rax, rdx
	add	rax, rcx
	lea	rdx, [rax+rax]
	lea	rax, cap[rip]
	movzx	edx, WORD PTR [rdx+rax]
	mov	eax, DWORD PTR -5228[rbp]
	movsx	rsi, eax
	mov	eax, DWORD PTR -5232[rbp]
	movsx	rcx, eax
	mov	rax, rcx
	add	rax, rax
	add	rax, rcx
	mov	rcx, rax
	sal	rcx, 4
	add	rax, rcx
	add	rax, rsi
	mov	WORD PTR -5216[rbp+rax*2], dx
	add	DWORD PTR -5228[rbp], 1
.L66:
	mov	eax, DWORD PTR r[rip]
	cmp	DWORD PTR -5228[rbp], eax
	jle	.L67
	add	DWORD PTR -5232[rbp], 1
.L65:
	mov	eax, DWORD PTR r[rip]
	cmp	DWORD PTR -5232[rbp], eax
	jle	.L68
	lea	rdx, -5216[rbp]
	mov	eax, DWORD PTR -5236[rbp]
	mov	esi, 0
	mov	edi, eax
	call	maxflow
	mov	edx, DWORD PTR -5224[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -5236[rbp]
	cdqe
	lea	rcx, [rax+rax]
	lea	rax, X[rip]
	movzx	eax, WORD PTR [rcx+rax]
	cwde
	mov	esi, edx
	mov	edi, eax
	call	min
	mov	ecx, eax
	mov	eax, DWORD PTR -5236[rbp]
	cdqe
	lea	rdx, [rax+rax]
	lea	rax, X[rip]
	mov	WORD PTR [rdx+rax], cx
.L64:
	add	DWORD PTR -5236[rbp], 1
.L63:
	mov	eax, DWORD PTR r[rip]
	cmp	DWORD PTR -5236[rbp], eax
	jle	.L69
.L56:
	movzx	eax, BYTE PTR valid[rip+1]
	test	al, al
	jne	.L70
	movzx	eax, WORD PTR X[rip+2]
	movsx	edx, ax
	mov	eax, DWORD PTR -5220[rbp]
	mov	esi, eax
	lea	rdi, .LC1[rip]
	mov	eax, 0
	call	printf@PLT
.L31:
	lea	rdx, t[rip]
	lea	rsi, r[rip]
	lea	rdi, .LC0[rip]
	mov	eax, 0
	call	__isoc99_scanf@PLT
	test	eax, eax
	jne	.L71
	jmp	.L33
.L74:
	nop
.L33:
	mov	eax, 0
	mov	rdi, QWORD PTR -8[rbp]
	sub	rdi, QWORD PTR fs:40
	je	.L73
	call	__stack_chk_fail@PLT
.L73:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	main, .-main
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"894219.c"
	.text
	.comm	g,102204,4
	.comm	disc,51,4
	.comm	valid,51,4
	.comm	cap,5202,4
	.comm	p,102,4
	.comm	X,102,4
	.comm	r,4,4
	.comm	t,4,4
	.align	2
	.global	min
	.syntax unified
	.arm
	.fpu softvfp
	.type	min, %function
min:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-12]
	ldr	r3, [fp, #-8]
	cmp	r2, r3
	movlt	r3, r2
	movge	r3, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	min, .-min
	.align	2
	.global	init_queue
	.syntax unified
	.arm
	.fpu softvfp
	.type	init_queue, %function
init_queue:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r2, #0
	str	r2, [r3, #204]
	ldr	r3, [fp, #-8]
	mov	r2, #50
	str	r2, [r3, #208]
	ldr	r3, [fp, #-8]
	mov	r2, #0
	str	r2, [r3, #212]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	init_queue, .-init_queue
	.align	2
	.global	enqueue
	.syntax unified
	.arm
	.fpu softvfp
	.type	enqueue, %function
enqueue:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-8]
	ldr	r3, [r3, #208]
	add	r2, r3, #1
	ldr	r3, .L5
	smull	r1, r3, r2, r3
	add	r3, r3, r2
	asr	r1, r3, #5
	asr	r3, r2, #31
	sub	r1, r1, r3
	mov	r3, r1
	lsl	r3, r3, #1
	add	r3, r3, r1
	lsl	r1, r3, #4
	add	r3, r3, r1
	sub	r1, r2, r3
	ldr	r3, [fp, #-8]
	str	r1, [r3, #208]
	ldr	r3, [fp, #-8]
	ldr	r2, [r3, #208]
	ldr	r3, [fp, #-8]
	ldr	r1, [fp, #-12]
	str	r1, [r3, r2, lsl #2]
	ldr	r3, [fp, #-8]
	ldr	r3, [r3, #212]
	add	r2, r3, #1
	ldr	r3, [fp, #-8]
	str	r2, [r3, #212]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L6:
	.align	2
.L5:
	.word	-1600085855
	.size	enqueue, .-enqueue
	.align	2
	.global	dequeue
	.syntax unified
	.arm
	.fpu softvfp
	.type	dequeue, %function
dequeue:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	ldr	r2, [r3, #204]
	ldr	r3, [fp, #-16]
	ldr	r3, [r3, r2, lsl #2]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-16]
	ldr	r3, [r3, #204]
	add	r2, r3, #1
	ldr	r3, .L9
	smull	r1, r3, r2, r3
	add	r3, r3, r2
	asr	r1, r3, #5
	asr	r3, r2, #31
	sub	r1, r1, r3
	mov	r3, r1
	lsl	r3, r3, #1
	add	r3, r3, r1
	lsl	r1, r3, #4
	add	r3, r3, r1
	sub	r1, r2, r3
	ldr	r3, [fp, #-16]
	str	r1, [r3, #204]
	ldr	r3, [fp, #-16]
	ldr	r3, [r3, #212]
	sub	r2, r3, #1
	ldr	r3, [fp, #-16]
	str	r2, [r3, #212]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L10:
	.align	2
.L9:
	.word	-1600085855
	.size	dequeue, .-dequeue
	.align	2
	.global	empty
	.syntax unified
	.arm
	.fpu softvfp
	.type	empty, %function
empty:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldr	r3, [r3, #212]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	empty, .-empty
	.section	.rodata
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	bfs
	.syntax unified
	.arm
	.fpu softvfp
	.type	bfs, %function
bfs:
	@ args = 0, pretend = 0, frame = 256
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #256
	str	r0, [fp, #-248]
	str	r1, [fp, #-252]
	str	r2, [fp, #-256]
	ldr	r3, .L30
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	sub	r3, fp, #224
	mov	r0, r3
	bl	init_queue
	sub	r3, fp, #224
	ldr	r1, [fp, #-248]
	mov	r0, r3
	bl	enqueue
	mov	r3, #0
	str	r3, [fp, #-236]
	b	.L14
.L15:
	ldr	r2, .L30+4
	ldr	r3, [fp, #-236]
	add	r3, r2, r3
	mov	r2, #0
	strb	r2, [r3]
	ldr	r2, .L30+8
	ldr	r3, [fp, #-236]
	lsl	r3, r3, #1
	add	r3, r2, r3
	mvn	r2, #0
	strh	r2, [r3]	@ movhi
	ldr	r3, [fp, #-236]
	add	r3, r3, #1
	str	r3, [fp, #-236]
.L14:
	ldr	r3, .L30+12
	ldr	r3, [r3]
	ldr	r2, [fp, #-236]
	cmp	r2, r3
	ble	.L15
	ldr	r2, .L30+4
	ldr	r3, [fp, #-248]
	add	r3, r2, r3
	mov	r2, #1
	strb	r2, [r3]
	b	.L16
.L21:
	sub	r3, fp, #224
	mov	r0, r3
	bl	dequeue
	str	r0, [fp, #-228]
	mov	r3, #0
	str	r3, [fp, #-236]
	b	.L17
.L19:
	ldr	r1, .L30+16
	ldr	r2, [fp, #-228]
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	lsl	r3, r3, #4
	sub	r3, r3, r2
	lsl	r2, r3, #3
	sub	r2, r2, r3
	ldr	r3, [fp, #-236]
	add	r3, r2, r3
	lsl	r3, r3, #1
	add	r3, r1, r3
	ldrsh	r3, [r3]
	str	r3, [fp, #-240]
	ldr	r2, [fp, #-228]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r2, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #1
	mov	r2, r3
	ldr	r3, [fp, #-256]
	add	r2, r3, r2
	ldr	r3, [fp, #-240]
	lsl	r3, r3, #1
	add	r3, r2, r3
	ldrsh	r3, [r3]
	cmp	r3, #0
	ble	.L18
	ldr	r2, .L30+4
	ldr	r3, [fp, #-240]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L18
	ldr	r2, .L30+20
	ldr	r3, [fp, #-240]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L18
	ldr	r2, .L30+4
	ldr	r3, [fp, #-240]
	add	r3, r2, r3
	mov	r2, #1
	strb	r2, [r3]
	sub	r3, fp, #224
	ldr	r1, [fp, #-240]
	mov	r0, r3
	bl	enqueue
	ldr	r3, [fp, #-228]
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r1, .L30+8
	ldr	r3, [fp, #-240]
	lsl	r3, r3, #1
	add	r3, r1, r3
	strh	r2, [r3]	@ movhi
	ldr	r2, [fp, #-240]
	ldr	r3, [fp, #-252]
	cmp	r2, r3
	bne	.L18
	b	.L16
.L18:
	ldr	r3, [fp, #-236]
	add	r3, r3, #1
	str	r3, [fp, #-236]
.L17:
	ldr	r2, .L30+16
	ldr	r3, [fp, #-228]
	add	r3, r3, #50944
	add	r3, r3, #104
	lsl	r3, r3, #1
	add	r3, r2, r3
	add	r3, r3, #6
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, [fp, #-236]
	cmp	r3, r2
	blt	.L19
.L16:
	sub	r3, fp, #224
	mov	r0, r3
	bl	empty
	mov	r3, r0
	cmp	r3, #0
	bne	.L20
	ldr	r2, .L30+4
	ldr	r3, [fp, #-252]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L21
.L20:
	ldr	r3, .L30+24
	str	r3, [fp, #-232]
	ldr	r3, [fp, #-252]
	str	r3, [fp, #-240]
	b	.L22
.L23:
	ldr	r2, .L30+8
	ldr	r3, [fp, #-240]
	lsl	r3, r3, #1
	add	r3, r2, r3
	ldrsh	r3, [r3]
	str	r3, [fp, #-228]
	ldr	r2, [fp, #-228]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r2, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #1
	mov	r2, r3
	ldr	r3, [fp, #-256]
	add	r2, r3, r2
	ldr	r3, [fp, #-240]
	lsl	r3, r3, #1
	add	r3, r2, r3
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r0, [fp, #-232]
	bl	min
	str	r0, [fp, #-232]
	ldr	r3, [fp, #-228]
	str	r3, [fp, #-240]
.L22:
	ldr	r2, .L30+8
	ldr	r3, [fp, #-240]
	lsl	r3, r3, #1
	add	r3, r2, r3
	ldrsh	r3, [r3]
	cmp	r3, #0
	bge	.L23
	ldr	r3, [fp, #-252]
	str	r3, [fp, #-240]
	b	.L24
.L25:
	ldr	r2, .L30+8
	ldr	r3, [fp, #-240]
	lsl	r3, r3, #1
	add	r3, r2, r3
	ldrsh	r3, [r3]
	str	r3, [fp, #-228]
	ldr	r2, [fp, #-228]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r2, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #1
	mov	r2, r3
	ldr	r3, [fp, #-256]
	add	r2, r3, r2
	ldr	r3, [fp, #-240]
	lsl	r3, r3, #1
	add	r3, r2, r3
	ldrsh	r3, [r3]
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, [fp, #-232]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	sub	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r0, r3, #16
	ldr	r2, [fp, #-228]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r2, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #1
	mov	r2, r3
	ldr	r3, [fp, #-256]
	add	r1, r3, r2
	lsl	r3, r0, #16
	asr	r2, r3, #16
	ldr	r3, [fp, #-240]
	lsl	r3, r3, #1
	add	r3, r1, r3
	strh	r2, [r3]	@ movhi
	ldr	r2, [fp, #-240]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r2, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #1
	mov	r2, r3
	ldr	r3, [fp, #-256]
	add	r2, r3, r2
	ldr	r3, [fp, #-228]
	lsl	r3, r3, #1
	add	r3, r2, r3
	ldrsh	r3, [r3]
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, [fp, #-232]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r0, r3, #16
	ldr	r2, [fp, #-240]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r2, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #1
	mov	r2, r3
	ldr	r3, [fp, #-256]
	add	r1, r3, r2
	lsl	r3, r0, #16
	asr	r2, r3, #16
	ldr	r3, [fp, #-228]
	lsl	r3, r3, #1
	add	r3, r1, r3
	strh	r2, [r3]	@ movhi
	ldr	r3, [fp, #-228]
	str	r3, [fp, #-240]
.L24:
	ldr	r2, .L30+8
	ldr	r3, [fp, #-240]
	lsl	r3, r3, #1
	add	r3, r2, r3
	ldrsh	r3, [r3]
	cmp	r3, #0
	bge	.L25
	ldr	r3, [fp, #-232]
	ldr	r2, .L30+24
	cmp	r3, r2
	bne	.L26
	mov	r3, #0
	b	.L28
.L26:
	ldr	r3, [fp, #-232]
.L28:
	ldr	r2, .L30
	ldr	r1, [r2]
	ldr	r2, [fp, #-8]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L29
	bl	__stack_chk_fail
.L29:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L31:
	.align	2
.L30:
	.word	.LC0
	.word	disc
	.word	p
	.word	r
	.word	g
	.word	valid
	.word	1000000000
	.size	bfs, .-bfs
	.align	2
	.global	maxflow
	.syntax unified
	.arm
	.fpu softvfp
	.type	maxflow, %function
maxflow:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-24]
	mov	r3, #0
	str	r3, [fp, #-12]
	b	.L33
.L34:
	ldr	r2, [fp, #-12]
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	str	r3, [fp, #-12]
.L33:
	ldr	r2, [fp, #-24]
	ldr	r1, [fp, #-20]
	ldr	r0, [fp, #-16]
	bl	bfs
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	bne	.L34
	ldr	r3, [fp, #-12]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	maxflow, .-maxflow
	.section	.rodata
	.align	2
.LC1:
	.ascii	"%d %d\000"
	.align	2
.LC2:
	.ascii	"Case %d: %d\012\012\000"
	.align	2
.LC3:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 5240
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #5184
	sub	sp, sp, #60
	ldr	r3, .L82
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	mov	r3,#0
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-1116]
	b	.L37
.L77:
	ldr	r3, .L82+4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L38
	ldr	r3, .L82+8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L80
.L38:
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1116]
	add	r3, r3, #1
	str	r3, [r2, #-1116]
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-1132]
	b	.L40
.L41:
	ldr	r2, .L82+12
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1132]
	add	r3, r3, #50944
	add	r3, r3, #104
	lsl	r3, r3, #1
	add	r3, r2, r3
	add	r3, r3, #6
	mov	r2, #0
	strh	r2, [r3]	@ movhi
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1132]
	add	r3, r3, #1
	str	r3, [r2, #-1132]
.L40:
	ldr	r3, .L82+4
	ldr	r3, [r3]
	sub	r2, fp, #4096
	sub	r2, r2, #12
	ldr	r2, [r2, #-1132]
	cmp	r2, r3
	ble	.L41
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-1128]
	b	.L42
.L45:
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-1124]
	b	.L43
.L44:
	ldr	r1, .L82+16
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r2, [r3, #-1128]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r2, r3, #4
	add	r3, r3, r2
	sub	r2, fp, #4096
	sub	r2, r2, #12
	ldr	r2, [r2, #-1124]
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r1, r3
	mov	r2, #0
	strh	r2, [r3]	@ movhi
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1124]
	add	r3, r3, #1
	str	r3, [r2, #-1124]
.L43:
	ldr	r3, .L82+4
	ldr	r3, [r3]
	sub	r2, fp, #4096
	sub	r2, r2, #12
	ldr	r2, [r2, #-1124]
	cmp	r2, r3
	ble	.L44
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1128]
	add	r3, r3, #1
	str	r3, [r2, #-1128]
.L42:
	ldr	r3, .L82+4
	ldr	r3, [r3]
	sub	r2, fp, #4096
	sub	r2, r2, #12
	ldr	r2, [r2, #-1128]
	cmp	r2, r3
	ble	.L45
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-1132]
	b	.L46
.L53:
	sub	r2, fp, #5184
	sub	r2, r2, #12
	sub	r2, r2, #48
	sub	r3, fp, #5184
	sub	r3, r3, #12
	sub	r3, r3, #52
	mov	r1, r3
	ldr	r0, .L82+20
	bl	__isoc99_scanf
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-1128]
	b	.L47
.L50:
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r2, [r3, #-1140]
	ldr	r1, .L82+12
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	lsl	r3, r3, #4
	sub	r3, r3, r2
	lsl	r2, r3, #3
	sub	r2, r2, r3
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1128]
	add	r3, r2, r3
	lsl	r3, r3, #1
	add	r3, r1, r3
	ldrsh	r3, [r3]
	mov	r2, r3
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1136]
	cmp	r2, r3
	beq	.L81
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1128]
	add	r3, r3, #1
	str	r3, [r2, #-1128]
.L47:
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1140]
	ldr	r2, .L82+12
	add	r3, r3, #50944
	add	r3, r3, #104
	lsl	r3, r3, #1
	add	r3, r2, r3
	add	r3, r3, #6
	ldrsh	r3, [r3]
	mov	r2, r3
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1128]
	cmp	r3, r2
	blt	.L50
	b	.L49
.L81:
	nop
.L49:
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1140]
	ldr	r2, .L82+12
	add	r3, r3, #50944
	add	r3, r3, #104
	lsl	r3, r3, #1
	add	r3, r2, r3
	add	r3, r3, #6
	ldrsh	r3, [r3]
	mov	r2, r3
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1128]
	cmp	r3, r2
	bne	.L51
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r2, [r3, #-1136]
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r1, [r3, #-1140]
	ldr	ip, .L82+16
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r0, r3, #4
	add	r3, r3, r0
	add	r3, r3, r1
	lsl	r3, r3, #1
	add	r3, ip, r3
	mov	r0, #1
	strh	r0, [r3]	@ movhi
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r0, [r3, #-1140]
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	ip, [r3, #-1136]
	ldr	lr, .L82+16
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r2, r3, #4
	add	r3, r3, r2
	add	r3, r3, r1
	lsl	r3, r3, #1
	add	r3, lr, r3
	ldrsh	r2, [r3]
	ldr	lr, .L82+16
	mov	r3, r0
	lsl	r3, r3, #1
	add	r3, r3, r0
	lsl	r1, r3, #4
	add	r3, r3, r1
	add	r3, r3, ip
	lsl	r3, r3, #1
	add	r3, lr, r3
	strh	r2, [r3]	@ movhi
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	ip, [r3, #-1136]
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r2, [r3, #-1140]
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r1, [r3, #-1140]
	ldr	r0, .L82+12
	add	r3, r1, #50944
	add	r3, r3, #104
	lsl	r3, r3, #1
	add	r3, r0, r3
	add	r3, r3, #6
	ldrsh	r0, [r3]
	lsl	r3, r0, #16
	lsr	r3, r3, #16
	add	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	lr, r3, #16
	ldr	r4, .L82+12
	add	r3, r1, #50944
	add	r3, r3, #104
	lsl	r3, r3, #1
	add	r3, r4, r3
	add	r3, r3, #6
	strh	lr, [r3]	@ movhi
	mov	lr, r0
	lsl	r3, ip, #16
	asr	r1, r3, #16
	ldr	r0, .L82+12
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	lsl	r3, r3, #4
	sub	r3, r3, r2
	lsl	r2, r3, #3
	sub	r2, r2, r3
	add	r3, r2, lr
	lsl	r3, r3, #1
	add	r3, r0, r3
	strh	r1, [r3]	@ movhi
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	ip, [r3, #-1140]
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r2, [r3, #-1136]
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r1, [r3, #-1136]
	ldr	r0, .L82+12
	add	r3, r1, #50944
	add	r3, r3, #104
	lsl	r3, r3, #1
	add	r3, r0, r3
	add	r3, r3, #6
	ldrsh	r0, [r3]
	lsl	r3, r0, #16
	lsr	r3, r3, #16
	add	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	lr, r3, #16
	ldr	r4, .L82+12
	add	r3, r1, #50944
	add	r3, r3, #104
	lsl	r3, r3, #1
	add	r3, r4, r3
	add	r3, r3, #6
	strh	lr, [r3]	@ movhi
	mov	lr, r0
	lsl	r3, ip, #16
	asr	r1, r3, #16
	ldr	r0, .L82+12
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	lsl	r3, r3, #4
	sub	r3, r3, r2
	lsl	r2, r3, #3
	sub	r2, r2, r3
	add	r3, r2, lr
	lsl	r3, r3, #1
	add	r3, r0, r3
	strh	r1, [r3]	@ movhi
	b	.L52
.L51:
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r2, [r3, #-1136]
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r1, [r3, #-1140]
	ldr	ip, .L82+16
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r0, r3, #4
	add	r3, r3, r0
	add	r3, r3, r1
	lsl	r3, r3, #1
	add	r3, ip, r3
	ldrsh	r3, [r3]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r0, r3, #16
	ldr	lr, .L82+16
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	ip, r3, #4
	add	r3, r3, ip
	add	r3, r3, r1
	lsl	r3, r3, #1
	add	r3, lr, r3
	strh	r0, [r3]	@ movhi
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r0, [r3, #-1140]
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	ip, [r3, #-1136]
	ldr	lr, .L82+16
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r2, r3, #4
	add	r3, r3, r2
	add	r3, r3, r1
	lsl	r3, r3, #1
	add	r3, lr, r3
	ldrsh	r2, [r3]
	ldr	lr, .L82+16
	mov	r3, r0
	lsl	r3, r3, #1
	add	r3, r3, r0
	lsl	r1, r3, #4
	add	r3, r3, r1
	add	r3, r3, ip
	lsl	r3, r3, #1
	add	r3, lr, r3
	strh	r2, [r3]	@ movhi
.L52:
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1132]
	add	r3, r3, #1
	str	r3, [r2, #-1132]
.L46:
	ldr	r3, .L82+8
	ldr	r3, [r3]
	sub	r2, fp, #4096
	sub	r2, r2, #12
	ldr	r2, [r2, #-1132]
	cmp	r2, r3
	blt	.L53
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-1132]
	b	.L54
.L55:
	ldr	r2, .L82+24
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1132]
	add	r3, r2, r3
	mov	r2, #1
	strb	r2, [r3]
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1132]
	add	r3, r3, #1
	str	r3, [r2, #-1132]
.L54:
	ldr	r3, .L82+4
	ldr	r3, [r3]
	sub	r2, fp, #4096
	sub	r2, r2, #12
	ldr	r2, [r2, #-1132]
	cmp	r2, r3
	ble	.L55
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #1
	str	r3, [r2, #-1132]
	b	.L56
.L61:
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-1128]
	b	.L57
.L60:
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-1124]
	b	.L58
.L59:
	ldr	r1, .L82+16
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r2, [r3, #-1128]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r2, r3, #4
	add	r3, r3, r2
	sub	r2, fp, #4096
	sub	r2, r2, #12
	ldr	r2, [r2, #-1124]
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r1, r3
	ldrsh	r0, [r3]
	sub	r3, fp, #4096
	sub	r3, r3, #12
	sub	r2, r3, #1104
	sub	r2, r2, #8
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r1, [r3, #-1128]
	mov	r3, r1
	lsl	r3, r3, #1
	add	r3, r3, r1
	lsl	r1, r3, #4
	add	r3, r3, r1
	sub	r1, fp, #4096
	sub	r1, r1, #12
	ldr	r1, [r1, #-1124]
	add	r3, r3, r1
	lsl	r3, r3, #1
	add	r3, r2, r3
	strh	r0, [r3]	@ movhi
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1124]
	add	r3, r3, #1
	str	r3, [r2, #-1124]
.L58:
	ldr	r3, .L82+4
	ldr	r3, [r3]
	sub	r2, fp, #4096
	sub	r2, r2, #12
	ldr	r2, [r2, #-1124]
	cmp	r2, r3
	ble	.L59
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1128]
	add	r3, r3, #1
	str	r3, [r2, #-1128]
.L57:
	ldr	r3, .L82+4
	ldr	r3, [r3]
	sub	r2, fp, #4096
	sub	r2, r2, #12
	ldr	r2, [r2, #-1128]
	cmp	r2, r3
	ble	.L60
	sub	r3, fp, #5184
	sub	r3, r3, #12
	sub	r3, r3, #24
	sub	r2, fp, #4096
	sub	r2, r2, #12
	mov	r0, r2
	mov	r2, r3
	mov	r1, #0
	ldr	r0, [r0, #-1132]
	bl	maxflow
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r1, .L82+28
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1132]
	lsl	r3, r3, #1
	add	r3, r1, r3
	strh	r2, [r3]	@ movhi
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1132]
	add	r3, r3, #1
	str	r3, [r2, #-1132]
.L56:
	ldr	r3, .L82+4
	ldr	r3, [r3]
	sub	r2, fp, #4096
	sub	r2, r2, #12
	ldr	r2, [r2, #-1132]
	cmp	r2, r3
	ble	.L61
	b	.L62
.L76:
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	ldr	r3, .L82+32
	str	r3, [r2, #-1120]
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #1
	str	r3, [r2, #-1132]
	b	.L63
.L65:
	ldr	r2, .L82+24
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1132]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L64
	ldr	r2, .L82+28
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1132]
	lsl	r3, r3, #1
	add	r3, r2, r3
	ldrsh	r3, [r3]
	mov	r2, r3
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1120]
	cmp	r3, r2
	ble	.L64
	ldr	r2, .L82+28
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1132]
	lsl	r3, r3, #1
	add	r3, r2, r3
	ldrsh	r3, [r3]
	sub	r2, fp, #4096
	sub	r2, r2, #12
	str	r3, [r2, #-1120]
.L64:
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1132]
	add	r3, r3, #1
	str	r3, [r2, #-1132]
.L63:
	ldr	r3, .L82+4
	ldr	r3, [r3]
	sub	r2, fp, #4096
	sub	r2, r2, #12
	ldr	r2, [r2, #-1132]
	cmp	r2, r3
	ble	.L65
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #1
	str	r3, [r2, #-1132]
	b	.L66
.L68:
	ldr	r2, .L82+28
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1132]
	lsl	r3, r3, #1
	add	r3, r2, r3
	ldrsh	r3, [r3]
	mov	r2, r3
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1120]
	cmp	r3, r2
	bne	.L67
	ldr	r2, .L82+24
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1132]
	add	r3, r2, r3
	mov	r2, #0
	strb	r2, [r3]
.L67:
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1132]
	add	r3, r3, #1
	str	r3, [r2, #-1132]
.L66:
	ldr	r3, .L82+4
	ldr	r3, [r3]
	sub	r2, fp, #4096
	sub	r2, r2, #12
	ldr	r2, [r2, #-1132]
	cmp	r2, r3
	ble	.L68
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #1
	str	r3, [r2, #-1132]
	b	.L69
.L75:
	ldr	r2, .L82+24
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1132]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L70
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-1128]
	b	.L71
.L74:
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-1124]
	b	.L72
.L73:
	ldr	r1, .L82+16
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r2, [r3, #-1128]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r2, r3, #4
	add	r3, r3, r2
	sub	r2, fp, #4096
	sub	r2, r2, #12
	ldr	r2, [r2, #-1124]
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r1, r3
	ldrsh	r0, [r3]
	sub	r3, fp, #4096
	sub	r3, r3, #12
	sub	r2, r3, #1104
	sub	r2, r2, #8
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r1, [r3, #-1128]
	mov	r3, r1
	lsl	r3, r3, #1
	add	r3, r3, r1
	lsl	r1, r3, #4
	add	r3, r3, r1
	sub	r1, fp, #4096
	sub	r1, r1, #12
	ldr	r1, [r1, #-1124]
	add	r3, r3, r1
	lsl	r3, r3, #1
	add	r3, r2, r3
	strh	r0, [r3]	@ movhi
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1124]
	add	r3, r3, #1
	str	r3, [r2, #-1124]
.L72:
	ldr	r3, .L82+4
	ldr	r3, [r3]
	sub	r2, fp, #4096
	sub	r2, r2, #12
	ldr	r2, [r2, #-1124]
	cmp	r2, r3
	ble	.L73
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1128]
	add	r3, r3, #1
	str	r3, [r2, #-1128]
.L71:
	ldr	r3, .L82+4
	ldr	r3, [r3]
	sub	r2, fp, #4096
	sub	r2, r2, #12
	ldr	r2, [r2, #-1128]
	cmp	r2, r3
	ble	.L74
	ldr	r2, .L82+28
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1132]
	lsl	r3, r3, #1
	add	r3, r2, r3
	ldrsh	r3, [r3]
	mov	r4, r3
	sub	r3, fp, #5184
	sub	r3, r3, #12
	sub	r3, r3, #24
	sub	r2, fp, #4096
	sub	r2, r2, #12
	mov	r0, r2
	mov	r2, r3
	mov	r1, #0
	ldr	r0, [r0, #-1132]
	bl	maxflow
	mov	r2, r0
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1120]
	add	r3, r2, r3
	mov	r1, r3
	mov	r0, r4
	bl	min
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r1, .L82+28
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1132]
	lsl	r3, r3, #1
	add	r3, r1, r3
	strh	r2, [r3]	@ movhi
.L70:
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-1132]
	add	r3, r3, #1
	str	r3, [r2, #-1132]
.L69:
	ldr	r3, .L82+4
	ldr	r3, [r3]
	sub	r2, fp, #4096
	sub	r2, r2, #12
	ldr	r2, [r2, #-1132]
	cmp	r2, r3
	ble	.L75
.L62:
	ldr	r3, .L82+24
	ldrb	r3, [r3, #1]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L76
	ldr	r3, .L82+28
	ldrsh	r3, [r3, #2]
	mov	r2, r3
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r1, [r3, #-1116]
	ldr	r0, .L82+36
	bl	printf
.L37:
	ldr	r2, .L82+8
	ldr	r1, .L82+4
	ldr	r0, .L82+20
	bl	__isoc99_scanf
	mov	r3, r0
	cmp	r3, #0
	bne	.L77
	b	.L39
.L80:
	nop
.L39:
	mov	r3, #0
	ldr	r2, .L82
	ldr	r1, [r2]
	ldr	r2, [fp, #-16]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L79
	bl	__stack_chk_fail
.L79:
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L83:
	.align	2
.L82:
	.word	.LC3
	.word	r
	.word	t
	.word	g
	.word	cap
	.word	.LC1
	.word	valid
	.word	X
	.word	1000000000
	.word	.LC2
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
