	.file	"38772.c"
	.intel_syntax noprefix
	.text
	.globl	DSP1ROM
	.section	.rodata
	.align 32
	.type	DSP1ROM, @object
	.size	DSP1ROM, 2048
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	.value	-1
	.value	-1
	.value	-1
	.value	-1
	.value	-1
	.globl	CosTable2
	.bss
	.align 32
	.type	CosTable2, @object
	.size	CosTable2, 16384
CosTable2:
	.zero	16384
	.globl	SinTable2
	.align 32
	.type	SinTable2, @object
	.size	SinTable2, 16384
SinTable2:
	.zero	16384
	.text
	.globl	Atan
	.type	Atan, @function
Atan:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	xmm0, QWORD PTR -8[rbp]
	movsd	xmm1, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jnb	.L2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, QWORD PTR -8[rbp]
	jb	.L6
.L2:
	movsd	xmm1, QWORD PTR -8[rbp]
	movsd	xmm0, QWORD PTR .LC1[rip]
	mulsd	xmm0, xmm1
	movapd	xmm1, xmm0
	mulsd	xmm1, QWORD PTR -8[rbp]
	movsd	xmm0, QWORD PTR .LC0[rip]
	addsd	xmm1, xmm0
	movsd	xmm0, QWORD PTR -8[rbp]
	divsd	xmm0, xmm1
	jmp	.L5
.L6:
	movsd	xmm0, QWORD PTR .LC0[rip]
	divsd	xmm0, QWORD PTR -8[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	call	Atan
	movapd	xmm1, xmm0
	movsd	xmm0, QWORD PTR .LC2[rip]
	subsd	xmm0, xmm1
.L5:
	movq	rax, xmm0
	movq	xmm0, rax
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	Atan, .-Atan
	.globl	InitDSP
	.type	InitDSP, @function
InitDSP:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], 0
	jmp	.L8
.L13:
	mov	eax, DWORD PTR -4[rbp]
	test	rax, rax
	js	.L9
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rax
	jmp	.L10
.L9:
	mov	rdx, rax
	shr	rdx
	and	eax, 1
	or	rdx, rax
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rdx
	addsd	xmm0, xmm0
.L10:
	movsd	xmm1, QWORD PTR .LC3[rip]
	mulsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC4[rip]
	divsd	xmm0, xmm1
	movq	rax, xmm0
	movq	xmm0, rax
	call	cos@PLT
	movq	rax, xmm0
	mov	edx, DWORD PTR -4[rbp]
	lea	rcx, 0[0+rdx*8]
	lea	rdx, CosTable2[rip]
	mov	QWORD PTR [rcx+rdx], rax
	mov	eax, DWORD PTR -4[rbp]
	test	rax, rax
	js	.L11
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rax
	jmp	.L12
.L11:
	mov	rdx, rax
	shr	rdx
	and	eax, 1
	or	rdx, rax
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rdx
	addsd	xmm0, xmm0
.L12:
	movsd	xmm1, QWORD PTR .LC3[rip]
	mulsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC4[rip]
	divsd	xmm0, xmm1
	movq	rax, xmm0
	movq	xmm0, rax
	call	sin@PLT
	movq	rax, xmm0
	mov	edx, DWORD PTR -4[rbp]
	lea	rcx, 0[0+rdx*8]
	lea	rdx, SinTable2[rip]
	mov	QWORD PTR [rcx+rdx], rax
	add	DWORD PTR -4[rbp], 1
.L8:
	cmp	DWORD PTR -4[rbp], 2047
	jbe	.L13
	nop
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	InitDSP, .-InitDSP
	.globl	Op00Multiplicand
	.bss
	.align 2
	.type	Op00Multiplicand, @object
	.size	Op00Multiplicand, 2
Op00Multiplicand:
	.zero	2
	.globl	Op00Multiplier
	.align 2
	.type	Op00Multiplier, @object
	.size	Op00Multiplier, 2
Op00Multiplier:
	.zero	2
	.globl	Op00Result
	.align 2
	.type	Op00Result, @object
	.size	Op00Result, 2
Op00Result:
	.zero	2
	.text
	.globl	DSPOp00
	.type	DSPOp00, @function
DSPOp00:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, WORD PTR Op00Multiplicand[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR Op00Multiplier[rip]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	WORD PTR Op00Result[rip], ax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	DSPOp00, .-DSPOp00
	.globl	Op20Multiplicand
	.bss
	.align 2
	.type	Op20Multiplicand, @object
	.size	Op20Multiplicand, 2
Op20Multiplicand:
	.zero	2
	.globl	Op20Multiplier
	.align 2
	.type	Op20Multiplier, @object
	.size	Op20Multiplier, 2
Op20Multiplier:
	.zero	2
	.globl	Op20Result
	.align 2
	.type	Op20Result, @object
	.size	Op20Result, 2
Op20Result:
	.zero	2
	.text
	.globl	DSPOp20
	.type	DSPOp20, @function
DSPOp20:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, WORD PTR Op20Multiplicand[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR Op20Multiplier[rip]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	WORD PTR Op20Result[rip], ax
	movzx	eax, WORD PTR Op20Result[rip]
	add	eax, 1
	mov	WORD PTR Op20Result[rip], ax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	DSPOp20, .-DSPOp20
	.globl	Op10Coefficient
	.bss
	.align 2
	.type	Op10Coefficient, @object
	.size	Op10Coefficient, 2
Op10Coefficient:
	.zero	2
	.globl	Op10Exponent
	.align 2
	.type	Op10Exponent, @object
	.size	Op10Exponent, 2
Op10Exponent:
	.zero	2
	.globl	Op10CoefficientR
	.align 2
	.type	Op10CoefficientR, @object
	.size	Op10CoefficientR, 2
Op10CoefficientR:
	.zero	2
	.globl	Op10ExponentR
	.align 2
	.type	Op10ExponentR, @object
	.size	Op10ExponentR, 2
Op10ExponentR:
	.zero	2
	.text
	.globl	DSP1_Inverse
	.type	DSP1_Inverse, @function
DSP1_Inverse:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	QWORD PTR -32[rbp], rdx
	mov	QWORD PTR -40[rbp], rcx
	mov	edx, edi
	mov	WORD PTR -20[rbp], dx
	mov	WORD PTR -24[rbp], ax
	cmp	WORD PTR -20[rbp], 0
	jne	.L17
	mov	rax, QWORD PTR -32[rbp]
	mov	WORD PTR [rax], 32767
	mov	rax, QWORD PTR -40[rbp]
	mov	WORD PTR [rax], 47
	jmp	.L26
.L17:
	mov	WORD PTR -4[rbp], 1
	cmp	WORD PTR -20[rbp], 0
	jns	.L21
	cmp	WORD PTR -20[rbp], -32768
	jne	.L20
	mov	WORD PTR -20[rbp], -32767
.L20:
	movzx	eax, WORD PTR -20[rbp]
	neg	eax
	mov	WORD PTR -20[rbp], ax
	mov	WORD PTR -4[rbp], -1
	jmp	.L21
.L22:
	movsx	eax, WORD PTR -20[rbp]
	add	eax, eax
	mov	WORD PTR -20[rbp], ax
	movzx	eax, WORD PTR -24[rbp]
	sub	eax, 1
	mov	WORD PTR -24[rbp], ax
.L21:
	cmp	WORD PTR -20[rbp], 16383
	jle	.L22
	cmp	WORD PTR -20[rbp], 16384
	jne	.L23
	cmp	WORD PTR -4[rbp], 1
	jne	.L24
	mov	rax, QWORD PTR -32[rbp]
	mov	WORD PTR [rax], 32767
	jmp	.L25
.L24:
	mov	rax, QWORD PTR -32[rbp]
	mov	WORD PTR [rax], -16384
	movzx	eax, WORD PTR -24[rbp]
	sub	eax, 1
	mov	WORD PTR -24[rbp], ax
	jmp	.L25
.L23:
	movsx	eax, WORD PTR -20[rbp]
	sub	eax, 16384
	sar	eax, 7
	add	eax, 101
	cdqe
	lea	rdx, [rax+rax]
	lea	rax, DSP1ROM[rip]
	movzx	eax, WORD PTR [rdx+rax]
	mov	WORD PTR -2[rbp], ax
	movsx	esi, WORD PTR -2[rbp]
	movsx	eax, WORD PTR -2[rbp]
	neg	eax
	mov	ecx, eax
	movsx	edx, WORD PTR -20[rbp]
	movsx	eax, WORD PTR -2[rbp]
	imul	eax, edx
	sar	eax, 15
	imul	eax, ecx
	sar	eax, 15
	add	eax, esi
	add	eax, eax
	mov	WORD PTR -2[rbp], ax
	movsx	esi, WORD PTR -2[rbp]
	movsx	eax, WORD PTR -2[rbp]
	neg	eax
	mov	ecx, eax
	movsx	edx, WORD PTR -20[rbp]
	movsx	eax, WORD PTR -2[rbp]
	imul	eax, edx
	sar	eax, 15
	imul	eax, ecx
	sar	eax, 15
	add	eax, esi
	add	eax, eax
	mov	WORD PTR -2[rbp], ax
	movzx	edx, WORD PTR -2[rbp]
	movzx	eax, WORD PTR -4[rbp]
	imul	eax, edx
	mov	edx, eax
	mov	rax, QWORD PTR -32[rbp]
	mov	WORD PTR [rax], dx
.L25:
	movzx	edx, WORD PTR -24[rbp]
	mov	eax, 1
	sub	eax, edx
	mov	edx, eax
	mov	rax, QWORD PTR -40[rbp]
	mov	WORD PTR [rax], dx
.L26:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	DSP1_Inverse, .-DSP1_Inverse
	.globl	DSPOp10
	.type	DSPOp10, @function
DSPOp10:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, WORD PTR Op10Exponent[rip]
	movsx	esi, ax
	movzx	eax, WORD PTR Op10Coefficient[rip]
	cwde
	lea	rcx, Op10ExponentR[rip]
	lea	rdx, Op10CoefficientR[rip]
	mov	edi, eax
	call	DSP1_Inverse
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	DSPOp10, .-DSPOp10
	.globl	Op04Angle
	.bss
	.align 2
	.type	Op04Angle, @object
	.size	Op04Angle, 2
Op04Angle:
	.zero	2
	.globl	Op04Radius
	.align 2
	.type	Op04Radius, @object
	.size	Op04Radius, 2
Op04Radius:
	.zero	2
	.globl	Op04Sin
	.align 2
	.type	Op04Sin, @object
	.size	Op04Sin, 2
Op04Sin:
	.zero	2
	.globl	Op04Cos
	.align 2
	.type	Op04Cos, @object
	.size	Op04Cos, 2
Op04Cos:
	.zero	2
	.globl	DSP1_MulTable
	.section	.rodata
	.align 32
	.type	DSP1_MulTable, @object
	.size	DSP1_MulTable, 512
DSP1_MulTable:
	.value	0
	.value	3
	.value	6
	.value	9
	.value	12
	.value	15
	.value	18
	.value	21
	.value	25
	.value	28
	.value	31
	.value	34
	.value	37
	.value	40
	.value	43
	.value	47
	.value	50
	.value	53
	.value	56
	.value	59
	.value	62
	.value	65
	.value	69
	.value	72
	.value	75
	.value	78
	.value	81
	.value	84
	.value	87
	.value	91
	.value	94
	.value	97
	.value	100
	.value	103
	.value	106
	.value	109
	.value	113
	.value	116
	.value	119
	.value	122
	.value	125
	.value	128
	.value	131
	.value	135
	.value	138
	.value	141
	.value	144
	.value	147
	.value	150
	.value	153
	.value	157
	.value	160
	.value	163
	.value	166
	.value	169
	.value	172
	.value	175
	.value	179
	.value	182
	.value	185
	.value	188
	.value	191
	.value	194
	.value	197
	.value	201
	.value	204
	.value	207
	.value	210
	.value	213
	.value	216
	.value	219
	.value	223
	.value	226
	.value	229
	.value	232
	.value	235
	.value	238
	.value	241
	.value	245
	.value	248
	.value	251
	.value	254
	.value	257
	.value	260
	.value	263
	.value	267
	.value	270
	.value	273
	.value	276
	.value	279
	.value	282
	.value	285
	.value	289
	.value	292
	.value	295
	.value	298
	.value	301
	.value	304
	.value	307
	.value	311
	.value	314
	.value	317
	.value	320
	.value	323
	.value	326
	.value	329
	.value	333
	.value	336
	.value	339
	.value	342
	.value	345
	.value	348
	.value	351
	.value	355
	.value	358
	.value	361
	.value	364
	.value	367
	.value	370
	.value	373
	.value	376
	.value	380
	.value	383
	.value	386
	.value	389
	.value	392
	.value	395
	.value	398
	.value	402
	.value	405
	.value	408
	.value	411
	.value	414
	.value	417
	.value	420
	.value	424
	.value	427
	.value	430
	.value	433
	.value	436
	.value	439
	.value	442
	.value	446
	.value	449
	.value	452
	.value	455
	.value	458
	.value	461
	.value	464
	.value	468
	.value	471
	.value	474
	.value	477
	.value	480
	.value	483
	.value	486
	.value	490
	.value	493
	.value	496
	.value	499
	.value	502
	.value	505
	.value	508
	.value	512
	.value	515
	.value	518
	.value	521
	.value	524
	.value	527
	.value	530
	.value	534
	.value	537
	.value	540
	.value	543
	.value	546
	.value	549
	.value	552
	.value	556
	.value	559
	.value	562
	.value	565
	.value	568
	.value	571
	.value	574
	.value	578
	.value	581
	.value	584
	.value	587
	.value	590
	.value	593
	.value	596
	.value	600
	.value	603
	.value	606
	.value	609
	.value	612
	.value	615
	.value	618
	.value	622
	.value	625
	.value	628
	.value	631
	.value	634
	.value	637
	.value	640
	.value	644
	.value	647
	.value	650
	.value	653
	.value	656
	.value	659
	.value	662
	.value	666
	.value	669
	.value	672
	.value	675
	.value	678
	.value	681
	.value	684
	.value	688
	.value	691
	.value	694
	.value	697
	.value	700
	.value	703
	.value	706
	.value	710
	.value	713
	.value	716
	.value	719
	.value	722
	.value	725
	.value	728
	.value	731
	.value	735
	.value	738
	.value	741
	.value	744
	.value	747
	.value	750
	.value	753
	.value	757
	.value	760
	.value	763
	.value	766
	.value	769
	.value	772
	.value	775
	.value	779
	.value	782
	.value	785
	.value	788
	.value	791
	.value	794
	.value	797
	.value	801
	.globl	DSP1_SinTable
	.align 32
	.type	DSP1_SinTable, @object
	.size	DSP1_SinTable, 512
DSP1_SinTable:
	.value	0
	.value	804
	.value	1607
	.value	2410
	.value	3211
	.value	4011
	.value	4808
	.value	5602
	.value	6392
	.value	7179
	.value	7961
	.value	8739
	.value	9512
	.value	10278
	.value	11039
	.value	11793
	.value	12539
	.value	13278
	.value	14010
	.value	14732
	.value	15446
	.value	16151
	.value	16846
	.value	17530
	.value	18204
	.value	18868
	.value	19519
	.value	20159
	.value	20787
	.value	21403
	.value	22005
	.value	22594
	.value	23170
	.value	23732
	.value	24279
	.value	24812
	.value	25330
	.value	25832
	.value	26319
	.value	26790
	.value	27245
	.value	27684
	.value	28106
	.value	28511
	.value	28898
	.value	29269
	.value	29621
	.value	29956
	.value	30273
	.value	30572
	.value	30852
	.value	31114
	.value	31357
	.value	31581
	.value	31785
	.value	31971
	.value	32138
	.value	32285
	.value	32413
	.value	32521
	.value	32610
	.value	32679
	.value	32728
	.value	32758
	.value	32767
	.value	32758
	.value	32728
	.value	32679
	.value	32610
	.value	32521
	.value	32413
	.value	32285
	.value	32138
	.value	31971
	.value	31785
	.value	31581
	.value	31357
	.value	31114
	.value	30852
	.value	30572
	.value	30273
	.value	29956
	.value	29621
	.value	29269
	.value	28898
	.value	28511
	.value	28106
	.value	27684
	.value	27245
	.value	26790
	.value	26319
	.value	25832
	.value	25330
	.value	24812
	.value	24279
	.value	23732
	.value	23170
	.value	22594
	.value	22005
	.value	21403
	.value	20787
	.value	20159
	.value	19519
	.value	18868
	.value	18204
	.value	17530
	.value	16846
	.value	16151
	.value	15446
	.value	14732
	.value	14010
	.value	13278
	.value	12539
	.value	11793
	.value	11039
	.value	10278
	.value	9512
	.value	8739
	.value	7961
	.value	7179
	.value	6392
	.value	5602
	.value	4808
	.value	4011
	.value	3211
	.value	2410
	.value	1607
	.value	804
	.value	0
	.value	-804
	.value	-1607
	.value	-2410
	.value	-3211
	.value	-4011
	.value	-4808
	.value	-5602
	.value	-6392
	.value	-7179
	.value	-7961
	.value	-8739
	.value	-9512
	.value	-10278
	.value	-11039
	.value	-11793
	.value	-12539
	.value	-13278
	.value	-14010
	.value	-14732
	.value	-15446
	.value	-16151
	.value	-16846
	.value	-17530
	.value	-18204
	.value	-18868
	.value	-19519
	.value	-20159
	.value	-20787
	.value	-21403
	.value	-22005
	.value	-22594
	.value	-23170
	.value	-23732
	.value	-24279
	.value	-24812
	.value	-25330
	.value	-25832
	.value	-26319
	.value	-26790
	.value	-27245
	.value	-27684
	.value	-28106
	.value	-28511
	.value	-28898
	.value	-29269
	.value	-29621
	.value	-29956
	.value	-30273
	.value	-30572
	.value	-30852
	.value	-31114
	.value	-31357
	.value	-31581
	.value	-31785
	.value	-31971
	.value	-32138
	.value	-32285
	.value	-32413
	.value	-32521
	.value	-32610
	.value	-32679
	.value	-32728
	.value	-32758
	.value	-32767
	.value	-32758
	.value	-32728
	.value	-32679
	.value	-32610
	.value	-32521
	.value	-32413
	.value	-32285
	.value	-32138
	.value	-31971
	.value	-31785
	.value	-31581
	.value	-31357
	.value	-31114
	.value	-30852
	.value	-30572
	.value	-30273
	.value	-29956
	.value	-29621
	.value	-29269
	.value	-28898
	.value	-28511
	.value	-28106
	.value	-27684
	.value	-27245
	.value	-26790
	.value	-26319
	.value	-25832
	.value	-25330
	.value	-24812
	.value	-24279
	.value	-23732
	.value	-23170
	.value	-22594
	.value	-22005
	.value	-21403
	.value	-20787
	.value	-20159
	.value	-19519
	.value	-18868
	.value	-18204
	.value	-17530
	.value	-16846
	.value	-16151
	.value	-15446
	.value	-14732
	.value	-14010
	.value	-13278
	.value	-12539
	.value	-11793
	.value	-11039
	.value	-10278
	.value	-9512
	.value	-8739
	.value	-7961
	.value	-7179
	.value	-6392
	.value	-5602
	.value	-4808
	.value	-4011
	.value	-3211
	.value	-2410
	.value	-1607
	.value	-804
	.text
	.globl	DSP1_Sin
	.type	DSP1_Sin, @function
DSP1_Sin:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	eax, edi
	mov	WORD PTR -20[rbp], ax
	cmp	WORD PTR -20[rbp], 0
	jns	.L29
	cmp	WORD PTR -20[rbp], -32768
	jne	.L30
	mov	eax, 0
	jmp	.L31
.L30:
	movzx	eax, WORD PTR -20[rbp]
	neg	eax
	cwde
	mov	edi, eax
	call	DSP1_Sin
	neg	eax
	jmp	.L31
.L29:
	movzx	eax, WORD PTR -20[rbp]
	sar	ax, 8
	cwde
	cdqe
	lea	rdx, [rax+rax]
	lea	rax, DSP1_SinTable[rip]
	movzx	eax, WORD PTR [rdx+rax]
	movsx	esi, ax
	movsx	eax, WORD PTR -20[rbp]
	movzx	eax, al
	cdqe
	lea	rdx, [rax+rax]
	lea	rax, DSP1_MulTable[rip]
	movzx	eax, WORD PTR [rdx+rax]
	movsx	edx, ax
	movzx	eax, WORD PTR -20[rbp]
	sar	ax, 8
	cwde
	add	eax, 64
	cdqe
	lea	rcx, [rax+rax]
	lea	rax, DSP1_SinTable[rip]
	movzx	eax, WORD PTR [rcx+rax]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	eax, esi
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 32767
	jle	.L32
	mov	DWORD PTR -4[rbp], 32767
.L32:
	mov	eax, DWORD PTR -4[rbp]
.L31:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	DSP1_Sin, .-DSP1_Sin
	.globl	DSP1_Cos
	.type	DSP1_Cos, @function
DSP1_Cos:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	WORD PTR -20[rbp], ax
	cmp	WORD PTR -20[rbp], 0
	jns	.L34
	cmp	WORD PTR -20[rbp], -32768
	jne	.L35
	mov	eax, -32768
	jmp	.L36
.L35:
	movzx	eax, WORD PTR -20[rbp]
	neg	eax
	mov	WORD PTR -20[rbp], ax
.L34:
	movzx	eax, WORD PTR -20[rbp]
	sar	ax, 8
	cwde
	add	eax, 64
	cdqe
	lea	rdx, [rax+rax]
	lea	rax, DSP1_SinTable[rip]
	movzx	eax, WORD PTR [rdx+rax]
	cwde
	movsx	edx, WORD PTR -20[rbp]
	movzx	edx, dl
	movsx	rdx, edx
	lea	rcx, [rdx+rdx]
	lea	rdx, DSP1_MulTable[rip]
	movzx	edx, WORD PTR [rcx+rdx]
	movsx	ecx, dx
	movzx	edx, WORD PTR -20[rbp]
	sar	dx, 8
	movsx	edx, dx
	movsx	rdx, edx
	lea	rsi, [rdx+rdx]
	lea	rdx, DSP1_SinTable[rip]
	movzx	edx, WORD PTR [rsi+rdx]
	movsx	edx, dx
	imul	edx, ecx
	sar	edx, 15
	sub	eax, edx
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], -32768
	jge	.L37
	mov	DWORD PTR -4[rbp], -32767
.L37:
	mov	eax, DWORD PTR -4[rbp]
.L36:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	DSP1_Cos, .-DSP1_Cos
	.globl	DSP1_Normalize
	.type	DSP1_Normalize, @function
DSP1_Normalize:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	QWORD PTR -32[rbp], rsi
	mov	QWORD PTR -40[rbp], rdx
	mov	WORD PTR -20[rbp], ax
	mov	WORD PTR -4[rbp], 16384
	mov	WORD PTR -2[rbp], 0
	cmp	WORD PTR -20[rbp], 0
	jns	.L43
	jmp	.L40
.L42:
	sar	WORD PTR -4[rbp]
	movzx	eax, WORD PTR -2[rbp]
	add	eax, 1
	mov	WORD PTR -2[rbp], ax
.L40:
	movzx	eax, WORD PTR -20[rbp]
	and	ax, WORD PTR -4[rbp]
	test	ax, ax
	je	.L41
	cmp	WORD PTR -4[rbp], 0
	jne	.L42
	jmp	.L41
.L44:
	sar	WORD PTR -4[rbp]
	movzx	eax, WORD PTR -2[rbp]
	add	eax, 1
	mov	WORD PTR -2[rbp], ax
.L43:
	movzx	eax, WORD PTR -20[rbp]
	and	ax, WORD PTR -4[rbp]
	test	ax, ax
	jne	.L41
	cmp	WORD PTR -4[rbp], 0
	jne	.L44
.L41:
	cmp	WORD PTR -2[rbp], 0
	jle	.L45
	movsx	edx, WORD PTR -20[rbp]
	movsx	eax, WORD PTR -2[rbp]
	add	eax, 33
	cdqe
	lea	rcx, [rax+rax]
	lea	rax, DSP1ROM[rip]
	movzx	eax, WORD PTR [rcx+rax]
	movzx	eax, ax
	imul	eax, edx
	add	eax, eax
	mov	edx, eax
	mov	rax, QWORD PTR -32[rbp]
	mov	WORD PTR [rax], dx
	jmp	.L46
.L45:
	mov	rax, QWORD PTR -32[rbp]
	movzx	edx, WORD PTR -20[rbp]
	mov	WORD PTR [rax], dx
.L46:
	mov	rax, QWORD PTR -40[rbp]
	movzx	eax, WORD PTR [rax]
	movzx	edx, WORD PTR -2[rbp]
	sub	eax, edx
	mov	edx, eax
	mov	rax, QWORD PTR -40[rbp]
	mov	WORD PTR [rax], dx
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	DSP1_Normalize, .-DSP1_Normalize
	.globl	DSP1_NormalizeDouble
	.type	DSP1_NormalizeDouble, @function
DSP1_NormalizeDouble:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	QWORD PTR -32[rbp], rsi
	mov	QWORD PTR -40[rbp], rdx
	mov	eax, DWORD PTR -20[rbp]
	and	ax, 32767
	mov	WORD PTR -4[rbp], ax
	mov	eax, DWORD PTR -20[rbp]
	sar	eax, 15
	mov	WORD PTR -2[rbp], ax
	mov	WORD PTR -8[rbp], 16384
	mov	WORD PTR -6[rbp], 0
	cmp	WORD PTR -2[rbp], 0
	jns	.L52
	jmp	.L49
.L51:
	sar	WORD PTR -8[rbp]
	movzx	eax, WORD PTR -6[rbp]
	add	eax, 1
	mov	WORD PTR -6[rbp], ax
.L49:
	movzx	eax, WORD PTR -2[rbp]
	and	ax, WORD PTR -8[rbp]
	test	ax, ax
	je	.L50
	cmp	WORD PTR -8[rbp], 0
	jne	.L51
	jmp	.L50
.L53:
	sar	WORD PTR -8[rbp]
	movzx	eax, WORD PTR -6[rbp]
	add	eax, 1
	mov	WORD PTR -6[rbp], ax
.L52:
	movzx	eax, WORD PTR -2[rbp]
	and	ax, WORD PTR -8[rbp]
	test	ax, ax
	jne	.L50
	cmp	WORD PTR -8[rbp], 0
	jne	.L53
.L50:
	cmp	WORD PTR -6[rbp], 0
	jle	.L54
	movsx	edx, WORD PTR -2[rbp]
	movsx	eax, WORD PTR -6[rbp]
	add	eax, 33
	cdqe
	lea	rcx, [rax+rax]
	lea	rax, DSP1ROM[rip]
	movzx	eax, WORD PTR [rcx+rax]
	movzx	eax, ax
	imul	eax, edx
	add	eax, eax
	mov	edx, eax
	mov	rax, QWORD PTR -32[rbp]
	mov	WORD PTR [rax], dx
	cmp	WORD PTR -6[rbp], 14
	jg	.L55
	mov	rax, QWORD PTR -32[rbp]
	movzx	eax, WORD PTR [rax]
	mov	esi, eax
	movsx	edx, WORD PTR -4[rbp]
	movsx	ecx, WORD PTR -6[rbp]
	mov	eax, 64
	sub	eax, ecx
	cdqe
	lea	rcx, [rax+rax]
	lea	rax, DSP1ROM[rip]
	movzx	eax, WORD PTR [rcx+rax]
	movzx	eax, ax
	imul	eax, edx
	sar	eax, 15
	add	eax, esi
	mov	edx, eax
	mov	rax, QWORD PTR -32[rbp]
	mov	WORD PTR [rax], dx
	jmp	.L56
.L55:
	mov	WORD PTR -8[rbp], 16384
	cmp	WORD PTR -2[rbp], 0
	jns	.L61
	jmp	.L58
.L60:
	sar	WORD PTR -8[rbp]
	movzx	eax, WORD PTR -6[rbp]
	add	eax, 1
	mov	WORD PTR -6[rbp], ax
.L58:
	movzx	eax, WORD PTR -4[rbp]
	and	ax, WORD PTR -8[rbp]
	test	ax, ax
	je	.L59
	cmp	WORD PTR -8[rbp], 0
	jne	.L60
	jmp	.L59
.L62:
	sar	WORD PTR -8[rbp]
	movzx	eax, WORD PTR -6[rbp]
	add	eax, 1
	mov	WORD PTR -6[rbp], ax
.L61:
	movzx	eax, WORD PTR -4[rbp]
	and	ax, WORD PTR -8[rbp]
	test	ax, ax
	jne	.L59
	cmp	WORD PTR -8[rbp], 0
	jne	.L62
.L59:
	cmp	WORD PTR -6[rbp], 15
	jle	.L63
	movsx	edx, WORD PTR -4[rbp]
	movsx	eax, WORD PTR -6[rbp]
	add	eax, 18
	cdqe
	lea	rcx, [rax+rax]
	lea	rax, DSP1ROM[rip]
	movzx	eax, WORD PTR [rcx+rax]
	movzx	eax, ax
	imul	eax, edx
	add	eax, eax
	mov	edx, eax
	mov	rax, QWORD PTR -32[rbp]
	mov	WORD PTR [rax], dx
	jmp	.L56
.L63:
	mov	rax, QWORD PTR -32[rbp]
	movzx	eax, WORD PTR [rax]
	mov	edx, eax
	movzx	eax, WORD PTR -4[rbp]
	add	eax, edx
	mov	edx, eax
	mov	rax, QWORD PTR -32[rbp]
	mov	WORD PTR [rax], dx
	jmp	.L56
.L54:
	mov	rax, QWORD PTR -32[rbp]
	movzx	edx, WORD PTR -2[rbp]
	mov	WORD PTR [rax], dx
.L56:
	mov	rax, QWORD PTR -40[rbp]
	movzx	edx, WORD PTR -6[rbp]
	mov	WORD PTR [rax], dx
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	DSP1_NormalizeDouble, .-DSP1_NormalizeDouble
	.globl	DSP1_Truncate
	.type	DSP1_Truncate, @function
DSP1_Truncate:
.LFB16:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edx, edi
	mov	eax, esi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	cmp	WORD PTR -8[rbp], 0
	jle	.L65
	cmp	WORD PTR -4[rbp], 0
	jle	.L66
	mov	eax, 32767
	jmp	.L67
.L66:
	cmp	WORD PTR -4[rbp], 0
	jns	.L68
	mov	eax, -32767
	jmp	.L67
.L65:
	cmp	WORD PTR -8[rbp], 0
	jns	.L68
	movsx	edx, WORD PTR -4[rbp]
	movsx	eax, WORD PTR -8[rbp]
	add	eax, 49
	cdqe
	lea	rcx, [rax+rax]
	lea	rax, DSP1ROM[rip]
	movzx	eax, WORD PTR [rcx+rax]
	movzx	eax, ax
	imul	eax, edx
	sar	eax, 15
	jmp	.L67
.L68:
	movzx	eax, WORD PTR -4[rbp]
.L67:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE16:
	.size	DSP1_Truncate, .-DSP1_Truncate
	.globl	DSPOp04
	.type	DSPOp04, @function
DSPOp04:
.LFB17:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, WORD PTR Op04Angle[rip]
	cwde
	mov	edi, eax
	call	DSP1_Sin
	movsx	edx, ax
	movzx	eax, WORD PTR Op04Radius[rip]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	WORD PTR Op04Sin[rip], ax
	movzx	eax, WORD PTR Op04Angle[rip]
	cwde
	mov	edi, eax
	call	DSP1_Cos
	movsx	edx, ax
	movzx	eax, WORD PTR Op04Radius[rip]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	WORD PTR Op04Cos[rip], ax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE17:
	.size	DSPOp04, .-DSPOp04
	.globl	Op0CA
	.bss
	.align 2
	.type	Op0CA, @object
	.size	Op0CA, 2
Op0CA:
	.zero	2
	.globl	Op0CX1
	.align 2
	.type	Op0CX1, @object
	.size	Op0CX1, 2
Op0CX1:
	.zero	2
	.globl	Op0CY1
	.align 2
	.type	Op0CY1, @object
	.size	Op0CY1, 2
Op0CY1:
	.zero	2
	.globl	Op0CX2
	.align 2
	.type	Op0CX2, @object
	.size	Op0CX2, 2
Op0CX2:
	.zero	2
	.globl	Op0CY2
	.align 2
	.type	Op0CY2, @object
	.size	Op0CY2, 2
Op0CY2:
	.zero	2
	.text
	.globl	DSPOp0C
	.type	DSPOp0C, @function
DSPOp0C:
.LFB18:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r12
	push	rbx
	.cfi_offset 12, -24
	.cfi_offset 3, -32
	movzx	eax, WORD PTR Op0CY1[rip]
	movsx	ebx, ax
	movzx	eax, WORD PTR Op0CA[rip]
	cwde
	mov	edi, eax
	call	DSP1_Sin
	cwde
	imul	eax, ebx
	sar	eax, 15
	mov	r12d, eax
	movzx	eax, WORD PTR Op0CX1[rip]
	movsx	ebx, ax
	movzx	eax, WORD PTR Op0CA[rip]
	cwde
	mov	edi, eax
	call	DSP1_Cos
	cwde
	imul	eax, ebx
	sar	eax, 15
	add	eax, r12d
	mov	WORD PTR Op0CX2[rip], ax
	movzx	eax, WORD PTR Op0CY1[rip]
	movsx	ebx, ax
	movzx	eax, WORD PTR Op0CA[rip]
	cwde
	mov	edi, eax
	call	DSP1_Cos
	cwde
	imul	eax, ebx
	sar	eax, 15
	mov	r12d, eax
	movzx	eax, WORD PTR Op0CX1[rip]
	movsx	ebx, ax
	movzx	eax, WORD PTR Op0CA[rip]
	cwde
	mov	edi, eax
	call	DSP1_Sin
	cwde
	imul	eax, ebx
	sar	eax, 15
	mov	edx, eax
	mov	eax, r12d
	sub	eax, edx
	mov	WORD PTR Op0CY2[rip], ax
	nop
	pop	rbx
	pop	r12
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE18:
	.size	DSPOp0C, .-DSPOp0C
	.globl	CentreX
	.bss
	.align 2
	.type	CentreX, @object
	.size	CentreX, 2
CentreX:
	.zero	2
	.globl	CentreY
	.align 2
	.type	CentreY, @object
	.size	CentreY, 2
CentreY:
	.zero	2
	.globl	VOffset
	.align 2
	.type	VOffset, @object
	.size	VOffset, 2
VOffset:
	.zero	2
	.globl	VPlane_C
	.align 2
	.type	VPlane_C, @object
	.size	VPlane_C, 2
VPlane_C:
	.zero	2
	.globl	VPlane_E
	.align 2
	.type	VPlane_E, @object
	.size	VPlane_E, 2
VPlane_E:
	.zero	2
	.globl	SinAas
	.align 2
	.type	SinAas, @object
	.size	SinAas, 2
SinAas:
	.zero	2
	.globl	CosAas
	.align 2
	.type	CosAas, @object
	.size	CosAas, 2
CosAas:
	.zero	2
	.globl	SinAzs
	.align 2
	.type	SinAzs, @object
	.size	SinAzs, 2
SinAzs:
	.zero	2
	.globl	CosAzs
	.align 2
	.type	CosAzs, @object
	.size	CosAzs, 2
CosAzs:
	.zero	2
	.globl	SinAZS
	.align 2
	.type	SinAZS, @object
	.size	SinAZS, 2
SinAZS:
	.zero	2
	.globl	CosAZS
	.align 2
	.type	CosAZS, @object
	.size	CosAZS, 2
CosAZS:
	.zero	2
	.globl	SecAZS_C1
	.align 2
	.type	SecAZS_C1, @object
	.size	SecAZS_C1, 2
SecAZS_C1:
	.zero	2
	.globl	SecAZS_E1
	.align 2
	.type	SecAZS_E1, @object
	.size	SecAZS_E1, 2
SecAZS_E1:
	.zero	2
	.globl	SecAZS_C2
	.align 2
	.type	SecAZS_C2, @object
	.size	SecAZS_C2, 2
SecAZS_C2:
	.zero	2
	.globl	SecAZS_E2
	.align 2
	.type	SecAZS_E2, @object
	.size	SecAZS_E2, 2
SecAZS_E2:
	.zero	2
	.globl	MaxAZS_Exp
	.section	.rodata
	.align 32
	.type	MaxAZS_Exp, @object
	.size	MaxAZS_Exp, 32
MaxAZS_Exp:
	.value	14516
	.value	14519
	.value	14522
	.value	14526
	.value	14528
	.value	14532
	.value	14535
	.value	14538
	.value	14542
	.value	14544
	.value	14548
	.value	14551
	.value	14554
	.value	14557
	.value	14560
	.value	14564
	.text
	.globl	DSP1_Parameter
	.type	DSP1_Parameter, @function
DSP1_Parameter:
.LFB19:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 96
	mov	eax, ecx
	mov	r10d, r8d
	mov	r8d, r9d
	mov	ecx, DWORD PTR 16[rbp]
	mov	WORD PTR -36[rbp], di
	mov	WORD PTR -40[rbp], si
	mov	WORD PTR -44[rbp], dx
	mov	WORD PTR -48[rbp], ax
	mov	eax, r10d
	mov	WORD PTR -52[rbp], ax
	mov	eax, r8d
	mov	WORD PTR -56[rbp], ax
	mov	eax, ecx
	mov	WORD PTR -60[rbp], ax
	mov	rax, QWORD PTR 24[rbp]
	mov	QWORD PTR -72[rbp], rax
	mov	rax, QWORD PTR 32[rbp]
	mov	QWORD PTR -80[rbp], rax
	mov	rax, QWORD PTR 40[rbp]
	mov	QWORD PTR -88[rbp], rax
	mov	rax, QWORD PTR 48[rbp]
	mov	QWORD PTR -96[rbp], rax
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	movzx	eax, WORD PTR -60[rbp]
	mov	WORD PTR -14[rbp], ax
	movsx	eax, WORD PTR -56[rbp]
	mov	edi, eax
	call	DSP1_Sin
	mov	WORD PTR SinAas[rip], ax
	movsx	eax, WORD PTR -56[rbp]
	mov	edi, eax
	call	DSP1_Cos
	mov	WORD PTR CosAas[rip], ax
	movsx	eax, WORD PTR -60[rbp]
	mov	edi, eax
	call	DSP1_Sin
	mov	WORD PTR SinAzs[rip], ax
	movsx	eax, WORD PTR -60[rbp]
	mov	edi, eax
	call	DSP1_Cos
	mov	WORD PTR CosAzs[rip], ax
	movsx	eax, WORD PTR -48[rbp]
	movzx	edx, WORD PTR SinAzs[rip]
	movsx	edx, dx
	movzx	ecx, WORD PTR SinAas[rip]
	movsx	ecx, cx
	neg	ecx
	imul	edx, ecx
	sar	edx, 15
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movzx	eax, WORD PTR -36[rbp]
	add	eax, edx
	mov	WORD PTR CentreX[rip], ax
	movsx	eax, WORD PTR -48[rbp]
	movzx	edx, WORD PTR SinAzs[rip]
	movsx	ecx, dx
	movzx	edx, WORD PTR CosAas[rip]
	movsx	edx, dx
	imul	edx, ecx
	sar	edx, 15
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movzx	eax, WORD PTR -40[rbp]
	add	eax, edx
	mov	WORD PTR CentreY[rip], ax
	mov	WORD PTR -16[rbp], 0
	movsx	ecx, WORD PTR -48[rbp]
	movzx	eax, WORD PTR CosAzs[rip]
	movsx	edx, ax
	mov	eax, edx
	sal	eax, 15
	sub	eax, edx
	sar	eax, 15
	imul	eax, ecx
	sar	eax, 15
	mov	edx, eax
	movzx	eax, WORD PTR -44[rbp]
	add	eax, edx
	cwde
	lea	rdx, -16[rbp]
	lea	rcx, -18[rbp]
	mov	rsi, rcx
	mov	edi, eax
	call	DSP1_Normalize
	movzx	eax, WORD PTR -18[rbp]
	mov	WORD PTR VPlane_C[rip], ax
	movzx	eax, WORD PTR -16[rbp]
	mov	WORD PTR VPlane_E[rip], ax
	movzx	eax, WORD PTR -16[rbp]
	cwde
	neg	eax
	cdqe
	lea	rdx, [rax+rax]
	lea	rax, MaxAZS_Exp[rip]
	movzx	eax, WORD PTR [rdx+rax]
	mov	WORD PTR -12[rbp], ax
	cmp	WORD PTR -14[rbp], 0
	jns	.L72
	movzx	eax, WORD PTR -12[rbp]
	neg	eax
	mov	WORD PTR -12[rbp], ax
	movzx	eax, WORD PTR -12[rbp]
	cmp	ax, WORD PTR -14[rbp]
	jl	.L73
	movzx	eax, WORD PTR -12[rbp]
	add	eax, 1
	mov	WORD PTR -14[rbp], ax
	jmp	.L73
.L72:
	movzx	eax, WORD PTR -14[rbp]
	cmp	ax, WORD PTR -12[rbp]
	jle	.L73
	movzx	eax, WORD PTR -12[rbp]
	mov	WORD PTR -14[rbp], ax
.L73:
	movsx	eax, WORD PTR -14[rbp]
	mov	edi, eax
	call	DSP1_Sin
	mov	WORD PTR SinAZS[rip], ax
	movsx	eax, WORD PTR -14[rbp]
	mov	edi, eax
	call	DSP1_Cos
	mov	WORD PTR CosAZS[rip], ax
	movzx	eax, WORD PTR CosAZS[rip]
	cwde
	lea	rcx, SecAZS_E1[rip]
	lea	rdx, SecAZS_C1[rip]
	mov	esi, 0
	mov	edi, eax
	call	DSP1_Inverse
	movzx	eax, WORD PTR -18[rbp]
	movsx	edx, ax
	movzx	eax, WORD PTR SecAZS_C1[rip]
	cwde
	imul	eax, edx
	sar	eax, 15
	cwde
	lea	rdx, -16[rbp]
	lea	rcx, -18[rbp]
	mov	rsi, rcx
	mov	edi, eax
	call	DSP1_Normalize
	movzx	eax, WORD PTR -16[rbp]
	mov	edx, eax
	movzx	eax, WORD PTR SecAZS_E1[rip]
	add	eax, edx
	mov	WORD PTR -16[rbp], ax
	movzx	eax, WORD PTR -16[rbp]
	movsx	edx, ax
	movzx	eax, WORD PTR -18[rbp]
	cwde
	mov	esi, edx
	mov	edi, eax
	call	DSP1_Truncate
	movsx	edx, ax
	movzx	eax, WORD PTR SinAZS[rip]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	WORD PTR -18[rbp], ax
	movzx	eax, WORD PTR -18[rbp]
	movsx	edx, ax
	movzx	eax, WORD PTR SinAas[rip]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movzx	eax, WORD PTR CentreX[rip]
	add	eax, edx
	mov	WORD PTR CentreX[rip], ax
	movzx	eax, WORD PTR CentreY[rip]
	mov	ecx, eax
	movzx	eax, WORD PTR -18[rbp]
	movsx	edx, ax
	movzx	eax, WORD PTR CosAas[rip]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	mov	eax, ecx
	sub	eax, edx
	mov	WORD PTR CentreY[rip], ax
	movzx	edx, WORD PTR CentreX[rip]
	mov	rax, QWORD PTR -88[rbp]
	mov	WORD PTR [rax], dx
	movzx	edx, WORD PTR CentreY[rip]
	mov	rax, QWORD PTR -96[rbp]
	mov	WORD PTR [rax], dx
	mov	rax, QWORD PTR -72[rbp]
	mov	WORD PTR [rax], 0
	movzx	eax, WORD PTR -60[rbp]
	cmp	ax, WORD PTR -14[rbp]
	jne	.L74
	movzx	eax, WORD PTR -60[rbp]
	cmp	ax, WORD PTR -12[rbp]
	jne	.L75
.L74:
	cmp	WORD PTR -60[rbp], -32768
	jne	.L76
	mov	WORD PTR -60[rbp], -32767
.L76:
	movzx	eax, WORD PTR -60[rbp]
	movzx	edx, WORD PTR -12[rbp]
	sub	eax, edx
	mov	WORD PTR -18[rbp], ax
	movzx	eax, WORD PTR -18[rbp]
	test	ax, ax
	js	.L77
	movzx	eax, WORD PTR -18[rbp]
	sub	eax, 1
	mov	WORD PTR -18[rbp], ax
.L77:
	movzx	eax, WORD PTR -18[rbp]
	sal	eax, 2
	not	eax
	mov	WORD PTR -10[rbp], ax
	movsx	edx, WORD PTR -10[rbp]
	mov	eax, 5292
	movzx	eax, ax
	imul	eax, edx
	sar	eax, 15
	mov	WORD PTR -18[rbp], ax
	movzx	eax, WORD PTR -18[rbp]
	movsx	edx, ax
	movsx	eax, WORD PTR -10[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	mov	eax, 25736
	add	eax, edx
	mov	WORD PTR -18[rbp], ax
	mov	rax, QWORD PTR -72[rbp]
	movzx	eax, WORD PTR [rax]
	mov	ecx, eax
	movzx	eax, WORD PTR -18[rbp]
	movsx	edx, ax
	movsx	eax, WORD PTR -10[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -52[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	mov	eax, ecx
	sub	eax, edx
	mov	edx, eax
	mov	rax, QWORD PTR -72[rbp]
	mov	WORD PTR [rax], dx
	movsx	edx, WORD PTR -10[rbp]
	movsx	eax, WORD PTR -10[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	WORD PTR -18[rbp], ax
	movzx	eax, WORD PTR -18[rbp]
	movsx	edx, ax
	mov	eax, 2598
	movzx	eax, ax
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	mov	eax, 10106
	add	eax, edx
	mov	WORD PTR -10[rbp], ax
	movzx	eax, WORD PTR -18[rbp]
	movsx	edx, ax
	movsx	eax, WORD PTR -10[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movzx	eax, WORD PTR CosAZS[rip]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movzx	eax, WORD PTR CosAZS[rip]
	add	eax, edx
	mov	WORD PTR CosAZS[rip], ax
.L75:
	movsx	edx, WORD PTR -52[rbp]
	movzx	eax, WORD PTR CosAZS[rip]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	WORD PTR VOffset[rip], ax
	movzx	eax, WORD PTR SinAZS[rip]
	cwde
	lea	rcx, -16[rbp]
	lea	rdx, -20[rbp]
	mov	esi, 0
	mov	edi, eax
	call	DSP1_Inverse
	movzx	eax, WORD PTR VOffset[rip]
	cwde
	lea	rdx, -16[rbp]
	lea	rcx, -18[rbp]
	mov	rsi, rcx
	mov	edi, eax
	call	DSP1_Normalize
	movzx	eax, WORD PTR -18[rbp]
	movsx	edx, ax
	movzx	eax, WORD PTR -20[rbp]
	cwde
	imul	eax, edx
	sar	eax, 15
	cwde
	lea	rdx, -16[rbp]
	lea	rcx, -18[rbp]
	mov	rsi, rcx
	mov	edi, eax
	call	DSP1_Normalize
	movzx	eax, WORD PTR -18[rbp]
	cmp	ax, -32768
	jne	.L78
	movzx	eax, WORD PTR -18[rbp]
	sar	ax
	mov	WORD PTR -18[rbp], ax
	movzx	eax, WORD PTR -16[rbp]
	add	eax, 1
	mov	WORD PTR -16[rbp], ax
.L78:
	movzx	eax, WORD PTR -16[rbp]
	movsx	edx, ax
	movzx	eax, WORD PTR -18[rbp]
	neg	eax
	cwde
	mov	esi, edx
	mov	edi, eax
	call	DSP1_Truncate
	mov	rdx, QWORD PTR -80[rbp]
	mov	WORD PTR [rdx], ax
	movzx	eax, WORD PTR CosAZS[rip]
	cwde
	lea	rcx, SecAZS_E2[rip]
	lea	rdx, SecAZS_C2[rip]
	mov	esi, 0
	mov	edi, eax
	call	DSP1_Inverse
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L79
	call	__stack_chk_fail@PLT
.L79:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE19:
	.size	DSP1_Parameter, .-DSP1_Parameter
	.globl	DSP1_Raster
	.type	DSP1_Raster, @function
DSP1_Raster:
.LFB20:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 64
	mov	eax, edi
	mov	QWORD PTR -32[rbp], rsi
	mov	QWORD PTR -40[rbp], rdx
	mov	QWORD PTR -48[rbp], rcx
	mov	QWORD PTR -56[rbp], r8
	mov	WORD PTR -20[rbp], ax
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	movsx	edx, WORD PTR -20[rbp]
	movzx	eax, WORD PTR SinAzs[rip]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movzx	eax, WORD PTR VOffset[rip]
	add	eax, edx
	cwde
	lea	rcx, -14[rbp]
	lea	rdx, -16[rbp]
	mov	esi, 7
	mov	edi, eax
	call	DSP1_Inverse
	movzx	eax, WORD PTR -14[rbp]
	mov	edx, eax
	movzx	eax, WORD PTR VPlane_E[rip]
	add	eax, edx
	mov	WORD PTR -14[rbp], ax
	movzx	eax, WORD PTR -16[rbp]
	movsx	edx, ax
	movzx	eax, WORD PTR VPlane_C[rip]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	WORD PTR -10[rbp], ax
	movzx	eax, WORD PTR -14[rbp]
	mov	edx, eax
	movzx	eax, WORD PTR SecAZS_E2[rip]
	add	eax, edx
	mov	WORD PTR -12[rbp], ax
	movsx	eax, WORD PTR -10[rbp]
	lea	rdx, -14[rbp]
	lea	rcx, -16[rbp]
	mov	rsi, rcx
	mov	edi, eax
	call	DSP1_Normalize
	movzx	eax, WORD PTR -14[rbp]
	movsx	edx, ax
	movzx	eax, WORD PTR -16[rbp]
	cwde
	mov	esi, edx
	mov	edi, eax
	call	DSP1_Truncate
	mov	WORD PTR -16[rbp], ax
	movzx	eax, WORD PTR -16[rbp]
	movsx	edx, ax
	movzx	eax, WORD PTR CosAas[rip]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	mov	rax, QWORD PTR -32[rbp]
	mov	WORD PTR [rax], dx
	movzx	eax, WORD PTR -16[rbp]
	movsx	edx, ax
	movzx	eax, WORD PTR SinAas[rip]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	mov	rax, QWORD PTR -48[rbp]
	mov	WORD PTR [rax], dx
	movsx	edx, WORD PTR -10[rbp]
	movzx	eax, WORD PTR SecAZS_C2[rip]
	cwde
	imul	eax, edx
	sar	eax, 15
	cwde
	lea	rdx, -12[rbp]
	lea	rcx, -16[rbp]
	mov	rsi, rcx
	mov	edi, eax
	call	DSP1_Normalize
	movzx	eax, WORD PTR -12[rbp]
	movsx	edx, ax
	movzx	eax, WORD PTR -16[rbp]
	cwde
	mov	esi, edx
	mov	edi, eax
	call	DSP1_Truncate
	mov	WORD PTR -16[rbp], ax
	movzx	eax, WORD PTR -16[rbp]
	cwde
	movzx	edx, WORD PTR SinAas[rip]
	movsx	edx, dx
	neg	edx
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	mov	rax, QWORD PTR -40[rbp]
	mov	WORD PTR [rax], dx
	movzx	eax, WORD PTR -16[rbp]
	movsx	edx, ax
	movzx	eax, WORD PTR CosAas[rip]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	mov	rax, QWORD PTR -56[rbp]
	mov	WORD PTR [rax], dx
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L81
	call	__stack_chk_fail@PLT
.L81:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE20:
	.size	DSP1_Raster, .-DSP1_Raster
	.globl	Op02FX
	.bss
	.align 2
	.type	Op02FX, @object
	.size	Op02FX, 2
Op02FX:
	.zero	2
	.globl	Op02FY
	.align 2
	.type	Op02FY, @object
	.size	Op02FY, 2
Op02FY:
	.zero	2
	.globl	Op02FZ
	.align 2
	.type	Op02FZ, @object
	.size	Op02FZ, 2
Op02FZ:
	.zero	2
	.globl	Op02LFE
	.align 2
	.type	Op02LFE, @object
	.size	Op02LFE, 2
Op02LFE:
	.zero	2
	.globl	Op02LES
	.align 2
	.type	Op02LES, @object
	.size	Op02LES, 2
Op02LES:
	.zero	2
	.globl	Op02AAS
	.align 2
	.type	Op02AAS, @object
	.size	Op02AAS, 2
Op02AAS:
	.zero	2
	.globl	Op02AZS
	.align 2
	.type	Op02AZS, @object
	.size	Op02AZS, 2
Op02AZS:
	.zero	2
	.globl	Op02VOF
	.align 2
	.type	Op02VOF, @object
	.size	Op02VOF, 2
Op02VOF:
	.zero	2
	.globl	Op02VVA
	.align 2
	.type	Op02VVA, @object
	.size	Op02VVA, 2
Op02VVA:
	.zero	2
	.globl	Op02CX
	.align 2
	.type	Op02CX, @object
	.size	Op02CX, 2
Op02CX:
	.zero	2
	.globl	Op02CY
	.align 2
	.type	Op02CY, @object
	.size	Op02CY, 2
Op02CY:
	.zero	2
	.text
	.globl	DSPOp02
	.type	DSPOp02, @function
DSPOp02:
.LFB21:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, WORD PTR Op02AZS[rip]
	movsx	edi, ax
	movzx	eax, WORD PTR Op02AAS[rip]
	movsx	r9d, ax
	movzx	eax, WORD PTR Op02LES[rip]
	movsx	r10d, ax
	movzx	eax, WORD PTR Op02LFE[rip]
	movsx	ecx, ax
	movzx	eax, WORD PTR Op02FZ[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR Op02FY[rip]
	movsx	esi, ax
	movzx	eax, WORD PTR Op02FX[rip]
	cwde
	sub	rsp, 8
	lea	r8, Op02CY[rip]
	push	r8
	lea	r8, Op02CX[rip]
	push	r8
	lea	r8, Op02VVA[rip]
	push	r8
	lea	r8, Op02VOF[rip]
	push	r8
	push	rdi
	mov	r8d, r10d
	mov	edi, eax
	call	DSP1_Parameter
	add	rsp, 48
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE21:
	.size	DSPOp02, .-DSPOp02
	.globl	Op0AVS
	.bss
	.align 2
	.type	Op0AVS, @object
	.size	Op0AVS, 2
Op0AVS:
	.zero	2
	.globl	Op0AA
	.align 2
	.type	Op0AA, @object
	.size	Op0AA, 2
Op0AA:
	.zero	2
	.globl	Op0AB
	.align 2
	.type	Op0AB, @object
	.size	Op0AB, 2
Op0AB:
	.zero	2
	.globl	Op0AC
	.align 2
	.type	Op0AC, @object
	.size	Op0AC, 2
Op0AC:
	.zero	2
	.globl	Op0AD
	.align 2
	.type	Op0AD, @object
	.size	Op0AD, 2
Op0AD:
	.zero	2
	.text
	.globl	DSPOp0A
	.type	DSPOp0A, @function
DSPOp0A:
.LFB22:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, WORD PTR Op0AVS[rip]
	cwde
	lea	r8, Op0AD[rip]
	lea	rcx, Op0AC[rip]
	lea	rdx, Op0AB[rip]
	lea	rsi, Op0AA[rip]
	mov	edi, eax
	call	DSP1_Raster
	movzx	eax, WORD PTR Op0AVS[rip]
	add	eax, 1
	mov	WORD PTR Op0AVS[rip], ax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE22:
	.size	DSPOp0A, .-DSPOp0A
	.globl	Op06X
	.bss
	.align 2
	.type	Op06X, @object
	.size	Op06X, 2
Op06X:
	.zero	2
	.globl	Op06Y
	.align 2
	.type	Op06Y, @object
	.size	Op06Y, 2
Op06Y:
	.zero	2
	.globl	Op06Z
	.align 2
	.type	Op06Z, @object
	.size	Op06Z, 2
Op06Z:
	.zero	2
	.globl	Op06H
	.align 2
	.type	Op06H, @object
	.size	Op06H, 2
Op06H:
	.zero	2
	.globl	Op06V
	.align 2
	.type	Op06V, @object
	.size	Op06V, 2
Op06V:
	.zero	2
	.globl	Op06S
	.align 2
	.type	Op06S, @object
	.size	Op06S, 2
Op06S:
	.zero	2
	.globl	ObjPX
	.align 8
	.type	ObjPX, @object
	.size	ObjPX, 8
ObjPX:
	.zero	8
	.globl	ObjPY
	.align 8
	.type	ObjPY, @object
	.size	ObjPY, 8
ObjPY:
	.zero	8
	.globl	ObjPZ
	.align 8
	.type	ObjPZ, @object
	.size	ObjPZ, 8
ObjPZ:
	.zero	8
	.globl	ObjPX1
	.align 8
	.type	ObjPX1, @object
	.size	ObjPX1, 8
ObjPX1:
	.zero	8
	.globl	ObjPY1
	.align 8
	.type	ObjPY1, @object
	.size	ObjPY1, 8
ObjPY1:
	.zero	8
	.globl	ObjPZ1
	.align 8
	.type	ObjPZ1, @object
	.size	ObjPZ1, 8
ObjPZ1:
	.zero	8
	.globl	ObjPX2
	.align 8
	.type	ObjPX2, @object
	.size	ObjPX2, 8
ObjPX2:
	.zero	8
	.globl	ObjPY2
	.align 8
	.type	ObjPY2, @object
	.size	ObjPY2, 8
ObjPY2:
	.zero	8
	.globl	ObjPZ2
	.align 8
	.type	ObjPZ2, @object
	.size	ObjPZ2, 8
ObjPZ2:
	.zero	8
	.globl	DivideOp06
	.align 8
	.type	DivideOp06, @object
	.size	DivideOp06, 8
DivideOp06:
	.zero	8
	.globl	Temp
	.align 4
	.type	Temp, @object
	.size	Temp, 4
Temp:
	.zero	4
	.globl	tanval2
	.align 4
	.type	tanval2, @object
	.size	tanval2, 4
tanval2:
	.zero	4
	.text
	.globl	DSPOp06
	.type	DSPOp06, @function
DSPOp06:
.LFB23:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, WORD PTR Op06X[rip]
	cwde
	movzx	edx, WORD PTR Op02FX[rip]
	movsx	edx, dx
	sub	eax, edx
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, eax
	movsd	QWORD PTR ObjPX[rip], xmm0
	movzx	eax, WORD PTR Op06Y[rip]
	cwde
	movzx	edx, WORD PTR Op02FY[rip]
	movsx	edx, dx
	sub	eax, edx
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, eax
	movsd	QWORD PTR ObjPY[rip], xmm0
	movzx	eax, WORD PTR Op06Z[rip]
	cwde
	movzx	edx, WORD PTR Op02FZ[rip]
	movsx	edx, dx
	sub	eax, edx
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, eax
	movsd	QWORD PTR ObjPZ[rip], xmm0
	movzx	eax, WORD PTR Op02AAS[rip]
	movsx	edx, ax
	mov	eax, 32768
	sub	eax, edx
	lea	edx, 31[rax]
	test	eax, eax
	cmovs	eax, edx
	sar	eax, 5
	and	eax, 2047
	mov	DWORD PTR tanval2[rip], eax
	mov	eax, DWORD PTR tanval2[rip]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, CosTable2[rip]
	movsd	xmm1, QWORD PTR [rdx+rax]
	movsd	xmm0, QWORD PTR ObjPX[rip]
	mulsd	xmm1, xmm0
	mov	eax, DWORD PTR tanval2[rip]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, SinTable2[rip]
	movsd	xmm0, QWORD PTR [rdx+rax]
	movq	xmm2, QWORD PTR .LC5[rip]
	xorpd	xmm2, xmm0
	movsd	xmm0, QWORD PTR ObjPY[rip]
	mulsd	xmm0, xmm2
	addsd	xmm0, xmm1
	movsd	QWORD PTR ObjPX1[rip], xmm0
	mov	eax, DWORD PTR tanval2[rip]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, SinTable2[rip]
	movsd	xmm1, QWORD PTR [rdx+rax]
	movsd	xmm0, QWORD PTR ObjPX[rip]
	mulsd	xmm1, xmm0
	mov	eax, DWORD PTR tanval2[rip]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, CosTable2[rip]
	movsd	xmm2, QWORD PTR [rdx+rax]
	movsd	xmm0, QWORD PTR ObjPY[rip]
	mulsd	xmm0, xmm2
	addsd	xmm0, xmm1
	movsd	QWORD PTR ObjPY1[rip], xmm0
	movsd	xmm0, QWORD PTR ObjPZ[rip]
	movsd	QWORD PTR ObjPZ1[rip], xmm0
	movzx	eax, WORD PTR Op02AZS[rip]
	cwde
	lea	edx, 31[rax]
	test	eax, eax
	cmovs	eax, edx
	sar	eax, 5
	neg	eax
	and	eax, 2047
	mov	DWORD PTR tanval2[rip], eax
	movsd	xmm0, QWORD PTR ObjPX1[rip]
	movsd	QWORD PTR ObjPX2[rip], xmm0
	mov	eax, DWORD PTR tanval2[rip]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, CosTable2[rip]
	movsd	xmm1, QWORD PTR [rdx+rax]
	movsd	xmm0, QWORD PTR ObjPY1[rip]
	mulsd	xmm1, xmm0
	mov	eax, DWORD PTR tanval2[rip]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, SinTable2[rip]
	movsd	xmm0, QWORD PTR [rdx+rax]
	movq	xmm2, QWORD PTR .LC5[rip]
	xorpd	xmm2, xmm0
	movsd	xmm0, QWORD PTR ObjPZ1[rip]
	mulsd	xmm0, xmm2
	addsd	xmm0, xmm1
	movsd	QWORD PTR ObjPY2[rip], xmm0
	mov	eax, DWORD PTR tanval2[rip]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, SinTable2[rip]
	movsd	xmm1, QWORD PTR [rdx+rax]
	movsd	xmm0, QWORD PTR ObjPY1[rip]
	mulsd	xmm1, xmm0
	mov	eax, DWORD PTR tanval2[rip]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, CosTable2[rip]
	movsd	xmm2, QWORD PTR [rdx+rax]
	movsd	xmm0, QWORD PTR ObjPZ1[rip]
	mulsd	xmm0, xmm2
	addsd	xmm0, xmm1
	movsd	QWORD PTR ObjPZ2[rip], xmm0
	movsd	xmm0, QWORD PTR ObjPZ2[rip]
	movzx	eax, WORD PTR Op02LFE[rip]
	cwde
	pxor	xmm1, xmm1
	cvtsi2sd	xmm1, eax
	subsd	xmm0, xmm1
	movsd	QWORD PTR ObjPZ2[rip], xmm0
	movsd	xmm1, QWORD PTR ObjPZ2[rip]
	pxor	xmm0, xmm0
	comisd	xmm0, xmm1
	jbe	.L95
	movzx	eax, WORD PTR Op02LES[rip]
	cwde
	pxor	xmm1, xmm1
	cvtsi2sd	xmm1, eax
	movsd	xmm0, QWORD PTR ObjPX2[rip]
	mulsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR ObjPZ2[rip]
	divsd	xmm0, xmm1
	cvttsd2si	eax, xmm0
	mov	WORD PTR Op06H[rip], ax
	movzx	eax, WORD PTR Op02LES[rip]
	cwde
	pxor	xmm1, xmm1
	cvtsi2sd	xmm1, eax
	movsd	xmm0, QWORD PTR ObjPY2[rip]
	mulsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR ObjPZ2[rip]
	divsd	xmm0, xmm1
	cvttsd2si	eax, xmm0
	mov	WORD PTR Op06V[rip], ax
	movzx	eax, WORD PTR Op02LES[rip]
	cwde
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, eax
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	xmm1, QWORD PTR -8[rbp]
	movsd	xmm0, QWORD PTR .LC7[rip]
	mulsd	xmm0, xmm1
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	xmm0, QWORD PTR -8[rbp]
	movq	xmm1, QWORD PTR .LC5[rip]
	xorpd	xmm0, xmm1
	movsd	xmm1, QWORD PTR ObjPZ2[rip]
	divsd	xmm0, xmm1
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	xmm0, QWORD PTR -8[rbp]
	comisd	xmm0, QWORD PTR .LC8[rip]
	jbe	.L96
	movsd	xmm0, QWORD PTR .LC8[rip]
	movsd	QWORD PTR -8[rbp], xmm0
	jmp	.L89
.L96:
	pxor	xmm0, xmm0
	comisd	xmm0, QWORD PTR -8[rbp]
	jbe	.L89
	pxor	xmm0, xmm0
	movsd	QWORD PTR -8[rbp], xmm0
.L89:
	cvttsd2si	eax, QWORD PTR -8[rbp]
	mov	WORD PTR Op06S[rip], ax
	jmp	.L97
.L95:
	mov	WORD PTR Op06H[rip], 0
	mov	WORD PTR Op06V[rip], 224
	mov	WORD PTR Op06S[rip], -1
.L97:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE23:
	.size	DSPOp06, .-DSPOp06
	.globl	matrixC
	.bss
	.align 16
	.type	matrixC, @object
	.size	matrixC, 18
matrixC:
	.zero	18
	.globl	matrixB
	.align 16
	.type	matrixB, @object
	.size	matrixB, 18
matrixB:
	.zero	18
	.globl	matrixA
	.align 16
	.type	matrixA, @object
	.size	matrixA, 18
matrixA:
	.zero	18
	.globl	Op01m
	.align 2
	.type	Op01m, @object
	.size	Op01m, 2
Op01m:
	.zero	2
	.globl	Op01Zr
	.align 2
	.type	Op01Zr, @object
	.size	Op01Zr, 2
Op01Zr:
	.zero	2
	.globl	Op01Xr
	.align 2
	.type	Op01Xr, @object
	.size	Op01Xr, 2
Op01Xr:
	.zero	2
	.globl	Op01Yr
	.align 2
	.type	Op01Yr, @object
	.size	Op01Yr, 2
Op01Yr:
	.zero	2
	.globl	Op11m
	.align 2
	.type	Op11m, @object
	.size	Op11m, 2
Op11m:
	.zero	2
	.globl	Op11Zr
	.align 2
	.type	Op11Zr, @object
	.size	Op11Zr, 2
Op11Zr:
	.zero	2
	.globl	Op11Xr
	.align 2
	.type	Op11Xr, @object
	.size	Op11Xr, 2
Op11Xr:
	.zero	2
	.globl	Op11Yr
	.align 2
	.type	Op11Yr, @object
	.size	Op11Yr, 2
Op11Yr:
	.zero	2
	.globl	Op21m
	.align 2
	.type	Op21m, @object
	.size	Op21m, 2
Op21m:
	.zero	2
	.globl	Op21Zr
	.align 2
	.type	Op21Zr, @object
	.size	Op21Zr, 2
Op21Zr:
	.zero	2
	.globl	Op21Xr
	.align 2
	.type	Op21Xr, @object
	.size	Op21Xr, 2
Op21Xr:
	.zero	2
	.globl	Op21Yr
	.align 2
	.type	Op21Yr, @object
	.size	Op21Yr, 2
Op21Yr:
	.zero	2
	.text
	.globl	DSPOp01
	.type	DSPOp01, @function
DSPOp01:
.LFB24:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	movzx	eax, WORD PTR Op01Zr[rip]
	cwde
	mov	edi, eax
	call	DSP1_Sin
	mov	WORD PTR -12[rbp], ax
	movzx	eax, WORD PTR Op01Zr[rip]
	cwde
	mov	edi, eax
	call	DSP1_Cos
	mov	WORD PTR -10[rbp], ax
	movzx	eax, WORD PTR Op01Yr[rip]
	cwde
	mov	edi, eax
	call	DSP1_Sin
	mov	WORD PTR -8[rbp], ax
	movzx	eax, WORD PTR Op01Yr[rip]
	cwde
	mov	edi, eax
	call	DSP1_Cos
	mov	WORD PTR -6[rbp], ax
	movzx	eax, WORD PTR Op01Xr[rip]
	cwde
	mov	edi, eax
	call	DSP1_Sin
	mov	WORD PTR -4[rbp], ax
	movzx	eax, WORD PTR Op01Xr[rip]
	cwde
	mov	edi, eax
	call	DSP1_Cos
	mov	WORD PTR -2[rbp], ax
	movzx	eax, WORD PTR Op01m[rip]
	sar	ax
	mov	WORD PTR Op01m[rip], ax
	movzx	eax, WORD PTR Op01m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -10[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -6[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	WORD PTR matrixA[rip], ax
	movzx	eax, WORD PTR Op01m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -12[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -6[rbp]
	imul	eax, edx
	sar	eax, 15
	neg	eax
	mov	WORD PTR matrixA[rip+2], ax
	movzx	eax, WORD PTR Op01m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -8[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	WORD PTR matrixA[rip+4], ax
	movzx	eax, WORD PTR Op01m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -12[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -2[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	ecx, eax
	movzx	eax, WORD PTR Op01m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -10[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -4[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -8[rbp]
	imul	eax, edx
	sar	eax, 15
	add	eax, ecx
	mov	WORD PTR matrixA[rip+6], ax
	movzx	eax, WORD PTR Op01m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -10[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -2[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	ecx, eax
	movzx	eax, WORD PTR Op01m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -12[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -4[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -8[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	mov	eax, ecx
	sub	eax, edx
	mov	WORD PTR matrixA[rip+8], ax
	movzx	eax, WORD PTR Op01m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -4[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -6[rbp]
	imul	eax, edx
	sar	eax, 15
	neg	eax
	mov	WORD PTR matrixA[rip+10], ax
	movzx	eax, WORD PTR Op01m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -12[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -4[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	ecx, eax
	movzx	eax, WORD PTR Op01m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -10[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -2[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -8[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	mov	eax, ecx
	sub	eax, edx
	mov	WORD PTR matrixA[rip+12], ax
	movzx	eax, WORD PTR Op01m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -10[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -4[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	ecx, eax
	movzx	eax, WORD PTR Op01m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -12[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -2[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -8[rbp]
	imul	eax, edx
	sar	eax, 15
	add	eax, ecx
	mov	WORD PTR matrixA[rip+14], ax
	movzx	eax, WORD PTR Op01m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -2[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -6[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	WORD PTR matrixA[rip+16], ax
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE24:
	.size	DSPOp01, .-DSPOp01
	.globl	DSPOp11
	.type	DSPOp11, @function
DSPOp11:
.LFB25:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	movzx	eax, WORD PTR Op11Zr[rip]
	cwde
	mov	edi, eax
	call	DSP1_Sin
	mov	WORD PTR -12[rbp], ax
	movzx	eax, WORD PTR Op11Zr[rip]
	cwde
	mov	edi, eax
	call	DSP1_Cos
	mov	WORD PTR -10[rbp], ax
	movzx	eax, WORD PTR Op11Yr[rip]
	cwde
	mov	edi, eax
	call	DSP1_Sin
	mov	WORD PTR -8[rbp], ax
	movzx	eax, WORD PTR Op11Yr[rip]
	cwde
	mov	edi, eax
	call	DSP1_Cos
	mov	WORD PTR -6[rbp], ax
	movzx	eax, WORD PTR Op11Xr[rip]
	cwde
	mov	edi, eax
	call	DSP1_Sin
	mov	WORD PTR -4[rbp], ax
	movzx	eax, WORD PTR Op11Xr[rip]
	cwde
	mov	edi, eax
	call	DSP1_Cos
	mov	WORD PTR -2[rbp], ax
	movzx	eax, WORD PTR Op11m[rip]
	sar	ax
	mov	WORD PTR Op11m[rip], ax
	movzx	eax, WORD PTR Op11m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -10[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -6[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	WORD PTR matrixB[rip], ax
	movzx	eax, WORD PTR Op11m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -12[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -6[rbp]
	imul	eax, edx
	sar	eax, 15
	neg	eax
	mov	WORD PTR matrixB[rip+2], ax
	movzx	eax, WORD PTR Op11m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -8[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	WORD PTR matrixB[rip+4], ax
	movzx	eax, WORD PTR Op11m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -12[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -2[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	ecx, eax
	movzx	eax, WORD PTR Op11m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -10[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -4[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -8[rbp]
	imul	eax, edx
	sar	eax, 15
	add	eax, ecx
	mov	WORD PTR matrixB[rip+6], ax
	movzx	eax, WORD PTR Op11m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -10[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -2[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	ecx, eax
	movzx	eax, WORD PTR Op11m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -12[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -4[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -8[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	mov	eax, ecx
	sub	eax, edx
	mov	WORD PTR matrixB[rip+8], ax
	movzx	eax, WORD PTR Op11m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -4[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -6[rbp]
	imul	eax, edx
	sar	eax, 15
	neg	eax
	mov	WORD PTR matrixB[rip+10], ax
	movzx	eax, WORD PTR Op11m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -12[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -4[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	ecx, eax
	movzx	eax, WORD PTR Op11m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -10[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -2[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -8[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	mov	eax, ecx
	sub	eax, edx
	mov	WORD PTR matrixB[rip+12], ax
	movzx	eax, WORD PTR Op11m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -10[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -4[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	ecx, eax
	movzx	eax, WORD PTR Op11m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -12[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -2[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -8[rbp]
	imul	eax, edx
	sar	eax, 15
	add	eax, ecx
	mov	WORD PTR matrixB[rip+14], ax
	movzx	eax, WORD PTR Op11m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -2[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -6[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	WORD PTR matrixB[rip+16], ax
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE25:
	.size	DSPOp11, .-DSPOp11
	.globl	DSPOp21
	.type	DSPOp21, @function
DSPOp21:
.LFB26:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	movzx	eax, WORD PTR Op21Zr[rip]
	cwde
	mov	edi, eax
	call	DSP1_Sin
	mov	WORD PTR -12[rbp], ax
	movzx	eax, WORD PTR Op21Zr[rip]
	cwde
	mov	edi, eax
	call	DSP1_Cos
	mov	WORD PTR -10[rbp], ax
	movzx	eax, WORD PTR Op21Yr[rip]
	cwde
	mov	edi, eax
	call	DSP1_Sin
	mov	WORD PTR -8[rbp], ax
	movzx	eax, WORD PTR Op21Yr[rip]
	cwde
	mov	edi, eax
	call	DSP1_Cos
	mov	WORD PTR -6[rbp], ax
	movzx	eax, WORD PTR Op21Xr[rip]
	cwde
	mov	edi, eax
	call	DSP1_Sin
	mov	WORD PTR -4[rbp], ax
	movzx	eax, WORD PTR Op21Xr[rip]
	cwde
	mov	edi, eax
	call	DSP1_Cos
	mov	WORD PTR -2[rbp], ax
	movzx	eax, WORD PTR Op21m[rip]
	sar	ax
	mov	WORD PTR Op21m[rip], ax
	movzx	eax, WORD PTR Op21m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -10[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -6[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	WORD PTR matrixC[rip], ax
	movzx	eax, WORD PTR Op21m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -12[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -6[rbp]
	imul	eax, edx
	sar	eax, 15
	neg	eax
	mov	WORD PTR matrixC[rip+2], ax
	movzx	eax, WORD PTR Op21m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -8[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	WORD PTR matrixC[rip+4], ax
	movzx	eax, WORD PTR Op21m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -12[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -2[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	ecx, eax
	movzx	eax, WORD PTR Op21m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -10[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -4[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -8[rbp]
	imul	eax, edx
	sar	eax, 15
	add	eax, ecx
	mov	WORD PTR matrixC[rip+6], ax
	movzx	eax, WORD PTR Op21m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -10[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -2[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	ecx, eax
	movzx	eax, WORD PTR Op21m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -12[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -4[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -8[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	mov	eax, ecx
	sub	eax, edx
	mov	WORD PTR matrixC[rip+8], ax
	movzx	eax, WORD PTR Op21m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -4[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -6[rbp]
	imul	eax, edx
	sar	eax, 15
	neg	eax
	mov	WORD PTR matrixC[rip+10], ax
	movzx	eax, WORD PTR Op21m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -12[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -4[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	ecx, eax
	movzx	eax, WORD PTR Op21m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -10[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -2[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -8[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	mov	eax, ecx
	sub	eax, edx
	mov	WORD PTR matrixC[rip+12], ax
	movzx	eax, WORD PTR Op21m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -10[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -4[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	ecx, eax
	movzx	eax, WORD PTR Op21m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -12[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -2[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -8[rbp]
	imul	eax, edx
	sar	eax, 15
	add	eax, ecx
	mov	WORD PTR matrixC[rip+14], ax
	movzx	eax, WORD PTR Op21m[rip]
	movsx	edx, ax
	movsx	eax, WORD PTR -2[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movsx	eax, WORD PTR -6[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	WORD PTR matrixC[rip+16], ax
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE26:
	.size	DSPOp21, .-DSPOp21
	.globl	Op0DX
	.bss
	.align 2
	.type	Op0DX, @object
	.size	Op0DX, 2
Op0DX:
	.zero	2
	.globl	Op0DY
	.align 2
	.type	Op0DY, @object
	.size	Op0DY, 2
Op0DY:
	.zero	2
	.globl	Op0DZ
	.align 2
	.type	Op0DZ, @object
	.size	Op0DZ, 2
Op0DZ:
	.zero	2
	.globl	Op0DF
	.align 2
	.type	Op0DF, @object
	.size	Op0DF, 2
Op0DF:
	.zero	2
	.globl	Op0DL
	.align 2
	.type	Op0DL, @object
	.size	Op0DL, 2
Op0DL:
	.zero	2
	.globl	Op0DU
	.align 2
	.type	Op0DU, @object
	.size	Op0DU, 2
Op0DU:
	.zero	2
	.globl	Op1DX
	.align 2
	.type	Op1DX, @object
	.size	Op1DX, 2
Op1DX:
	.zero	2
	.globl	Op1DY
	.align 2
	.type	Op1DY, @object
	.size	Op1DY, 2
Op1DY:
	.zero	2
	.globl	Op1DZ
	.align 2
	.type	Op1DZ, @object
	.size	Op1DZ, 2
Op1DZ:
	.zero	2
	.globl	Op1DF
	.align 2
	.type	Op1DF, @object
	.size	Op1DF, 2
Op1DF:
	.zero	2
	.globl	Op1DL
	.align 2
	.type	Op1DL, @object
	.size	Op1DL, 2
Op1DL:
	.zero	2
	.globl	Op1DU
	.align 2
	.type	Op1DU, @object
	.size	Op1DU, 2
Op1DU:
	.zero	2
	.globl	Op2DX
	.align 2
	.type	Op2DX, @object
	.size	Op2DX, 2
Op2DX:
	.zero	2
	.globl	Op2DY
	.align 2
	.type	Op2DY, @object
	.size	Op2DY, 2
Op2DY:
	.zero	2
	.globl	Op2DZ
	.align 2
	.type	Op2DZ, @object
	.size	Op2DZ, 2
Op2DZ:
	.zero	2
	.globl	Op2DF
	.align 2
	.type	Op2DF, @object
	.size	Op2DF, 2
Op2DF:
	.zero	2
	.globl	Op2DL
	.align 2
	.type	Op2DL, @object
	.size	Op2DL, 2
Op2DL:
	.zero	2
	.globl	Op2DU
	.align 2
	.type	Op2DU, @object
	.size	Op2DU, 2
Op2DU:
	.zero	2
	.text
	.globl	DSPOp0D
	.type	DSPOp0D, @function
DSPOp0D:
.LFB27:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, WORD PTR Op0DX[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixA[rip]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	ecx, eax
	movzx	eax, WORD PTR Op0DY[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixA[rip+2]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	ecx, eax
	movzx	eax, WORD PTR Op0DZ[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixA[rip+4]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	eax, ecx
	mov	WORD PTR Op0DF[rip], ax
	movzx	eax, WORD PTR Op0DX[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixA[rip+6]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	ecx, eax
	movzx	eax, WORD PTR Op0DY[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixA[rip+8]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	ecx, eax
	movzx	eax, WORD PTR Op0DZ[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixA[rip+10]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	eax, ecx
	mov	WORD PTR Op0DL[rip], ax
	movzx	eax, WORD PTR Op0DX[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixA[rip+12]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	ecx, eax
	movzx	eax, WORD PTR Op0DY[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixA[rip+14]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	ecx, eax
	movzx	eax, WORD PTR Op0DZ[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixA[rip+16]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	eax, ecx
	mov	WORD PTR Op0DU[rip], ax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE27:
	.size	DSPOp0D, .-DSPOp0D
	.globl	DSPOp1D
	.type	DSPOp1D, @function
DSPOp1D:
.LFB28:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, WORD PTR Op1DX[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixB[rip]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	ecx, eax
	movzx	eax, WORD PTR Op1DY[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixB[rip+2]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	ecx, eax
	movzx	eax, WORD PTR Op1DZ[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixB[rip+4]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	eax, ecx
	mov	WORD PTR Op1DF[rip], ax
	movzx	eax, WORD PTR Op1DX[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixB[rip+6]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	ecx, eax
	movzx	eax, WORD PTR Op1DY[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixB[rip+8]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	ecx, eax
	movzx	eax, WORD PTR Op1DZ[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixB[rip+10]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	eax, ecx
	mov	WORD PTR Op1DL[rip], ax
	movzx	eax, WORD PTR Op1DX[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixB[rip+12]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	ecx, eax
	movzx	eax, WORD PTR Op1DY[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixB[rip+14]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	ecx, eax
	movzx	eax, WORD PTR Op1DZ[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixB[rip+16]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	eax, ecx
	mov	WORD PTR Op1DU[rip], ax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE28:
	.size	DSPOp1D, .-DSPOp1D
	.globl	DSPOp2D
	.type	DSPOp2D, @function
DSPOp2D:
.LFB29:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, WORD PTR Op2DX[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixC[rip]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	ecx, eax
	movzx	eax, WORD PTR Op2DY[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixC[rip+2]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	ecx, eax
	movzx	eax, WORD PTR Op2DZ[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixC[rip+4]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	eax, ecx
	mov	WORD PTR Op2DF[rip], ax
	movzx	eax, WORD PTR Op2DX[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixC[rip+6]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	ecx, eax
	movzx	eax, WORD PTR Op2DY[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixC[rip+8]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	ecx, eax
	movzx	eax, WORD PTR Op2DZ[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixC[rip+10]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	eax, ecx
	mov	WORD PTR Op2DL[rip], ax
	movzx	eax, WORD PTR Op2DX[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixC[rip+12]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	ecx, eax
	movzx	eax, WORD PTR Op2DY[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixC[rip+14]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	ecx, eax
	movzx	eax, WORD PTR Op2DZ[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixC[rip+16]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	eax, ecx
	mov	WORD PTR Op2DU[rip], ax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE29:
	.size	DSPOp2D, .-DSPOp2D
	.globl	Op03F
	.bss
	.align 2
	.type	Op03F, @object
	.size	Op03F, 2
Op03F:
	.zero	2
	.globl	Op03L
	.align 2
	.type	Op03L, @object
	.size	Op03L, 2
Op03L:
	.zero	2
	.globl	Op03U
	.align 2
	.type	Op03U, @object
	.size	Op03U, 2
Op03U:
	.zero	2
	.globl	Op03X
	.align 2
	.type	Op03X, @object
	.size	Op03X, 2
Op03X:
	.zero	2
	.globl	Op03Y
	.align 2
	.type	Op03Y, @object
	.size	Op03Y, 2
Op03Y:
	.zero	2
	.globl	Op03Z
	.align 2
	.type	Op03Z, @object
	.size	Op03Z, 2
Op03Z:
	.zero	2
	.globl	Op13F
	.align 2
	.type	Op13F, @object
	.size	Op13F, 2
Op13F:
	.zero	2
	.globl	Op13L
	.align 2
	.type	Op13L, @object
	.size	Op13L, 2
Op13L:
	.zero	2
	.globl	Op13U
	.align 2
	.type	Op13U, @object
	.size	Op13U, 2
Op13U:
	.zero	2
	.globl	Op13X
	.align 2
	.type	Op13X, @object
	.size	Op13X, 2
Op13X:
	.zero	2
	.globl	Op13Y
	.align 2
	.type	Op13Y, @object
	.size	Op13Y, 2
Op13Y:
	.zero	2
	.globl	Op13Z
	.align 2
	.type	Op13Z, @object
	.size	Op13Z, 2
Op13Z:
	.zero	2
	.globl	Op23F
	.align 2
	.type	Op23F, @object
	.size	Op23F, 2
Op23F:
	.zero	2
	.globl	Op23L
	.align 2
	.type	Op23L, @object
	.size	Op23L, 2
Op23L:
	.zero	2
	.globl	Op23U
	.align 2
	.type	Op23U, @object
	.size	Op23U, 2
Op23U:
	.zero	2
	.globl	Op23X
	.align 2
	.type	Op23X, @object
	.size	Op23X, 2
Op23X:
	.zero	2
	.globl	Op23Y
	.align 2
	.type	Op23Y, @object
	.size	Op23Y, 2
Op23Y:
	.zero	2
	.globl	Op23Z
	.align 2
	.type	Op23Z, @object
	.size	Op23Z, 2
Op23Z:
	.zero	2
	.text
	.globl	DSPOp03
	.type	DSPOp03, @function
DSPOp03:
.LFB30:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, WORD PTR Op03F[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixA[rip]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	ecx, eax
	movzx	eax, WORD PTR Op03L[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixA[rip+6]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	ecx, eax
	movzx	eax, WORD PTR Op03U[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixA[rip+12]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	eax, ecx
	mov	WORD PTR Op03X[rip], ax
	movzx	eax, WORD PTR Op03F[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixA[rip+2]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	ecx, eax
	movzx	eax, WORD PTR Op03L[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixA[rip+8]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	ecx, eax
	movzx	eax, WORD PTR Op03U[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixA[rip+14]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	eax, ecx
	mov	WORD PTR Op03Y[rip], ax
	movzx	eax, WORD PTR Op03F[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixA[rip+4]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	ecx, eax
	movzx	eax, WORD PTR Op03L[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixA[rip+10]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	ecx, eax
	movzx	eax, WORD PTR Op03U[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixA[rip+16]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	eax, ecx
	mov	WORD PTR Op03Z[rip], ax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE30:
	.size	DSPOp03, .-DSPOp03
	.globl	DSPOp13
	.type	DSPOp13, @function
DSPOp13:
.LFB31:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, WORD PTR Op13F[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixB[rip]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	ecx, eax
	movzx	eax, WORD PTR Op13L[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixB[rip+6]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	ecx, eax
	movzx	eax, WORD PTR Op13U[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixB[rip+12]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	eax, ecx
	mov	WORD PTR Op13X[rip], ax
	movzx	eax, WORD PTR Op13F[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixB[rip+2]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	ecx, eax
	movzx	eax, WORD PTR Op13L[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixB[rip+8]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	ecx, eax
	movzx	eax, WORD PTR Op13U[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixB[rip+14]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	eax, ecx
	mov	WORD PTR Op13Y[rip], ax
	movzx	eax, WORD PTR Op13F[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixB[rip+4]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	ecx, eax
	movzx	eax, WORD PTR Op13L[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixB[rip+10]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	ecx, eax
	movzx	eax, WORD PTR Op13U[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixB[rip+16]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	eax, ecx
	mov	WORD PTR Op13Z[rip], ax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE31:
	.size	DSPOp13, .-DSPOp13
	.globl	DSPOp23
	.type	DSPOp23, @function
DSPOp23:
.LFB32:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, WORD PTR Op23F[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixC[rip]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	ecx, eax
	movzx	eax, WORD PTR Op23L[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixC[rip+6]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	ecx, eax
	movzx	eax, WORD PTR Op23U[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixC[rip+12]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	eax, ecx
	mov	WORD PTR Op23X[rip], ax
	movzx	eax, WORD PTR Op23F[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixC[rip+2]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	ecx, eax
	movzx	eax, WORD PTR Op23L[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixC[rip+8]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	ecx, eax
	movzx	eax, WORD PTR Op23U[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixC[rip+14]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	eax, ecx
	mov	WORD PTR Op23Y[rip], ax
	movzx	eax, WORD PTR Op23F[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixC[rip+4]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	ecx, eax
	movzx	eax, WORD PTR Op23L[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixC[rip+10]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	ecx, eax
	movzx	eax, WORD PTR Op23U[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixC[rip+16]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	eax, ecx
	mov	WORD PTR Op23Z[rip], ax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE32:
	.size	DSPOp23, .-DSPOp23
	.globl	Op14Zr
	.bss
	.align 2
	.type	Op14Zr, @object
	.size	Op14Zr, 2
Op14Zr:
	.zero	2
	.globl	Op14Xr
	.align 2
	.type	Op14Xr, @object
	.size	Op14Xr, 2
Op14Xr:
	.zero	2
	.globl	Op14Yr
	.align 2
	.type	Op14Yr, @object
	.size	Op14Yr, 2
Op14Yr:
	.zero	2
	.globl	Op14U
	.align 2
	.type	Op14U, @object
	.size	Op14U, 2
Op14U:
	.zero	2
	.globl	Op14F
	.align 2
	.type	Op14F, @object
	.size	Op14F, 2
Op14F:
	.zero	2
	.globl	Op14L
	.align 2
	.type	Op14L, @object
	.size	Op14L, 2
Op14L:
	.zero	2
	.globl	Op14Zrr
	.align 2
	.type	Op14Zrr, @object
	.size	Op14Zrr, 2
Op14Zrr:
	.zero	2
	.globl	Op14Xrr
	.align 2
	.type	Op14Xrr, @object
	.size	Op14Xrr, 2
Op14Xrr:
	.zero	2
	.globl	Op14Yrr
	.align 2
	.type	Op14Yrr, @object
	.size	Op14Yrr, 2
Op14Yrr:
	.zero	2
	.text
	.globl	DSPOp14
	.type	DSPOp14, @function
DSPOp14:
.LFB33:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r12
	push	rbx
	sub	rsp, 32
	.cfi_offset 12, -24
	.cfi_offset 3, -32
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -24[rbp], rax
	xor	eax, eax
	movzx	eax, WORD PTR Op14Xr[rip]
	cwde
	mov	edi, eax
	call	DSP1_Cos
	cwde
	lea	rcx, -34[rbp]
	lea	rdx, -36[rbp]
	mov	esi, 0
	mov	edi, eax
	call	DSP1_Inverse
	movzx	eax, WORD PTR Op14U[rip]
	movsx	ebx, ax
	movzx	eax, WORD PTR Op14Yr[rip]
	cwde
	mov	edi, eax
	call	DSP1_Cos
	cwde
	imul	ebx, eax
	movzx	eax, WORD PTR Op14F[rip]
	movsx	r12d, ax
	movzx	eax, WORD PTR Op14Yr[rip]
	cwde
	mov	edi, eax
	call	DSP1_Sin
	cwde
	imul	eax, r12d
	sub	ebx, eax
	mov	ecx, ebx
	lea	rdx, -28[rbp]
	lea	rax, -30[rbp]
	mov	rsi, rax
	mov	edi, ecx
	call	DSP1_NormalizeDouble
	movzx	eax, WORD PTR -34[rbp]
	mov	edx, eax
	movzx	eax, WORD PTR -28[rbp]
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	mov	WORD PTR -28[rbp], ax
	movzx	eax, WORD PTR -30[rbp]
	movsx	edx, ax
	movzx	eax, WORD PTR -36[rbp]
	cwde
	imul	eax, edx
	sar	eax, 15
	cwde
	lea	rdx, -28[rbp]
	lea	rcx, -30[rbp]
	mov	rsi, rcx
	mov	edi, eax
	call	DSP1_Normalize
	movzx	eax, WORD PTR -28[rbp]
	movsx	edx, ax
	movzx	eax, WORD PTR -30[rbp]
	cwde
	mov	esi, edx
	mov	edi, eax
	call	DSP1_Truncate
	mov	edx, eax
	movzx	eax, WORD PTR Op14Zr[rip]
	add	eax, edx
	mov	WORD PTR Op14Zrr[rip], ax
	movzx	eax, WORD PTR Op14U[rip]
	movsx	ebx, ax
	movzx	eax, WORD PTR Op14Yr[rip]
	cwde
	mov	edi, eax
	call	DSP1_Sin
	cwde
	imul	eax, ebx
	sar	eax, 15
	mov	edx, eax
	movzx	eax, WORD PTR Op14Xr[rip]
	lea	r12d, [rdx+rax]
	movzx	eax, WORD PTR Op14F[rip]
	movsx	ebx, ax
	movzx	eax, WORD PTR Op14Yr[rip]
	cwde
	mov	edi, eax
	call	DSP1_Cos
	cwde
	imul	eax, ebx
	sar	eax, 15
	add	eax, r12d
	mov	WORD PTR Op14Xrr[rip], ax
	movzx	eax, WORD PTR Op14U[rip]
	movsx	ebx, ax
	movzx	eax, WORD PTR Op14Yr[rip]
	cwde
	mov	edi, eax
	call	DSP1_Cos
	cwde
	imul	ebx, eax
	mov	r12d, ebx
	movzx	eax, WORD PTR Op14F[rip]
	movsx	ebx, ax
	movzx	eax, WORD PTR Op14Yr[rip]
	cwde
	mov	edi, eax
	call	DSP1_Sin
	cwde
	imul	eax, ebx
	lea	ecx, [r12+rax]
	lea	rdx, -28[rbp]
	lea	rax, -30[rbp]
	mov	rsi, rax
	mov	edi, ecx
	call	DSP1_NormalizeDouble
	movzx	eax, WORD PTR -34[rbp]
	mov	edx, eax
	movzx	eax, WORD PTR -28[rbp]
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	mov	WORD PTR -28[rbp], ax
	movzx	eax, WORD PTR Op14Xr[rip]
	cwde
	mov	edi, eax
	call	DSP1_Sin
	cwde
	lea	rdx, -28[rbp]
	lea	rcx, -32[rbp]
	mov	rsi, rcx
	mov	edi, eax
	call	DSP1_Normalize
	movzx	eax, WORD PTR -36[rbp]
	movsx	edx, ax
	movzx	eax, WORD PTR -32[rbp]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	WORD PTR -26[rbp], ax
	movzx	eax, WORD PTR -30[rbp]
	movsx	edx, ax
	movsx	eax, WORD PTR -26[rbp]
	imul	eax, edx
	sar	eax, 15
	neg	eax
	cwde
	lea	rdx, -28[rbp]
	lea	rcx, -30[rbp]
	mov	rsi, rcx
	mov	edi, eax
	call	DSP1_Normalize
	movzx	eax, WORD PTR -28[rbp]
	movsx	edx, ax
	movzx	eax, WORD PTR -30[rbp]
	cwde
	mov	esi, edx
	mov	edi, eax
	call	DSP1_Truncate
	mov	edx, eax
	movzx	eax, WORD PTR Op14Yr[rip]
	add	edx, eax
	movzx	eax, WORD PTR Op14L[rip]
	add	eax, edx
	mov	WORD PTR Op14Yrr[rip], ax
	nop
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L108
	call	__stack_chk_fail@PLT
.L108:
	add	rsp, 32
	pop	rbx
	pop	r12
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE33:
	.size	DSPOp14, .-DSPOp14
	.globl	DSP1_Target
	.type	DSP1_Target, @function
DSP1_Target:
.LFB34:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	eax, esi
	mov	QWORD PTR -32[rbp], rdx
	mov	QWORD PTR -40[rbp], rcx
	mov	edx, edi
	mov	WORD PTR -20[rbp], dx
	mov	WORD PTR -24[rbp], ax
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	movsx	edx, WORD PTR -24[rbp]
	movzx	eax, WORD PTR SinAzs[rip]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movzx	eax, WORD PTR VOffset[rip]
	add	eax, edx
	cwde
	lea	rcx, -14[rbp]
	lea	rdx, -16[rbp]
	mov	esi, 8
	mov	edi, eax
	call	DSP1_Inverse
	movzx	eax, WORD PTR -14[rbp]
	mov	edx, eax
	movzx	eax, WORD PTR VPlane_E[rip]
	add	eax, edx
	mov	WORD PTR -14[rbp], ax
	movzx	eax, WORD PTR -16[rbp]
	movsx	edx, ax
	movzx	eax, WORD PTR VPlane_C[rip]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	WORD PTR -10[rbp], ax
	movzx	eax, WORD PTR -14[rbp]
	mov	edx, eax
	movzx	eax, WORD PTR SecAZS_E1[rip]
	add	eax, edx
	mov	WORD PTR -12[rbp], ax
	movsx	eax, WORD PTR -20[rbp]
	sal	eax, 8
	mov	WORD PTR -20[rbp], ax
	movsx	eax, WORD PTR -10[rbp]
	lea	rdx, -14[rbp]
	lea	rcx, -16[rbp]
	mov	rsi, rcx
	mov	edi, eax
	call	DSP1_Normalize
	movzx	eax, WORD PTR -14[rbp]
	movsx	edx, ax
	movzx	eax, WORD PTR -16[rbp]
	cwde
	mov	esi, edx
	mov	edi, eax
	call	DSP1_Truncate
	movsx	edx, ax
	movsx	eax, WORD PTR -20[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	WORD PTR -16[rbp], ax
	movzx	eax, WORD PTR -16[rbp]
	movsx	edx, ax
	movzx	eax, WORD PTR CosAas[rip]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	movzx	eax, WORD PTR CentreX[rip]
	add	eax, edx
	mov	edx, eax
	mov	rax, QWORD PTR -32[rbp]
	mov	WORD PTR [rax], dx
	movzx	eax, WORD PTR CentreY[rip]
	mov	ecx, eax
	movzx	eax, WORD PTR -16[rbp]
	movsx	edx, ax
	movzx	eax, WORD PTR SinAas[rip]
	cwde
	imul	eax, edx
	sar	eax, 15
	mov	edx, eax
	mov	eax, ecx
	sub	eax, edx
	mov	edx, eax
	mov	rax, QWORD PTR -40[rbp]
	mov	WORD PTR [rax], dx
	movsx	eax, WORD PTR -24[rbp]
	sal	eax, 8
	mov	WORD PTR -24[rbp], ax
	movsx	edx, WORD PTR -10[rbp]
	movzx	eax, WORD PTR SecAZS_C1[rip]
	cwde
	imul	eax, edx
	sar	eax, 15
	cwde
	lea	rdx, -12[rbp]
	lea	rcx, -16[rbp]
	mov	rsi, rcx
	mov	edi, eax
	call	DSP1_Normalize
	movzx	eax, WORD PTR -12[rbp]
	movsx	edx, ax
	movzx	eax, WORD PTR -16[rbp]
	cwde
	mov	esi, edx
	mov	edi, eax
	call	DSP1_Truncate
	movsx	edx, ax
	movsx	eax, WORD PTR -24[rbp]
	imul	eax, edx
	sar	eax, 15
	mov	WORD PTR -16[rbp], ax
	mov	rax, QWORD PTR -32[rbp]
	movzx	eax, WORD PTR [rax]
	mov	ecx, eax
	movzx	eax, WORD PTR -16[rbp]
	cwde
	movzx	edx, WORD PTR SinAas[rip]
	movsx	edx, dx
	neg	edx
	imul	eax, edx
	sar	eax, 15
	add	eax, ecx
	mov	edx, eax
	mov	rax, QWORD PTR -32[rbp]
	mov	WORD PTR [rax], dx
	mov	rax, QWORD PTR -40[rbp]
	movzx	eax, WORD PTR [rax]
	mov	ecx, eax
	movzx	eax, WORD PTR -16[rbp]
	movsx	edx, ax
	movzx	eax, WORD PTR CosAas[rip]
	cwde
	imul	eax, edx
	sar	eax, 15
	add	eax, ecx
	mov	edx, eax
	mov	rax, QWORD PTR -40[rbp]
	mov	WORD PTR [rax], dx
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L110
	call	__stack_chk_fail@PLT
.L110:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE34:
	.size	DSP1_Target, .-DSP1_Target
	.globl	Op0EH
	.bss
	.align 2
	.type	Op0EH, @object
	.size	Op0EH, 2
Op0EH:
	.zero	2
	.globl	Op0EV
	.align 2
	.type	Op0EV, @object
	.size	Op0EV, 2
Op0EV:
	.zero	2
	.globl	Op0EX
	.align 2
	.type	Op0EX, @object
	.size	Op0EX, 2
Op0EX:
	.zero	2
	.globl	Op0EY
	.align 2
	.type	Op0EY, @object
	.size	Op0EY, 2
Op0EY:
	.zero	2
	.text
	.globl	DSPOp0E
	.type	DSPOp0E, @function
DSPOp0E:
.LFB35:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, WORD PTR Op0EV[rip]
	movsx	esi, ax
	movzx	eax, WORD PTR Op0EH[rip]
	cwde
	lea	rcx, Op0EY[rip]
	lea	rdx, Op0EX[rip]
	mov	edi, eax
	call	DSP1_Target
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE35:
	.size	DSPOp0E, .-DSPOp0E
	.globl	Op0BX
	.bss
	.align 2
	.type	Op0BX, @object
	.size	Op0BX, 2
Op0BX:
	.zero	2
	.globl	Op0BY
	.align 2
	.type	Op0BY, @object
	.size	Op0BY, 2
Op0BY:
	.zero	2
	.globl	Op0BZ
	.align 2
	.type	Op0BZ, @object
	.size	Op0BZ, 2
Op0BZ:
	.zero	2
	.globl	Op0BS
	.align 2
	.type	Op0BS, @object
	.size	Op0BS, 2
Op0BS:
	.zero	2
	.globl	Op1BX
	.align 2
	.type	Op1BX, @object
	.size	Op1BX, 2
Op1BX:
	.zero	2
	.globl	Op1BY
	.align 2
	.type	Op1BY, @object
	.size	Op1BY, 2
Op1BY:
	.zero	2
	.globl	Op1BZ
	.align 2
	.type	Op1BZ, @object
	.size	Op1BZ, 2
Op1BZ:
	.zero	2
	.globl	Op1BS
	.align 2
	.type	Op1BS, @object
	.size	Op1BS, 2
Op1BS:
	.zero	2
	.globl	Op2BX
	.align 2
	.type	Op2BX, @object
	.size	Op2BX, 2
Op2BX:
	.zero	2
	.globl	Op2BY
	.align 2
	.type	Op2BY, @object
	.size	Op2BY, 2
Op2BY:
	.zero	2
	.globl	Op2BZ
	.align 2
	.type	Op2BZ, @object
	.size	Op2BZ, 2
Op2BZ:
	.zero	2
	.globl	Op2BS
	.align 2
	.type	Op2BS, @object
	.size	Op2BS, 2
Op2BS:
	.zero	2
	.text
	.globl	DSPOp0B
	.type	DSPOp0B, @function
DSPOp0B:
.LFB36:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, WORD PTR Op0BX[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixA[rip]
	cwde
	mov	ecx, edx
	imul	ecx, eax
	movzx	eax, WORD PTR Op0BY[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixA[rip+2]
	cwde
	imul	eax, edx
	add	ecx, eax
	movzx	eax, WORD PTR Op0BZ[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixA[rip+4]
	cwde
	imul	eax, edx
	add	eax, ecx
	sar	eax, 15
	mov	WORD PTR Op0BS[rip], ax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE36:
	.size	DSPOp0B, .-DSPOp0B
	.globl	DSPOp1B
	.type	DSPOp1B, @function
DSPOp1B:
.LFB37:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, WORD PTR Op1BX[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixB[rip]
	cwde
	mov	ecx, edx
	imul	ecx, eax
	movzx	eax, WORD PTR Op1BY[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixB[rip+2]
	cwde
	imul	eax, edx
	add	ecx, eax
	movzx	eax, WORD PTR Op1BZ[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixB[rip+4]
	cwde
	imul	eax, edx
	add	eax, ecx
	sar	eax, 15
	mov	WORD PTR Op1BS[rip], ax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE37:
	.size	DSPOp1B, .-DSPOp1B
	.globl	DSPOp2B
	.type	DSPOp2B, @function
DSPOp2B:
.LFB38:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, WORD PTR Op2BX[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixC[rip]
	cwde
	mov	ecx, edx
	imul	ecx, eax
	movzx	eax, WORD PTR Op2BY[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixC[rip+2]
	cwde
	imul	eax, edx
	add	ecx, eax
	movzx	eax, WORD PTR Op2BZ[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR matrixC[rip+4]
	cwde
	imul	eax, edx
	add	eax, ecx
	sar	eax, 15
	mov	WORD PTR Op2BS[rip], ax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE38:
	.size	DSPOp2B, .-DSPOp2B
	.globl	Op08X
	.bss
	.align 2
	.type	Op08X, @object
	.size	Op08X, 2
Op08X:
	.zero	2
	.globl	Op08Y
	.align 2
	.type	Op08Y, @object
	.size	Op08Y, 2
Op08Y:
	.zero	2
	.globl	Op08Z
	.align 2
	.type	Op08Z, @object
	.size	Op08Z, 2
Op08Z:
	.zero	2
	.globl	Op08Ll
	.align 2
	.type	Op08Ll, @object
	.size	Op08Ll, 2
Op08Ll:
	.zero	2
	.globl	Op08Lh
	.align 2
	.type	Op08Lh, @object
	.size	Op08Lh, 2
Op08Lh:
	.zero	2
	.text
	.globl	DSPOp08
	.type	DSPOp08, @function
DSPOp08:
.LFB39:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, WORD PTR Op08X[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR Op08X[rip]
	cwde
	mov	ecx, edx
	imul	ecx, eax
	movzx	eax, WORD PTR Op08Y[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR Op08Y[rip]
	cwde
	imul	eax, edx
	add	ecx, eax
	movzx	eax, WORD PTR Op08Z[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR Op08Z[rip]
	cwde
	imul	eax, edx
	add	eax, ecx
	add	eax, eax
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	mov	WORD PTR Op08Ll[rip], ax
	mov	eax, DWORD PTR -4[rbp]
	shr	eax, 16
	mov	WORD PTR Op08Lh[rip], ax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE39:
	.size	DSPOp08, .-DSPOp08
	.globl	Op18X
	.bss
	.align 2
	.type	Op18X, @object
	.size	Op18X, 2
Op18X:
	.zero	2
	.globl	Op18Y
	.align 2
	.type	Op18Y, @object
	.size	Op18Y, 2
Op18Y:
	.zero	2
	.globl	Op18Z
	.align 2
	.type	Op18Z, @object
	.size	Op18Z, 2
Op18Z:
	.zero	2
	.globl	Op18R
	.align 2
	.type	Op18R, @object
	.size	Op18R, 2
Op18R:
	.zero	2
	.globl	Op18D
	.align 2
	.type	Op18D, @object
	.size	Op18D, 2
Op18D:
	.zero	2
	.text
	.globl	DSPOp18
	.type	DSPOp18, @function
DSPOp18:
.LFB40:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, WORD PTR Op18X[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR Op18X[rip]
	cwde
	mov	ecx, edx
	imul	ecx, eax
	movzx	eax, WORD PTR Op18Y[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR Op18Y[rip]
	cwde
	imul	eax, edx
	add	ecx, eax
	movzx	eax, WORD PTR Op18Z[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR Op18Z[rip]
	cwde
	imul	eax, edx
	add	ecx, eax
	movzx	eax, WORD PTR Op18R[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR Op18R[rip]
	cwde
	imul	edx, eax
	mov	eax, ecx
	sub	eax, edx
	sar	eax, 15
	mov	WORD PTR Op18D[rip], ax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE40:
	.size	DSPOp18, .-DSPOp18
	.globl	Op38X
	.bss
	.align 2
	.type	Op38X, @object
	.size	Op38X, 2
Op38X:
	.zero	2
	.globl	Op38Y
	.align 2
	.type	Op38Y, @object
	.size	Op38Y, 2
Op38Y:
	.zero	2
	.globl	Op38Z
	.align 2
	.type	Op38Z, @object
	.size	Op38Z, 2
Op38Z:
	.zero	2
	.globl	Op38R
	.align 2
	.type	Op38R, @object
	.size	Op38R, 2
Op38R:
	.zero	2
	.globl	Op38D
	.align 2
	.type	Op38D, @object
	.size	Op38D, 2
Op38D:
	.zero	2
	.text
	.globl	DSPOp38
	.type	DSPOp38, @function
DSPOp38:
.LFB41:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, WORD PTR Op38X[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR Op38X[rip]
	cwde
	mov	ecx, edx
	imul	ecx, eax
	movzx	eax, WORD PTR Op38Y[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR Op38Y[rip]
	cwde
	imul	eax, edx
	add	ecx, eax
	movzx	eax, WORD PTR Op38Z[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR Op38Z[rip]
	cwde
	imul	eax, edx
	add	ecx, eax
	movzx	eax, WORD PTR Op38R[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR Op38R[rip]
	cwde
	imul	edx, eax
	mov	eax, ecx
	sub	eax, edx
	sar	eax, 15
	mov	WORD PTR Op38D[rip], ax
	movzx	eax, WORD PTR Op38D[rip]
	add	eax, 1
	mov	WORD PTR Op38D[rip], ax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE41:
	.size	DSPOp38, .-DSPOp38
	.globl	Op28X
	.bss
	.align 2
	.type	Op28X, @object
	.size	Op28X, 2
Op28X:
	.zero	2
	.globl	Op28Y
	.align 2
	.type	Op28Y, @object
	.size	Op28Y, 2
Op28Y:
	.zero	2
	.globl	Op28Z
	.align 2
	.type	Op28Z, @object
	.size	Op28Z, 2
Op28Z:
	.zero	2
	.globl	Op28R
	.align 2
	.type	Op28R, @object
	.size	Op28R, 2
Op28R:
	.zero	2
	.text
	.globl	DSPOp28
	.type	DSPOp28, @function
DSPOp28:
.LFB42:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	movzx	eax, WORD PTR Op28X[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR Op28X[rip]
	cwde
	mov	ecx, edx
	imul	ecx, eax
	movzx	eax, WORD PTR Op28Y[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR Op28Y[rip]
	cwde
	imul	eax, edx
	add	ecx, eax
	movzx	eax, WORD PTR Op28Z[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR Op28Z[rip]
	cwde
	imul	eax, edx
	add	eax, ecx
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	jne	.L119
	mov	WORD PTR Op28R[rip], 0
	jmp	.L123
.L119:
	lea	rdx, -20[rbp]
	lea	rcx, -22[rbp]
	mov	eax, DWORD PTR -12[rbp]
	mov	rsi, rcx
	mov	edi, eax
	call	DSP1_NormalizeDouble
	movzx	eax, WORD PTR -20[rbp]
	cwde
	and	eax, 1
	test	eax, eax
	je	.L121
	movzx	eax, WORD PTR -22[rbp]
	cwde
	sal	eax, 14
	sar	eax, 15
	mov	WORD PTR -22[rbp], ax
.L121:
	movzx	eax, WORD PTR -22[rbp]
	cwde
	sal	eax, 6
	sar	eax, 15
	mov	WORD PTR -18[rbp], ax
	movsx	eax, WORD PTR -18[rbp]
	add	eax, 213
	cdqe
	lea	rdx, [rax+rax]
	lea	rax, DSP1ROM[rip]
	movzx	eax, WORD PTR [rdx+rax]
	mov	WORD PTR -16[rbp], ax
	movsx	eax, WORD PTR -18[rbp]
	add	eax, 214
	cdqe
	lea	rdx, [rax+rax]
	lea	rax, DSP1ROM[rip]
	movzx	eax, WORD PTR [rdx+rax]
	mov	WORD PTR -14[rbp], ax
	movsx	eax, WORD PTR -14[rbp]
	movsx	ecx, WORD PTR -16[rbp]
	sub	eax, ecx
	mov	edx, eax
	movzx	eax, WORD PTR -22[rbp]
	cwde
	and	eax, 511
	imul	eax, edx
	sar	eax, 9
	mov	edx, eax
	movzx	eax, WORD PTR -16[rbp]
	add	eax, edx
	mov	WORD PTR Op28R[rip], ax
	movzx	eax, WORD PTR Op28R[rip]
	movsx	edx, ax
	movzx	eax, WORD PTR -20[rbp]
	sar	ax
	cwde
	mov	ecx, eax
	sar	edx, cl
	mov	eax, edx
	mov	WORD PTR Op28R[rip], ax
.L123:
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L122
	call	__stack_chk_fail@PLT
.L122:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE42:
	.size	DSPOp28, .-DSPOp28
	.globl	Op1CX
	.bss
	.align 2
	.type	Op1CX, @object
	.size	Op1CX, 2
Op1CX:
	.zero	2
	.globl	Op1CY
	.align 2
	.type	Op1CY, @object
	.size	Op1CY, 2
Op1CY:
	.zero	2
	.globl	Op1CZ
	.align 2
	.type	Op1CZ, @object
	.size	Op1CZ, 2
Op1CZ:
	.zero	2
	.globl	Op1CXBR
	.align 2
	.type	Op1CXBR, @object
	.size	Op1CXBR, 2
Op1CXBR:
	.zero	2
	.globl	Op1CYBR
	.align 2
	.type	Op1CYBR, @object
	.size	Op1CYBR, 2
Op1CYBR:
	.zero	2
	.globl	Op1CZBR
	.align 2
	.type	Op1CZBR, @object
	.size	Op1CZBR, 2
Op1CZBR:
	.zero	2
	.globl	Op1CXAR
	.align 2
	.type	Op1CXAR, @object
	.size	Op1CXAR, 2
Op1CXAR:
	.zero	2
	.globl	Op1CYAR
	.align 2
	.type	Op1CYAR, @object
	.size	Op1CYAR, 2
Op1CYAR:
	.zero	2
	.globl	Op1CZAR
	.align 2
	.type	Op1CZAR, @object
	.size	Op1CZAR, 2
Op1CZAR:
	.zero	2
	.globl	Op1CX1
	.align 2
	.type	Op1CX1, @object
	.size	Op1CX1, 2
Op1CX1:
	.zero	2
	.globl	Op1CY1
	.align 2
	.type	Op1CY1, @object
	.size	Op1CY1, 2
Op1CY1:
	.zero	2
	.globl	Op1CZ1
	.align 2
	.type	Op1CZ1, @object
	.size	Op1CZ1, 2
Op1CZ1:
	.zero	2
	.globl	Op1CX2
	.align 2
	.type	Op1CX2, @object
	.size	Op1CX2, 2
Op1CX2:
	.zero	2
	.globl	Op1CY2
	.align 2
	.type	Op1CY2, @object
	.size	Op1CY2, 2
Op1CY2:
	.zero	2
	.globl	Op1CZ2
	.align 2
	.type	Op1CZ2, @object
	.size	Op1CZ2, 2
Op1CZ2:
	.zero	2
	.text
	.globl	DSPOp1C
	.type	DSPOp1C, @function
DSPOp1C:
.LFB43:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r12
	push	rbx
	.cfi_offset 12, -24
	.cfi_offset 3, -32
	movzx	eax, WORD PTR Op1CYBR[rip]
	movsx	ebx, ax
	movzx	eax, WORD PTR Op1CZ[rip]
	cwde
	mov	edi, eax
	call	DSP1_Sin
	cwde
	imul	eax, ebx
	sar	eax, 15
	mov	r12d, eax
	movzx	eax, WORD PTR Op1CXBR[rip]
	movsx	ebx, ax
	movzx	eax, WORD PTR Op1CZ[rip]
	cwde
	mov	edi, eax
	call	DSP1_Cos
	cwde
	imul	eax, ebx
	sar	eax, 15
	add	eax, r12d
	mov	WORD PTR Op1CX1[rip], ax
	movzx	eax, WORD PTR Op1CYBR[rip]
	movsx	ebx, ax
	movzx	eax, WORD PTR Op1CZ[rip]
	cwde
	mov	edi, eax
	call	DSP1_Cos
	cwde
	imul	eax, ebx
	sar	eax, 15
	mov	r12d, eax
	movzx	eax, WORD PTR Op1CXBR[rip]
	movsx	ebx, ax
	movzx	eax, WORD PTR Op1CZ[rip]
	cwde
	mov	edi, eax
	call	DSP1_Sin
	cwde
	imul	eax, ebx
	sar	eax, 15
	mov	edx, eax
	mov	eax, r12d
	sub	eax, edx
	mov	WORD PTR Op1CY1[rip], ax
	movzx	eax, WORD PTR Op1CX1[rip]
	mov	WORD PTR Op1CXBR[rip], ax
	movzx	eax, WORD PTR Op1CY1[rip]
	mov	WORD PTR Op1CYBR[rip], ax
	movzx	eax, WORD PTR Op1CXBR[rip]
	movsx	ebx, ax
	movzx	eax, WORD PTR Op1CY[rip]
	cwde
	mov	edi, eax
	call	DSP1_Sin
	cwde
	imul	eax, ebx
	sar	eax, 15
	mov	r12d, eax
	movzx	eax, WORD PTR Op1CZBR[rip]
	movsx	ebx, ax
	movzx	eax, WORD PTR Op1CY[rip]
	cwde
	mov	edi, eax
	call	DSP1_Cos
	cwde
	imul	eax, ebx
	sar	eax, 15
	add	eax, r12d
	mov	WORD PTR Op1CZ1[rip], ax
	movzx	eax, WORD PTR Op1CXBR[rip]
	movsx	ebx, ax
	movzx	eax, WORD PTR Op1CY[rip]
	cwde
	mov	edi, eax
	call	DSP1_Cos
	cwde
	imul	eax, ebx
	sar	eax, 15
	mov	r12d, eax
	movzx	eax, WORD PTR Op1CZBR[rip]
	movsx	ebx, ax
	movzx	eax, WORD PTR Op1CY[rip]
	cwde
	mov	edi, eax
	call	DSP1_Sin
	cwde
	imul	eax, ebx
	sar	eax, 15
	mov	edx, eax
	mov	eax, r12d
	sub	eax, edx
	mov	WORD PTR Op1CX1[rip], ax
	movzx	eax, WORD PTR Op1CX1[rip]
	mov	WORD PTR Op1CXAR[rip], ax
	movzx	eax, WORD PTR Op1CZ1[rip]
	mov	WORD PTR Op1CZBR[rip], ax
	movzx	eax, WORD PTR Op1CZBR[rip]
	movsx	ebx, ax
	movzx	eax, WORD PTR Op1CX[rip]
	cwde
	mov	edi, eax
	call	DSP1_Sin
	cwde
	imul	eax, ebx
	sar	eax, 15
	mov	r12d, eax
	movzx	eax, WORD PTR Op1CYBR[rip]
	movsx	ebx, ax
	movzx	eax, WORD PTR Op1CX[rip]
	cwde
	mov	edi, eax
	call	DSP1_Cos
	cwde
	imul	eax, ebx
	sar	eax, 15
	add	eax, r12d
	mov	WORD PTR Op1CY1[rip], ax
	movzx	eax, WORD PTR Op1CZBR[rip]
	movsx	ebx, ax
	movzx	eax, WORD PTR Op1CX[rip]
	cwde
	mov	edi, eax
	call	DSP1_Cos
	cwde
	imul	eax, ebx
	sar	eax, 15
	mov	r12d, eax
	movzx	eax, WORD PTR Op1CYBR[rip]
	movsx	ebx, ax
	movzx	eax, WORD PTR Op1CX[rip]
	cwde
	mov	edi, eax
	call	DSP1_Sin
	cwde
	imul	eax, ebx
	sar	eax, 15
	mov	edx, eax
	mov	eax, r12d
	sub	eax, edx
	mov	WORD PTR Op1CZ1[rip], ax
	movzx	eax, WORD PTR Op1CY1[rip]
	mov	WORD PTR Op1CYAR[rip], ax
	movzx	eax, WORD PTR Op1CZ1[rip]
	mov	WORD PTR Op1CZAR[rip], ax
	nop
	pop	rbx
	pop	r12
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE43:
	.size	DSPOp1C, .-DSPOp1C
	.globl	Op0FRamsize
	.bss
	.align 2
	.type	Op0FRamsize, @object
	.size	Op0FRamsize, 2
Op0FRamsize:
	.zero	2
	.globl	Op0FPass
	.align 2
	.type	Op0FPass, @object
	.size	Op0FPass, 2
Op0FPass:
	.zero	2
	.text
	.globl	DSPOp0F
	.type	DSPOp0F, @function
DSPOp0F:
.LFB44:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	WORD PTR Op0FPass[rip], 0
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE44:
	.size	DSPOp0F, .-DSPOp0F
	.globl	Op2FUnknown
	.bss
	.align 2
	.type	Op2FUnknown, @object
	.size	Op2FUnknown, 2
Op2FUnknown:
	.zero	2
	.globl	Op2FSize
	.align 2
	.type	Op2FSize, @object
	.size	Op2FSize, 2
Op2FSize:
	.zero	2
	.text
	.globl	DSPOp2F
	.type	DSPOp2F, @function
DSPOp2F:
.LFB45:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	WORD PTR Op2FSize[rip], 256
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE45:
	.size	DSPOp2F, .-DSPOp2F
	.section	.rodata
	.align 8
.LC0:
	.long	0
	.long	1072693248
	.align 8
.LC1:
	.long	515396076
	.long	1070721925
	.align 8
.LC2:
	.long	1413754136
	.long	1073291771
	.align 8
.LC3:
	.long	1413754136
	.long	1075388923
	.align 8
.LC4:
	.long	0
	.long	1084227584
	.align 16
.LC5:
	.long	0
	.long	-2147483648
	.long	0
	.long	0
	.align 8
.LC7:
	.long	0
	.long	1081081856
	.align 8
.LC8:
	.long	0
	.long	1089470432
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"38772.c"
	.text
	.global	DSP1ROM
	.section	.rodata
	.align	2
	.type	DSP1ROM, %object
	.size	DSP1ROM, 2048
DSP1ROM:
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
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	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	1
	.short	2
	.short	4
	.short	8
	.short	16
	.short	32
	.short	64
	.short	128
	.short	256
	.short	512
	.short	1024
	.short	2048
	.short	4096
	.short	8192
	.short	16384
	.short	32767
	.short	16384
	.short	8192
	.short	4096
	.short	2048
	.short	1024
	.short	512
	.short	256
	.short	128
	.short	64
	.short	32
	.short	1
	.short	8
	.short	4
	.short	2
	.short	1
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
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	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	0
	.short	-32768
	.short	-27
	.short	256
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	.short	32514
	.short	32264
	.short	32018
	.short	31775
	.short	31536
	.short	31301
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	.short	30840
	.short	30615
	.short	30394
	.short	30175
	.short	29959
	.short	29747
	.short	29537
	.short	29331
	.short	29127
	.short	28926
	.short	28728
	.short	28533
	.short	28340
	.short	28150
	.short	27962
	.short	27777
	.short	27594
	.short	27414
	.short	27236
	.short	27060
	.short	26887
	.short	26715
	.short	26546
	.short	26379
	.short	26214
	.short	26052
	.short	25891
	.short	25732
	.short	25575
	.short	25420
	.short	25267
	.short	25116
	.short	24966
	.short	24818
	.short	24672
	.short	24528
	.short	24385
	.short	24245
	.short	24105
	.short	23967
	.short	23831
	.short	23697
	.short	23564
	.short	23432
	.short	23302
	.short	23173
	.short	23046
	.short	22920
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	.short	22550
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	.short	22310
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	.short	21960
	.short	21845
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	.short	21400
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	.short	19692
	.short	19600
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	.short	16777
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	.short	0
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	.short	8971
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	.short	7225
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	.short	6561
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	.short	6350
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	.short	6060
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	.short	5909
	.short	5833
	.short	5756
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	.short	5186
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	.short	5013
	.short	4924
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	.short	4648
	.short	4553
	.short	4455
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	.short	4044
	.short	3935
	.short	3823
	.short	3707
	.short	3588
	.short	3465
	.short	3338
	.short	3206
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	.short	2925
	.short	2774
	.short	2614
	.short	2445
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	.short	2065
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	.short	1305
	.short	922
	.short	0
	.short	32767
	.short	256
	.short	128
	.short	541
	.short	200
	.short	206
	.short	72
	.short	2598
	.short	10106
	.short	206
	.short	25736
	.short	5292
	.short	1
	.short	249
	.short	252
	.short	255
	.short	252
	.short	249
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.short	-1
	.comm	CosTable2,16384,8
	.comm	SinTable2,16384,8
	.global	__aeabi_dcmpge
	.global	__aeabi_dcmple
	.global	__aeabi_dmul
	.global	__aeabi_dadd
	.global	__aeabi_ddiv
	.global	__aeabi_dsub
	.text
	.align	2
	.global	Atan
	.syntax unified
	.arm
	.fpu softvfp
	.type	Atan, %function
Atan:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	mov	r2, #0
	ldr	r3, .L7
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L2
	mov	r2, #0
	ldr	r3, .L7
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L6
.L2:
	ldr	r2, .L7+4
	ldr	r3, .L7+8
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L7
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	b	.L5
.L6:
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	mov	r0, #0
	ldr	r1, .L7
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	Atan
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L7+12
	ldr	r1, .L7+16
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
.L5:
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L8:
	.align	2
.L7:
	.word	1072693248
	.word	515396076
	.word	1070721925
	.word	1413754136
	.word	1073291771
	.size	Atan, .-Atan
	.global	__aeabi_ui2d
	.align	2
	.global	InitDSP
	.syntax unified
	.arm
	.fpu softvfp
	.type	InitDSP, %function
InitDSP:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L10
.L11:
	ldr	r0, [fp, #-8]
	bl	__aeabi_ui2d
	ldr	r2, .L12
	ldr	r3, .L12+4
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L12+8
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	cos
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L12+12
	ldr	r1, [fp, #-8]
	lsl	r1, r1, #3
	add	r1, r0, r1
	stm	r1, {r2-r3}
	ldr	r0, [fp, #-8]
	bl	__aeabi_ui2d
	ldr	r2, .L12
	ldr	r3, .L12+4
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L12+8
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	sin
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L12+16
	ldr	r1, [fp, #-8]
	lsl	r1, r1, #3
	add	r1, r0, r1
	stm	r1, {r2-r3}
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L10:
	ldr	r3, [fp, #-8]
	cmp	r3, #2048
	bcc	.L11
	nop
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L13:
	.align	2
.L12:
	.word	1413754136
	.word	1075388923
	.word	1084227584
	.word	CosTable2
	.word	SinTable2
	.size	InitDSP, .-InitDSP
	.comm	Op00Multiplicand,2,2
	.comm	Op00Multiplier,2,2
	.comm	Op00Result,2,2
	.align	2
	.global	DSPOp00
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSPOp00, %function
DSPOp00:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L15
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L15+4
	ldrsh	r3, [r3]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L15+8
	strh	r3, [r2]	@ movhi
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L16:
	.align	2
.L15:
	.word	Op00Multiplicand
	.word	Op00Multiplier
	.word	Op00Result
	.size	DSPOp00, .-DSPOp00
	.comm	Op20Multiplicand,2,2
	.comm	Op20Multiplier,2,2
	.comm	Op20Result,2,2
	.align	2
	.global	DSPOp20
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSPOp20, %function
DSPOp20:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L18
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L18+4
	ldrsh	r3, [r3]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L18+8
	strh	r3, [r2]	@ movhi
	ldr	r3, .L18+8
	ldrsh	r3, [r3]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L18+8
	strh	r3, [r2]	@ movhi
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L19:
	.align	2
.L18:
	.word	Op20Multiplicand
	.word	Op20Multiplier
	.word	Op20Result
	.size	DSPOp20, .-DSPOp20
	.comm	Op10Coefficient,2,2
	.comm	Op10Exponent,2,2
	.comm	Op10CoefficientR,2,2
	.comm	Op10ExponentR,2,2
	.align	2
	.global	DSP1_Inverse
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSP1_Inverse, %function
DSP1_Inverse:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #28
	str	r2, [fp, #-20]
	str	r3, [fp, #-24]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-14]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-16]	@ movhi
	ldrsh	r3, [fp, #-14]
	cmp	r3, #0
	bne	.L21
	ldr	r3, [fp, #-20]
	mvn	r2, #32768
	strh	r2, [r3]	@ movhi
	ldr	r3, [fp, #-24]
	mov	r2, #47
	strh	r2, [r3]	@ movhi
	b	.L30
.L21:
	mov	r3, #1
	strh	r3, [fp, #-8]	@ movhi
	ldrsh	r3, [fp, #-14]
	cmp	r3, #0
	bge	.L25
	ldrsh	r3, [fp, #-14]
	cmn	r3, #32768
	bne	.L24
	ldr	r3, .L31
	strh	r3, [fp, #-14]	@ movhi
.L24:
	ldrh	r3, [fp, #-14]
	rsb	r3, r3, #0
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	strh	r3, [fp, #-14]	@ movhi
	mvn	r3, #0
	strh	r3, [fp, #-8]	@ movhi
	b	.L25
.L26:
	ldrsh	r3, [fp, #-14]
	lsl	r3, r3, #1
	strh	r3, [fp, #-14]	@ movhi
	ldrsh	r3, [fp, #-16]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	sub	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	strh	r3, [fp, #-16]	@ movhi
.L25:
	ldrsh	r3, [fp, #-14]
	cmp	r3, #16384
	blt	.L26
	ldrsh	r3, [fp, #-14]
	cmp	r3, #16384
	bne	.L27
	ldrsh	r3, [fp, #-8]
	cmp	r3, #1
	bne	.L28
	ldr	r3, [fp, #-20]
	mvn	r2, #32768
	strh	r2, [r3]	@ movhi
	b	.L29
.L28:
	ldr	r3, [fp, #-20]
	mov	r2, #49152
	strh	r2, [r3]	@ movhi
	ldrsh	r3, [fp, #-16]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	sub	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	strh	r3, [fp, #-16]	@ movhi
	b	.L29
.L27:
	ldrsh	r3, [fp, #-14]
	sub	r3, r3, #16384
	asr	r3, r3, #7
	add	r3, r3, #101
	ldr	r2, .L31+4
	lsl	r3, r3, #1
	add	r3, r2, r3
	ldrh	r3, [r3]
	strh	r3, [fp, #-6]	@ movhi
	ldrsh	r2, [fp, #-6]
	ldrsh	r3, [fp, #-6]
	rsb	r3, r3, #0
	ldrsh	r1, [fp, #-14]
	ldrsh	r0, [fp, #-6]
	mul	r1, r0, r1
	asr	r1, r1, #15
	mul	r3, r1, r3
	asr	r3, r3, #15
	add	r3, r2, r3
	lsl	r3, r3, #1
	strh	r3, [fp, #-6]	@ movhi
	ldrsh	r2, [fp, #-6]
	ldrsh	r3, [fp, #-6]
	rsb	r3, r3, #0
	ldrsh	r1, [fp, #-14]
	ldrsh	r0, [fp, #-6]
	mul	r1, r0, r1
	asr	r1, r1, #15
	mul	r3, r1, r3
	asr	r3, r3, #15
	add	r3, r2, r3
	lsl	r3, r3, #1
	strh	r3, [fp, #-6]	@ movhi
	ldrh	r3, [fp, #-6]
	ldrh	r2, [fp, #-8]
	mul	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r3, [fp, #-20]
	strh	r2, [r3]	@ movhi
.L29:
	ldrh	r3, [fp, #-16]
	rsb	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r3, [fp, #-24]
	strh	r2, [r3]	@ movhi
.L30:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L32:
	.align	2
.L31:
	.word	-32767
	.word	DSP1ROM
	.size	DSP1_Inverse, .-DSP1_Inverse
	.align	2
	.global	DSPOp10
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSPOp10, %function
DSPOp10:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L34
	ldrsh	r0, [r3]
	ldr	r3, .L34+4
	ldrsh	r1, [r3]
	ldr	r3, .L34+8
	ldr	r2, .L34+12
	bl	DSP1_Inverse
	nop
	pop	{fp, pc}
.L35:
	.align	2
.L34:
	.word	Op10Coefficient
	.word	Op10Exponent
	.word	Op10ExponentR
	.word	Op10CoefficientR
	.size	DSPOp10, .-DSPOp10
	.comm	Op04Angle,2,2
	.comm	Op04Radius,2,2
	.comm	Op04Sin,2,2
	.comm	Op04Cos,2,2
	.global	DSP1_MulTable
	.section	.rodata
	.align	2
	.type	DSP1_MulTable, %object
	.size	DSP1_MulTable, 512
DSP1_MulTable:
	.short	0
	.short	3
	.short	6
	.short	9
	.short	12
	.short	15
	.short	18
	.short	21
	.short	25
	.short	28
	.short	31
	.short	34
	.short	37
	.short	40
	.short	43
	.short	47
	.short	50
	.short	53
	.short	56
	.short	59
	.short	62
	.short	65
	.short	69
	.short	72
	.short	75
	.short	78
	.short	81
	.short	84
	.short	87
	.short	91
	.short	94
	.short	97
	.short	100
	.short	103
	.short	106
	.short	109
	.short	113
	.short	116
	.short	119
	.short	122
	.short	125
	.short	128
	.short	131
	.short	135
	.short	138
	.short	141
	.short	144
	.short	147
	.short	150
	.short	153
	.short	157
	.short	160
	.short	163
	.short	166
	.short	169
	.short	172
	.short	175
	.short	179
	.short	182
	.short	185
	.short	188
	.short	191
	.short	194
	.short	197
	.short	201
	.short	204
	.short	207
	.short	210
	.short	213
	.short	216
	.short	219
	.short	223
	.short	226
	.short	229
	.short	232
	.short	235
	.short	238
	.short	241
	.short	245
	.short	248
	.short	251
	.short	254
	.short	257
	.short	260
	.short	263
	.short	267
	.short	270
	.short	273
	.short	276
	.short	279
	.short	282
	.short	285
	.short	289
	.short	292
	.short	295
	.short	298
	.short	301
	.short	304
	.short	307
	.short	311
	.short	314
	.short	317
	.short	320
	.short	323
	.short	326
	.short	329
	.short	333
	.short	336
	.short	339
	.short	342
	.short	345
	.short	348
	.short	351
	.short	355
	.short	358
	.short	361
	.short	364
	.short	367
	.short	370
	.short	373
	.short	376
	.short	380
	.short	383
	.short	386
	.short	389
	.short	392
	.short	395
	.short	398
	.short	402
	.short	405
	.short	408
	.short	411
	.short	414
	.short	417
	.short	420
	.short	424
	.short	427
	.short	430
	.short	433
	.short	436
	.short	439
	.short	442
	.short	446
	.short	449
	.short	452
	.short	455
	.short	458
	.short	461
	.short	464
	.short	468
	.short	471
	.short	474
	.short	477
	.short	480
	.short	483
	.short	486
	.short	490
	.short	493
	.short	496
	.short	499
	.short	502
	.short	505
	.short	508
	.short	512
	.short	515
	.short	518
	.short	521
	.short	524
	.short	527
	.short	530
	.short	534
	.short	537
	.short	540
	.short	543
	.short	546
	.short	549
	.short	552
	.short	556
	.short	559
	.short	562
	.short	565
	.short	568
	.short	571
	.short	574
	.short	578
	.short	581
	.short	584
	.short	587
	.short	590
	.short	593
	.short	596
	.short	600
	.short	603
	.short	606
	.short	609
	.short	612
	.short	615
	.short	618
	.short	622
	.short	625
	.short	628
	.short	631
	.short	634
	.short	637
	.short	640
	.short	644
	.short	647
	.short	650
	.short	653
	.short	656
	.short	659
	.short	662
	.short	666
	.short	669
	.short	672
	.short	675
	.short	678
	.short	681
	.short	684
	.short	688
	.short	691
	.short	694
	.short	697
	.short	700
	.short	703
	.short	706
	.short	710
	.short	713
	.short	716
	.short	719
	.short	722
	.short	725
	.short	728
	.short	731
	.short	735
	.short	738
	.short	741
	.short	744
	.short	747
	.short	750
	.short	753
	.short	757
	.short	760
	.short	763
	.short	766
	.short	769
	.short	772
	.short	775
	.short	779
	.short	782
	.short	785
	.short	788
	.short	791
	.short	794
	.short	797
	.short	801
	.global	DSP1_SinTable
	.align	2
	.type	DSP1_SinTable, %object
	.size	DSP1_SinTable, 512
DSP1_SinTable:
	.short	0
	.short	804
	.short	1607
	.short	2410
	.short	3211
	.short	4011
	.short	4808
	.short	5602
	.short	6392
	.short	7179
	.short	7961
	.short	8739
	.short	9512
	.short	10278
	.short	11039
	.short	11793
	.short	12539
	.short	13278
	.short	14010
	.short	14732
	.short	15446
	.short	16151
	.short	16846
	.short	17530
	.short	18204
	.short	18868
	.short	19519
	.short	20159
	.short	20787
	.short	21403
	.short	22005
	.short	22594
	.short	23170
	.short	23732
	.short	24279
	.short	24812
	.short	25330
	.short	25832
	.short	26319
	.short	26790
	.short	27245
	.short	27684
	.short	28106
	.short	28511
	.short	28898
	.short	29269
	.short	29621
	.short	29956
	.short	30273
	.short	30572
	.short	30852
	.short	31114
	.short	31357
	.short	31581
	.short	31785
	.short	31971
	.short	32138
	.short	32285
	.short	32413
	.short	32521
	.short	32610
	.short	32679
	.short	32728
	.short	32758
	.short	32767
	.short	32758
	.short	32728
	.short	32679
	.short	32610
	.short	32521
	.short	32413
	.short	32285
	.short	32138
	.short	31971
	.short	31785
	.short	31581
	.short	31357
	.short	31114
	.short	30852
	.short	30572
	.short	30273
	.short	29956
	.short	29621
	.short	29269
	.short	28898
	.short	28511
	.short	28106
	.short	27684
	.short	27245
	.short	26790
	.short	26319
	.short	25832
	.short	25330
	.short	24812
	.short	24279
	.short	23732
	.short	23170
	.short	22594
	.short	22005
	.short	21403
	.short	20787
	.short	20159
	.short	19519
	.short	18868
	.short	18204
	.short	17530
	.short	16846
	.short	16151
	.short	15446
	.short	14732
	.short	14010
	.short	13278
	.short	12539
	.short	11793
	.short	11039
	.short	10278
	.short	9512
	.short	8739
	.short	7961
	.short	7179
	.short	6392
	.short	5602
	.short	4808
	.short	4011
	.short	3211
	.short	2410
	.short	1607
	.short	804
	.short	0
	.short	-804
	.short	-1607
	.short	-2410
	.short	-3211
	.short	-4011
	.short	-4808
	.short	-5602
	.short	-6392
	.short	-7179
	.short	-7961
	.short	-8739
	.short	-9512
	.short	-10278
	.short	-11039
	.short	-11793
	.short	-12539
	.short	-13278
	.short	-14010
	.short	-14732
	.short	-15446
	.short	-16151
	.short	-16846
	.short	-17530
	.short	-18204
	.short	-18868
	.short	-19519
	.short	-20159
	.short	-20787
	.short	-21403
	.short	-22005
	.short	-22594
	.short	-23170
	.short	-23732
	.short	-24279
	.short	-24812
	.short	-25330
	.short	-25832
	.short	-26319
	.short	-26790
	.short	-27245
	.short	-27684
	.short	-28106
	.short	-28511
	.short	-28898
	.short	-29269
	.short	-29621
	.short	-29956
	.short	-30273
	.short	-30572
	.short	-30852
	.short	-31114
	.short	-31357
	.short	-31581
	.short	-31785
	.short	-31971
	.short	-32138
	.short	-32285
	.short	-32413
	.short	-32521
	.short	-32610
	.short	-32679
	.short	-32728
	.short	-32758
	.short	-32767
	.short	-32758
	.short	-32728
	.short	-32679
	.short	-32610
	.short	-32521
	.short	-32413
	.short	-32285
	.short	-32138
	.short	-31971
	.short	-31785
	.short	-31581
	.short	-31357
	.short	-31114
	.short	-30852
	.short	-30572
	.short	-30273
	.short	-29956
	.short	-29621
	.short	-29269
	.short	-28898
	.short	-28511
	.short	-28106
	.short	-27684
	.short	-27245
	.short	-26790
	.short	-26319
	.short	-25832
	.short	-25330
	.short	-24812
	.short	-24279
	.short	-23732
	.short	-23170
	.short	-22594
	.short	-22005
	.short	-21403
	.short	-20787
	.short	-20159
	.short	-19519
	.short	-18868
	.short	-18204
	.short	-17530
	.short	-16846
	.short	-16151
	.short	-15446
	.short	-14732
	.short	-14010
	.short	-13278
	.short	-12539
	.short	-11793
	.short	-11039
	.short	-10278
	.short	-9512
	.short	-8739
	.short	-7961
	.short	-7179
	.short	-6392
	.short	-5602
	.short	-4808
	.short	-4011
	.short	-3211
	.short	-2410
	.short	-1607
	.short	-804
	.text
	.align	2
	.global	DSP1_Sin
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSP1_Sin, %function
DSP1_Sin:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	mov	r3, r0
	strh	r3, [fp, #-14]	@ movhi
	ldrsh	r3, [fp, #-14]
	cmp	r3, #0
	bge	.L37
	ldrsh	r3, [fp, #-14]
	cmn	r3, #32768
	bne	.L38
	mov	r3, #0
	b	.L39
.L38:
	ldrh	r3, [fp, #-14]
	rsb	r3, r3, #0
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3
	bl	DSP1_Sin
	mov	r3, r0
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	rsb	r3, r3, #0
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	b	.L39
.L37:
	ldrsh	r3, [fp, #-14]
	asr	r3, r3, #8
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L41
	lsl	r3, r3, #1
	add	r3, r2, r3
	ldrsh	r3, [r3]
	mov	r1, r3
	ldrh	r3, [fp, #-14]
	and	r3, r3, #255
	ldr	r2, .L41+4
	lsl	r3, r3, #1
	add	r3, r2, r3
	ldrsh	r3, [r3]
	mov	r0, r3
	ldrsh	r3, [fp, #-14]
	asr	r3, r3, #8
	lsl	r3, r3, #16
	asr	r3, r3, #16
	add	r3, r3, #64
	ldr	r2, .L41
	lsl	r3, r3, #1
	add	r3, r2, r3
	ldrsh	r3, [r3]
	mul	r3, r0, r3
	asr	r3, r3, #15
	add	r3, r1, r3
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #32768
	blt	.L40
	ldr	r3, .L41+8
	str	r3, [fp, #-8]
.L40:
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #16
	asr	r3, r3, #16
.L39:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L42:
	.align	2
.L41:
	.word	DSP1_SinTable
	.word	DSP1_MulTable
	.word	32767
	.size	DSP1_Sin, .-DSP1_Sin
	.align	2
	.global	DSP1_Cos
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSP1_Cos, %function
DSP1_Cos:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	mov	r3, r0
	strh	r3, [fp, #-14]	@ movhi
	ldrsh	r3, [fp, #-14]
	cmp	r3, #0
	bge	.L44
	ldrsh	r3, [fp, #-14]
	cmn	r3, #32768
	bne	.L45
	ldr	r3, .L48
	b	.L46
.L45:
	ldrh	r3, [fp, #-14]
	rsb	r3, r3, #0
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	strh	r3, [fp, #-14]	@ movhi
.L44:
	ldrsh	r3, [fp, #-14]
	asr	r3, r3, #8
	lsl	r3, r3, #16
	asr	r3, r3, #16
	add	r3, r3, #64
	ldr	r2, .L48+4
	lsl	r3, r3, #1
	add	r3, r2, r3
	ldrsh	r3, [r3]
	mov	r1, r3
	ldrh	r3, [fp, #-14]
	and	r3, r3, #255
	ldr	r2, .L48+8
	lsl	r3, r3, #1
	add	r3, r2, r3
	ldrsh	r3, [r3]
	mov	r0, r3
	ldrsh	r3, [fp, #-14]
	asr	r3, r3, #8
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L48+4
	lsl	r3, r3, #1
	add	r3, r2, r3
	ldrsh	r3, [r3]
	mul	r3, r0, r3
	asr	r3, r3, #15
	sub	r3, r1, r3
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmn	r3, #32768
	bge	.L47
	ldr	r3, .L48+12
	str	r3, [fp, #-8]
.L47:
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #16
	asr	r3, r3, #16
.L46:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L49:
	.align	2
.L48:
	.word	-32768
	.word	DSP1_SinTable
	.word	DSP1_MulTable
	.word	-32767
	.size	DSP1_Cos, .-DSP1_Cos
	.align	2
	.global	DSP1_Normalize
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSP1_Normalize, %function
DSP1_Normalize:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #28
	mov	r3, r0
	str	r1, [fp, #-20]
	str	r2, [fp, #-24]
	strh	r3, [fp, #-14]	@ movhi
	mov	r3, #16384
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, #0
	strh	r3, [fp, #-6]	@ movhi
	ldrsh	r3, [fp, #-14]
	cmp	r3, #0
	bge	.L55
	b	.L52
.L54:
	ldrsh	r3, [fp, #-8]
	asr	r3, r3, #1
	strh	r3, [fp, #-8]	@ movhi
	ldrsh	r3, [fp, #-6]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	strh	r3, [fp, #-6]	@ movhi
.L52:
	ldrh	r2, [fp, #-14]	@ movhi
	ldrh	r3, [fp, #-8]	@ movhi
	and	r3, r3, r2
	lsl	r3, r3, #16
	asr	r3, r3, #16
	cmp	r3, #0
	beq	.L53
	ldrsh	r3, [fp, #-8]
	cmp	r3, #0
	bne	.L54
	b	.L53
.L56:
	ldrsh	r3, [fp, #-8]
	asr	r3, r3, #1
	strh	r3, [fp, #-8]	@ movhi
	ldrsh	r3, [fp, #-6]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	strh	r3, [fp, #-6]	@ movhi
.L55:
	ldrh	r2, [fp, #-14]	@ movhi
	ldrh	r3, [fp, #-8]	@ movhi
	and	r3, r3, r2
	lsl	r3, r3, #16
	asr	r3, r3, #16
	cmp	r3, #0
	bne	.L53
	ldrsh	r3, [fp, #-8]
	cmp	r3, #0
	bne	.L56
.L53:
	ldrsh	r3, [fp, #-6]
	cmp	r3, #0
	ble	.L57
	ldrsh	r3, [fp, #-14]
	ldrsh	r2, [fp, #-6]
	add	r2, r2, #33
	ldr	r1, .L59
	lsl	r2, r2, #1
	add	r2, r1, r2
	ldrh	r2, [r2]
	mul	r3, r2, r3
	lsl	r3, r3, #1
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r3, [fp, #-20]
	strh	r2, [r3]	@ movhi
	b	.L58
.L57:
	ldr	r3, [fp, #-20]
	ldrh	r2, [fp, #-14]	@ movhi
	strh	r2, [r3]	@ movhi
.L58:
	ldr	r3, [fp, #-24]
	ldrsh	r3, [r3]
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldrh	r3, [fp, #-6]
	sub	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r3, [fp, #-24]
	strh	r2, [r3]	@ movhi
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L60:
	.align	2
.L59:
	.word	DSP1ROM
	.size	DSP1_Normalize, .-DSP1_Normalize
	.align	2
	.global	DSP1_NormalizeDouble
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSP1_NormalizeDouble, %function
DSP1_NormalizeDouble:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #28
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-24]
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #16
	asr	r3, r3, #16
	lsl	r3, r3, #17
	lsr	r3, r3, #17
	strh	r3, [fp, #-8]	@ movhi
	ldr	r3, [fp, #-16]
	asr	r3, r3, #15
	strh	r3, [fp, #-6]	@ movhi
	mov	r3, #16384
	strh	r3, [fp, #-12]	@ movhi
	mov	r3, #0
	strh	r3, [fp, #-10]	@ movhi
	ldrsh	r3, [fp, #-6]
	cmp	r3, #0
	bge	.L66
	b	.L63
.L65:
	ldrsh	r3, [fp, #-12]
	asr	r3, r3, #1
	strh	r3, [fp, #-12]	@ movhi
	ldrsh	r3, [fp, #-10]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	strh	r3, [fp, #-10]	@ movhi
.L63:
	ldrh	r2, [fp, #-6]	@ movhi
	ldrh	r3, [fp, #-12]	@ movhi
	and	r3, r3, r2
	lsl	r3, r3, #16
	asr	r3, r3, #16
	cmp	r3, #0
	beq	.L64
	ldrsh	r3, [fp, #-12]
	cmp	r3, #0
	bne	.L65
	b	.L64
.L67:
	ldrsh	r3, [fp, #-12]
	asr	r3, r3, #1
	strh	r3, [fp, #-12]	@ movhi
	ldrsh	r3, [fp, #-10]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	strh	r3, [fp, #-10]	@ movhi
.L66:
	ldrh	r2, [fp, #-6]	@ movhi
	ldrh	r3, [fp, #-12]	@ movhi
	and	r3, r3, r2
	lsl	r3, r3, #16
	asr	r3, r3, #16
	cmp	r3, #0
	bne	.L64
	ldrsh	r3, [fp, #-12]
	cmp	r3, #0
	bne	.L67
.L64:
	ldrsh	r3, [fp, #-10]
	cmp	r3, #0
	ble	.L68
	ldrsh	r3, [fp, #-6]
	ldrsh	r2, [fp, #-10]
	add	r2, r2, #33
	ldr	r1, .L78
	lsl	r2, r2, #1
	add	r2, r1, r2
	ldrh	r2, [r2]
	mul	r3, r2, r3
	lsl	r3, r3, #1
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r3, [fp, #-20]
	strh	r2, [r3]	@ movhi
	ldrsh	r3, [fp, #-10]
	cmp	r3, #14
	bgt	.L69
	ldr	r3, [fp, #-20]
	ldrsh	r3, [r3]
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldrsh	r3, [fp, #-8]
	ldrsh	r1, [fp, #-10]
	rsb	r1, r1, #64
	ldr	r0, .L78
	lsl	r1, r1, #1
	add	r1, r0, r1
	ldrh	r1, [r1]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r3, [fp, #-20]
	strh	r2, [r3]	@ movhi
	b	.L70
.L69:
	mov	r3, #16384
	strh	r3, [fp, #-12]	@ movhi
	ldrsh	r3, [fp, #-6]
	cmp	r3, #0
	bge	.L75
	b	.L72
.L74:
	ldrsh	r3, [fp, #-12]
	asr	r3, r3, #1
	strh	r3, [fp, #-12]	@ movhi
	ldrsh	r3, [fp, #-10]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	strh	r3, [fp, #-10]	@ movhi
.L72:
	ldrh	r2, [fp, #-8]	@ movhi
	ldrh	r3, [fp, #-12]	@ movhi
	and	r3, r3, r2
	lsl	r3, r3, #16
	asr	r3, r3, #16
	cmp	r3, #0
	beq	.L73
	ldrsh	r3, [fp, #-12]
	cmp	r3, #0
	bne	.L74
	b	.L73
.L76:
	ldrsh	r3, [fp, #-12]
	asr	r3, r3, #1
	strh	r3, [fp, #-12]	@ movhi
	ldrsh	r3, [fp, #-10]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	strh	r3, [fp, #-10]	@ movhi
.L75:
	ldrh	r2, [fp, #-8]	@ movhi
	ldrh	r3, [fp, #-12]	@ movhi
	and	r3, r3, r2
	lsl	r3, r3, #16
	asr	r3, r3, #16
	cmp	r3, #0
	bne	.L73
	ldrsh	r3, [fp, #-12]
	cmp	r3, #0
	bne	.L76
.L73:
	ldrsh	r3, [fp, #-10]
	cmp	r3, #15
	ble	.L77
	ldrsh	r3, [fp, #-8]
	ldrsh	r2, [fp, #-10]
	add	r2, r2, #18
	ldr	r1, .L78
	lsl	r2, r2, #1
	add	r2, r1, r2
	ldrh	r2, [r2]
	mul	r3, r2, r3
	lsl	r3, r3, #1
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r3, [fp, #-20]
	strh	r2, [r3]	@ movhi
	b	.L70
.L77:
	ldr	r3, [fp, #-20]
	ldrsh	r3, [r3]
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldrh	r3, [fp, #-8]
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r3, [fp, #-20]
	strh	r2, [r3]	@ movhi
	b	.L70
.L68:
	ldr	r3, [fp, #-20]
	ldrh	r2, [fp, #-6]	@ movhi
	strh	r2, [r3]	@ movhi
.L70:
	ldr	r3, [fp, #-24]
	ldrh	r2, [fp, #-10]	@ movhi
	strh	r2, [r3]	@ movhi
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L79:
	.align	2
.L78:
	.word	DSP1ROM
	.size	DSP1_NormalizeDouble, .-DSP1_NormalizeDouble
	.align	2
	.global	DSP1_Truncate
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSP1_Truncate, %function
DSP1_Truncate:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	mov	r2, r1
	strh	r3, [fp, #-6]	@ movhi
	mov	r3, r2	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	ldrsh	r3, [fp, #-8]
	cmp	r3, #0
	ble	.L81
	ldrsh	r3, [fp, #-6]
	cmp	r3, #0
	ble	.L82
	ldr	r3, .L85
	b	.L83
.L82:
	ldrsh	r3, [fp, #-6]
	cmp	r3, #0
	bge	.L84
	ldr	r3, .L85+4
	b	.L83
.L81:
	ldrsh	r3, [fp, #-8]
	cmp	r3, #0
	bge	.L84
	ldrsh	r3, [fp, #-6]
	ldrsh	r2, [fp, #-8]
	add	r2, r2, #49
	ldr	r1, .L85+8
	lsl	r2, r2, #1
	add	r2, r1, r2
	ldrh	r2, [r2]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	b	.L83
.L84:
	ldrsh	r3, [fp, #-6]
.L83:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L86:
	.align	2
.L85:
	.word	32767
	.word	-32767
	.word	DSP1ROM
	.size	DSP1_Truncate, .-DSP1_Truncate
	.align	2
	.global	DSPOp04
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSPOp04, %function
DSPOp04:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L88
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Sin
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L88+4
	ldrsh	r3, [r3]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L88+8
	strh	r3, [r2]	@ movhi
	ldr	r3, .L88
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Cos
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L88+4
	ldrsh	r3, [r3]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L88+12
	strh	r3, [r2]	@ movhi
	nop
	pop	{fp, pc}
.L89:
	.align	2
.L88:
	.word	Op04Angle
	.word	Op04Radius
	.word	Op04Sin
	.word	Op04Cos
	.size	DSPOp04, .-DSPOp04
	.comm	Op0CA,2,2
	.comm	Op0CX1,2,2
	.comm	Op0CY1,2,2
	.comm	Op0CX2,2,2
	.comm	Op0CY2,2,2
	.align	2
	.global	DSPOp0C
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSPOp0C, %function
DSPOp0C:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	ldr	r3, .L91
	ldrsh	r3, [r3]
	mov	r4, r3
	ldr	r3, .L91+4
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Sin
	mov	r3, r0
	mul	r3, r4, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r4, r3, #16
	ldr	r3, .L91+8
	ldrsh	r3, [r3]
	mov	r5, r3
	ldr	r3, .L91+4
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Cos
	mov	r3, r0
	mul	r3, r5, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r4, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L91+12
	strh	r3, [r2]	@ movhi
	ldr	r3, .L91
	ldrsh	r3, [r3]
	mov	r4, r3
	ldr	r3, .L91+4
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Cos
	mov	r3, r0
	mul	r3, r4, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r4, r3, #16
	ldr	r3, .L91+8
	ldrsh	r3, [r3]
	mov	r5, r3
	ldr	r3, .L91+4
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Sin
	mov	r3, r0
	mul	r3, r5, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	sub	r3, r4, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L91+16
	strh	r3, [r2]	@ movhi
	nop
	pop	{r4, r5, fp, pc}
.L92:
	.align	2
.L91:
	.word	Op0CY1
	.word	Op0CA
	.word	Op0CX1
	.word	Op0CX2
	.word	Op0CY2
	.size	DSPOp0C, .-DSPOp0C
	.comm	CentreX,2,2
	.comm	CentreY,2,2
	.comm	VOffset,2,2
	.comm	VPlane_C,2,2
	.comm	VPlane_E,2,2
	.comm	SinAas,2,2
	.comm	CosAas,2,2
	.comm	SinAzs,2,2
	.comm	CosAzs,2,2
	.comm	SinAZS,2,2
	.comm	CosAZS,2,2
	.comm	SecAZS_C1,2,2
	.comm	SecAZS_E1,2,2
	.comm	SecAZS_C2,2,2
	.comm	SecAZS_E2,2,2
	.global	MaxAZS_Exp
	.section	.rodata
	.align	2
	.type	MaxAZS_Exp, %object
	.size	MaxAZS_Exp, 32
MaxAZS_Exp:
	.short	14516
	.short	14519
	.short	14522
	.short	14526
	.short	14528
	.short	14532
	.short	14535
	.short	14538
	.short	14542
	.short	14544
	.short	14548
	.short	14551
	.short	14554
	.short	14557
	.short	14560
	.short	14564
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	DSP1_Parameter
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSP1_Parameter, %function
DSP1_Parameter:
	@ args = 28, pretend = 0, frame = 40
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #40
	mov	ip, r0
	mov	r0, r1
	mov	r1, r2
	mov	r2, r3
	mov	r3, ip	@ movhi
	strh	r3, [fp, #-22]	@ movhi
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-24]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-26]	@ movhi
	mov	r3, r2	@ movhi
	strh	r3, [fp, #-28]	@ movhi
	ldr	r3, [fp, #16]
	str	r3, [fp, #-32]
	ldr	r3, [fp, #20]
	str	r3, [fp, #-36]
	ldr	r3, [fp, #24]
	str	r3, [fp, #-40]
	ldr	r3, [fp, #28]
	str	r3, [fp, #-44]
	ldr	r3, .L102
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	ldrh	r3, [fp, #12]	@ movhi
	strh	r3, [fp, #-14]	@ movhi
	ldrsh	r3, [fp, #8]
	mov	r0, r3
	bl	DSP1_Sin
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L102+4
	strh	r2, [r3]	@ movhi
	ldrsh	r3, [fp, #8]
	mov	r0, r3
	bl	DSP1_Cos
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L102+8
	strh	r2, [r3]	@ movhi
	ldrsh	r3, [fp, #12]
	mov	r0, r3
	bl	DSP1_Sin
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L102+12
	strh	r2, [r3]	@ movhi
	ldrsh	r3, [fp, #12]
	mov	r0, r3
	bl	DSP1_Cos
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L102+16
	strh	r2, [r3]	@ movhi
	ldrsh	r3, [fp, #-28]
	ldr	r2, .L102+12
	ldrsh	r2, [r2]
	mov	r1, r2
	ldr	r2, .L102+4
	ldrsh	r2, [r2]
	rsb	r2, r2, #0
	mul	r2, r1, r2
	asr	r2, r2, #15
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldrh	r3, [fp, #-22]
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L102+20
	strh	r3, [r2]	@ movhi
	ldrsh	r3, [fp, #-28]
	ldr	r2, .L102+12
	ldrsh	r2, [r2]
	mov	r1, r2
	ldr	r2, .L102+8
	ldrsh	r2, [r2]
	mul	r2, r1, r2
	asr	r2, r2, #15
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldrh	r3, [fp, #-24]
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L102+24
	strh	r3, [r2]	@ movhi
	mov	r3, #0
	strh	r3, [fp, #-16]	@ movhi
	ldrsh	r2, [fp, #-28]
	ldr	r3, .L102+16
	ldrsh	r3, [r3]
	mov	r1, r3
	mov	r3, r1
	lsl	r3, r3, #15
	sub	r3, r3, r1
	asr	r3, r3, #15
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldrh	r3, [fp, #-26]
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	sub	r2, fp, #16
	sub	r1, fp, #18
	mov	r0, r3
	bl	DSP1_Normalize
	ldrsh	r3, [fp, #-18]
	ldr	r2, .L102+28
	strh	r3, [r2]	@ movhi
	ldrsh	r3, [fp, #-16]
	ldr	r2, .L102+32
	strh	r3, [r2]	@ movhi
	ldrsh	r3, [fp, #-16]
	rsb	r3, r3, #0
	ldr	r2, .L102+36
	lsl	r3, r3, #1
	add	r3, r2, r3
	ldrh	r3, [r3]	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldrsh	r3, [fp, #-14]
	cmp	r3, #0
	bge	.L94
	ldrh	r3, [fp, #-12]
	rsb	r3, r3, #0
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	strh	r3, [fp, #-12]	@ movhi
	ldrsh	r2, [fp, #-12]
	ldrsh	r3, [fp, #-14]
	cmp	r2, r3
	blt	.L95
	ldrh	r3, [fp, #-12]
	add	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	strh	r3, [fp, #-14]	@ movhi
	b	.L95
.L94:
	ldrsh	r2, [fp, #-14]
	ldrsh	r3, [fp, #-12]
	cmp	r2, r3
	ble	.L95
	ldrh	r3, [fp, #-12]	@ movhi
	strh	r3, [fp, #-14]	@ movhi
.L95:
	ldrsh	r3, [fp, #-14]
	mov	r0, r3
	bl	DSP1_Sin
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L102+40
	strh	r2, [r3]	@ movhi
	ldrsh	r3, [fp, #-14]
	mov	r0, r3
	bl	DSP1_Cos
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L102+44
	strh	r2, [r3]	@ movhi
	ldr	r3, .L102+44
	ldrsh	r0, [r3]
	ldr	r3, .L102+48
	ldr	r2, .L102+52
	mov	r1, #0
	bl	DSP1_Inverse
	ldrsh	r3, [fp, #-18]
	mov	r2, r3
	ldr	r3, .L102+52
	ldrsh	r3, [r3]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	sub	r2, fp, #16
	sub	r1, fp, #18
	mov	r0, r3
	bl	DSP1_Normalize
	ldrsh	r3, [fp, #-16]
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L102+48
	ldrsh	r3, [r3]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	strh	r3, [fp, #-16]	@ movhi
	ldrsh	r3, [fp, #-18]
	ldrsh	r2, [fp, #-16]
	mov	r1, r2
	mov	r0, r3
	bl	DSP1_Truncate
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L102+40
	ldrsh	r3, [r3]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	strh	r3, [fp, #-18]	@ movhi
	ldrsh	r3, [fp, #-18]
	mov	r2, r3
	ldr	r3, .L102+4
	ldrsh	r3, [r3]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L102+20
	ldrsh	r3, [r3]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L102+20
	strh	r3, [r2]	@ movhi
	ldr	r3, .L102+24
	ldrsh	r3, [r3]
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldrsh	r3, [fp, #-18]
	mov	r1, r3
	ldr	r3, .L102+8
	ldrsh	r3, [r3]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	sub	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L102+24
	strh	r3, [r2]	@ movhi
	ldr	r3, .L102+20
	ldrsh	r2, [r3]
	ldr	r3, [fp, #-40]
	strh	r2, [r3]	@ movhi
	ldr	r3, .L102+24
	ldrsh	r2, [r3]
	ldr	r3, [fp, #-44]
	strh	r2, [r3]	@ movhi
	ldr	r3, [fp, #-32]
	mov	r2, #0
	strh	r2, [r3]	@ movhi
	ldrsh	r2, [fp, #12]
	ldrsh	r3, [fp, #-14]
	cmp	r2, r3
	bne	.L96
	ldrsh	r2, [fp, #12]
	ldrsh	r3, [fp, #-12]
	cmp	r2, r3
	bne	.L97
.L96:
	ldrsh	r3, [fp, #12]
	cmn	r3, #32768
	bne	.L98
	ldr	r3, .L102+56
	strh	r3, [fp, #12]	@ movhi
.L98:
	ldrh	r2, [fp, #12]
	ldrh	r3, [fp, #-12]
	sub	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	strh	r3, [fp, #-18]	@ movhi
	ldrsh	r3, [fp, #-18]
	cmp	r3, #0
	blt	.L99
	ldrsh	r3, [fp, #-18]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	sub	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	strh	r3, [fp, #-18]	@ movhi
.L99:
	ldrsh	r3, [fp, #-18]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mvn	r3, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	strh	r3, [fp, #-10]	@ movhi
	ldrsh	r3, [fp, #-10]
	ldr	r2, .L102+60
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	strh	r3, [fp, #-18]	@ movhi
	ldrsh	r3, [fp, #-18]
	mov	r2, r3
	ldrsh	r3, [fp, #-10]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L102+64
	add	r3, r3, r2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	strh	r3, [fp, #-18]	@ movhi
	ldr	r3, [fp, #-32]
	ldrsh	r3, [r3]
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldrsh	r3, [fp, #-18]
	mov	r1, r3
	ldrsh	r3, [fp, #-10]
	mul	r3, r1, r3
	asr	r3, r3, #15
	ldrsh	r1, [fp, #4]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	sub	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r3, [fp, #-32]
	strh	r2, [r3]	@ movhi
	ldrsh	r3, [fp, #-10]
	ldrsh	r2, [fp, #-10]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	strh	r3, [fp, #-18]	@ movhi
	ldrsh	r3, [fp, #-18]
	ldr	r2, .L102+68
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L102+72
	add	r3, r3, r2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	strh	r3, [fp, #-10]	@ movhi
	ldrsh	r3, [fp, #-18]
	mov	r2, r3
	ldrsh	r3, [fp, #-10]
	mul	r3, r2, r3
	asr	r3, r3, #15
	ldr	r2, .L102+44
	ldrsh	r2, [r2]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L102+44
	ldrsh	r3, [r3]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L102+44
	strh	r3, [r2]	@ movhi
.L97:
	ldrsh	r3, [fp, #4]
	ldr	r2, .L102+44
	ldrsh	r2, [r2]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L102+76
	strh	r3, [r2]	@ movhi
	ldr	r3, .L102+40
	ldrsh	r0, [r3]
	sub	r3, fp, #16
	sub	r2, fp, #20
	mov	r1, #0
	bl	DSP1_Inverse
	ldr	r3, .L102+76
	ldrsh	r3, [r3]
	sub	r2, fp, #16
	sub	r1, fp, #18
	mov	r0, r3
	bl	DSP1_Normalize
	ldrsh	r3, [fp, #-18]
	ldrsh	r2, [fp, #-20]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	sub	r2, fp, #16
	sub	r1, fp, #18
	mov	r0, r3
	bl	DSP1_Normalize
	ldrsh	r3, [fp, #-18]
	cmn	r3, #32768
	bne	.L100
	ldrsh	r3, [fp, #-18]
	asr	r3, r3, #1
	lsl	r3, r3, #16
	asr	r3, r3, #16
	strh	r3, [fp, #-18]	@ movhi
	ldrsh	r3, [fp, #-16]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	strh	r3, [fp, #-16]	@ movhi
.L100:
	ldrsh	r3, [fp, #-18]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	rsb	r3, r3, #0
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldrsh	r2, [fp, #-16]
	mov	r1, r2
	mov	r0, r3
	bl	DSP1_Truncate
	mov	r3, r0
	mov	r2, r3
	ldr	r3, [fp, #-36]
	strh	r2, [r3]	@ movhi
	ldr	r3, .L102+44
	ldrsh	r0, [r3]
	ldr	r3, .L102+80
	ldr	r2, .L102+84
	mov	r1, #0
	bl	DSP1_Inverse
	nop
	ldr	r3, .L102
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L101
	bl	__stack_chk_fail
.L101:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L103:
	.align	2
.L102:
	.word	.LC0
	.word	SinAas
	.word	CosAas
	.word	SinAzs
	.word	CosAzs
	.word	CentreX
	.word	CentreY
	.word	VPlane_C
	.word	VPlane_E
	.word	MaxAZS_Exp
	.word	SinAZS
	.word	CosAZS
	.word	SecAZS_E1
	.word	SecAZS_C1
	.word	-32767
	.word	5292
	.word	25736
	.word	2598
	.word	10106
	.word	VOffset
	.word	SecAZS_E2
	.word	SecAZS_C2
	.size	DSP1_Parameter, .-DSP1_Parameter
	.section	.rodata
	.align	2
.LC1:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	DSP1_Raster
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSP1_Raster, %function
DSP1_Raster:
	@ args = 4, pretend = 0, frame = 40
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #40
	str	r1, [fp, #-28]
	str	r2, [fp, #-32]
	str	r3, [fp, #-36]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-22]	@ movhi
	ldr	r3, [fp, #4]
	str	r3, [fp, #-40]
	ldr	r3, .L106
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	ldrsh	r3, [fp, #-22]
	ldr	r2, .L106+4
	ldrsh	r2, [r2]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L106+8
	ldrsh	r3, [r3]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r0, r3, #16
	sub	r3, fp, #14
	sub	r2, fp, #16
	mov	r1, #7
	bl	DSP1_Inverse
	ldrsh	r3, [fp, #-14]
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L106+12
	ldrsh	r3, [r3]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	strh	r3, [fp, #-14]	@ movhi
	ldrsh	r3, [fp, #-16]
	mov	r2, r3
	ldr	r3, .L106+16
	ldrsh	r3, [r3]
	mul	r3, r2, r3
	asr	r3, r3, #15
	strh	r3, [fp, #-10]	@ movhi
	ldrsh	r3, [fp, #-14]
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L106+20
	ldrsh	r3, [r3]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	strh	r3, [fp, #-12]	@ movhi
	sub	r2, fp, #14
	sub	r1, fp, #16
	ldrsh	r3, [fp, #-10]
	mov	r0, r3
	bl	DSP1_Normalize
	ldrsh	r3, [fp, #-16]
	ldrsh	r2, [fp, #-14]
	mov	r1, r2
	mov	r0, r3
	bl	DSP1_Truncate
	mov	r3, r0
	strh	r3, [fp, #-16]	@ movhi
	ldrsh	r3, [fp, #-16]
	mov	r2, r3
	ldr	r3, .L106+24
	ldrsh	r3, [r3]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r3, [fp, #-28]
	strh	r2, [r3]	@ movhi
	ldrsh	r3, [fp, #-16]
	mov	r2, r3
	ldr	r3, .L106+28
	ldrsh	r3, [r3]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r3, [fp, #-36]
	strh	r2, [r3]	@ movhi
	ldrsh	r3, [fp, #-10]
	ldr	r2, .L106+32
	ldrsh	r2, [r2]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	sub	r2, fp, #12
	sub	r1, fp, #16
	mov	r0, r3
	bl	DSP1_Normalize
	ldrsh	r3, [fp, #-16]
	ldrsh	r2, [fp, #-12]
	mov	r1, r2
	mov	r0, r3
	bl	DSP1_Truncate
	mov	r3, r0
	strh	r3, [fp, #-16]	@ movhi
	ldrsh	r3, [fp, #-16]
	mov	r2, r3
	ldr	r3, .L106+28
	ldrsh	r3, [r3]
	rsb	r3, r3, #0
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r3, [fp, #-32]
	strh	r2, [r3]	@ movhi
	ldrsh	r3, [fp, #-16]
	mov	r2, r3
	ldr	r3, .L106+24
	ldrsh	r3, [r3]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r3, [fp, #-40]
	strh	r2, [r3]	@ movhi
	nop
	ldr	r3, .L106
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L105
	bl	__stack_chk_fail
.L105:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L107:
	.align	2
.L106:
	.word	.LC1
	.word	SinAzs
	.word	VOffset
	.word	VPlane_E
	.word	VPlane_C
	.word	SecAZS_E2
	.word	CosAas
	.word	SinAas
	.word	SecAZS_C2
	.size	DSP1_Raster, .-DSP1_Raster
	.comm	Op02FX,2,2
	.comm	Op02FY,2,2
	.comm	Op02FZ,2,2
	.comm	Op02LFE,2,2
	.comm	Op02LES,2,2
	.comm	Op02AAS,2,2
	.comm	Op02AZS,2,2
	.comm	Op02VOF,2,2
	.comm	Op02VVA,2,2
	.comm	Op02CX,2,2
	.comm	Op02CY,2,2
	.align	2
	.global	DSPOp02
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSPOp02, %function
DSPOp02:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #32
	ldr	r3, .L109
	ldrsh	r0, [r3]
	ldr	r3, .L109+4
	ldrsh	ip, [r3]
	ldr	r3, .L109+8
	ldrsh	lr, [r3]
	ldr	r3, .L109+12
	ldrsh	r4, [r3]
	ldr	r3, .L109+16
	ldrsh	r3, [r3]
	ldr	r2, .L109+20
	ldrsh	r2, [r2]
	ldr	r1, .L109+24
	ldrsh	r1, [r1]
	ldr	r5, .L109+28
	str	r5, [sp, #24]
	ldr	r5, .L109+32
	str	r5, [sp, #20]
	ldr	r5, .L109+36
	str	r5, [sp, #16]
	ldr	r5, .L109+40
	str	r5, [sp, #12]
	str	r1, [sp, #8]
	str	r2, [sp, #4]
	str	r3, [sp]
	mov	r3, r4
	mov	r2, lr
	mov	r1, ip
	bl	DSP1_Parameter
	nop
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L110:
	.align	2
.L109:
	.word	Op02FX
	.word	Op02FY
	.word	Op02FZ
	.word	Op02LFE
	.word	Op02LES
	.word	Op02AAS
	.word	Op02AZS
	.word	Op02CY
	.word	Op02CX
	.word	Op02VVA
	.word	Op02VOF
	.size	DSPOp02, .-DSPOp02
	.comm	Op0AVS,2,2
	.comm	Op0AA,2,2
	.comm	Op0AB,2,2
	.comm	Op0AC,2,2
	.comm	Op0AD,2,2
	.align	2
	.global	DSPOp0A
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSPOp0A, %function
DSPOp0A:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	ldr	r3, .L112
	ldrsh	r0, [r3]
	ldr	r3, .L112+4
	str	r3, [sp]
	ldr	r3, .L112+8
	ldr	r2, .L112+12
	ldr	r1, .L112+16
	bl	DSP1_Raster
	ldr	r3, .L112
	ldrsh	r3, [r3]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L112
	strh	r3, [r2]	@ movhi
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L113:
	.align	2
.L112:
	.word	Op0AVS
	.word	Op0AD
	.word	Op0AC
	.word	Op0AB
	.word	Op0AA
	.size	DSPOp0A, .-DSPOp0A
	.comm	Op06X,2,2
	.comm	Op06Y,2,2
	.comm	Op06Z,2,2
	.comm	Op06H,2,2
	.comm	Op06V,2,2
	.comm	Op06S,2,2
	.comm	ObjPX,8,8
	.comm	ObjPY,8,8
	.comm	ObjPZ,8,8
	.comm	ObjPX1,8,8
	.comm	ObjPY1,8,8
	.comm	ObjPZ1,8,8
	.comm	ObjPX2,8,8
	.comm	ObjPY2,8,8
	.comm	ObjPZ2,8,8
	.comm	DivideOp06,8,8
	.comm	Temp,4,4
	.comm	tanval2,4,4
	.global	__aeabi_i2d
	.global	__aeabi_dcmplt
	.global	__aeabi_d2iz
	.global	__aeabi_dcmpgt
	.global	__aeabi_d2uiz
	.align	2
	.global	DSPOp06
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSPOp06, %function
DSPOp06:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #16
	ldr	r3, .L128
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L128+4
	ldrsh	r3, [r3]
	sub	r3, r2, r3
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L128+8
	stm	r1, {r2-r3}
	ldr	r3, .L128+12
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L128+16
	ldrsh	r3, [r3]
	sub	r3, r2, r3
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L128+20
	stm	r1, {r2-r3}
	ldr	r3, .L128+24
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L128+28
	ldrsh	r3, [r3]
	sub	r3, r2, r3
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L128+32
	stm	r1, {r2-r3}
	ldr	r3, .L128+36
	ldrsh	r3, [r3]
	rsb	r3, r3, #32768
	add	r2, r3, #31
	cmp	r3, #0
	movlt	r3, r2
	movge	r3, r3
	asr	r3, r3, #5
	lsl	r3, r3, #21
	lsr	r3, r3, #21
	ldr	r2, .L128+40
	str	r3, [r2]
	ldr	r3, .L128+40
	ldr	r3, [r3]
	ldr	r2, .L128+44
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, .L128+8
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	ldr	r3, .L128+40
	ldr	r3, [r3]
	ldr	r2, .L128+48
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r8, r2
	eor	r9, r3, #-2147483648
	ldr	r3, .L128+20
	ldmia	r3, {r2-r3}
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L128+52
	stm	r1, {r2-r3}
	ldr	r3, .L128+40
	ldr	r3, [r3]
	ldr	r2, .L128+48
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, .L128+8
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r8, r2
	mov	r9, r3
	ldr	r3, .L128+40
	ldr	r3, [r3]
	ldr	r2, .L128+44
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, .L128+20
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L128+56
	stm	r1, {r2-r3}
	ldr	r3, .L128+32
	ldmia	r3, {r2-r3}
	ldr	r1, .L128+60
	stm	r1, {r2-r3}
	ldr	r3, .L128+64
	ldrsh	r3, [r3]
	add	r2, r3, #31
	cmp	r3, #0
	movlt	r3, r2
	movge	r3, r3
	asr	r3, r3, #5
	rsb	r3, r3, #0
	lsl	r3, r3, #21
	lsr	r3, r3, #21
	ldr	r2, .L128+40
	str	r3, [r2]
	ldr	r3, .L128+52
	ldmia	r3, {r2-r3}
	ldr	r1, .L128+68
	stm	r1, {r2-r3}
	ldr	r3, .L128+40
	ldr	r3, [r3]
	ldr	r2, .L128+44
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, .L128+56
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r8, r2
	mov	r9, r3
	ldr	r3, .L128+40
	ldr	r3, [r3]
	ldr	r2, .L128+48
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r6, r2
	eor	r7, r3, #-2147483648
	ldr	r3, .L128+60
	ldmia	r3, {r2-r3}
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L128+72
	stm	r1, {r2-r3}
	ldr	r3, .L128+40
	ldr	r3, [r3]
	ldr	r2, .L128+48
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, .L128+56
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r6, r2
	mov	r7, r3
	ldr	r3, .L128+40
	ldr	r3, [r3]
	ldr	r2, .L128+44
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, .L128+60
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L128+76
	stm	r1, {r2-r3}
	ldr	r3, .L128+76
	ldmia	r3, {r6-r7}
	ldr	r3, .L128+80
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L128+76
	stm	r1, {r2-r3}
	ldr	r3, .L128+76
	ldmia	r3, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	beq	.L125
	ldr	r3, .L128+84
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	__aeabi_i2d
	ldr	r3, .L128+68
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	ldr	r3, .L128+76
	ldmia	r3, {r2-r3}
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2iz
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L128+88
	strh	r3, [r2]	@ movhi
	ldr	r3, .L128+84
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	__aeabi_i2d
	ldr	r3, .L128+72
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	ldr	r3, .L128+76
	ldmia	r3, {r2-r3}
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2iz
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L128+92
	strh	r3, [r2]	@ movhi
	ldr	r3, .L128+84
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	mov	r2, #0
	ldr	r3, .L128+96
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	ldr	r4, [fp, #-36]
	ldr	r3, [fp, #-32]
	eor	r5, r3, #-2147483648
	ldr	r3, .L128+76
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	mov	r2, #0
	ldr	r3, .L128+100
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmpgt
	mov	r3, r0
	cmp	r3, #0
	beq	.L126
	mov	r2, #0
	ldr	r3, .L128+100
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	b	.L119
.L126:
	mov	r2, #0
	mov	r3, #0
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	beq	.L119
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
.L119:
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	bl	__aeabi_d2uiz
	mov	r3, r0
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L128+104
	strh	r3, [r2]	@ movhi
	b	.L127
.L125:
	ldr	r3, .L128+88
	mov	r2, #0
	strh	r2, [r3]	@ movhi
	ldr	r3, .L128+92
	mov	r2, #224
	strh	r2, [r3]	@ movhi
	ldr	r3, .L128+104
	mvn	r2, #0
	strh	r2, [r3]	@ movhi
.L127:
	nop
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L129:
	.align	2
.L128:
	.word	Op06X
	.word	Op02FX
	.word	ObjPX
	.word	Op06Y
	.word	Op02FY
	.word	ObjPY
	.word	Op06Z
	.word	Op02FZ
	.word	ObjPZ
	.word	Op02AAS
	.word	tanval2
	.word	CosTable2
	.word	SinTable2
	.word	ObjPX1
	.word	ObjPY1
	.word	ObjPZ1
	.word	Op02AZS
	.word	ObjPX2
	.word	ObjPY2
	.word	ObjPZ2
	.word	Op02LFE
	.word	Op02LES
	.word	Op06H
	.word	Op06V
	.word	1081081856
	.word	1089470432
	.word	Op06S
	.size	DSPOp06, .-DSPOp06
	.comm	matrixC,18,4
	.comm	matrixB,18,4
	.comm	matrixA,18,4
	.comm	Op01m,2,2
	.comm	Op01Zr,2,2
	.comm	Op01Xr,2,2
	.comm	Op01Yr,2,2
	.comm	Op11m,2,2
	.comm	Op11Zr,2,2
	.comm	Op11Xr,2,2
	.comm	Op11Yr,2,2
	.comm	Op21m,2,2
	.comm	Op21Zr,2,2
	.comm	Op21Xr,2,2
	.comm	Op21Yr,2,2
	.align	2
	.global	DSPOp01
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSPOp01, %function
DSPOp01:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	ldr	r3, .L131
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Sin
	mov	r3, r0
	strh	r3, [fp, #-16]	@ movhi
	ldr	r3, .L131
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Cos
	mov	r3, r0
	strh	r3, [fp, #-14]	@ movhi
	ldr	r3, .L131+4
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Sin
	mov	r3, r0
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, .L131+4
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Cos
	mov	r3, r0
	strh	r3, [fp, #-10]	@ movhi
	ldr	r3, .L131+8
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Sin
	mov	r3, r0
	strh	r3, [fp, #-8]	@ movhi
	ldr	r3, .L131+8
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Cos
	mov	r3, r0
	strh	r3, [fp, #-6]	@ movhi
	ldr	r3, .L131+12
	ldrsh	r3, [r3]
	asr	r3, r3, #1
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L131+12
	strh	r3, [r2]	@ movhi
	ldr	r3, .L131+12
	ldrsh	r3, [r3]
	mov	r2, r3
	ldrsh	r3, [fp, #-14]
	mul	r3, r2, r3
	asr	r3, r3, #15
	ldrsh	r2, [fp, #-10]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L131+16
	strh	r3, [r2]	@ movhi
	ldr	r3, .L131+12
	ldrsh	r3, [r3]
	mov	r2, r3
	ldrsh	r3, [fp, #-16]
	mul	r3, r2, r3
	asr	r3, r3, #15
	ldrsh	r2, [fp, #-10]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	rsb	r3, r3, #0
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L131+16
	strh	r3, [r2, #2]	@ movhi
	ldr	r3, .L131+12
	ldrsh	r3, [r3]
	mov	r2, r3
	ldrsh	r3, [fp, #-12]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L131+16
	strh	r3, [r2, #4]	@ movhi
	ldr	r3, .L131+12
	ldrsh	r3, [r3]
	mov	r2, r3
	ldrsh	r3, [fp, #-16]
	mul	r3, r2, r3
	asr	r3, r3, #15
	ldrsh	r2, [fp, #-6]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L131+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldrsh	r3, [fp, #-14]
	mul	r3, r1, r3
	asr	r3, r3, #15
	ldrsh	r1, [fp, #-8]
	mul	r3, r1, r3
	asr	r3, r3, #15
	ldrsh	r1, [fp, #-12]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L131+16
	strh	r3, [r2, #6]	@ movhi
	ldr	r3, .L131+12
	ldrsh	r3, [r3]
	mov	r2, r3
	ldrsh	r3, [fp, #-14]
	mul	r3, r2, r3
	asr	r3, r3, #15
	ldrsh	r2, [fp, #-6]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L131+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldrsh	r3, [fp, #-16]
	mul	r3, r1, r3
	asr	r3, r3, #15
	ldrsh	r1, [fp, #-8]
	mul	r3, r1, r3
	asr	r3, r3, #15
	ldrsh	r1, [fp, #-12]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	sub	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L131+16
	strh	r3, [r2, #8]	@ movhi
	ldr	r3, .L131+12
	ldrsh	r3, [r3]
	mov	r2, r3
	ldrsh	r3, [fp, #-8]
	mul	r3, r2, r3
	asr	r3, r3, #15
	ldrsh	r2, [fp, #-10]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	rsb	r3, r3, #0
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L131+16
	strh	r3, [r2, #10]	@ movhi
	ldr	r3, .L131+12
	ldrsh	r3, [r3]
	mov	r2, r3
	ldrsh	r3, [fp, #-16]
	mul	r3, r2, r3
	asr	r3, r3, #15
	ldrsh	r2, [fp, #-8]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L131+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldrsh	r3, [fp, #-14]
	mul	r3, r1, r3
	asr	r3, r3, #15
	ldrsh	r1, [fp, #-6]
	mul	r3, r1, r3
	asr	r3, r3, #15
	ldrsh	r1, [fp, #-12]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	sub	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L131+16
	strh	r3, [r2, #12]	@ movhi
	ldr	r3, .L131+12
	ldrsh	r3, [r3]
	mov	r2, r3
	ldrsh	r3, [fp, #-14]
	mul	r3, r2, r3
	asr	r3, r3, #15
	ldrsh	r2, [fp, #-8]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L131+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldrsh	r3, [fp, #-16]
	mul	r3, r1, r3
	asr	r3, r3, #15
	ldrsh	r1, [fp, #-6]
	mul	r3, r1, r3
	asr	r3, r3, #15
	ldrsh	r1, [fp, #-12]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L131+16
	strh	r3, [r2, #14]	@ movhi
	ldr	r3, .L131+12
	ldrsh	r3, [r3]
	mov	r2, r3
	ldrsh	r3, [fp, #-6]
	mul	r3, r2, r3
	asr	r3, r3, #15
	ldrsh	r2, [fp, #-10]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L131+16
	strh	r3, [r2, #16]	@ movhi
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L132:
	.align	2
.L131:
	.word	Op01Zr
	.word	Op01Yr
	.word	Op01Xr
	.word	Op01m
	.word	matrixA
	.size	DSPOp01, .-DSPOp01
	.align	2
	.global	DSPOp11
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSPOp11, %function
DSPOp11:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	ldr	r3, .L134
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Sin
	mov	r3, r0
	strh	r3, [fp, #-16]	@ movhi
	ldr	r3, .L134
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Cos
	mov	r3, r0
	strh	r3, [fp, #-14]	@ movhi
	ldr	r3, .L134+4
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Sin
	mov	r3, r0
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, .L134+4
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Cos
	mov	r3, r0
	strh	r3, [fp, #-10]	@ movhi
	ldr	r3, .L134+8
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Sin
	mov	r3, r0
	strh	r3, [fp, #-8]	@ movhi
	ldr	r3, .L134+8
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Cos
	mov	r3, r0
	strh	r3, [fp, #-6]	@ movhi
	ldr	r3, .L134+12
	ldrsh	r3, [r3]
	asr	r3, r3, #1
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L134+12
	strh	r3, [r2]	@ movhi
	ldr	r3, .L134+12
	ldrsh	r3, [r3]
	mov	r2, r3
	ldrsh	r3, [fp, #-14]
	mul	r3, r2, r3
	asr	r3, r3, #15
	ldrsh	r2, [fp, #-10]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L134+16
	strh	r3, [r2]	@ movhi
	ldr	r3, .L134+12
	ldrsh	r3, [r3]
	mov	r2, r3
	ldrsh	r3, [fp, #-16]
	mul	r3, r2, r3
	asr	r3, r3, #15
	ldrsh	r2, [fp, #-10]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	rsb	r3, r3, #0
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L134+16
	strh	r3, [r2, #2]	@ movhi
	ldr	r3, .L134+12
	ldrsh	r3, [r3]
	mov	r2, r3
	ldrsh	r3, [fp, #-12]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L134+16
	strh	r3, [r2, #4]	@ movhi
	ldr	r3, .L134+12
	ldrsh	r3, [r3]
	mov	r2, r3
	ldrsh	r3, [fp, #-16]
	mul	r3, r2, r3
	asr	r3, r3, #15
	ldrsh	r2, [fp, #-6]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L134+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldrsh	r3, [fp, #-14]
	mul	r3, r1, r3
	asr	r3, r3, #15
	ldrsh	r1, [fp, #-8]
	mul	r3, r1, r3
	asr	r3, r3, #15
	ldrsh	r1, [fp, #-12]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L134+16
	strh	r3, [r2, #6]	@ movhi
	ldr	r3, .L134+12
	ldrsh	r3, [r3]
	mov	r2, r3
	ldrsh	r3, [fp, #-14]
	mul	r3, r2, r3
	asr	r3, r3, #15
	ldrsh	r2, [fp, #-6]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L134+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldrsh	r3, [fp, #-16]
	mul	r3, r1, r3
	asr	r3, r3, #15
	ldrsh	r1, [fp, #-8]
	mul	r3, r1, r3
	asr	r3, r3, #15
	ldrsh	r1, [fp, #-12]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	sub	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L134+16
	strh	r3, [r2, #8]	@ movhi
	ldr	r3, .L134+12
	ldrsh	r3, [r3]
	mov	r2, r3
	ldrsh	r3, [fp, #-8]
	mul	r3, r2, r3
	asr	r3, r3, #15
	ldrsh	r2, [fp, #-10]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	rsb	r3, r3, #0
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L134+16
	strh	r3, [r2, #10]	@ movhi
	ldr	r3, .L134+12
	ldrsh	r3, [r3]
	mov	r2, r3
	ldrsh	r3, [fp, #-16]
	mul	r3, r2, r3
	asr	r3, r3, #15
	ldrsh	r2, [fp, #-8]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L134+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldrsh	r3, [fp, #-14]
	mul	r3, r1, r3
	asr	r3, r3, #15
	ldrsh	r1, [fp, #-6]
	mul	r3, r1, r3
	asr	r3, r3, #15
	ldrsh	r1, [fp, #-12]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	sub	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L134+16
	strh	r3, [r2, #12]	@ movhi
	ldr	r3, .L134+12
	ldrsh	r3, [r3]
	mov	r2, r3
	ldrsh	r3, [fp, #-14]
	mul	r3, r2, r3
	asr	r3, r3, #15
	ldrsh	r2, [fp, #-8]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L134+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldrsh	r3, [fp, #-16]
	mul	r3, r1, r3
	asr	r3, r3, #15
	ldrsh	r1, [fp, #-6]
	mul	r3, r1, r3
	asr	r3, r3, #15
	ldrsh	r1, [fp, #-12]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L134+16
	strh	r3, [r2, #14]	@ movhi
	ldr	r3, .L134+12
	ldrsh	r3, [r3]
	mov	r2, r3
	ldrsh	r3, [fp, #-6]
	mul	r3, r2, r3
	asr	r3, r3, #15
	ldrsh	r2, [fp, #-10]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L134+16
	strh	r3, [r2, #16]	@ movhi
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L135:
	.align	2
.L134:
	.word	Op11Zr
	.word	Op11Yr
	.word	Op11Xr
	.word	Op11m
	.word	matrixB
	.size	DSPOp11, .-DSPOp11
	.align	2
	.global	DSPOp21
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSPOp21, %function
DSPOp21:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	ldr	r3, .L137
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Sin
	mov	r3, r0
	strh	r3, [fp, #-16]	@ movhi
	ldr	r3, .L137
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Cos
	mov	r3, r0
	strh	r3, [fp, #-14]	@ movhi
	ldr	r3, .L137+4
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Sin
	mov	r3, r0
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, .L137+4
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Cos
	mov	r3, r0
	strh	r3, [fp, #-10]	@ movhi
	ldr	r3, .L137+8
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Sin
	mov	r3, r0
	strh	r3, [fp, #-8]	@ movhi
	ldr	r3, .L137+8
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Cos
	mov	r3, r0
	strh	r3, [fp, #-6]	@ movhi
	ldr	r3, .L137+12
	ldrsh	r3, [r3]
	asr	r3, r3, #1
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L137+12
	strh	r3, [r2]	@ movhi
	ldr	r3, .L137+12
	ldrsh	r3, [r3]
	mov	r2, r3
	ldrsh	r3, [fp, #-14]
	mul	r3, r2, r3
	asr	r3, r3, #15
	ldrsh	r2, [fp, #-10]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L137+16
	strh	r3, [r2]	@ movhi
	ldr	r3, .L137+12
	ldrsh	r3, [r3]
	mov	r2, r3
	ldrsh	r3, [fp, #-16]
	mul	r3, r2, r3
	asr	r3, r3, #15
	ldrsh	r2, [fp, #-10]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	rsb	r3, r3, #0
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L137+16
	strh	r3, [r2, #2]	@ movhi
	ldr	r3, .L137+12
	ldrsh	r3, [r3]
	mov	r2, r3
	ldrsh	r3, [fp, #-12]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L137+16
	strh	r3, [r2, #4]	@ movhi
	ldr	r3, .L137+12
	ldrsh	r3, [r3]
	mov	r2, r3
	ldrsh	r3, [fp, #-16]
	mul	r3, r2, r3
	asr	r3, r3, #15
	ldrsh	r2, [fp, #-6]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L137+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldrsh	r3, [fp, #-14]
	mul	r3, r1, r3
	asr	r3, r3, #15
	ldrsh	r1, [fp, #-8]
	mul	r3, r1, r3
	asr	r3, r3, #15
	ldrsh	r1, [fp, #-12]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L137+16
	strh	r3, [r2, #6]	@ movhi
	ldr	r3, .L137+12
	ldrsh	r3, [r3]
	mov	r2, r3
	ldrsh	r3, [fp, #-14]
	mul	r3, r2, r3
	asr	r3, r3, #15
	ldrsh	r2, [fp, #-6]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L137+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldrsh	r3, [fp, #-16]
	mul	r3, r1, r3
	asr	r3, r3, #15
	ldrsh	r1, [fp, #-8]
	mul	r3, r1, r3
	asr	r3, r3, #15
	ldrsh	r1, [fp, #-12]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	sub	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L137+16
	strh	r3, [r2, #8]	@ movhi
	ldr	r3, .L137+12
	ldrsh	r3, [r3]
	mov	r2, r3
	ldrsh	r3, [fp, #-8]
	mul	r3, r2, r3
	asr	r3, r3, #15
	ldrsh	r2, [fp, #-10]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	rsb	r3, r3, #0
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L137+16
	strh	r3, [r2, #10]	@ movhi
	ldr	r3, .L137+12
	ldrsh	r3, [r3]
	mov	r2, r3
	ldrsh	r3, [fp, #-16]
	mul	r3, r2, r3
	asr	r3, r3, #15
	ldrsh	r2, [fp, #-8]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L137+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldrsh	r3, [fp, #-14]
	mul	r3, r1, r3
	asr	r3, r3, #15
	ldrsh	r1, [fp, #-6]
	mul	r3, r1, r3
	asr	r3, r3, #15
	ldrsh	r1, [fp, #-12]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	sub	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L137+16
	strh	r3, [r2, #12]	@ movhi
	ldr	r3, .L137+12
	ldrsh	r3, [r3]
	mov	r2, r3
	ldrsh	r3, [fp, #-14]
	mul	r3, r2, r3
	asr	r3, r3, #15
	ldrsh	r2, [fp, #-8]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L137+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldrsh	r3, [fp, #-16]
	mul	r3, r1, r3
	asr	r3, r3, #15
	ldrsh	r1, [fp, #-6]
	mul	r3, r1, r3
	asr	r3, r3, #15
	ldrsh	r1, [fp, #-12]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L137+16
	strh	r3, [r2, #14]	@ movhi
	ldr	r3, .L137+12
	ldrsh	r3, [r3]
	mov	r2, r3
	ldrsh	r3, [fp, #-6]
	mul	r3, r2, r3
	asr	r3, r3, #15
	ldrsh	r2, [fp, #-10]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L137+16
	strh	r3, [r2, #16]	@ movhi
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L138:
	.align	2
.L137:
	.word	Op21Zr
	.word	Op21Yr
	.word	Op21Xr
	.word	Op21m
	.word	matrixC
	.size	DSPOp21, .-DSPOp21
	.comm	Op0DX,2,2
	.comm	Op0DY,2,2
	.comm	Op0DZ,2,2
	.comm	Op0DF,2,2
	.comm	Op0DL,2,2
	.comm	Op0DU,2,2
	.comm	Op1DX,2,2
	.comm	Op1DY,2,2
	.comm	Op1DZ,2,2
	.comm	Op1DF,2,2
	.comm	Op1DL,2,2
	.comm	Op1DU,2,2
	.comm	Op2DX,2,2
	.comm	Op2DY,2,2
	.comm	Op2DZ,2,2
	.comm	Op2DF,2,2
	.comm	Op2DL,2,2
	.comm	Op2DU,2,2
	.align	2
	.global	DSPOp0D
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSPOp0D, %function
DSPOp0D:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L140
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L140+4
	ldrsh	r3, [r3]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L140+8
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L140+4
	ldrsh	r3, [r3, #2]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L140+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L140+4
	ldrsh	r3, [r3, #4]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L140+16
	strh	r3, [r2]	@ movhi
	ldr	r3, .L140
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L140+4
	ldrsh	r3, [r3, #6]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L140+8
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L140+4
	ldrsh	r3, [r3, #8]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L140+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L140+4
	ldrsh	r3, [r3, #10]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L140+20
	strh	r3, [r2]	@ movhi
	ldr	r3, .L140
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L140+4
	ldrsh	r3, [r3, #12]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L140+8
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L140+4
	ldrsh	r3, [r3, #14]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L140+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L140+4
	ldrsh	r3, [r3, #16]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L140+24
	strh	r3, [r2]	@ movhi
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L141:
	.align	2
.L140:
	.word	Op0DX
	.word	matrixA
	.word	Op0DY
	.word	Op0DZ
	.word	Op0DF
	.word	Op0DL
	.word	Op0DU
	.size	DSPOp0D, .-DSPOp0D
	.align	2
	.global	DSPOp1D
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSPOp1D, %function
DSPOp1D:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L143
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L143+4
	ldrsh	r3, [r3]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L143+8
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L143+4
	ldrsh	r3, [r3, #2]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L143+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L143+4
	ldrsh	r3, [r3, #4]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L143+16
	strh	r3, [r2]	@ movhi
	ldr	r3, .L143
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L143+4
	ldrsh	r3, [r3, #6]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L143+8
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L143+4
	ldrsh	r3, [r3, #8]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L143+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L143+4
	ldrsh	r3, [r3, #10]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L143+20
	strh	r3, [r2]	@ movhi
	ldr	r3, .L143
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L143+4
	ldrsh	r3, [r3, #12]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L143+8
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L143+4
	ldrsh	r3, [r3, #14]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L143+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L143+4
	ldrsh	r3, [r3, #16]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L143+24
	strh	r3, [r2]	@ movhi
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L144:
	.align	2
.L143:
	.word	Op1DX
	.word	matrixB
	.word	Op1DY
	.word	Op1DZ
	.word	Op1DF
	.word	Op1DL
	.word	Op1DU
	.size	DSPOp1D, .-DSPOp1D
	.align	2
	.global	DSPOp2D
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSPOp2D, %function
DSPOp2D:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L146
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L146+4
	ldrsh	r3, [r3]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L146+8
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L146+4
	ldrsh	r3, [r3, #2]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L146+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L146+4
	ldrsh	r3, [r3, #4]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L146+16
	strh	r3, [r2]	@ movhi
	ldr	r3, .L146
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L146+4
	ldrsh	r3, [r3, #6]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L146+8
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L146+4
	ldrsh	r3, [r3, #8]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L146+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L146+4
	ldrsh	r3, [r3, #10]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L146+20
	strh	r3, [r2]	@ movhi
	ldr	r3, .L146
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L146+4
	ldrsh	r3, [r3, #12]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L146+8
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L146+4
	ldrsh	r3, [r3, #14]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L146+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L146+4
	ldrsh	r3, [r3, #16]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L146+24
	strh	r3, [r2]	@ movhi
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L147:
	.align	2
.L146:
	.word	Op2DX
	.word	matrixC
	.word	Op2DY
	.word	Op2DZ
	.word	Op2DF
	.word	Op2DL
	.word	Op2DU
	.size	DSPOp2D, .-DSPOp2D
	.comm	Op03F,2,2
	.comm	Op03L,2,2
	.comm	Op03U,2,2
	.comm	Op03X,2,2
	.comm	Op03Y,2,2
	.comm	Op03Z,2,2
	.comm	Op13F,2,2
	.comm	Op13L,2,2
	.comm	Op13U,2,2
	.comm	Op13X,2,2
	.comm	Op13Y,2,2
	.comm	Op13Z,2,2
	.comm	Op23F,2,2
	.comm	Op23L,2,2
	.comm	Op23U,2,2
	.comm	Op23X,2,2
	.comm	Op23Y,2,2
	.comm	Op23Z,2,2
	.align	2
	.global	DSPOp03
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSPOp03, %function
DSPOp03:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L149
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L149+4
	ldrsh	r3, [r3]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L149+8
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L149+4
	ldrsh	r3, [r3, #6]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L149+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L149+4
	ldrsh	r3, [r3, #12]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L149+16
	strh	r3, [r2]	@ movhi
	ldr	r3, .L149
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L149+4
	ldrsh	r3, [r3, #2]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L149+8
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L149+4
	ldrsh	r3, [r3, #8]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L149+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L149+4
	ldrsh	r3, [r3, #14]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L149+20
	strh	r3, [r2]	@ movhi
	ldr	r3, .L149
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L149+4
	ldrsh	r3, [r3, #4]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L149+8
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L149+4
	ldrsh	r3, [r3, #10]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L149+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L149+4
	ldrsh	r3, [r3, #16]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L149+24
	strh	r3, [r2]	@ movhi
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L150:
	.align	2
.L149:
	.word	Op03F
	.word	matrixA
	.word	Op03L
	.word	Op03U
	.word	Op03X
	.word	Op03Y
	.word	Op03Z
	.size	DSPOp03, .-DSPOp03
	.align	2
	.global	DSPOp13
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSPOp13, %function
DSPOp13:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L152
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L152+4
	ldrsh	r3, [r3]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L152+8
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L152+4
	ldrsh	r3, [r3, #6]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L152+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L152+4
	ldrsh	r3, [r3, #12]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L152+16
	strh	r3, [r2]	@ movhi
	ldr	r3, .L152
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L152+4
	ldrsh	r3, [r3, #2]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L152+8
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L152+4
	ldrsh	r3, [r3, #8]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L152+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L152+4
	ldrsh	r3, [r3, #14]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L152+20
	strh	r3, [r2]	@ movhi
	ldr	r3, .L152
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L152+4
	ldrsh	r3, [r3, #4]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L152+8
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L152+4
	ldrsh	r3, [r3, #10]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L152+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L152+4
	ldrsh	r3, [r3, #16]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L152+24
	strh	r3, [r2]	@ movhi
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L153:
	.align	2
.L152:
	.word	Op13F
	.word	matrixB
	.word	Op13L
	.word	Op13U
	.word	Op13X
	.word	Op13Y
	.word	Op13Z
	.size	DSPOp13, .-DSPOp13
	.align	2
	.global	DSPOp23
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSPOp23, %function
DSPOp23:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L155
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L155+4
	ldrsh	r3, [r3]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L155+8
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L155+4
	ldrsh	r3, [r3, #6]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L155+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L155+4
	ldrsh	r3, [r3, #12]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L155+16
	strh	r3, [r2]	@ movhi
	ldr	r3, .L155
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L155+4
	ldrsh	r3, [r3, #2]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L155+8
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L155+4
	ldrsh	r3, [r3, #8]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L155+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L155+4
	ldrsh	r3, [r3, #14]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L155+20
	strh	r3, [r2]	@ movhi
	ldr	r3, .L155
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L155+4
	ldrsh	r3, [r3, #4]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L155+8
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L155+4
	ldrsh	r3, [r3, #10]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L155+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L155+4
	ldrsh	r3, [r3, #16]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L155+24
	strh	r3, [r2]	@ movhi
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L156:
	.align	2
.L155:
	.word	Op23F
	.word	matrixC
	.word	Op23L
	.word	Op23U
	.word	Op23X
	.word	Op23Y
	.word	Op23Z
	.size	DSPOp23, .-DSPOp23
	.comm	Op14Zr,2,2
	.comm	Op14Xr,2,2
	.comm	Op14Yr,2,2
	.comm	Op14U,2,2
	.comm	Op14F,2,2
	.comm	Op14L,2,2
	.comm	Op14Zrr,2,2
	.comm	Op14Xrr,2,2
	.comm	Op14Yrr,2,2
	.section	.rodata
	.align	2
.LC2:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	DSPOp14
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSPOp14, %function
DSPOp14:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #16
	ldr	r3, .L159
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	mov	r3,#0
	ldr	r3, .L159+4
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Cos
	mov	r3, r0
	mov	r0, r3
	sub	r3, fp, #26
	sub	r2, fp, #28
	mov	r1, #0
	bl	DSP1_Inverse
	ldr	r3, .L159+8
	ldrsh	r3, [r3]
	mov	r4, r3
	ldr	r3, .L159+12
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Cos
	mov	r3, r0
	mul	r4, r3, r4
	ldr	r3, .L159+16
	ldrsh	r3, [r3]
	mov	r5, r3
	ldr	r3, .L159+12
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Sin
	mov	r3, r0
	mul	r3, r5, r3
	sub	r3, r4, r3
	sub	r2, fp, #20
	sub	r1, fp, #22
	mov	r0, r3
	bl	DSP1_NormalizeDouble
	ldrsh	r3, [fp, #-26]
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldrsh	r3, [fp, #-20]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	sub	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	strh	r3, [fp, #-20]	@ movhi
	ldrsh	r3, [fp, #-22]
	ldrsh	r2, [fp, #-28]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	sub	r2, fp, #20
	sub	r1, fp, #22
	mov	r0, r3
	bl	DSP1_Normalize
	ldrsh	r3, [fp, #-22]
	ldrsh	r2, [fp, #-20]
	mov	r1, r2
	mov	r0, r3
	bl	DSP1_Truncate
	mov	r3, r0
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L159+20
	ldrsh	r3, [r3]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L159+24
	strh	r3, [r2]	@ movhi
	ldr	r3, .L159+8
	ldrsh	r3, [r3]
	mov	r4, r3
	ldr	r3, .L159+12
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Sin
	mov	r3, r0
	mul	r3, r4, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L159+4
	ldrsh	r3, [r3]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r4, r3, #16
	ldr	r3, .L159+16
	ldrsh	r3, [r3]
	mov	r5, r3
	ldr	r3, .L159+12
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Cos
	mov	r3, r0
	mul	r3, r5, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r4, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L159+28
	strh	r3, [r2]	@ movhi
	ldr	r3, .L159+8
	ldrsh	r3, [r3]
	mov	r4, r3
	ldr	r3, .L159+12
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Cos
	mov	r3, r0
	mul	r4, r3, r4
	ldr	r3, .L159+16
	ldrsh	r3, [r3]
	mov	r5, r3
	ldr	r3, .L159+12
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Sin
	mov	r3, r0
	mul	r3, r5, r3
	add	r3, r4, r3
	sub	r2, fp, #20
	sub	r1, fp, #22
	mov	r0, r3
	bl	DSP1_NormalizeDouble
	ldrsh	r3, [fp, #-26]
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldrsh	r3, [fp, #-20]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	sub	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	strh	r3, [fp, #-20]	@ movhi
	ldr	r3, .L159+4
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Sin
	mov	r3, r0
	mov	r0, r3
	sub	r2, fp, #20
	sub	r3, fp, #24
	mov	r1, r3
	bl	DSP1_Normalize
	ldrsh	r3, [fp, #-28]
	ldrsh	r2, [fp, #-24]
	mul	r3, r2, r3
	asr	r3, r3, #15
	strh	r3, [fp, #-18]	@ movhi
	ldrsh	r3, [fp, #-22]
	mov	r2, r3
	ldrsh	r3, [fp, #-18]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	rsb	r3, r3, #0
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	sub	r2, fp, #20
	sub	r1, fp, #22
	mov	r0, r3
	bl	DSP1_Normalize
	ldrsh	r3, [fp, #-22]
	ldrsh	r2, [fp, #-20]
	mov	r1, r2
	mov	r0, r3
	bl	DSP1_Truncate
	mov	r3, r0
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L159+12
	ldrsh	r3, [r3]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L159+32
	ldrsh	r3, [r3]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L159+36
	strh	r3, [r2]	@ movhi
	nop
	ldr	r3, .L159
	ldr	r2, [r3]
	ldr	r3, [fp, #-16]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L158
	bl	__stack_chk_fail
.L158:
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L160:
	.align	2
.L159:
	.word	.LC2
	.word	Op14Xr
	.word	Op14U
	.word	Op14Yr
	.word	Op14F
	.word	Op14Zr
	.word	Op14Zrr
	.word	Op14Xrr
	.word	Op14L
	.word	Op14Yrr
	.size	DSPOp14, .-DSPOp14
	.section	.rodata
	.align	2
.LC3:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	DSP1_Target
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSP1_Target, %function
DSP1_Target:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #32
	str	r2, [fp, #-28]
	str	r3, [fp, #-32]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-22]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-24]	@ movhi
	ldr	r3, .L163
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	ldrsh	r3, [fp, #-24]
	ldr	r2, .L163+4
	ldrsh	r2, [r2]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L163+8
	ldrsh	r3, [r3]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r0, r3, #16
	sub	r3, fp, #14
	sub	r2, fp, #16
	mov	r1, #8
	bl	DSP1_Inverse
	ldrsh	r3, [fp, #-14]
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L163+12
	ldrsh	r3, [r3]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	strh	r3, [fp, #-14]	@ movhi
	ldrsh	r3, [fp, #-16]
	mov	r2, r3
	ldr	r3, .L163+16
	ldrsh	r3, [r3]
	mul	r3, r2, r3
	asr	r3, r3, #15
	strh	r3, [fp, #-10]	@ movhi
	ldrsh	r3, [fp, #-14]
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L163+20
	ldrsh	r3, [r3]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	strh	r3, [fp, #-12]	@ movhi
	ldrsh	r3, [fp, #-22]
	lsl	r3, r3, #8
	strh	r3, [fp, #-22]	@ movhi
	sub	r2, fp, #14
	sub	r1, fp, #16
	ldrsh	r3, [fp, #-10]
	mov	r0, r3
	bl	DSP1_Normalize
	ldrsh	r3, [fp, #-16]
	ldrsh	r2, [fp, #-14]
	mov	r1, r2
	mov	r0, r3
	bl	DSP1_Truncate
	mov	r3, r0
	mov	r2, r3
	ldrsh	r3, [fp, #-22]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	strh	r3, [fp, #-16]	@ movhi
	ldrsh	r3, [fp, #-16]
	mov	r2, r3
	ldr	r3, .L163+24
	ldrsh	r3, [r3]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L163+28
	ldrsh	r3, [r3]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r3, [fp, #-28]
	strh	r2, [r3]	@ movhi
	ldr	r3, .L163+32
	ldrsh	r3, [r3]
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldrsh	r3, [fp, #-16]
	mov	r1, r3
	ldr	r3, .L163+36
	ldrsh	r3, [r3]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	sub	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r3, [fp, #-32]
	strh	r2, [r3]	@ movhi
	ldrsh	r3, [fp, #-24]
	lsl	r3, r3, #8
	strh	r3, [fp, #-24]	@ movhi
	ldrsh	r3, [fp, #-10]
	ldr	r2, .L163+40
	ldrsh	r2, [r2]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	sub	r2, fp, #12
	sub	r1, fp, #16
	mov	r0, r3
	bl	DSP1_Normalize
	ldrsh	r3, [fp, #-16]
	ldrsh	r2, [fp, #-12]
	mov	r1, r2
	mov	r0, r3
	bl	DSP1_Truncate
	mov	r3, r0
	mov	r2, r3
	ldrsh	r3, [fp, #-24]
	mul	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	strh	r3, [fp, #-16]	@ movhi
	ldr	r3, [fp, #-28]
	ldrsh	r3, [r3]
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldrsh	r3, [fp, #-16]
	mov	r1, r3
	ldr	r3, .L163+36
	ldrsh	r3, [r3]
	rsb	r3, r3, #0
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r3, [fp, #-28]
	strh	r2, [r3]	@ movhi
	ldr	r3, [fp, #-32]
	ldrsh	r3, [r3]
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldrsh	r3, [fp, #-16]
	mov	r1, r3
	ldr	r3, .L163+24
	ldrsh	r3, [r3]
	mul	r3, r1, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r3, [fp, #-32]
	strh	r2, [r3]	@ movhi
	nop
	ldr	r3, .L163
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L162
	bl	__stack_chk_fail
.L162:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L164:
	.align	2
.L163:
	.word	.LC3
	.word	SinAzs
	.word	VOffset
	.word	VPlane_E
	.word	VPlane_C
	.word	SecAZS_E1
	.word	CosAas
	.word	CentreX
	.word	CentreY
	.word	SinAas
	.word	SecAZS_C1
	.size	DSP1_Target, .-DSP1_Target
	.comm	Op0EH,2,2
	.comm	Op0EV,2,2
	.comm	Op0EX,2,2
	.comm	Op0EY,2,2
	.align	2
	.global	DSPOp0E
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSPOp0E, %function
DSPOp0E:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L166
	ldrsh	r0, [r3]
	ldr	r3, .L166+4
	ldrsh	r1, [r3]
	ldr	r3, .L166+8
	ldr	r2, .L166+12
	bl	DSP1_Target
	nop
	pop	{fp, pc}
.L167:
	.align	2
.L166:
	.word	Op0EH
	.word	Op0EV
	.word	Op0EY
	.word	Op0EX
	.size	DSPOp0E, .-DSPOp0E
	.comm	Op0BX,2,2
	.comm	Op0BY,2,2
	.comm	Op0BZ,2,2
	.comm	Op0BS,2,2
	.comm	Op1BX,2,2
	.comm	Op1BY,2,2
	.comm	Op1BZ,2,2
	.comm	Op1BS,2,2
	.comm	Op2BX,2,2
	.comm	Op2BY,2,2
	.comm	Op2BZ,2,2
	.comm	Op2BS,2,2
	.align	2
	.global	DSPOp0B
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSPOp0B, %function
DSPOp0B:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L169
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L169+4
	ldrsh	r3, [r3]
	mul	r2, r3, r2
	ldr	r3, .L169+8
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L169+4
	ldrsh	r3, [r3, #2]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, .L169+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L169+4
	ldrsh	r3, [r3, #4]
	mul	r3, r1, r3
	add	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L169+16
	strh	r3, [r2]	@ movhi
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L170:
	.align	2
.L169:
	.word	Op0BX
	.word	matrixA
	.word	Op0BY
	.word	Op0BZ
	.word	Op0BS
	.size	DSPOp0B, .-DSPOp0B
	.align	2
	.global	DSPOp1B
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSPOp1B, %function
DSPOp1B:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L172
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L172+4
	ldrsh	r3, [r3]
	mul	r2, r3, r2
	ldr	r3, .L172+8
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L172+4
	ldrsh	r3, [r3, #2]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, .L172+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L172+4
	ldrsh	r3, [r3, #4]
	mul	r3, r1, r3
	add	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L172+16
	strh	r3, [r2]	@ movhi
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L173:
	.align	2
.L172:
	.word	Op1BX
	.word	matrixB
	.word	Op1BY
	.word	Op1BZ
	.word	Op1BS
	.size	DSPOp1B, .-DSPOp1B
	.align	2
	.global	DSPOp2B
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSPOp2B, %function
DSPOp2B:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L175
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L175+4
	ldrsh	r3, [r3]
	mul	r2, r3, r2
	ldr	r3, .L175+8
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L175+4
	ldrsh	r3, [r3, #2]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, .L175+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L175+4
	ldrsh	r3, [r3, #4]
	mul	r3, r1, r3
	add	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L175+16
	strh	r3, [r2]	@ movhi
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L176:
	.align	2
.L175:
	.word	Op2BX
	.word	matrixC
	.word	Op2BY
	.word	Op2BZ
	.word	Op2BS
	.size	DSPOp2B, .-DSPOp2B
	.comm	Op08X,2,2
	.comm	Op08Y,2,2
	.comm	Op08Z,2,2
	.comm	Op08Ll,2,2
	.comm	Op08Lh,2,2
	.align	2
	.global	DSPOp08
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSPOp08, %function
DSPOp08:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	ldr	r3, .L178
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L178
	ldrsh	r3, [r3]
	mul	r2, r3, r2
	ldr	r3, .L178+4
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L178+4
	ldrsh	r3, [r3]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, .L178+8
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L178+8
	ldrsh	r3, [r3]
	mul	r3, r1, r3
	add	r3, r2, r3
	lsl	r3, r3, #1
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L178+12
	strh	r3, [r2]	@ movhi
	ldr	r3, [fp, #-8]
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L178+16
	strh	r3, [r2]	@ movhi
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L179:
	.align	2
.L178:
	.word	Op08X
	.word	Op08Y
	.word	Op08Z
	.word	Op08Ll
	.word	Op08Lh
	.size	DSPOp08, .-DSPOp08
	.comm	Op18X,2,2
	.comm	Op18Y,2,2
	.comm	Op18Z,2,2
	.comm	Op18R,2,2
	.comm	Op18D,2,2
	.align	2
	.global	DSPOp18
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSPOp18, %function
DSPOp18:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L181
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L181
	ldrsh	r3, [r3]
	mul	r2, r3, r2
	ldr	r3, .L181+4
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L181+4
	ldrsh	r3, [r3]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, .L181+8
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L181+8
	ldrsh	r3, [r3]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, .L181+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L181+12
	ldrsh	r3, [r3]
	mul	r3, r1, r3
	sub	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L181+16
	strh	r3, [r2]	@ movhi
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L182:
	.align	2
.L181:
	.word	Op18X
	.word	Op18Y
	.word	Op18Z
	.word	Op18R
	.word	Op18D
	.size	DSPOp18, .-DSPOp18
	.comm	Op38X,2,2
	.comm	Op38Y,2,2
	.comm	Op38Z,2,2
	.comm	Op38R,2,2
	.comm	Op38D,2,2
	.align	2
	.global	DSPOp38
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSPOp38, %function
DSPOp38:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L184
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L184
	ldrsh	r3, [r3]
	mul	r2, r3, r2
	ldr	r3, .L184+4
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L184+4
	ldrsh	r3, [r3]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, .L184+8
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L184+8
	ldrsh	r3, [r3]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, .L184+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L184+12
	ldrsh	r3, [r3]
	mul	r3, r1, r3
	sub	r3, r2, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L184+16
	strh	r3, [r2]	@ movhi
	ldr	r3, .L184+16
	ldrsh	r3, [r3]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L184+16
	strh	r3, [r2]	@ movhi
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L185:
	.align	2
.L184:
	.word	Op38X
	.word	Op38Y
	.word	Op38Z
	.word	Op38R
	.word	Op38D
	.size	DSPOp38, .-DSPOp38
	.comm	Op28X,2,2
	.comm	Op28Y,2,2
	.comm	Op28Z,2,2
	.comm	Op28R,2,2
	.section	.rodata
	.align	2
.LC4:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	DSPOp28
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSPOp28, %function
DSPOp28:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	ldr	r3, .L192
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	ldr	r3, .L192+4
	ldrsh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L192+4
	ldrsh	r3, [r3]
	mul	r2, r3, r2
	ldr	r3, .L192+8
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L192+8
	ldrsh	r3, [r3]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, .L192+12
	ldrsh	r3, [r3]
	mov	r1, r3
	ldr	r3, .L192+12
	ldrsh	r3, [r3]
	mul	r3, r1, r3
	add	r3, r2, r3
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-12]
	cmp	r3, #0
	bne	.L187
	ldr	r3, .L192+16
	mov	r2, #0
	strh	r2, [r3]	@ movhi
	b	.L191
.L187:
	sub	r2, fp, #20
	sub	r3, fp, #22
	mov	r1, r3
	ldr	r0, [fp, #-12]
	bl	DSP1_NormalizeDouble
	ldrsh	r3, [fp, #-20]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #1
	cmp	r3, #0
	beq	.L189
	ldrsh	r3, [fp, #-22]
	lsl	r3, r3, #14
	asr	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	strh	r3, [fp, #-22]	@ movhi
.L189:
	ldrsh	r3, [fp, #-22]
	lsl	r3, r3, #6
	asr	r3, r3, #15
	strh	r3, [fp, #-18]	@ movhi
	ldrsh	r3, [fp, #-18]
	add	r3, r3, #213
	ldr	r2, .L192+20
	lsl	r3, r3, #1
	add	r3, r2, r3
	ldrh	r3, [r3]
	strh	r3, [fp, #-16]	@ movhi
	ldrsh	r3, [fp, #-18]
	add	r3, r3, #214
	ldr	r2, .L192+20
	lsl	r3, r3, #1
	add	r3, r2, r3
	ldrh	r3, [r3]
	strh	r3, [fp, #-14]	@ movhi
	ldrsh	r2, [fp, #-14]
	ldrsh	r3, [fp, #-16]
	sub	r2, r2, r3
	ldrsh	r3, [fp, #-22]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #23
	lsr	r3, r3, #23
	mul	r3, r2, r3
	asr	r3, r3, #9
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldrh	r3, [fp, #-16]
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L192+16
	strh	r3, [r2]	@ movhi
	ldr	r3, .L192+16
	ldrsh	r3, [r3]
	mov	r2, r3
	ldrsh	r3, [fp, #-20]
	asr	r3, r3, #1
	lsl	r3, r3, #16
	asr	r3, r3, #16
	asr	r3, r2, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L192+16
	strh	r3, [r2]	@ movhi
.L191:
	nop
	ldr	r3, .L192
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L190
	bl	__stack_chk_fail
.L190:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L193:
	.align	2
.L192:
	.word	.LC4
	.word	Op28X
	.word	Op28Y
	.word	Op28Z
	.word	Op28R
	.word	DSP1ROM
	.size	DSPOp28, .-DSPOp28
	.comm	Op1CX,2,2
	.comm	Op1CY,2,2
	.comm	Op1CZ,2,2
	.comm	Op1CXBR,2,2
	.comm	Op1CYBR,2,2
	.comm	Op1CZBR,2,2
	.comm	Op1CXAR,2,2
	.comm	Op1CYAR,2,2
	.comm	Op1CZAR,2,2
	.comm	Op1CX1,2,2
	.comm	Op1CY1,2,2
	.comm	Op1CZ1,2,2
	.comm	Op1CX2,2,2
	.comm	Op1CY2,2,2
	.comm	Op1CZ2,2,2
	.align	2
	.global	DSPOp1C
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSPOp1C, %function
DSPOp1C:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	ldr	r3, .L195
	ldrsh	r3, [r3]
	mov	r4, r3
	ldr	r3, .L195+4
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Sin
	mov	r3, r0
	mul	r3, r4, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r4, r3, #16
	ldr	r3, .L195+8
	ldrsh	r3, [r3]
	mov	r5, r3
	ldr	r3, .L195+4
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Cos
	mov	r3, r0
	mul	r3, r5, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r4, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L195+12
	strh	r3, [r2]	@ movhi
	ldr	r3, .L195
	ldrsh	r3, [r3]
	mov	r4, r3
	ldr	r3, .L195+4
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Cos
	mov	r3, r0
	mul	r3, r4, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r4, r3, #16
	ldr	r3, .L195+8
	ldrsh	r3, [r3]
	mov	r5, r3
	ldr	r3, .L195+4
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Sin
	mov	r3, r0
	mul	r3, r5, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	sub	r3, r4, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L195+16
	strh	r3, [r2]	@ movhi
	ldr	r3, .L195+12
	ldrsh	r3, [r3]
	ldr	r2, .L195+8
	strh	r3, [r2]	@ movhi
	ldr	r3, .L195+16
	ldrsh	r3, [r3]
	ldr	r2, .L195
	strh	r3, [r2]	@ movhi
	ldr	r3, .L195+8
	ldrsh	r3, [r3]
	mov	r4, r3
	ldr	r3, .L195+20
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Sin
	mov	r3, r0
	mul	r3, r4, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r4, r3, #16
	ldr	r3, .L195+24
	ldrsh	r3, [r3]
	mov	r5, r3
	ldr	r3, .L195+20
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Cos
	mov	r3, r0
	mul	r3, r5, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r4, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L195+28
	strh	r3, [r2]	@ movhi
	ldr	r3, .L195+8
	ldrsh	r3, [r3]
	mov	r4, r3
	ldr	r3, .L195+20
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Cos
	mov	r3, r0
	mul	r3, r4, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r4, r3, #16
	ldr	r3, .L195+24
	ldrsh	r3, [r3]
	mov	r5, r3
	ldr	r3, .L195+20
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Sin
	mov	r3, r0
	mul	r3, r5, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	sub	r3, r4, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L195+12
	strh	r3, [r2]	@ movhi
	ldr	r3, .L195+12
	ldrsh	r3, [r3]
	ldr	r2, .L195+32
	strh	r3, [r2]	@ movhi
	ldr	r3, .L195+28
	ldrsh	r3, [r3]
	ldr	r2, .L195+24
	strh	r3, [r2]	@ movhi
	ldr	r3, .L195+24
	ldrsh	r3, [r3]
	mov	r4, r3
	ldr	r3, .L195+36
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Sin
	mov	r3, r0
	mul	r3, r4, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r4, r3, #16
	ldr	r3, .L195
	ldrsh	r3, [r3]
	mov	r5, r3
	ldr	r3, .L195+36
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Cos
	mov	r3, r0
	mul	r3, r5, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r4, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L195+16
	strh	r3, [r2]	@ movhi
	ldr	r3, .L195+24
	ldrsh	r3, [r3]
	mov	r4, r3
	ldr	r3, .L195+36
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Cos
	mov	r3, r0
	mul	r3, r4, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r4, r3, #16
	ldr	r3, .L195
	ldrsh	r3, [r3]
	mov	r5, r3
	ldr	r3, .L195+36
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	DSP1_Sin
	mov	r3, r0
	mul	r3, r5, r3
	asr	r3, r3, #15
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	sub	r3, r4, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L195+28
	strh	r3, [r2]	@ movhi
	ldr	r3, .L195+16
	ldrsh	r3, [r3]
	ldr	r2, .L195+40
	strh	r3, [r2]	@ movhi
	ldr	r3, .L195+28
	ldrsh	r3, [r3]
	ldr	r2, .L195+44
	strh	r3, [r2]	@ movhi
	nop
	pop	{r4, r5, fp, pc}
.L196:
	.align	2
.L195:
	.word	Op1CYBR
	.word	Op1CZ
	.word	Op1CXBR
	.word	Op1CX1
	.word	Op1CY1
	.word	Op1CY
	.word	Op1CZBR
	.word	Op1CZ1
	.word	Op1CXAR
	.word	Op1CX
	.word	Op1CYAR
	.word	Op1CZAR
	.size	DSPOp1C, .-DSPOp1C
	.comm	Op0FRamsize,2,2
	.comm	Op0FPass,2,2
	.align	2
	.global	DSPOp0F
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSPOp0F, %function
DSPOp0F:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L198
	mov	r2, #0
	strh	r2, [r3]	@ movhi
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L199:
	.align	2
.L198:
	.word	Op0FPass
	.size	DSPOp0F, .-DSPOp0F
	.comm	Op2FUnknown,2,2
	.comm	Op2FSize,2,2
	.align	2
	.global	DSPOp2F
	.syntax unified
	.arm
	.fpu softvfp
	.type	DSPOp2F, %function
DSPOp2F:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L201
	mov	r2, #256
	strh	r2, [r3]	@ movhi
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L202:
	.align	2
.L201:
	.word	Op2FSize
	.size	DSPOp2F, .-DSPOp2F
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
