	.file	"117328055.c"
	.intel_syntax noprefix
	.text
	.globl	S
	.bss
	.align 32
	.type	S, @object
	.size	S, 25200400
S:
	.zero	25200400
	.globl	inv
	.align 32
	.type	inv, @object
	.size	inv, 10040
inv:
	.zero	10040
	.text
	.globl	expo
	.type	expo, @function
expo:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	rcx, QWORD PTR -24[rbp]
	movabs	rdx, -8543223828751151131
	mov	rax, rcx
	imul	rdx
	lea	rax, [rdx+rcx]
	sar	rax, 29
	mov	rdx, rcx
	sar	rdx, 63
	sub	rax, rdx
	imul	rdx, rax, 1000000007
	mov	rax, rcx
	sub	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	mov	QWORD PTR -8[rbp], 1
	jmp	.L2
.L4:
	mov	eax, DWORD PTR -28[rbp]
	and	eax, 1
	test	eax, eax
	je	.L3
	mov	rax, QWORD PTR -8[rbp]
	imul	rax, QWORD PTR -24[rbp]
	mov	rcx, rax
	movabs	rdx, -8543223828751151131
	mov	rax, rcx
	imul	rdx
	lea	rax, [rdx+rcx]
	sar	rax, 29
	mov	rdx, rcx
	sar	rdx, 63
	sub	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	imul	rdx, rax, 1000000007
	mov	rax, rcx
	sub	rax, rdx
	mov	QWORD PTR -8[rbp], rax
.L3:
	mov	rax, QWORD PTR -24[rbp]
	imul	rax, rax
	mov	rcx, rax
	movabs	rdx, -8543223828751151131
	mov	rax, rcx
	imul	rdx
	lea	rax, [rdx+rcx]
	sar	rax, 29
	mov	rdx, rcx
	sar	rdx, 63
	sub	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	imul	rdx, rax, 1000000007
	mov	rax, rcx
	sub	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	sar	DWORD PTR -28[rbp]
.L2:
	cmp	DWORD PTR -28[rbp], 0
	jne	.L4
	mov	rcx, QWORD PTR -8[rbp]
	movabs	rdx, -8543223828751151131
	mov	rax, rcx
	imul	rdx
	lea	rax, [rdx+rcx]
	sar	rax, 29
	mov	rdx, rcx
	sar	rdx, 63
	sub	rax, rdx
	imul	rdx, rax, 1000000007
	mov	rax, rcx
	sub	rax, rdx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	expo, .-expo
	.globl	Generate
	.type	Generate, @function
Generate:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -8[rbp], 0
	jmp	.L7
.L8:
	mov	eax, DWORD PTR -8[rbp]
	cdqe
	mov	esi, 1000000005
	mov	rdi, rax
	call	expo
	mov	edx, DWORD PTR -8[rbp]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, inv[rip]
	mov	DWORD PTR [rcx+rdx], eax
	add	DWORD PTR -8[rbp], 1
.L7:
	cmp	DWORD PTR -8[rbp], 2509
	jle	.L8
	mov	DWORD PTR S[rip], 1
	mov	DWORD PTR -8[rbp], 1
	jmp	.L9
.L12:
	mov	eax, DWORD PTR -8[rbp]
	cdqe
	imul	rax, rax, 10040
	lea	rdx, S[rip]
	mov	DWORD PTR [rax+rdx], 0
	mov	DWORD PTR -4[rbp], 1
	jmp	.L10
.L11:
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, -1[rax]
	mov	eax, DWORD PTR -4[rbp]
	movsx	rcx, eax
	movsx	rax, edx
	imul	rax, rax, 2510
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, S[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movsx	rdx, eax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	mov	rcx, rdx
	imul	rcx, rax
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, -1[rax]
	mov	eax, DWORD PTR -4[rbp]
	sub	eax, 1
	movsx	rsi, eax
	movsx	rax, edx
	imul	rax, rax, 2510
	add	rax, rsi
	lea	rdx, 0[0+rax*4]
	lea	rax, S[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cdqe
	add	rcx, rax
	movabs	rdx, -8543223828751151131
	mov	rax, rcx
	imul	rdx
	lea	rax, [rdx+rcx]
	sar	rax, 29
	mov	rdx, rcx
	sar	rdx, 63
	sub	rax, rdx
	imul	rdx, rax, 1000000007
	mov	rax, rcx
	sub	rax, rdx
	mov	ecx, eax
	mov	eax, DWORD PTR -4[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -8[rbp]
	cdqe
	imul	rax, rax, 2510
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	lea	rax, S[rip]
	mov	DWORD PTR [rdx+rax], ecx
	add	DWORD PTR -4[rbp], 1
.L10:
	mov	eax, DWORD PTR -4[rbp]
	cmp	eax, DWORD PTR -8[rbp]
	jle	.L11
	add	DWORD PTR -8[rbp], 1
.L9:
	cmp	DWORD PTR -8[rbp], 2509
	jle	.L12
	nop
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	Generate, .-Generate
	.globl	faulhaber
	.type	faulhaber, @function
faulhaber:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	DWORD PTR -44[rbp], esi
	mov	rcx, QWORD PTR -40[rbp]
	movabs	rdx, -8543223828751151131
	mov	rax, rcx
	imul	rdx
	lea	rax, [rdx+rcx]
	sar	rax, 29
	mov	rdx, rcx
	sar	rdx, 63
	sub	rax, rdx
	imul	rdx, rax, 1000000007
	mov	rax, rcx
	sub	rax, rdx
	mov	QWORD PTR -40[rbp], rax
	cmp	DWORD PTR -44[rbp], 0
	jne	.L14
	mov	rax, QWORD PTR -40[rbp]
	jmp	.L15
.L14:
	mov	QWORD PTR -16[rbp], 0
	mov	QWORD PTR -8[rbp], 1
	mov	DWORD PTR -20[rbp], 0
	jmp	.L16
.L17:
	mov	rax, QWORD PTR -40[rbp]
	lea	rdx, 1[rax]
	mov	eax, DWORD PTR -20[rbp]
	movsx	rcx, eax
	mov	rax, rdx
	sub	rax, rcx
	imul	rax, QWORD PTR -8[rbp]
	mov	rcx, rax
	movabs	rdx, -8543223828751151131
	mov	rax, rcx
	imul	rdx
	lea	rax, [rdx+rcx]
	sar	rax, 29
	mov	rdx, rcx
	sar	rdx, 63
	sub	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	imul	rdx, rax, 1000000007
	mov	rax, rcx
	sub	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	eax, DWORD PTR -20[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -44[rbp]
	cdqe
	imul	rax, rax, 2510
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	lea	rax, S[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cdqe
	imul	rax, QWORD PTR -8[rbp]
	mov	rcx, rax
	movabs	rdx, -8543223828751151131
	mov	rax, rcx
	imul	rdx
	lea	rax, [rdx+rcx]
	sar	rax, 29
	mov	rdx, rcx
	sar	rdx, 63
	sub	rax, rdx
	imul	rdx, rax, 1000000007
	mov	rax, rcx
	sub	rax, rdx
	mov	edx, DWORD PTR -20[rbp]
	add	edx, 1
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, inv[rip]
	mov	edx, DWORD PTR [rcx+rdx]
	movsx	rdx, edx
	imul	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, [rdx+rax]
	movabs	rdx, -8543223828751151131
	mov	rax, rcx
	imul	rdx
	lea	rax, [rdx+rcx]
	sar	rax, 29
	mov	rdx, rcx
	sar	rdx, 63
	sub	rax, rdx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	imul	rdx, rax, 1000000007
	mov	rax, rcx
	sub	rax, rdx
	mov	QWORD PTR -16[rbp], rax
	add	DWORD PTR -20[rbp], 1
.L16:
	mov	eax, DWORD PTR -20[rbp]
	cmp	eax, DWORD PTR -44[rbp]
	jle	.L17
	mov	rcx, QWORD PTR -16[rbp]
	movabs	rdx, -8543223828751151131
	mov	rax, rcx
	imul	rdx
	lea	rax, [rdx+rcx]
	sar	rax, 29
	mov	rdx, rcx
	sar	rdx, 63
	sub	rax, rdx
	imul	rdx, rax, 1000000007
	mov	rax, rcx
	sub	rax, rdx
.L15:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	faulhaber, .-faulhaber
	.section	.rodata
.LC0:
	.string	"%d\n"
	.text
	.globl	main
	.type	main, @function
main:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	Generate
	mov	esi, 1000
	mov	edi, 1001212
	call	faulhaber
	mov	esi, eax
	lea	rdi, .LC0[rip]
	mov	eax, 0
	call	printf@PLT
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	main, .-main
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"117328055.c"
	.text
	.comm	S,25200400,4
	.comm	inv,10040,4
	.global	__aeabi_ldivmod
	.align	2
	.global	expo
	.syntax unified
	.arm
	.fpu softvfp
	.type	expo, %function
expo:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-20]
	str	r1, [fp, #-16]
	str	r2, [fp, #-24]
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	adr	r3, .L6
	ldmia	r3, {r2-r3}
	bl	__aeabi_ldivmod
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	mov	r2, #1
	mov	r3, #0
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	b	.L2
.L4:
	ldr	r3, [fp, #-24]
	and	r3, r3, #1
	cmp	r3, #0
	beq	.L3
	ldr	r3, [fp, #-8]
	ldr	r2, [fp, #-20]
	mul	r2, r3, r2
	ldr	r3, [fp, #-16]
	ldr	r1, [fp, #-12]
	mul	r3, r1, r3
	add	r3, r2, r3
	ldr	ip, [fp, #-12]
	ldr	r2, [fp, #-20]
	umull	r0, r1, ip, r2
	add	r3, r3, r1
	mov	r1, r3
	adr	r3, .L6
	ldmia	r3, {r2-r3}
	bl	__aeabi_ldivmod
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
.L3:
	ldr	r3, [fp, #-16]
	ldr	r2, [fp, #-20]
	mul	r2, r3, r2
	ldr	r3, [fp, #-16]
	ldr	r1, [fp, #-20]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-20]
	umull	r0, r1, r3, r3
	add	r3, r2, r1
	mov	r1, r3
	adr	r3, .L6
	ldmia	r3, {r2-r3}
	bl	__aeabi_ldivmod
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-24]
	asr	r3, r3, #1
	str	r3, [fp, #-24]
.L2:
	ldr	r3, [fp, #-24]
	cmp	r3, #0
	bne	.L4
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	adr	r3, .L6
	ldmia	r3, {r2-r3}
	bl	__aeabi_ldivmod
	mov	r3, r2
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L7:
	.align	3
.L6:
	.word	1000000007
	.word	0
	.size	expo, .-expo
	.align	2
	.global	Generate
	.syntax unified
	.arm
	.fpu softvfp
	.type	Generate, %function
Generate:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #8
	mov	r3, #0
	str	r3, [fp, #-28]
	b	.L9
.L10:
	ldr	r3, [fp, #-28]
	mov	r0, r3
	asr	r1, r0, #31
	ldr	r2, .L15+8
	bl	expo
	mov	r2, r0
	ldr	r1, .L15+12
	ldr	r3, [fp, #-28]
	str	r2, [r1, r3, lsl #2]
	ldr	r3, [fp, #-28]
	add	r3, r3, #1
	str	r3, [fp, #-28]
.L9:
	ldr	r3, [fp, #-28]
	ldr	r2, .L15+16
	cmp	r3, r2
	ble	.L10
	ldr	r3, .L15+20
	mov	r2, #1
	str	r2, [r3]
	mov	r3, #1
	str	r3, [fp, #-28]
	b	.L11
.L14:
	ldr	r1, .L15+20
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #6
	sub	r3, r3, r2
	lsl	r3, r3, #2
	sub	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r1, r3
	mov	r2, #0
	str	r2, [r3]
	mov	r3, #1
	str	r3, [fp, #-24]
	b	.L12
.L13:
	ldr	r3, [fp, #-28]
	sub	r2, r3, #1
	ldr	r1, .L15+20
	mov	r3, r2
	lsl	r3, r3, #6
	sub	r3, r3, r2
	lsl	r3, r3, #2
	sub	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	ldr	r2, [fp, #-24]
	add	r3, r3, r2
	ldr	r3, [r1, r3, lsl #2]
	mov	r4, r3
	asr	r5, r4, #31
	ldr	r3, [fp, #-24]
	mov	r2, r3
	asr	r3, r2, #31
	mul	r0, r2, r5
	mul	r1, r4, r3
	add	ip, r0, r1
	umull	r0, r1, r4, r2
	add	r3, ip, r1
	mov	r1, r3
	ldr	r3, [fp, #-28]
	sub	r2, r3, #1
	ldr	r3, [fp, #-24]
	sub	ip, r3, #1
	ldr	lr, .L15+20
	mov	r3, r2
	lsl	r3, r3, #6
	sub	r3, r3, r2
	lsl	r3, r3, #2
	sub	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, ip
	ldr	r3, [lr, r3, lsl #2]
	mov	r2, r3
	asr	r3, r2, #31
	adds	r6, r0, r2
	adc	r7, r1, r3
	adr	r3, .L15
	ldmia	r3, {r2-r3}
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_ldivmod
	mov	r0, r2
	ldr	r1, .L15+20
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #6
	sub	r3, r3, r2
	lsl	r3, r3, #2
	sub	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	ldr	r2, [fp, #-24]
	add	r3, r3, r2
	str	r0, [r1, r3, lsl #2]
	ldr	r3, [fp, #-24]
	add	r3, r3, #1
	str	r3, [fp, #-24]
.L12:
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	cmp	r2, r3
	ble	.L13
	ldr	r3, [fp, #-28]
	add	r3, r3, #1
	str	r3, [fp, #-28]
.L11:
	ldr	r3, [fp, #-28]
	ldr	r2, .L15+16
	cmp	r3, r2
	ble	.L14
	nop
	nop
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
.L16:
	.align	3
.L15:
	.word	1000000007
	.word	0
	.word	1000000005
	.word	inv
	.word	2509
	.word	S
	.size	Generate, .-Generate
	.align	2
	.global	faulhaber
	.syntax unified
	.arm
	.fpu softvfp
	.type	faulhaber, %function
faulhaber:
	@ args = 0, pretend = 0, frame = 48
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #48
	str	r0, [fp, #-60]
	str	r1, [fp, #-56]
	str	r2, [fp, #-64]
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	adr	r3, .L22
	ldmia	r3, {r2-r3}
	bl	__aeabi_ldivmod
	str	r2, [fp, #-60]
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-64]
	cmp	r3, #0
	bne	.L18
	ldr	r3, [fp, #-60]
	b	.L19
.L18:
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	mov	r2, #1
	mov	r3, #0
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	mov	r3, #0
	str	r3, [fp, #-48]
	b	.L20
.L21:
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	adds	r6, r2, #1
	adc	r7, r3, #0
	ldr	r3, [fp, #-48]
	mov	r2, r3
	asr	r3, r2, #31
	subs	r4, r6, r2
	sbc	r5, r7, r3
	ldr	r3, [fp, #-36]
	mul	r2, r5, r3
	ldr	r3, [fp, #-32]
	mul	r3, r4, r3
	add	r3, r2, r3
	ldr	r2, [fp, #-36]
	umull	r0, r1, r2, r4
	add	r3, r3, r1
	mov	r1, r3
	adr	r3, .L22
	ldmia	r3, {r2-r3}
	bl	__aeabi_ldivmod
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	ldr	r1, .L22+8
	ldr	r2, [fp, #-64]
	mov	r3, r2
	lsl	r3, r3, #6
	sub	r3, r3, r2
	lsl	r3, r3, #2
	sub	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	ldr	r2, [fp, #-48]
	add	r3, r3, r2
	ldr	r3, [r1, r3, lsl #2]
	mov	r2, r3
	asr	r3, r2, #31
	ldr	r1, [fp, #-36]
	mul	r0, r3, r1
	ldr	r1, [fp, #-32]
	mul	r1, r2, r1
	add	ip, r0, r1
	ldr	lr, [fp, #-36]
	umull	r0, r1, lr, r2
	add	r3, ip, r1
	mov	r1, r3
	adr	r3, .L22
	ldmia	r3, {r2-r3}
	bl	__aeabi_ldivmod
	mov	r8, r2
	mov	r9, r3
	ldr	r3, [fp, #-48]
	add	r3, r3, #1
	ldr	r2, .L22+12
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	asr	r1, r0, #31
	mul	r2, r0, r9
	mul	r3, r8, r1
	add	ip, r2, r3
	umull	r2, r3, r8, r0
	add	r1, ip, r3
	mov	r3, r1
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	adds	ip, r2, r0
	str	ip, [fp, #-76]
	adc	r3, r3, r1
	str	r3, [fp, #-72]
	adr	r3, .L22
	ldmia	r3, {r2-r3}
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	bl	__aeabi_ldivmod
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	ldr	r3, [fp, #-48]
	add	r3, r3, #1
	str	r3, [fp, #-48]
.L20:
	ldr	r2, [fp, #-48]
	ldr	r3, [fp, #-64]
	cmp	r2, r3
	ble	.L21
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	adr	r3, .L22
	ldmia	r3, {r2-r3}
	bl	__aeabi_ldivmod
	mov	r3, r2
.L19:
	mov	r0, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L23:
	.align	3
.L22:
	.word	1000000007
	.word	0
	.word	S
	.word	inv
	.size	faulhaber, .-faulhaber
	.section	.rodata
	.align	2
.LC0:
	.ascii	"%d\012\000"
	.text
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	Generate
	mov	r2, #1000
	adr	r1, .L26
	ldmia	r1, {r0-r1}
	bl	faulhaber
	mov	r3, r0
	mov	r1, r3
	ldr	r0, .L26+8
	bl	printf
	mov	r3, #0
	mov	r0, r3
	pop	{fp, pc}
.L27:
	.align	3
.L26:
	.word	1001212
	.word	0
	.word	.LC0
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
