	.file	"215767818.c"
	.intel_syntax noprefix
	.text
	.globl	i1
	.bss
	.align 4
	.type	i1, @object
	.size	i1, 4
i1:
	.zero	4
	.globl	i2
	.data
	.align 4
	.type	i2, @object
	.size	i2, 4
i2:
	.long	2
	.globl	sc
	.bss
	.type	sc, @object
	.size	sc, 1
sc:
	.zero	1
	.globl	uc
	.type	uc, @object
	.size	uc, 1
uc:
	.zero	1
	.globl	ss
	.align 2
	.type	ss, @object
	.size	ss, 2
ss:
	.zero	2
	.globl	us
	.align 2
	.type	us, @object
	.size	us, 2
us:
	.zero	2
	.globl	si
	.align 4
	.type	si, @object
	.size	si, 4
si:
	.zero	4
	.globl	ui
	.align 4
	.type	ui, @object
	.size	ui, 4
ui:
	.zero	4
	.globl	sl
	.align 8
	.type	sl, @object
	.size	sl, 8
sl:
	.zero	8
	.globl	ul
	.align 8
	.type	ul, @object
	.size	ul, 8
ul:
	.zero	8
	.globl	f1
	.data
	.align 4
	.type	f1, @object
	.size	f1, 4
f1:
	.long	1065353216
	.globl	f2
	.align 4
	.type	f2, @object
	.size	f2, 4
f2:
	.long	1065353216
	.globl	f3
	.align 4
	.type	f3, @object
	.size	f3, 4
f3:
	.long	1065353216
	.globl	d1
	.align 8
	.type	d1, @object
	.size	d1, 8
d1:
	.long	0
	.long	1072693248
	.globl	d2
	.align 8
	.type	d2, @object
	.size	d2, 8
d2:
	.long	0
	.long	1072693248
	.globl	d3
	.align 8
	.type	d3, @object
	.size	d3, 8
d3:
	.long	0
	.long	1072693248
	.globl	D1
	.align 16
	.type	D1, @object
	.size	D1, 16
D1:
	.long	0
	.long	-2147483648
	.long	16383
	.long	0
	.globl	D2
	.align 16
	.type	D2, @object
	.size	D2, 16
D2:
	.long	0
	.long	-2147483648
	.long	16383
	.long	0
	.globl	D3
	.align 16
	.type	D3, @object
	.size	D3, 16
D3:
	.long	0
	.long	-2147483648
	.long	16383
	.long	0
	.text
	.globl	main
	.type	main, @function
main:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	movss	xmm0, DWORD PTR f2[rip]
	movss	xmm1, DWORD PTR .LC0[rip]
	xorps	xmm0, xmm1
	movss	DWORD PTR f1[rip], xmm0
	movss	xmm1, DWORD PTR f2[rip]
	movss	xmm0, DWORD PTR f3[rip]
	addss	xmm0, xmm1
	movss	DWORD PTR f1[rip], xmm0
	movss	xmm0, DWORD PTR f2[rip]
	movss	xmm1, DWORD PTR f3[rip]
	subss	xmm0, xmm1
	movss	DWORD PTR f1[rip], xmm0
	movss	xmm1, DWORD PTR f2[rip]
	movss	xmm0, DWORD PTR f3[rip]
	mulss	xmm0, xmm1
	movss	DWORD PTR f1[rip], xmm0
	movss	xmm0, DWORD PTR f2[rip]
	movss	xmm1, DWORD PTR f3[rip]
	divss	xmm0, xmm1
	movss	DWORD PTR f1[rip], xmm0
	movss	xmm1, DWORD PTR f2[rip]
	movss	xmm0, DWORD PTR f1[rip]
	addss	xmm0, xmm1
	movss	DWORD PTR f1[rip], xmm0
	movss	xmm1, DWORD PTR f2[rip]
	movss	xmm0, DWORD PTR f1[rip]
	subss	xmm0, xmm1
	movss	DWORD PTR f1[rip], xmm0
	movss	xmm1, DWORD PTR f2[rip]
	movss	xmm0, DWORD PTR f1[rip]
	mulss	xmm0, xmm1
	movss	DWORD PTR f1[rip], xmm0
	movss	xmm1, DWORD PTR f2[rip]
	movss	xmm0, DWORD PTR f1[rip]
	divss	xmm0, xmm1
	movss	DWORD PTR f1[rip], xmm0
	movss	xmm0, DWORD PTR f1[rip]
	movss	xmm1, DWORD PTR f2[rip]
	ucomiss	xmm0, xmm1
	setnp	al
	mov	edx, 0
	ucomiss	xmm0, xmm1
	cmovne	eax, edx
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	movss	xmm0, DWORD PTR f1[rip]
	movss	xmm1, DWORD PTR f2[rip]
	ucomiss	xmm0, xmm1
	setp	al
	mov	edx, 1
	ucomiss	xmm0, xmm1
	cmovne	eax, edx
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	movss	xmm0, DWORD PTR f1[rip]
	movss	xmm1, DWORD PTR f2[rip]
	comiss	xmm0, xmm1
	seta	al
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	movss	xmm1, DWORD PTR f1[rip]
	movss	xmm0, DWORD PTR f2[rip]
	comiss	xmm0, xmm1
	seta	al
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	movss	xmm0, DWORD PTR f1[rip]
	movss	xmm1, DWORD PTR f2[rip]
	comiss	xmm0, xmm1
	setnb	al
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	movss	xmm1, DWORD PTR f1[rip]
	movss	xmm0, DWORD PTR f2[rip]
	comiss	xmm0, xmm1
	setnb	al
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	movss	xmm0, DWORD PTR f1[rip]
	movss	xmm1, DWORD PTR f2[rip]
	ucomiss	xmm0, xmm1
	setbe	al
	xor	eax, 1
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	movss	xmm0, DWORD PTR f1[rip]
	movss	xmm1, DWORD PTR f2[rip]
	ucomiss	xmm0, xmm1
	setb	al
	xor	eax, 1
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	movss	xmm1, DWORD PTR f1[rip]
	movss	xmm0, DWORD PTR f2[rip]
	ucomiss	xmm0, xmm1
	setbe	al
	xor	eax, 1
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	movss	xmm1, DWORD PTR f1[rip]
	movss	xmm0, DWORD PTR f2[rip]
	ucomiss	xmm0, xmm1
	setb	al
	xor	eax, 1
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	movss	xmm0, DWORD PTR f1[rip]
	movss	xmm1, DWORD PTR f2[rip]
	ucomiss	xmm0, xmm1
	sete	al
	xor	eax, 1
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	movss	xmm0, DWORD PTR f1[rip]
	movss	xmm1, DWORD PTR f2[rip]
	ucomiss	xmm0, xmm1
	setp	al
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	movss	xmm0, DWORD PTR f1[rip]
	cvttss2si	eax, xmm0
	mov	BYTE PTR sc[rip], al
	movss	xmm0, DWORD PTR f1[rip]
	cvttss2si	eax, xmm0
	mov	BYTE PTR uc[rip], al
	movss	xmm0, DWORD PTR f1[rip]
	cvttss2si	eax, xmm0
	mov	WORD PTR ss[rip], ax
	movss	xmm0, DWORD PTR f1[rip]
	cvttss2si	eax, xmm0
	mov	WORD PTR us[rip], ax
	movss	xmm0, DWORD PTR f1[rip]
	cvttss2si	eax, xmm0
	mov	DWORD PTR si[rip], eax
	movss	xmm0, DWORD PTR f1[rip]
	cvttss2si	rax, xmm0
	mov	DWORD PTR ui[rip], eax
	movss	xmm0, DWORD PTR f1[rip]
	cvttss2si	rax, xmm0
	mov	QWORD PTR sl[rip], rax
	movss	xmm0, DWORD PTR f1[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jnb	.L2
	cvttss2si	rax, xmm0
	jmp	.L3
.L2:
	movss	xmm1, DWORD PTR .LC1[rip]
	subss	xmm0, xmm1
	cvttss2si	rax, xmm0
	movabs	rdx, -9223372036854775808
	xor	rax, rdx
.L3:
	mov	QWORD PTR ul[rip], rax
	movss	xmm0, DWORD PTR f1[rip]
	cvtss2sd	xmm0, xmm0
	movsd	QWORD PTR d1[rip], xmm0
	movss	xmm2, DWORD PTR f1[rip]
	movss	DWORD PTR -32[rbp], xmm2
	fld	DWORD PTR -32[rbp]
	fstp	TBYTE PTR D1[rip]
	movzx	eax, BYTE PTR sc[rip]
	movsx	eax, al
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, eax
	movss	DWORD PTR f1[rip], xmm0
	movzx	eax, BYTE PTR uc[rip]
	movzx	eax, al
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, eax
	movss	DWORD PTR f1[rip], xmm0
	movzx	eax, WORD PTR ss[rip]
	cwde
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, eax
	movss	DWORD PTR f1[rip], xmm0
	movzx	eax, WORD PTR us[rip]
	movzx	eax, ax
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, eax
	movss	DWORD PTR f1[rip], xmm0
	mov	eax, DWORD PTR si[rip]
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, eax
	movss	DWORD PTR f1[rip], xmm0
	mov	eax, DWORD PTR ui[rip]
	mov	eax, eax
	test	rax, rax
	js	.L4
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, rax
	jmp	.L5
.L4:
	mov	rdx, rax
	shr	rdx
	and	eax, 1
	or	rdx, rax
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, rdx
	addss	xmm0, xmm0
.L5:
	movss	DWORD PTR f1[rip], xmm0
	mov	rax, QWORD PTR sl[rip]
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, rax
	movss	DWORD PTR f1[rip], xmm0
	mov	rax, QWORD PTR ul[rip]
	test	rax, rax
	js	.L6
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, rax
	jmp	.L7
.L6:
	mov	rdx, rax
	shr	rdx
	and	eax, 1
	or	rdx, rax
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, rdx
	addss	xmm0, xmm0
.L7:
	movss	DWORD PTR f1[rip], xmm0
	movsd	xmm0, QWORD PTR d1[rip]
	cvtsd2ss	xmm0, xmm0
	movss	DWORD PTR f1[rip], xmm0
	fld	TBYTE PTR D1[rip]
	fstp	DWORD PTR -32[rbp]
	movss	xmm0, DWORD PTR -32[rbp]
	movss	DWORD PTR f1[rip], xmm0
	movsd	xmm0, QWORD PTR d2[rip]
	movq	xmm1, QWORD PTR .LC2[rip]
	xorpd	xmm0, xmm1
	movsd	QWORD PTR d1[rip], xmm0
	movsd	xmm1, QWORD PTR d2[rip]
	movsd	xmm0, QWORD PTR d3[rip]
	addsd	xmm0, xmm1
	movsd	QWORD PTR d1[rip], xmm0
	movsd	xmm0, QWORD PTR d2[rip]
	movsd	xmm1, QWORD PTR d3[rip]
	subsd	xmm0, xmm1
	movsd	QWORD PTR d1[rip], xmm0
	movsd	xmm1, QWORD PTR d2[rip]
	movsd	xmm0, QWORD PTR d3[rip]
	mulsd	xmm0, xmm1
	movsd	QWORD PTR d1[rip], xmm0
	movsd	xmm0, QWORD PTR d2[rip]
	movsd	xmm1, QWORD PTR d3[rip]
	divsd	xmm0, xmm1
	movsd	QWORD PTR d1[rip], xmm0
	movsd	xmm1, QWORD PTR d2[rip]
	movsd	xmm0, QWORD PTR d1[rip]
	addsd	xmm0, xmm1
	movsd	QWORD PTR d1[rip], xmm0
	movsd	xmm1, QWORD PTR d2[rip]
	movsd	xmm0, QWORD PTR d1[rip]
	subsd	xmm0, xmm1
	movsd	QWORD PTR d1[rip], xmm0
	movsd	xmm1, QWORD PTR d2[rip]
	movsd	xmm0, QWORD PTR d1[rip]
	mulsd	xmm0, xmm1
	movsd	QWORD PTR d1[rip], xmm0
	movsd	xmm1, QWORD PTR d2[rip]
	movsd	xmm0, QWORD PTR d1[rip]
	divsd	xmm0, xmm1
	movsd	QWORD PTR d1[rip], xmm0
	movsd	xmm0, QWORD PTR d1[rip]
	movsd	xmm1, QWORD PTR d2[rip]
	ucomisd	xmm0, xmm1
	setnp	al
	mov	edx, 0
	ucomisd	xmm0, xmm1
	cmovne	eax, edx
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	movsd	xmm0, QWORD PTR d1[rip]
	movsd	xmm1, QWORD PTR d2[rip]
	ucomisd	xmm0, xmm1
	setp	al
	mov	edx, 1
	ucomisd	xmm0, xmm1
	cmovne	eax, edx
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	movsd	xmm0, QWORD PTR d1[rip]
	movsd	xmm1, QWORD PTR d2[rip]
	comisd	xmm0, xmm1
	seta	al
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	movsd	xmm1, QWORD PTR d1[rip]
	movsd	xmm0, QWORD PTR d2[rip]
	comisd	xmm0, xmm1
	seta	al
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	movsd	xmm0, QWORD PTR d1[rip]
	movsd	xmm1, QWORD PTR d2[rip]
	comisd	xmm0, xmm1
	setnb	al
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	movsd	xmm1, QWORD PTR d1[rip]
	movsd	xmm0, QWORD PTR d2[rip]
	comisd	xmm0, xmm1
	setnb	al
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	movsd	xmm0, QWORD PTR d1[rip]
	movsd	xmm1, QWORD PTR d2[rip]
	ucomisd	xmm0, xmm1
	setbe	al
	xor	eax, 1
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	movsd	xmm0, QWORD PTR d1[rip]
	movsd	xmm1, QWORD PTR d2[rip]
	ucomisd	xmm0, xmm1
	setb	al
	xor	eax, 1
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	movsd	xmm1, QWORD PTR d1[rip]
	movsd	xmm0, QWORD PTR d2[rip]
	ucomisd	xmm0, xmm1
	setbe	al
	xor	eax, 1
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	movsd	xmm1, QWORD PTR d1[rip]
	movsd	xmm0, QWORD PTR d2[rip]
	ucomisd	xmm0, xmm1
	setb	al
	xor	eax, 1
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	movsd	xmm0, QWORD PTR d1[rip]
	movsd	xmm1, QWORD PTR d2[rip]
	ucomisd	xmm0, xmm1
	sete	al
	xor	eax, 1
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	movsd	xmm0, QWORD PTR d1[rip]
	movsd	xmm1, QWORD PTR d2[rip]
	ucomisd	xmm0, xmm1
	setp	al
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	movsd	xmm0, QWORD PTR d1[rip]
	cvttsd2si	eax, xmm0
	mov	BYTE PTR sc[rip], al
	movsd	xmm0, QWORD PTR d1[rip]
	cvttsd2si	eax, xmm0
	mov	BYTE PTR uc[rip], al
	movsd	xmm0, QWORD PTR d1[rip]
	cvttsd2si	eax, xmm0
	mov	WORD PTR ss[rip], ax
	movsd	xmm0, QWORD PTR d1[rip]
	cvttsd2si	eax, xmm0
	mov	WORD PTR us[rip], ax
	movsd	xmm0, QWORD PTR d1[rip]
	cvttsd2si	eax, xmm0
	mov	DWORD PTR si[rip], eax
	movsd	xmm0, QWORD PTR d1[rip]
	cvttsd2si	rax, xmm0
	mov	DWORD PTR ui[rip], eax
	movsd	xmm0, QWORD PTR d1[rip]
	cvttsd2si	rax, xmm0
	mov	QWORD PTR sl[rip], rax
	movsd	xmm0, QWORD PTR d1[rip]
	comisd	xmm0, QWORD PTR .LC3[rip]
	jnb	.L8
	cvttsd2si	rax, xmm0
	jmp	.L9
.L8:
	movsd	xmm1, QWORD PTR .LC3[rip]
	subsd	xmm0, xmm1
	cvttsd2si	rax, xmm0
	movabs	rdx, -9223372036854775808
	xor	rax, rdx
.L9:
	mov	QWORD PTR ul[rip], rax
	movsd	xmm0, QWORD PTR d1[rip]
	cvtsd2ss	xmm0, xmm0
	movss	DWORD PTR f1[rip], xmm0
	movsd	xmm3, QWORD PTR d1[rip]
	movsd	QWORD PTR -32[rbp], xmm3
	fld	QWORD PTR -32[rbp]
	fstp	TBYTE PTR D1[rip]
	movzx	eax, BYTE PTR sc[rip]
	movsx	eax, al
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, eax
	movsd	QWORD PTR d1[rip], xmm0
	movzx	eax, BYTE PTR uc[rip]
	movzx	eax, al
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, eax
	movsd	QWORD PTR d1[rip], xmm0
	movzx	eax, WORD PTR ss[rip]
	cwde
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, eax
	movsd	QWORD PTR d1[rip], xmm0
	movzx	eax, WORD PTR us[rip]
	movzx	eax, ax
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, eax
	movsd	QWORD PTR d1[rip], xmm0
	mov	eax, DWORD PTR si[rip]
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, eax
	movsd	QWORD PTR d1[rip], xmm0
	mov	eax, DWORD PTR ui[rip]
	mov	eax, eax
	test	rax, rax
	js	.L10
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rax
	jmp	.L11
.L10:
	mov	rdx, rax
	shr	rdx
	and	eax, 1
	or	rdx, rax
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rdx
	addsd	xmm0, xmm0
.L11:
	movsd	QWORD PTR d1[rip], xmm0
	mov	rax, QWORD PTR sl[rip]
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rax
	movsd	QWORD PTR d1[rip], xmm0
	mov	rax, QWORD PTR ul[rip]
	test	rax, rax
	js	.L12
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rax
	jmp	.L13
.L12:
	mov	rdx, rax
	shr	rdx
	and	eax, 1
	or	rdx, rax
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rdx
	addsd	xmm0, xmm0
.L13:
	movsd	QWORD PTR d1[rip], xmm0
	movss	xmm0, DWORD PTR f1[rip]
	cvtss2sd	xmm0, xmm0
	movsd	QWORD PTR d1[rip], xmm0
	fld	TBYTE PTR D1[rip]
	fstp	QWORD PTR -32[rbp]
	movsd	xmm0, QWORD PTR -32[rbp]
	movsd	QWORD PTR d1[rip], xmm0
	fld	TBYTE PTR D2[rip]
	fchs
	fstp	TBYTE PTR -32[rbp]
	mov	rax, QWORD PTR -32[rbp]
	mov	edx, DWORD PTR -24[rbp]
	mov	QWORD PTR D1[rip], rax
	mov	DWORD PTR D1[rip+8], edx
	fld	TBYTE PTR D2[rip]
	fld	TBYTE PTR D3[rip]
	faddp	st(1), st
	fstp	TBYTE PTR D1[rip]
	fld	TBYTE PTR D2[rip]
	fld	TBYTE PTR D3[rip]
	fsubp	st(1), st
	fstp	TBYTE PTR D1[rip]
	fld	TBYTE PTR D2[rip]
	fld	TBYTE PTR D3[rip]
	fmulp	st(1), st
	fstp	TBYTE PTR D1[rip]
	fld	TBYTE PTR D2[rip]
	fld	TBYTE PTR D3[rip]
	fdivp	st(1), st
	fstp	TBYTE PTR D1[rip]
	fld	TBYTE PTR D2[rip]
	fld	TBYTE PTR D1[rip]
	faddp	st(1), st
	fstp	TBYTE PTR D1[rip]
	fld	TBYTE PTR D2[rip]
	fld	TBYTE PTR D1[rip]
	fsubrp	st(1), st
	fstp	TBYTE PTR D1[rip]
	fld	TBYTE PTR D2[rip]
	fld	TBYTE PTR D1[rip]
	fmulp	st(1), st
	fstp	TBYTE PTR D1[rip]
	fld	TBYTE PTR D2[rip]
	fld	TBYTE PTR D1[rip]
	fdivrp	st(1), st
	fstp	TBYTE PTR D1[rip]
	fld	TBYTE PTR D1[rip]
	fld	TBYTE PTR D2[rip]
	fucomi	st, st(1)
	setnp	al
	mov	edx, 0
	fucomip	st, st(1)
	fstp	st(0)
	cmovne	eax, edx
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	fld	TBYTE PTR D1[rip]
	fld	TBYTE PTR D2[rip]
	fucomi	st, st(1)
	setp	al
	mov	edx, 1
	fucomip	st, st(1)
	fstp	st(0)
	cmovne	eax, edx
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	fld	TBYTE PTR D1[rip]
	fld	TBYTE PTR D2[rip]
	fxch	st(1)
	fcomip	st, st(1)
	fstp	st(0)
	seta	al
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	fld	TBYTE PTR D1[rip]
	fld	TBYTE PTR D2[rip]
	fcomip	st, st(1)
	fstp	st(0)
	seta	al
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	fld	TBYTE PTR D1[rip]
	fld	TBYTE PTR D2[rip]
	fxch	st(1)
	fcomip	st, st(1)
	fstp	st(0)
	setnb	al
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	fld	TBYTE PTR D1[rip]
	fld	TBYTE PTR D2[rip]
	fcomip	st, st(1)
	fstp	st(0)
	setnb	al
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	fld	TBYTE PTR D1[rip]
	fld	TBYTE PTR D2[rip]
	fxch	st(1)
	fucomip	st, st(1)
	fstp	st(0)
	setbe	al
	xor	eax, 1
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	fld	TBYTE PTR D1[rip]
	fld	TBYTE PTR D2[rip]
	fxch	st(1)
	fucomip	st, st(1)
	fstp	st(0)
	setb	al
	xor	eax, 1
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	fld	TBYTE PTR D1[rip]
	fld	TBYTE PTR D2[rip]
	fucomip	st, st(1)
	fstp	st(0)
	setbe	al
	xor	eax, 1
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	fld	TBYTE PTR D1[rip]
	fld	TBYTE PTR D2[rip]
	fucomip	st, st(1)
	fstp	st(0)
	setb	al
	xor	eax, 1
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	fld	TBYTE PTR D1[rip]
	fld	TBYTE PTR D2[rip]
	fucomip	st, st(1)
	fstp	st(0)
	sete	al
	xor	eax, 1
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	fld	TBYTE PTR D1[rip]
	fld	TBYTE PTR D2[rip]
	fucomip	st, st(1)
	fstp	st(0)
	setp	al
	movzx	eax, al
	mov	DWORD PTR si[rip], eax
	fld	TBYTE PTR D1[rip]
	fnstcw	WORD PTR -2[rbp]
	movzx	eax, WORD PTR -2[rbp]
	or	ah, 12
	mov	WORD PTR -4[rbp], ax
	fldcw	WORD PTR -4[rbp]
	fistp	WORD PTR -32[rbp]
	fldcw	WORD PTR -2[rbp]
	movzx	eax, BYTE PTR -32[rbp]
	mov	BYTE PTR sc[rip], al
	fld	TBYTE PTR D1[rip]
	fldcw	WORD PTR -4[rbp]
	fistp	WORD PTR -32[rbp]
	fldcw	WORD PTR -2[rbp]
	movzx	eax, BYTE PTR -32[rbp]
	mov	BYTE PTR uc[rip], al
	fld	TBYTE PTR D1[rip]
	fldcw	WORD PTR -4[rbp]
	fistp	WORD PTR -32[rbp]
	fldcw	WORD PTR -2[rbp]
	movzx	eax, WORD PTR -32[rbp]
	mov	WORD PTR ss[rip], ax
	fld	TBYTE PTR D1[rip]
	fldcw	WORD PTR -4[rbp]
	fistp	DWORD PTR -32[rbp]
	fldcw	WORD PTR -2[rbp]
	mov	eax, DWORD PTR -32[rbp]
	mov	WORD PTR us[rip], ax
	fld	TBYTE PTR D1[rip]
	fldcw	WORD PTR -4[rbp]
	fistp	DWORD PTR -32[rbp]
	fldcw	WORD PTR -2[rbp]
	mov	eax, DWORD PTR -32[rbp]
	mov	DWORD PTR si[rip], eax
	fld	TBYTE PTR D1[rip]
	fldcw	WORD PTR -4[rbp]
	fistp	QWORD PTR -32[rbp]
	fldcw	WORD PTR -2[rbp]
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR ui[rip], eax
	fld	TBYTE PTR D1[rip]
	fldcw	WORD PTR -4[rbp]
	fistp	QWORD PTR -32[rbp]
	fldcw	WORD PTR -2[rbp]
	mov	rax, QWORD PTR -32[rbp]
	mov	QWORD PTR sl[rip], rax
	fld	TBYTE PTR D1[rip]
	fld	TBYTE PTR .LC4[rip]
	fxch	st(1)
	fcomi	st, st(1)
	fstp	st(1)
	jnb	.L14
	fldcw	WORD PTR -4[rbp]
	fistp	QWORD PTR -32[rbp]
	fldcw	WORD PTR -2[rbp]
	mov	rdx, QWORD PTR -32[rbp]
	jmp	.L15
.L14:
	fld	TBYTE PTR .LC4[rip]
	fsubp	st(1), st
	fldcw	WORD PTR -4[rbp]
	fistp	QWORD PTR -32[rbp]
	fldcw	WORD PTR -2[rbp]
	mov	rdx, QWORD PTR -32[rbp]
	movabs	rax, -9223372036854775808
	xor	rdx, rax
.L15:
	mov	QWORD PTR ul[rip], rdx
	fld	TBYTE PTR D1[rip]
	fstp	DWORD PTR -32[rbp]
	movss	xmm0, DWORD PTR -32[rbp]
	movss	DWORD PTR f1[rip], xmm0
	fld	TBYTE PTR D1[rip]
	fstp	QWORD PTR -32[rbp]
	movsd	xmm0, QWORD PTR -32[rbp]
	movsd	QWORD PTR d1[rip], xmm0
	movzx	eax, BYTE PTR sc[rip]
	cbw
	mov	WORD PTR -32[rbp], ax
	fild	WORD PTR -32[rbp]
	fstp	TBYTE PTR D1[rip]
	movzx	eax, BYTE PTR uc[rip]
	movzx	eax, al
	mov	WORD PTR -32[rbp], ax
	fild	WORD PTR -32[rbp]
	fstp	TBYTE PTR D1[rip]
	movzx	eax, WORD PTR ss[rip]
	mov	WORD PTR -32[rbp], ax
	fild	WORD PTR -32[rbp]
	fstp	TBYTE PTR D1[rip]
	movzx	eax, WORD PTR us[rip]
	movzx	eax, ax
	mov	DWORD PTR -32[rbp], eax
	fild	DWORD PTR -32[rbp]
	fstp	TBYTE PTR D1[rip]
	mov	eax, DWORD PTR si[rip]
	mov	DWORD PTR -32[rbp], eax
	fild	DWORD PTR -32[rbp]
	fstp	TBYTE PTR D1[rip]
	mov	eax, DWORD PTR ui[rip]
	mov	eax, eax
	mov	QWORD PTR -32[rbp], rax
	fild	QWORD PTR -32[rbp]
	fstp	TBYTE PTR D1[rip]
	mov	rax, QWORD PTR sl[rip]
	mov	QWORD PTR -32[rbp], rax
	fild	QWORD PTR -32[rbp]
	fstp	TBYTE PTR D1[rip]
	mov	rax, QWORD PTR ul[rip]
	mov	QWORD PTR -32[rbp], rax
	fild	QWORD PTR -32[rbp]
	test	rax, rax
	jns	.L16
	fld	TBYTE PTR .LC5[rip]
	faddp	st(1), st
.L16:
	fstp	TBYTE PTR D1[rip]
	movss	xmm4, DWORD PTR f1[rip]
	movss	DWORD PTR -32[rbp], xmm4
	fld	DWORD PTR -32[rbp]
	fstp	TBYTE PTR D1[rip]
	movsd	xmm5, QWORD PTR d1[rip]
	movsd	QWORD PTR -32[rbp], xmm5
	fld	QWORD PTR -32[rbp]
	fstp	TBYTE PTR D1[rip]
	mov	rax, QWORD PTR d2[rip]
	movq	xmm0, rax
	call	acos@PLT
	movq	rax, xmm0
	mov	QWORD PTR d1[rip], rax
	mov	rax, QWORD PTR d2[rip]
	movq	xmm0, rax
	call	asin@PLT
	movq	rax, xmm0
	mov	QWORD PTR d1[rip], rax
	mov	rax, QWORD PTR d2[rip]
	movq	xmm0, rax
	call	atan@PLT
	movq	rax, xmm0
	mov	QWORD PTR d1[rip], rax
	movsd	xmm0, QWORD PTR d3[rip]
	mov	rax, QWORD PTR d2[rip]
	movapd	xmm1, xmm0
	movq	xmm0, rax
	call	atan2@PLT
	movq	rax, xmm0
	mov	QWORD PTR d1[rip], rax
	mov	rax, QWORD PTR d2[rip]
	movq	xmm0, rax
	call	cos@PLT
	movq	rax, xmm0
	mov	QWORD PTR d1[rip], rax
	mov	rax, QWORD PTR d2[rip]
	movq	xmm0, rax
	call	sin@PLT
	movq	rax, xmm0
	mov	QWORD PTR d1[rip], rax
	mov	rax, QWORD PTR d2[rip]
	movq	xmm0, rax
	call	tan@PLT
	movq	rax, xmm0
	mov	QWORD PTR d1[rip], rax
	mov	rax, QWORD PTR d2[rip]
	movq	xmm0, rax
	call	cosh@PLT
	movq	rax, xmm0
	mov	QWORD PTR d1[rip], rax
	mov	rax, QWORD PTR d2[rip]
	movq	xmm0, rax
	call	sinh@PLT
	movq	rax, xmm0
	mov	QWORD PTR d1[rip], rax
	mov	rax, QWORD PTR d2[rip]
	movq	xmm0, rax
	call	tanh@PLT
	movq	rax, xmm0
	mov	QWORD PTR d1[rip], rax
	mov	rax, QWORD PTR d2[rip]
	movq	xmm0, rax
	call	exp@PLT
	movq	rax, xmm0
	mov	QWORD PTR d1[rip], rax
	mov	rax, QWORD PTR d2[rip]
	lea	rdi, i1[rip]
	movq	xmm0, rax
	call	frexp@PLT
	movq	rax, xmm0
	mov	QWORD PTR d1[rip], rax
	mov	edx, DWORD PTR i2[rip]
	mov	rax, QWORD PTR d2[rip]
	mov	edi, edx
	movq	xmm0, rax
	call	ldexp@PLT
	movq	rax, xmm0
	mov	QWORD PTR d1[rip], rax
	mov	rax, QWORD PTR d2[rip]
	movq	xmm0, rax
	call	log@PLT
	movq	rax, xmm0
	mov	QWORD PTR d1[rip], rax
	mov	rax, QWORD PTR d2[rip]
	movq	xmm0, rax
	call	log10@PLT
	movq	rax, xmm0
	mov	QWORD PTR d1[rip], rax
	mov	rax, QWORD PTR d2[rip]
	lea	rdi, d3[rip]
	movq	xmm0, rax
	call	modf@PLT
	movq	rax, xmm0
	mov	QWORD PTR d1[rip], rax
	movsd	xmm0, QWORD PTR d3[rip]
	mov	rax, QWORD PTR d2[rip]
	movapd	xmm1, xmm0
	movq	xmm0, rax
	call	pow@PLT
	movq	rax, xmm0
	mov	QWORD PTR d1[rip], rax
	mov	rax, QWORD PTR d2[rip]
	movq	xmm0, rax
	call	sqrt@PLT
	movq	rax, xmm0
	mov	QWORD PTR d1[rip], rax
	mov	rax, QWORD PTR d2[rip]
	movq	xmm0, rax
	call	ceil@PLT
	movq	rax, xmm0
	mov	QWORD PTR d1[rip], rax
	movsd	xmm0, QWORD PTR d2[rip]
	movq	xmm1, QWORD PTR .LC6[rip]
	andpd	xmm0, xmm1
	movsd	QWORD PTR d1[rip], xmm0
	mov	rax, QWORD PTR d2[rip]
	movq	xmm0, rax
	call	floor@PLT
	movq	rax, xmm0
	mov	QWORD PTR d1[rip], rax
	movsd	xmm0, QWORD PTR d3[rip]
	mov	rax, QWORD PTR d2[rip]
	movapd	xmm1, xmm0
	movq	xmm0, rax
	call	fmod@PLT
	movq	rax, xmm0
	mov	QWORD PTR d1[rip], rax
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	main, .-main
	.section	.rodata
	.align 16
.LC0:
	.long	-2147483648
	.long	0
	.long	0
	.long	0
	.align 4
.LC1:
	.long	1593835520
	.align 16
.LC2:
	.long	0
	.long	-2147483648
	.long	0
	.long	0
	.align 8
.LC3:
	.long	0
	.long	1138753536
	.align 16
.LC4:
	.long	0
	.long	-2147483648
	.long	16446
	.long	0
	.align 16
.LC5:
	.long	0
	.long	-2147483648
	.long	16447
	.long	0
	.align 16
.LC6:
	.long	-1
	.long	2147483647
	.long	0
	.long	0
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"215767818.c"
	.text
	.comm	i1,4,4
	.global	i2
	.data
	.align	2
	.type	i2, %object
	.size	i2, 4
i2:
	.word	2
	.comm	sc,1,1
	.comm	uc,1,1
	.comm	ss,2,2
	.comm	us,2,2
	.comm	si,4,4
	.comm	ui,4,4
	.comm	sl,4,4
	.comm	ul,4,4
	.global	f1
	.align	2
	.type	f1, %object
	.size	f1, 4
f1:
	.word	1065353216
	.global	f2
	.align	2
	.type	f2, %object
	.size	f2, 4
f2:
	.word	1065353216
	.global	f3
	.align	2
	.type	f3, %object
	.size	f3, 4
f3:
	.word	1065353216
	.global	d1
	.align	3
	.type	d1, %object
	.size	d1, 8
d1:
	.word	0
	.word	1072693248
	.global	d2
	.align	3
	.type	d2, %object
	.size	d2, 8
d2:
	.word	0
	.word	1072693248
	.global	d3
	.align	3
	.type	d3, %object
	.size	d3, 8
d3:
	.word	0
	.word	1072693248
	.global	D1
	.align	3
	.type	D1, %object
	.size	D1, 8
D1:
	.word	0
	.word	1072693248
	.global	D2
	.align	3
	.type	D2, %object
	.size	D2, 8
D2:
	.word	0
	.word	1072693248
	.global	D3
	.align	3
	.type	D3, %object
	.size	D3, 8
D3:
	.word	0
	.word	1072693248
	.global	__aeabi_fadd
	.global	__aeabi_fsub
	.global	__aeabi_fmul
	.global	__aeabi_fdiv
	.global	__aeabi_fcmpeq
	.global	__aeabi_fcmpgt
	.global	__aeabi_fcmplt
	.global	__aeabi_fcmpge
	.global	__aeabi_fcmple
	.global	__aeabi_fcmpun
	.global	__aeabi_f2iz
	.global	__aeabi_f2uiz
	.global	__aeabi_f2d
	.global	__aeabi_i2f
	.global	__aeabi_ui2f
	.global	__aeabi_d2f
	.global	__aeabi_dadd
	.global	__aeabi_dsub
	.global	__aeabi_dmul
	.global	__aeabi_ddiv
	.global	__aeabi_dcmpeq
	.global	__aeabi_dcmpgt
	.global	__aeabi_dcmplt
	.global	__aeabi_dcmpge
	.global	__aeabi_dcmple
	.global	__aeabi_dcmpun
	.global	__aeabi_d2iz
	.global	__aeabi_d2uiz
	.global	__aeabi_i2d
	.global	__aeabi_ui2d
	.text
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	add	fp, sp, #32
	sub	sp, sp, #12
	ldr	r3, .L39
	ldr	r3, [r3]	@ float
	eor	r3, r3, #-2147483648
	ldr	r2, .L39+4
	str	r3, [r2]	@ float
	ldr	r3, .L39
	ldr	r3, [r3]	@ float
	ldr	r2, .L39+8
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fadd
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L39+4
	str	r2, [r3]	@ float
	ldr	r3, .L39
	ldr	r3, [r3]	@ float
	ldr	r2, .L39+8
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fsub
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L39+4
	str	r2, [r3]	@ float
	ldr	r3, .L39
	ldr	r3, [r3]	@ float
	ldr	r2, .L39+8
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L39+4
	str	r2, [r3]	@ float
	ldr	r3, .L39
	ldr	r3, [r3]	@ float
	ldr	r2, .L39+8
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fdiv
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L39+4
	str	r2, [r3]	@ float
	ldr	r3, .L39
	ldr	r3, [r3]	@ float
	ldr	r2, .L39+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fadd
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L39+4
	str	r2, [r3]	@ float
	ldr	r3, .L39
	ldr	r2, [r3]	@ float
	ldr	r3, .L39+4
	ldr	r3, [r3]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fsub
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L39+4
	str	r2, [r3]	@ float
	ldr	r3, .L39
	ldr	r3, [r3]	@ float
	ldr	r2, .L39+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L39+4
	str	r2, [r3]	@ float
	ldr	r3, .L39
	ldr	r2, [r3]	@ float
	ldr	r3, .L39+4
	ldr	r3, [r3]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fdiv
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L39+4
	str	r2, [r3]	@ float
	ldr	r3, .L39+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L39
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r6, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L2
	mov	r3, #0
	mov	r6, r3
.L2:
	and	r3, r6, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L39
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r6, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L3
	mov	r3, #0
	mov	r6, r3
.L3:
	and	r3, r6, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L39
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r6, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpgt
	mov	r3, r0
	cmp	r3, #0
	bne	.L4
	mov	r3, #0
	mov	r6, r3
.L4:
	and	r3, r6, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L39
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r6, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmplt
	mov	r3, r0
	cmp	r3, #0
	bne	.L5
	mov	r3, #0
	mov	r6, r3
.L5:
	and	r3, r6, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L39
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r6, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L6
	mov	r3, #0
	mov	r6, r3
.L6:
	and	r3, r6, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L39
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r6, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L7
	mov	r3, #0
	mov	r6, r3
.L7:
	and	r3, r6, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+4
	ldr	r6, [r3]	@ float
	ldr	r3, .L39
	ldr	r7, [r3]	@ float
	mov	r3, #1
	mov	r8, r3
	mov	r1, r7
	mov	r0, r6
	bl	__aeabi_fcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L8
	mov	r1, r7
	mov	r0, r6
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L8
	mov	r3, #0
	mov	r8, r3
.L8:
	and	r3, r8, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+4
	ldr	r6, [r3]	@ float
	ldr	r3, .L39
	ldr	r7, [r3]	@ float
	mov	r3, #1
	mov	r8, r3
	mov	r1, r7
	mov	r0, r6
	bl	__aeabi_fcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L9
	mov	r1, r7
	mov	r0, r6
	bl	__aeabi_fcmplt
	mov	r3, r0
	cmp	r3, #0
	bne	.L9
	mov	r3, #0
	mov	r8, r3
.L9:
	and	r3, r8, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+4
	ldr	r6, [r3]	@ float
	ldr	r3, .L39
	ldr	r7, [r3]	@ float
	mov	r3, #1
	mov	r8, r3
	mov	r1, r7
	mov	r0, r6
	bl	__aeabi_fcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L10
	mov	r1, r7
	mov	r0, r6
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L10
	mov	r3, #0
	mov	r8, r3
.L10:
	and	r3, r8, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+4
	ldr	r6, [r3]	@ float
	ldr	r3, .L39
	ldr	r7, [r3]	@ float
	mov	r3, #1
	mov	r8, r3
	mov	r1, r7
	mov	r0, r6
	bl	__aeabi_fcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L11
	mov	r1, r7
	mov	r0, r6
	bl	__aeabi_fcmpgt
	mov	r3, r0
	cmp	r3, #0
	bne	.L11
	mov	r3, #0
	mov	r8, r3
.L11:
	and	r3, r8, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+4
	ldr	r6, [r3]	@ float
	ldr	r3, .L39
	ldr	r7, [r3]	@ float
	mov	r3, #1
	mov	r8, r3
	mov	r1, r7
	mov	r0, r6
	bl	__aeabi_fcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L12
	mov	r1, r7
	mov	r0, r6
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L12
	mov	r3, #0
	mov	r8, r3
.L12:
	and	r3, r8, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L39
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r6, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L13
	mov	r3, #0
	mov	r6, r3
.L13:
	and	r3, r6, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2iz
	mov	r3, r0
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, .L39+20
	strb	r2, [r3]
	ldr	r3, .L39+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2uiz
	mov	r3, r0
	and	r2, r3, #255
	ldr	r3, .L39+24
	strb	r2, [r3]
	ldr	r3, .L39+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2iz
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L39+28
	strh	r3, [r2]	@ movhi
	ldr	r3, .L39+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2uiz
	mov	r3, r0
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L39+32
	strh	r3, [r2]	@ movhi
	ldr	r3, .L39+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2iz
	mov	r3, r0
	ldr	r2, .L39+36
	str	r3, [r2]
	ldr	r3, .L39+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2uiz
	mov	r3, r0
	ldr	r2, .L39+40
	str	r3, [r2]
	ldr	r3, .L39+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2iz
	mov	r3, r0
	ldr	r2, .L39+44
	str	r3, [r2]
	ldr	r3, .L39+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2uiz
	mov	r3, r0
	ldr	r2, .L39+48
	str	r3, [r2]
	ldr	r3, .L39+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+56
	stm	r1, {r2-r3}
	ldr	r3, .L39+20
	ldrb	r3, [r3]
	lsl	r3, r3, #24
	asr	r3, r3, #24
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r3, r0
	ldr	r2, .L39+4
	str	r3, [r2]	@ float
	ldr	r3, .L39+24
	ldrb	r3, [r3]
	and	r3, r3, #255
	mov	r0, r3
	bl	__aeabi_ui2f
	mov	r3, r0
	ldr	r2, .L39+4
	str	r3, [r2]	@ float
	ldr	r3, .L39+28
	ldrh	r3, [r3]	@ movhi
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r3, r0
	ldr	r2, .L39+4
	str	r3, [r2]	@ float
	ldr	r3, .L39+32
	ldrh	r3, [r3]	@ movhi
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	bl	__aeabi_ui2f
	mov	r3, r0
	ldr	r2, .L39+4
	str	r3, [r2]	@ float
	ldr	r3, .L39+36
	ldr	r3, [r3]
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r3, r0
	ldr	r2, .L39+4
	str	r3, [r2]	@ float
	ldr	r3, .L39+40
	ldr	r3, [r3]
	mov	r0, r3
	bl	__aeabi_ui2f
	mov	r3, r0
	ldr	r2, .L39+4
	str	r3, [r2]	@ float
	ldr	r3, .L39+44
	ldr	r3, [r3]
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r3, r0
	ldr	r2, .L39+4
	str	r3, [r2]	@ float
	ldr	r3, .L39+48
	ldr	r3, [r3]
	mov	r0, r3
	bl	__aeabi_ui2f
	mov	r3, r0
	ldr	r2, .L39+4
	str	r3, [r2]	@ float
	ldr	r3, .L39+76
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2f
	mov	r3, r0
	ldr	r2, .L39+4
	str	r3, [r2]	@ float
	ldr	r3, .L39+56
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2f
	mov	r3, r0
	ldr	r2, .L39+4
	str	r3, [r2]	@ float
	ldr	r3, .L39+68
	ldmia	r3, {r2-r3}
	mov	r4, r2
	eor	r5, r3, #-2147483648
	ldr	r3, .L39+76
	stm	r3, {r4-r5}
	ldr	r3, .L39+68
	ldmia	r3, {r0-r1}
	ldr	r3, .L39+72
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+68
	ldmia	r3, {r0-r1}
	ldr	r3, .L39+72
	ldmia	r3, {r2-r3}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+68
	ldmia	r3, {r0-r1}
	ldr	r3, .L39+72
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+68
	ldmia	r3, {r0-r1}
	ldr	r3, .L39+72
	ldmia	r3, {r2-r3}
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+68
	ldmia	r3, {r0-r1}
	ldr	r3, .L39+76
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+68
	ldmia	r3, {r2-r3}
	ldr	r1, .L39+76
	ldmia	r1, {r0-r1}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+68
	ldmia	r3, {r0-r1}
	ldr	r3, .L39+76
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+68
	ldmia	r3, {r2-r3}
	ldr	r1, .L39+76
	ldmia	r1, {r0-r1}
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+76
	ldmia	r3, {r0-r1}
	ldr	r3, .L39+68
	ldmia	r3, {r2-r3}
	mov	ip, #1
	mov	r4, ip
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L14
	mov	r3, #0
	mov	r4, r3
.L14:
	and	r3, r4, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+76
	ldmia	r3, {r0-r1}
	ldr	r3, .L39+68
	ldmia	r3, {r2-r3}
	mov	ip, #1
	mov	r4, ip
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L15
	mov	r3, #0
	mov	r4, r3
.L15:
	and	r3, r4, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+76
	ldmia	r3, {r0-r1}
	ldr	r3, .L39+68
	ldmia	r3, {r2-r3}
	mov	ip, #1
	mov	r4, ip
	bl	__aeabi_dcmpgt
	mov	r3, r0
	cmp	r3, #0
	bne	.L16
	mov	r3, #0
	mov	r4, r3
.L16:
	and	r3, r4, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+76
	ldmia	r3, {r0-r1}
	ldr	r3, .L39+68
	ldmia	r3, {r2-r3}
	mov	ip, #1
	mov	r4, ip
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	bne	.L17
	mov	r3, #0
	mov	r4, r3
.L17:
	and	r3, r4, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+76
	ldmia	r3, {r0-r1}
	ldr	r3, .L39+68
	ldmia	r3, {r2-r3}
	mov	ip, #1
	mov	r4, ip
	bl	__aeabi_dcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L18
	mov	r3, #0
	mov	r4, r3
.L18:
	and	r3, r4, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+76
	ldmia	r3, {r0-r1}
	ldr	r3, .L39+68
	ldmia	r3, {r2-r3}
	mov	ip, #1
	mov	r4, ip
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L19
	mov	r3, #0
	mov	r4, r3
.L19:
	and	r3, r4, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+76
	ldmia	r3, {r4-r5}
	ldr	r3, .L39+68
	ldmia	r3, {r6-r7}
	mov	r3, #1
	mov	r8, r3
	mov	r2, r6
	mov	r3, r7
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L20
	mov	r2, r6
	mov	r3, r7
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L20
	mov	r3, #0
	mov	r8, r3
.L20:
	and	r3, r8, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+76
	ldmia	r3, {r4-r5}
	ldr	r3, .L39+68
	ldmia	r3, {r6-r7}
	mov	r3, #1
	mov	r8, r3
	mov	r2, r6
	mov	r3, r7
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L21
	mov	r2, r6
	mov	r3, r7
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	bne	.L21
	mov	r3, #0
	mov	r8, r3
.L21:
	and	r3, r8, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+76
	ldmia	r3, {r4-r5}
	ldr	r3, .L39+68
	ldmia	r3, {r6-r7}
	mov	r3, #1
	mov	r8, r3
	mov	r2, r6
	mov	r3, r7
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L22
	mov	r2, r6
	mov	r3, r7
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L22
	mov	r3, #0
	mov	r8, r3
.L22:
	and	r3, r8, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+76
	ldmia	r3, {r4-r5}
	ldr	r3, .L39+68
	ldmia	r3, {r6-r7}
	mov	r3, #1
	mov	r8, r3
	mov	r2, r6
	mov	r3, r7
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L23
	mov	r2, r6
	mov	r3, r7
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmpgt
	mov	r3, r0
	cmp	r3, #0
	bne	.L23
	mov	r3, #0
	mov	r8, r3
.L23:
	and	r3, r8, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+76
	ldmia	r3, {r4-r5}
	ldr	r3, .L39+68
	ldmia	r3, {r6-r7}
	mov	r3, #1
	mov	r8, r3
	mov	r2, r6
	mov	r3, r7
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L24
	mov	r2, r6
	mov	r3, r7
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L24
	mov	r3, #0
	mov	r8, r3
.L24:
	and	r3, r8, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+76
	ldmia	r3, {r0-r1}
	ldr	r3, .L39+68
	ldmia	r3, {r2-r3}
	mov	ip, #1
	mov	r4, ip
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L25
	mov	r3, #0
	mov	r4, r3
.L25:
	and	r3, r4, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+76
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2iz
	mov	r3, r0
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, .L39+20
	strb	r2, [r3]
	ldr	r3, .L39+76
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2uiz
	mov	r3, r0
	and	r2, r3, #255
	ldr	r3, .L39+24
	strb	r2, [r3]
	ldr	r3, .L39+76
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2iz
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L39+28
	strh	r3, [r2]	@ movhi
	ldr	r3, .L39+76
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2uiz
	mov	r3, r0
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L39+32
	strh	r3, [r2]	@ movhi
	ldr	r3, .L39+76
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2iz
	mov	r3, r0
	ldr	r2, .L39+36
	str	r3, [r2]
	ldr	r3, .L39+76
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2uiz
	mov	r3, r0
	ldr	r2, .L39+40
	str	r3, [r2]
	ldr	r3, .L39+76
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2iz
	mov	r3, r0
	ldr	r2, .L39+44
	str	r3, [r2]
	ldr	r3, .L39+76
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2uiz
	mov	r3, r0
	ldr	r2, .L39+48
	str	r3, [r2]
	ldr	r3, .L39+76
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2f
	mov	r3, r0
	ldr	r2, .L39+4
	str	r3, [r2]	@ float
	ldr	r3, .L39+76
	ldmia	r3, {r2-r3}
	ldr	r1, .L39+56
	stm	r1, {r2-r3}
	ldr	r3, .L39+20
	ldrb	r3, [r3]
	lsl	r3, r3, #24
	asr	r3, r3, #24
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+24
	ldrb	r3, [r3]
	and	r3, r3, #255
	mov	r0, r3
	bl	__aeabi_ui2d
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+28
	ldrh	r3, [r3]	@ movhi
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, r0
	b	.L40
.L41:
	.align	2
.L39:
	.word	f2
	.word	f1
	.word	f3
	.word	D3
	.word	D2
	.word	sc
	.word	uc
	.word	ss
	.word	us
	.word	si
	.word	ui
	.word	sl
	.word	ul
	.word	f1
	.word	D1
	.word	i1
	.word	i2
	.word	d2
	.word	d3
	.word	d1
.L40:
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+32
	ldrh	r3, [r3]	@ movhi
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	bl	__aeabi_ui2d
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+36
	ldr	r3, [r3]
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+40
	ldr	r3, [r3]
	mov	r0, r3
	bl	__aeabi_ui2d
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+44
	ldr	r3, [r3]
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+48
	ldr	r3, [r3]
	mov	r0, r3
	bl	__aeabi_ui2d
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+52
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+56
	ldmia	r3, {r2-r3}
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+16
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-44]
	eor	r3, r3, #-2147483648
	str	r3, [fp, #-40]
	ldr	r3, .L39+56
	sub	r2, fp, #44
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r3, .L39+16
	ldmia	r3, {r0-r1}
	ldr	r3, .L39+12
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+56
	stm	r1, {r2-r3}
	ldr	r3, .L39+16
	ldmia	r3, {r0-r1}
	ldr	r3, .L39+12
	ldmia	r3, {r2-r3}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+56
	stm	r1, {r2-r3}
	ldr	r3, .L39+16
	ldmia	r3, {r0-r1}
	ldr	r3, .L39+12
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+56
	stm	r1, {r2-r3}
	ldr	r3, .L39+16
	ldmia	r3, {r0-r1}
	ldr	r3, .L39+12
	ldmia	r3, {r2-r3}
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+56
	stm	r1, {r2-r3}
	ldr	r3, .L39+16
	ldmia	r3, {r0-r1}
	ldr	r3, .L39+56
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+56
	stm	r1, {r2-r3}
	ldr	r3, .L39+16
	ldmia	r3, {r2-r3}
	ldr	r1, .L39+56
	ldmia	r1, {r0-r1}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+56
	stm	r1, {r2-r3}
	ldr	r3, .L39+16
	ldmia	r3, {r0-r1}
	ldr	r3, .L39+56
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+56
	stm	r1, {r2-r3}
	ldr	r3, .L39+16
	ldmia	r3, {r2-r3}
	ldr	r1, .L39+56
	ldmia	r1, {r0-r1}
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+56
	stm	r1, {r2-r3}
	ldr	r3, .L39+56
	ldmia	r3, {r0-r1}
	ldr	r3, .L39+16
	ldmia	r3, {r2-r3}
	mov	ip, #1
	mov	r4, ip
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L26
	mov	r3, #0
	mov	r4, r3
.L26:
	and	r3, r4, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+56
	ldmia	r3, {r0-r1}
	ldr	r3, .L39+16
	ldmia	r3, {r2-r3}
	mov	ip, #1
	mov	r4, ip
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L27
	mov	r3, #0
	mov	r4, r3
.L27:
	and	r3, r4, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+56
	ldmia	r3, {r0-r1}
	ldr	r3, .L39+16
	ldmia	r3, {r2-r3}
	mov	ip, #1
	mov	r4, ip
	bl	__aeabi_dcmpgt
	mov	r3, r0
	cmp	r3, #0
	bne	.L28
	mov	r3, #0
	mov	r4, r3
.L28:
	and	r3, r4, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+56
	ldmia	r3, {r0-r1}
	ldr	r3, .L39+16
	ldmia	r3, {r2-r3}
	mov	ip, #1
	mov	r4, ip
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	bne	.L29
	mov	r3, #0
	mov	r4, r3
.L29:
	and	r3, r4, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+56
	ldmia	r3, {r0-r1}
	ldr	r3, .L39+16
	ldmia	r3, {r2-r3}
	mov	ip, #1
	mov	r4, ip
	bl	__aeabi_dcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L30
	mov	r3, #0
	mov	r4, r3
.L30:
	and	r3, r4, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+56
	ldmia	r3, {r0-r1}
	ldr	r3, .L39+16
	ldmia	r3, {r2-r3}
	mov	ip, #1
	mov	r4, ip
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L31
	mov	r3, #0
	mov	r4, r3
.L31:
	and	r3, r4, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+56
	ldmia	r3, {r4-r5}
	ldr	r3, .L39+16
	ldmia	r3, {r6-r7}
	mov	r3, #1
	mov	r8, r3
	mov	r2, r6
	mov	r3, r7
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L32
	mov	r2, r6
	mov	r3, r7
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L32
	mov	r3, #0
	mov	r8, r3
.L32:
	and	r3, r8, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+56
	ldmia	r3, {r4-r5}
	ldr	r3, .L39+16
	ldmia	r3, {r6-r7}
	mov	r3, #1
	mov	r8, r3
	mov	r2, r6
	mov	r3, r7
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L33
	mov	r2, r6
	mov	r3, r7
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	bne	.L33
	mov	r3, #0
	mov	r8, r3
.L33:
	and	r3, r8, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+56
	ldmia	r3, {r4-r5}
	ldr	r3, .L39+16
	ldmia	r3, {r6-r7}
	mov	r3, #1
	mov	r8, r3
	mov	r2, r6
	mov	r3, r7
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L34
	mov	r2, r6
	mov	r3, r7
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L34
	mov	r3, #0
	mov	r8, r3
.L34:
	and	r3, r8, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+56
	ldmia	r3, {r4-r5}
	ldr	r3, .L39+16
	ldmia	r3, {r6-r7}
	mov	r3, #1
	mov	r8, r3
	mov	r2, r6
	mov	r3, r7
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L35
	mov	r2, r6
	mov	r3, r7
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmpgt
	mov	r3, r0
	cmp	r3, #0
	bne	.L35
	mov	r3, #0
	mov	r8, r3
.L35:
	and	r3, r8, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+56
	ldmia	r3, {r4-r5}
	ldr	r3, .L39+16
	ldmia	r3, {r6-r7}
	mov	r3, #1
	mov	r8, r3
	mov	r2, r6
	mov	r3, r7
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L36
	mov	r2, r6
	mov	r3, r7
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L36
	mov	r3, #0
	mov	r8, r3
.L36:
	and	r3, r8, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+56
	ldmia	r3, {r0-r1}
	ldr	r3, .L39+16
	ldmia	r3, {r2-r3}
	mov	ip, #1
	mov	r4, ip
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L37
	mov	r3, #0
	mov	r4, r3
.L37:
	and	r3, r4, #255
	mov	r2, r3
	ldr	r3, .L39+36
	str	r2, [r3]
	ldr	r3, .L39+56
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2iz
	mov	r3, r0
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, .L39+20
	strb	r2, [r3]
	ldr	r3, .L39+56
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2uiz
	mov	r3, r0
	and	r2, r3, #255
	ldr	r3, .L39+24
	strb	r2, [r3]
	ldr	r3, .L39+56
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2iz
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L39+28
	strh	r3, [r2]	@ movhi
	ldr	r3, .L39+56
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2uiz
	mov	r3, r0
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L39+32
	strh	r3, [r2]	@ movhi
	ldr	r3, .L39+56
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2iz
	mov	r3, r0
	ldr	r2, .L39+36
	str	r3, [r2]
	ldr	r3, .L39+56
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2uiz
	mov	r3, r0
	ldr	r2, .L39+40
	str	r3, [r2]
	ldr	r3, .L39+56
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2iz
	mov	r3, r0
	ldr	r2, .L39+44
	str	r3, [r2]
	ldr	r3, .L39+56
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2uiz
	mov	r3, r0
	ldr	r2, .L39+48
	str	r3, [r2]
	ldr	r3, .L39+56
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2f
	mov	r3, r0
	ldr	r2, .L39+52
	str	r3, [r2]	@ float
	ldr	r3, .L39+56
	ldmia	r3, {r2-r3}
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+20
	ldrb	r3, [r3]
	lsl	r3, r3, #24
	asr	r3, r3, #24
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+56
	stm	r1, {r2-r3}
	ldr	r3, .L39+24
	ldrb	r3, [r3]
	and	r3, r3, #255
	mov	r0, r3
	bl	__aeabi_ui2d
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+56
	stm	r1, {r2-r3}
	ldr	r3, .L39+28
	ldrh	r3, [r3]	@ movhi
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+56
	stm	r1, {r2-r3}
	ldr	r3, .L39+32
	ldrh	r3, [r3]	@ movhi
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	bl	__aeabi_ui2d
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+56
	stm	r1, {r2-r3}
	ldr	r3, .L39+36
	ldr	r3, [r3]
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+56
	stm	r1, {r2-r3}
	ldr	r3, .L39+40
	ldr	r3, [r3]
	mov	r0, r3
	bl	__aeabi_ui2d
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+56
	stm	r1, {r2-r3}
	ldr	r3, .L39+44
	ldr	r3, [r3]
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+56
	stm	r1, {r2-r3}
	ldr	r3, .L39+48
	ldr	r3, [r3]
	mov	r0, r3
	bl	__aeabi_ui2d
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+56
	stm	r1, {r2-r3}
	ldr	r3, .L39+52
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+56
	stm	r1, {r2-r3}
	ldr	r3, .L39+76
	ldmia	r3, {r2-r3}
	ldr	r1, .L39+56
	stm	r1, {r2-r3}
	ldr	r3, .L39+68
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	acos
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+68
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	asin
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+68
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	atan
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+68
	ldmia	r3, {r0-r1}
	ldr	r3, .L39+72
	ldmia	r3, {r2-r3}
	bl	atan2
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+68
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	cos
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+68
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	sin
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+68
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	tan
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+68
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	cosh
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+68
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	sinh
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+68
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	tanh
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+68
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	exp
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+68
	ldmia	r3, {r0-r1}
	ldr	r2, .L39+60
	bl	frexp
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+68
	ldmia	r3, {r0-r1}
	ldr	r3, .L39+64
	ldr	r3, [r3]
	mov	r2, r3
	bl	ldexp
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+68
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	log
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+68
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	log10
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+68
	ldmia	r3, {r0-r1}
	ldr	r2, .L39+72
	bl	modf
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+68
	ldmia	r3, {r0-r1}
	ldr	r3, .L39+72
	ldmia	r3, {r2-r3}
	bl	pow
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+68
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	sqrt
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+68
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	ceil
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+68
	ldmia	r3, {r2-r3}
	mov	r9, r2
	bic	r10, r3, #-2147483648
	ldr	r3, .L39+76
	stm	r3, {r9-r10}
	ldr	r3, .L39+68
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	floor
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	ldr	r3, .L39+68
	ldmia	r3, {r0-r1}
	ldr	r3, .L39+72
	ldmia	r3, {r2-r3}
	bl	fmod
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L39+76
	stm	r1, {r2-r3}
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #32
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
