	.file	"92327887.c"
	.intel_syntax noprefix
	.text
	.globl	zeq
	.type	zeq, @function
zeq:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, 1
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	zeq, .-zeq
	.globl	zne
	.type	zne, @function
zne:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	zne, .-zne
	.globl	zlt
	.type	zlt, @function
zlt:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	zlt, .-zlt
	.globl	zgt
	.type	zgt, @function
zgt:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	zgt, .-zgt
	.globl	zge
	.type	zge, @function
zge:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, 1
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	zge, .-zge
	.globl	zle
	.type	zle, @function
zle:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, 1
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	zle, .-zle
	.globl	upeq
	.type	upeq, @function
upeq:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -4[rbp]
	lea	edx, 0[0+rax*4]
	mov	eax, DWORD PTR -8[rbp]
	sal	eax, 2
	cmp	edx, eax
	sete	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	upeq, .-upeq
	.globl	upne
	.type	upne, @function
upne:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -4[rbp]
	lea	edx, 0[0+rax*4]
	mov	eax, DWORD PTR -8[rbp]
	sal	eax, 2
	cmp	edx, eax
	setne	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	upne, .-upne
	.globl	uplt
	.type	uplt, @function
uplt:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -4[rbp]
	lea	edx, 0[0+rax*4]
	mov	eax, DWORD PTR -8[rbp]
	sal	eax, 2
	cmp	edx, eax
	setb	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	uplt, .-uplt
	.globl	upgt
	.type	upgt, @function
upgt:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -4[rbp]
	lea	edx, 0[0+rax*4]
	mov	eax, DWORD PTR -8[rbp]
	sal	eax, 2
	cmp	edx, eax
	seta	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	upgt, .-upgt
	.globl	upge
	.type	upge, @function
upge:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -4[rbp]
	lea	edx, 0[0+rax*4]
	mov	eax, DWORD PTR -8[rbp]
	sal	eax, 2
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	upge, .-upge
	.globl	uple
	.type	uple, @function
uple:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -4[rbp]
	lea	edx, 0[0+rax*4]
	mov	eax, DWORD PTR -8[rbp]
	sal	eax, 2
	cmp	edx, eax
	setbe	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	uple, .-uple
	.globl	uneq
	.type	uneq, @function
uneq:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	edx, DWORD PTR -4[rbp]
	mov	eax, 0
	sub	eax, edx
	add	eax, eax
	mov	ecx, eax
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, 0
	sub	eax, edx
	add	eax, eax
	cmp	ecx, eax
	sete	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	uneq, .-uneq
	.globl	unne
	.type	unne, @function
unne:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	edx, DWORD PTR -4[rbp]
	mov	eax, 0
	sub	eax, edx
	add	eax, eax
	mov	ecx, eax
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, 0
	sub	eax, edx
	add	eax, eax
	cmp	ecx, eax
	setne	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	unne, .-unne
	.globl	unlt
	.type	unlt, @function
unlt:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	edx, DWORD PTR -4[rbp]
	mov	eax, 0
	sub	eax, edx
	add	eax, eax
	mov	ecx, eax
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, 0
	sub	eax, edx
	add	eax, eax
	cmp	ecx, eax
	setb	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	unlt, .-unlt
	.globl	ungt
	.type	ungt, @function
ungt:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	edx, DWORD PTR -4[rbp]
	mov	eax, 0
	sub	eax, edx
	add	eax, eax
	mov	ecx, eax
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, 0
	sub	eax, edx
	add	eax, eax
	cmp	ecx, eax
	seta	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	ungt, .-ungt
	.globl	unge
	.type	unge, @function
unge:
.LFB16:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	edx, DWORD PTR -4[rbp]
	mov	eax, 0
	sub	eax, edx
	add	eax, eax
	mov	ecx, eax
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, 0
	sub	eax, edx
	add	eax, eax
	cmp	ecx, eax
	setnb	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE16:
	.size	unge, .-unge
	.globl	unle
	.type	unle, @function
unle:
.LFB17:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	edx, DWORD PTR -4[rbp]
	mov	eax, 0
	sub	eax, edx
	add	eax, eax
	mov	ecx, eax
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, 0
	sub	eax, edx
	add	eax, eax
	cmp	ecx, eax
	setbe	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE17:
	.size	unle, .-unle
	.globl	feq
	.type	feq, @function
feq:
.LFB18:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	DWORD PTR -8[rbp], xmm1
	movss	xmm1, DWORD PTR -4[rbp]
	movss	xmm0, DWORD PTR .LC0[rip]
	mulss	xmm0, xmm1
	movss	xmm2, DWORD PTR -8[rbp]
	movss	xmm1, DWORD PTR .LC0[rip]
	mulss	xmm1, xmm2
	ucomiss	xmm0, xmm1
	setnp	al
	mov	edx, 0
	ucomiss	xmm0, xmm1
	cmovne	eax, edx
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE18:
	.size	feq, .-feq
	.globl	fne
	.type	fne, @function
fne:
.LFB19:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	DWORD PTR -8[rbp], xmm1
	movss	xmm1, DWORD PTR -4[rbp]
	movss	xmm0, DWORD PTR .LC0[rip]
	mulss	xmm0, xmm1
	movss	xmm2, DWORD PTR -8[rbp]
	movss	xmm1, DWORD PTR .LC0[rip]
	mulss	xmm1, xmm2
	ucomiss	xmm0, xmm1
	setp	al
	mov	edx, 1
	ucomiss	xmm0, xmm1
	cmovne	eax, edx
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE19:
	.size	fne, .-fne
	.globl	flt
	.type	flt, @function
flt:
.LFB20:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	DWORD PTR -8[rbp], xmm1
	movss	xmm1, DWORD PTR -4[rbp]
	movss	xmm0, DWORD PTR .LC0[rip]
	mulss	xmm1, xmm0
	movss	xmm2, DWORD PTR -8[rbp]
	movss	xmm0, DWORD PTR .LC0[rip]
	mulss	xmm0, xmm2
	comiss	xmm0, xmm1
	seta	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE20:
	.size	flt, .-flt
	.globl	fgt
	.type	fgt, @function
fgt:
.LFB21:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	DWORD PTR -8[rbp], xmm1
	movss	xmm1, DWORD PTR -4[rbp]
	movss	xmm0, DWORD PTR .LC0[rip]
	mulss	xmm0, xmm1
	movss	xmm2, DWORD PTR -8[rbp]
	movss	xmm1, DWORD PTR .LC0[rip]
	mulss	xmm1, xmm2
	comiss	xmm0, xmm1
	seta	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE21:
	.size	fgt, .-fgt
	.globl	fge
	.type	fge, @function
fge:
.LFB22:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	DWORD PTR -8[rbp], xmm1
	movss	xmm1, DWORD PTR -4[rbp]
	movss	xmm0, DWORD PTR .LC0[rip]
	mulss	xmm0, xmm1
	movss	xmm2, DWORD PTR -8[rbp]
	movss	xmm1, DWORD PTR .LC0[rip]
	mulss	xmm1, xmm2
	comiss	xmm0, xmm1
	setnb	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE22:
	.size	fge, .-fge
	.globl	fle
	.type	fle, @function
fle:
.LFB23:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	DWORD PTR -8[rbp], xmm1
	movss	xmm1, DWORD PTR -4[rbp]
	movss	xmm0, DWORD PTR .LC0[rip]
	mulss	xmm1, xmm0
	movss	xmm2, DWORD PTR -8[rbp]
	movss	xmm0, DWORD PTR .LC0[rip]
	mulss	xmm0, xmm2
	comiss	xmm0, xmm1
	setnb	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE23:
	.size	fle, .-fle
	.globl	fveq
	.type	fveq, @function
fveq:
.LFB24:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	pxor	xmm1, xmm1
	cvtsi2sd	xmm1, DWORD PTR -4[rbp]
	movsd	xmm0, QWORD PTR .LC1[rip]
	mulsd	xmm0, xmm1
	pxor	xmm2, xmm2
	cvtsi2sd	xmm2, DWORD PTR -8[rbp]
	movsd	xmm1, QWORD PTR .LC1[rip]
	mulsd	xmm1, xmm2
	ucomisd	xmm0, xmm1
	setnp	al
	mov	edx, 0
	ucomisd	xmm0, xmm1
	cmovne	eax, edx
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE24:
	.size	fveq, .-fveq
	.globl	fvne
	.type	fvne, @function
fvne:
.LFB25:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	pxor	xmm1, xmm1
	cvtsi2sd	xmm1, DWORD PTR -4[rbp]
	movsd	xmm0, QWORD PTR .LC1[rip]
	mulsd	xmm0, xmm1
	pxor	xmm2, xmm2
	cvtsi2sd	xmm2, DWORD PTR -8[rbp]
	movsd	xmm1, QWORD PTR .LC1[rip]
	mulsd	xmm1, xmm2
	ucomisd	xmm0, xmm1
	setp	al
	mov	edx, 1
	ucomisd	xmm0, xmm1
	cmovne	eax, edx
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE25:
	.size	fvne, .-fvne
	.globl	fvlt
	.type	fvlt, @function
fvlt:
.LFB26:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	pxor	xmm1, xmm1
	cvtsi2sd	xmm1, DWORD PTR -4[rbp]
	movsd	xmm0, QWORD PTR .LC1[rip]
	mulsd	xmm1, xmm0
	pxor	xmm2, xmm2
	cvtsi2sd	xmm2, DWORD PTR -8[rbp]
	movsd	xmm0, QWORD PTR .LC1[rip]
	mulsd	xmm0, xmm2
	comisd	xmm0, xmm1
	seta	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE26:
	.size	fvlt, .-fvlt
	.globl	fvgt
	.type	fvgt, @function
fvgt:
.LFB27:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	pxor	xmm1, xmm1
	cvtsi2sd	xmm1, DWORD PTR -4[rbp]
	movsd	xmm0, QWORD PTR .LC1[rip]
	mulsd	xmm0, xmm1
	pxor	xmm2, xmm2
	cvtsi2sd	xmm2, DWORD PTR -8[rbp]
	movsd	xmm1, QWORD PTR .LC1[rip]
	mulsd	xmm1, xmm2
	comisd	xmm0, xmm1
	seta	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE27:
	.size	fvgt, .-fvgt
	.globl	fvge
	.type	fvge, @function
fvge:
.LFB28:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	pxor	xmm1, xmm1
	cvtsi2sd	xmm1, DWORD PTR -4[rbp]
	movsd	xmm0, QWORD PTR .LC1[rip]
	mulsd	xmm0, xmm1
	pxor	xmm2, xmm2
	cvtsi2sd	xmm2, DWORD PTR -8[rbp]
	movsd	xmm1, QWORD PTR .LC1[rip]
	mulsd	xmm1, xmm2
	comisd	xmm0, xmm1
	setnb	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE28:
	.size	fvge, .-fvge
	.globl	fvle
	.type	fvle, @function
fvle:
.LFB29:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	pxor	xmm1, xmm1
	cvtsi2sd	xmm1, DWORD PTR -4[rbp]
	movsd	xmm0, QWORD PTR .LC1[rip]
	mulsd	xmm1, xmm0
	pxor	xmm2, xmm2
	cvtsi2sd	xmm2, DWORD PTR -8[rbp]
	movsd	xmm0, QWORD PTR .LC1[rip]
	mulsd	xmm0, xmm2
	comisd	xmm0, xmm1
	setnb	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE29:
	.size	fvle, .-fvle
	.globl	veq
	.type	veq, @function
veq:
.LFB30:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 64
	mov	DWORD PTR -52[rbp], edi
	mov	DWORD PTR -56[rbp], esi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	eax, DWORD PTR -44[rbp]
	imul	eax, DWORD PTR -52[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -44[rbp]
	imul	eax, DWORD PTR -56[rbp]
	cmp	edx, eax
	sete	al
	movzx	eax, al
	mov	rcx, QWORD PTR -8[rbp]
	sub	rcx, QWORD PTR fs:40
	je	.L63
	call	__stack_chk_fail@PLT
.L63:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE30:
	.size	veq, .-veq
	.globl	vne
	.type	vne, @function
vne:
.LFB31:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 64
	mov	DWORD PTR -52[rbp], edi
	mov	DWORD PTR -56[rbp], esi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	eax, DWORD PTR -44[rbp]
	imul	eax, DWORD PTR -52[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -44[rbp]
	imul	eax, DWORD PTR -56[rbp]
	cmp	edx, eax
	setne	al
	movzx	eax, al
	mov	rcx, QWORD PTR -8[rbp]
	sub	rcx, QWORD PTR fs:40
	je	.L66
	call	__stack_chk_fail@PLT
.L66:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE31:
	.size	vne, .-vne
	.globl	vlt
	.type	vlt, @function
vlt:
.LFB32:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 64
	mov	DWORD PTR -52[rbp], edi
	mov	DWORD PTR -56[rbp], esi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	eax, DWORD PTR -44[rbp]
	imul	eax, DWORD PTR -52[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -44[rbp]
	imul	eax, DWORD PTR -56[rbp]
	cmp	edx, eax
	setl	al
	movzx	eax, al
	mov	rcx, QWORD PTR -8[rbp]
	sub	rcx, QWORD PTR fs:40
	je	.L69
	call	__stack_chk_fail@PLT
.L69:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE32:
	.size	vlt, .-vlt
	.globl	vgt
	.type	vgt, @function
vgt:
.LFB33:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 64
	mov	DWORD PTR -52[rbp], edi
	mov	DWORD PTR -56[rbp], esi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	eax, DWORD PTR -44[rbp]
	imul	eax, DWORD PTR -52[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -44[rbp]
	imul	eax, DWORD PTR -56[rbp]
	cmp	edx, eax
	setg	al
	movzx	eax, al
	mov	rcx, QWORD PTR -8[rbp]
	sub	rcx, QWORD PTR fs:40
	je	.L72
	call	__stack_chk_fail@PLT
.L72:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE33:
	.size	vgt, .-vgt
	.globl	vge
	.type	vge, @function
vge:
.LFB34:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 64
	mov	DWORD PTR -52[rbp], edi
	mov	DWORD PTR -56[rbp], esi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	eax, DWORD PTR -44[rbp]
	imul	eax, DWORD PTR -52[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -44[rbp]
	imul	eax, DWORD PTR -56[rbp]
	cmp	edx, eax
	setge	al
	movzx	eax, al
	mov	rcx, QWORD PTR -8[rbp]
	sub	rcx, QWORD PTR fs:40
	je	.L75
	call	__stack_chk_fail@PLT
.L75:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE34:
	.size	vge, .-vge
	.globl	vle
	.type	vle, @function
vle:
.LFB35:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 64
	mov	DWORD PTR -52[rbp], edi
	mov	DWORD PTR -56[rbp], esi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	eax, DWORD PTR -44[rbp]
	imul	eax, DWORD PTR -52[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -44[rbp]
	imul	eax, DWORD PTR -56[rbp]
	cmp	edx, eax
	setle	al
	movzx	eax, al
	mov	rcx, QWORD PTR -8[rbp]
	sub	rcx, QWORD PTR fs:40
	je	.L78
	call	__stack_chk_fail@PLT
.L78:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE35:
	.size	vle, .-vle
	.section	.rodata
	.align 4
.LC0:
	.long	1084227584
	.align 8
.LC1:
	.long	0
	.long	1078657024
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"92327887.c"
	.text
	.align	2
	.global	zeq
	.syntax unified
	.arm
	.fpu softvfp
	.type	zeq, %function
zeq:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	mov	r3, #1
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	zeq, .-zeq
	.align	2
	.global	zne
	.syntax unified
	.arm
	.fpu softvfp
	.type	zne, %function
zne:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	mov	r3, #0
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	zne, .-zne
	.align	2
	.global	zlt
	.syntax unified
	.arm
	.fpu softvfp
	.type	zlt, %function
zlt:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	mov	r3, #0
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	zlt, .-zlt
	.align	2
	.global	zgt
	.syntax unified
	.arm
	.fpu softvfp
	.type	zgt, %function
zgt:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	mov	r3, #0
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	zgt, .-zgt
	.align	2
	.global	zge
	.syntax unified
	.arm
	.fpu softvfp
	.type	zge, %function
zge:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	mov	r3, #1
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	zge, .-zge
	.align	2
	.global	zle
	.syntax unified
	.arm
	.fpu softvfp
	.type	zle, %function
zle:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	mov	r3, #1
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	zle, .-zle
	.align	2
	.global	upeq
	.syntax unified
	.arm
	.fpu softvfp
	.type	upeq, %function
upeq:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-8]
	lsl	r2, r3, #2
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #2
	cmp	r2, r3
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	upeq, .-upeq
	.align	2
	.global	upne
	.syntax unified
	.arm
	.fpu softvfp
	.type	upne, %function
upne:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-8]
	lsl	r2, r3, #2
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #2
	cmp	r2, r3
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	upne, .-upne
	.align	2
	.global	uplt
	.syntax unified
	.arm
	.fpu softvfp
	.type	uplt, %function
uplt:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-8]
	lsl	r2, r3, #2
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #2
	cmp	r2, r3
	movcc	r3, #1
	movcs	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	uplt, .-uplt
	.align	2
	.global	upgt
	.syntax unified
	.arm
	.fpu softvfp
	.type	upgt, %function
upgt:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-8]
	lsl	r2, r3, #2
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #2
	cmp	r2, r3
	movhi	r3, #1
	movls	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	upgt, .-upgt
	.align	2
	.global	upge
	.syntax unified
	.arm
	.fpu softvfp
	.type	upge, %function
upge:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-8]
	lsl	r2, r3, #2
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #2
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	upge, .-upge
	.align	2
	.global	uple
	.syntax unified
	.arm
	.fpu softvfp
	.type	uple, %function
uple:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-8]
	lsl	r2, r3, #2
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #2
	cmp	r2, r3
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	uple, .-uple
	.align	2
	.global	uneq
	.syntax unified
	.arm
	.fpu softvfp
	.type	uneq, %function
uneq:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	mov	r3, r2
	lsl	r3, r3, #31
	sub	r3, r3, r2
	lsl	r3, r3, #1
	mov	r1, r3
	ldr	r2, [fp, #-12]
	mov	r3, r2
	lsl	r3, r3, #31
	sub	r3, r3, r2
	lsl	r3, r3, #1
	cmp	r1, r3
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	uneq, .-uneq
	.align	2
	.global	unne
	.syntax unified
	.arm
	.fpu softvfp
	.type	unne, %function
unne:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	mov	r3, r2
	lsl	r3, r3, #31
	sub	r3, r3, r2
	lsl	r3, r3, #1
	mov	r1, r3
	ldr	r2, [fp, #-12]
	mov	r3, r2
	lsl	r3, r3, #31
	sub	r3, r3, r2
	lsl	r3, r3, #1
	cmp	r1, r3
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	unne, .-unne
	.align	2
	.global	unlt
	.syntax unified
	.arm
	.fpu softvfp
	.type	unlt, %function
unlt:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	mov	r3, r2
	lsl	r3, r3, #31
	sub	r3, r3, r2
	lsl	r3, r3, #1
	mov	r1, r3
	ldr	r2, [fp, #-12]
	mov	r3, r2
	lsl	r3, r3, #31
	sub	r3, r3, r2
	lsl	r3, r3, #1
	cmp	r1, r3
	movcc	r3, #1
	movcs	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	unlt, .-unlt
	.align	2
	.global	ungt
	.syntax unified
	.arm
	.fpu softvfp
	.type	ungt, %function
ungt:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	mov	r3, r2
	lsl	r3, r3, #31
	sub	r3, r3, r2
	lsl	r3, r3, #1
	mov	r1, r3
	ldr	r2, [fp, #-12]
	mov	r3, r2
	lsl	r3, r3, #31
	sub	r3, r3, r2
	lsl	r3, r3, #1
	cmp	r1, r3
	movhi	r3, #1
	movls	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	ungt, .-ungt
	.align	2
	.global	unge
	.syntax unified
	.arm
	.fpu softvfp
	.type	unge, %function
unge:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	mov	r3, r2
	lsl	r3, r3, #31
	sub	r3, r3, r2
	lsl	r3, r3, #1
	mov	r1, r3
	ldr	r2, [fp, #-12]
	mov	r3, r2
	lsl	r3, r3, #31
	sub	r3, r3, r2
	lsl	r3, r3, #1
	cmp	r1, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	unge, .-unge
	.align	2
	.global	unle
	.syntax unified
	.arm
	.fpu softvfp
	.type	unle, %function
unle:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	mov	r3, r2
	lsl	r3, r3, #31
	sub	r3, r3, r2
	lsl	r3, r3, #1
	mov	r1, r3
	ldr	r2, [fp, #-12]
	mov	r3, r2
	lsl	r3, r3, #31
	sub	r3, r3, r2
	lsl	r3, r3, #1
	cmp	r1, r3
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	unle, .-unle
	.global	__aeabi_fmul
	.global	__aeabi_fcmpeq
	.align	2
	.global	feq
	.syntax unified
	.arm
	.fpu softvfp
	.type	feq, %function
feq:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #8
	str	r0, [fp, #-16]	@ float
	str	r1, [fp, #-20]	@ float
	ldr	r1, .L40
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r5, r3
	ldr	r1, .L40
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r2, #1
	mov	r4, r2
	mov	r1, r3
	mov	r0, r5
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L38
	mov	r3, #0
	mov	r4, r3
.L38:
	and	r3, r4, #255
	mov	r0, r3
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L41:
	.align	2
.L40:
	.word	1084227584
	.size	feq, .-feq
	.align	2
	.global	fne
	.syntax unified
	.arm
	.fpu softvfp
	.type	fne, %function
fne:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #8
	str	r0, [fp, #-16]	@ float
	str	r1, [fp, #-20]	@ float
	ldr	r1, .L45
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r5, r3
	ldr	r1, .L45
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r2, #1
	mov	r4, r2
	mov	r1, r3
	mov	r0, r5
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L43
	mov	r3, #0
	mov	r4, r3
.L43:
	and	r3, r4, #255
	mov	r0, r3
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L46:
	.align	2
.L45:
	.word	1084227584
	.size	fne, .-fne
	.global	__aeabi_fcmplt
	.align	2
	.global	flt
	.syntax unified
	.arm
	.fpu softvfp
	.type	flt, %function
flt:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #8
	str	r0, [fp, #-16]	@ float
	str	r1, [fp, #-20]	@ float
	ldr	r1, .L50
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r5, r3
	ldr	r1, .L50
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r2, #1
	mov	r4, r2
	mov	r1, r3
	mov	r0, r5
	bl	__aeabi_fcmplt
	mov	r3, r0
	cmp	r3, #0
	bne	.L48
	mov	r3, #0
	mov	r4, r3
.L48:
	and	r3, r4, #255
	mov	r0, r3
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L51:
	.align	2
.L50:
	.word	1084227584
	.size	flt, .-flt
	.global	__aeabi_fcmpgt
	.align	2
	.global	fgt
	.syntax unified
	.arm
	.fpu softvfp
	.type	fgt, %function
fgt:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #8
	str	r0, [fp, #-16]	@ float
	str	r1, [fp, #-20]	@ float
	ldr	r1, .L55
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r5, r3
	ldr	r1, .L55
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r2, #1
	mov	r4, r2
	mov	r1, r3
	mov	r0, r5
	bl	__aeabi_fcmpgt
	mov	r3, r0
	cmp	r3, #0
	bne	.L53
	mov	r3, #0
	mov	r4, r3
.L53:
	and	r3, r4, #255
	mov	r0, r3
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L56:
	.align	2
.L55:
	.word	1084227584
	.size	fgt, .-fgt
	.global	__aeabi_fcmpge
	.align	2
	.global	fge
	.syntax unified
	.arm
	.fpu softvfp
	.type	fge, %function
fge:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #8
	str	r0, [fp, #-16]	@ float
	str	r1, [fp, #-20]	@ float
	ldr	r1, .L60
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r5, r3
	ldr	r1, .L60
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r2, #1
	mov	r4, r2
	mov	r1, r3
	mov	r0, r5
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L58
	mov	r3, #0
	mov	r4, r3
.L58:
	and	r3, r4, #255
	mov	r0, r3
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L61:
	.align	2
.L60:
	.word	1084227584
	.size	fge, .-fge
	.global	__aeabi_fcmple
	.align	2
	.global	fle
	.syntax unified
	.arm
	.fpu softvfp
	.type	fle, %function
fle:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #8
	str	r0, [fp, #-16]	@ float
	str	r1, [fp, #-20]	@ float
	ldr	r1, .L65
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r5, r3
	ldr	r1, .L65
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r2, #1
	mov	r4, r2
	mov	r1, r3
	mov	r0, r5
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L63
	mov	r3, #0
	mov	r4, r3
.L63:
	and	r3, r4, #255
	mov	r0, r3
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L66:
	.align	2
.L65:
	.word	1084227584
	.size	fle, .-fle
	.global	__aeabi_i2d
	.global	__aeabi_dmul
	.global	__aeabi_dcmpeq
	.align	2
	.global	fveq
	.syntax unified
	.arm
	.fpu softvfp
	.type	fveq, %function
fveq:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, fp, lr}
	add	fp, sp, #16
	sub	sp, sp, #12
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	ldr	r0, [fp, #-24]
	bl	__aeabi_i2d
	mov	r2, #0
	ldr	r3, .L70
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r0, [fp, #-28]
	bl	__aeabi_i2d
	mov	r2, #0
	ldr	r3, .L70
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r1, #1
	mov	r6, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L68
	mov	r3, #0
	mov	r6, r3
.L68:
	and	r3, r6, #255
	mov	r0, r3
	sub	sp, fp, #16
	@ sp needed
	pop	{r4, r5, r6, fp, pc}
.L71:
	.align	2
.L70:
	.word	1078657024
	.size	fveq, .-fveq
	.align	2
	.global	fvne
	.syntax unified
	.arm
	.fpu softvfp
	.type	fvne, %function
fvne:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, fp, lr}
	add	fp, sp, #16
	sub	sp, sp, #12
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	ldr	r0, [fp, #-24]
	bl	__aeabi_i2d
	mov	r2, #0
	ldr	r3, .L75
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r0, [fp, #-28]
	bl	__aeabi_i2d
	mov	r2, #0
	ldr	r3, .L75
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r1, #1
	mov	r6, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L73
	mov	r3, #0
	mov	r6, r3
.L73:
	and	r3, r6, #255
	mov	r0, r3
	sub	sp, fp, #16
	@ sp needed
	pop	{r4, r5, r6, fp, pc}
.L76:
	.align	2
.L75:
	.word	1078657024
	.size	fvne, .-fvne
	.global	__aeabi_dcmplt
	.align	2
	.global	fvlt
	.syntax unified
	.arm
	.fpu softvfp
	.type	fvlt, %function
fvlt:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, fp, lr}
	add	fp, sp, #16
	sub	sp, sp, #12
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	ldr	r0, [fp, #-24]
	bl	__aeabi_i2d
	mov	r2, #0
	ldr	r3, .L80
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r0, [fp, #-28]
	bl	__aeabi_i2d
	mov	r2, #0
	ldr	r3, .L80
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r1, #1
	mov	r6, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	bne	.L78
	mov	r3, #0
	mov	r6, r3
.L78:
	and	r3, r6, #255
	mov	r0, r3
	sub	sp, fp, #16
	@ sp needed
	pop	{r4, r5, r6, fp, pc}
.L81:
	.align	2
.L80:
	.word	1078657024
	.size	fvlt, .-fvlt
	.global	__aeabi_dcmpgt
	.align	2
	.global	fvgt
	.syntax unified
	.arm
	.fpu softvfp
	.type	fvgt, %function
fvgt:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, fp, lr}
	add	fp, sp, #16
	sub	sp, sp, #12
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	ldr	r0, [fp, #-24]
	bl	__aeabi_i2d
	mov	r2, #0
	ldr	r3, .L85
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r0, [fp, #-28]
	bl	__aeabi_i2d
	mov	r2, #0
	ldr	r3, .L85
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r1, #1
	mov	r6, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmpgt
	mov	r3, r0
	cmp	r3, #0
	bne	.L83
	mov	r3, #0
	mov	r6, r3
.L83:
	and	r3, r6, #255
	mov	r0, r3
	sub	sp, fp, #16
	@ sp needed
	pop	{r4, r5, r6, fp, pc}
.L86:
	.align	2
.L85:
	.word	1078657024
	.size	fvgt, .-fvgt
	.global	__aeabi_dcmpge
	.align	2
	.global	fvge
	.syntax unified
	.arm
	.fpu softvfp
	.type	fvge, %function
fvge:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, fp, lr}
	add	fp, sp, #16
	sub	sp, sp, #12
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	ldr	r0, [fp, #-24]
	bl	__aeabi_i2d
	mov	r2, #0
	ldr	r3, .L90
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r0, [fp, #-28]
	bl	__aeabi_i2d
	mov	r2, #0
	ldr	r3, .L90
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r1, #1
	mov	r6, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L88
	mov	r3, #0
	mov	r6, r3
.L88:
	and	r3, r6, #255
	mov	r0, r3
	sub	sp, fp, #16
	@ sp needed
	pop	{r4, r5, r6, fp, pc}
.L91:
	.align	2
.L90:
	.word	1078657024
	.size	fvge, .-fvge
	.global	__aeabi_dcmple
	.align	2
	.global	fvle
	.syntax unified
	.arm
	.fpu softvfp
	.type	fvle, %function
fvle:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, fp, lr}
	add	fp, sp, #16
	sub	sp, sp, #12
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	ldr	r0, [fp, #-24]
	bl	__aeabi_i2d
	mov	r2, #0
	ldr	r3, .L95
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r0, [fp, #-28]
	bl	__aeabi_i2d
	mov	r2, #0
	ldr	r3, .L95
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r1, #1
	mov	r6, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L93
	mov	r3, #0
	mov	r6, r3
.L93:
	and	r3, r6, #255
	mov	r0, r3
	sub	sp, fp, #16
	@ sp needed
	pop	{r4, r5, r6, fp, pc}
.L96:
	.align	2
.L95:
	.word	1078657024
	.size	fvle, .-fvle
	.section	.rodata
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	veq
	.syntax unified
	.arm
	.fpu softvfp
	.type	veq, %function
veq:
	@ args = 0, pretend = 0, frame = 56
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #56
	str	r0, [fp, #-56]
	str	r1, [fp, #-60]
	ldr	r3, .L100
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	ldr	r3, [fp, #-44]
	ldr	r2, [fp, #-56]
	mul	r2, r3, r2
	ldr	r3, [fp, #-44]
	ldr	r1, [fp, #-60]
	mul	r3, r1, r3
	cmp	r2, r3
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	ldr	r2, .L100
	ldr	r1, [r2]
	ldr	r2, [fp, #-8]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L99
	bl	__stack_chk_fail
.L99:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L101:
	.align	2
.L100:
	.word	.LC0
	.size	veq, .-veq
	.section	.rodata
	.align	2
.LC1:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	vne
	.syntax unified
	.arm
	.fpu softvfp
	.type	vne, %function
vne:
	@ args = 0, pretend = 0, frame = 56
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #56
	str	r0, [fp, #-56]
	str	r1, [fp, #-60]
	ldr	r3, .L105
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	ldr	r3, [fp, #-44]
	ldr	r2, [fp, #-56]
	mul	r2, r3, r2
	ldr	r3, [fp, #-44]
	ldr	r1, [fp, #-60]
	mul	r3, r1, r3
	cmp	r2, r3
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	ldr	r2, .L105
	ldr	r1, [r2]
	ldr	r2, [fp, #-8]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L104
	bl	__stack_chk_fail
.L104:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L106:
	.align	2
.L105:
	.word	.LC1
	.size	vne, .-vne
	.section	.rodata
	.align	2
.LC2:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	vlt
	.syntax unified
	.arm
	.fpu softvfp
	.type	vlt, %function
vlt:
	@ args = 0, pretend = 0, frame = 56
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #56
	str	r0, [fp, #-56]
	str	r1, [fp, #-60]
	ldr	r3, .L110
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	ldr	r3, [fp, #-44]
	ldr	r2, [fp, #-56]
	mul	r2, r3, r2
	ldr	r3, [fp, #-44]
	ldr	r1, [fp, #-60]
	mul	r3, r1, r3
	cmp	r2, r3
	movlt	r3, #1
	movge	r3, #0
	and	r3, r3, #255
	ldr	r2, .L110
	ldr	r1, [r2]
	ldr	r2, [fp, #-8]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L109
	bl	__stack_chk_fail
.L109:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L111:
	.align	2
.L110:
	.word	.LC2
	.size	vlt, .-vlt
	.section	.rodata
	.align	2
.LC3:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	vgt
	.syntax unified
	.arm
	.fpu softvfp
	.type	vgt, %function
vgt:
	@ args = 0, pretend = 0, frame = 56
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #56
	str	r0, [fp, #-56]
	str	r1, [fp, #-60]
	ldr	r3, .L115
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	ldr	r3, [fp, #-44]
	ldr	r2, [fp, #-56]
	mul	r2, r3, r2
	ldr	r3, [fp, #-44]
	ldr	r1, [fp, #-60]
	mul	r3, r1, r3
	cmp	r2, r3
	movgt	r3, #1
	movle	r3, #0
	and	r3, r3, #255
	ldr	r2, .L115
	ldr	r1, [r2]
	ldr	r2, [fp, #-8]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L114
	bl	__stack_chk_fail
.L114:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L116:
	.align	2
.L115:
	.word	.LC3
	.size	vgt, .-vgt
	.section	.rodata
	.align	2
.LC4:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	vge
	.syntax unified
	.arm
	.fpu softvfp
	.type	vge, %function
vge:
	@ args = 0, pretend = 0, frame = 56
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #56
	str	r0, [fp, #-56]
	str	r1, [fp, #-60]
	ldr	r3, .L120
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	ldr	r3, [fp, #-44]
	ldr	r2, [fp, #-56]
	mul	r2, r3, r2
	ldr	r3, [fp, #-44]
	ldr	r1, [fp, #-60]
	mul	r3, r1, r3
	cmp	r2, r3
	movge	r3, #1
	movlt	r3, #0
	and	r3, r3, #255
	ldr	r2, .L120
	ldr	r1, [r2]
	ldr	r2, [fp, #-8]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L119
	bl	__stack_chk_fail
.L119:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L121:
	.align	2
.L120:
	.word	.LC4
	.size	vge, .-vge
	.section	.rodata
	.align	2
.LC5:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	vle
	.syntax unified
	.arm
	.fpu softvfp
	.type	vle, %function
vle:
	@ args = 0, pretend = 0, frame = 56
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #56
	str	r0, [fp, #-56]
	str	r1, [fp, #-60]
	ldr	r3, .L125
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	ldr	r3, [fp, #-44]
	ldr	r2, [fp, #-56]
	mul	r2, r3, r2
	ldr	r3, [fp, #-44]
	ldr	r1, [fp, #-60]
	mul	r3, r1, r3
	cmp	r2, r3
	movle	r3, #1
	movgt	r3, #0
	and	r3, r3, #255
	ldr	r2, .L125
	ldr	r1, [r2]
	ldr	r2, [fp, #-8]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L124
	bl	__stack_chk_fail
.L124:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L126:
	.align	2
.L125:
	.word	.LC5
	.size	vle, .-vle
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
