	.file	"154829301.c"
	.intel_syntax noprefix
	.text
	.local	B0
	.comm	B0,1,1
	.local	B1
	.comm	B1,1,1
	.local	B2
	.comm	B2,1,1
	.local	B3
	.comm	B3,1,1
	.local	B4
	.comm	B4,1,1
	.local	B5
	.comm	B5,1,1
	.local	B6
	.comm	B6,1,1
	.local	B7
	.comm	B7,1,1
	.local	B8
	.comm	B8,1,1
	.local	B9
	.comm	B9,1,1
	.local	B10
	.comm	B10,1,1
	.local	B11
	.comm	B11,1,1
	.local	B12
	.comm	B12,1,1
	.local	B13
	.comm	B13,1,1
	.local	B14
	.comm	B14,1,1
	.local	B15
	.comm	B15,1,1
	.local	B16
	.comm	B16,1,1
	.local	B17
	.comm	B17,1,1
	.local	B18
	.comm	B18,1,1
	.local	B19
	.comm	B19,1,1
	.local	B20
	.comm	B20,1,1
	.local	B21
	.comm	B21,1,1
	.local	B22
	.comm	B22,1,1
	.local	B23
	.comm	B23,1,1
	.local	B24
	.comm	B24,1,1
	.local	B25
	.comm	B25,1,1
	.local	B26
	.comm	B26,1,1
	.local	B27
	.comm	B27,1,1
	.local	B28
	.comm	B28,1,1
	.local	B29
	.comm	B29,1,1
	.local	B30
	.comm	B30,1,1
	.local	B31
	.comm	B31,1,1
	.local	B32
	.comm	B32,1,1
	.local	B33
	.comm	B33,1,1
	.local	B34
	.comm	B34,1,1
	.local	B35
	.comm	B35,1,1
	.local	B36
	.comm	B36,1,1
	.local	B37
	.comm	B37,1,1
	.local	B38
	.comm	B38,1,1
	.local	B39
	.comm	B39,1,1
	.local	B40
	.comm	B40,1,1
	.local	B41
	.comm	B41,1,1
	.local	B42
	.comm	B42,1,1
	.local	B43
	.comm	B43,1,1
	.local	B44
	.comm	B44,1,1
	.local	B45
	.comm	B45,1,1
	.local	B46
	.comm	B46,1,1
	.local	B47
	.comm	B47,1,1
	.local	B48
	.comm	B48,1,1
	.local	B49
	.comm	B49,1,1
	.local	B50
	.comm	B50,1,1
	.local	B51
	.comm	B51,1,1
	.local	B52
	.comm	B52,1,1
	.local	B53
	.comm	B53,1,1
	.local	B54
	.comm	B54,1,1
	.local	B55
	.comm	B55,1,1
	.local	B56
	.comm	B56,1,1
	.local	B57
	.comm	B57,1,1
	.local	B58
	.comm	B58,1,1
	.local	B59
	.comm	B59,1,1
	.local	B60
	.comm	B60,1,1
	.local	B61
	.comm	B61,1,1
	.local	B62
	.comm	B62,1,1
	.local	B63
	.comm	B63,1,1
	.globl	X1
	.bss
	.align 8
	.type	X1, @object
	.size	X1, 8
X1:
	.zero	8
	.globl	X2
	.align 8
	.type	X2, @object
	.size	X2, 8
X2:
	.zero	8
	.globl	X3
	.align 8
	.type	X3, @object
	.size	X3, 8
X3:
	.zero	8
	.globl	X4
	.align 8
	.type	X4, @object
	.size	X4, 8
X4:
	.zero	8
	.globl	X5
	.align 8
	.type	X5, @object
	.size	X5, 8
X5:
	.zero	8
	.globl	X6
	.align 8
	.type	X6, @object
	.size	X6, 8
X6:
	.zero	8
	.globl	X7
	.align 4
	.type	X7, @object
	.size	X7, 4
X7:
	.zero	4
	.globl	X8
	.align 4
	.type	X8, @object
	.size	X8, 4
X8:
	.zero	4
	.globl	X9
	.align 4
	.type	X9, @object
	.size	X9, 4
X9:
	.zero	4
	.globl	X10
	.align 8
	.type	X10, @object
	.size	X10, 8
X10:
	.zero	8
	.globl	X11
	.align 8
	.type	X11, @object
	.size	X11, 8
X11:
	.zero	8
	.globl	X12
	.align 4
	.type	X12, @object
	.size	X12, 4
X12:
	.zero	4
	.globl	X13
	.align 4
	.type	X13, @object
	.size	X13, 4
X13:
	.zero	4
	.globl	X14
	.align 4
	.type	X14, @object
	.size	X14, 4
X14:
	.zero	4
	.globl	X15
	.align 4
	.type	X15, @object
	.size	X15, 4
X15:
	.zero	4
	.globl	X16
	.align 4
	.type	X16, @object
	.size	X16, 4
X16:
	.zero	4
	.globl	X17
	.align 4
	.type	X17, @object
	.size	X17, 4
X17:
	.zero	4
	.globl	X18
	.align 4
	.type	X18, @object
	.size	X18, 4
X18:
	.zero	4
	.globl	X19
	.align 4
	.type	X19, @object
	.size	X19, 4
X19:
	.zero	4
	.globl	X20
	.align 4
	.type	X20, @object
	.size	X20, 4
X20:
	.zero	4
	.globl	X21
	.align 4
	.type	X21, @object
	.size	X21, 4
X21:
	.zero	4
	.globl	X22
	.align 4
	.type	X22, @object
	.size	X22, 4
X22:
	.zero	4
	.globl	X23
	.align 4
	.type	X23, @object
	.size	X23, 4
X23:
	.zero	4
	.globl	X24
	.align 4
	.type	X24, @object
	.size	X24, 4
X24:
	.zero	4
	.globl	X25
	.type	X25, @object
	.size	X25, 1
X25:
	.zero	1
	.globl	X27
	.type	X27, @object
	.size	X27, 1
X27:
	.zero	1
	.globl	X26
	.type	X26, @object
	.size	X26, 1
X26:
	.zero	1
	.globl	X28
	.type	X28, @object
	.size	X28, 1
X28:
	.zero	1
	.globl	X29
	.type	X29, @object
	.size	X29, 1
X29:
	.zero	1
	.globl	X30
	.type	X30, @object
	.size	X30, 1
X30:
	.zero	1
	.globl	X31
	.type	X31, @object
	.size	X31, 1
X31:
	.zero	1
	.globl	X32
	.type	X32, @object
	.size	X32, 1
X32:
	.zero	1
	.globl	X33
	.type	X33, @object
	.size	X33, 1
X33:
	.zero	1
	.globl	X34
	.type	X34, @object
	.size	X34, 1
X34:
	.zero	1
	.globl	X35
	.type	X35, @object
	.size	X35, 1
X35:
	.zero	1
	.globl	X36
	.type	X36, @object
	.size	X36, 1
X36:
	.zero	1
	.globl	X37
	.type	X37, @object
	.size	X37, 1
X37:
	.zero	1
	.globl	X38
	.type	X38, @object
	.size	X38, 1
X38:
	.zero	1
	.globl	X39
	.type	X39, @object
	.size	X39, 1
X39:
	.zero	1
	.globl	X40
	.type	X40, @object
	.size	X40, 1
X40:
	.zero	1
	.globl	X41
	.type	X41, @object
	.size	X41, 1
X41:
	.zero	1
	.globl	X42
	.type	X42, @object
	.size	X42, 1
X42:
	.zero	1
	.globl	X43
	.type	X43, @object
	.size	X43, 1
X43:
	.zero	1
	.globl	X44
	.type	X44, @object
	.size	X44, 1
X44:
	.zero	1
	.globl	X45
	.type	X45, @object
	.size	X45, 1
X45:
	.zero	1
	.globl	X46
	.type	X46, @object
	.size	X46, 1
X46:
	.zero	1
	.globl	X47
	.type	X47, @object
	.size	X47, 1
X47:
	.zero	1
	.globl	X48
	.type	X48, @object
	.size	X48, 1
X48:
	.zero	1
	.globl	X49
	.type	X49, @object
	.size	X49, 1
X49:
	.zero	1
	.globl	X50
	.type	X50, @object
	.size	X50, 1
X50:
	.zero	1
	.globl	X51
	.type	X51, @object
	.size	X51, 1
X51:
	.zero	1
	.globl	X52
	.type	X52, @object
	.size	X52, 1
X52:
	.zero	1
	.globl	X53
	.type	X53, @object
	.size	X53, 1
X53:
	.zero	1
	.globl	X54
	.type	X54, @object
	.size	X54, 1
X54:
	.zero	1
	.globl	X55
	.type	X55, @object
	.size	X55, 1
X55:
	.zero	1
	.globl	X56
	.type	X56, @object
	.size	X56, 1
X56:
	.zero	1
	.globl	X57
	.type	X57, @object
	.size	X57, 1
X57:
	.zero	1
	.globl	X58
	.type	X58, @object
	.size	X58, 1
X58:
	.zero	1
	.globl	X59
	.type	X59, @object
	.size	X59, 1
X59:
	.zero	1
	.globl	X60
	.type	X60, @object
	.size	X60, 1
X60:
	.zero	1
	.globl	X61
	.type	X61, @object
	.size	X61, 1
X61:
	.zero	1
	.globl	X62
	.type	X62, @object
	.size	X62, 1
X62:
	.zero	1
	.globl	X63
	.type	X63, @object
	.size	X63, 1
X63:
	.zero	1
	.globl	X64
	.type	X64, @object
	.size	X64, 1
X64:
	.zero	1
	.globl	X65
	.type	X65, @object
	.size	X65, 1
X65:
	.zero	1
	.globl	X66
	.type	X66, @object
	.size	X66, 1
X66:
	.zero	1
	.globl	X67
	.type	X67, @object
	.size	X67, 1
X67:
	.zero	1
	.globl	X68
	.type	X68, @object
	.size	X68, 1
X68:
	.zero	1
	.globl	X69
	.type	X69, @object
	.size	X69, 1
X69:
	.zero	1
	.globl	X70
	.type	X70, @object
	.size	X70, 1
X70:
	.zero	1
	.globl	X71
	.type	X71, @object
	.size	X71, 1
X71:
	.zero	1
	.globl	X72
	.type	X72, @object
	.size	X72, 1
X72:
	.zero	1
	.globl	X73
	.type	X73, @object
	.size	X73, 1
X73:
	.zero	1
	.globl	X74
	.type	X74, @object
	.size	X74, 1
X74:
	.zero	1
	.globl	X75
	.type	X75, @object
	.size	X75, 1
X75:
	.zero	1
	.globl	X76
	.type	X76, @object
	.size	X76, 1
X76:
	.zero	1
	.globl	X77
	.type	X77, @object
	.size	X77, 1
X77:
	.zero	1
	.globl	X78
	.type	X78, @object
	.size	X78, 1
X78:
	.zero	1
	.globl	X79
	.type	X79, @object
	.size	X79, 1
X79:
	.zero	1
	.globl	X80
	.type	X80, @object
	.size	X80, 1
X80:
	.zero	1
	.globl	X81
	.type	X81, @object
	.size	X81, 1
X81:
	.zero	1
	.globl	X82
	.type	X82, @object
	.size	X82, 1
X82:
	.zero	1
	.globl	X83
	.type	X83, @object
	.size	X83, 1
X83:
	.zero	1
	.globl	X84
	.type	X84, @object
	.size	X84, 1
X84:
	.zero	1
	.globl	X85
	.type	X85, @object
	.size	X85, 1
X85:
	.zero	1
	.globl	X86
	.type	X86, @object
	.size	X86, 1
X86:
	.zero	1
	.globl	time
	.align 8
	.type	time, @object
	.size	time, 8
time:
	.zero	8
	.globl	stable
	.type	stable, @object
	.size	stable, 1
stable:
	.zero	1
	.globl	step
	.type	step, @object
	.size	step, 1
step:
	.zero	1
	.globl	X87
	.type	X87, @object
	.size	X87, 1
X87:
	.zero	1
	.globl	X88
	.type	X88, @object
	.size	X88, 1
X88:
	.zero	1
	.globl	X89
	.type	X89, @object
	.size	X89, 1
X89:
	.zero	1
	.globl	X90
	.type	X90, @object
	.size	X90, 1
X90:
	.zero	1
	.globl	X91
	.type	X91, @object
	.size	X91, 1
X91:
	.zero	1
	.globl	X92
	.type	X92, @object
	.size	X92, 1
X92:
	.zero	1
	.globl	X93
	.type	X93, @object
	.size	X93, 1
X93:
	.zero	1
	.globl	X94
	.type	X94, @object
	.size	X94, 1
X94:
	.zero	1
	.globl	X95
	.type	X95, @object
	.size	X95, 1
X95:
	.zero	1
	.globl	X96
	.type	X96, @object
	.size	X96, 1
X96:
	.zero	1
	.globl	X97
	.type	X97, @object
	.size	X97, 1
X97:
	.zero	1
	.globl	X98
	.type	X98, @object
	.size	X98, 1
X98:
	.zero	1
	.globl	X99
	.type	X99, @object
	.size	X99, 1
X99:
	.zero	1
	.globl	X100
	.type	X100, @object
	.size	X100, 1
X100:
	.zero	1
	.globl	X101
	.type	X101, @object
	.size	X101, 1
X101:
	.zero	1
	.globl	X102
	.type	X102, @object
	.size	X102, 1
X102:
	.zero	1
	.globl	t
	.align 4
	.type	t, @object
	.size	t, 4
t:
	.zero	4
	.text
	.globl	main
	.type	main, @function
main:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR t[rip], 0
	mov	QWORD PTR X1[rip], 0
	mov	QWORD PTR X2[rip], 0
	mov	QWORD PTR X3[rip], 0
	mov	BYTE PTR X87[rip], 0
	mov	BYTE PTR X88[rip], 0
	mov	BYTE PTR X89[rip], 0
	mov	BYTE PTR X90[rip], 0
	mov	BYTE PTR X91[rip], 0
	mov	BYTE PTR X92[rip], 0
	mov	BYTE PTR X93[rip], 0
	mov	BYTE PTR X94[rip], 0
	mov	BYTE PTR X95[rip], 0
	mov	BYTE PTR X96[rip], 0
	mov	BYTE PTR X97[rip], 0
	mov	BYTE PTR X98[rip], 0
	mov	BYTE PTR X99[rip], 0
	mov	BYTE PTR X100[rip], 0
	mov	BYTE PTR X101[rip], 0
	mov	BYTE PTR X102[rip], 0
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	movzx	eax, BYTE PTR B4[rip]
	test	al, al
	je	.L2
	mov	rax, QWORD PTR time[rip]
	mov	QWORD PTR X3[rip], rax
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
.L2:
	movzx	eax, BYTE PTR B4[rip]
	test	al, al
	jne	.L3
	movzx	eax, BYTE PTR B6[rip]
	test	al, al
	je	.L4
.L3:
	mov	rax, QWORD PTR time[rip]
	mov	QWORD PTR X2[rip], rax
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
.L4:
	mov	rax, QWORD PTR X4[rip]
	test	rax, rax
	je	.L5
	mov	rax, QWORD PTR time[rip]
	mov	rdx, QWORD PTR X4[rip]
	sub	rax, rdx
	test	rax, rax
	js	.L6
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rax
	jmp	.L7
.L6:
	mov	rdx, rax
	shr	rdx
	and	eax, 1
	or	rdx, rax
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rdx
	addsd	xmm0, xmm0
.L7:
	comisd	xmm0, QWORD PTR .LC0[rip]
	jb	.L5
	mov	BYTE PTR X53[rip], 0
	mov	QWORD PTR X4[rip], 0
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
.L5:
	mov	rax, QWORD PTR X5[rip]
	test	rax, rax
	je	.L9
	mov	rax, QWORD PTR time[rip]
	mov	rdx, QWORD PTR X5[rip]
	sub	rax, rdx
	test	rax, rax
	js	.L10
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rax
	jmp	.L11
.L10:
	mov	rdx, rax
	shr	rdx
	and	eax, 1
	or	rdx, rax
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rdx
	addsd	xmm0, xmm0
.L11:
	comisd	xmm0, QWORD PTR .LC0[rip]
	jb	.L9
	mov	BYTE PTR X50[rip], 0
	mov	QWORD PTR X5[rip], 0
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
.L9:
	mov	rax, QWORD PTR X6[rip]
	test	rax, rax
	je	.L13
	mov	rax, QWORD PTR time[rip]
	mov	rdx, QWORD PTR X6[rip]
	sub	rax, rdx
	test	rax, rax
	js	.L14
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rax
	jmp	.L15
.L14:
	mov	rdx, rax
	shr	rdx
	and	eax, 1
	or	rdx, rax
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rdx
	addsd	xmm0, xmm0
.L15:
	comisd	xmm0, QWORD PTR .LC0[rip]
	jb	.L13
	mov	BYTE PTR X50[rip], 0
	mov	QWORD PTR X6[rip], 0
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
.L13:
	mov	rax, QWORD PTR X10[rip]
	test	rax, rax
	je	.L17
	mov	rax, QWORD PTR time[rip]
	mov	rdx, QWORD PTR X10[rip]
	sub	rax, rdx
	test	rax, rax
	js	.L18
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rax
	jmp	.L19
.L18:
	mov	rdx, rax
	shr	rdx
	and	eax, 1
	or	rdx, rax
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rdx
	addsd	xmm0, xmm0
.L19:
	comisd	xmm0, QWORD PTR .LC0[rip]
	jb	.L17
	mov	QWORD PTR X10[rip], 0
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
.L17:
	mov	rax, QWORD PTR X11[rip]
	test	rax, rax
	je	.L21
	mov	rax, QWORD PTR time[rip]
	mov	rdx, QWORD PTR X11[rip]
	sub	rax, rdx
	test	rax, rax
	js	.L22
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rax
	jmp	.L23
.L22:
	mov	rdx, rax
	shr	rdx
	and	eax, 1
	or	rdx, rax
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rdx
	addsd	xmm0, xmm0
.L23:
	comisd	xmm0, QWORD PTR .LC0[rip]
	jb	.L21
	mov	QWORD PTR X11[rip], 0
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
.L21:
	movzx	eax, BYTE PTR B0[rip]
	test	al, al
	jne	.L25
	mov	edx, DWORD PTR X22[rip]
	mov	eax, DWORD PTR X24[rip]
	cmp	edx, eax
	je	.L26
.L25:
	mov	rax, QWORD PTR time[rip]
	mov	QWORD PTR X1[rip], rax
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
.L26:
	mov	QWORD PTR time[rip], 1
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR step[rip], 0
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	mov	BYTE PTR stable[rip], 1
	movzx	eax, BYTE PTR step[rip]
	add	eax, 1
	mov	BYTE PTR step[rip], al
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	movzx	eax, BYTE PTR X99[rip]
	movsx	eax, al
	cmp	eax, 3
	je	.L27
	cmp	eax, 3
	jg	.L28
	cmp	eax, 1
	je	.L29
	cmp	eax, 2
	je	.L30
	jmp	.L28
.L29:
	movzx	eax, BYTE PTR X81[rip]
	test	al, al
	jne	.L123
	movzx	eax, BYTE PTR X83[rip]
	test	al, al
	je	.L123
	mov	BYTE PTR stable[rip], 0
	mov	DWORD PTR X15[rip], 0
	mov	BYTE PTR X99[rip], 2
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L32
.L30:
	movzx	eax, BYTE PTR X81[rip]
	test	al, al
	je	.L33
	movzx	eax, BYTE PTR X83[rip]
	test	al, al
	jne	.L33
	mov	BYTE PTR stable[rip], 0
	mov	DWORD PTR X15[rip], -100
	mov	BYTE PTR X99[rip], 1
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L32
.L33:
	movzx	eax, BYTE PTR X84[rip]
	test	al, al
	je	.L124
	movzx	eax, BYTE PTR X86[rip]
	test	al, al
	jne	.L124
	mov	BYTE PTR stable[rip], 0
	mov	DWORD PTR X15[rip], 100
	mov	BYTE PTR X99[rip], 3
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L32
.L27:
	movzx	eax, BYTE PTR X84[rip]
	test	al, al
	jne	.L125
	movzx	eax, BYTE PTR X86[rip]
	test	al, al
	je	.L125
	mov	BYTE PTR stable[rip], 0
	mov	DWORD PTR X15[rip], 0
	mov	BYTE PTR X99[rip], 2
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L32
.L28:
	mov	BYTE PTR stable[rip], 0
	mov	DWORD PTR X15[rip], 0
	mov	BYTE PTR X99[rip], 2
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L32
.L123:
	nop
	jmp	.L32
.L124:
	nop
	jmp	.L32
.L125:
	nop
.L32:
	movzx	eax, BYTE PTR B10[rip]
	test	al, al
	jne	.L36
	mov	BYTE PTR X90[rip], 3
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
.L36:
	mov	BYTE PTR B11[rip], 0
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	movzx	eax, BYTE PTR B16[rip]
	test	al, al
	jne	.L37
	mov	BYTE PTR X100[rip], 1
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
.L37:
	mov	BYTE PTR B17[rip], 0
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	movzx	eax, BYTE PTR B19[rip]
	test	al, al
	jne	.L38
	mov	BYTE PTR B0[rip], 0
	mov	BYTE PTR X102[rip], 1
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
.L38:
	mov	BYTE PTR B20[rip], 0
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	movzx	eax, BYTE PTR B13[rip]
	test	al, al
	jne	.L39
	mov	BYTE PTR B4[rip], 0
	mov	BYTE PTR B6[rip], 0
	mov	BYTE PTR X91[rip], 2
	mov	DWORD PTR X7[rip], 0
	mov	BYTE PTR X92[rip], 1
	mov	BYTE PTR B5[rip], 1
	mov	BYTE PTR X93[rip], 1
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
.L39:
	mov	BYTE PTR B14[rip], 0
	mov	BYTE PTR B11[rip], 1
	mov	BYTE PTR B17[rip], 1
	mov	BYTE PTR B20[rip], 1
	mov	BYTE PTR B14[rip], 1
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	movzx	edx, BYTE PTR X68[rip]
	movzx	eax, BYTE PTR X70[rip]
	cmp	dl, al
	je	.L40
	movzx	eax, BYTE PTR X77[rip]
	test	al, al
	jne	.L40
	movzx	eax, BYTE PTR X68[rip]
	mov	BYTE PTR X60[rip], al
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
.L40:
	movzx	edx, BYTE PTR X71[rip]
	movzx	eax, BYTE PTR X72[rip]
	cmp	dl, al
	je	.L41
	movzx	eax, BYTE PTR X77[rip]
	test	al, al
	je	.L41
	movzx	eax, BYTE PTR X71[rip]
	mov	BYTE PTR X68[rip], al
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
.L41:
	movzx	edx, BYTE PTR X65[rip]
	movzx	eax, BYTE PTR X67[rip]
	cmp	dl, al
	je	.L42
	movzx	eax, BYTE PTR X77[rip]
	test	al, al
	jne	.L42
	movzx	eax, BYTE PTR X65[rip]
	mov	BYTE PTR X61[rip], al
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
.L42:
	movzx	edx, BYTE PTR X73[rip]
	movzx	eax, BYTE PTR X74[rip]
	cmp	dl, al
	je	.L43
	movzx	eax, BYTE PTR X77[rip]
	test	al, al
	je	.L43
	movzx	eax, BYTE PTR X73[rip]
	mov	BYTE PTR X65[rip], al
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
.L43:
	movzx	eax, BYTE PTR B12[rip]
	mov	BYTE PTR B10[rip], al
	movzx	eax, BYTE PTR B15[rip]
	mov	BYTE PTR B13[rip], al
	movzx	eax, BYTE PTR B18[rip]
	mov	BYTE PTR B16[rip], al
	movzx	eax, BYTE PTR B21[rip]
	mov	BYTE PTR B19[rip], al
	movzx	eax, BYTE PTR X76[rip]
	mov	BYTE PTR X36[rip], al
	movzx	eax, BYTE PTR X61[rip]
	mov	BYTE PTR X34[rip], al
	movzx	eax, BYTE PTR X75[rip]
	mov	BYTE PTR X32[rip], al
	movzx	eax, BYTE PTR X60[rip]
	mov	BYTE PTR X30[rip], al
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	movzx	eax, BYTE PTR X52[rip]
	mov	BYTE PTR X84[rip], al
	movzx	eax, BYTE PTR X49[rip]
	mov	BYTE PTR X81[rip], al
	mov	eax, DWORD PTR X13[rip]
	mov	DWORD PTR X18[rip], eax
	movzx	eax, BYTE PTR X55[rip]
	mov	BYTE PTR X63[rip], al
	mov	eax, DWORD PTR X12[rip]
	mov	DWORD PTR X17[rip], eax
	movzx	eax, BYTE PTR X42[rip]
	mov	BYTE PTR X62[rip], al
	movzx	eax, BYTE PTR X36[rip]
	mov	BYTE PTR X76[rip], al
	movzx	eax, BYTE PTR X34[rip]
	mov	BYTE PTR X61[rip], al
	movzx	eax, BYTE PTR X32[rip]
	mov	BYTE PTR X75[rip], al
	movzx	eax, BYTE PTR X30[rip]
	mov	BYTE PTR X60[rip], al
	movzx	eax, BYTE PTR X38[rip]
	mov	BYTE PTR X59[rip], al
	movzx	eax, BYTE PTR X39[rip]
	mov	BYTE PTR X78[rip], al
	movzx	eax, BYTE PTR X76[rip]
	mov	BYTE PTR X36[rip], al
	movzx	eax, BYTE PTR X61[rip]
	mov	BYTE PTR X34[rip], al
	movzx	eax, BYTE PTR X75[rip]
	mov	BYTE PTR X32[rip], al
	movzx	eax, BYTE PTR X60[rip]
	mov	BYTE PTR X30[rip], al
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	movzx	eax, BYTE PTR B13[rip]
	test	al, al
	jne	.L44
	movzx	eax, BYTE PTR B15[rip]
	test	al, al
	je	.L44
	movzx	eax, BYTE PTR B14[rip]
	test	al, al
	jne	.L44
	mov	BYTE PTR B4[rip], 0
	mov	BYTE PTR B6[rip], 0
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
.L44:
	movzx	eax, BYTE PTR B13[rip]
	test	al, al
	je	.L45
	movzx	eax, BYTE PTR B10[rip]
	test	al, al
	jne	.L46
	mov	BYTE PTR X90[rip], 3
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
.L46:
	mov	BYTE PTR B11[rip], 0
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	movzx	eax, BYTE PTR B19[rip]
	test	al, al
	jne	.L47
	mov	BYTE PTR B0[rip], 0
	mov	BYTE PTR X102[rip], 1
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
.L47:
	mov	BYTE PTR B20[rip], 0
	mov	BYTE PTR B11[rip], 1
	mov	BYTE PTR B20[rip], 1
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	movzx	eax, BYTE PTR X91[rip]
	movsx	eax, al
	cmp	eax, 3
	je	.L48
	cmp	eax, 3
	jg	.L49
	cmp	eax, 1
	je	.L50
	cmp	eax, 2
	je	.L51
	jmp	.L49
.L50:
	mov	eax, DWORD PTR X7[rip]
	cmp	eax, 59
	jne	.L126
	mov	eax, DWORD PTR X9[rip]
	cmp	eax, 59
	je	.L126
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR X91[rip], 3
	mov	BYTE PTR X94[rip], 3
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L53
.L51:
	movzx	eax, BYTE PTR X39[rip]
	test	al, al
	je	.L54
	movzx	eax, BYTE PTR X41[rip]
	test	al, al
	jne	.L54
	movzx	eax, BYTE PTR X49[rip]
	test	al, al
	je	.L54
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR X50[rip], 0
	mov	rax, QWORD PTR time[rip]
	mov	QWORD PTR X6[rip], rax
	mov	BYTE PTR X91[rip], 3
	mov	BYTE PTR X94[rip], 3
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L53
.L54:
	movzx	eax, BYTE PTR X87[rip]
	movsx	eax, al
	cmp	eax, 3
	je	.L55
	cmp	eax, 3
	jg	.L56
	cmp	eax, 1
	je	.L57
	cmp	eax, 2
	je	.L58
	jmp	.L56
.L57:
	movzx	eax, BYTE PTR X43[rip]
	test	al, al
	jne	.L127
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR X50[rip], 0
	mov	BYTE PTR X87[rip], 3
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L60
.L58:
	movzx	eax, BYTE PTR X46[rip]
	test	al, al
	jne	.L128
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR X53[rip], 0
	mov	BYTE PTR X87[rip], 3
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L60
.L55:
	movzx	eax, BYTE PTR X46[rip]
	test	al, al
	je	.L62
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR X53[rip], 1
	mov	BYTE PTR X87[rip], 2
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L60
.L62:
	movzx	eax, BYTE PTR X43[rip]
	test	al, al
	je	.L129
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR X50[rip], 1
	mov	BYTE PTR X87[rip], 1
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L60
.L56:
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR X87[rip], 3
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L60
.L127:
	nop
	jmp	.L53
.L128:
	nop
	jmp	.L53
.L129:
	nop
.L60:
	jmp	.L53
.L48:
	mov	eax, DWORD PTR X7[rip]
	cmp	eax, 60
	jle	.L64
	mov	eax, DWORD PTR X9[rip]
	cmp	eax, 60
	jg	.L64
	movzx	eax, BYTE PTR X26[rip]
	test	al, al
	jne	.L64
	movzx	eax, BYTE PTR X25[rip]
	test	al, al
	jne	.L64
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR X50[rip], 0
	mov	BYTE PTR X53[rip], 0
	mov	BYTE PTR X91[rip], 1
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L53
.L64:
	movzx	eax, BYTE PTR X39[rip]
	test	al, al
	je	.L65
	movzx	eax, BYTE PTR X41[rip]
	test	al, al
	jne	.L65
	movzx	eax, BYTE PTR X52[rip]
	test	al, al
	je	.L65
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR X53[rip], 0
	mov	rax, QWORD PTR time[rip]
	mov	QWORD PTR X4[rip], rax
	mov	BYTE PTR X91[rip], 2
	mov	BYTE PTR X87[rip], 3
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L53
.L65:
	movzx	eax, BYTE PTR X39[rip]
	test	al, al
	je	.L66
	movzx	eax, BYTE PTR X41[rip]
	test	al, al
	jne	.L66
	movzx	eax, BYTE PTR X49[rip]
	test	al, al
	je	.L66
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR X50[rip], 0
	mov	rax, QWORD PTR time[rip]
	mov	QWORD PTR X5[rip], rax
	mov	BYTE PTR X91[rip], 2
	mov	BYTE PTR X87[rip], 3
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L53
.L66:
	movzx	eax, BYTE PTR X94[rip]
	movsx	eax, al
	cmp	eax, 3
	je	.L67
	cmp	eax, 3
	jg	.L68
	cmp	eax, 1
	je	.L69
	cmp	eax, 2
	je	.L70
	jmp	.L68
.L69:
	mov	eax, DWORD PTR X12[rip]
	cmp	eax, 404
	jle	.L71
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR X53[rip], 0
	mov	BYTE PTR X94[rip], 3
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L72
.L71:
	movzx	eax, BYTE PTR X97[rip]
	movsx	eax, al
	cmp	eax, 1
	je	.L73
	cmp	eax, 2
	je	.L74
	jmp	.L119
.L73:
	movzx	eax, BYTE PTR X43[rip]
	test	al, al
	je	.L76
	movzx	eax, BYTE PTR X45[rip]
	test	al, al
	je	.L77
.L76:
	movzx	eax, BYTE PTR X46[rip]
	test	al, al
	je	.L130
	movzx	eax, BYTE PTR X48[rip]
	test	al, al
	jne	.L130
.L77:
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR X53[rip], 0
	mov	BYTE PTR X94[rip], 3
	mov	BYTE PTR X97[rip], 0
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L79
.L74:
	movzx	eax, BYTE PTR X43[rip]
	test	al, al
	je	.L80
	movzx	eax, BYTE PTR X45[rip]
	test	al, al
	jne	.L80
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR X97[rip], 1
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L79
.L80:
	movzx	eax, BYTE PTR X46[rip]
	test	al, al
	jne	.L131
	movzx	eax, BYTE PTR X48[rip]
	test	al, al
	je	.L131
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR X53[rip], 0
	mov	BYTE PTR X94[rip], 3
	mov	BYTE PTR X97[rip], 0
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L79
.L119:
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR X97[rip], 2
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L79
.L130:
	nop
	jmp	.L72
.L131:
	nop
.L79:
	jmp	.L72
.L70:
	mov	eax, DWORD PTR X12[rip]
	test	eax, eax
	jg	.L82
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR X50[rip], 0
	mov	BYTE PTR X94[rip], 3
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L72
.L82:
	movzx	eax, BYTE PTR X98[rip]
	movsx	eax, al
	cmp	eax, 1
	je	.L83
	cmp	eax, 2
	je	.L84
	jmp	.L120
.L83:
	movzx	eax, BYTE PTR X46[rip]
	test	al, al
	je	.L86
	movzx	eax, BYTE PTR X48[rip]
	test	al, al
	je	.L87
.L86:
	movzx	eax, BYTE PTR X43[rip]
	test	al, al
	je	.L88
	movzx	eax, BYTE PTR X45[rip]
	test	al, al
	jne	.L88
.L87:
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR X50[rip], 0
	mov	BYTE PTR X94[rip], 3
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L89
.L88:
	movzx	eax, BYTE PTR X95[rip]
	movsx	eax, al
	cmp	eax, 1
	je	.L90
	cmp	eax, 2
	je	.L91
	jmp	.L121
.L90:
	mov	BYTE PTR B23[rip], 0
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	movzx	eax, BYTE PTR B22[rip]
	test	al, al
	je	.L132
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR X50[rip], 1
	mov	BYTE PTR X27[rip], 0
	mov	BYTE PTR X95[rip], 2
	mov	BYTE PTR X53[rip], 0
	mov	BYTE PTR B17[rip], 1
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L94
.L91:
	movzx	eax, BYTE PTR B24[rip]
	test	al, al
	je	.L133
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR X27[rip], 1
	mov	BYTE PTR B23[rip], 1
	mov	BYTE PTR X95[rip], 1
	mov	BYTE PTR B17[rip], 0
	mov	BYTE PTR X50[rip], 0
	mov	rax, QWORD PTR time[rip]
	mov	QWORD PTR X10[rip], rax
	mov	BYTE PTR X53[rip], 1
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L94
.L121:
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR X95[rip], 2
	mov	BYTE PTR B17[rip], 1
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L94
.L132:
	nop
	jmp	.L89
.L133:
	nop
.L94:
	jmp	.L89
.L84:
	movzx	eax, BYTE PTR X43[rip]
	test	al, al
	jne	.L96
	movzx	eax, BYTE PTR X45[rip]
	test	al, al
	je	.L96
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR X50[rip], 0
	mov	BYTE PTR X94[rip], 3
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L89
.L96:
	movzx	eax, BYTE PTR X96[rip]
	movsx	eax, al
	cmp	eax, 1
	je	.L97
	cmp	eax, 2
	je	.L98
	jmp	.L122
.L97:
	mov	BYTE PTR B23[rip], 0
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	movzx	eax, BYTE PTR B22[rip]
	test	al, al
	je	.L134
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR X28[rip], 0
	mov	BYTE PTR X96[rip], 2
	mov	BYTE PTR X53[rip], 0
	mov	BYTE PTR B17[rip], 1
	mov	BYTE PTR X50[rip], 1
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L101
.L98:
	movzx	eax, BYTE PTR B24[rip]
	test	al, al
	je	.L102
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR X50[rip], 0
	mov	BYTE PTR X28[rip], 1
	mov	BYTE PTR B23[rip], 1
	mov	BYTE PTR X96[rip], 1
	mov	BYTE PTR B17[rip], 0
	mov	rax, QWORD PTR time[rip]
	mov	QWORD PTR X11[rip], rax
	mov	BYTE PTR X53[rip], 1
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L101
.L102:
	movzx	eax, BYTE PTR X46[rip]
	test	al, al
	je	.L135
	movzx	eax, BYTE PTR X48[rip]
	test	al, al
	jne	.L135
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR X98[rip], 1
	mov	BYTE PTR X96[rip], 0
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L101
.L122:
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR X96[rip], 2
	mov	BYTE PTR B17[rip], 1
	mov	BYTE PTR X50[rip], 1
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L101
.L134:
	nop
	jmp	.L89
.L135:
	nop
.L101:
	jmp	.L89
.L120:
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR X98[rip], 2
	mov	BYTE PTR X96[rip], 2
	mov	BYTE PTR B17[rip], 1
	mov	BYTE PTR X50[rip], 1
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	nop
.L89:
	jmp	.L72
.L67:
	movzx	eax, BYTE PTR X43[rip]
	test	al, al
	je	.L104
	movzx	eax, BYTE PTR X45[rip]
	test	al, al
	jne	.L104
	mov	eax, DWORD PTR X12[rip]
	test	eax, eax
	jle	.L104
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR X94[rip], 2
	mov	BYTE PTR X98[rip], 2
	mov	BYTE PTR X96[rip], 2
	mov	BYTE PTR B17[rip], 1
	mov	BYTE PTR X50[rip], 1
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L72
.L104:
	movzx	eax, BYTE PTR X46[rip]
	test	al, al
	je	.L136
	movzx	eax, BYTE PTR X48[rip]
	test	al, al
	jne	.L136
	mov	eax, DWORD PTR X12[rip]
	cmp	eax, 404
	jg	.L136
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR X53[rip], 1
	mov	BYTE PTR X94[rip], 1
	mov	BYTE PTR X97[rip], 2
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L72
.L68:
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR X94[rip], 3
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L72
.L136:
	nop
.L72:
	jmp	.L53
.L49:
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR X91[rip], 2
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L53
.L126:
	nop
.L53:
	movzx	eax, BYTE PTR X92[rip]
	movsx	eax, al
	cmp	eax, 1
	jne	.L106
	mov	BYTE PTR B5[rip], 0
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	movzx	eax, BYTE PTR step[rip]
	cmp	al, 1
	jne	.L107
	mov	rax, QWORD PTR X2[rip]
	test	rax, rax
	je	.L107
	mov	rax, QWORD PTR time[rip]
	mov	rdx, QWORD PTR X2[rip]
	sub	rax, rdx
	cmp	rax, 1
	jne	.L107
	movzx	eax, BYTE PTR X49[rip]
	test	al, al
	jne	.L108
	movzx	eax, BYTE PTR X52[rip]
	test	al, al
	je	.L107
.L108:
	mov	BYTE PTR stable[rip], 0
	mov	eax, DWORD PTR X7[rip]
	add	eax, 1
	mov	DWORD PTR X7[rip], eax
	mov	BYTE PTR X92[rip], 1
	mov	BYTE PTR B5[rip], 1
	mov	BYTE PTR X93[rip], 1
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L109
.L107:
	movzx	eax, BYTE PTR X93[rip]
	movsx	eax, al
	cmp	eax, 1
	jne	.L110
	movzx	eax, BYTE PTR step[rip]
	cmp	al, 1
	jne	.L137
	mov	rax, QWORD PTR X3[rip]
	test	rax, rax
	je	.L137
	mov	rax, QWORD PTR time[rip]
	mov	rdx, QWORD PTR X3[rip]
	sub	rax, rdx
	cmp	rax, 3
	jne	.L137
	movzx	eax, BYTE PTR X49[rip]
	test	al, al
	jne	.L137
	movzx	eax, BYTE PTR X52[rip]
	test	al, al
	jne	.L137
	mov	eax, DWORD PTR X7[rip]
	test	eax, eax
	jle	.L137
	mov	BYTE PTR stable[rip], 0
	mov	eax, DWORD PTR X7[rip]
	sub	eax, 1
	mov	DWORD PTR X7[rip], eax
	mov	BYTE PTR X93[rip], 1
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L112
.L110:
	mov	BYTE PTR stable[rip], 0
	mov	BYTE PTR B5[rip], 1
	mov	BYTE PTR X93[rip], 1
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	jmp	.L112
.L137:
	nop
.L112:
	jmp	.L109
.L106:
	mov	BYTE PTR stable[rip], 0
	mov	DWORD PTR X7[rip], 0
	mov	BYTE PTR X92[rip], 1
	mov	BYTE PTR B5[rip], 1
	mov	BYTE PTR X93[rip], 1
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	nop
.L109:
	movzx	eax, BYTE PTR B4[rip]
	mov	BYTE PTR B5[rip], al
	movzx	eax, BYTE PTR B6[rip]
	mov	BYTE PTR B7[rip], al
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
.L45:
	movzx	eax, BYTE PTR X52[rip]
	mov	BYTE PTR X84[rip], al
	movzx	eax, BYTE PTR X49[rip]
	mov	BYTE PTR X81[rip], al
	mov	eax, DWORD PTR X13[rip]
	mov	DWORD PTR X18[rip], eax
	movzx	eax, BYTE PTR X55[rip]
	mov	BYTE PTR X63[rip], al
	mov	eax, DWORD PTR X12[rip]
	mov	DWORD PTR X17[rip], eax
	movzx	eax, BYTE PTR X42[rip]
	mov	BYTE PTR X62[rip], al
	movzx	eax, BYTE PTR X36[rip]
	mov	BYTE PTR X76[rip], al
	movzx	eax, BYTE PTR X34[rip]
	mov	BYTE PTR X61[rip], al
	movzx	eax, BYTE PTR X32[rip]
	mov	BYTE PTR X75[rip], al
	movzx	eax, BYTE PTR X30[rip]
	mov	BYTE PTR X60[rip], al
	movzx	eax, BYTE PTR X38[rip]
	mov	BYTE PTR X59[rip], al
	movzx	eax, BYTE PTR X39[rip]
	mov	BYTE PTR X78[rip], al
	movzx	eax, BYTE PTR X76[rip]
	mov	BYTE PTR X36[rip], al
	movzx	eax, BYTE PTR X61[rip]
	mov	BYTE PTR X34[rip], al
	movzx	eax, BYTE PTR X75[rip]
	mov	BYTE PTR X32[rip], al
	movzx	eax, BYTE PTR X60[rip]
	mov	BYTE PTR X30[rip], al
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	movzx	eax, BYTE PTR X52[rip]
	mov	BYTE PTR X84[rip], al
	movzx	eax, BYTE PTR X49[rip]
	mov	BYTE PTR X81[rip], al
	mov	eax, DWORD PTR X13[rip]
	mov	DWORD PTR X18[rip], eax
	movzx	eax, BYTE PTR X55[rip]
	mov	BYTE PTR X63[rip], al
	mov	eax, DWORD PTR X12[rip]
	mov	DWORD PTR X17[rip], eax
	movzx	eax, BYTE PTR X42[rip]
	mov	BYTE PTR X62[rip], al
	movzx	eax, BYTE PTR X36[rip]
	mov	BYTE PTR X76[rip], al
	movzx	eax, BYTE PTR X34[rip]
	mov	BYTE PTR X61[rip], al
	movzx	eax, BYTE PTR X32[rip]
	mov	BYTE PTR X75[rip], al
	movzx	eax, BYTE PTR X30[rip]
	mov	BYTE PTR X60[rip], al
	movzx	eax, BYTE PTR X38[rip]
	mov	BYTE PTR X59[rip], al
	movzx	eax, BYTE PTR X39[rip]
	mov	BYTE PTR X78[rip], al
	movzx	eax, BYTE PTR X76[rip]
	mov	BYTE PTR X36[rip], al
	movzx	eax, BYTE PTR X61[rip]
	mov	BYTE PTR X34[rip], al
	movzx	eax, BYTE PTR X75[rip]
	mov	BYTE PTR X32[rip], al
	movzx	eax, BYTE PTR X60[rip]
	mov	BYTE PTR X30[rip], al
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	movzx	eax, BYTE PTR X52[rip]
	mov	BYTE PTR X84[rip], al
	movzx	eax, BYTE PTR X49[rip]
	mov	BYTE PTR X81[rip], al
	mov	eax, DWORD PTR X13[rip]
	mov	DWORD PTR X18[rip], eax
	movzx	eax, BYTE PTR X55[rip]
	mov	BYTE PTR X63[rip], al
	mov	eax, DWORD PTR X12[rip]
	mov	DWORD PTR X17[rip], eax
	movzx	eax, BYTE PTR X42[rip]
	mov	BYTE PTR X62[rip], al
	movzx	eax, BYTE PTR X36[rip]
	mov	BYTE PTR X76[rip], al
	movzx	eax, BYTE PTR X34[rip]
	mov	BYTE PTR X61[rip], al
	movzx	eax, BYTE PTR X32[rip]
	mov	BYTE PTR X75[rip], al
	movzx	eax, BYTE PTR X30[rip]
	mov	BYTE PTR X60[rip], al
	movzx	eax, BYTE PTR X38[rip]
	mov	BYTE PTR X59[rip], al
	movzx	eax, BYTE PTR X39[rip]
	mov	BYTE PTR X78[rip], al
	movzx	eax, BYTE PTR B10[rip]
	mov	BYTE PTR B11[rip], al
	movzx	eax, BYTE PTR B13[rip]
	mov	BYTE PTR B14[rip], al
	movzx	eax, BYTE PTR B16[rip]
	mov	BYTE PTR B17[rip], al
	movzx	eax, BYTE PTR B19[rip]
	mov	BYTE PTR B20[rip], al
	mov	eax, DWORD PTR X7[rip]
	mov	DWORD PTR X9[rip], eax
	mov	eax, DWORD PTR X13[rip]
	mov	DWORD PTR X14[rip], eax
	mov	eax, DWORD PTR X16[rip]
	mov	DWORD PTR X15[rip], eax
	mov	eax, DWORD PTR X18[rip]
	mov	DWORD PTR X19[rip], eax
	mov	eax, DWORD PTR X22[rip]
	mov	DWORD PTR X24[rip], eax
	movzx	eax, BYTE PTR X30[rip]
	mov	BYTE PTR X31[rip], al
	movzx	eax, BYTE PTR X32[rip]
	mov	BYTE PTR X33[rip], al
	movzx	eax, BYTE PTR X34[rip]
	mov	BYTE PTR X35[rip], al
	movzx	eax, BYTE PTR X36[rip]
	mov	BYTE PTR X37[rip], al
	movzx	eax, BYTE PTR X40[rip]
	mov	BYTE PTR X39[rip], al
	movzx	eax, BYTE PTR X39[rip]
	mov	BYTE PTR X41[rip], al
	movzx	eax, BYTE PTR X44[rip]
	mov	BYTE PTR X43[rip], al
	movzx	eax, BYTE PTR X43[rip]
	mov	BYTE PTR X45[rip], al
	movzx	eax, BYTE PTR X47[rip]
	mov	BYTE PTR X46[rip], al
	movzx	eax, BYTE PTR X46[rip]
	mov	BYTE PTR X48[rip], al
	movzx	eax, BYTE PTR X50[rip]
	mov	BYTE PTR X49[rip], al
	movzx	eax, BYTE PTR X49[rip]
	mov	BYTE PTR X51[rip], al
	movzx	eax, BYTE PTR X53[rip]
	mov	BYTE PTR X52[rip], al
	movzx	eax, BYTE PTR X52[rip]
	mov	BYTE PTR X54[rip], al
	movzx	eax, BYTE PTR X55[rip]
	mov	BYTE PTR X56[rip], al
	movzx	eax, BYTE PTR X63[rip]
	mov	BYTE PTR X64[rip], al
	movzx	eax, BYTE PTR X65[rip]
	mov	BYTE PTR X67[rip], al
	movzx	eax, BYTE PTR X68[rip]
	mov	BYTE PTR X70[rip], al
	movzx	eax, BYTE PTR X71[rip]
	mov	BYTE PTR X72[rip], al
	movzx	eax, BYTE PTR X73[rip]
	mov	BYTE PTR X74[rip], al
	movzx	eax, BYTE PTR X79[rip]
	mov	BYTE PTR X78[rip], al
	movzx	eax, BYTE PTR X78[rip]
	mov	BYTE PTR X80[rip], al
	movzx	eax, BYTE PTR X82[rip]
	mov	BYTE PTR X81[rip], al
	movzx	eax, BYTE PTR X81[rip]
	mov	BYTE PTR X83[rip], al
	movzx	eax, BYTE PTR X85[rip]
	mov	BYTE PTR X84[rip], al
	movzx	eax, BYTE PTR X84[rip]
	mov	BYTE PTR X86[rip], al
	mov	eax, DWORD PTR t[rip]
	add	eax, 1
	mov	DWORD PTR t[rip], eax
	mov	eax, DWORD PTR t[rip]
	cmp	eax, 34
	setg	al
	movzx	eax, al
	mov	edi, eax
	mov	eax, 0
	call	_TRACER_abort@PLT
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	main, .-main
	.section	.rodata
	.align 8
.LC0:
	.long	0
	.long	1071644672
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"154829301.c"
	.text
	.local	B0
	.comm	B0,1,1
	.local	B1
	.comm	B1,1,1
	.local	B2
	.comm	B2,1,1
	.local	B3
	.comm	B3,1,1
	.local	B4
	.comm	B4,1,1
	.local	B5
	.comm	B5,1,1
	.local	B6
	.comm	B6,1,1
	.local	B7
	.comm	B7,1,1
	.local	B8
	.comm	B8,1,1
	.local	B9
	.comm	B9,1,1
	.local	B10
	.comm	B10,1,1
	.local	B11
	.comm	B11,1,1
	.local	B12
	.comm	B12,1,1
	.local	B13
	.comm	B13,1,1
	.local	B14
	.comm	B14,1,1
	.local	B15
	.comm	B15,1,1
	.local	B16
	.comm	B16,1,1
	.local	B17
	.comm	B17,1,1
	.local	B18
	.comm	B18,1,1
	.local	B19
	.comm	B19,1,1
	.local	B20
	.comm	B20,1,1
	.local	B21
	.comm	B21,1,1
	.local	B22
	.comm	B22,1,1
	.local	B23
	.comm	B23,1,1
	.local	B24
	.comm	B24,1,1
	.local	B25
	.comm	B25,1,1
	.local	B26
	.comm	B26,1,1
	.local	B27
	.comm	B27,1,1
	.local	B28
	.comm	B28,1,1
	.local	B29
	.comm	B29,1,1
	.local	B30
	.comm	B30,1,1
	.local	B31
	.comm	B31,1,1
	.local	B32
	.comm	B32,1,1
	.local	B33
	.comm	B33,1,1
	.local	B34
	.comm	B34,1,1
	.local	B35
	.comm	B35,1,1
	.local	B36
	.comm	B36,1,1
	.local	B37
	.comm	B37,1,1
	.local	B38
	.comm	B38,1,1
	.local	B39
	.comm	B39,1,1
	.local	B40
	.comm	B40,1,1
	.local	B41
	.comm	B41,1,1
	.local	B42
	.comm	B42,1,1
	.local	B43
	.comm	B43,1,1
	.local	B44
	.comm	B44,1,1
	.local	B45
	.comm	B45,1,1
	.local	B46
	.comm	B46,1,1
	.local	B47
	.comm	B47,1,1
	.local	B48
	.comm	B48,1,1
	.local	B49
	.comm	B49,1,1
	.local	B50
	.comm	B50,1,1
	.local	B51
	.comm	B51,1,1
	.local	B52
	.comm	B52,1,1
	.local	B53
	.comm	B53,1,1
	.local	B54
	.comm	B54,1,1
	.local	B55
	.comm	B55,1,1
	.local	B56
	.comm	B56,1,1
	.local	B57
	.comm	B57,1,1
	.local	B58
	.comm	B58,1,1
	.local	B59
	.comm	B59,1,1
	.local	B60
	.comm	B60,1,1
	.local	B61
	.comm	B61,1,1
	.local	B62
	.comm	B62,1,1
	.local	B63
	.comm	B63,1,1
	.comm	X1,4,4
	.comm	X2,4,4
	.comm	X3,4,4
	.comm	X4,4,4
	.comm	X5,4,4
	.comm	X6,4,4
	.comm	X7,4,4
	.comm	X8,4,4
	.comm	X9,4,4
	.comm	X10,4,4
	.comm	X11,4,4
	.comm	X12,4,4
	.comm	X13,4,4
	.comm	X14,4,4
	.comm	X15,4,4
	.comm	X16,4,4
	.comm	X17,4,4
	.comm	X18,4,4
	.comm	X19,4,4
	.comm	X20,4,4
	.comm	X21,4,4
	.comm	X22,4,4
	.comm	X23,4,4
	.comm	X24,4,4
	.comm	X25,1,1
	.comm	X27,1,1
	.comm	X26,1,1
	.comm	X28,1,1
	.comm	X29,1,1
	.comm	X30,1,1
	.comm	X31,1,1
	.comm	X32,1,1
	.comm	X33,1,1
	.comm	X34,1,1
	.comm	X35,1,1
	.comm	X36,1,1
	.comm	X37,1,1
	.comm	X38,1,1
	.comm	X39,1,1
	.comm	X40,1,1
	.comm	X41,1,1
	.comm	X42,1,1
	.comm	X43,1,1
	.comm	X44,1,1
	.comm	X45,1,1
	.comm	X46,1,1
	.comm	X47,1,1
	.comm	X48,1,1
	.comm	X49,1,1
	.comm	X50,1,1
	.comm	X51,1,1
	.comm	X52,1,1
	.comm	X53,1,1
	.comm	X54,1,1
	.comm	X55,1,1
	.comm	X56,1,1
	.comm	X57,1,1
	.comm	X58,1,1
	.comm	X59,1,1
	.comm	X60,1,1
	.comm	X61,1,1
	.comm	X62,1,1
	.comm	X63,1,1
	.comm	X64,1,1
	.comm	X65,1,1
	.comm	X66,1,1
	.comm	X67,1,1
	.comm	X68,1,1
	.comm	X69,1,1
	.comm	X70,1,1
	.comm	X71,1,1
	.comm	X72,1,1
	.comm	X73,1,1
	.comm	X74,1,1
	.comm	X75,1,1
	.comm	X76,1,1
	.comm	X77,1,1
	.comm	X78,1,1
	.comm	X79,1,1
	.comm	X80,1,1
	.comm	X81,1,1
	.comm	X82,1,1
	.comm	X83,1,1
	.comm	X84,1,1
	.comm	X85,1,1
	.comm	X86,1,1
	.comm	time,4,4
	.comm	stable,1,1
	.comm	step,1,1
	.comm	X87,1,1
	.comm	X88,1,1
	.comm	X89,1,1
	.comm	X90,1,1
	.comm	X91,1,1
	.comm	X92,1,1
	.comm	X93,1,1
	.comm	X94,1,1
	.comm	X95,1,1
	.comm	X96,1,1
	.comm	X97,1,1
	.comm	X98,1,1
	.comm	X99,1,1
	.comm	X100,1,1
	.comm	X101,1,1
	.comm	X102,1,1
	.comm	t,4,4
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L118
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L118+4
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L118+8
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L118+12
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L118+16
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+20
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+24
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+28
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+32
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+36
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+40
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+44
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+48
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+52
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+56
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+60
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+64
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+68
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+72
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+76
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
	ldr	r3, .L118+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L2
	ldr	r3, .L118+84
	ldr	r3, [r3]
	ldr	r2, .L118+12
	str	r3, [r2]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
.L2:
	ldr	r3, .L118+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L3
	ldr	r3, .L118+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L3:
	ldr	r3, .L118+84
	ldr	r3, [r3]
	ldr	r2, .L118+8
	str	r3, [r2]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
.L4:
	ldr	r3, .L118+92
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L5
	ldr	r3, .L118+84
	ldr	r2, [r3]
	ldr	r3, .L118+92
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L5
	ldr	r3, .L118+176
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+92
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
.L5:
	ldr	r3, .L118+96
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L6
	ldr	r3, .L118+84
	ldr	r2, [r3]
	ldr	r3, .L118+96
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L6
	ldr	r3, .L118+416
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+96
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
.L6:
	ldr	r3, .L118+100
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L7
	ldr	r3, .L118+84
	ldr	r2, [r3]
	ldr	r3, .L118+100
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L7
	ldr	r3, .L118+416
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+100
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
.L7:
	ldr	r3, .L118+140
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L118+84
	ldr	r2, [r3]
	ldr	r3, .L118+140
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L8
	ldr	r3, .L118+140
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
.L8:
	ldr	r3, .L118+164
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L9
	ldr	r3, .L118+84
	ldr	r2, [r3]
	ldr	r3, .L118+164
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L9
	ldr	r3, .L118+164
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
.L9:
	ldr	r3, .L118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L10
	ldr	r3, .L118+340
	ldr	r2, [r3]
	ldr	r3, .L118+344
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L11
.L10:
	ldr	r3, .L118+84
	ldr	r3, [r3]
	ldr	r2, .L118+4
	str	r3, [r2]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
.L11:
	ldr	r3, .L118+84
	mov	r2, #1
	str	r2, [r3]
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+196
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
	ldr	r3, .L118+208
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L118+196
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
	ldr	r3, .L118+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #3
	beq	.L12
	cmp	r3, #3
	bgt	.L13
	cmp	r3, #1
	beq	.L14
	cmp	r3, #2
	beq	.L15
	b	.L13
.L14:
	ldr	r3, .L118+504
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L103
	ldr	r3, .L118+508
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L103
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+328
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L118+64
	mov	r2, #2
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
	b	.L17
.L15:
	ldr	r3, .L118+504
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L18
	ldr	r3, .L118+508
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L18
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+328
	mvn	r2, #99
	str	r2, [r3]
	ldr	r3, .L118+64
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
	b	.L17
.L18:
	ldr	r3, .L118+516
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L104
	ldr	r3, .L118+520
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L104
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+328
	mov	r2, #100
	str	r2, [r3]
	ldr	r3, .L118+64
	mov	r2, #3
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
	b	.L17
.L12:
	ldr	r3, .L118+516
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L105
	ldr	r3, .L118+520
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L105
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+328
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L118+64
	mov	r2, #2
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
	b	.L17
.L13:
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+328
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L118+64
	mov	r2, #2
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
	b	.L17
.L103:
	nop
	b	.L17
.L104:
	nop
	b	.L17
.L105:
	nop
.L17:
	ldr	r3, .L118+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L21
	ldr	r3, .L118+28
	mov	r2, #3
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
.L21:
	ldr	r3, .L118+280
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
	ldr	r3, .L118+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L22
	ldr	r3, .L118+68
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
.L22:
	ldr	r3, .L118+296
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
	ldr	r3, .L118+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L23
	ldr	r3, .L118+104
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+76
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
.L23:
	ldr	r3, .L118+304
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
	ldr	r3, .L118+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L24
	ldr	r3, .L118+80
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+88
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+32
	mov	r2, #2
	strb	r2, [r3]
	ldr	r3, .L118+308
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L118+36
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+224
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+40
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
.L24:
	ldr	r3, .L118+288
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+280
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+296
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+304
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+288
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
	ldr	r3, .L118+464
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+468
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r2, r3
	beq	.L25
	ldr	r3, .L118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L25
	ldr	r3, .L118+464
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+264
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
.L25:
	ldr	r3, .L118+472
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+476
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r2, r3
	beq	.L26
	ldr	r3, .L118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L26
	ldr	r3, .L118+472
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+464
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
.L26:
	ldr	r3, .L118+456
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+460
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r2, r3
	beq	.L27
	ldr	r3, .L118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L27
	ldr	r3, .L118+456
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+256
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
.L27:
	ldr	r3, .L118+480
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r2, r3
	beq	.L28
	ldr	r3, .L118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L28
	ldr	r3, .L118+480
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+456
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
.L28:
	ldr	r3, .L118+112
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+276
	strb	r2, [r3]
	ldr	r3, .L118+116
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+284
	strb	r2, [r3]
	ldr	r3, .L118+120
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+292
	strb	r2, [r3]
	ldr	r3, .L118+124
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+300
	strb	r2, [r3]
	ldr	r3, .L118+252
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+372
	strb	r2, [r3]
	ldr	r3, .L118+256
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+364
	strb	r2, [r3]
	ldr	r3, .L118+260
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+356
	strb	r2, [r3]
	ldr	r3, .L118+264
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+348
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
	ldr	r3, .L118+432
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+516
	strb	r2, [r3]
	ldr	r3, .L118+420
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+504
	strb	r2, [r3]
	ldr	r3, .L118+316
	ldr	r3, [r3]
	ldr	r2, .L118+332
	str	r3, [r2]
	ldr	r3, .L118+440
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+448
	strb	r2, [r3]
	ldr	r3, .L118+236
	ldr	r3, [r3]
	ldr	r2, .L118+240
	str	r3, [r2]
	ldr	r3, .L118+244
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+248
	strb	r2, [r3]
	ldr	r3, .L118+372
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+252
	strb	r2, [r3]
	ldr	r3, .L118+364
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+256
	strb	r2, [r3]
	ldr	r3, .L118+356
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+260
	strb	r2, [r3]
	ldr	r3, .L118+348
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+264
	strb	r2, [r3]
	ldr	r3, .L118+268
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+272
	strb	r2, [r3]
	ldr	r3, .L118+384
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+492
	strb	r2, [r3]
	ldr	r3, .L118+252
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+372
	strb	r2, [r3]
	ldr	r3, .L118+256
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+364
	strb	r2, [r3]
	ldr	r3, .L118+260
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+356
	strb	r2, [r3]
	ldr	r3, .L118+264
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+348
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
	ldr	r3, .L118+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L29
	ldr	r3, .L118+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L29
	ldr	r3, .L118+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L29
	ldr	r3, .L118+80
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+88
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
.L29:
	ldr	r3, .L118+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L30
	ldr	r3, .L118+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L31
	ldr	r3, .L118+28
	mov	r2, #3
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
.L31:
	ldr	r3, .L118+280
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
	ldr	r3, .L118+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L32
	ldr	r3, .L118+104
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+76
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
.L32:
	ldr	r3, .L118+304
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+280
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+304
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
	ldr	r3, .L118+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #3
	beq	.L33
	cmp	r3, #3
	bgt	.L34
	cmp	r3, #1
	beq	.L35
	cmp	r3, #2
	beq	.L36
	b	.L34
.L35:
	ldr	r3, .L118+308
	ldr	r3, [r3]
	cmp	r3, #59
	bne	.L106
	ldr	r3, .L118+312
	ldr	r3, [r3]
	cmp	r3, #59
	beq	.L106
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+32
	mov	r2, #3
	strb	r2, [r3]
	ldr	r3, .L118+44
	mov	r2, #3
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
	b	.L38
.L36:
	ldr	r3, .L118+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L39
	ldr	r3, .L118+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L39
	ldr	r3, .L118+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L39
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+416
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+84
	ldr	r3, [r3]
	ldr	r2, .L118+100
	str	r3, [r2]
	ldr	r3, .L118+32
	mov	r2, #3
	strb	r2, [r3]
	ldr	r3, .L118+44
	mov	r2, #3
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
	b	.L38
.L39:
	ldr	r3, .L118+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #3
	beq	.L40
	cmp	r3, #3
	bgt	.L41
	cmp	r3, #1
	beq	.L42
	cmp	r3, #2
	beq	.L43
	b	.L41
.L42:
	ldr	r3, .L118+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L107
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+416
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+16
	mov	r2, #3
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
	b	.L45
.L43:
	ldr	r3, .L118+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L108
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+176
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+16
	mov	r2, #3
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
	b	.L45
.L40:
	ldr	r3, .L118+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L47
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+176
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+16
	mov	r2, #2
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
	b	.L45
.L47:
	ldr	r3, .L118+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L109
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+416
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+16
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
	b	.L45
.L41:
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+16
	mov	r2, #3
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
	b	.L45
.L107:
	nop
	b	.L38
.L108:
	nop
	b	.L38
.L109:
	nop
.L45:
	b	.L38
.L33:
	ldr	r3, .L118+308
	ldr	r3, [r3]
	cmp	r3, #60
	ble	.L49
	ldr	r3, .L118+312
	ldr	r3, [r3]
	cmp	r3, #60
	bgt	.L49
	ldr	r3, .L118+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L49
	ldr	r3, .L118+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L49
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+416
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+176
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+32
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
	b	.L38
.L49:
	ldr	r3, .L118+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L50
	ldr	r3, .L118+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L50
	ldr	r3, .L118+432
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L50
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+176
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+84
	ldr	r3, [r3]
	ldr	r2, .L118+92
	str	r3, [r2]
	ldr	r3, .L118+32
	mov	r2, #2
	strb	r2, [r3]
	ldr	r3, .L118+16
	mov	r2, #3
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
	b	.L38
.L50:
	ldr	r3, .L118+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L51
	ldr	r3, .L118+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L51
	ldr	r3, .L118+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L51
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+416
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+84
	ldr	r3, [r3]
	ldr	r2, .L118+96
	str	r3, [r2]
	ldr	r3, .L118+32
	mov	r2, #2
	strb	r2, [r3]
	ldr	r3, .L118+16
	mov	r2, #3
	strb	r2, [r3]
	ldr	r3, .L118
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118
	str	r3, [r2]
	b	.L38
.L51:
	ldr	r3, .L118+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #3
	beq	.L52
	cmp	r3, #3
	bgt	.L53
	cmp	r3, #1
	beq	.L54
	cmp	r3, #2
	beq	.L55
	b	.L53
.L119:
	.align	2
.L118:
	.word	t
	.word	X1
	.word	X2
	.word	X3
	.word	X87
	.word	X88
	.word	X89
	.word	X90
	.word	X91
	.word	X92
	.word	X93
	.word	X94
	.word	X95
	.word	X96
	.word	X97
	.word	X98
	.word	X99
	.word	X100
	.word	X101
	.word	X102
	.word	B4
	.word	time
	.word	B6
	.word	X4
	.word	X5
	.word	X6
	.word	B0
	.word	X77
	.word	B12
	.word	B15
	.word	B18
	.word	B21
	.word	X26
	.word	X25
	.word	X27
	.word	X10
	.word	X95
	.word	B22
	.word	B24
	.word	X28
	.word	B23
	.word	X11
	.word	X98
	.word	X96
	.word	X53
	.word	X97
	.word	X94
	.word	X91
	.word	X2
	.word	step
	.word	time
	.word	X3
	.word	stable
	.word	X92
	.word	X93
	.word	B4
	.word	B5
	.word	B6
	.word	B7
	.word	X12
	.word	X17
	.word	X42
	.word	X62
	.word	X76
	.word	X61
	.word	X75
	.word	X60
	.word	X38
	.word	X59
	.word	B10
	.word	B11
	.word	B13
	.word	B14
	.word	B16
	.word	B17
	.word	B19
	.word	B20
	.word	X7
	.word	X9
	.word	X13
	.word	X14
	.word	X16
	.word	X15
	.word	X18
	.word	X19
	.word	X22
	.word	X24
	.word	X30
	.word	X31
	.word	X32
	.word	X33
	.word	X34
	.word	X35
	.word	X36
	.word	X37
	.word	X40
	.word	X39
	.word	X41
	.word	X44
	.word	X43
	.word	X45
	.word	X47
	.word	X46
	.word	X48
	.word	X50
	.word	X49
	.word	X51
	.word	X53
	.word	X52
	.word	X54
	.word	X55
	.word	X56
	.word	X63
	.word	X64
	.word	X65
	.word	X67
	.word	X68
	.word	X70
	.word	X71
	.word	X72
	.word	X73
	.word	X74
	.word	X79
	.word	X78
	.word	X80
	.word	X82
	.word	X81
	.word	X83
	.word	X85
	.word	X84
	.word	X86
	.word	t
.L54:
	ldr	r3, .L118+236
	ldr	r3, [r3]
	cmp	r3, #404
	ble	.L56
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+176
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+184
	mov	r2, #3
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+524
	str	r3, [r2]
	b	.L57
.L56:
	ldr	r3, .L118+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #1
	beq	.L58
	cmp	r3, #2
	beq	.L59
	b	.L99
.L58:
	ldr	r3, .L118+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L61
	ldr	r3, .L118+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L62
.L61:
	ldr	r3, .L118+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L110
	ldr	r3, .L118+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L110
.L62:
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+176
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+184
	mov	r2, #3
	strb	r2, [r3]
	ldr	r3, .L118+180
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+524
	str	r3, [r2]
	b	.L64
.L59:
	ldr	r3, .L118+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L65
	ldr	r3, .L118+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L65
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+180
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+524
	str	r3, [r2]
	b	.L64
.L65:
	ldr	r3, .L118+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L111
	ldr	r3, .L118+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L111
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+176
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+184
	mov	r2, #3
	strb	r2, [r3]
	ldr	r3, .L118+180
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+524
	str	r3, [r2]
	b	.L64
.L99:
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+180
	mov	r2, #2
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+524
	str	r3, [r2]
	b	.L64
.L110:
	nop
	b	.L57
.L111:
	nop
.L64:
	b	.L57
.L55:
	ldr	r3, .L118+236
	ldr	r3, [r3]
	cmp	r3, #0
	bgt	.L67
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+416
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+184
	mov	r2, #3
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+524
	str	r3, [r2]
	b	.L57
.L67:
	ldr	r3, .L118+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #1
	beq	.L68
	cmp	r3, #2
	beq	.L69
	b	.L100
.L68:
	ldr	r3, .L118+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L71
	ldr	r3, .L118+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L72
.L71:
	ldr	r3, .L118+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L73
	ldr	r3, .L118+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L73
.L72:
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+416
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+184
	mov	r2, #3
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+524
	str	r3, [r2]
	b	.L74
.L73:
	ldr	r3, .L118+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #1
	beq	.L75
	cmp	r3, #2
	beq	.L76
	b	.L101
.L75:
	ldr	r3, .L118+160
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+524
	str	r3, [r2]
	ldr	r3, .L118+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L112
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+416
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+136
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+144
	mov	r2, #2
	strb	r2, [r3]
	ldr	r3, .L118+176
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+296
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+524
	str	r3, [r2]
	b	.L79
.L76:
	ldr	r3, .L118+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L113
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+136
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+160
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+144
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+296
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+416
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+200
	ldr	r3, [r3]
	ldr	r2, .L118+140
	str	r3, [r2]
	ldr	r3, .L118+176
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+524
	str	r3, [r2]
	b	.L79
.L101:
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+144
	mov	r2, #2
	strb	r2, [r3]
	ldr	r3, .L118+296
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+524
	str	r3, [r2]
	b	.L79
.L112:
	nop
	b	.L74
.L113:
	nop
.L79:
	b	.L74
.L69:
	ldr	r3, .L118+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L81
	ldr	r3, .L118+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L81
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+416
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+184
	mov	r2, #3
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+524
	str	r3, [r2]
	b	.L74
.L81:
	ldr	r3, .L118+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #1
	beq	.L82
	cmp	r3, #2
	beq	.L83
	b	.L102
.L82:
	ldr	r3, .L118+160
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+524
	str	r3, [r2]
	ldr	r3, .L118+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L114
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+156
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+172
	mov	r2, #2
	strb	r2, [r3]
	ldr	r3, .L118+176
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+296
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+416
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+524
	str	r3, [r2]
	b	.L86
.L83:
	ldr	r3, .L118+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L87
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+416
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+156
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+160
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+172
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+296
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+200
	ldr	r3, [r3]
	ldr	r2, .L118+164
	str	r3, [r2]
	ldr	r3, .L118+176
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+524
	str	r3, [r2]
	b	.L86
.L87:
	ldr	r3, .L118+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L115
	ldr	r3, .L118+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L115
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+168
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+172
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+524
	str	r3, [r2]
	b	.L86
.L102:
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+172
	mov	r2, #2
	strb	r2, [r3]
	ldr	r3, .L118+296
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+416
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+524
	str	r3, [r2]
	b	.L86
.L114:
	nop
	b	.L74
.L115:
	nop
.L86:
	b	.L74
.L100:
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+168
	mov	r2, #2
	strb	r2, [r3]
	ldr	r3, .L118+172
	mov	r2, #2
	strb	r2, [r3]
	ldr	r3, .L118+296
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+416
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+524
	str	r3, [r2]
	nop
.L74:
	b	.L57
.L52:
	ldr	r3, .L118+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L118+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L118+236
	ldr	r3, [r3]
	cmp	r3, #0
	ble	.L89
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+184
	mov	r2, #2
	strb	r2, [r3]
	ldr	r3, .L118+168
	mov	r2, #2
	strb	r2, [r3]
	ldr	r3, .L118+172
	mov	r2, #2
	strb	r2, [r3]
	ldr	r3, .L118+296
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+416
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+524
	str	r3, [r2]
	b	.L57
.L89:
	ldr	r3, .L118+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L116
	ldr	r3, .L118+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L116
	ldr	r3, .L118+236
	ldr	r3, [r3]
	cmp	r3, #404
	bgt	.L116
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+176
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+184
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+180
	mov	r2, #2
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+524
	str	r3, [r2]
	b	.L57
.L53:
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+184
	mov	r2, #3
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+524
	str	r3, [r2]
	b	.L57
.L116:
	nop
.L57:
	b	.L38
.L34:
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+188
	mov	r2, #2
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+524
	str	r3, [r2]
	b	.L38
.L106:
	nop
.L38:
	ldr	r3, .L118+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #1
	bne	.L91
	ldr	r3, .L118+224
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+524
	str	r3, [r2]
	ldr	r3, .L118+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #1
	bne	.L92
	ldr	r3, .L118+192
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L92
	ldr	r3, .L118+200
	ldr	r2, [r3]
	ldr	r3, .L118+192
	ldr	r3, [r3]
	sub	r3, r2, r3
	cmp	r3, #1
	bne	.L92
	ldr	r3, .L118+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L93
	ldr	r3, .L118+432
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L92
.L93:
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+308
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+308
	str	r3, [r2]
	ldr	r3, .L118+212
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+224
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+216
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+524
	str	r3, [r2]
	b	.L94
.L92:
	ldr	r3, .L118+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #1
	bne	.L95
	ldr	r3, .L118+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #1
	bne	.L117
	ldr	r3, .L118+204
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L118+200
	ldr	r2, [r3]
	ldr	r3, .L118+204
	ldr	r3, [r3]
	sub	r3, r2, r3
	cmp	r3, #3
	bne	.L117
	ldr	r3, .L118+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L117
	ldr	r3, .L118+432
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L117
	ldr	r3, .L118+308
	ldr	r3, [r3]
	cmp	r3, #0
	ble	.L117
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+308
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r2, .L118+308
	str	r3, [r2]
	ldr	r3, .L118+216
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+524
	str	r3, [r2]
	b	.L97
.L95:
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+224
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+216
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+524
	str	r3, [r2]
	b	.L97
.L117:
	nop
.L97:
	b	.L94
.L91:
	ldr	r3, .L118+208
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L118+308
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L118+212
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+224
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+216
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+524
	str	r3, [r2]
	nop
.L94:
	ldr	r3, .L118+220
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+224
	strb	r2, [r3]
	ldr	r3, .L118+228
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+232
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+524
	str	r3, [r2]
.L30:
	ldr	r3, .L118+432
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+516
	strb	r2, [r3]
	ldr	r3, .L118+420
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+504
	strb	r2, [r3]
	ldr	r3, .L118+316
	ldr	r3, [r3]
	ldr	r2, .L118+332
	str	r3, [r2]
	ldr	r3, .L118+440
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+448
	strb	r2, [r3]
	ldr	r3, .L118+236
	ldr	r3, [r3]
	ldr	r2, .L118+240
	str	r3, [r2]
	ldr	r3, .L118+244
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+248
	strb	r2, [r3]
	ldr	r3, .L118+372
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+252
	strb	r2, [r3]
	ldr	r3, .L118+364
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+256
	strb	r2, [r3]
	ldr	r3, .L118+356
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+260
	strb	r2, [r3]
	ldr	r3, .L118+348
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+264
	strb	r2, [r3]
	ldr	r3, .L118+268
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+272
	strb	r2, [r3]
	ldr	r3, .L118+384
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+492
	strb	r2, [r3]
	ldr	r3, .L118+252
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+372
	strb	r2, [r3]
	ldr	r3, .L118+256
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+364
	strb	r2, [r3]
	ldr	r3, .L118+260
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+356
	strb	r2, [r3]
	ldr	r3, .L118+264
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+348
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+524
	str	r3, [r2]
	ldr	r3, .L118+432
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+516
	strb	r2, [r3]
	ldr	r3, .L118+420
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+504
	strb	r2, [r3]
	ldr	r3, .L118+316
	ldr	r3, [r3]
	ldr	r2, .L118+332
	str	r3, [r2]
	ldr	r3, .L118+440
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+448
	strb	r2, [r3]
	ldr	r3, .L118+236
	ldr	r3, [r3]
	ldr	r2, .L118+240
	str	r3, [r2]
	ldr	r3, .L118+244
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+248
	strb	r2, [r3]
	ldr	r3, .L118+372
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+252
	strb	r2, [r3]
	ldr	r3, .L118+364
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+256
	strb	r2, [r3]
	ldr	r3, .L118+356
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+260
	strb	r2, [r3]
	ldr	r3, .L118+348
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+264
	strb	r2, [r3]
	ldr	r3, .L118+268
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+272
	strb	r2, [r3]
	ldr	r3, .L118+384
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+492
	strb	r2, [r3]
	ldr	r3, .L118+252
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+372
	strb	r2, [r3]
	ldr	r3, .L118+256
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+364
	strb	r2, [r3]
	ldr	r3, .L118+260
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+356
	strb	r2, [r3]
	ldr	r3, .L118+264
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+348
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L118+524
	str	r3, [r2]
	ldr	r3, .L118+432
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+516
	strb	r2, [r3]
	ldr	r3, .L118+420
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+504
	strb	r2, [r3]
	ldr	r3, .L118+316
	ldr	r3, [r3]
	ldr	r2, .L118+332
	str	r3, [r2]
	ldr	r3, .L118+440
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+448
	strb	r2, [r3]
	ldr	r3, .L118+236
	ldr	r3, [r3]
	ldr	r2, .L118+240
	str	r3, [r2]
	ldr	r3, .L118+244
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+248
	strb	r2, [r3]
	ldr	r3, .L118+372
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+252
	strb	r2, [r3]
	ldr	r3, .L118+364
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+256
	strb	r2, [r3]
	ldr	r3, .L118+356
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+260
	strb	r2, [r3]
	ldr	r3, .L118+348
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+264
	strb	r2, [r3]
	ldr	r3, .L118+268
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+272
	strb	r2, [r3]
	ldr	r3, .L118+384
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+492
	strb	r2, [r3]
	ldr	r3, .L118+276
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+280
	strb	r2, [r3]
	ldr	r3, .L118+284
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+288
	strb	r2, [r3]
	ldr	r3, .L118+292
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+296
	strb	r2, [r3]
	ldr	r3, .L118+300
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+304
	strb	r2, [r3]
	ldr	r3, .L118+308
	ldr	r3, [r3]
	ldr	r2, .L118+312
	str	r3, [r2]
	ldr	r3, .L118+316
	ldr	r3, [r3]
	ldr	r2, .L118+320
	str	r3, [r2]
	ldr	r3, .L118+324
	ldr	r3, [r3]
	ldr	r2, .L118+328
	str	r3, [r2]
	ldr	r3, .L118+332
	ldr	r3, [r3]
	ldr	r2, .L118+336
	str	r3, [r2]
	ldr	r3, .L118+340
	ldr	r3, [r3]
	ldr	r2, .L118+344
	str	r3, [r2]
	ldr	r3, .L118+348
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+352
	strb	r2, [r3]
	ldr	r3, .L118+356
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+360
	strb	r2, [r3]
	ldr	r3, .L118+364
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+368
	strb	r2, [r3]
	ldr	r3, .L118+372
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+376
	strb	r2, [r3]
	ldr	r3, .L118+380
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+384
	strb	r2, [r3]
	ldr	r3, .L118+384
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+388
	strb	r2, [r3]
	ldr	r3, .L118+392
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+396
	strb	r2, [r3]
	ldr	r3, .L118+396
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+400
	strb	r2, [r3]
	ldr	r3, .L118+404
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+408
	strb	r2, [r3]
	ldr	r3, .L118+408
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+412
	strb	r2, [r3]
	ldr	r3, .L118+416
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+420
	strb	r2, [r3]
	ldr	r3, .L118+420
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+424
	strb	r2, [r3]
	ldr	r3, .L118+428
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+432
	strb	r2, [r3]
	ldr	r3, .L118+432
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+436
	strb	r2, [r3]
	ldr	r3, .L118+440
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+444
	strb	r2, [r3]
	ldr	r3, .L118+448
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+452
	strb	r2, [r3]
	ldr	r3, .L118+456
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+460
	strb	r2, [r3]
	ldr	r3, .L118+464
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+468
	strb	r2, [r3]
	ldr	r3, .L118+472
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+476
	strb	r2, [r3]
	ldr	r3, .L118+480
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+484
	strb	r2, [r3]
	ldr	r3, .L118+488
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+492
	strb	r2, [r3]
	ldr	r3, .L118+492
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+496
	strb	r2, [r3]
	ldr	r3, .L118+500
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+504
	strb	r2, [r3]
	ldr	r3, .L118+504
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+508
	strb	r2, [r3]
	ldr	r3, .L118+512
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+516
	strb	r2, [r3]
	ldr	r3, .L118+516
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L118+520
	strb	r2, [r3]
	ldr	r3, .L118+524
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L120
	str	r3, [r2]
	ldr	r3, .L120
	ldr	r3, [r3]
	cmp	r3, #34
	movgt	r3, #1
	movle	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	_TRACER_abort
	mov	r3, #0
	mov	r0, r3
	pop	{fp, pc}
.L121:
	.align	2
.L120:
	.word	t
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
