	.file	"3262172.c"
	.intel_syntax noprefix
	.text
	.globl	foo
	.type	foo, @function
foo:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	.cfi_offset 3, -24
	mov	eax, edi
	movaps	XMMWORD PTR -48[rbp], xmm0
	movaps	XMMWORD PTR -64[rbp], xmm1
	movaps	XMMWORD PTR -80[rbp], xmm2
	movaps	XMMWORD PTR -96[rbp], xmm3
	movaps	XMMWORD PTR -112[rbp], xmm4
	mov	WORD PTR -20[rbp], ax
	mov	eax, DWORD PTR -92[rbp]
	not	eax
	mov	ebx, eax
	movdqa	xmm0, XMMWORD PTR -112[rbp]
	movq	rax, xmm0
	mov	edx, 0
	div	rbx
	mov	rsi, rax
	movhlps	xmm5, xmm0
	movq	rax, xmm5
	mov	ebx, 0
	mov	edx, 0
	div	rbx
	mov	QWORD PTR -32[rbp], rax
	movq	xmm0, rsi
	movhps	xmm0, QWORD PTR -32[rbp]
	movaps	XMMWORD PTR -112[rbp], xmm0
	mov	WORD PTR -20[rbp], 0
	movzx	eax, WORD PTR -20[rbp]
	mov	edi, DWORD PTR -88[rbp]
	mov	edx, 0
	div	edi
	mov	WORD PTR -20[rbp], ax
	movdqa	xmm0, XMMWORD PTR -112[rbp]
	movdqa	xmm1, XMMWORD PTR -80[rbp]
	psubq	xmm0, xmm1
	movaps	XMMWORD PTR -112[rbp], xmm0
	shr	WORD PTR -20[rbp]
	add	WORD PTR -20[rbp], 1
	movzx	eax, WORD PTR -20[rbp]
	not	eax
	mov	esi, eax
	mov	eax, DWORD PTR -64[rbp]
	mov	ecx, eax
	mov	eax, 1
	sub	eax, ecx
	mov	ecx, eax
	movdqa	xmm0, XMMWORD PTR -80[rbp]
	pextrw	eax, xmm0, 0
	mov	edx, eax
	sar	dx, 15
	idiv	si
	mov	r8d, eax
	pextrw	eax, xmm0, 1
	mov	edx, eax
	sar	dx, 15
	idiv	cx
	mov	ebx, eax
	pextrw	eax, xmm0, 2
	movsx	edx, ax
	imul	edx, edx, 7085
	shr	edx, 16
	sar	dx, 3
	sar	ax, 15
	sub	eax, edx
	mov	ecx, eax
	pextrw	eax, xmm0, 3
	mov	edi, 0
	mov	edx, eax
	sar	dx, 15
	idiv	di
	mov	r11d, eax
	pextrw	eax, xmm0, 4
	mov	esi, 0
	mov	edx, eax
	sar	dx, 15
	idiv	si
	mov	edi, eax
	pextrw	eax, xmm0, 5
	mov	esi, 0
	mov	edx, eax
	sar	dx, 15
	idiv	si
	mov	r10d, eax
	pextrw	eax, xmm0, 6
	mov	esi, 0
	mov	edx, eax
	sar	dx, 15
	idiv	si
	mov	esi, eax
	pextrw	eax, xmm0, 7
	mov	r9d, 0
	mov	edx, eax
	sar	dx, 15
	idiv	r9w
	mov	edx, r8d
	movd	xmm0, edx
	pinsrw	xmm0, ebx, 1
	movdqa	xmm1, xmm0
	mov	edx, ecx
	movd	xmm0, edx
	pinsrw	xmm0, r11d, 1
	movdqa	xmm4, xmm0
	mov	edx, edi
	movd	xmm0, edx
	pinsrw	xmm0, r10d, 1
	movdqa	xmm2, xmm0
	mov	edx, esi
	movd	xmm0, edx
	pinsrw	xmm0, eax, 1
	movdqa	xmm3, xmm0
	punpckldq	xmm1, xmm4
	movdqa	xmm0, xmm1
	movdqa	xmm1, xmm0
	punpckldq	xmm2, xmm3
	movdqa	xmm0, xmm2
	movdqa	xmm2, xmm0
	punpcklqdq	xmm1, xmm2
	movdqa	xmm0, xmm1
	movaps	XMMWORD PTR -80[rbp], xmm0
	movzx	eax, WORD PTR -46[rbp]
	mov	edx, eax
	movzx	eax, WORD PTR -20[rbp]
	add	edx, eax
	movzx	eax, WORD PTR -74[rbp]
	add	edx, eax
	mov	rax, QWORD PTR -112[rbp]
	add	edx, eax
	mov	rax, QWORD PTR -104[rbp]
	add	eax, edx
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	foo, .-foo
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"3262172.c"
	.text
	.global	__aeabi_uldivmod
	.global	__aeabi_uidiv
	.global	__aeabi_idiv
	.align	2
	.global	foo
	.syntax unified
	.arm
	.fpu softvfp
	.type	foo, %function
foo:
	@ args = 80, pretend = 8, frame = 56
	@ frame_needed = 1, uses_anonymous_args = 0
	sub	sp, sp, #8
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	add	fp, sp, #32
	sub	sp, sp, #60
	add	r1, fp, #4
	stm	r1, {r2, r3}
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-38]	@ movhi
	add	r3, fp, #52
	ldr	r3, [r3, #4]
	mvn	r3, r3
	mov	r8, r3
	mov	r9, #0
	mov	r0, #0
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	mov	r0, r8
	mov	r1, r9
	mov	r4, r0
	mov	r5, r1
	mov	r6, r2
	mov	r7, r3
	add	r3, fp, #68
	ldr	r4, [r3]
	ldr	r5, [r3, #4]
	ldr	r6, [r3, #8]
	ldr	r7, [r3, #12]
	mov	r0, r4
	mov	r1, r5
	mov	r2, r8
	mov	r3, r9
	bl	__aeabi_uldivmod
	mov	r2, r0
	mov	r3, r1
	mov	r8, r2
	mov	r9, r3
	mov	r0, r6
	mov	r1, r7
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_uldivmod
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	mov	r0, #0
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	mov	r0, r8
	mov	r1, r9
	mov	r2, r4
	mov	r3, r5
	mov	r4, r0
	mov	r5, r1
	mov	r6, r2
	mov	r7, r3
	add	r3, fp, #68
	mov	r2, r4
	str	r2, [r3]
	mov	r2, r5
	str	r2, [r3, #4]
	mov	r2, r6
	str	r2, [r3, #8]
	mov	r2, r7
	str	r2, [r3, #12]
	mov	r3, #0
	strh	r3, [fp, #-38]	@ movhi
	ldrh	r3, [fp, #-38]
	add	r2, fp, #52
	ldr	r2, [r2, #8]
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_uidiv
	mov	r3, r0
	strh	r3, [fp, #-38]	@ movhi
	add	r3, fp, #68
	ldr	r2, [r3]
	str	r2, [fp, #-60]
	ldr	r2, [r3, #4]
	str	r2, [fp, #-56]
	ldr	r2, [r3, #8]
	str	r2, [fp, #-52]
	ldr	r3, [r3, #12]
	str	r3, [fp, #-48]
	add	r3, fp, #36
	ldr	r4, [r3]
	ldr	r5, [r3, #4]
	ldr	r6, [r3, #8]
	ldr	r7, [r3, #12]
	str	r4, [fp, #-76]
	str	r5, [fp, #-72]
	str	r6, [fp, #-68]
	str	r7, [fp, #-64]
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	subs	ip, r0, r2
	str	ip, [fp, #-84]
	sbc	r3, r1, r3
	str	r3, [fp, #-80]
	sub	r1, fp, #52
	ldmia	r1, {r0-r1}
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	subs	ip, r0, r2
	str	ip, [fp, #-92]
	sbc	r3, r1, r3
	str	r3, [fp, #-88]
	mov	r0, #0
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	sub	r3, fp, #92
	ldmia	r3, {r2-r3}
	mov	r4, r0
	mov	r5, r1
	mov	r6, r2
	mov	r7, r3
	add	r3, fp, #68
	mov	r2, r4
	str	r2, [r3]
	mov	r2, r5
	str	r2, [r3, #4]
	mov	r2, r6
	str	r2, [r3, #8]
	mov	r2, r7
	str	r2, [r3, #12]
	ldrh	r3, [fp, #-38]
	lsr	r3, r3, #1
	strh	r3, [fp, #-38]	@ movhi
	ldrh	r3, [fp, #-38]	@ movhi
	add	r3, r3, #1
	strh	r3, [fp, #-38]	@ movhi
	ldrsh	r3, [fp, #-38]
	mvn	r3, r3
	lsl	r3, r3, #16
	asr	lr, r3, #16
	add	r3, fp, #20
	ldr	r3, [r3]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	rsb	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r8, r3, #16
	mov	r0, #0
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r4, lr, #16
	lsr	ip, r0, #16
	orr	ip, ip, r4
	ror	ip, ip, #16
	mov	r0, ip
	lsl	r4, r8, #16
	lsl	ip, r0, #16
	lsr	ip, ip, #16
	orr	ip, ip, r4
	mov	r0, ip
	bic	ip, r1, #73
	orr	ip, ip, #65280
	orr	ip, ip, #182
	mov	r1, ip
	mov	r4, r0
	mov	r5, r1
	mov	r6, r2
	mov	r7, r3
	add	r3, fp, #36
	ldr	r4, [r3]
	ldr	r5, [r3, #4]
	ldr	r6, [r3, #8]
	ldr	r7, [r3, #12]
	lsl	r3, r4, #16
	asr	r3, r3, #16
	mov	r1, lr
	mov	r0, r3
	bl	__aeabi_idiv
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r3, r3, #16
	str	r3, [fp, #-60]
	mov	r3, r4
	asr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r1, r8
	mov	r0, r3
	bl	__aeabi_idiv
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r2, r3, #16
	str	r2, [fp, #-76]
	lsl	r3, r5, #16
	asr	r3, r3, #16
	ldr	r2, .L3
	smull	r1, r2, r3, r2
	add	r2, r2, r3
	asr	r2, r2, #6
	asr	r3, r3, #31
	sub	r3, r3, r2
	lsl	r3, r3, #16
	asr	r1, r3, #16
	str	r1, [fp, #-84]
	mov	r3, r5
	asr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_idiv
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r0, r3, #16
	str	r0, [fp, #-92]
	lsl	r3, r6, #16
	asr	r3, r3, #16
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_idiv
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r10, r3, #16
	mov	r3, r6
	asr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_idiv
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r9, r3, #16
	lsl	r3, r7, #16
	asr	r3, r3, #16
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_idiv
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r8, r3, #16
	mov	r3, r7
	asr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_idiv
	mov	r3, r0
	lsl	r3, r3, #16
	asr	lr, r3, #16
	mov	r0, #0
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	ldr	ip, [fp, #-60]
	lsl	r4, ip, #16
	lsr	ip, r0, #16
	orr	ip, ip, r4
	ror	ip, ip, #16
	mov	r0, ip
	ldr	ip, [fp, #-76]
	lsl	r4, ip, #16
	lsl	ip, r0, #16
	lsr	ip, ip, #16
	orr	ip, ip, r4
	mov	r0, ip
	ldr	ip, [fp, #-84]
	lsl	r4, ip, #16
	lsr	ip, r1, #16
	orr	ip, ip, r4
	ror	ip, ip, #16
	mov	r1, ip
	ldr	ip, [fp, #-92]
	lsl	r4, ip, #16
	lsl	ip, r1, #16
	lsr	ip, ip, #16
	orr	ip, ip, r4
	mov	r1, ip
	lsl	r4, r10, #16
	lsr	ip, r2, #16
	orr	ip, ip, r4
	ror	ip, ip, #16
	mov	r2, ip
	lsl	r4, r9, #16
	lsl	ip, r2, #16
	lsr	ip, ip, #16
	orr	ip, ip, r4
	mov	r2, ip
	lsl	r4, r8, #16
	lsr	ip, r3, #16
	orr	ip, ip, r4
	ror	ip, ip, #16
	mov	r3, ip
	lsl	lr, lr, #16
	lsl	ip, r3, #16
	lsr	ip, ip, #16
	orr	ip, ip, lr
	mov	r3, ip
	mov	r4, r0
	mov	r5, r1
	mov	r6, r2
	mov	r7, r3
	add	r3, fp, #36
	mov	r2, r4
	str	r2, [r3]
	mov	r2, r5
	str	r2, [r3, #4]
	mov	r2, r6
	str	r2, [r3, #8]
	mov	r2, r7
	str	r2, [r3, #12]
	ldrsh	r3, [fp, #6]
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldrh	r3, [fp, #-38]	@ movhi
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	add	r3, fp, #36
	ldrsh	r3, [r3, #6]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r1, r3, #16
	add	r3, fp, #68
	ldmia	r3, {r2-r3}
	lsl	r3, r2, #16
	lsr	r3, r3, #16
	add	r3, r1, r3
	lsl	r3, r3, #16
	lsr	r1, r3, #16
	add	r3, fp, #68
	add	r3, r3, #8
	ldmia	r3, {r2-r3}
	lsl	r3, r2, #16
	lsr	r3, r3, #16
	add	r3, r1, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	sub	sp, fp, #32
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	add	sp, sp, #8
	bx	lr
.L4:
	.align	2
.L3:
	.word	-580400985
	.size	foo, .-foo
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
