	.file	"268103.c"
	.intel_syntax noprefix
	.text
	.globl	__VERIFIER_nondet_bool
	.type	__VERIFIER_nondet_bool, @function
__VERIFIER_nondet_bool:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	__VERIFIER_nondet_int@PLT
	test	eax, eax
	setne	al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	__VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
	.globl	p20_l3
	.bss
	.type	p20_l3, @object
	.size	p20_l3, 1
p20_l3:
	.zero	1
	.globl	_x_p20_l3
	.type	_x_p20_l3, @object
	.size	_x_p20_l3, 1
_x_p20_l3:
	.zero	1
	.globl	p20_l2
	.type	p20_l2, @object
	.size	p20_l2, 1
p20_l2:
	.zero	1
	.globl	_x_p20_l2
	.type	_x_p20_l2, @object
	.size	_x_p20_l2, 1
_x_p20_l2:
	.zero	1
	.globl	p19_l3
	.type	p19_l3, @object
	.size	p19_l3, 1
p19_l3:
	.zero	1
	.globl	_x_p19_l3
	.type	_x_p19_l3, @object
	.size	_x_p19_l3, 1
_x_p19_l3:
	.zero	1
	.globl	p19_l2
	.type	p19_l2, @object
	.size	p19_l2, 1
p19_l2:
	.zero	1
	.globl	_x_p19_l2
	.type	_x_p19_l2, @object
	.size	_x_p19_l2, 1
_x_p19_l2:
	.zero	1
	.globl	p18_l3
	.type	p18_l3, @object
	.size	p18_l3, 1
p18_l3:
	.zero	1
	.globl	_x_p18_l3
	.type	_x_p18_l3, @object
	.size	_x_p18_l3, 1
_x_p18_l3:
	.zero	1
	.globl	p20_evt
	.type	p20_evt, @object
	.size	p20_evt, 1
p20_evt:
	.zero	1
	.globl	_x_p20_evt
	.type	_x_p20_evt, @object
	.size	_x_p20_evt, 1
_x_p20_evt:
	.zero	1
	.globl	p18_l2
	.type	p18_l2, @object
	.size	p18_l2, 1
p18_l2:
	.zero	1
	.globl	_x_p18_l2
	.type	_x_p18_l2, @object
	.size	_x_p18_l2, 1
_x_p18_l2:
	.zero	1
	.globl	p17_l3
	.type	p17_l3, @object
	.size	p17_l3, 1
p17_l3:
	.zero	1
	.globl	_x_p17_l3
	.type	_x_p17_l3, @object
	.size	_x_p17_l3, 1
_x_p17_l3:
	.zero	1
	.globl	p19_evt
	.type	p19_evt, @object
	.size	p19_evt, 1
p19_evt:
	.zero	1
	.globl	_x_p19_evt
	.type	_x_p19_evt, @object
	.size	_x_p19_evt, 1
_x_p19_evt:
	.zero	1
	.globl	p17_l2
	.type	p17_l2, @object
	.size	p17_l2, 1
p17_l2:
	.zero	1
	.globl	_x_p17_l2
	.type	_x_p17_l2, @object
	.size	_x_p17_l2, 1
_x_p17_l2:
	.zero	1
	.globl	p16_l3
	.type	p16_l3, @object
	.size	p16_l3, 1
p16_l3:
	.zero	1
	.globl	_x_p16_l3
	.type	_x_p16_l3, @object
	.size	_x_p16_l3, 1
_x_p16_l3:
	.zero	1
	.globl	p10_l0
	.type	p10_l0, @object
	.size	p10_l0, 1
p10_l0:
	.zero	1
	.globl	_x_p10_l0
	.type	_x_p10_l0, @object
	.size	_x_p10_l0, 1
_x_p10_l0:
	.zero	1
	.globl	p6_c
	.align 4
	.type	p6_c, @object
	.size	p6_c, 4
p6_c:
	.zero	4
	.globl	_x_p6_c
	.align 4
	.type	_x_p6_c, @object
	.size	_x_p6_c, 4
_x_p6_c:
	.zero	4
	.globl	p4_l0
	.type	p4_l0, @object
	.size	p4_l0, 1
p4_l0:
	.zero	1
	.globl	_x_p4_l0
	.type	_x_p4_l0, @object
	.size	_x_p4_l0, 1
_x_p4_l0:
	.zero	1
	.globl	p4_l2
	.type	p4_l2, @object
	.size	p4_l2, 1
p4_l2:
	.zero	1
	.globl	_x_p4_l2
	.type	_x_p4_l2, @object
	.size	_x_p4_l2, 1
_x_p4_l2:
	.zero	1
	.globl	p13_l1
	.type	p13_l1, @object
	.size	p13_l1, 1
p13_l1:
	.zero	1
	.globl	_x_p13_l1
	.type	_x_p13_l1, @object
	.size	_x_p13_l1, 1
_x_p13_l1:
	.zero	1
	.globl	p1_evt
	.type	p1_evt, @object
	.size	p1_evt, 1
p1_evt:
	.zero	1
	.globl	_x_p1_evt
	.type	_x_p1_evt, @object
	.size	_x_p1_evt, 1
_x_p1_evt:
	.zero	1
	.globl	p1_c
	.align 4
	.type	p1_c, @object
	.size	p1_c, 4
p1_c:
	.zero	4
	.globl	_x_p1_c
	.align 4
	.type	_x_p1_c, @object
	.size	_x_p1_c, 4
_x_p1_c:
	.zero	4
	.globl	p0_l3
	.type	p0_l3, @object
	.size	p0_l3, 1
p0_l3:
	.zero	1
	.globl	_x_p0_l3
	.type	_x_p0_l3, @object
	.size	_x_p0_l3, 1
_x_p0_l3:
	.zero	1
	.globl	p0_l2
	.type	p0_l2, @object
	.size	p0_l2, 1
p0_l2:
	.zero	1
	.globl	_x_p0_l2
	.type	_x_p0_l2, @object
	.size	_x_p0_l2, 1
_x_p0_l2:
	.zero	1
	.globl	p0_l1
	.type	p0_l1, @object
	.size	p0_l1, 1
p0_l1:
	.zero	1
	.globl	_x_p0_l1
	.type	_x_p0_l1, @object
	.size	_x_p0_l1, 1
_x_p0_l1:
	.zero	1
	.globl	proposed7
	.align 4
	.type	proposed7, @object
	.size	proposed7, 4
proposed7:
	.zero	4
	.globl	_x_proposed7
	.align 4
	.type	_x_proposed7, @object
	.size	_x_proposed7, 4
_x_proposed7:
	.zero	4
	.globl	proposed6
	.align 4
	.type	proposed6, @object
	.size	proposed6, 4
proposed6:
	.zero	4
	.globl	_x_proposed6
	.align 4
	.type	_x_proposed6, @object
	.size	_x_proposed6, 4
_x_proposed6:
	.zero	4
	.globl	proposed5
	.align 4
	.type	proposed5, @object
	.size	proposed5, 4
proposed5:
	.zero	4
	.globl	_x_proposed5
	.align 4
	.type	_x_proposed5, @object
	.size	_x_proposed5, 4
_x_proposed5:
	.zero	4
	.globl	p12_l0
	.type	p12_l0, @object
	.size	p12_l0, 1
p12_l0:
	.zero	1
	.globl	_x_p12_l0
	.type	_x_p12_l0, @object
	.size	_x_p12_l0, 1
_x_p12_l0:
	.zero	1
	.globl	proposed4
	.align 4
	.type	proposed4, @object
	.size	proposed4, 4
proposed4:
	.zero	4
	.globl	_x_proposed4
	.align 4
	.type	_x_proposed4, @object
	.size	_x_proposed4, 4
_x_proposed4:
	.zero	4
	.globl	p7_l0
	.type	p7_l0, @object
	.size	p7_l0, 1
p7_l0:
	.zero	1
	.globl	_x_p7_l0
	.type	_x_p7_l0, @object
	.size	_x_p7_l0, 1
_x_p7_l0:
	.zero	1
	.globl	proposed3
	.align 4
	.type	proposed3, @object
	.size	proposed3, 4
proposed3:
	.zero	4
	.globl	_x_proposed3
	.align 4
	.type	_x_proposed3, @object
	.size	_x_proposed3, 4
_x_proposed3:
	.zero	4
	.globl	proposed2
	.align 4
	.type	proposed2, @object
	.size	proposed2, 4
proposed2:
	.zero	4
	.globl	_x_proposed2
	.align 4
	.type	_x_proposed2, @object
	.size	_x_proposed2, 4
_x_proposed2:
	.zero	4
	.globl	proposed1
	.align 4
	.type	proposed1, @object
	.size	proposed1, 4
proposed1:
	.zero	4
	.globl	_x_proposed1
	.align 4
	.type	_x_proposed1, @object
	.size	_x_proposed1, 4
_x_proposed1:
	.zero	4
	.globl	p8_c
	.align 4
	.type	p8_c, @object
	.size	p8_c, 4
p8_c:
	.zero	4
	.globl	_x_p8_c
	.align 4
	.type	_x_p8_c, @object
	.size	_x_p8_c, 4
_x_p8_c:
	.zero	4
	.globl	proposed0
	.align 4
	.type	proposed0, @object
	.size	proposed0, 4
proposed0:
	.zero	4
	.globl	_x_proposed0
	.align 4
	.type	_x_proposed0, @object
	.size	_x_proposed0, 4
_x_proposed0:
	.zero	4
	.globl	inc_max_prop
	.type	inc_max_prop, @object
	.size	inc_max_prop, 1
inc_max_prop:
	.zero	1
	.globl	_x_inc_max_prop
	.type	_x_inc_max_prop, @object
	.size	_x_inc_max_prop, 1
_x_inc_max_prop:
	.zero	1
	.globl	max_prop
	.align 4
	.type	max_prop, @object
	.size	max_prop, 4
max_prop:
	.zero	4
	.globl	_x_max_prop
	.align 4
	.type	_x_max_prop, @object
	.size	_x_max_prop, 4
_x_max_prop:
	.zero	4
	.globl	p20_l1
	.type	p20_l1, @object
	.size	p20_l1, 1
p20_l1:
	.zero	1
	.globl	_x_p20_l1
	.type	_x_p20_l1, @object
	.size	_x_p20_l1, 1
_x_p20_l1:
	.zero	1
	.globl	p11_l3
	.type	p11_l3, @object
	.size	p11_l3, 1
p11_l3:
	.zero	1
	.globl	_x_p11_l3
	.type	_x_p11_l3, @object
	.size	_x_p11_l3, 1
_x_p11_l3:
	.zero	1
	.globl	p2_l3
	.type	p2_l3, @object
	.size	p2_l3, 1
p2_l3:
	.zero	1
	.globl	_x_p2_l3
	.type	_x_p2_l3, @object
	.size	_x_p2_l3, 1
_x_p2_l3:
	.zero	1
	.globl	v2
	.type	v2, @object
	.size	v2, 1
v2:
	.zero	1
	.globl	_x_v2
	.type	_x_v2, @object
	.size	_x_v2, 1
_x_v2:
	.zero	1
	.globl	p15_evt
	.type	p15_evt, @object
	.size	p15_evt, 1
p15_evt:
	.zero	1
	.globl	_x_p15_evt
	.type	_x_p15_evt, @object
	.size	_x_p15_evt, 1
_x_p15_evt:
	.zero	1
	.globl	v1
	.align 4
	.type	v1, @object
	.size	v1, 4
v1:
	.zero	4
	.globl	_x_v1
	.align 4
	.type	_x_v1, @object
	.size	_x_v1, 4
_x_v1:
	.zero	4
	.globl	p15_c
	.align 4
	.type	p15_c, @object
	.size	p15_c, 4
p15_c:
	.zero	4
	.globl	_x_p15_c
	.align 4
	.type	_x_p15_c, @object
	.size	_x_p15_c, 4
_x_p15_c:
	.zero	4
	.globl	delta
	.align 4
	.type	delta, @object
	.size	delta, 4
delta:
	.zero	4
	.globl	_x_delta
	.align 4
	.type	_x_delta, @object
	.size	_x_delta, 4
_x_delta:
	.zero	4
	.globl	proposed8
	.align 4
	.type	proposed8, @object
	.size	proposed8, 4
proposed8:
	.zero	4
	.globl	_x_proposed8
	.align 4
	.type	_x_proposed8, @object
	.size	_x_proposed8, 4
_x_proposed8:
	.zero	4
	.globl	p7_l1
	.type	p7_l1, @object
	.size	p7_l1, 1
p7_l1:
	.zero	1
	.globl	_x_p7_l1
	.type	_x_p7_l1, @object
	.size	_x_p7_l1, 1
_x_p7_l1:
	.zero	1
	.globl	p9_c
	.align 4
	.type	p9_c, @object
	.size	p9_c, 4
p9_c:
	.zero	4
	.globl	_x_p9_c
	.align 4
	.type	_x_p9_c, @object
	.size	_x_p9_c, 4
_x_p9_c:
	.zero	4
	.globl	p12_l3
	.type	p12_l3, @object
	.size	p12_l3, 1
p12_l3:
	.zero	1
	.globl	_x_p12_l3
	.type	_x_p12_l3, @object
	.size	_x_p12_l3, 1
_x_p12_l3:
	.zero	1
	.globl	proposed9
	.align 4
	.type	proposed9, @object
	.size	proposed9, 4
proposed9:
	.zero	4
	.globl	_x_proposed9
	.align 4
	.type	_x_proposed9, @object
	.size	_x_proposed9, 4
_x_proposed9:
	.zero	4
	.globl	p12_l1
	.type	p12_l1, @object
	.size	p12_l1, 1
p12_l1:
	.zero	1
	.globl	_x_p12_l1
	.type	_x_p12_l1, @object
	.size	_x_p12_l1, 1
_x_p12_l1:
	.zero	1
	.globl	p14_c
	.align 4
	.type	p14_c, @object
	.size	p14_c, 4
p14_c:
	.zero	4
	.globl	_x_p14_c
	.align 4
	.type	_x_p14_c, @object
	.size	_x_p14_c, 4
_x_p14_c:
	.zero	4
	.globl	proposed10
	.align 4
	.type	proposed10, @object
	.size	proposed10, 4
proposed10:
	.zero	4
	.globl	_x_proposed10
	.align 4
	.type	_x_proposed10, @object
	.size	_x_proposed10, 4
_x_proposed10:
	.zero	4
	.globl	p12_l2
	.type	p12_l2, @object
	.size	p12_l2, 1
p12_l2:
	.zero	1
	.globl	_x_p12_l2
	.type	_x_p12_l2, @object
	.size	_x_p12_l2, 1
_x_p12_l2:
	.zero	1
	.globl	p14_evt
	.type	p14_evt, @object
	.size	p14_evt, 1
p14_evt:
	.zero	1
	.globl	_x_p14_evt
	.type	_x_p14_evt, @object
	.size	_x_p14_evt, 1
_x_p14_evt:
	.zero	1
	.globl	p3_l0
	.type	p3_l0, @object
	.size	p3_l0, 1
p3_l0:
	.zero	1
	.globl	_x_p3_l0
	.type	_x_p3_l0, @object
	.size	_x_p3_l0, 1
_x_p3_l0:
	.zero	1
	.globl	p5_c
	.align 4
	.type	p5_c, @object
	.size	p5_c, 4
p5_c:
	.zero	4
	.globl	_x_p5_c
	.align 4
	.type	_x_p5_c, @object
	.size	_x_p5_c, 4
_x_p5_c:
	.zero	4
	.globl	p3_l3
	.type	p3_l3, @object
	.size	p3_l3, 1
p3_l3:
	.zero	1
	.globl	_x_p3_l3
	.type	_x_p3_l3, @object
	.size	_x_p3_l3, 1
_x_p3_l3:
	.zero	1
	.globl	p8_l1
	.type	p8_l1, @object
	.size	p8_l1, 1
p8_l1:
	.zero	1
	.globl	_x_p8_l1
	.type	_x_p8_l1, @object
	.size	_x_p8_l1, 1
_x_p8_l1:
	.zero	1
	.globl	p10_c
	.align 4
	.type	p10_c, @object
	.size	p10_c, 4
p10_c:
	.zero	4
	.globl	_x_p10_c
	.align 4
	.type	_x_p10_c, @object
	.size	_x_p10_c, 4
_x_p10_c:
	.zero	4
	.globl	p13_l3
	.type	p13_l3, @object
	.size	p13_l3, 1
p13_l3:
	.zero	1
	.globl	_x_p13_l3
	.type	_x_p13_l3, @object
	.size	_x_p13_l3, 1
_x_p13_l3:
	.zero	1
	.globl	proposed11
	.align 4
	.type	proposed11, @object
	.size	proposed11, 4
proposed11:
	.zero	4
	.globl	_x_proposed11
	.align 4
	.type	_x_proposed11, @object
	.size	_x_proposed11, 4
_x_proposed11:
	.zero	4
	.globl	p3_l1
	.type	p3_l1, @object
	.size	p3_l1, 1
p3_l1:
	.zero	1
	.globl	_x_p3_l1
	.type	_x_p3_l1, @object
	.size	_x_p3_l1, 1
_x_p3_l1:
	.zero	1
	.globl	p5_evt
	.type	p5_evt, @object
	.size	p5_evt, 1
p5_evt:
	.zero	1
	.globl	_x_p5_evt
	.type	_x_p5_evt, @object
	.size	_x_p5_evt, 1
_x_p5_evt:
	.zero	1
	.globl	p17_l0
	.type	p17_l0, @object
	.size	p17_l0, 1
p17_l0:
	.zero	1
	.globl	_x_p17_l0
	.type	_x_p17_l0, @object
	.size	_x_p17_l0, 1
_x_p17_l0:
	.zero	1
	.globl	p8_l2
	.type	p8_l2, @object
	.size	p8_l2, 1
p8_l2:
	.zero	1
	.globl	_x_p8_l2
	.type	_x_p8_l2, @object
	.size	_x_p8_l2, 1
_x_p8_l2:
	.zero	1
	.globl	p10_evt
	.type	p10_evt, @object
	.size	p10_evt, 1
p10_evt:
	.zero	1
	.globl	_x_p10_evt
	.type	_x_p10_evt, @object
	.size	_x_p10_evt, 1
_x_p10_evt:
	.zero	1
	.globl	proposed12
	.align 4
	.type	proposed12, @object
	.size	proposed12, 4
proposed12:
	.zero	4
	.globl	_x_proposed12
	.align 4
	.type	_x_proposed12, @object
	.size	_x_proposed12, 4
_x_proposed12:
	.zero	4
	.globl	proposed13
	.align 4
	.type	proposed13, @object
	.size	proposed13, 4
proposed13:
	.zero	4
	.globl	_x_proposed13
	.align 4
	.type	_x_proposed13, @object
	.size	_x_proposed13, 4
_x_proposed13:
	.zero	4
	.globl	proposed14
	.align 4
	.type	proposed14, @object
	.size	proposed14, 4
proposed14:
	.zero	4
	.globl	_x_proposed14
	.align 4
	.type	_x_proposed14, @object
	.size	_x_proposed14, 4
_x_proposed14:
	.zero	4
	.globl	proposed15
	.align 4
	.type	proposed15, @object
	.size	proposed15, 4
proposed15:
	.zero	4
	.globl	_x_proposed15
	.align 4
	.type	_x_proposed15, @object
	.size	_x_proposed15, 4
_x_proposed15:
	.zero	4
	.globl	p13_c
	.align 4
	.type	p13_c, @object
	.size	p13_c, 4
p13_c:
	.zero	4
	.globl	_x_p13_c
	.align 4
	.type	_x_p13_c, @object
	.size	_x_p13_c, 4
_x_p13_c:
	.zero	4
	.globl	p11_l1
	.type	p11_l1, @object
	.size	p11_l1, 1
p11_l1:
	.zero	1
	.globl	_x_p11_l1
	.type	_x_p11_l1, @object
	.size	_x_p11_l1, 1
_x_p11_l1:
	.zero	1
	.globl	p2_l1
	.type	p2_l1, @object
	.size	p2_l1, 1
p2_l1:
	.zero	1
	.globl	_x_p2_l1
	.type	_x_p2_l1, @object
	.size	_x_p2_l1, 1
_x_p2_l1:
	.zero	1
	.globl	p4_evt
	.type	p4_evt, @object
	.size	p4_evt, 1
p4_evt:
	.zero	1
	.globl	_x_p4_evt
	.type	_x_p4_evt, @object
	.size	_x_p4_evt, 1
_x_p4_evt:
	.zero	1
	.globl	proposed16
	.align 4
	.type	proposed16, @object
	.size	proposed16, 4
proposed16:
	.zero	4
	.globl	_x_proposed16
	.align 4
	.type	_x_proposed16, @object
	.size	_x_proposed16, 4
_x_proposed16:
	.zero	4
	.globl	p3_c
	.align 4
	.type	p3_c, @object
	.size	p3_c, 4
p3_c:
	.zero	4
	.globl	_x_p3_c
	.align 4
	.type	_x_p3_c, @object
	.size	_x_p3_c, 4
_x_p3_c:
	.zero	4
	.globl	p1_l0
	.type	p1_l0, @object
	.size	p1_l0, 1
p1_l0:
	.zero	1
	.globl	_x_p1_l0
	.type	_x_p1_l0, @object
	.size	_x_p1_l0, 1
_x_p1_l0:
	.zero	1
	.globl	proposed17
	.align 4
	.type	proposed17, @object
	.size	proposed17, 4
proposed17:
	.zero	4
	.globl	_x_proposed17
	.align 4
	.type	_x_proposed17, @object
	.size	_x_proposed17, 4
_x_proposed17:
	.zero	4
	.globl	p6_l0
	.type	p6_l0, @object
	.size	p6_l0, 1
p6_l0:
	.zero	1
	.globl	_x_p6_l0
	.type	_x_p6_l0, @object
	.size	_x_p6_l0, 1
_x_p6_l0:
	.zero	1
	.globl	p6_l1
	.type	p6_l1, @object
	.size	p6_l1, 1
p6_l1:
	.zero	1
	.globl	_x_p6_l1
	.type	_x_p6_l1, @object
	.size	_x_p6_l1, 1
_x_p6_l1:
	.zero	1
	.globl	p7_l2
	.type	p7_l2, @object
	.size	p7_l2, 1
p7_l2:
	.zero	1
	.globl	_x_p7_l2
	.type	_x_p7_l2, @object
	.size	_x_p7_l2, 1
_x_p7_l2:
	.zero	1
	.globl	p9_evt
	.type	p9_evt, @object
	.size	p9_evt, 1
p9_evt:
	.zero	1
	.globl	_x_p9_evt
	.type	_x_p9_evt, @object
	.size	_x_p9_evt, 1
_x_p9_evt:
	.zero	1
	.globl	p16_l0
	.type	p16_l0, @object
	.size	p16_l0, 1
p16_l0:
	.zero	1
	.globl	_x_p16_l0
	.type	_x_p16_l0, @object
	.size	_x_p16_l0, 1
_x_p16_l0:
	.zero	1
	.globl	p1_l2
	.type	p1_l2, @object
	.size	p1_l2, 1
p1_l2:
	.zero	1
	.globl	_x_p1_l2
	.type	_x_p1_l2, @object
	.size	_x_p1_l2, 1
_x_p1_l2:
	.zero	1
	.globl	proposed19
	.align 4
	.type	proposed19, @object
	.size	proposed19, 4
proposed19:
	.zero	4
	.globl	_x_proposed19
	.align 4
	.type	_x_proposed19, @object
	.size	_x_proposed19, 4
_x_proposed19:
	.zero	4
	.globl	p6_l2
	.type	p6_l2, @object
	.size	p6_l2, 1
p6_l2:
	.zero	1
	.globl	_x_p6_l2
	.type	_x_p6_l2, @object
	.size	_x_p6_l2, 1
_x_p6_l2:
	.zero	1
	.globl	p18_c
	.align 4
	.type	p18_c, @object
	.size	p18_c, 4
p18_c:
	.zero	4
	.globl	_x_p18_c
	.align 4
	.type	_x_p18_c, @object
	.size	_x_p18_c, 4
_x_p18_c:
	.zero	4
	.globl	p7_l3
	.type	p7_l3, @object
	.size	p7_l3, 1
p7_l3:
	.zero	1
	.globl	_x_p7_l3
	.type	_x_p7_l3, @object
	.size	_x_p7_l3, 1
_x_p7_l3:
	.zero	1
	.globl	p16_l1
	.type	p16_l1, @object
	.size	p16_l1, 1
p16_l1:
	.zero	1
	.globl	_x_p16_l1
	.type	_x_p16_l1, @object
	.size	_x_p16_l1, 1
_x_p16_l1:
	.zero	1
	.globl	p1_l1
	.type	p1_l1, @object
	.size	p1_l1, 1
p1_l1:
	.zero	1
	.globl	_x_p1_l1
	.type	_x_p1_l1, @object
	.size	_x_p1_l1, 1
_x_p1_l1:
	.zero	1
	.globl	proposed18
	.align 4
	.type	proposed18, @object
	.size	proposed18, 4
proposed18:
	.zero	4
	.globl	_x_proposed18
	.align 4
	.type	_x_proposed18, @object
	.size	_x_proposed18, 4
_x_proposed18:
	.zero	4
	.globl	p3_evt
	.type	p3_evt, @object
	.size	p3_evt, 1
p3_evt:
	.zero	1
	.globl	_x_p3_evt
	.type	_x_p3_evt, @object
	.size	_x_p3_evt, 1
_x_p3_evt:
	.zero	1
	.globl	p20_l0
	.type	p20_l0, @object
	.size	p20_l0, 1
p20_l0:
	.zero	1
	.globl	_x_p20_l0
	.type	_x_p20_l0, @object
	.size	_x_p20_l0, 1
_x_p20_l0:
	.zero	1
	.globl	p11_l2
	.type	p11_l2, @object
	.size	p11_l2, 1
p11_l2:
	.zero	1
	.globl	_x_p11_l2
	.type	_x_p11_l2, @object
	.size	_x_p11_l2, 1
_x_p11_l2:
	.zero	1
	.globl	p2_l2
	.type	p2_l2, @object
	.size	p2_l2, 1
p2_l2:
	.zero	1
	.globl	_x_p2_l2
	.type	_x_p2_l2, @object
	.size	_x_p2_l2, 1
_x_p2_l2:
	.zero	1
	.globl	p13_evt
	.type	p13_evt, @object
	.size	p13_evt, 1
p13_evt:
	.zero	1
	.globl	_x_p13_evt
	.type	_x_p13_evt, @object
	.size	_x_p13_evt, 1
_x_p13_evt:
	.zero	1
	.globl	p1_l3
	.type	p1_l3, @object
	.size	p1_l3, 1
p1_l3:
	.zero	1
	.globl	_x_p1_l3
	.type	_x_p1_l3, @object
	.size	_x_p1_l3, 1
_x_p1_l3:
	.zero	1
	.globl	proposed20
	.align 4
	.type	proposed20, @object
	.size	proposed20, 4
proposed20:
	.zero	4
	.globl	_x_proposed20
	.align 4
	.type	_x_proposed20, @object
	.size	_x_proposed20, 4
_x_proposed20:
	.zero	4
	.globl	p6_l3
	.type	p6_l3, @object
	.size	p6_l3, 1
p6_l3:
	.zero	1
	.globl	_x_p6_l3
	.type	_x_p6_l3, @object
	.size	_x_p6_l3, 1
_x_p6_l3:
	.zero	1
	.globl	p18_evt
	.type	p18_evt, @object
	.size	p18_evt, 1
p18_evt:
	.zero	1
	.globl	_x_p18_evt
	.type	_x_p18_evt, @object
	.size	_x_p18_evt, 1
_x_p18_evt:
	.zero	1
	.globl	p16_l2
	.type	p16_l2, @object
	.size	p16_l2, 1
p16_l2:
	.zero	1
	.globl	_x_p16_l2
	.type	_x_p16_l2, @object
	.size	_x_p16_l2, 1
_x_p16_l2:
	.zero	1
	.globl	p3_l2
	.type	p3_l2, @object
	.size	p3_l2, 1
p3_l2:
	.zero	1
	.globl	_x_p3_l2
	.type	_x_p3_l2, @object
	.size	_x_p3_l2, 1
_x_p3_l2:
	.zero	1
	.globl	p19_c
	.align 4
	.type	p19_c, @object
	.size	p19_c, 4
p19_c:
	.zero	4
	.globl	_x_p19_c
	.align 4
	.type	_x_p19_c, @object
	.size	_x_p19_c, 4
_x_p19_c:
	.zero	4
	.globl	p17_l1
	.type	p17_l1, @object
	.size	p17_l1, 1
p17_l1:
	.zero	1
	.globl	_x_p17_l1
	.type	_x_p17_l1, @object
	.size	_x_p17_l1, 1
_x_p17_l1:
	.zero	1
	.globl	p8_l3
	.type	p8_l3, @object
	.size	p8_l3, 1
p8_l3:
	.zero	1
	.globl	_x_p8_l3
	.type	_x_p8_l3, @object
	.size	_x_p8_l3, 1
_x_p8_l3:
	.zero	1
	.globl	p4_l3
	.type	p4_l3, @object
	.size	p4_l3, 1
p4_l3:
	.zero	1
	.globl	_x_p4_l3
	.type	_x_p4_l3, @object
	.size	_x_p4_l3, 1
_x_p4_l3:
	.zero	1
	.globl	p13_l2
	.type	p13_l2, @object
	.size	p13_l2, 1
p13_l2:
	.zero	1
	.globl	_x_p13_l2
	.type	_x_p13_l2, @object
	.size	_x_p13_l2, 1
_x_p13_l2:
	.zero	1
	.globl	p0_c
	.align 4
	.type	p0_c, @object
	.size	p0_c, 4
p0_c:
	.zero	4
	.globl	_x_p0_c
	.align 4
	.type	_x_p0_c, @object
	.size	_x_p0_c, 4
_x_p0_c:
	.zero	4
	.globl	p0_l0
	.type	p0_l0, @object
	.size	p0_l0, 1
p0_l0:
	.zero	1
	.globl	_x_p0_l0
	.type	_x_p0_l0, @object
	.size	_x_p0_l0, 1
_x_p0_l0:
	.zero	1
	.globl	p0_evt
	.type	p0_evt, @object
	.size	p0_evt, 1
p0_evt:
	.zero	1
	.globl	_x_p0_evt
	.type	_x_p0_evt, @object
	.size	_x_p0_evt, 1
_x_p0_evt:
	.zero	1
	.globl	p5_l0
	.type	p5_l0, @object
	.size	p5_l0, 1
p5_l0:
	.zero	1
	.globl	_x_p5_l0
	.type	_x_p5_l0, @object
	.size	_x_p5_l0, 1
_x_p5_l0:
	.zero	1
	.globl	p7_c
	.align 4
	.type	p7_c, @object
	.size	p7_c, 4
p7_c:
	.zero	4
	.globl	_x_p7_c
	.align 4
	.type	_x_p7_c, @object
	.size	_x_p7_c, 4
_x_p7_c:
	.zero	4
	.globl	p19_l1
	.type	p19_l1, @object
	.size	p19_l1, 1
p19_l1:
	.zero	1
	.globl	_x_p19_l1
	.type	_x_p19_l1, @object
	.size	_x_p19_l1, 1
_x_p19_l1:
	.zero	1
	.globl	p10_l3
	.type	p10_l3, @object
	.size	p10_l3, 1
p10_l3:
	.zero	1
	.globl	_x_p10_l3
	.type	_x_p10_l3, @object
	.size	_x_p10_l3, 1
_x_p10_l3:
	.zero	1
	.globl	p4_l1
	.type	p4_l1, @object
	.size	p4_l1, 1
p4_l1:
	.zero	1
	.globl	_x_p4_l1
	.type	_x_p4_l1, @object
	.size	_x_p4_l1, 1
_x_p4_l1:
	.zero	1
	.globl	p13_l0
	.type	p13_l0, @object
	.size	p13_l0, 1
p13_l0:
	.zero	1
	.globl	_x_p13_l0
	.type	_x_p13_l0, @object
	.size	_x_p13_l0, 1
_x_p13_l0:
	.zero	1
	.globl	p6_evt
	.type	p6_evt, @object
	.size	p6_evt, 1
p6_evt:
	.zero	1
	.globl	_x_p6_evt
	.type	_x_p6_evt, @object
	.size	_x_p6_evt, 1
_x_p6_evt:
	.zero	1
	.globl	_diverge_delta
	.align 4
	.type	_diverge_delta, @object
	.size	_diverge_delta, 4
_diverge_delta:
	.zero	4
	.globl	_x__diverge_delta
	.align 4
	.type	_x__diverge_delta, @object
	.size	_x__diverge_delta, 4
_x__diverge_delta:
	.zero	4
	.globl	p5_l2
	.type	p5_l2, @object
	.size	p5_l2, 1
p5_l2:
	.zero	1
	.globl	_x_p5_l2
	.type	_x_p5_l2, @object
	.size	_x_p5_l2, 1
_x_p5_l2:
	.zero	1
	.globl	p16_c
	.align 4
	.type	p16_c, @object
	.size	p16_c, 4
p16_c:
	.zero	4
	.globl	_x_p16_c
	.align 4
	.type	_x_p16_c, @object
	.size	_x_p16_c, 4
_x_p16_c:
	.zero	4
	.globl	p5_l1
	.type	p5_l1, @object
	.size	p5_l1, 1
p5_l1:
	.zero	1
	.globl	_x_p5_l1
	.type	_x_p5_l1, @object
	.size	_x_p5_l1, 1
_x_p5_l1:
	.zero	1
	.globl	p7_evt
	.type	p7_evt, @object
	.size	p7_evt, 1
p7_evt:
	.zero	1
	.globl	_x_p7_evt
	.type	_x_p7_evt, @object
	.size	_x_p7_evt, 1
_x_p7_evt:
	.zero	1
	.globl	p10_l1
	.type	p10_l1, @object
	.size	p10_l1, 1
p10_l1:
	.zero	1
	.globl	_x_p10_l1
	.type	_x_p10_l1, @object
	.size	_x_p10_l1, 1
_x_p10_l1:
	.zero	1
	.globl	p12_c
	.align 4
	.type	p12_c, @object
	.size	p12_c, 4
p12_c:
	.zero	4
	.globl	_x_p12_c
	.align 4
	.type	_x_p12_c, @object
	.size	_x_p12_c, 4
_x_p12_c:
	.zero	4
	.globl	p8_l0
	.type	p8_l0, @object
	.size	p8_l0, 1
p8_l0:
	.zero	1
	.globl	_x_p8_l0
	.type	_x_p8_l0, @object
	.size	_x_p8_l0, 1
_x_p8_l0:
	.zero	1
	.globl	p9_l0
	.type	p9_l0, @object
	.size	p9_l0, 1
p9_l0:
	.zero	1
	.globl	_x_p9_l0
	.type	_x_p9_l0, @object
	.size	_x_p9_l0, 1
_x_p9_l0:
	.zero	1
	.globl	p14_l0
	.type	p14_l0, @object
	.size	p14_l0, 1
p14_l0:
	.zero	1
	.globl	_x_p14_l0
	.type	_x_p14_l0, @object
	.size	_x_p14_l0, 1
_x_p14_l0:
	.zero	1
	.globl	p18_l0
	.type	p18_l0, @object
	.size	p18_l0, 1
p18_l0:
	.zero	1
	.globl	_x_p18_l0
	.type	_x_p18_l0, @object
	.size	_x_p18_l0, 1
_x_p18_l0:
	.zero	1
	.globl	p11_evt
	.type	p11_evt, @object
	.size	p11_evt, 1
p11_evt:
	.zero	1
	.globl	_x_p11_evt
	.type	_x_p11_evt, @object
	.size	_x_p11_evt, 1
_x_p11_evt:
	.zero	1
	.globl	p2_evt
	.type	p2_evt, @object
	.size	p2_evt, 1
p2_evt:
	.zero	1
	.globl	_x_p2_evt
	.type	_x_p2_evt, @object
	.size	_x_p2_evt, 1
_x_p2_evt:
	.zero	1
	.globl	p9_l2
	.type	p9_l2, @object
	.size	p9_l2, 1
p9_l2:
	.zero	1
	.globl	_x_p9_l2
	.type	_x_p9_l2, @object
	.size	_x_p9_l2, 1
_x_p9_l2:
	.zero	1
	.globl	p14_l1
	.type	p14_l1, @object
	.size	p14_l1, 1
p14_l1:
	.zero	1
	.globl	_x_p14_l1
	.type	_x_p14_l1, @object
	.size	_x_p14_l1, 1
_x_p14_l1:
	.zero	1
	.globl	p20_c
	.align 4
	.type	p20_c, @object
	.size	p20_c, 4
p20_c:
	.zero	4
	.globl	_x_p20_c
	.align 4
	.type	_x_p20_c, @object
	.size	_x_p20_c, 4
_x_p20_c:
	.zero	4
	.globl	p18_l1
	.type	p18_l1, @object
	.size	p18_l1, 1
p18_l1:
	.zero	1
	.globl	_x_p18_l1
	.type	_x_p18_l1, @object
	.size	_x_p18_l1, 1
_x_p18_l1:
	.zero	1
	.globl	p9_l3
	.type	p9_l3, @object
	.size	p9_l3, 1
p9_l3:
	.zero	1
	.globl	_x_p9_l3
	.type	_x_p9_l3, @object
	.size	_x_p9_l3, 1
_x_p9_l3:
	.zero	1
	.globl	p14_l2
	.type	p14_l2, @object
	.size	p14_l2, 1
p14_l2:
	.zero	1
	.globl	_x_p14_l2
	.type	_x_p14_l2, @object
	.size	_x_p14_l2, 1
_x_p14_l2:
	.zero	1
	.globl	p2_c
	.align 4
	.type	p2_c, @object
	.size	p2_c, 4
p2_c:
	.zero	4
	.globl	_x_p2_c
	.align 4
	.type	_x_p2_c, @object
	.size	_x_p2_c, 4
_x_p2_c:
	.zero	4
	.globl	p9_l1
	.type	p9_l1, @object
	.size	p9_l1, 1
p9_l1:
	.zero	1
	.globl	_x_p9_l1
	.type	_x_p9_l1, @object
	.size	_x_p9_l1, 1
_x_p9_l1:
	.zero	1
	.globl	p11_c
	.align 4
	.type	p11_c, @object
	.size	p11_c, 4
p11_c:
	.zero	4
	.globl	_x_p11_c
	.align 4
	.type	_x_p11_c, @object
	.size	_x_p11_c, 4
_x_p11_c:
	.zero	4
	.globl	p14_l3
	.type	p14_l3, @object
	.size	p14_l3, 1
p14_l3:
	.zero	1
	.globl	_x_p14_l3
	.type	_x_p14_l3, @object
	.size	_x_p14_l3, 1
_x_p14_l3:
	.zero	1
	.globl	p2_l0
	.type	p2_l0, @object
	.size	p2_l0, 1
p2_l0:
	.zero	1
	.globl	_x_p2_l0
	.type	_x_p2_l0, @object
	.size	_x_p2_l0, 1
_x_p2_l0:
	.zero	1
	.globl	p4_c
	.align 4
	.type	p4_c, @object
	.size	p4_c, 4
p4_c:
	.zero	4
	.globl	_x_p4_c
	.align 4
	.type	_x_p4_c, @object
	.size	_x_p4_c, 4
_x_p4_c:
	.zero	4
	.globl	p11_l0
	.type	p11_l0, @object
	.size	p11_l0, 1
p11_l0:
	.zero	1
	.globl	_x_p11_l0
	.type	_x_p11_l0, @object
	.size	_x_p11_l0, 1
_x_p11_l0:
	.zero	1
	.globl	p19_l0
	.type	p19_l0, @object
	.size	p19_l0, 1
p19_l0:
	.zero	1
	.globl	_x_p19_l0
	.type	_x_p19_l0, @object
	.size	_x_p19_l0, 1
_x_p19_l0:
	.zero	1
	.globl	p10_l2
	.type	p10_l2, @object
	.size	p10_l2, 1
p10_l2:
	.zero	1
	.globl	_x_p10_l2
	.type	_x_p10_l2, @object
	.size	_x_p10_l2, 1
_x_p10_l2:
	.zero	1
	.globl	p12_evt
	.type	p12_evt, @object
	.size	p12_evt, 1
p12_evt:
	.zero	1
	.globl	_x_p12_evt
	.type	_x_p12_evt, @object
	.size	_x_p12_evt, 1
_x_p12_evt:
	.zero	1
	.globl	p8_evt
	.type	p8_evt, @object
	.size	p8_evt, 1
p8_evt:
	.zero	1
	.globl	_x_p8_evt
	.type	_x_p8_evt, @object
	.size	_x_p8_evt, 1
_x_p8_evt:
	.zero	1
	.globl	p15_l0
	.type	p15_l0, @object
	.size	p15_l0, 1
p15_l0:
	.zero	1
	.globl	_x_p15_l0
	.type	_x_p15_l0, @object
	.size	_x_p15_l0, 1
_x_p15_l0:
	.zero	1
	.globl	p17_c
	.align 4
	.type	p17_c, @object
	.size	p17_c, 4
p17_c:
	.zero	4
	.globl	_x_p17_c
	.align 4
	.type	_x_p17_c, @object
	.size	_x_p17_c, 4
_x_p17_c:
	.zero	4
	.globl	p15_l1
	.type	p15_l1, @object
	.size	p15_l1, 1
p15_l1:
	.zero	1
	.globl	_x_p15_l1
	.type	_x_p15_l1, @object
	.size	_x_p15_l1, 1
_x_p15_l1:
	.zero	1
	.globl	p17_evt
	.type	p17_evt, @object
	.size	p17_evt, 1
p17_evt:
	.zero	1
	.globl	_x_p17_evt
	.type	_x_p17_evt, @object
	.size	_x_p17_evt, 1
_x_p17_evt:
	.zero	1
	.globl	p15_l2
	.type	p15_l2, @object
	.size	p15_l2, 1
p15_l2:
	.zero	1
	.globl	_x_p15_l2
	.type	_x_p15_l2, @object
	.size	_x_p15_l2, 1
_x_p15_l2:
	.zero	1
	.globl	p15_l3
	.type	p15_l3, @object
	.size	p15_l3, 1
p15_l3:
	.zero	1
	.globl	_x_p15_l3
	.type	_x_p15_l3, @object
	.size	_x_p15_l3, 1
_x_p15_l3:
	.zero	1
	.globl	p5_l3
	.type	p5_l3, @object
	.size	p5_l3, 1
p5_l3:
	.zero	1
	.globl	_x_p5_l3
	.type	_x_p5_l3, @object
	.size	_x_p5_l3, 1
_x_p5_l3:
	.zero	1
	.globl	p16_evt
	.type	p16_evt, @object
	.size	p16_evt, 1
p16_evt:
	.zero	1
	.globl	_x_p16_evt
	.type	_x_p16_evt, @object
	.size	_x_p16_evt, 1
_x_p16_evt:
	.zero	1
	.text
	.globl	main
	.type	main, @function
main:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p20_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p20_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p19_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p19_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p18_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p20_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p18_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p17_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p19_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p17_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p16_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p10_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p6_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p4_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p4_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p13_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p1_evt[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p1_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p0_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p0_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p0_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR proposed7[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR proposed6[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR proposed5[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p12_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR proposed4[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p7_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR proposed3[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR proposed2[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR proposed1[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p8_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR proposed0[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR inc_max_prop[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR max_prop[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p20_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p11_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p2_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR v2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p15_evt[rip], al
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR v1[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p15_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR delta[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR proposed8[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p7_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p9_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p12_l3[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR proposed9[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p12_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p14_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR proposed10[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p12_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p14_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p3_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p5_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p3_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p8_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p10_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p13_l3[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR proposed11[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p3_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p5_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p17_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p8_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p10_evt[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR proposed12[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR proposed13[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR proposed14[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR proposed15[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p13_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p11_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p2_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p4_evt[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR proposed16[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p3_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p1_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR proposed17[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p6_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p6_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p7_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p9_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p16_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p1_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR proposed19[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p6_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p18_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p7_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p16_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p1_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR proposed18[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p3_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p20_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p11_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p2_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p13_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p1_l3[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR proposed20[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p6_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p18_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p16_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p3_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p19_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p17_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p8_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p4_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p13_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p0_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p0_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p0_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p5_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p7_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p19_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p10_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p4_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p13_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p6_evt[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _diverge_delta[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p5_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p16_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p5_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p7_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p10_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p12_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p8_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p9_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p14_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p18_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p11_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p2_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p9_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p14_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p20_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p18_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p9_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p14_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p2_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p9_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p11_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p14_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p2_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p4_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p11_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p19_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p10_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p12_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p8_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p15_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p17_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p15_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p17_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p15_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p15_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p5_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p16_evt[rip], al
	movzx	eax, BYTE PTR p20_l3[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p20_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	je	.L5
.L4:
	movzx	eax, BYTE PTR p20_l3[rip]
	test	al, al
	jne	.L6
	movzx	eax, BYTE PTR p20_l2[rip]
	test	al, al
	je	.L6
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	je	.L6
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	jne	.L5
.L6:
	movzx	eax, BYTE PTR p20_l3[rip]
	test	al, al
	jne	.L7
	movzx	eax, BYTE PTR p20_l2[rip]
	test	al, al
	je	.L7
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	je	.L7
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	je	.L5
.L7:
	movzx	eax, BYTE PTR p20_l3[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR p20_l2[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	je	.L5
.L8:
	movzx	eax, BYTE PTR p20_l3[rip]
	test	al, al
	jne	.L9
	movzx	eax, BYTE PTR p20_l2[rip]
	test	al, al
	je	.L9
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	jne	.L9
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	je	.L5
.L9:
	movzx	eax, BYTE PTR p20_l3[rip]
	test	al, al
	jne	.L10
	movzx	eax, BYTE PTR p20_l2[rip]
	test	al, al
	jne	.L10
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	je	.L10
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	jne	.L5
.L10:
	movzx	eax, BYTE PTR p20_l3[rip]
	test	al, al
	jne	.L11
	movzx	eax, BYTE PTR p20_l2[rip]
	test	al, al
	jne	.L11
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	je	.L11
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	je	.L5
.L11:
	movzx	eax, BYTE PTR p20_l3[rip]
	test	al, al
	jne	.L12
	movzx	eax, BYTE PTR p20_l2[rip]
	test	al, al
	jne	.L12
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	jne	.L12
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	je	.L5
.L12:
	movzx	eax, BYTE PTR p20_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p20_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	je	.L13
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	jne	.L13
.L5:
	movzx	eax, BYTE PTR p20_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p20_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	jne	.L13
	movss	xmm0, DWORD PTR p20_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L13
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L13
	movss	xmm1, DWORD PTR p20_c[rip]
	movss	xmm0, DWORD PTR proposed20[rip]
	comiss	xmm0, xmm1
	jnb	.L15
	movzx	eax, BYTE PTR p20_l3[rip]
	test	al, al
	jne	.L16
	movzx	eax, BYTE PTR p20_l2[rip]
	test	al, al
	jne	.L16
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	je	.L16
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	je	.L13
.L16:
	movzx	eax, BYTE PTR p20_l3[rip]
	test	al, al
	jne	.L17
	movzx	eax, BYTE PTR p20_l2[rip]
	test	al, al
	je	.L17
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	jne	.L17
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	je	.L13
.L17:
	movzx	eax, BYTE PTR p20_l3[rip]
	test	al, al
	jne	.L18
	movzx	eax, BYTE PTR p20_l2[rip]
	test	al, al
	je	.L18
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	je	.L18
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	jne	.L13
.L18:
	movzx	eax, BYTE PTR p20_l3[rip]
	test	al, al
	je	.L15
	movzx	eax, BYTE PTR p20_l2[rip]
	test	al, al
	jne	.L15
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	jne	.L15
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	je	.L13
.L15:
	movzx	eax, BYTE PTR p19_l3[rip]
	test	al, al
	je	.L19
	movzx	eax, BYTE PTR p19_l2[rip]
	test	al, al
	jne	.L19
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	jne	.L19
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	je	.L20
.L19:
	movzx	eax, BYTE PTR p19_l3[rip]
	test	al, al
	jne	.L21
	movzx	eax, BYTE PTR p19_l2[rip]
	test	al, al
	je	.L21
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	je	.L21
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	jne	.L20
.L21:
	movzx	eax, BYTE PTR p19_l3[rip]
	test	al, al
	jne	.L22
	movzx	eax, BYTE PTR p19_l2[rip]
	test	al, al
	je	.L22
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	je	.L22
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	je	.L20
.L22:
	movzx	eax, BYTE PTR p19_l3[rip]
	test	al, al
	jne	.L23
	movzx	eax, BYTE PTR p19_l2[rip]
	test	al, al
	je	.L23
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	je	.L23
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	je	.L20
.L23:
	movzx	eax, BYTE PTR p19_l3[rip]
	test	al, al
	jne	.L24
	movzx	eax, BYTE PTR p19_l2[rip]
	test	al, al
	je	.L24
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	jne	.L24
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	je	.L20
.L24:
	movzx	eax, BYTE PTR p19_l3[rip]
	test	al, al
	jne	.L25
	movzx	eax, BYTE PTR p19_l2[rip]
	test	al, al
	jne	.L25
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	je	.L25
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	jne	.L20
.L25:
	movzx	eax, BYTE PTR p19_l3[rip]
	test	al, al
	jne	.L26
	movzx	eax, BYTE PTR p19_l2[rip]
	test	al, al
	jne	.L26
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	je	.L26
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	je	.L20
.L26:
	movzx	eax, BYTE PTR p19_l3[rip]
	test	al, al
	jne	.L27
	movzx	eax, BYTE PTR p19_l2[rip]
	test	al, al
	jne	.L27
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	jne	.L27
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	je	.L20
.L27:
	movzx	eax, BYTE PTR p19_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p19_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	je	.L13
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	jne	.L13
.L20:
	movzx	eax, BYTE PTR p19_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p19_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	jne	.L13
	movss	xmm0, DWORD PTR p19_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L13
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L13
	movss	xmm1, DWORD PTR p19_c[rip]
	movss	xmm0, DWORD PTR proposed19[rip]
	comiss	xmm0, xmm1
	jnb	.L29
	movzx	eax, BYTE PTR p19_l3[rip]
	test	al, al
	jne	.L30
	movzx	eax, BYTE PTR p19_l2[rip]
	test	al, al
	jne	.L30
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	je	.L30
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	je	.L13
.L30:
	movzx	eax, BYTE PTR p19_l3[rip]
	test	al, al
	jne	.L31
	movzx	eax, BYTE PTR p19_l2[rip]
	test	al, al
	je	.L31
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	jne	.L31
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	je	.L13
.L31:
	movzx	eax, BYTE PTR p19_l3[rip]
	test	al, al
	jne	.L32
	movzx	eax, BYTE PTR p19_l2[rip]
	test	al, al
	je	.L32
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	je	.L32
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	jne	.L13
.L32:
	movzx	eax, BYTE PTR p19_l3[rip]
	test	al, al
	je	.L29
	movzx	eax, BYTE PTR p19_l2[rip]
	test	al, al
	jne	.L29
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	jne	.L29
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	je	.L13
.L29:
	movzx	eax, BYTE PTR p18_l3[rip]
	test	al, al
	je	.L33
	movzx	eax, BYTE PTR p18_l2[rip]
	test	al, al
	jne	.L33
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	jne	.L33
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	je	.L34
.L33:
	movzx	eax, BYTE PTR p18_l3[rip]
	test	al, al
	jne	.L35
	movzx	eax, BYTE PTR p18_l2[rip]
	test	al, al
	je	.L35
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	je	.L35
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	jne	.L34
.L35:
	movzx	eax, BYTE PTR p18_l3[rip]
	test	al, al
	jne	.L36
	movzx	eax, BYTE PTR p18_l2[rip]
	test	al, al
	je	.L36
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	je	.L36
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	je	.L34
.L36:
	movzx	eax, BYTE PTR p18_l3[rip]
	test	al, al
	jne	.L37
	movzx	eax, BYTE PTR p18_l2[rip]
	test	al, al
	je	.L37
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	je	.L37
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	je	.L34
.L37:
	movzx	eax, BYTE PTR p18_l3[rip]
	test	al, al
	jne	.L38
	movzx	eax, BYTE PTR p18_l2[rip]
	test	al, al
	je	.L38
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	jne	.L38
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	je	.L34
.L38:
	movzx	eax, BYTE PTR p18_l3[rip]
	test	al, al
	jne	.L39
	movzx	eax, BYTE PTR p18_l2[rip]
	test	al, al
	jne	.L39
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	je	.L39
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	jne	.L34
.L39:
	movzx	eax, BYTE PTR p18_l3[rip]
	test	al, al
	jne	.L40
	movzx	eax, BYTE PTR p18_l2[rip]
	test	al, al
	jne	.L40
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	je	.L40
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	je	.L34
.L40:
	movzx	eax, BYTE PTR p18_l3[rip]
	test	al, al
	jne	.L41
	movzx	eax, BYTE PTR p18_l2[rip]
	test	al, al
	jne	.L41
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	jne	.L41
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	je	.L34
.L41:
	movzx	eax, BYTE PTR p18_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p18_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	je	.L13
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	jne	.L13
.L34:
	movzx	eax, BYTE PTR p18_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p18_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	jne	.L13
	movss	xmm0, DWORD PTR p18_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L13
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L13
	movss	xmm1, DWORD PTR p18_c[rip]
	movss	xmm0, DWORD PTR proposed18[rip]
	comiss	xmm0, xmm1
	jnb	.L43
	movzx	eax, BYTE PTR p18_l3[rip]
	test	al, al
	jne	.L44
	movzx	eax, BYTE PTR p18_l2[rip]
	test	al, al
	jne	.L44
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	je	.L44
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	je	.L13
.L44:
	movzx	eax, BYTE PTR p18_l3[rip]
	test	al, al
	jne	.L45
	movzx	eax, BYTE PTR p18_l2[rip]
	test	al, al
	je	.L45
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	jne	.L45
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	je	.L13
.L45:
	movzx	eax, BYTE PTR p18_l3[rip]
	test	al, al
	jne	.L46
	movzx	eax, BYTE PTR p18_l2[rip]
	test	al, al
	je	.L46
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	je	.L46
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	jne	.L13
.L46:
	movzx	eax, BYTE PTR p18_l3[rip]
	test	al, al
	je	.L43
	movzx	eax, BYTE PTR p18_l2[rip]
	test	al, al
	jne	.L43
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	jne	.L43
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	je	.L13
.L43:
	movzx	eax, BYTE PTR p17_l3[rip]
	test	al, al
	je	.L47
	movzx	eax, BYTE PTR p17_l2[rip]
	test	al, al
	jne	.L47
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	jne	.L47
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	je	.L48
.L47:
	movzx	eax, BYTE PTR p17_l3[rip]
	test	al, al
	jne	.L49
	movzx	eax, BYTE PTR p17_l2[rip]
	test	al, al
	je	.L49
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	je	.L49
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	jne	.L48
.L49:
	movzx	eax, BYTE PTR p17_l3[rip]
	test	al, al
	jne	.L50
	movzx	eax, BYTE PTR p17_l2[rip]
	test	al, al
	je	.L50
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	je	.L50
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	je	.L48
.L50:
	movzx	eax, BYTE PTR p17_l3[rip]
	test	al, al
	jne	.L51
	movzx	eax, BYTE PTR p17_l2[rip]
	test	al, al
	je	.L51
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	je	.L51
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	je	.L48
.L51:
	movzx	eax, BYTE PTR p17_l3[rip]
	test	al, al
	jne	.L52
	movzx	eax, BYTE PTR p17_l2[rip]
	test	al, al
	je	.L52
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	jne	.L52
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	je	.L48
.L52:
	movzx	eax, BYTE PTR p17_l3[rip]
	test	al, al
	jne	.L53
	movzx	eax, BYTE PTR p17_l2[rip]
	test	al, al
	jne	.L53
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	je	.L53
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	jne	.L48
.L53:
	movzx	eax, BYTE PTR p17_l3[rip]
	test	al, al
	jne	.L54
	movzx	eax, BYTE PTR p17_l2[rip]
	test	al, al
	jne	.L54
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	je	.L54
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	je	.L48
.L54:
	movzx	eax, BYTE PTR p17_l3[rip]
	test	al, al
	jne	.L55
	movzx	eax, BYTE PTR p17_l2[rip]
	test	al, al
	jne	.L55
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	jne	.L55
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	je	.L48
.L55:
	movzx	eax, BYTE PTR p17_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p17_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	je	.L13
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	jne	.L13
.L48:
	movzx	eax, BYTE PTR p17_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p17_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	jne	.L13
	movss	xmm0, DWORD PTR p17_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L13
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L13
	movss	xmm1, DWORD PTR p17_c[rip]
	movss	xmm0, DWORD PTR proposed17[rip]
	comiss	xmm0, xmm1
	jnb	.L57
	movzx	eax, BYTE PTR p17_l3[rip]
	test	al, al
	jne	.L58
	movzx	eax, BYTE PTR p17_l2[rip]
	test	al, al
	jne	.L58
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	je	.L58
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	je	.L13
.L58:
	movzx	eax, BYTE PTR p17_l3[rip]
	test	al, al
	jne	.L59
	movzx	eax, BYTE PTR p17_l2[rip]
	test	al, al
	je	.L59
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	jne	.L59
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	je	.L13
.L59:
	movzx	eax, BYTE PTR p17_l3[rip]
	test	al, al
	jne	.L60
	movzx	eax, BYTE PTR p17_l2[rip]
	test	al, al
	je	.L60
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	je	.L60
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	jne	.L13
.L60:
	movzx	eax, BYTE PTR p17_l3[rip]
	test	al, al
	je	.L57
	movzx	eax, BYTE PTR p17_l2[rip]
	test	al, al
	jne	.L57
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	jne	.L57
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	je	.L13
.L57:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	je	.L61
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L61
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L61
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L62
.L61:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L63
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	je	.L63
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L63
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L62
.L63:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L64
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	je	.L64
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L64
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L62
.L64:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L65
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	je	.L65
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L65
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L62
.L65:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L66
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	je	.L66
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L66
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L62
.L66:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L67
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L67
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L67
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L62
.L67:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L68
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L68
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L68
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L62
.L68:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L69
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L69
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L69
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L62
.L69:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L13
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L13
.L62:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L13
	movss	xmm0, DWORD PTR p16_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L13
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L13
	movss	xmm1, DWORD PTR p16_c[rip]
	movss	xmm0, DWORD PTR proposed16[rip]
	comiss	xmm0, xmm1
	jnb	.L71
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L72
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L72
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L72
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L13
.L72:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L73
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	je	.L73
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L73
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L13
.L73:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L74
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	je	.L74
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L74
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L13
.L74:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	je	.L71
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L71
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L71
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L13
.L71:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	je	.L75
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L75
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L75
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L76
.L75:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L77
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	je	.L77
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L77
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L76
.L77:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L78
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	je	.L78
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L78
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L76
.L78:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L79
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	je	.L79
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L79
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L76
.L79:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L80
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	je	.L80
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L80
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L76
.L80:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L81
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L81
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L81
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L76
.L81:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L82
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L82
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L82
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L76
.L82:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L83
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L83
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L83
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L76
.L83:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L13
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L13
.L76:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L13
	movss	xmm0, DWORD PTR p15_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L13
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L13
	movss	xmm1, DWORD PTR p15_c[rip]
	movss	xmm0, DWORD PTR proposed15[rip]
	comiss	xmm0, xmm1
	jnb	.L85
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L86
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L86
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L86
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L13
.L86:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L87
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	je	.L87
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L87
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L13
.L87:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L88
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	je	.L88
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L88
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L13
.L88:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	je	.L85
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L85
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L85
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L13
.L85:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L90
.L89:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L91
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L91
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L91
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L90
.L91:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L92
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L92
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L92
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L90
.L92:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L93
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L93
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L93
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L90
.L93:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L94
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L94
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L94
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L90
.L94:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L95
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L95
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L95
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L90
.L95:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L96
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L96
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L96
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L90
.L96:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L97
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L97
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L97
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L90
.L97:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L13
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L13
.L90:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L13
	movss	xmm0, DWORD PTR p14_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L13
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L13
	movss	xmm1, DWORD PTR p14_c[rip]
	movss	xmm0, DWORD PTR proposed14[rip]
	comiss	xmm0, xmm1
	jnb	.L99
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L100
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L100
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L100
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L13
.L100:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L101
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L101
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L101
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L13
.L101:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L102
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L102
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L102
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L13
.L102:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	je	.L99
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L99
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L99
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L13
.L99:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	je	.L103
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L103
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L103
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L104
.L103:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L105
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L105
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L105
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L104
.L105:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L106
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L106
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L106
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L104
.L106:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L107
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L107
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L107
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L104
.L107:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L108
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L108
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L108
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L104
.L108:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L109
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L109
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L109
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L104
.L109:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L110
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L110
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L110
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L104
.L110:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L111
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L111
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L111
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L104
.L111:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L13
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L13
.L104:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L13
	movss	xmm0, DWORD PTR p13_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L13
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L13
	movss	xmm1, DWORD PTR p13_c[rip]
	movss	xmm0, DWORD PTR proposed13[rip]
	comiss	xmm0, xmm1
	jnb	.L113
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L114
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L114
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L114
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L13
.L114:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L115
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L115
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L115
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L13
.L115:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L116
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L116
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L116
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L13
.L116:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	je	.L113
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L113
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L113
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L13
.L113:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	je	.L117
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L117
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L117
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L118
.L117:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L119
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L119
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L119
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L118
.L119:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L120
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L120
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L120
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L118
.L120:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L121
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L121
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L121
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L118
.L121:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L122
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L122
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L122
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L118
.L122:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L123
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L123
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L123
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L118
.L123:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L124
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L124
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L124
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L118
.L124:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L125
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L125
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L125
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L118
.L125:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L13
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L13
.L118:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L13
	movss	xmm0, DWORD PTR p12_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L13
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L13
	movss	xmm1, DWORD PTR p12_c[rip]
	movss	xmm0, DWORD PTR proposed12[rip]
	comiss	xmm0, xmm1
	jnb	.L127
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L128
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L128
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L128
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L13
.L128:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L129
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L129
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L129
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L13
.L129:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L130
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L130
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L130
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L13
.L130:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	je	.L127
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L127
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L127
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L13
.L127:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	je	.L131
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L131
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L131
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L132
.L131:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L133
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L133
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L133
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L132
.L133:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L134
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L134
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L134
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L132
.L134:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L135
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L135
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L135
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L132
.L135:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L136
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L136
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L136
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L132
.L136:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L137
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L137
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L137
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L132
.L137:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L138
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L138
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L138
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L132
.L138:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L139
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L139
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L139
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L132
.L139:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L13
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L13
.L132:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L13
	movss	xmm0, DWORD PTR p11_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L13
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L13
	movss	xmm1, DWORD PTR p11_c[rip]
	movss	xmm0, DWORD PTR proposed11[rip]
	comiss	xmm0, xmm1
	jnb	.L141
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L142
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L142
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L142
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L13
.L142:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L143
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L143
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L143
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L13
.L143:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L144
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L144
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L144
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L13
.L144:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	je	.L141
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L141
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L141
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L13
.L141:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	je	.L145
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L145
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L145
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L146
.L145:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L147
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L147
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L147
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L146
.L147:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L148
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L148
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L148
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L146
.L148:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L146
.L149:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L150
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L150
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L150
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L146
.L150:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L151
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L151
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L151
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L146
.L151:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L152
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L152
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L152
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L146
.L152:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L153
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L153
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L153
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L146
.L153:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L13
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L13
.L146:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L13
	movss	xmm0, DWORD PTR p10_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L13
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L13
	movss	xmm1, DWORD PTR p10_c[rip]
	movss	xmm0, DWORD PTR proposed10[rip]
	comiss	xmm0, xmm1
	jnb	.L155
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L156
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L156
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L156
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L13
.L156:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L13
.L157:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L158
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L158
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L158
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L13
.L158:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	je	.L155
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L155
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L155
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L13
.L155:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	je	.L159
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L159
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L159
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L160
.L159:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L161
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L161
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L161
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L160
.L161:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L162
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L162
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L162
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L160
.L162:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L163
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L163
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L163
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L160
.L163:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L164
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L164
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L164
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L160
.L164:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L165
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L165
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L165
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L160
.L165:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L166
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L166
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L166
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L160
.L166:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L167
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L167
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L167
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L160
.L167:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L13
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L13
.L160:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L13
	movss	xmm0, DWORD PTR p9_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L13
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L13
	movss	xmm1, DWORD PTR p9_c[rip]
	movss	xmm0, DWORD PTR proposed9[rip]
	comiss	xmm0, xmm1
	jnb	.L169
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L170
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L170
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L170
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L13
.L170:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L171
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L171
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L171
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L13
.L171:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L172
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L172
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L172
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L13
.L172:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	je	.L169
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L169
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L169
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L13
.L169:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	je	.L173
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L173
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L173
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L174
.L173:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L175
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L175
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L175
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L174
.L175:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L176
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L176
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L176
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L174
.L176:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L177
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L177
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L177
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L174
.L177:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L178
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L178
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L178
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L174
.L178:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L179
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L179
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L179
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L174
.L179:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L180
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L180
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L180
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L174
.L180:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L181
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L181
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L181
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L174
.L181:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L13
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L13
.L174:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L13
	movss	xmm0, DWORD PTR p8_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L13
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L13
	movss	xmm1, DWORD PTR p8_c[rip]
	movss	xmm0, DWORD PTR proposed8[rip]
	comiss	xmm0, xmm1
	jnb	.L183
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L184
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L184
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L184
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L13
.L184:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L185
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L185
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L185
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L13
.L185:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L186
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L186
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L186
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L13
.L186:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	je	.L183
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L183
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L183
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L13
.L183:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	je	.L187
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L187
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L187
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L188
.L187:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L189
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L189
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L189
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L188
.L189:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L190
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L190
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L190
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L188
.L190:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L191
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L191
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L191
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L188
.L191:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L188
.L192:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L193
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L193
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L193
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L188
.L193:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L194
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L194
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L194
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L188
.L194:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L195
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L195
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L195
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L188
.L195:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L13
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L13
.L188:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L13
	movss	xmm0, DWORD PTR p7_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L13
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L13
	movss	xmm1, DWORD PTR p7_c[rip]
	movss	xmm0, DWORD PTR proposed7[rip]
	comiss	xmm0, xmm1
	jnb	.L197
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L198
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L198
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L198
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L13
.L198:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L199
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L199
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L199
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L13
.L199:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L200
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L200
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L200
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L13
.L200:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	je	.L197
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L197
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L197
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L13
.L197:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	je	.L201
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L201
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L201
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L202
.L201:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L203
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L203
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L203
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L202
.L203:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L204
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L204
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L204
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L202
.L204:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L205
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L205
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L205
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L202
.L205:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L206
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L206
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L206
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L202
.L206:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L207
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L207
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L207
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L202
.L207:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L208
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L208
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L208
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L202
.L208:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L209
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L209
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L209
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L202
.L209:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L13
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L13
.L202:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L13
	movss	xmm0, DWORD PTR p6_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L13
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L13
	movss	xmm1, DWORD PTR p6_c[rip]
	movss	xmm0, DWORD PTR proposed6[rip]
	comiss	xmm0, xmm1
	jnb	.L211
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L212
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L212
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L212
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L13
.L212:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L213
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L213
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L213
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L13
.L213:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L214
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L214
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L214
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L13
.L214:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	je	.L211
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L211
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L211
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L13
.L211:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	je	.L215
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L215
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L215
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L216
.L215:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L217
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L217
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L217
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L216
.L217:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L218
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L218
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L218
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L216
.L218:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L219
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L219
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L219
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L216
.L219:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L220
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L220
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L220
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L216
.L220:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L221
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L221
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L221
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L216
.L221:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L222
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L222
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L222
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L216
.L222:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L223
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L223
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L223
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L216
.L223:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L13
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L13
.L216:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L13
	movss	xmm0, DWORD PTR p5_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L13
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L13
	movss	xmm1, DWORD PTR p5_c[rip]
	movss	xmm0, DWORD PTR proposed5[rip]
	comiss	xmm0, xmm1
	jnb	.L225
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L226
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L226
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L226
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L13
.L226:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L227
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L227
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L227
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L13
.L227:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L228
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L228
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L228
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L13
.L228:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	je	.L225
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L225
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L225
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L13
.L225:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L230
.L229:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L231
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L231
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L231
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L230
.L231:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L232
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L232
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L232
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L230
.L232:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L233
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L233
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L233
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L230
.L233:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L234
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L234
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L234
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L230
.L234:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L235
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L235
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L235
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L230
.L235:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L236
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L236
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L236
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L230
.L236:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L237
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L237
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L237
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L230
.L237:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L13
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L13
.L230:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L13
	movss	xmm0, DWORD PTR p4_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L13
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L13
	movss	xmm1, DWORD PTR p4_c[rip]
	movss	xmm0, DWORD PTR proposed4[rip]
	comiss	xmm0, xmm1
	jnb	.L239
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L240
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L240
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L240
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L13
.L240:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L241
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L241
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L241
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L13
.L241:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L242
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L242
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L242
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L13
.L242:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	je	.L239
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L239
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L239
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L13
.L239:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	je	.L243
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L243
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L243
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L244
.L243:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L245
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L245
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L245
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L244
.L245:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L246
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L246
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L246
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L244
.L246:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L247
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L247
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L247
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L244
.L247:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L248
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L248
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L248
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L244
.L248:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L249
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L249
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L249
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L244
.L249:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L250
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L250
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L250
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L244
.L250:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L251
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L251
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L251
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L244
.L251:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L13
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L13
.L244:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L13
	movss	xmm0, DWORD PTR p3_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L13
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L13
	movss	xmm1, DWORD PTR p3_c[rip]
	movss	xmm0, DWORD PTR proposed3[rip]
	comiss	xmm0, xmm1
	jnb	.L253
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L254
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L254
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L254
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L13
.L254:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L255
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L255
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L255
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L13
.L255:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L256
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L256
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L256
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L13
.L256:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	je	.L253
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L253
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L253
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L13
.L253:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L258
.L257:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L259
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L259
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L259
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L258
.L259:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L260
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L260
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L260
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L258
.L260:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L261
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L261
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L261
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L258
.L261:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L262
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L262
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L262
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L258
.L262:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L263
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L263
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L263
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L258
.L263:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L264
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L264
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L264
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L258
.L264:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L265
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L265
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L265
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L258
.L265:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L13
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L13
.L258:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L13
	movss	xmm0, DWORD PTR p2_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L13
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L13
	movss	xmm1, DWORD PTR p2_c[rip]
	movss	xmm0, DWORD PTR proposed2[rip]
	comiss	xmm0, xmm1
	jnb	.L267
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L268
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L268
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L268
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L13
.L268:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L269
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L269
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L269
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L13
.L269:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L270
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L270
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L270
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L13
.L270:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	je	.L267
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L267
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L267
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L13
.L267:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	je	.L271
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L271
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L271
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L272
.L271:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L273
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L273
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L273
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L272
.L273:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L274
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L274
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L274
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L272
.L274:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L275
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L275
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L275
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L272
.L275:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L276
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L276
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L276
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L272
.L276:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L277
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L277
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L277
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L272
.L277:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L278
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L278
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L278
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L272
.L278:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L279
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L279
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L279
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L272
.L279:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L13
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L13
.L272:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L13
	movss	xmm0, DWORD PTR p1_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L13
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L13
	movss	xmm1, DWORD PTR p1_c[rip]
	movss	xmm0, DWORD PTR proposed1[rip]
	comiss	xmm0, xmm1
	jnb	.L281
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L282
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L282
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L282
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L13
.L282:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L283
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L283
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L283
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L13
.L283:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L284
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L284
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L284
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L13
.L284:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	je	.L281
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L281
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L281
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L13
.L281:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	je	.L285
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L285
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L285
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L286
.L285:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L287
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L287
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L287
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L286
.L287:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L288
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L288
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L288
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L286
.L288:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L289
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L289
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L289
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L286
.L289:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L290
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L290
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L290
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L286
.L290:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L291
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L291
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L291
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L286
.L291:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L292
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L292
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L292
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L286
.L292:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L293
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L293
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L293
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L286
.L293:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L13
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L13
.L286:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L13
	movss	xmm0, DWORD PTR p0_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L13
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L13
	movss	xmm1, DWORD PTR p0_c[rip]
	movss	xmm0, DWORD PTR proposed0[rip]
	comiss	xmm0, xmm1
	jnb	.L295
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L296
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L296
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L296
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L13
.L296:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L297
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L297
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L297
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L13
.L297:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L298
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L298
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L298
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L13
.L298:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	je	.L295
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L295
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L295
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L13
.L295:
	movzx	eax, BYTE PTR inc_max_prop[rip]
	test	al, al
	je	.L13
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 21
	je	.L299
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 20
	je	.L299
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 19
	je	.L299
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 18
	je	.L299
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 17
	je	.L299
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 16
	je	.L299
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 15
	je	.L299
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 14
	je	.L299
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 13
	je	.L299
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 12
	je	.L299
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 11
	je	.L299
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 10
	je	.L299
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 9
	je	.L299
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 8
	je	.L299
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 7
	je	.L299
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 6
	je	.L299
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 5
	je	.L299
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 4
	je	.L299
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 3
	je	.L299
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 2
	je	.L299
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	je	.L299
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 1
	jne	.L13
.L299:
	movss	xmm0, DWORD PTR proposed0[rip]
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jp	.L13
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jne	.L13
	movss	xmm0, DWORD PTR proposed1[rip]
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jp	.L13
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jne	.L13
	movss	xmm0, DWORD PTR proposed2[rip]
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jp	.L13
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jne	.L13
	movss	xmm0, DWORD PTR proposed3[rip]
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jp	.L13
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jne	.L13
	movss	xmm0, DWORD PTR proposed4[rip]
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jp	.L13
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jne	.L13
	movss	xmm0, DWORD PTR proposed5[rip]
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jp	.L13
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jne	.L13
	movss	xmm0, DWORD PTR proposed6[rip]
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jp	.L13
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jne	.L13
	movss	xmm0, DWORD PTR proposed7[rip]
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jp	.L13
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jne	.L13
	movss	xmm0, DWORD PTR proposed8[rip]
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jp	.L13
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jne	.L13
	movss	xmm0, DWORD PTR proposed9[rip]
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jp	.L13
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jne	.L13
	movss	xmm0, DWORD PTR proposed10[rip]
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jp	.L13
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jne	.L13
	movss	xmm0, DWORD PTR proposed11[rip]
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jp	.L13
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jne	.L13
	movss	xmm0, DWORD PTR proposed12[rip]
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jp	.L13
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jne	.L13
	movss	xmm0, DWORD PTR proposed13[rip]
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jp	.L13
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jne	.L13
	movss	xmm0, DWORD PTR proposed14[rip]
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jp	.L13
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jne	.L13
	movss	xmm0, DWORD PTR proposed15[rip]
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jp	.L13
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jne	.L13
	movss	xmm0, DWORD PTR proposed16[rip]
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jp	.L13
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jne	.L13
	movss	xmm0, DWORD PTR proposed17[rip]
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jp	.L13
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jne	.L13
	movss	xmm0, DWORD PTR proposed18[rip]
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jp	.L13
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jne	.L13
	movss	xmm0, DWORD PTR proposed19[rip]
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jp	.L13
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jne	.L13
	movss	xmm0, DWORD PTR proposed20[rip]
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jp	.L13
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	jne	.L13
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jb	.L13
	movss	xmm1, DWORD PTR proposed0[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L13
	movss	xmm1, DWORD PTR proposed0[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L13
	movss	xmm1, DWORD PTR proposed1[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L13
	movss	xmm1, DWORD PTR proposed1[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L13
	movss	xmm1, DWORD PTR proposed2[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L13
	movss	xmm1, DWORD PTR proposed2[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L13
	movss	xmm1, DWORD PTR proposed3[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L13
	movss	xmm1, DWORD PTR proposed3[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L13
	movss	xmm1, DWORD PTR proposed4[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L13
	movss	xmm1, DWORD PTR proposed4[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L13
	movss	xmm1, DWORD PTR proposed5[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L13
	movss	xmm1, DWORD PTR proposed5[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L13
	movss	xmm1, DWORD PTR proposed6[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L13
	movss	xmm1, DWORD PTR proposed6[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L13
	movss	xmm1, DWORD PTR proposed7[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L13
	movss	xmm1, DWORD PTR proposed7[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L13
	movss	xmm1, DWORD PTR proposed8[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L13
	movss	xmm1, DWORD PTR proposed8[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L13
	movss	xmm1, DWORD PTR proposed9[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L13
	movss	xmm1, DWORD PTR proposed9[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L13
	movss	xmm1, DWORD PTR proposed10[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L13
	movss	xmm1, DWORD PTR proposed10[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L13
	movss	xmm1, DWORD PTR proposed11[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L13
	movss	xmm1, DWORD PTR proposed11[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L13
	movss	xmm1, DWORD PTR proposed12[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L13
	movss	xmm1, DWORD PTR proposed12[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L13
	movss	xmm1, DWORD PTR proposed13[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L13
	movss	xmm1, DWORD PTR proposed13[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L13
	movss	xmm1, DWORD PTR proposed14[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L13
	movss	xmm1, DWORD PTR proposed14[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L13
	movss	xmm1, DWORD PTR proposed15[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L13
	movss	xmm1, DWORD PTR proposed15[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L13
	movss	xmm1, DWORD PTR proposed16[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L13
	movss	xmm1, DWORD PTR proposed16[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L13
	movss	xmm1, DWORD PTR proposed17[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L13
	movss	xmm1, DWORD PTR proposed17[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L13
	movss	xmm1, DWORD PTR proposed18[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L13
	movss	xmm1, DWORD PTR proposed18[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L13
	movss	xmm1, DWORD PTR proposed19[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L13
	movss	xmm1, DWORD PTR proposed19[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L13
	movss	xmm1, DWORD PTR proposed20[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L13
	movss	xmm1, DWORD PTR proposed20[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L13
	movss	xmm0, DWORD PTR max_prop[rip]
	movss	xmm1, DWORD PTR proposed0[rip]
	ucomiss	xmm0, xmm1
	jp	.L1946
	ucomiss	xmm0, xmm1
	je	.L343
.L1946:
	movss	xmm0, DWORD PTR max_prop[rip]
	movss	xmm1, DWORD PTR proposed1[rip]
	ucomiss	xmm0, xmm1
	jp	.L1947
	ucomiss	xmm0, xmm1
	je	.L343
.L1947:
	movss	xmm0, DWORD PTR max_prop[rip]
	movss	xmm1, DWORD PTR proposed2[rip]
	ucomiss	xmm0, xmm1
	jp	.L1948
	ucomiss	xmm0, xmm1
	je	.L343
.L1948:
	movss	xmm0, DWORD PTR max_prop[rip]
	movss	xmm1, DWORD PTR proposed3[rip]
	ucomiss	xmm0, xmm1
	jp	.L1949
	ucomiss	xmm0, xmm1
	je	.L343
.L1949:
	movss	xmm0, DWORD PTR max_prop[rip]
	movss	xmm1, DWORD PTR proposed4[rip]
	ucomiss	xmm0, xmm1
	jp	.L1950
	ucomiss	xmm0, xmm1
	je	.L343
.L1950:
	movss	xmm0, DWORD PTR max_prop[rip]
	movss	xmm1, DWORD PTR proposed5[rip]
	ucomiss	xmm0, xmm1
	jp	.L1951
	ucomiss	xmm0, xmm1
	je	.L343
.L1951:
	movss	xmm0, DWORD PTR max_prop[rip]
	movss	xmm1, DWORD PTR proposed6[rip]
	ucomiss	xmm0, xmm1
	jp	.L1952
	ucomiss	xmm0, xmm1
	je	.L343
.L1952:
	movss	xmm0, DWORD PTR max_prop[rip]
	movss	xmm1, DWORD PTR proposed7[rip]
	ucomiss	xmm0, xmm1
	jp	.L1953
	ucomiss	xmm0, xmm1
	je	.L343
.L1953:
	movss	xmm0, DWORD PTR max_prop[rip]
	movss	xmm1, DWORD PTR proposed8[rip]
	ucomiss	xmm0, xmm1
	jp	.L1954
	ucomiss	xmm0, xmm1
	je	.L343
.L1954:
	movss	xmm0, DWORD PTR max_prop[rip]
	movss	xmm1, DWORD PTR proposed9[rip]
	ucomiss	xmm0, xmm1
	jp	.L1955
	ucomiss	xmm0, xmm1
	je	.L343
.L1955:
	movss	xmm0, DWORD PTR max_prop[rip]
	movss	xmm1, DWORD PTR proposed10[rip]
	ucomiss	xmm0, xmm1
	jp	.L1956
	ucomiss	xmm0, xmm1
	je	.L343
.L1956:
	movss	xmm0, DWORD PTR max_prop[rip]
	movss	xmm1, DWORD PTR proposed11[rip]
	ucomiss	xmm0, xmm1
	jp	.L1957
	ucomiss	xmm0, xmm1
	je	.L343
.L1957:
	movss	xmm0, DWORD PTR max_prop[rip]
	movss	xmm1, DWORD PTR proposed12[rip]
	ucomiss	xmm0, xmm1
	jp	.L1958
	ucomiss	xmm0, xmm1
	je	.L343
.L1958:
	movss	xmm0, DWORD PTR max_prop[rip]
	movss	xmm1, DWORD PTR proposed13[rip]
	ucomiss	xmm0, xmm1
	jp	.L1959
	ucomiss	xmm0, xmm1
	je	.L343
.L1959:
	movss	xmm0, DWORD PTR max_prop[rip]
	movss	xmm1, DWORD PTR proposed14[rip]
	ucomiss	xmm0, xmm1
	jp	.L1960
	ucomiss	xmm0, xmm1
	je	.L343
.L1960:
	movss	xmm0, DWORD PTR max_prop[rip]
	movss	xmm1, DWORD PTR proposed15[rip]
	ucomiss	xmm0, xmm1
	jp	.L1961
	ucomiss	xmm0, xmm1
	je	.L343
.L1961:
	movss	xmm0, DWORD PTR max_prop[rip]
	movss	xmm1, DWORD PTR proposed16[rip]
	ucomiss	xmm0, xmm1
	jp	.L1962
	ucomiss	xmm0, xmm1
	je	.L343
.L1962:
	movss	xmm0, DWORD PTR max_prop[rip]
	movss	xmm1, DWORD PTR proposed17[rip]
	ucomiss	xmm0, xmm1
	jp	.L1963
	ucomiss	xmm0, xmm1
	je	.L343
.L1963:
	movss	xmm0, DWORD PTR max_prop[rip]
	movss	xmm1, DWORD PTR proposed18[rip]
	ucomiss	xmm0, xmm1
	jp	.L1964
	ucomiss	xmm0, xmm1
	je	.L343
.L1964:
	movss	xmm0, DWORD PTR max_prop[rip]
	movss	xmm1, DWORD PTR proposed19[rip]
	ucomiss	xmm0, xmm1
	jp	.L1965
	ucomiss	xmm0, xmm1
	je	.L343
.L1965:
	movss	xmm0, DWORD PTR max_prop[rip]
	movss	xmm1, DWORD PTR proposed20[rip]
	ucomiss	xmm0, xmm1
	jp	.L13
	ucomiss	xmm0, xmm1
	jne	.L13
.L343:
	movss	xmm0, DWORD PTR delta[rip]
	movss	xmm1, DWORD PTR _diverge_delta[rip]
	ucomiss	xmm0, xmm1
	jp	.L13
	ucomiss	xmm0, xmm1
	jne	.L13
	mov	eax, 1
	jmp	.L366
.L13:
	mov	eax, 0
.L366:
	mov	DWORD PTR -4[rbp], eax
	jmp	.L367
.L1880:
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p20_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p20_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p19_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p19_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p18_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p20_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p18_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p17_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p19_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p17_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p16_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p10_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p6_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p4_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p4_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p13_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p1_evt[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p1_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p0_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p0_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p0_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_proposed7[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_proposed6[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_proposed5[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p12_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_proposed4[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p7_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_proposed3[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_proposed2[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_proposed1[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p8_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_proposed0[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_inc_max_prop[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_max_prop[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p20_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p11_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p2_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_v2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p15_evt[rip], al
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR _x_v1[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p15_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_delta[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_proposed8[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p7_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p9_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p12_l3[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_proposed9[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p12_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p14_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_proposed10[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p12_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p14_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p3_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p5_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p3_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p8_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p10_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p13_l3[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_proposed11[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p3_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p5_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p17_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p8_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p10_evt[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_proposed12[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_proposed13[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_proposed14[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_proposed15[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p13_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p11_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p2_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p4_evt[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_proposed16[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p3_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p1_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_proposed17[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p6_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p6_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p7_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p9_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p16_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p1_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_proposed19[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p6_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p18_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p7_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p16_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p1_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_proposed18[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p3_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p20_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p11_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p2_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p13_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p1_l3[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_proposed20[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p6_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p18_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p16_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p3_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p19_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p17_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p8_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p4_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p13_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p0_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p0_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p0_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p5_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p7_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p19_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p10_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p4_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p13_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p6_evt[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x__diverge_delta[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p5_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p16_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p5_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p7_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p10_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p12_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p8_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p9_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p14_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p18_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p11_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p2_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p9_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p14_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p20_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p18_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p9_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p14_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p2_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p9_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p11_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p14_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p2_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p4_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p11_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p19_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p10_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p12_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p8_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p15_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p17_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p15_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p17_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p15_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p15_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p5_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p16_evt[rip], al
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	je	.L368
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	jne	.L368
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	jne	.L368
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	je	.L369
.L368:
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	jne	.L370
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	je	.L370
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	je	.L370
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	jne	.L369
.L370:
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	jne	.L371
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	je	.L371
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	je	.L371
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	je	.L369
.L371:
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	jne	.L372
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	je	.L372
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	je	.L372
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	je	.L369
.L372:
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	jne	.L373
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	je	.L373
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	jne	.L373
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	je	.L369
.L373:
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	jne	.L374
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	jne	.L374
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	je	.L374
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	jne	.L369
.L374:
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	jne	.L375
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	jne	.L375
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	je	.L375
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	je	.L369
.L375:
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	jne	.L376
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	jne	.L376
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	jne	.L376
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	je	.L369
.L376:
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	je	.L377
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	jne	.L377
.L369:
	movss	xmm1, DWORD PTR _x_p20_c[rip]
	movss	xmm0, DWORD PTR _x_proposed20[rip]
	comiss	xmm0, xmm1
	jnb	.L378
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	jne	.L379
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	jne	.L379
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	je	.L379
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	je	.L377
.L379:
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	jne	.L380
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	je	.L380
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	jne	.L380
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	je	.L377
.L380:
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	jne	.L381
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	je	.L381
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	je	.L381
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	jne	.L377
.L381:
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	je	.L378
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	jne	.L378
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	jne	.L378
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	je	.L377
.L378:
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L382
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L382
	movzx	eax, BYTE PTR p20_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L382
	movzx	eax, BYTE PTR p20_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L382
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p20_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p20_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L382
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L382
	movss	xmm0, DWORD PTR proposed20[rip]
	movss	xmm1, DWORD PTR _x_proposed20[rip]
	ucomiss	xmm0, xmm1
	jp	.L382
	ucomiss	xmm0, xmm1
	je	.L384
.L382:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L377
	movzx	eax, BYTE PTR p20_evt[rip]
	test	al, al
	je	.L377
.L384:
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L387
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	jne	.L387
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	jne	.L387
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	je	.L387
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	jne	.L387
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L387
	movss	xmm0, DWORD PTR _x_p20_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L387
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L387
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L387
	movss	xmm0, DWORD PTR proposed20[rip]
	movss	xmm1, DWORD PTR _x_proposed20[rip]
	ucomiss	xmm0, xmm1
	jp	.L387
	ucomiss	xmm0, xmm1
	je	.L389
.L387:
	movzx	eax, BYTE PTR p20_l3[rip]
	test	al, al
	jne	.L389
	movzx	eax, BYTE PTR p20_l2[rip]
	test	al, al
	jne	.L389
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	jne	.L389
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	jne	.L389
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L389
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L389
	movzx	eax, BYTE PTR p20_evt[rip]
	test	al, al
	jne	.L377
.L389:
	movss	xmm0, DWORD PTR proposed20[rip]
	movss	xmm1, DWORD PTR _x_proposed20[rip]
	ucomiss	xmm0, xmm1
	jp	.L391
	ucomiss	xmm0, xmm1
	jne	.L391
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L391
	movss	xmm0, DWORD PTR _x_p20_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L391
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L391
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	jne	.L391
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	jne	.L391
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	je	.L391
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	jne	.L391
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 21
	je	.L394
.L391:
	movzx	eax, BYTE PTR p20_l3[rip]
	test	al, al
	jne	.L394
	movzx	eax, BYTE PTR p20_l2[rip]
	test	al, al
	jne	.L394
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	je	.L394
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	jne	.L394
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L394
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L394
	movzx	eax, BYTE PTR p20_evt[rip]
	test	al, al
	jne	.L377
.L394:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L395
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L395
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	jne	.L396
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	jne	.L396
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	jne	.L396
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	je	.L397
.L396:
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	jne	.L395
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	jne	.L395
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	je	.L395
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	je	.L395
.L397:
	movss	xmm0, DWORD PTR p20_c[rip]
	movss	xmm1, DWORD PTR _x_p20_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L395
	ucomiss	xmm0, xmm1
	je	.L398
.L395:
	movzx	eax, BYTE PTR p20_l3[rip]
	test	al, al
	jne	.L398
	movzx	eax, BYTE PTR p20_l2[rip]
	test	al, al
	jne	.L398
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	je	.L398
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	jne	.L398
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L398
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L398
	movzx	eax, BYTE PTR p20_evt[rip]
	test	al, al
	jne	.L377
.L398:
	movss	xmm0, DWORD PTR proposed20[rip]
	movss	xmm1, DWORD PTR _x_proposed20[rip]
	ucomiss	xmm0, xmm1
	jp	.L400
	ucomiss	xmm0, xmm1
	jne	.L400
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 21
	jne	.L402
.L400:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L402
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L402
	movzx	eax, BYTE PTR p20_evt[rip]
	test	al, al
	je	.L402
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	jne	.L402
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	jne	.L402
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	jne	.L402
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	jne	.L402
	movzx	eax, BYTE PTR p20_l3[rip]
	test	al, al
	jne	.L402
	movzx	eax, BYTE PTR p20_l2[rip]
	test	al, al
	jne	.L402
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	je	.L402
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	je	.L377
.L402:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 21
	jne	.L403
	movss	xmm1, DWORD PTR p20_c[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L403
	movss	xmm1, DWORD PTR proposed20[rip]
	movss	xmm0, DWORD PTR _x_proposed20[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L404
.L403:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L404
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L404
	movzx	eax, BYTE PTR p20_evt[rip]
	test	al, al
	je	.L404
	movzx	eax, BYTE PTR p20_l3[rip]
	test	al, al
	jne	.L404
	movzx	eax, BYTE PTR p20_l2[rip]
	test	al, al
	jne	.L404
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	je	.L404
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	jne	.L404
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	jne	.L404
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	jne	.L404
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	je	.L404
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	jne	.L377
.L404:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L405
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L405
	movss	xmm0, DWORD PTR proposed20[rip]
	movss	xmm1, DWORD PTR _x_proposed20[rip]
	ucomiss	xmm0, xmm1
	jp	.L405
	ucomiss	xmm0, xmm1
	jne	.L405
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	jne	.L407
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	jne	.L407
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	jne	.L407
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	je	.L408
.L407:
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	jne	.L405
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	je	.L405
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	jne	.L405
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	je	.L408
.L405:
	movzx	eax, BYTE PTR p20_l3[rip]
	test	al, al
	jne	.L408
	movzx	eax, BYTE PTR p20_l2[rip]
	test	al, al
	jne	.L408
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	je	.L408
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	je	.L408
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L408
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L408
	movzx	eax, BYTE PTR p20_evt[rip]
	test	al, al
	jne	.L377
.L408:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L409
	movss	xmm0, DWORD PTR p20_c[rip]
	movss	xmm1, DWORD PTR _x_p20_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L409
	ucomiss	xmm0, xmm1
	je	.L410
.L409:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L410
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L410
	movzx	eax, BYTE PTR p20_evt[rip]
	test	al, al
	je	.L410
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	jne	.L410
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	jne	.L410
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	jne	.L410
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	jne	.L410
	movzx	eax, BYTE PTR p20_l3[rip]
	test	al, al
	jne	.L410
	movzx	eax, BYTE PTR p20_l2[rip]
	test	al, al
	jne	.L410
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	je	.L410
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	jne	.L377
.L410:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L412
	movss	xmm0, DWORD PTR _x_p20_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L412
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L413
.L412:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L413
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L413
	movzx	eax, BYTE PTR p20_evt[rip]
	test	al, al
	je	.L413
	movzx	eax, BYTE PTR p20_l3[rip]
	test	al, al
	jne	.L413
	movzx	eax, BYTE PTR p20_l2[rip]
	test	al, al
	jne	.L413
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	je	.L413
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	je	.L413
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	jne	.L413
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	je	.L413
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	jne	.L413
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	je	.L377
.L413:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L415
	movss	xmm0, DWORD PTR proposed20[rip]
	movss	xmm1, DWORD PTR _x_proposed20[rip]
	ucomiss	xmm0, xmm1
	jp	.L415
	ucomiss	xmm0, xmm1
	jne	.L415
	movss	xmm0, DWORD PTR _x_p20_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L415
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L415
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L415
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	jne	.L415
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	je	.L415
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	je	.L415
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	je	.L418
.L415:
	movzx	eax, BYTE PTR p20_l3[rip]
	test	al, al
	jne	.L418
	movzx	eax, BYTE PTR p20_l2[rip]
	test	al, al
	je	.L418
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	jne	.L418
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	jne	.L418
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L418
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L418
	movzx	eax, BYTE PTR p20_evt[rip]
	test	al, al
	jne	.L377
.L418:
	movss	xmm0, DWORD PTR proposed20[rip]
	movss	xmm1, DWORD PTR _x_proposed20[rip]
	ucomiss	xmm0, xmm1
	jp	.L419
	ucomiss	xmm0, xmm1
	jne	.L419
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L419
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L419
	movss	xmm0, DWORD PTR p20_c[rip]
	movss	xmm1, DWORD PTR _x_p20_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L419
	ucomiss	xmm0, xmm1
	jne	.L419
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	jne	.L422
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	jne	.L422
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	jne	.L422
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	je	.L423
.L422:
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	jne	.L419
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	je	.L419
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	je	.L419
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	je	.L423
.L419:
	movzx	eax, BYTE PTR p20_l3[rip]
	test	al, al
	jne	.L423
	movzx	eax, BYTE PTR p20_l2[rip]
	test	al, al
	je	.L423
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	je	.L423
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	jne	.L423
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L423
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L423
	movzx	eax, BYTE PTR p20_evt[rip]
	test	al, al
	jne	.L377
.L423:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 21
	jne	.L424
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L424
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L424
	movzx	eax, BYTE PTR p20_evt[rip]
	test	al, al
	je	.L424
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	jne	.L424
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	jne	.L424
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	jne	.L424
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	jne	.L424
	movzx	eax, BYTE PTR p20_l3[rip]
	test	al, al
	jne	.L424
	movzx	eax, BYTE PTR p20_l2[rip]
	test	al, al
	je	.L424
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	je	.L424
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	je	.L377
.L424:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 21
	je	.L425
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L425
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L425
	movzx	eax, BYTE PTR p20_evt[rip]
	test	al, al
	je	.L425
	movzx	eax, BYTE PTR p20_l3[rip]
	test	al, al
	jne	.L425
	movzx	eax, BYTE PTR p20_l2[rip]
	test	al, al
	je	.L425
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	je	.L425
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	jne	.L425
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	jne	.L425
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	je	.L425
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	je	.L425
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	je	.L377
.L425:
	movss	xmm0, DWORD PTR proposed20[rip]
	movss	xmm1, DWORD PTR _x_proposed20[rip]
	ucomiss	xmm0, xmm1
	jp	.L426
	ucomiss	xmm0, xmm1
	jne	.L426
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L426
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L426
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	jne	.L426
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	je	.L426
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	je	.L426
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	je	.L426
	movss	xmm0, DWORD PTR _x_p20_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L426
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L428
.L426:
	movzx	eax, BYTE PTR p20_l3[rip]
	test	al, al
	jne	.L428
	movzx	eax, BYTE PTR p20_l2[rip]
	test	al, al
	je	.L428
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	je	.L428
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	jne	.L428
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L428
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L428
	movzx	eax, BYTE PTR p20_evt[rip]
	test	al, al
	jne	.L377
.L428:
	movss	xmm0, DWORD PTR proposed20[rip]
	movss	xmm1, DWORD PTR _x_proposed20[rip]
	ucomiss	xmm0, xmm1
	jp	.L430
	ucomiss	xmm0, xmm1
	jne	.L430
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L430
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	je	.L430
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	jne	.L430
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	jne	.L430
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	jne	.L430
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L430
	movss	xmm0, DWORD PTR _x_p20_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L430
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L432
.L430:
	movzx	eax, BYTE PTR p20_l3[rip]
	test	al, al
	jne	.L432
	movzx	eax, BYTE PTR p20_l2[rip]
	test	al, al
	je	.L432
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	je	.L432
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	je	.L432
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L432
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L432
	movzx	eax, BYTE PTR p20_evt[rip]
	test	al, al
	jne	.L377
.L432:
	movss	xmm0, DWORD PTR proposed20[rip]
	movss	xmm1, DWORD PTR _x_proposed20[rip]
	ucomiss	xmm0, xmm1
	jp	.L434
	ucomiss	xmm0, xmm1
	jne	.L434
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L434
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	test	al, al
	jne	.L434
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	test	al, al
	jne	.L434
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	jne	.L434
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	jne	.L434
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L434
	movss	xmm0, DWORD PTR p20_c[rip]
	movss	xmm1, DWORD PTR _x_p20_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L434
	ucomiss	xmm0, xmm1
	je	.L436
.L434:
	movzx	eax, BYTE PTR p20_l3[rip]
	test	al, al
	je	.L436
	movzx	eax, BYTE PTR p20_l2[rip]
	test	al, al
	jne	.L436
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	jne	.L436
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	jne	.L436
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L436
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L436
	movzx	eax, BYTE PTR p20_evt[rip]
	test	al, al
	jne	.L377
.L436:
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	je	.L438
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	jne	.L438
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	jne	.L438
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	je	.L439
.L438:
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	jne	.L440
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	je	.L440
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	je	.L440
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	jne	.L439
.L440:
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	jne	.L441
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	je	.L441
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	je	.L441
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	je	.L439
.L441:
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	jne	.L442
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	je	.L442
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	je	.L442
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	je	.L439
.L442:
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	jne	.L443
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	je	.L443
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	jne	.L443
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	je	.L439
.L443:
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	jne	.L444
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	jne	.L444
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	je	.L444
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	jne	.L439
.L444:
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	jne	.L445
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	jne	.L445
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	je	.L445
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	je	.L439
.L445:
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	jne	.L446
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	jne	.L446
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	jne	.L446
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	je	.L439
.L446:
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	je	.L377
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	jne	.L377
.L439:
	movss	xmm1, DWORD PTR _x_p19_c[rip]
	movss	xmm0, DWORD PTR _x_proposed19[rip]
	comiss	xmm0, xmm1
	jnb	.L447
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	jne	.L448
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	jne	.L448
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	je	.L448
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	je	.L377
.L448:
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	jne	.L449
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	je	.L449
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	jne	.L449
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	je	.L377
.L449:
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	jne	.L450
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	je	.L450
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	je	.L450
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	jne	.L377
.L450:
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	je	.L447
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	jne	.L447
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	jne	.L447
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	je	.L377
.L447:
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L451
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L451
	movzx	eax, BYTE PTR p19_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L451
	movzx	eax, BYTE PTR p19_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L451
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p19_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p19_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L451
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L451
	movss	xmm0, DWORD PTR proposed19[rip]
	movss	xmm1, DWORD PTR _x_proposed19[rip]
	ucomiss	xmm0, xmm1
	jp	.L451
	ucomiss	xmm0, xmm1
	je	.L453
.L451:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L377
	movzx	eax, BYTE PTR p19_evt[rip]
	test	al, al
	je	.L377
.L453:
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L456
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	jne	.L456
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	jne	.L456
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	je	.L456
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	jne	.L456
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L456
	movss	xmm0, DWORD PTR _x_p19_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L456
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L456
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L456
	movss	xmm0, DWORD PTR proposed19[rip]
	movss	xmm1, DWORD PTR _x_proposed19[rip]
	ucomiss	xmm0, xmm1
	jp	.L456
	ucomiss	xmm0, xmm1
	je	.L458
.L456:
	movzx	eax, BYTE PTR p19_l3[rip]
	test	al, al
	jne	.L458
	movzx	eax, BYTE PTR p19_l2[rip]
	test	al, al
	jne	.L458
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	jne	.L458
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	jne	.L458
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L458
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L458
	movzx	eax, BYTE PTR p19_evt[rip]
	test	al, al
	jne	.L377
.L458:
	movss	xmm0, DWORD PTR proposed19[rip]
	movss	xmm1, DWORD PTR _x_proposed19[rip]
	ucomiss	xmm0, xmm1
	jp	.L460
	ucomiss	xmm0, xmm1
	jne	.L460
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L460
	movss	xmm0, DWORD PTR _x_p19_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L460
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L460
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	jne	.L460
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	jne	.L460
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	je	.L460
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	jne	.L460
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 20
	je	.L463
.L460:
	movzx	eax, BYTE PTR p19_l3[rip]
	test	al, al
	jne	.L463
	movzx	eax, BYTE PTR p19_l2[rip]
	test	al, al
	jne	.L463
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	je	.L463
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	jne	.L463
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L463
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L463
	movzx	eax, BYTE PTR p19_evt[rip]
	test	al, al
	jne	.L377
.L463:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L464
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L464
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	jne	.L465
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	jne	.L465
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	jne	.L465
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	je	.L466
.L465:
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	jne	.L464
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	jne	.L464
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	je	.L464
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	je	.L464
.L466:
	movss	xmm0, DWORD PTR p19_c[rip]
	movss	xmm1, DWORD PTR _x_p19_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L464
	ucomiss	xmm0, xmm1
	je	.L467
.L464:
	movzx	eax, BYTE PTR p19_l3[rip]
	test	al, al
	jne	.L467
	movzx	eax, BYTE PTR p19_l2[rip]
	test	al, al
	jne	.L467
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	je	.L467
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	jne	.L467
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L467
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L467
	movzx	eax, BYTE PTR p19_evt[rip]
	test	al, al
	jne	.L377
.L467:
	movss	xmm0, DWORD PTR proposed19[rip]
	movss	xmm1, DWORD PTR _x_proposed19[rip]
	ucomiss	xmm0, xmm1
	jp	.L469
	ucomiss	xmm0, xmm1
	jne	.L469
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 20
	jne	.L471
.L469:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L471
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L471
	movzx	eax, BYTE PTR p19_evt[rip]
	test	al, al
	je	.L471
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	jne	.L471
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	jne	.L471
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	jne	.L471
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	jne	.L471
	movzx	eax, BYTE PTR p19_l3[rip]
	test	al, al
	jne	.L471
	movzx	eax, BYTE PTR p19_l2[rip]
	test	al, al
	jne	.L471
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	je	.L471
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	je	.L377
.L471:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 20
	jne	.L472
	movss	xmm1, DWORD PTR p19_c[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L472
	movss	xmm1, DWORD PTR proposed19[rip]
	movss	xmm0, DWORD PTR _x_proposed19[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L473
.L472:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L473
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L473
	movzx	eax, BYTE PTR p19_evt[rip]
	test	al, al
	je	.L473
	movzx	eax, BYTE PTR p19_l3[rip]
	test	al, al
	jne	.L473
	movzx	eax, BYTE PTR p19_l2[rip]
	test	al, al
	jne	.L473
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	je	.L473
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	jne	.L473
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	jne	.L473
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	jne	.L473
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	je	.L473
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	jne	.L377
.L473:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L474
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L474
	movss	xmm0, DWORD PTR proposed19[rip]
	movss	xmm1, DWORD PTR _x_proposed19[rip]
	ucomiss	xmm0, xmm1
	jp	.L474
	ucomiss	xmm0, xmm1
	jne	.L474
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	jne	.L476
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	jne	.L476
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	jne	.L476
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	je	.L477
.L476:
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	jne	.L474
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	je	.L474
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	jne	.L474
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	je	.L477
.L474:
	movzx	eax, BYTE PTR p19_l3[rip]
	test	al, al
	jne	.L477
	movzx	eax, BYTE PTR p19_l2[rip]
	test	al, al
	jne	.L477
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	je	.L477
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	je	.L477
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L477
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L477
	movzx	eax, BYTE PTR p19_evt[rip]
	test	al, al
	jne	.L377
.L477:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L478
	movss	xmm0, DWORD PTR p19_c[rip]
	movss	xmm1, DWORD PTR _x_p19_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L478
	ucomiss	xmm0, xmm1
	je	.L479
.L478:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L479
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L479
	movzx	eax, BYTE PTR p19_evt[rip]
	test	al, al
	je	.L479
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	jne	.L479
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	jne	.L479
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	jne	.L479
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	jne	.L479
	movzx	eax, BYTE PTR p19_l3[rip]
	test	al, al
	jne	.L479
	movzx	eax, BYTE PTR p19_l2[rip]
	test	al, al
	jne	.L479
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	je	.L479
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	jne	.L377
.L479:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L481
	movss	xmm0, DWORD PTR _x_p19_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L481
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L482
.L481:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L482
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L482
	movzx	eax, BYTE PTR p19_evt[rip]
	test	al, al
	je	.L482
	movzx	eax, BYTE PTR p19_l3[rip]
	test	al, al
	jne	.L482
	movzx	eax, BYTE PTR p19_l2[rip]
	test	al, al
	jne	.L482
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	je	.L482
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	je	.L482
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	jne	.L482
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	je	.L482
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	jne	.L482
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	je	.L377
.L482:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L484
	movss	xmm0, DWORD PTR proposed19[rip]
	movss	xmm1, DWORD PTR _x_proposed19[rip]
	ucomiss	xmm0, xmm1
	jp	.L484
	ucomiss	xmm0, xmm1
	jne	.L484
	movss	xmm0, DWORD PTR _x_p19_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L484
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L484
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L484
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	jne	.L484
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	je	.L484
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	je	.L484
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	je	.L487
.L484:
	movzx	eax, BYTE PTR p19_l3[rip]
	test	al, al
	jne	.L487
	movzx	eax, BYTE PTR p19_l2[rip]
	test	al, al
	je	.L487
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	jne	.L487
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	jne	.L487
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L487
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L487
	movzx	eax, BYTE PTR p19_evt[rip]
	test	al, al
	jne	.L377
.L487:
	movss	xmm0, DWORD PTR proposed19[rip]
	movss	xmm1, DWORD PTR _x_proposed19[rip]
	ucomiss	xmm0, xmm1
	jp	.L488
	ucomiss	xmm0, xmm1
	jne	.L488
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L488
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L488
	movss	xmm0, DWORD PTR p19_c[rip]
	movss	xmm1, DWORD PTR _x_p19_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L488
	ucomiss	xmm0, xmm1
	jne	.L488
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	jne	.L491
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	jne	.L491
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	jne	.L491
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	je	.L492
.L491:
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	jne	.L488
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	je	.L488
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	je	.L488
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	je	.L492
.L488:
	movzx	eax, BYTE PTR p19_l3[rip]
	test	al, al
	jne	.L492
	movzx	eax, BYTE PTR p19_l2[rip]
	test	al, al
	je	.L492
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	je	.L492
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	jne	.L492
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L492
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L492
	movzx	eax, BYTE PTR p19_evt[rip]
	test	al, al
	jne	.L377
.L492:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 20
	jne	.L493
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L493
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L493
	movzx	eax, BYTE PTR p19_evt[rip]
	test	al, al
	je	.L493
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	jne	.L493
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	jne	.L493
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	jne	.L493
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	jne	.L493
	movzx	eax, BYTE PTR p19_l3[rip]
	test	al, al
	jne	.L493
	movzx	eax, BYTE PTR p19_l2[rip]
	test	al, al
	je	.L493
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	je	.L493
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	je	.L377
.L493:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 20
	je	.L494
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L494
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L494
	movzx	eax, BYTE PTR p19_evt[rip]
	test	al, al
	je	.L494
	movzx	eax, BYTE PTR p19_l3[rip]
	test	al, al
	jne	.L494
	movzx	eax, BYTE PTR p19_l2[rip]
	test	al, al
	je	.L494
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	je	.L494
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	jne	.L494
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	jne	.L494
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	je	.L494
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	je	.L494
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	je	.L377
.L494:
	movss	xmm0, DWORD PTR proposed19[rip]
	movss	xmm1, DWORD PTR _x_proposed19[rip]
	ucomiss	xmm0, xmm1
	jp	.L495
	ucomiss	xmm0, xmm1
	jne	.L495
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L495
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L495
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	jne	.L495
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	je	.L495
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	je	.L495
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	je	.L495
	movss	xmm0, DWORD PTR _x_p19_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L495
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L497
.L495:
	movzx	eax, BYTE PTR p19_l3[rip]
	test	al, al
	jne	.L497
	movzx	eax, BYTE PTR p19_l2[rip]
	test	al, al
	je	.L497
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	je	.L497
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	jne	.L497
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L497
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L497
	movzx	eax, BYTE PTR p19_evt[rip]
	test	al, al
	jne	.L377
.L497:
	movss	xmm0, DWORD PTR proposed19[rip]
	movss	xmm1, DWORD PTR _x_proposed19[rip]
	ucomiss	xmm0, xmm1
	jp	.L499
	ucomiss	xmm0, xmm1
	jne	.L499
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L499
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	je	.L499
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	jne	.L499
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	jne	.L499
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	jne	.L499
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L499
	movss	xmm0, DWORD PTR _x_p19_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L499
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L501
.L499:
	movzx	eax, BYTE PTR p19_l3[rip]
	test	al, al
	jne	.L501
	movzx	eax, BYTE PTR p19_l2[rip]
	test	al, al
	je	.L501
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	je	.L501
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	je	.L501
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L501
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L501
	movzx	eax, BYTE PTR p19_evt[rip]
	test	al, al
	jne	.L377
.L501:
	movss	xmm0, DWORD PTR proposed19[rip]
	movss	xmm1, DWORD PTR _x_proposed19[rip]
	ucomiss	xmm0, xmm1
	jp	.L503
	ucomiss	xmm0, xmm1
	jne	.L503
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L503
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	test	al, al
	jne	.L503
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	test	al, al
	jne	.L503
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	jne	.L503
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	jne	.L503
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L503
	movss	xmm0, DWORD PTR p19_c[rip]
	movss	xmm1, DWORD PTR _x_p19_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L503
	ucomiss	xmm0, xmm1
	je	.L505
.L503:
	movzx	eax, BYTE PTR p19_l3[rip]
	test	al, al
	je	.L505
	movzx	eax, BYTE PTR p19_l2[rip]
	test	al, al
	jne	.L505
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	jne	.L505
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	jne	.L505
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L505
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L505
	movzx	eax, BYTE PTR p19_evt[rip]
	test	al, al
	jne	.L377
.L505:
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	je	.L507
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	jne	.L507
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	jne	.L507
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	je	.L508
.L507:
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	jne	.L509
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	je	.L509
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	je	.L509
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	jne	.L508
.L509:
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	jne	.L510
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	je	.L510
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	je	.L510
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	je	.L508
.L510:
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	jne	.L511
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	je	.L511
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	je	.L511
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	je	.L508
.L511:
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	jne	.L512
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	je	.L512
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	jne	.L512
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	je	.L508
.L512:
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	jne	.L513
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	jne	.L513
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	je	.L513
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	jne	.L508
.L513:
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	jne	.L514
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	jne	.L514
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	je	.L514
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	je	.L508
.L514:
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	jne	.L515
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	jne	.L515
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	jne	.L515
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	je	.L508
.L515:
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	je	.L377
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	jne	.L377
.L508:
	movss	xmm1, DWORD PTR _x_p18_c[rip]
	movss	xmm0, DWORD PTR _x_proposed18[rip]
	comiss	xmm0, xmm1
	jnb	.L516
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	jne	.L517
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	jne	.L517
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	je	.L517
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	je	.L377
.L517:
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	jne	.L518
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	je	.L518
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	jne	.L518
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	je	.L377
.L518:
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	jne	.L519
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	je	.L519
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	je	.L519
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	jne	.L377
.L519:
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	je	.L516
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	jne	.L516
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	jne	.L516
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	je	.L377
.L516:
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L520
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L520
	movzx	eax, BYTE PTR p18_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L520
	movzx	eax, BYTE PTR p18_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L520
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p18_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p18_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L520
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L520
	movss	xmm0, DWORD PTR proposed18[rip]
	movss	xmm1, DWORD PTR _x_proposed18[rip]
	ucomiss	xmm0, xmm1
	jp	.L520
	ucomiss	xmm0, xmm1
	je	.L522
.L520:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L377
	movzx	eax, BYTE PTR p18_evt[rip]
	test	al, al
	je	.L377
.L522:
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L525
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	jne	.L525
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	jne	.L525
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	je	.L525
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	jne	.L525
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L525
	movss	xmm0, DWORD PTR _x_p18_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L525
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L525
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L525
	movss	xmm0, DWORD PTR proposed18[rip]
	movss	xmm1, DWORD PTR _x_proposed18[rip]
	ucomiss	xmm0, xmm1
	jp	.L525
	ucomiss	xmm0, xmm1
	je	.L527
.L525:
	movzx	eax, BYTE PTR p18_l3[rip]
	test	al, al
	jne	.L527
	movzx	eax, BYTE PTR p18_l2[rip]
	test	al, al
	jne	.L527
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	jne	.L527
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	jne	.L527
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L527
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L527
	movzx	eax, BYTE PTR p18_evt[rip]
	test	al, al
	jne	.L377
.L527:
	movss	xmm0, DWORD PTR proposed18[rip]
	movss	xmm1, DWORD PTR _x_proposed18[rip]
	ucomiss	xmm0, xmm1
	jp	.L529
	ucomiss	xmm0, xmm1
	jne	.L529
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L529
	movss	xmm0, DWORD PTR _x_p18_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L529
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L529
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	jne	.L529
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	jne	.L529
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	je	.L529
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	jne	.L529
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 19
	je	.L532
.L529:
	movzx	eax, BYTE PTR p18_l3[rip]
	test	al, al
	jne	.L532
	movzx	eax, BYTE PTR p18_l2[rip]
	test	al, al
	jne	.L532
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	je	.L532
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	jne	.L532
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L532
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L532
	movzx	eax, BYTE PTR p18_evt[rip]
	test	al, al
	jne	.L377
.L532:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L533
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L533
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	jne	.L534
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	jne	.L534
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	jne	.L534
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	je	.L535
.L534:
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	jne	.L533
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	jne	.L533
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	je	.L533
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	je	.L533
.L535:
	movss	xmm0, DWORD PTR p18_c[rip]
	movss	xmm1, DWORD PTR _x_p18_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L533
	ucomiss	xmm0, xmm1
	je	.L536
.L533:
	movzx	eax, BYTE PTR p18_l3[rip]
	test	al, al
	jne	.L536
	movzx	eax, BYTE PTR p18_l2[rip]
	test	al, al
	jne	.L536
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	je	.L536
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	jne	.L536
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L536
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L536
	movzx	eax, BYTE PTR p18_evt[rip]
	test	al, al
	jne	.L377
.L536:
	movss	xmm0, DWORD PTR proposed18[rip]
	movss	xmm1, DWORD PTR _x_proposed18[rip]
	ucomiss	xmm0, xmm1
	jp	.L538
	ucomiss	xmm0, xmm1
	jne	.L538
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 19
	jne	.L540
.L538:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L540
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L540
	movzx	eax, BYTE PTR p18_evt[rip]
	test	al, al
	je	.L540
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	jne	.L540
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	jne	.L540
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	jne	.L540
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	jne	.L540
	movzx	eax, BYTE PTR p18_l3[rip]
	test	al, al
	jne	.L540
	movzx	eax, BYTE PTR p18_l2[rip]
	test	al, al
	jne	.L540
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	je	.L540
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	je	.L377
.L540:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 19
	jne	.L541
	movss	xmm1, DWORD PTR p18_c[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L541
	movss	xmm1, DWORD PTR proposed18[rip]
	movss	xmm0, DWORD PTR _x_proposed18[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L542
.L541:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L542
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L542
	movzx	eax, BYTE PTR p18_evt[rip]
	test	al, al
	je	.L542
	movzx	eax, BYTE PTR p18_l3[rip]
	test	al, al
	jne	.L542
	movzx	eax, BYTE PTR p18_l2[rip]
	test	al, al
	jne	.L542
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	je	.L542
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	jne	.L542
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	jne	.L542
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	jne	.L542
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	je	.L542
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	jne	.L377
.L542:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L543
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L543
	movss	xmm0, DWORD PTR proposed18[rip]
	movss	xmm1, DWORD PTR _x_proposed18[rip]
	ucomiss	xmm0, xmm1
	jp	.L543
	ucomiss	xmm0, xmm1
	jne	.L543
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	jne	.L545
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	jne	.L545
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	jne	.L545
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	je	.L546
.L545:
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	jne	.L543
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	je	.L543
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	jne	.L543
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	je	.L546
.L543:
	movzx	eax, BYTE PTR p18_l3[rip]
	test	al, al
	jne	.L546
	movzx	eax, BYTE PTR p18_l2[rip]
	test	al, al
	jne	.L546
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	je	.L546
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	je	.L546
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L546
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L546
	movzx	eax, BYTE PTR p18_evt[rip]
	test	al, al
	jne	.L377
.L546:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L547
	movss	xmm0, DWORD PTR p18_c[rip]
	movss	xmm1, DWORD PTR _x_p18_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L547
	ucomiss	xmm0, xmm1
	je	.L548
.L547:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L548
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L548
	movzx	eax, BYTE PTR p18_evt[rip]
	test	al, al
	je	.L548
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	jne	.L548
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	jne	.L548
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	jne	.L548
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	jne	.L548
	movzx	eax, BYTE PTR p18_l3[rip]
	test	al, al
	jne	.L548
	movzx	eax, BYTE PTR p18_l2[rip]
	test	al, al
	jne	.L548
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	je	.L548
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	jne	.L377
.L548:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L550
	movss	xmm0, DWORD PTR _x_p18_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L550
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L551
.L550:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L551
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L551
	movzx	eax, BYTE PTR p18_evt[rip]
	test	al, al
	je	.L551
	movzx	eax, BYTE PTR p18_l3[rip]
	test	al, al
	jne	.L551
	movzx	eax, BYTE PTR p18_l2[rip]
	test	al, al
	jne	.L551
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	je	.L551
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	je	.L551
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	jne	.L551
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	je	.L551
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	jne	.L551
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	je	.L377
.L551:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L553
	movss	xmm0, DWORD PTR proposed18[rip]
	movss	xmm1, DWORD PTR _x_proposed18[rip]
	ucomiss	xmm0, xmm1
	jp	.L553
	ucomiss	xmm0, xmm1
	jne	.L553
	movss	xmm0, DWORD PTR _x_p18_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L553
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L553
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L553
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	jne	.L553
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	je	.L553
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	je	.L553
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	je	.L556
.L553:
	movzx	eax, BYTE PTR p18_l3[rip]
	test	al, al
	jne	.L556
	movzx	eax, BYTE PTR p18_l2[rip]
	test	al, al
	je	.L556
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	jne	.L556
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	jne	.L556
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L556
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L556
	movzx	eax, BYTE PTR p18_evt[rip]
	test	al, al
	jne	.L377
.L556:
	movss	xmm0, DWORD PTR proposed18[rip]
	movss	xmm1, DWORD PTR _x_proposed18[rip]
	ucomiss	xmm0, xmm1
	jp	.L557
	ucomiss	xmm0, xmm1
	jne	.L557
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L557
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L557
	movss	xmm0, DWORD PTR p18_c[rip]
	movss	xmm1, DWORD PTR _x_p18_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L557
	ucomiss	xmm0, xmm1
	jne	.L557
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	jne	.L560
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	jne	.L560
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	jne	.L560
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	je	.L561
.L560:
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	jne	.L557
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	je	.L557
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	je	.L557
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	je	.L561
.L557:
	movzx	eax, BYTE PTR p18_l3[rip]
	test	al, al
	jne	.L561
	movzx	eax, BYTE PTR p18_l2[rip]
	test	al, al
	je	.L561
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	je	.L561
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	jne	.L561
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L561
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L561
	movzx	eax, BYTE PTR p18_evt[rip]
	test	al, al
	jne	.L377
.L561:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 19
	jne	.L562
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L562
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L562
	movzx	eax, BYTE PTR p18_evt[rip]
	test	al, al
	je	.L562
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	jne	.L562
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	jne	.L562
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	jne	.L562
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	jne	.L562
	movzx	eax, BYTE PTR p18_l3[rip]
	test	al, al
	jne	.L562
	movzx	eax, BYTE PTR p18_l2[rip]
	test	al, al
	je	.L562
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	je	.L562
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	je	.L377
.L562:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 19
	je	.L563
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L563
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L563
	movzx	eax, BYTE PTR p18_evt[rip]
	test	al, al
	je	.L563
	movzx	eax, BYTE PTR p18_l3[rip]
	test	al, al
	jne	.L563
	movzx	eax, BYTE PTR p18_l2[rip]
	test	al, al
	je	.L563
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	je	.L563
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	jne	.L563
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	jne	.L563
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	je	.L563
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	je	.L563
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	je	.L377
.L563:
	movss	xmm0, DWORD PTR proposed18[rip]
	movss	xmm1, DWORD PTR _x_proposed18[rip]
	ucomiss	xmm0, xmm1
	jp	.L564
	ucomiss	xmm0, xmm1
	jne	.L564
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L564
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L564
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	jne	.L564
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	je	.L564
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	je	.L564
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	je	.L564
	movss	xmm0, DWORD PTR _x_p18_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L564
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L566
.L564:
	movzx	eax, BYTE PTR p18_l3[rip]
	test	al, al
	jne	.L566
	movzx	eax, BYTE PTR p18_l2[rip]
	test	al, al
	je	.L566
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	je	.L566
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	jne	.L566
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L566
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L566
	movzx	eax, BYTE PTR p18_evt[rip]
	test	al, al
	jne	.L377
.L566:
	movss	xmm0, DWORD PTR proposed18[rip]
	movss	xmm1, DWORD PTR _x_proposed18[rip]
	ucomiss	xmm0, xmm1
	jp	.L568
	ucomiss	xmm0, xmm1
	jne	.L568
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L568
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	je	.L568
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	jne	.L568
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	jne	.L568
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	jne	.L568
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L568
	movss	xmm0, DWORD PTR _x_p18_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L568
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L570
.L568:
	movzx	eax, BYTE PTR p18_l3[rip]
	test	al, al
	jne	.L570
	movzx	eax, BYTE PTR p18_l2[rip]
	test	al, al
	je	.L570
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	je	.L570
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	je	.L570
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L570
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L570
	movzx	eax, BYTE PTR p18_evt[rip]
	test	al, al
	jne	.L377
.L570:
	movss	xmm0, DWORD PTR proposed18[rip]
	movss	xmm1, DWORD PTR _x_proposed18[rip]
	ucomiss	xmm0, xmm1
	jp	.L572
	ucomiss	xmm0, xmm1
	jne	.L572
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L572
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	test	al, al
	jne	.L572
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	test	al, al
	jne	.L572
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	jne	.L572
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	jne	.L572
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L572
	movss	xmm0, DWORD PTR p18_c[rip]
	movss	xmm1, DWORD PTR _x_p18_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L572
	ucomiss	xmm0, xmm1
	je	.L574
.L572:
	movzx	eax, BYTE PTR p18_l3[rip]
	test	al, al
	je	.L574
	movzx	eax, BYTE PTR p18_l2[rip]
	test	al, al
	jne	.L574
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	jne	.L574
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	jne	.L574
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L574
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L574
	movzx	eax, BYTE PTR p18_evt[rip]
	test	al, al
	jne	.L377
.L574:
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	je	.L576
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	jne	.L576
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	jne	.L576
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	je	.L577
.L576:
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	jne	.L578
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	je	.L578
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	je	.L578
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	jne	.L577
.L578:
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	jne	.L579
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	je	.L579
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	je	.L579
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	je	.L577
.L579:
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	jne	.L580
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	je	.L580
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	je	.L580
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	je	.L577
.L580:
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	jne	.L581
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	je	.L581
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	jne	.L581
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	je	.L577
.L581:
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	jne	.L582
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	jne	.L582
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	je	.L582
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	jne	.L577
.L582:
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	jne	.L583
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	jne	.L583
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	je	.L583
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	je	.L577
.L583:
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	jne	.L584
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	jne	.L584
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	jne	.L584
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	je	.L577
.L584:
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	je	.L377
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	jne	.L377
.L577:
	movss	xmm1, DWORD PTR _x_p17_c[rip]
	movss	xmm0, DWORD PTR _x_proposed17[rip]
	comiss	xmm0, xmm1
	jnb	.L585
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	jne	.L586
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	jne	.L586
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	je	.L586
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	je	.L377
.L586:
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	jne	.L587
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	je	.L587
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	jne	.L587
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	je	.L377
.L587:
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	jne	.L588
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	je	.L588
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	je	.L588
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	jne	.L377
.L588:
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	je	.L585
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	jne	.L585
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	jne	.L585
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	je	.L377
.L585:
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L589
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L589
	movzx	eax, BYTE PTR p17_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L589
	movzx	eax, BYTE PTR p17_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L589
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p17_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p17_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L589
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L589
	movss	xmm0, DWORD PTR proposed17[rip]
	movss	xmm1, DWORD PTR _x_proposed17[rip]
	ucomiss	xmm0, xmm1
	jp	.L589
	ucomiss	xmm0, xmm1
	je	.L591
.L589:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L377
	movzx	eax, BYTE PTR p17_evt[rip]
	test	al, al
	je	.L377
.L591:
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L594
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	jne	.L594
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	jne	.L594
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	je	.L594
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	jne	.L594
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L594
	movss	xmm0, DWORD PTR _x_p17_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L594
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L594
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L594
	movss	xmm0, DWORD PTR proposed17[rip]
	movss	xmm1, DWORD PTR _x_proposed17[rip]
	ucomiss	xmm0, xmm1
	jp	.L594
	ucomiss	xmm0, xmm1
	je	.L596
.L594:
	movzx	eax, BYTE PTR p17_l3[rip]
	test	al, al
	jne	.L596
	movzx	eax, BYTE PTR p17_l2[rip]
	test	al, al
	jne	.L596
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	jne	.L596
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	jne	.L596
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L596
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L596
	movzx	eax, BYTE PTR p17_evt[rip]
	test	al, al
	jne	.L377
.L596:
	movss	xmm0, DWORD PTR proposed17[rip]
	movss	xmm1, DWORD PTR _x_proposed17[rip]
	ucomiss	xmm0, xmm1
	jp	.L598
	ucomiss	xmm0, xmm1
	jne	.L598
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L598
	movss	xmm0, DWORD PTR _x_p17_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L598
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L598
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	jne	.L598
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	jne	.L598
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	je	.L598
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	jne	.L598
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 18
	je	.L601
.L598:
	movzx	eax, BYTE PTR p17_l3[rip]
	test	al, al
	jne	.L601
	movzx	eax, BYTE PTR p17_l2[rip]
	test	al, al
	jne	.L601
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	je	.L601
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	jne	.L601
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L601
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L601
	movzx	eax, BYTE PTR p17_evt[rip]
	test	al, al
	jne	.L377
.L601:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L602
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L602
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	jne	.L603
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	jne	.L603
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	jne	.L603
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	je	.L604
.L603:
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	jne	.L602
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	jne	.L602
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	je	.L602
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	je	.L602
.L604:
	movss	xmm0, DWORD PTR p17_c[rip]
	movss	xmm1, DWORD PTR _x_p17_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L602
	ucomiss	xmm0, xmm1
	je	.L605
.L602:
	movzx	eax, BYTE PTR p17_l3[rip]
	test	al, al
	jne	.L605
	movzx	eax, BYTE PTR p17_l2[rip]
	test	al, al
	jne	.L605
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	je	.L605
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	jne	.L605
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L605
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L605
	movzx	eax, BYTE PTR p17_evt[rip]
	test	al, al
	jne	.L377
.L605:
	movss	xmm0, DWORD PTR proposed17[rip]
	movss	xmm1, DWORD PTR _x_proposed17[rip]
	ucomiss	xmm0, xmm1
	jp	.L607
	ucomiss	xmm0, xmm1
	jne	.L607
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 18
	jne	.L609
.L607:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L609
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L609
	movzx	eax, BYTE PTR p17_evt[rip]
	test	al, al
	je	.L609
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	jne	.L609
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	jne	.L609
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	jne	.L609
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	jne	.L609
	movzx	eax, BYTE PTR p17_l3[rip]
	test	al, al
	jne	.L609
	movzx	eax, BYTE PTR p17_l2[rip]
	test	al, al
	jne	.L609
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	je	.L609
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	je	.L377
.L609:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 18
	jne	.L610
	movss	xmm1, DWORD PTR p17_c[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L610
	movss	xmm1, DWORD PTR proposed17[rip]
	movss	xmm0, DWORD PTR _x_proposed17[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L611
.L610:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L611
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L611
	movzx	eax, BYTE PTR p17_evt[rip]
	test	al, al
	je	.L611
	movzx	eax, BYTE PTR p17_l3[rip]
	test	al, al
	jne	.L611
	movzx	eax, BYTE PTR p17_l2[rip]
	test	al, al
	jne	.L611
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	je	.L611
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	jne	.L611
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	jne	.L611
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	jne	.L611
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	je	.L611
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	jne	.L377
.L611:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L612
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L612
	movss	xmm0, DWORD PTR proposed17[rip]
	movss	xmm1, DWORD PTR _x_proposed17[rip]
	ucomiss	xmm0, xmm1
	jp	.L612
	ucomiss	xmm0, xmm1
	jne	.L612
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	jne	.L614
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	jne	.L614
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	jne	.L614
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	je	.L615
.L614:
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	jne	.L612
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	je	.L612
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	jne	.L612
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	je	.L615
.L612:
	movzx	eax, BYTE PTR p17_l3[rip]
	test	al, al
	jne	.L615
	movzx	eax, BYTE PTR p17_l2[rip]
	test	al, al
	jne	.L615
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	je	.L615
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	je	.L615
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L615
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L615
	movzx	eax, BYTE PTR p17_evt[rip]
	test	al, al
	jne	.L377
.L615:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L616
	movss	xmm0, DWORD PTR p17_c[rip]
	movss	xmm1, DWORD PTR _x_p17_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L616
	ucomiss	xmm0, xmm1
	je	.L617
.L616:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L617
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L617
	movzx	eax, BYTE PTR p17_evt[rip]
	test	al, al
	je	.L617
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	jne	.L617
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	jne	.L617
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	jne	.L617
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	jne	.L617
	movzx	eax, BYTE PTR p17_l3[rip]
	test	al, al
	jne	.L617
	movzx	eax, BYTE PTR p17_l2[rip]
	test	al, al
	jne	.L617
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	je	.L617
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	jne	.L377
.L617:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L619
	movss	xmm0, DWORD PTR _x_p17_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L619
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L620
.L619:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L620
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L620
	movzx	eax, BYTE PTR p17_evt[rip]
	test	al, al
	je	.L620
	movzx	eax, BYTE PTR p17_l3[rip]
	test	al, al
	jne	.L620
	movzx	eax, BYTE PTR p17_l2[rip]
	test	al, al
	jne	.L620
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	je	.L620
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	je	.L620
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	jne	.L620
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	je	.L620
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	jne	.L620
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	je	.L377
.L620:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L622
	movss	xmm0, DWORD PTR proposed17[rip]
	movss	xmm1, DWORD PTR _x_proposed17[rip]
	ucomiss	xmm0, xmm1
	jp	.L622
	ucomiss	xmm0, xmm1
	jne	.L622
	movss	xmm0, DWORD PTR _x_p17_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L622
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L622
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L622
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	jne	.L622
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	je	.L622
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	je	.L622
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	je	.L625
.L622:
	movzx	eax, BYTE PTR p17_l3[rip]
	test	al, al
	jne	.L625
	movzx	eax, BYTE PTR p17_l2[rip]
	test	al, al
	je	.L625
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	jne	.L625
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	jne	.L625
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L625
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L625
	movzx	eax, BYTE PTR p17_evt[rip]
	test	al, al
	jne	.L377
.L625:
	movss	xmm0, DWORD PTR proposed17[rip]
	movss	xmm1, DWORD PTR _x_proposed17[rip]
	ucomiss	xmm0, xmm1
	jp	.L626
	ucomiss	xmm0, xmm1
	jne	.L626
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L626
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L626
	movss	xmm0, DWORD PTR p17_c[rip]
	movss	xmm1, DWORD PTR _x_p17_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L626
	ucomiss	xmm0, xmm1
	jne	.L626
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	jne	.L629
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	jne	.L629
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	jne	.L629
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	je	.L630
.L629:
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	jne	.L626
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	je	.L626
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	je	.L626
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	je	.L630
.L626:
	movzx	eax, BYTE PTR p17_l3[rip]
	test	al, al
	jne	.L630
	movzx	eax, BYTE PTR p17_l2[rip]
	test	al, al
	je	.L630
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	je	.L630
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	jne	.L630
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L630
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L630
	movzx	eax, BYTE PTR p17_evt[rip]
	test	al, al
	jne	.L377
.L630:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 18
	jne	.L631
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L631
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L631
	movzx	eax, BYTE PTR p17_evt[rip]
	test	al, al
	je	.L631
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	jne	.L631
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	jne	.L631
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	jne	.L631
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	jne	.L631
	movzx	eax, BYTE PTR p17_l3[rip]
	test	al, al
	jne	.L631
	movzx	eax, BYTE PTR p17_l2[rip]
	test	al, al
	je	.L631
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	je	.L631
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	je	.L377
.L631:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 18
	je	.L632
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L632
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L632
	movzx	eax, BYTE PTR p17_evt[rip]
	test	al, al
	je	.L632
	movzx	eax, BYTE PTR p17_l3[rip]
	test	al, al
	jne	.L632
	movzx	eax, BYTE PTR p17_l2[rip]
	test	al, al
	je	.L632
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	je	.L632
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	jne	.L632
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	jne	.L632
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	je	.L632
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	je	.L632
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	je	.L377
.L632:
	movss	xmm0, DWORD PTR proposed17[rip]
	movss	xmm1, DWORD PTR _x_proposed17[rip]
	ucomiss	xmm0, xmm1
	jp	.L633
	ucomiss	xmm0, xmm1
	jne	.L633
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L633
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L633
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	jne	.L633
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	je	.L633
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	je	.L633
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	je	.L633
	movss	xmm0, DWORD PTR _x_p17_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L633
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L635
.L633:
	movzx	eax, BYTE PTR p17_l3[rip]
	test	al, al
	jne	.L635
	movzx	eax, BYTE PTR p17_l2[rip]
	test	al, al
	je	.L635
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	je	.L635
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	jne	.L635
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L635
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L635
	movzx	eax, BYTE PTR p17_evt[rip]
	test	al, al
	jne	.L377
.L635:
	movss	xmm0, DWORD PTR proposed17[rip]
	movss	xmm1, DWORD PTR _x_proposed17[rip]
	ucomiss	xmm0, xmm1
	jp	.L637
	ucomiss	xmm0, xmm1
	jne	.L637
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L637
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	je	.L637
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	jne	.L637
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	jne	.L637
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	jne	.L637
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L637
	movss	xmm0, DWORD PTR _x_p17_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L637
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L639
.L637:
	movzx	eax, BYTE PTR p17_l3[rip]
	test	al, al
	jne	.L639
	movzx	eax, BYTE PTR p17_l2[rip]
	test	al, al
	je	.L639
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	je	.L639
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	je	.L639
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L639
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L639
	movzx	eax, BYTE PTR p17_evt[rip]
	test	al, al
	jne	.L377
.L639:
	movss	xmm0, DWORD PTR proposed17[rip]
	movss	xmm1, DWORD PTR _x_proposed17[rip]
	ucomiss	xmm0, xmm1
	jp	.L641
	ucomiss	xmm0, xmm1
	jne	.L641
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L641
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	test	al, al
	jne	.L641
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	test	al, al
	jne	.L641
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	jne	.L641
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	jne	.L641
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L641
	movss	xmm0, DWORD PTR p17_c[rip]
	movss	xmm1, DWORD PTR _x_p17_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L641
	ucomiss	xmm0, xmm1
	je	.L643
.L641:
	movzx	eax, BYTE PTR p17_l3[rip]
	test	al, al
	je	.L643
	movzx	eax, BYTE PTR p17_l2[rip]
	test	al, al
	jne	.L643
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	jne	.L643
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	jne	.L643
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L643
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L643
	movzx	eax, BYTE PTR p17_evt[rip]
	test	al, al
	jne	.L377
.L643:
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	je	.L645
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L645
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L645
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L646
.L645:
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L647
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	je	.L647
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L647
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L646
.L647:
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L648
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	je	.L648
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L648
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L646
.L648:
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L649
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	je	.L649
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L649
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L646
.L649:
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L650
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	je	.L650
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L650
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L646
.L650:
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L651
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L651
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L651
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L646
.L651:
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L652
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L652
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L652
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L646
.L652:
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L653
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L653
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L653
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L646
.L653:
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L377
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L377
.L646:
	movss	xmm1, DWORD PTR _x_p16_c[rip]
	movss	xmm0, DWORD PTR _x_proposed16[rip]
	comiss	xmm0, xmm1
	jnb	.L654
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L655
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L655
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L655
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L377
.L655:
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L656
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	je	.L656
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L656
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L377
.L656:
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L657
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	je	.L657
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L657
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L377
.L657:
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	je	.L654
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L654
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L654
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L377
.L654:
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L658
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L658
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L658
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L658
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p16_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p16_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L658
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L658
	movss	xmm0, DWORD PTR proposed16[rip]
	movss	xmm1, DWORD PTR _x_proposed16[rip]
	ucomiss	xmm0, xmm1
	jp	.L658
	ucomiss	xmm0, xmm1
	je	.L660
.L658:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L377
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	je	.L377
.L660:
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L663
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L663
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L663
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L663
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L663
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L663
	movss	xmm0, DWORD PTR _x_p16_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L663
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L663
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L663
	movss	xmm0, DWORD PTR proposed16[rip]
	movss	xmm1, DWORD PTR _x_proposed16[rip]
	ucomiss	xmm0, xmm1
	jp	.L663
	ucomiss	xmm0, xmm1
	je	.L665
.L663:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L665
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L665
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L665
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L665
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L665
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L665
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	jne	.L377
.L665:
	movss	xmm0, DWORD PTR proposed16[rip]
	movss	xmm1, DWORD PTR _x_proposed16[rip]
	ucomiss	xmm0, xmm1
	jp	.L667
	ucomiss	xmm0, xmm1
	jne	.L667
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L667
	movss	xmm0, DWORD PTR _x_p16_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L667
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L667
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L667
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L667
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L667
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L667
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 17
	je	.L670
.L667:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L670
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L670
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L670
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L670
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L670
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L670
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	jne	.L377
.L670:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L671
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L671
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L672
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L672
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L672
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L673
.L672:
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L671
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L671
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L671
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L671
.L673:
	movss	xmm0, DWORD PTR p16_c[rip]
	movss	xmm1, DWORD PTR _x_p16_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L671
	ucomiss	xmm0, xmm1
	je	.L674
.L671:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L674
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L674
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L674
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L674
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L674
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L674
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	jne	.L377
.L674:
	movss	xmm0, DWORD PTR proposed16[rip]
	movss	xmm1, DWORD PTR _x_proposed16[rip]
	ucomiss	xmm0, xmm1
	jp	.L676
	ucomiss	xmm0, xmm1
	jne	.L676
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 17
	jne	.L678
.L676:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L678
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L678
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	je	.L678
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L678
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L678
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L678
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L678
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L678
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L678
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L678
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L377
.L678:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 17
	jne	.L679
	movss	xmm1, DWORD PTR p16_c[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L679
	movss	xmm1, DWORD PTR proposed16[rip]
	movss	xmm0, DWORD PTR _x_proposed16[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L680
.L679:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L680
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L680
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	je	.L680
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L680
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L680
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L680
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L680
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L680
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L680
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L680
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L377
.L680:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L681
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L681
	movss	xmm0, DWORD PTR proposed16[rip]
	movss	xmm1, DWORD PTR _x_proposed16[rip]
	ucomiss	xmm0, xmm1
	jp	.L681
	ucomiss	xmm0, xmm1
	jne	.L681
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L683
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L683
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L683
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L684
.L683:
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L681
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	je	.L681
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L681
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L684
.L681:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L684
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L684
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L684
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L684
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L684
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L684
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	jne	.L377
.L684:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L685
	movss	xmm0, DWORD PTR p16_c[rip]
	movss	xmm1, DWORD PTR _x_p16_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L685
	ucomiss	xmm0, xmm1
	je	.L686
.L685:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L686
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L686
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	je	.L686
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L686
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L686
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L686
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L686
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L686
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L686
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L686
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L377
.L686:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L688
	movss	xmm0, DWORD PTR _x_p16_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L688
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L689
.L688:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L689
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L689
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	je	.L689
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L689
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L689
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L689
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L689
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L689
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	je	.L689
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L689
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L377
.L689:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L691
	movss	xmm0, DWORD PTR proposed16[rip]
	movss	xmm1, DWORD PTR _x_proposed16[rip]
	ucomiss	xmm0, xmm1
	jp	.L691
	ucomiss	xmm0, xmm1
	jne	.L691
	movss	xmm0, DWORD PTR _x_p16_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L691
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L691
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L691
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L691
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	je	.L691
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L691
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L694
.L691:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L694
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	je	.L694
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L694
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L694
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L694
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L694
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	jne	.L377
.L694:
	movss	xmm0, DWORD PTR proposed16[rip]
	movss	xmm1, DWORD PTR _x_proposed16[rip]
	ucomiss	xmm0, xmm1
	jp	.L695
	ucomiss	xmm0, xmm1
	jne	.L695
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L695
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L695
	movss	xmm0, DWORD PTR p16_c[rip]
	movss	xmm1, DWORD PTR _x_p16_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L695
	ucomiss	xmm0, xmm1
	jne	.L695
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L698
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L698
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L698
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L699
.L698:
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L695
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	je	.L695
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L695
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L699
.L695:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L699
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	je	.L699
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L699
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L699
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L699
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L699
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	jne	.L377
.L699:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 17
	jne	.L700
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L700
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L700
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	je	.L700
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L700
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L700
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L700
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L700
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L700
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	je	.L700
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L700
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L377
.L700:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 17
	je	.L701
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L701
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L701
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	je	.L701
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L701
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	je	.L701
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L701
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L701
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L701
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	je	.L701
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L701
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L377
.L701:
	movss	xmm0, DWORD PTR proposed16[rip]
	movss	xmm1, DWORD PTR _x_proposed16[rip]
	ucomiss	xmm0, xmm1
	jp	.L702
	ucomiss	xmm0, xmm1
	jne	.L702
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L702
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L702
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L702
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	je	.L702
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L702
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L702
	movss	xmm0, DWORD PTR _x_p16_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L702
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L704
.L702:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L704
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	je	.L704
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L704
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L704
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L704
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L704
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	jne	.L377
.L704:
	movss	xmm0, DWORD PTR proposed16[rip]
	movss	xmm1, DWORD PTR _x_proposed16[rip]
	ucomiss	xmm0, xmm1
	jp	.L706
	ucomiss	xmm0, xmm1
	jne	.L706
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L706
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	je	.L706
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L706
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L706
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L706
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L706
	movss	xmm0, DWORD PTR _x_p16_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L706
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L708
.L706:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	jne	.L708
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	je	.L708
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L708
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L708
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L708
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L708
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	jne	.L377
.L708:
	movss	xmm0, DWORD PTR proposed16[rip]
	movss	xmm1, DWORD PTR _x_proposed16[rip]
	ucomiss	xmm0, xmm1
	jp	.L710
	ucomiss	xmm0, xmm1
	jne	.L710
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L710
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	test	al, al
	jne	.L710
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	test	al, al
	jne	.L710
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L710
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L710
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L710
	movss	xmm0, DWORD PTR p16_c[rip]
	movss	xmm1, DWORD PTR _x_p16_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L710
	ucomiss	xmm0, xmm1
	je	.L712
.L710:
	movzx	eax, BYTE PTR p16_l3[rip]
	test	al, al
	je	.L712
	movzx	eax, BYTE PTR p16_l2[rip]
	test	al, al
	jne	.L712
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L712
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L712
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L712
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L712
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	jne	.L377
.L712:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	je	.L714
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L714
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L714
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L715
.L714:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L716
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	je	.L716
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L716
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L715
.L716:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L717
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	je	.L717
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L717
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L715
.L717:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L718
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	je	.L718
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L718
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L715
.L718:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L719
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	je	.L719
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L719
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L715
.L719:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L720
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L720
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L720
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L715
.L720:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L721
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L721
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L721
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L715
.L721:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L722
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L722
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L722
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L715
.L722:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L377
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L377
.L715:
	movss	xmm1, DWORD PTR _x_p15_c[rip]
	movss	xmm0, DWORD PTR _x_proposed15[rip]
	comiss	xmm0, xmm1
	jnb	.L723
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L724
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L724
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L724
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L377
.L724:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L725
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	je	.L725
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L725
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L377
.L725:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L726
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	je	.L726
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L726
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L377
.L726:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	je	.L723
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L723
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L723
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L377
.L723:
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L727
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L727
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L727
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L727
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p15_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p15_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L727
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L727
	movss	xmm0, DWORD PTR proposed15[rip]
	movss	xmm1, DWORD PTR _x_proposed15[rip]
	ucomiss	xmm0, xmm1
	jp	.L727
	ucomiss	xmm0, xmm1
	je	.L729
.L727:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L377
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	je	.L377
.L729:
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L732
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L732
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L732
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L732
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L732
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L732
	movss	xmm0, DWORD PTR _x_p15_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L732
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L732
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L732
	movss	xmm0, DWORD PTR proposed15[rip]
	movss	xmm1, DWORD PTR _x_proposed15[rip]
	ucomiss	xmm0, xmm1
	jp	.L732
	ucomiss	xmm0, xmm1
	je	.L734
.L732:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L734
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L734
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L734
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L734
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L734
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L734
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	jne	.L377
.L734:
	movss	xmm0, DWORD PTR proposed15[rip]
	movss	xmm1, DWORD PTR _x_proposed15[rip]
	ucomiss	xmm0, xmm1
	jp	.L736
	ucomiss	xmm0, xmm1
	jne	.L736
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L736
	movss	xmm0, DWORD PTR _x_p15_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L736
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L736
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L736
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L736
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L736
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L736
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 16
	je	.L739
.L736:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L739
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L739
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L739
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L739
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L739
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L739
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	jne	.L377
.L739:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L740
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L740
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L741
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L741
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L741
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L742
.L741:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L740
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L740
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L740
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L740
.L742:
	movss	xmm0, DWORD PTR p15_c[rip]
	movss	xmm1, DWORD PTR _x_p15_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L740
	ucomiss	xmm0, xmm1
	je	.L743
.L740:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L743
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L743
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L743
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L743
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L743
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L743
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	jne	.L377
.L743:
	movss	xmm0, DWORD PTR proposed15[rip]
	movss	xmm1, DWORD PTR _x_proposed15[rip]
	ucomiss	xmm0, xmm1
	jp	.L745
	ucomiss	xmm0, xmm1
	jne	.L745
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 16
	jne	.L747
.L745:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L747
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L747
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	je	.L747
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L747
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L747
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L747
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L747
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L747
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L747
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L747
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L377
.L747:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 16
	jne	.L748
	movss	xmm1, DWORD PTR p15_c[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L748
	movss	xmm1, DWORD PTR proposed15[rip]
	movss	xmm0, DWORD PTR _x_proposed15[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L749
.L748:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L749
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L749
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	je	.L749
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L749
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L749
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L749
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L749
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L749
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L749
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L749
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L377
.L749:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L750
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L750
	movss	xmm0, DWORD PTR proposed15[rip]
	movss	xmm1, DWORD PTR _x_proposed15[rip]
	ucomiss	xmm0, xmm1
	jp	.L750
	ucomiss	xmm0, xmm1
	jne	.L750
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L752
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L752
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L752
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L753
.L752:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L750
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	je	.L750
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L750
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L753
.L750:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L753
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L753
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L753
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L753
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L753
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L753
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	jne	.L377
.L753:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L754
	movss	xmm0, DWORD PTR p15_c[rip]
	movss	xmm1, DWORD PTR _x_p15_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L754
	ucomiss	xmm0, xmm1
	je	.L755
.L754:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L755
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L755
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	je	.L755
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L755
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L755
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L755
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L755
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L755
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L755
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L755
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L377
.L755:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L757
	movss	xmm0, DWORD PTR _x_p15_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L757
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L758
.L757:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L758
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L758
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	je	.L758
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L758
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L758
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L758
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L758
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L758
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	je	.L758
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L758
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L377
.L758:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L760
	movss	xmm0, DWORD PTR proposed15[rip]
	movss	xmm1, DWORD PTR _x_proposed15[rip]
	ucomiss	xmm0, xmm1
	jp	.L760
	ucomiss	xmm0, xmm1
	jne	.L760
	movss	xmm0, DWORD PTR _x_p15_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L760
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L760
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L760
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L760
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	je	.L760
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L760
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L763
.L760:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L763
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	je	.L763
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L763
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L763
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L763
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L763
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	jne	.L377
.L763:
	movss	xmm0, DWORD PTR proposed15[rip]
	movss	xmm1, DWORD PTR _x_proposed15[rip]
	ucomiss	xmm0, xmm1
	jp	.L764
	ucomiss	xmm0, xmm1
	jne	.L764
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L764
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L764
	movss	xmm0, DWORD PTR p15_c[rip]
	movss	xmm1, DWORD PTR _x_p15_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L764
	ucomiss	xmm0, xmm1
	jne	.L764
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L767
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L767
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L767
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L768
.L767:
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L764
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	je	.L764
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L764
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L768
.L764:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L768
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	je	.L768
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L768
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L768
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L768
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L768
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	jne	.L377
.L768:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 16
	jne	.L769
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L769
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L769
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	je	.L769
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L769
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L769
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L769
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L769
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L769
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	je	.L769
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L769
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L377
.L769:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 16
	je	.L770
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L770
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L770
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	je	.L770
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L770
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	je	.L770
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L770
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L770
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L770
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	je	.L770
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L770
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L377
.L770:
	movss	xmm0, DWORD PTR proposed15[rip]
	movss	xmm1, DWORD PTR _x_proposed15[rip]
	ucomiss	xmm0, xmm1
	jp	.L771
	ucomiss	xmm0, xmm1
	jne	.L771
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L771
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L771
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L771
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	je	.L771
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L771
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L771
	movss	xmm0, DWORD PTR _x_p15_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L771
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L773
.L771:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L773
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	je	.L773
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L773
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L773
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L773
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L773
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	jne	.L377
.L773:
	movss	xmm0, DWORD PTR proposed15[rip]
	movss	xmm1, DWORD PTR _x_proposed15[rip]
	ucomiss	xmm0, xmm1
	jp	.L775
	ucomiss	xmm0, xmm1
	jne	.L775
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L775
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	je	.L775
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L775
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L775
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L775
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L775
	movss	xmm0, DWORD PTR _x_p15_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L775
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L777
.L775:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	jne	.L777
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	je	.L777
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L777
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L777
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L777
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L777
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	jne	.L377
.L777:
	movss	xmm0, DWORD PTR proposed15[rip]
	movss	xmm1, DWORD PTR _x_proposed15[rip]
	ucomiss	xmm0, xmm1
	jp	.L779
	ucomiss	xmm0, xmm1
	jne	.L779
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L779
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	test	al, al
	jne	.L779
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	test	al, al
	jne	.L779
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L779
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L779
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L779
	movss	xmm0, DWORD PTR p15_c[rip]
	movss	xmm1, DWORD PTR _x_p15_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L779
	ucomiss	xmm0, xmm1
	je	.L781
.L779:
	movzx	eax, BYTE PTR p15_l3[rip]
	test	al, al
	je	.L781
	movzx	eax, BYTE PTR p15_l2[rip]
	test	al, al
	jne	.L781
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L781
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L781
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L781
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L781
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	jne	.L377
.L781:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	je	.L783
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L783
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L783
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L784
.L783:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L785
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L785
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L785
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L784
.L785:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L786
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L786
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L786
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L784
.L786:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L787
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L787
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L787
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L784
.L787:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L788
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L788
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L788
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L784
.L788:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L789
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L789
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L789
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L784
.L789:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L790
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L790
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L790
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L784
.L790:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L791
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L791
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L791
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L784
.L791:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L377
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L377
.L784:
	movss	xmm1, DWORD PTR _x_p14_c[rip]
	movss	xmm0, DWORD PTR _x_proposed14[rip]
	comiss	xmm0, xmm1
	jnb	.L792
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L793
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L793
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L793
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L377
.L793:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L794
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L794
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L794
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L377
.L794:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L795
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L795
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L795
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L377
.L795:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	je	.L792
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L792
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L792
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L377
.L792:
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L796
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L796
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L796
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L796
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p14_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p14_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L796
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L796
	movss	xmm0, DWORD PTR proposed14[rip]
	movss	xmm1, DWORD PTR _x_proposed14[rip]
	ucomiss	xmm0, xmm1
	jp	.L796
	ucomiss	xmm0, xmm1
	je	.L798
.L796:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L377
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	je	.L377
.L798:
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L801
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L801
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L801
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L801
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L801
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L801
	movss	xmm0, DWORD PTR _x_p14_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L801
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L801
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L801
	movss	xmm0, DWORD PTR proposed14[rip]
	movss	xmm1, DWORD PTR _x_proposed14[rip]
	ucomiss	xmm0, xmm1
	jp	.L801
	ucomiss	xmm0, xmm1
	je	.L803
.L801:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L803
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L803
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L803
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L803
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L803
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L803
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L377
.L803:
	movss	xmm0, DWORD PTR proposed14[rip]
	movss	xmm1, DWORD PTR _x_proposed14[rip]
	ucomiss	xmm0, xmm1
	jp	.L805
	ucomiss	xmm0, xmm1
	jne	.L805
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L805
	movss	xmm0, DWORD PTR _x_p14_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L805
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L805
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L805
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L805
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L805
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L805
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 15
	je	.L808
.L805:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L808
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L808
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L808
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L808
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L808
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L808
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L377
.L808:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L809
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L809
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L810
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L810
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L810
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L811
.L810:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L809
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L809
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L809
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L809
.L811:
	movss	xmm0, DWORD PTR p14_c[rip]
	movss	xmm1, DWORD PTR _x_p14_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L809
	ucomiss	xmm0, xmm1
	je	.L812
.L809:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L812
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L812
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L812
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L812
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L812
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L812
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L377
.L812:
	movss	xmm0, DWORD PTR proposed14[rip]
	movss	xmm1, DWORD PTR _x_proposed14[rip]
	ucomiss	xmm0, xmm1
	jp	.L814
	ucomiss	xmm0, xmm1
	jne	.L814
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 15
	jne	.L816
.L814:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L816
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L816
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	je	.L816
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L816
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L816
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L816
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L816
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L816
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L816
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L816
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L377
.L816:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 15
	jne	.L817
	movss	xmm1, DWORD PTR p14_c[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L817
	movss	xmm1, DWORD PTR proposed14[rip]
	movss	xmm0, DWORD PTR _x_proposed14[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L818
.L817:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L818
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L818
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	je	.L818
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L818
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L818
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L818
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L818
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L818
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L818
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L818
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L377
.L818:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L819
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L819
	movss	xmm0, DWORD PTR proposed14[rip]
	movss	xmm1, DWORD PTR _x_proposed14[rip]
	ucomiss	xmm0, xmm1
	jp	.L819
	ucomiss	xmm0, xmm1
	jne	.L819
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L821
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L821
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L821
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L822
.L821:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L819
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L819
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L819
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L822
.L819:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L822
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L822
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L822
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L822
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L822
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L822
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L377
.L822:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L823
	movss	xmm0, DWORD PTR p14_c[rip]
	movss	xmm1, DWORD PTR _x_p14_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L823
	ucomiss	xmm0, xmm1
	je	.L824
.L823:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L824
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L824
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	je	.L824
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L824
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L824
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L824
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L824
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L824
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L824
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L824
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L377
.L824:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L826
	movss	xmm0, DWORD PTR _x_p14_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L826
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L827
.L826:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L827
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L827
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	je	.L827
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L827
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L827
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L827
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L827
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L827
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L827
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L827
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L377
.L827:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L829
	movss	xmm0, DWORD PTR proposed14[rip]
	movss	xmm1, DWORD PTR _x_proposed14[rip]
	ucomiss	xmm0, xmm1
	jp	.L829
	ucomiss	xmm0, xmm1
	jne	.L829
	movss	xmm0, DWORD PTR _x_p14_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L829
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L829
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L829
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L829
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L829
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L829
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L832
.L829:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L832
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L832
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L832
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L832
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L832
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L832
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L377
.L832:
	movss	xmm0, DWORD PTR proposed14[rip]
	movss	xmm1, DWORD PTR _x_proposed14[rip]
	ucomiss	xmm0, xmm1
	jp	.L833
	ucomiss	xmm0, xmm1
	jne	.L833
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L833
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L833
	movss	xmm0, DWORD PTR p14_c[rip]
	movss	xmm1, DWORD PTR _x_p14_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L833
	ucomiss	xmm0, xmm1
	jne	.L833
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L836
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L836
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L836
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L837
.L836:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L833
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L833
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L833
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L837
.L833:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L837
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L837
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L837
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L837
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L837
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L837
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L377
.L837:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 15
	jne	.L838
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L838
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L838
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	je	.L838
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L838
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L838
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L838
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L838
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L838
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L838
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L838
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L377
.L838:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 15
	je	.L839
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L839
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L839
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	je	.L839
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L839
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L839
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L839
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L839
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L839
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L839
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L839
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L377
.L839:
	movss	xmm0, DWORD PTR proposed14[rip]
	movss	xmm1, DWORD PTR _x_proposed14[rip]
	ucomiss	xmm0, xmm1
	jp	.L840
	ucomiss	xmm0, xmm1
	jne	.L840
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L840
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L840
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L840
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L840
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L840
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L840
	movss	xmm0, DWORD PTR _x_p14_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L840
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L842
.L840:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L842
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L842
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L842
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L842
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L842
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L842
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L377
.L842:
	movss	xmm0, DWORD PTR proposed14[rip]
	movss	xmm1, DWORD PTR _x_proposed14[rip]
	ucomiss	xmm0, xmm1
	jp	.L844
	ucomiss	xmm0, xmm1
	jne	.L844
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L844
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	je	.L844
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L844
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L844
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L844
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L844
	movss	xmm0, DWORD PTR _x_p14_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L844
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L846
.L844:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L846
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L846
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L846
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L846
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L846
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L846
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L377
.L846:
	movss	xmm0, DWORD PTR proposed14[rip]
	movss	xmm1, DWORD PTR _x_proposed14[rip]
	ucomiss	xmm0, xmm1
	jp	.L848
	ucomiss	xmm0, xmm1
	jne	.L848
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L848
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L848
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L848
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L848
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L848
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L848
	movss	xmm0, DWORD PTR p14_c[rip]
	movss	xmm1, DWORD PTR _x_p14_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L848
	ucomiss	xmm0, xmm1
	je	.L850
.L848:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	je	.L850
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L850
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L850
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L850
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L850
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L850
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L377
.L850:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	je	.L852
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L852
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L852
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L853
.L852:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L854
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L854
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L854
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L853
.L854:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L855
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L855
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L855
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L853
.L855:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L856
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L856
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L856
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L853
.L856:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L857
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L857
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L857
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L853
.L857:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L858
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L858
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L858
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L853
.L858:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L859
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L859
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L859
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L853
.L859:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L860
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L860
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L860
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L853
.L860:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L377
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L377
.L853:
	movss	xmm1, DWORD PTR _x_p13_c[rip]
	movss	xmm0, DWORD PTR _x_proposed13[rip]
	comiss	xmm0, xmm1
	jnb	.L861
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L862
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L862
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L862
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L377
.L862:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L863
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L863
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L863
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L377
.L863:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L864
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L864
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L864
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L377
.L864:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	je	.L861
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L861
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L861
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L377
.L861:
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L865
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L865
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L865
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L865
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p13_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p13_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L865
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L865
	movss	xmm0, DWORD PTR proposed13[rip]
	movss	xmm1, DWORD PTR _x_proposed13[rip]
	ucomiss	xmm0, xmm1
	jp	.L865
	ucomiss	xmm0, xmm1
	je	.L867
.L865:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L377
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	je	.L377
.L867:
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L870
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L870
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L870
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L870
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L870
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L870
	movss	xmm0, DWORD PTR _x_p13_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L870
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L870
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L870
	movss	xmm0, DWORD PTR proposed13[rip]
	movss	xmm1, DWORD PTR _x_proposed13[rip]
	ucomiss	xmm0, xmm1
	jp	.L870
	ucomiss	xmm0, xmm1
	je	.L872
.L870:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L872
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L872
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L872
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L872
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L872
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L872
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L377
.L872:
	movss	xmm0, DWORD PTR proposed13[rip]
	movss	xmm1, DWORD PTR _x_proposed13[rip]
	ucomiss	xmm0, xmm1
	jp	.L874
	ucomiss	xmm0, xmm1
	jne	.L874
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L874
	movss	xmm0, DWORD PTR _x_p13_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L874
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L874
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L874
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L874
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L874
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L874
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 14
	je	.L877
.L874:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L877
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L877
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L877
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L877
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L877
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L877
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L377
.L877:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L878
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L878
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L879
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L879
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L879
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L880
.L879:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L878
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L878
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L878
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L878
.L880:
	movss	xmm0, DWORD PTR p13_c[rip]
	movss	xmm1, DWORD PTR _x_p13_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L878
	ucomiss	xmm0, xmm1
	je	.L881
.L878:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L881
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L881
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L881
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L881
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L881
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L881
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L377
.L881:
	movss	xmm0, DWORD PTR proposed13[rip]
	movss	xmm1, DWORD PTR _x_proposed13[rip]
	ucomiss	xmm0, xmm1
	jp	.L883
	ucomiss	xmm0, xmm1
	jne	.L883
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 14
	jne	.L885
.L883:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L885
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L885
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	je	.L885
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L885
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L885
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L885
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L885
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L885
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L885
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L885
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L377
.L885:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 14
	jne	.L886
	movss	xmm1, DWORD PTR p13_c[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L886
	movss	xmm1, DWORD PTR proposed13[rip]
	movss	xmm0, DWORD PTR _x_proposed13[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L887
.L886:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L887
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L887
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	je	.L887
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L887
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L887
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L887
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L887
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L887
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L887
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L887
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L377
.L887:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L888
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L888
	movss	xmm0, DWORD PTR proposed13[rip]
	movss	xmm1, DWORD PTR _x_proposed13[rip]
	ucomiss	xmm0, xmm1
	jp	.L888
	ucomiss	xmm0, xmm1
	jne	.L888
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L890
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L890
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L890
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L891
.L890:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L888
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L888
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L888
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L891
.L888:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L891
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L891
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L891
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L891
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L891
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L891
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L377
.L891:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L892
	movss	xmm0, DWORD PTR p13_c[rip]
	movss	xmm1, DWORD PTR _x_p13_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L892
	ucomiss	xmm0, xmm1
	je	.L893
.L892:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L893
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L893
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	je	.L893
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L893
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L893
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L893
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L893
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L893
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L893
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L893
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L377
.L893:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L895
	movss	xmm0, DWORD PTR _x_p13_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L895
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L896
.L895:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L896
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L896
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	je	.L896
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L896
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L896
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L896
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L896
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L896
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L896
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L896
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L377
.L896:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L898
	movss	xmm0, DWORD PTR proposed13[rip]
	movss	xmm1, DWORD PTR _x_proposed13[rip]
	ucomiss	xmm0, xmm1
	jp	.L898
	ucomiss	xmm0, xmm1
	jne	.L898
	movss	xmm0, DWORD PTR _x_p13_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L898
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L898
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L898
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L898
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L898
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L898
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L901
.L898:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L901
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L901
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L901
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L901
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L901
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L901
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L377
.L901:
	movss	xmm0, DWORD PTR proposed13[rip]
	movss	xmm1, DWORD PTR _x_proposed13[rip]
	ucomiss	xmm0, xmm1
	jp	.L902
	ucomiss	xmm0, xmm1
	jne	.L902
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L902
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L902
	movss	xmm0, DWORD PTR p13_c[rip]
	movss	xmm1, DWORD PTR _x_p13_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L902
	ucomiss	xmm0, xmm1
	jne	.L902
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L905
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L905
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L905
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L906
.L905:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L902
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L902
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L902
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L906
.L902:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L906
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L906
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L906
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L906
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L906
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L906
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L377
.L906:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 14
	jne	.L907
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L907
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L907
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	je	.L907
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L907
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L907
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L907
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L907
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L907
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L907
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L907
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L377
.L907:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 14
	je	.L908
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L908
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L908
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	je	.L908
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L908
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L908
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L908
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L908
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L908
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L908
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L908
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L377
.L908:
	movss	xmm0, DWORD PTR proposed13[rip]
	movss	xmm1, DWORD PTR _x_proposed13[rip]
	ucomiss	xmm0, xmm1
	jp	.L909
	ucomiss	xmm0, xmm1
	jne	.L909
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L909
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L909
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L909
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L909
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L909
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L909
	movss	xmm0, DWORD PTR _x_p13_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L909
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L911
.L909:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L911
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L911
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L911
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L911
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L911
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L911
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L377
.L911:
	movss	xmm0, DWORD PTR proposed13[rip]
	movss	xmm1, DWORD PTR _x_proposed13[rip]
	ucomiss	xmm0, xmm1
	jp	.L913
	ucomiss	xmm0, xmm1
	jne	.L913
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L913
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	je	.L913
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L913
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L913
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L913
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L913
	movss	xmm0, DWORD PTR _x_p13_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L913
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L915
.L913:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L915
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L915
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L915
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L915
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L915
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L915
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L377
.L915:
	movss	xmm0, DWORD PTR proposed13[rip]
	movss	xmm1, DWORD PTR _x_proposed13[rip]
	ucomiss	xmm0, xmm1
	jp	.L917
	ucomiss	xmm0, xmm1
	jne	.L917
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L917
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L917
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L917
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L917
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L917
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L917
	movss	xmm0, DWORD PTR p13_c[rip]
	movss	xmm1, DWORD PTR _x_p13_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L917
	ucomiss	xmm0, xmm1
	je	.L919
.L917:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	je	.L919
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L919
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L919
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L919
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L919
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L919
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L377
.L919:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	je	.L921
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L921
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L921
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L922
.L921:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L923
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L923
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L923
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L922
.L923:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L924
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L924
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L924
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L922
.L924:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L925
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L925
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L925
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L922
.L925:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L926
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L926
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L926
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L922
.L926:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L927
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L927
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L927
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L922
.L927:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L928
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L928
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L928
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L922
.L928:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L929
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L929
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L929
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L922
.L929:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L377
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L377
.L922:
	movss	xmm1, DWORD PTR _x_p12_c[rip]
	movss	xmm0, DWORD PTR _x_proposed12[rip]
	comiss	xmm0, xmm1
	jnb	.L930
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L931
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L931
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L931
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L377
.L931:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L932
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L932
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L932
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L377
.L932:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L933
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L933
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L933
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L377
.L933:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	je	.L930
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L930
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L930
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L377
.L930:
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L934
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L934
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L934
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L934
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p12_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p12_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L934
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L934
	movss	xmm0, DWORD PTR proposed12[rip]
	movss	xmm1, DWORD PTR _x_proposed12[rip]
	ucomiss	xmm0, xmm1
	jp	.L934
	ucomiss	xmm0, xmm1
	je	.L936
.L934:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L377
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	je	.L377
.L936:
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L939
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L939
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L939
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L939
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L939
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L939
	movss	xmm0, DWORD PTR _x_p12_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L939
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L939
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L939
	movss	xmm0, DWORD PTR proposed12[rip]
	movss	xmm1, DWORD PTR _x_proposed12[rip]
	ucomiss	xmm0, xmm1
	jp	.L939
	ucomiss	xmm0, xmm1
	je	.L941
.L939:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L941
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L941
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L941
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L941
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L941
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L941
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L377
.L941:
	movss	xmm0, DWORD PTR proposed12[rip]
	movss	xmm1, DWORD PTR _x_proposed12[rip]
	ucomiss	xmm0, xmm1
	jp	.L943
	ucomiss	xmm0, xmm1
	jne	.L943
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L943
	movss	xmm0, DWORD PTR _x_p12_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L943
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L943
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L943
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L943
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L943
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L943
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 13
	je	.L946
.L943:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L946
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L946
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L946
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L946
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L946
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L946
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L377
.L946:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L947
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L947
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L948
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L948
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L948
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L949
.L948:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L947
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L947
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L947
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L947
.L949:
	movss	xmm0, DWORD PTR p12_c[rip]
	movss	xmm1, DWORD PTR _x_p12_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L947
	ucomiss	xmm0, xmm1
	je	.L950
.L947:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L950
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L950
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L950
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L950
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L950
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L950
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L377
.L950:
	movss	xmm0, DWORD PTR proposed12[rip]
	movss	xmm1, DWORD PTR _x_proposed12[rip]
	ucomiss	xmm0, xmm1
	jp	.L952
	ucomiss	xmm0, xmm1
	jne	.L952
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 13
	jne	.L954
.L952:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L954
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L954
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	je	.L954
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L954
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L954
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L954
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L954
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L954
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L954
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L954
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L377
.L954:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 13
	jne	.L955
	movss	xmm1, DWORD PTR p12_c[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L955
	movss	xmm1, DWORD PTR proposed12[rip]
	movss	xmm0, DWORD PTR _x_proposed12[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L956
.L955:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L956
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L956
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	je	.L956
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L956
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L956
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L956
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L956
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L956
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L956
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L956
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L377
.L956:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L957
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L957
	movss	xmm0, DWORD PTR proposed12[rip]
	movss	xmm1, DWORD PTR _x_proposed12[rip]
	ucomiss	xmm0, xmm1
	jp	.L957
	ucomiss	xmm0, xmm1
	jne	.L957
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L959
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L959
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L959
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L960
.L959:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L957
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L957
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L957
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L960
.L957:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L960
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L960
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L960
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L960
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L960
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L960
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L377
.L960:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L961
	movss	xmm0, DWORD PTR p12_c[rip]
	movss	xmm1, DWORD PTR _x_p12_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L961
	ucomiss	xmm0, xmm1
	je	.L962
.L961:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L962
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L962
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	je	.L962
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L962
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L962
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L962
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L962
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L962
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L962
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L962
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L377
.L962:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L964
	movss	xmm0, DWORD PTR _x_p12_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L964
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L965
.L964:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L965
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L965
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	je	.L965
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L965
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L965
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L965
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L965
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L965
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L965
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L965
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L377
.L965:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L967
	movss	xmm0, DWORD PTR proposed12[rip]
	movss	xmm1, DWORD PTR _x_proposed12[rip]
	ucomiss	xmm0, xmm1
	jp	.L967
	ucomiss	xmm0, xmm1
	jne	.L967
	movss	xmm0, DWORD PTR _x_p12_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L967
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L967
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L967
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L967
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L967
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L967
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L970
.L967:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L970
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L970
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L970
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L970
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L970
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L970
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L377
.L970:
	movss	xmm0, DWORD PTR proposed12[rip]
	movss	xmm1, DWORD PTR _x_proposed12[rip]
	ucomiss	xmm0, xmm1
	jp	.L971
	ucomiss	xmm0, xmm1
	jne	.L971
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L971
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L971
	movss	xmm0, DWORD PTR p12_c[rip]
	movss	xmm1, DWORD PTR _x_p12_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L971
	ucomiss	xmm0, xmm1
	jne	.L971
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L974
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L974
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L974
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L975
.L974:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L971
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L971
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L971
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L975
.L971:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L975
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L975
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L975
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L975
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L975
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L975
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L377
.L975:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 13
	jne	.L976
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L976
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L976
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	je	.L976
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L976
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L976
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L976
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L976
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L976
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L976
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L976
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L377
.L976:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 13
	je	.L977
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L977
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L977
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	je	.L977
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L977
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L977
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L977
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L977
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L977
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L977
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L977
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L377
.L977:
	movss	xmm0, DWORD PTR proposed12[rip]
	movss	xmm1, DWORD PTR _x_proposed12[rip]
	ucomiss	xmm0, xmm1
	jp	.L978
	ucomiss	xmm0, xmm1
	jne	.L978
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L978
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L978
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L978
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L978
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L978
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L978
	movss	xmm0, DWORD PTR _x_p12_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L978
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L980
.L978:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L980
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L980
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L980
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L980
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L980
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L980
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L377
.L980:
	movss	xmm0, DWORD PTR proposed12[rip]
	movss	xmm1, DWORD PTR _x_proposed12[rip]
	ucomiss	xmm0, xmm1
	jp	.L982
	ucomiss	xmm0, xmm1
	jne	.L982
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L982
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	je	.L982
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L982
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L982
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L982
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L982
	movss	xmm0, DWORD PTR _x_p12_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L982
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L984
.L982:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L984
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L984
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L984
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L984
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L984
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L984
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L377
.L984:
	movss	xmm0, DWORD PTR proposed12[rip]
	movss	xmm1, DWORD PTR _x_proposed12[rip]
	ucomiss	xmm0, xmm1
	jp	.L986
	ucomiss	xmm0, xmm1
	jne	.L986
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L986
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L986
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L986
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L986
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L986
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L986
	movss	xmm0, DWORD PTR p12_c[rip]
	movss	xmm1, DWORD PTR _x_p12_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L986
	ucomiss	xmm0, xmm1
	je	.L988
.L986:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	je	.L988
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L988
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L988
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L988
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L988
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L988
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L377
.L988:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	je	.L990
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L990
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L990
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L991
.L990:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L992
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L992
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L992
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L991
.L992:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L993
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L993
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L993
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L991
.L993:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L994
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L994
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L994
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L991
.L994:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L995
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L995
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L995
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L991
.L995:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L996
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L996
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L996
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L991
.L996:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L997
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L997
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L997
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L991
.L997:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L998
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L998
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L998
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L991
.L998:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L377
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L377
.L991:
	movss	xmm1, DWORD PTR _x_p11_c[rip]
	movss	xmm0, DWORD PTR _x_proposed11[rip]
	comiss	xmm0, xmm1
	jnb	.L999
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L1000
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L1000
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L1000
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L377
.L1000:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L1001
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L1001
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L1001
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L377
.L1001:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L1002
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L1002
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L1002
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L377
.L1002:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	je	.L999
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L999
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L999
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L377
.L999:
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1003
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1003
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1003
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1003
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p11_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p11_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L1003
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L1003
	movss	xmm0, DWORD PTR proposed11[rip]
	movss	xmm1, DWORD PTR _x_proposed11[rip]
	ucomiss	xmm0, xmm1
	jp	.L1003
	ucomiss	xmm0, xmm1
	je	.L1005
.L1003:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L377
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	je	.L377
.L1005:
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L1008
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L1008
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L1008
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L1008
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L1008
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1008
	movss	xmm0, DWORD PTR _x_p11_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1008
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1008
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1008
	movss	xmm0, DWORD PTR proposed11[rip]
	movss	xmm1, DWORD PTR _x_proposed11[rip]
	ucomiss	xmm0, xmm1
	jp	.L1008
	ucomiss	xmm0, xmm1
	je	.L1010
.L1008:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L1010
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L1010
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L1010
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L1010
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1010
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1010
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L377
.L1010:
	movss	xmm0, DWORD PTR proposed11[rip]
	movss	xmm1, DWORD PTR _x_proposed11[rip]
	ucomiss	xmm0, xmm1
	jp	.L1012
	ucomiss	xmm0, xmm1
	jne	.L1012
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1012
	movss	xmm0, DWORD PTR _x_p11_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1012
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1012
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L1012
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L1012
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L1012
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L1012
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 12
	je	.L1015
.L1012:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L1015
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L1015
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L1015
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L1015
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1015
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1015
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L377
.L1015:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1016
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1016
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L1017
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L1017
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L1017
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L1018
.L1017:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L1016
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L1016
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L1016
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L1016
.L1018:
	movss	xmm0, DWORD PTR p11_c[rip]
	movss	xmm1, DWORD PTR _x_p11_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1016
	ucomiss	xmm0, xmm1
	je	.L1019
.L1016:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L1019
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L1019
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L1019
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L1019
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1019
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1019
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L377
.L1019:
	movss	xmm0, DWORD PTR proposed11[rip]
	movss	xmm1, DWORD PTR _x_proposed11[rip]
	ucomiss	xmm0, xmm1
	jp	.L1021
	ucomiss	xmm0, xmm1
	jne	.L1021
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 12
	jne	.L1023
.L1021:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1023
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1023
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	je	.L1023
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L1023
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L1023
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L1023
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L1023
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L1023
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L1023
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L1023
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L377
.L1023:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 12
	jne	.L1024
	movss	xmm1, DWORD PTR p11_c[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L1024
	movss	xmm1, DWORD PTR proposed11[rip]
	movss	xmm0, DWORD PTR _x_proposed11[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L1025
.L1024:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1025
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1025
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	je	.L1025
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L1025
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L1025
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L1025
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L1025
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L1025
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L1025
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L1025
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L377
.L1025:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1026
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1026
	movss	xmm0, DWORD PTR proposed11[rip]
	movss	xmm1, DWORD PTR _x_proposed11[rip]
	ucomiss	xmm0, xmm1
	jp	.L1026
	ucomiss	xmm0, xmm1
	jne	.L1026
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L1028
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L1028
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L1028
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L1029
.L1028:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L1026
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L1026
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L1026
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L1029
.L1026:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L1029
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L1029
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L1029
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L1029
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1029
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1029
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L377
.L1029:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L1030
	movss	xmm0, DWORD PTR p11_c[rip]
	movss	xmm1, DWORD PTR _x_p11_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1030
	ucomiss	xmm0, xmm1
	je	.L1031
.L1030:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1031
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1031
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	je	.L1031
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L1031
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L1031
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L1031
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L1031
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L1031
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L1031
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L1031
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L377
.L1031:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L1033
	movss	xmm0, DWORD PTR _x_p11_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1033
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1034
.L1033:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1034
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1034
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	je	.L1034
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L1034
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L1034
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L1034
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L377
.L1034:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1036
	movss	xmm0, DWORD PTR proposed11[rip]
	movss	xmm1, DWORD PTR _x_proposed11[rip]
	ucomiss	xmm0, xmm1
	jp	.L1036
	ucomiss	xmm0, xmm1
	jne	.L1036
	movss	xmm0, DWORD PTR _x_p11_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1036
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1036
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L1036
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L1036
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L1036
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L1036
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L1039
.L1036:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L1039
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L1039
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L1039
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L1039
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1039
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1039
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L377
.L1039:
	movss	xmm0, DWORD PTR proposed11[rip]
	movss	xmm1, DWORD PTR _x_proposed11[rip]
	ucomiss	xmm0, xmm1
	jp	.L1040
	ucomiss	xmm0, xmm1
	jne	.L1040
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1040
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1040
	movss	xmm0, DWORD PTR p11_c[rip]
	movss	xmm1, DWORD PTR _x_p11_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1040
	ucomiss	xmm0, xmm1
	jne	.L1040
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L1043
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L1043
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L1043
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L1044
.L1043:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L1040
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L1040
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L1040
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L1044
.L1040:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L1044
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L1044
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L1044
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L1044
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1044
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1044
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L377
.L1044:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 12
	jne	.L1045
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1045
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1045
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	je	.L1045
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L1045
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L1045
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L1045
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L1045
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L1045
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L1045
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L1045
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L377
.L1045:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 12
	je	.L1046
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1046
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1046
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	je	.L1046
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L1046
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L1046
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L1046
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L1046
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L1046
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L1046
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L1046
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L377
.L1046:
	movss	xmm0, DWORD PTR proposed11[rip]
	movss	xmm1, DWORD PTR _x_proposed11[rip]
	ucomiss	xmm0, xmm1
	jp	.L1047
	ucomiss	xmm0, xmm1
	jne	.L1047
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1047
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1047
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L1047
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L1047
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L1047
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L1047
	movss	xmm0, DWORD PTR _x_p11_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1047
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1049
.L1047:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L1049
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L1049
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L1049
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L1049
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1049
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1049
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L377
.L1049:
	movss	xmm0, DWORD PTR proposed11[rip]
	movss	xmm1, DWORD PTR _x_proposed11[rip]
	ucomiss	xmm0, xmm1
	jp	.L1051
	ucomiss	xmm0, xmm1
	jne	.L1051
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L1051
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	je	.L1051
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L1051
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L1051
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L1051
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1051
	movss	xmm0, DWORD PTR _x_p11_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1051
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1053
.L1051:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L1053
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L1053
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L1053
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L1053
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1053
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1053
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L377
.L1053:
	movss	xmm0, DWORD PTR proposed11[rip]
	movss	xmm1, DWORD PTR _x_proposed11[rip]
	ucomiss	xmm0, xmm1
	jp	.L1055
	ucomiss	xmm0, xmm1
	jne	.L1055
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L1055
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L1055
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L1055
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L1055
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L1055
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1055
	movss	xmm0, DWORD PTR p11_c[rip]
	movss	xmm1, DWORD PTR _x_p11_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1055
	ucomiss	xmm0, xmm1
	je	.L1057
.L1055:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	je	.L1057
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L1057
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L1057
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L1057
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1057
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1057
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L377
.L1057:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	je	.L1059
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L1059
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L1059
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L1060
.L1059:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L1061
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L1061
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L1061
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L1060
.L1061:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L1062
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L1062
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L1062
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L1060
.L1062:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L1063
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L1063
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L1063
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L1060
.L1063:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L1064
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L1064
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L1064
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L1060
.L1064:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L1065
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L1065
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L1065
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L1060
.L1065:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L1066
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L1066
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L1066
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L1060
.L1066:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L1067
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L1067
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L1067
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L1060
.L1067:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L377
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L377
.L1060:
	movss	xmm1, DWORD PTR _x_p10_c[rip]
	movss	xmm0, DWORD PTR _x_proposed10[rip]
	comiss	xmm0, xmm1
	jnb	.L1068
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L1069
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L1069
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L1069
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L377
.L1069:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L1070
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L1070
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L1070
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L377
.L1070:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L1071
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L1071
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L1071
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L377
.L1071:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	je	.L1068
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L1068
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L1068
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L377
.L1068:
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1072
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1072
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1072
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1072
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p10_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p10_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L1072
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L1072
	movss	xmm0, DWORD PTR proposed10[rip]
	movss	xmm1, DWORD PTR _x_proposed10[rip]
	ucomiss	xmm0, xmm1
	jp	.L1072
	ucomiss	xmm0, xmm1
	je	.L1074
.L1072:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L377
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	je	.L377
.L1074:
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L1077
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L1077
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L1077
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L1077
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L1077
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1077
	movss	xmm0, DWORD PTR _x_p10_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1077
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1077
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1077
	movss	xmm0, DWORD PTR proposed10[rip]
	movss	xmm1, DWORD PTR _x_proposed10[rip]
	ucomiss	xmm0, xmm1
	jp	.L1077
	ucomiss	xmm0, xmm1
	je	.L1079
.L1077:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L1079
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L1079
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L1079
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L1079
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1079
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1079
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L377
.L1079:
	movss	xmm0, DWORD PTR proposed10[rip]
	movss	xmm1, DWORD PTR _x_proposed10[rip]
	ucomiss	xmm0, xmm1
	jp	.L1081
	ucomiss	xmm0, xmm1
	jne	.L1081
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1081
	movss	xmm0, DWORD PTR _x_p10_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1081
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1081
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L1081
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L1081
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L1081
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L1081
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 11
	je	.L1084
.L1081:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L1084
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L1084
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L1084
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L1084
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1084
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1084
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L377
.L1084:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1085
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1085
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L1086
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L1086
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L1086
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L1087
.L1086:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L1085
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L1085
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L1085
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L1085
.L1087:
	movss	xmm0, DWORD PTR p10_c[rip]
	movss	xmm1, DWORD PTR _x_p10_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1085
	ucomiss	xmm0, xmm1
	je	.L1088
.L1085:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L1088
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L1088
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L1088
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L1088
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1088
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1088
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L377
.L1088:
	movss	xmm0, DWORD PTR proposed10[rip]
	movss	xmm1, DWORD PTR _x_proposed10[rip]
	ucomiss	xmm0, xmm1
	jp	.L1090
	ucomiss	xmm0, xmm1
	jne	.L1090
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 11
	jne	.L1092
.L1090:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1092
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1092
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	je	.L1092
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L1092
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L1092
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L1092
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L1092
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L1092
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L1092
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L1092
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L377
.L1092:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 11
	jne	.L1093
	movss	xmm1, DWORD PTR p10_c[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L1093
	movss	xmm1, DWORD PTR proposed10[rip]
	movss	xmm0, DWORD PTR _x_proposed10[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L1094
.L1093:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1094
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1094
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	je	.L1094
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L1094
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L1094
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L1094
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L1094
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L1094
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L1094
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L1094
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L377
.L1094:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1095
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1095
	movss	xmm0, DWORD PTR proposed10[rip]
	movss	xmm1, DWORD PTR _x_proposed10[rip]
	ucomiss	xmm0, xmm1
	jp	.L1095
	ucomiss	xmm0, xmm1
	jne	.L1095
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L1097
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L1097
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L1097
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L1098
.L1097:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L1095
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L1095
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L1095
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L1098
.L1095:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L1098
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L1098
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L1098
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L1098
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1098
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1098
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L377
.L1098:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L1099
	movss	xmm0, DWORD PTR p10_c[rip]
	movss	xmm1, DWORD PTR _x_p10_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1099
	ucomiss	xmm0, xmm1
	je	.L1100
.L1099:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1100
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1100
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	je	.L1100
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L1100
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L1100
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L1100
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L1100
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L1100
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L1100
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L1100
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L377
.L1100:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L1102
	movss	xmm0, DWORD PTR _x_p10_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1102
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1103
.L1102:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1103
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1103
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	je	.L1103
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L1103
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L1103
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L1103
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L1103
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L1103
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L1103
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L1103
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L377
.L1103:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1105
	movss	xmm0, DWORD PTR proposed10[rip]
	movss	xmm1, DWORD PTR _x_proposed10[rip]
	ucomiss	xmm0, xmm1
	jp	.L1105
	ucomiss	xmm0, xmm1
	jne	.L1105
	movss	xmm0, DWORD PTR _x_p10_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1105
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1105
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L1105
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L1105
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L1105
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L1105
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L1108
.L1105:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L1108
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L1108
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L1108
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L1108
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1108
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1108
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L377
.L1108:
	movss	xmm0, DWORD PTR proposed10[rip]
	movss	xmm1, DWORD PTR _x_proposed10[rip]
	ucomiss	xmm0, xmm1
	jp	.L1109
	ucomiss	xmm0, xmm1
	jne	.L1109
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1109
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1109
	movss	xmm0, DWORD PTR p10_c[rip]
	movss	xmm1, DWORD PTR _x_p10_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1109
	ucomiss	xmm0, xmm1
	jne	.L1109
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L1112
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L1112
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L1112
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L1113
.L1112:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L1109
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L1109
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L1109
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L1113
.L1109:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L1113
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L1113
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L1113
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L1113
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1113
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1113
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L377
.L1113:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 11
	jne	.L1114
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1114
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1114
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	je	.L1114
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L1114
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L1114
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L1114
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L1114
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L1114
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L1114
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L1114
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L377
.L1114:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 11
	je	.L1115
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1115
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1115
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	je	.L1115
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L1115
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L1115
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L1115
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L1115
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L1115
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L1115
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L1115
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L377
.L1115:
	movss	xmm0, DWORD PTR proposed10[rip]
	movss	xmm1, DWORD PTR _x_proposed10[rip]
	ucomiss	xmm0, xmm1
	jp	.L1116
	ucomiss	xmm0, xmm1
	jne	.L1116
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1116
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1116
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L1116
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L1116
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L1116
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L1116
	movss	xmm0, DWORD PTR _x_p10_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1116
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1118
.L1116:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L1118
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L1118
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L1118
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L1118
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1118
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1118
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L377
.L1118:
	movss	xmm0, DWORD PTR proposed10[rip]
	movss	xmm1, DWORD PTR _x_proposed10[rip]
	ucomiss	xmm0, xmm1
	jp	.L1120
	ucomiss	xmm0, xmm1
	jne	.L1120
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L1120
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	je	.L1120
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L1120
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L1120
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L1120
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1120
	movss	xmm0, DWORD PTR _x_p10_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1120
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1122
.L1120:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L1122
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L1122
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L1122
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L1122
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1122
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1122
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L377
.L1122:
	movss	xmm0, DWORD PTR proposed10[rip]
	movss	xmm1, DWORD PTR _x_proposed10[rip]
	ucomiss	xmm0, xmm1
	jp	.L1124
	ucomiss	xmm0, xmm1
	jne	.L1124
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L1124
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L1124
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L1124
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L1124
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L1124
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1124
	movss	xmm0, DWORD PTR p10_c[rip]
	movss	xmm1, DWORD PTR _x_p10_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1124
	ucomiss	xmm0, xmm1
	je	.L1126
.L1124:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	je	.L1126
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L1126
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L1126
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L1126
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1126
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1126
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L377
.L1126:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	je	.L1128
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L1128
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L1128
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L1129
.L1128:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L1130
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L1130
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L1130
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L1129
.L1130:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L1131
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L1131
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L1131
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L1129
.L1131:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L1132
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L1132
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L1132
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L1129
.L1132:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L1133
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L1133
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L1133
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L1129
.L1133:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L1134
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L1134
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L1134
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L1129
.L1134:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L1135
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L1135
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L1135
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L1129
.L1135:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L1136
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L1136
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L1136
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L1129
.L1136:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L377
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L377
.L1129:
	movss	xmm1, DWORD PTR _x_p9_c[rip]
	movss	xmm0, DWORD PTR _x_proposed9[rip]
	comiss	xmm0, xmm1
	jnb	.L1137
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L1138
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L1138
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L1138
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L377
.L1138:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L1139
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L1139
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L1139
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L377
.L1139:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L1140
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L1140
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L1140
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L377
.L1140:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	je	.L1137
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L1137
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L1137
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L377
.L1137:
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1141
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1141
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1141
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1141
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p9_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p9_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L1141
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L1141
	movss	xmm0, DWORD PTR proposed9[rip]
	movss	xmm1, DWORD PTR _x_proposed9[rip]
	ucomiss	xmm0, xmm1
	jp	.L1141
	ucomiss	xmm0, xmm1
	je	.L1143
.L1141:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L377
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	je	.L377
.L1143:
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L1146
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L1146
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L1146
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L1146
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L1146
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1146
	movss	xmm0, DWORD PTR _x_p9_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1146
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1146
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1146
	movss	xmm0, DWORD PTR proposed9[rip]
	movss	xmm1, DWORD PTR _x_proposed9[rip]
	ucomiss	xmm0, xmm1
	jp	.L1146
	ucomiss	xmm0, xmm1
	je	.L1148
.L1146:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L1148
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L1148
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L1148
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L1148
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1148
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1148
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L377
.L1148:
	movss	xmm0, DWORD PTR proposed9[rip]
	movss	xmm1, DWORD PTR _x_proposed9[rip]
	ucomiss	xmm0, xmm1
	jp	.L1150
	ucomiss	xmm0, xmm1
	jne	.L1150
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1150
	movss	xmm0, DWORD PTR _x_p9_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1150
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1150
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L1150
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L1150
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L1150
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L1150
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 10
	je	.L1153
.L1150:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L1153
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L1153
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L1153
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L1153
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1153
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1153
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L377
.L1153:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1154
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1154
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L1155
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L1155
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L1155
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L1156
.L1155:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L1154
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L1154
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L1154
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L1154
.L1156:
	movss	xmm0, DWORD PTR p9_c[rip]
	movss	xmm1, DWORD PTR _x_p9_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1154
	ucomiss	xmm0, xmm1
	je	.L1157
.L1154:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L1157
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L1157
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L1157
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L1157
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1157
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1157
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L377
.L1157:
	movss	xmm0, DWORD PTR proposed9[rip]
	movss	xmm1, DWORD PTR _x_proposed9[rip]
	ucomiss	xmm0, xmm1
	jp	.L1159
	ucomiss	xmm0, xmm1
	jne	.L1159
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 10
	jne	.L1161
.L1159:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1161
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1161
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	je	.L1161
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L1161
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L1161
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L1161
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L1161
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L1161
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L1161
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L1161
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L377
.L1161:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 10
	jne	.L1162
	movss	xmm1, DWORD PTR p9_c[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L1162
	movss	xmm1, DWORD PTR proposed9[rip]
	movss	xmm0, DWORD PTR _x_proposed9[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L1163
.L1162:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1163
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1163
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	je	.L1163
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L1163
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L1163
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L1163
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L1163
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L1163
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L1163
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L1163
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L377
.L1163:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1164
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1164
	movss	xmm0, DWORD PTR proposed9[rip]
	movss	xmm1, DWORD PTR _x_proposed9[rip]
	ucomiss	xmm0, xmm1
	jp	.L1164
	ucomiss	xmm0, xmm1
	jne	.L1164
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L1166
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L1166
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L1166
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L1167
.L1166:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L1164
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L1164
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L1164
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L1167
.L1164:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L1167
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L1167
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L1167
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L1167
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1167
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1167
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L377
.L1167:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L1168
	movss	xmm0, DWORD PTR p9_c[rip]
	movss	xmm1, DWORD PTR _x_p9_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1168
	ucomiss	xmm0, xmm1
	je	.L1169
.L1168:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1169
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1169
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	je	.L1169
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L1169
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L1169
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L1169
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L1169
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L1169
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L1169
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L1169
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L377
.L1169:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L1171
	movss	xmm0, DWORD PTR _x_p9_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1171
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1172
.L1171:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1172
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1172
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	je	.L1172
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L1172
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L1172
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L1172
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L1172
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L1172
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L1172
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L1172
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L377
.L1172:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1174
	movss	xmm0, DWORD PTR proposed9[rip]
	movss	xmm1, DWORD PTR _x_proposed9[rip]
	ucomiss	xmm0, xmm1
	jp	.L1174
	ucomiss	xmm0, xmm1
	jne	.L1174
	movss	xmm0, DWORD PTR _x_p9_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1174
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1174
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L1174
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L1174
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L1174
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L1174
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L1177
.L1174:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L1177
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L1177
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L1177
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L1177
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1177
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1177
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L377
.L1177:
	movss	xmm0, DWORD PTR proposed9[rip]
	movss	xmm1, DWORD PTR _x_proposed9[rip]
	ucomiss	xmm0, xmm1
	jp	.L1178
	ucomiss	xmm0, xmm1
	jne	.L1178
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1178
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1178
	movss	xmm0, DWORD PTR p9_c[rip]
	movss	xmm1, DWORD PTR _x_p9_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1178
	ucomiss	xmm0, xmm1
	jne	.L1178
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L1181
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L1181
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L1181
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L1182
.L1181:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L1178
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L1178
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L1178
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L1182
.L1178:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L1182
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L1182
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L1182
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L1182
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1182
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1182
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L377
.L1182:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 10
	jne	.L1183
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1183
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1183
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	je	.L1183
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L1183
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L1183
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L1183
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L1183
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L1183
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L1183
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L1183
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L377
.L1183:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 10
	je	.L1184
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1184
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1184
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	je	.L1184
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L1184
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L1184
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L1184
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L1184
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L1184
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L1184
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L1184
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L377
.L1184:
	movss	xmm0, DWORD PTR proposed9[rip]
	movss	xmm1, DWORD PTR _x_proposed9[rip]
	ucomiss	xmm0, xmm1
	jp	.L1185
	ucomiss	xmm0, xmm1
	jne	.L1185
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1185
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1185
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L1185
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L1185
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L1185
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L1185
	movss	xmm0, DWORD PTR _x_p9_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1185
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1187
.L1185:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L1187
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L1187
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L1187
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L1187
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1187
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1187
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L377
.L1187:
	movss	xmm0, DWORD PTR proposed9[rip]
	movss	xmm1, DWORD PTR _x_proposed9[rip]
	ucomiss	xmm0, xmm1
	jp	.L1189
	ucomiss	xmm0, xmm1
	jne	.L1189
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L1189
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	je	.L1189
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L1189
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L1189
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L1189
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1189
	movss	xmm0, DWORD PTR _x_p9_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1189
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1191
.L1189:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L1191
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L1191
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L1191
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L1191
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1191
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1191
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L377
.L1191:
	movss	xmm0, DWORD PTR proposed9[rip]
	movss	xmm1, DWORD PTR _x_proposed9[rip]
	ucomiss	xmm0, xmm1
	jp	.L1193
	ucomiss	xmm0, xmm1
	jne	.L1193
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L1193
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L1193
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L1193
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L1193
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L1193
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1193
	movss	xmm0, DWORD PTR p9_c[rip]
	movss	xmm1, DWORD PTR _x_p9_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1193
	ucomiss	xmm0, xmm1
	je	.L1195
.L1193:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	je	.L1195
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L1195
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L1195
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L1195
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1195
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1195
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L377
.L1195:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	je	.L1197
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L1197
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L1197
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L1198
.L1197:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L1199
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L1199
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L1199
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L1198
.L1199:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L1200
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L1200
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L1200
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L1198
.L1200:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L1201
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L1201
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L1201
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L1198
.L1201:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L1202
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L1202
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L1202
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L1198
.L1202:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L1203
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L1203
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L1203
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L1198
.L1203:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L1204
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L1204
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L1204
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L1198
.L1204:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L1205
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L1205
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L1205
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L1198
.L1205:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L377
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L377
.L1198:
	movss	xmm1, DWORD PTR _x_p8_c[rip]
	movss	xmm0, DWORD PTR _x_proposed8[rip]
	comiss	xmm0, xmm1
	jnb	.L1206
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L1207
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L1207
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L1207
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L377
.L1207:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L1208
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L1208
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L1208
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L377
.L1208:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L1209
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L1209
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L1209
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L377
.L1209:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	je	.L1206
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L1206
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L1206
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L377
.L1206:
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1210
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1210
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1210
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1210
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p8_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p8_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L1210
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L1210
	movss	xmm0, DWORD PTR proposed8[rip]
	movss	xmm1, DWORD PTR _x_proposed8[rip]
	ucomiss	xmm0, xmm1
	jp	.L1210
	ucomiss	xmm0, xmm1
	je	.L1212
.L1210:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L377
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	je	.L377
.L1212:
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L1215
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L1215
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L1215
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L1215
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L1215
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1215
	movss	xmm0, DWORD PTR _x_p8_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1215
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1215
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1215
	movss	xmm0, DWORD PTR proposed8[rip]
	movss	xmm1, DWORD PTR _x_proposed8[rip]
	ucomiss	xmm0, xmm1
	jp	.L1215
	ucomiss	xmm0, xmm1
	je	.L1217
.L1215:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L1217
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L1217
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L1217
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L1217
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1217
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1217
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L377
.L1217:
	movss	xmm0, DWORD PTR proposed8[rip]
	movss	xmm1, DWORD PTR _x_proposed8[rip]
	ucomiss	xmm0, xmm1
	jp	.L1219
	ucomiss	xmm0, xmm1
	jne	.L1219
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1219
	movss	xmm0, DWORD PTR _x_p8_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1219
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1219
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L1219
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L1219
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L1219
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L1219
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 9
	je	.L1222
.L1219:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L1222
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L1222
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L1222
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L1222
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1222
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1222
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L377
.L1222:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1223
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1223
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L1224
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L1224
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L1224
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L1225
.L1224:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L1223
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L1223
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L1223
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L1223
.L1225:
	movss	xmm0, DWORD PTR p8_c[rip]
	movss	xmm1, DWORD PTR _x_p8_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1223
	ucomiss	xmm0, xmm1
	je	.L1226
.L1223:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L1226
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L1226
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L1226
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L1226
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1226
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1226
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L377
.L1226:
	movss	xmm0, DWORD PTR proposed8[rip]
	movss	xmm1, DWORD PTR _x_proposed8[rip]
	ucomiss	xmm0, xmm1
	jp	.L1228
	ucomiss	xmm0, xmm1
	jne	.L1228
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 9
	jne	.L1230
.L1228:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1230
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1230
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	je	.L1230
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L1230
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L1230
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L1230
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L1230
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L1230
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L1230
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L1230
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L377
.L1230:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 9
	jne	.L1231
	movss	xmm1, DWORD PTR p8_c[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L1231
	movss	xmm1, DWORD PTR proposed8[rip]
	movss	xmm0, DWORD PTR _x_proposed8[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L1232
.L1231:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1232
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1232
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	je	.L1232
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L1232
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L1232
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L1232
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L1232
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L1232
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L1232
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L1232
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L377
.L1232:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1233
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1233
	movss	xmm0, DWORD PTR proposed8[rip]
	movss	xmm1, DWORD PTR _x_proposed8[rip]
	ucomiss	xmm0, xmm1
	jp	.L1233
	ucomiss	xmm0, xmm1
	jne	.L1233
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L1235
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L1235
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L1235
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L1236
.L1235:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L1233
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L1233
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L1233
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L1236
.L1233:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L1236
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L1236
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L1236
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L1236
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1236
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1236
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L377
.L1236:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L1237
	movss	xmm0, DWORD PTR p8_c[rip]
	movss	xmm1, DWORD PTR _x_p8_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1237
	ucomiss	xmm0, xmm1
	je	.L1238
.L1237:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1238
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1238
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	je	.L1238
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L1238
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L1238
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L1238
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L1238
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L1238
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L1238
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L1238
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L377
.L1238:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L1240
	movss	xmm0, DWORD PTR _x_p8_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1240
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1241
.L1240:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1241
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1241
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	je	.L1241
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L1241
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L1241
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L1241
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L1241
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L1241
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L1241
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L1241
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L377
.L1241:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1243
	movss	xmm0, DWORD PTR proposed8[rip]
	movss	xmm1, DWORD PTR _x_proposed8[rip]
	ucomiss	xmm0, xmm1
	jp	.L1243
	ucomiss	xmm0, xmm1
	jne	.L1243
	movss	xmm0, DWORD PTR _x_p8_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1243
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1243
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L1243
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L1243
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L1243
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L1243
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L1246
.L1243:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L1246
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L1246
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L1246
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L1246
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1246
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1246
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L377
.L1246:
	movss	xmm0, DWORD PTR proposed8[rip]
	movss	xmm1, DWORD PTR _x_proposed8[rip]
	ucomiss	xmm0, xmm1
	jp	.L1247
	ucomiss	xmm0, xmm1
	jne	.L1247
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1247
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1247
	movss	xmm0, DWORD PTR p8_c[rip]
	movss	xmm1, DWORD PTR _x_p8_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1247
	ucomiss	xmm0, xmm1
	jne	.L1247
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L1250
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L1250
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L1250
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L1251
.L1250:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L1247
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L1247
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L1247
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L1251
.L1247:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L1251
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L1251
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L1251
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L1251
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1251
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1251
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L377
.L1251:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 9
	jne	.L1252
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1252
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1252
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	je	.L1252
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L1252
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L1252
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L1252
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L1252
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L1252
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L1252
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L1252
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L377
.L1252:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 9
	je	.L1253
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1253
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1253
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	je	.L1253
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L1253
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L1253
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L1253
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L1253
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L1253
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L1253
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L1253
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L377
.L1253:
	movss	xmm0, DWORD PTR proposed8[rip]
	movss	xmm1, DWORD PTR _x_proposed8[rip]
	ucomiss	xmm0, xmm1
	jp	.L1254
	ucomiss	xmm0, xmm1
	jne	.L1254
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1254
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1254
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L1254
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L1254
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L1254
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L1254
	movss	xmm0, DWORD PTR _x_p8_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1254
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1256
.L1254:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L1256
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L1256
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L1256
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L1256
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1256
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1256
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L377
.L1256:
	movss	xmm0, DWORD PTR proposed8[rip]
	movss	xmm1, DWORD PTR _x_proposed8[rip]
	ucomiss	xmm0, xmm1
	jp	.L1258
	ucomiss	xmm0, xmm1
	jne	.L1258
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L1258
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	je	.L1258
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L1258
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L1258
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L1258
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1258
	movss	xmm0, DWORD PTR _x_p8_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1258
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1260
.L1258:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L1260
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L1260
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L1260
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L1260
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1260
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1260
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L377
.L1260:
	movss	xmm0, DWORD PTR proposed8[rip]
	movss	xmm1, DWORD PTR _x_proposed8[rip]
	ucomiss	xmm0, xmm1
	jp	.L1262
	ucomiss	xmm0, xmm1
	jne	.L1262
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L1262
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L1262
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L1262
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L1262
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L1262
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1262
	movss	xmm0, DWORD PTR p8_c[rip]
	movss	xmm1, DWORD PTR _x_p8_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1262
	ucomiss	xmm0, xmm1
	je	.L1264
.L1262:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	je	.L1264
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L1264
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L1264
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L1264
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1264
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1264
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L377
.L1264:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	je	.L1266
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L1266
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L1266
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L1267
.L1266:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L1268
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L1268
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L1268
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L1267
.L1268:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L1269
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L1269
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L1269
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L1267
.L1269:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L1270
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L1270
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L1270
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L1267
.L1270:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L1271
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L1271
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L1271
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L1267
.L1271:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L1272
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L1272
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L1272
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L1267
.L1272:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L1273
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L1273
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L1273
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L1267
.L1273:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L1274
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L1274
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L1274
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L1267
.L1274:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L377
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L377
.L1267:
	movss	xmm1, DWORD PTR _x_p7_c[rip]
	movss	xmm0, DWORD PTR _x_proposed7[rip]
	comiss	xmm0, xmm1
	jnb	.L1275
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L1276
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L1276
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L1276
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L377
.L1276:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L1277
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L1277
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L1277
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L377
.L1277:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L1278
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L1278
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L1278
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L377
.L1278:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	je	.L1275
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L1275
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L1275
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L377
.L1275:
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1279
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1279
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1279
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1279
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p7_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p7_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L1279
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L1279
	movss	xmm0, DWORD PTR proposed7[rip]
	movss	xmm1, DWORD PTR _x_proposed7[rip]
	ucomiss	xmm0, xmm1
	jp	.L1279
	ucomiss	xmm0, xmm1
	je	.L1281
.L1279:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L377
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	je	.L377
.L1281:
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L1284
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L1284
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L1284
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L1284
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L1284
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1284
	movss	xmm0, DWORD PTR _x_p7_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1284
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1284
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1284
	movss	xmm0, DWORD PTR proposed7[rip]
	movss	xmm1, DWORD PTR _x_proposed7[rip]
	ucomiss	xmm0, xmm1
	jp	.L1284
	ucomiss	xmm0, xmm1
	je	.L1286
.L1284:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L1286
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L1286
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L1286
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L1286
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1286
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1286
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L377
.L1286:
	movss	xmm0, DWORD PTR proposed7[rip]
	movss	xmm1, DWORD PTR _x_proposed7[rip]
	ucomiss	xmm0, xmm1
	jp	.L1288
	ucomiss	xmm0, xmm1
	jne	.L1288
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1288
	movss	xmm0, DWORD PTR _x_p7_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1288
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1288
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L1288
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L1288
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L1288
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L1288
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 8
	je	.L1291
.L1288:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L1291
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L1291
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L1291
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L1291
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1291
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1291
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L377
.L1291:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1292
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1292
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L1293
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L1293
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L1293
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L1294
.L1293:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L1292
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L1292
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L1292
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L1292
.L1294:
	movss	xmm0, DWORD PTR p7_c[rip]
	movss	xmm1, DWORD PTR _x_p7_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1292
	ucomiss	xmm0, xmm1
	je	.L1295
.L1292:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L1295
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L1295
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L1295
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L1295
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1295
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1295
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L377
.L1295:
	movss	xmm0, DWORD PTR proposed7[rip]
	movss	xmm1, DWORD PTR _x_proposed7[rip]
	ucomiss	xmm0, xmm1
	jp	.L1297
	ucomiss	xmm0, xmm1
	jne	.L1297
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 8
	jne	.L1299
.L1297:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1299
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1299
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	je	.L1299
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L1299
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L1299
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L1299
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L1299
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L1299
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L1299
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L1299
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L377
.L1299:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 8
	jne	.L1300
	movss	xmm1, DWORD PTR p7_c[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L1300
	movss	xmm1, DWORD PTR proposed7[rip]
	movss	xmm0, DWORD PTR _x_proposed7[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L1301
.L1300:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1301
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1301
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	je	.L1301
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L1301
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L1301
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L1301
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L1301
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L1301
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L1301
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L1301
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L377
.L1301:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1302
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1302
	movss	xmm0, DWORD PTR proposed7[rip]
	movss	xmm1, DWORD PTR _x_proposed7[rip]
	ucomiss	xmm0, xmm1
	jp	.L1302
	ucomiss	xmm0, xmm1
	jne	.L1302
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L1304
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L1304
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L1304
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L1305
.L1304:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L1302
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L1302
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L1302
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L1305
.L1302:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L1305
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L1305
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L1305
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L1305
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1305
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1305
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L377
.L1305:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L1306
	movss	xmm0, DWORD PTR p7_c[rip]
	movss	xmm1, DWORD PTR _x_p7_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1306
	ucomiss	xmm0, xmm1
	je	.L1307
.L1306:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1307
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1307
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	je	.L1307
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L1307
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L1307
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L1307
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L1307
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L1307
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L1307
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L1307
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L377
.L1307:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L1309
	movss	xmm0, DWORD PTR _x_p7_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1309
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1310
.L1309:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1310
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1310
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	je	.L1310
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L1310
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L1310
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L1310
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L1310
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L1310
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L1310
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L1310
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L377
.L1310:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1312
	movss	xmm0, DWORD PTR proposed7[rip]
	movss	xmm1, DWORD PTR _x_proposed7[rip]
	ucomiss	xmm0, xmm1
	jp	.L1312
	ucomiss	xmm0, xmm1
	jne	.L1312
	movss	xmm0, DWORD PTR _x_p7_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1312
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1312
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L1312
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L1312
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L1312
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L1312
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L1315
.L1312:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L1315
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L1315
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L1315
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L1315
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1315
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1315
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L377
.L1315:
	movss	xmm0, DWORD PTR proposed7[rip]
	movss	xmm1, DWORD PTR _x_proposed7[rip]
	ucomiss	xmm0, xmm1
	jp	.L1316
	ucomiss	xmm0, xmm1
	jne	.L1316
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1316
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1316
	movss	xmm0, DWORD PTR p7_c[rip]
	movss	xmm1, DWORD PTR _x_p7_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1316
	ucomiss	xmm0, xmm1
	jne	.L1316
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L1319
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L1319
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L1319
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L1320
.L1319:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L1316
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L1316
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L1316
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L1320
.L1316:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L1320
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L1320
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L1320
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L1320
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1320
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1320
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L377
.L1320:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 8
	jne	.L1321
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1321
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1321
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	je	.L1321
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L1321
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L1321
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L1321
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L1321
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L1321
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L1321
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L1321
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L377
.L1321:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 8
	je	.L1322
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1322
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1322
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	je	.L1322
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L1322
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L1322
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L1322
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L1322
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L1322
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L1322
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L1322
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L377
.L1322:
	movss	xmm0, DWORD PTR proposed7[rip]
	movss	xmm1, DWORD PTR _x_proposed7[rip]
	ucomiss	xmm0, xmm1
	jp	.L1323
	ucomiss	xmm0, xmm1
	jne	.L1323
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1323
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1323
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L1323
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L1323
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L1323
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L1323
	movss	xmm0, DWORD PTR _x_p7_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1323
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1325
.L1323:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L1325
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L1325
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L1325
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L1325
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1325
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1325
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L377
.L1325:
	movss	xmm0, DWORD PTR proposed7[rip]
	movss	xmm1, DWORD PTR _x_proposed7[rip]
	ucomiss	xmm0, xmm1
	jp	.L1327
	ucomiss	xmm0, xmm1
	jne	.L1327
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L1327
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	je	.L1327
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L1327
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L1327
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L1327
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1327
	movss	xmm0, DWORD PTR _x_p7_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1327
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1329
.L1327:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L1329
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L1329
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L1329
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L1329
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1329
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1329
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L377
.L1329:
	movss	xmm0, DWORD PTR proposed7[rip]
	movss	xmm1, DWORD PTR _x_proposed7[rip]
	ucomiss	xmm0, xmm1
	jp	.L1331
	ucomiss	xmm0, xmm1
	jne	.L1331
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L1331
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L1331
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L1331
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L1331
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L1331
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1331
	movss	xmm0, DWORD PTR p7_c[rip]
	movss	xmm1, DWORD PTR _x_p7_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1331
	ucomiss	xmm0, xmm1
	je	.L1333
.L1331:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	je	.L1333
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L1333
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L1333
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L1333
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1333
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1333
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L377
.L1333:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	je	.L1335
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L1335
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L1335
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L1336
.L1335:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L1337
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L1337
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L1337
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L1336
.L1337:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L1338
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L1338
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L1338
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L1336
.L1338:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L1339
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L1339
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L1339
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L1336
.L1339:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L1340
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L1340
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L1340
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L1336
.L1340:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L1341
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L1341
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L1341
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L1336
.L1341:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L1342
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L1342
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L1342
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L1336
.L1342:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L1343
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L1343
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L1343
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L1336
.L1343:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L377
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L377
.L1336:
	movss	xmm1, DWORD PTR _x_p6_c[rip]
	movss	xmm0, DWORD PTR _x_proposed6[rip]
	comiss	xmm0, xmm1
	jnb	.L1344
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L1345
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L1345
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L1345
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L377
.L1345:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L1346
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L1346
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L1346
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L377
.L1346:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L1347
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L1347
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L1347
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L377
.L1347:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	je	.L1344
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L1344
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L1344
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L377
.L1344:
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1348
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1348
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1348
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1348
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p6_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p6_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L1348
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L1348
	movss	xmm0, DWORD PTR proposed6[rip]
	movss	xmm1, DWORD PTR _x_proposed6[rip]
	ucomiss	xmm0, xmm1
	jp	.L1348
	ucomiss	xmm0, xmm1
	je	.L1350
.L1348:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L377
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	je	.L377
.L1350:
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L1353
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L1353
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L1353
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L1353
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L1353
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1353
	movss	xmm0, DWORD PTR _x_p6_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1353
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1353
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1353
	movss	xmm0, DWORD PTR proposed6[rip]
	movss	xmm1, DWORD PTR _x_proposed6[rip]
	ucomiss	xmm0, xmm1
	jp	.L1353
	ucomiss	xmm0, xmm1
	je	.L1355
.L1353:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L1355
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L1355
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L1355
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L1355
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1355
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1355
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L377
.L1355:
	movss	xmm0, DWORD PTR proposed6[rip]
	movss	xmm1, DWORD PTR _x_proposed6[rip]
	ucomiss	xmm0, xmm1
	jp	.L1357
	ucomiss	xmm0, xmm1
	jne	.L1357
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1357
	movss	xmm0, DWORD PTR _x_p6_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1357
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1357
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L1357
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L1357
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L1357
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L1357
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 7
	je	.L1360
.L1357:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L1360
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L1360
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L1360
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L1360
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1360
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1360
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L377
.L1360:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1361
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1361
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L1362
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L1362
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L1362
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L1363
.L1362:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L1361
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L1361
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L1361
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L1361
.L1363:
	movss	xmm0, DWORD PTR p6_c[rip]
	movss	xmm1, DWORD PTR _x_p6_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1361
	ucomiss	xmm0, xmm1
	je	.L1364
.L1361:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L1364
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L1364
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L1364
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L1364
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1364
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1364
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L377
.L1364:
	movss	xmm0, DWORD PTR proposed6[rip]
	movss	xmm1, DWORD PTR _x_proposed6[rip]
	ucomiss	xmm0, xmm1
	jp	.L1366
	ucomiss	xmm0, xmm1
	jne	.L1366
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 7
	jne	.L1368
.L1366:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1368
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1368
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	je	.L1368
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L1368
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L1368
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L1368
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L1368
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L1368
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L1368
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L1368
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L377
.L1368:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 7
	jne	.L1369
	movss	xmm1, DWORD PTR p6_c[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L1369
	movss	xmm1, DWORD PTR proposed6[rip]
	movss	xmm0, DWORD PTR _x_proposed6[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L1370
.L1369:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1370
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1370
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	je	.L1370
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L1370
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L1370
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L1370
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L1370
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L1370
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L1370
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L1370
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L377
.L1370:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1371
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1371
	movss	xmm0, DWORD PTR proposed6[rip]
	movss	xmm1, DWORD PTR _x_proposed6[rip]
	ucomiss	xmm0, xmm1
	jp	.L1371
	ucomiss	xmm0, xmm1
	jne	.L1371
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L1373
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L1373
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L1373
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L1374
.L1373:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L1371
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L1371
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L1371
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L1374
.L1371:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L1374
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L1374
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L1374
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L1374
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1374
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1374
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L377
.L1374:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L1375
	movss	xmm0, DWORD PTR p6_c[rip]
	movss	xmm1, DWORD PTR _x_p6_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1375
	ucomiss	xmm0, xmm1
	je	.L1376
.L1375:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1376
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1376
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	je	.L1376
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L1376
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L1376
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L1376
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L1376
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L1376
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L1376
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L1376
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L377
.L1376:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L1378
	movss	xmm0, DWORD PTR _x_p6_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1378
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1379
.L1378:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1379
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1379
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	je	.L1379
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L1379
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L1379
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L1379
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L1379
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L1379
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L1379
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L1379
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L377
.L1379:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1381
	movss	xmm0, DWORD PTR proposed6[rip]
	movss	xmm1, DWORD PTR _x_proposed6[rip]
	ucomiss	xmm0, xmm1
	jp	.L1381
	ucomiss	xmm0, xmm1
	jne	.L1381
	movss	xmm0, DWORD PTR _x_p6_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1381
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1381
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L1381
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L1381
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L1381
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L1381
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L1384
.L1381:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L1384
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L1384
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L1384
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L1384
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1384
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1384
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L377
.L1384:
	movss	xmm0, DWORD PTR proposed6[rip]
	movss	xmm1, DWORD PTR _x_proposed6[rip]
	ucomiss	xmm0, xmm1
	jp	.L1385
	ucomiss	xmm0, xmm1
	jne	.L1385
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1385
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1385
	movss	xmm0, DWORD PTR p6_c[rip]
	movss	xmm1, DWORD PTR _x_p6_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1385
	ucomiss	xmm0, xmm1
	jne	.L1385
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L1388
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L1388
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L1388
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L1389
.L1388:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L1385
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L1385
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L1385
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L1389
.L1385:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L1389
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L1389
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L1389
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L1389
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1389
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1389
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L377
.L1389:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 7
	jne	.L1390
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1390
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1390
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	je	.L1390
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L1390
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L1390
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L1390
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L1390
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L1390
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L1390
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L1390
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L377
.L1390:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 7
	je	.L1391
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1391
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1391
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	je	.L1391
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L1391
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L1391
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L1391
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L1391
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L1391
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L1391
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L1391
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L377
.L1391:
	movss	xmm0, DWORD PTR proposed6[rip]
	movss	xmm1, DWORD PTR _x_proposed6[rip]
	ucomiss	xmm0, xmm1
	jp	.L1392
	ucomiss	xmm0, xmm1
	jne	.L1392
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1392
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1392
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L1392
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L1392
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L1392
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L1392
	movss	xmm0, DWORD PTR _x_p6_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1392
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1394
.L1392:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L1394
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L1394
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L1394
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L1394
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1394
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1394
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L377
.L1394:
	movss	xmm0, DWORD PTR proposed6[rip]
	movss	xmm1, DWORD PTR _x_proposed6[rip]
	ucomiss	xmm0, xmm1
	jp	.L1396
	ucomiss	xmm0, xmm1
	jne	.L1396
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L1396
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	je	.L1396
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L1396
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L1396
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L1396
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1396
	movss	xmm0, DWORD PTR _x_p6_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1396
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1398
.L1396:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L1398
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L1398
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L1398
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L1398
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1398
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1398
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L377
.L1398:
	movss	xmm0, DWORD PTR proposed6[rip]
	movss	xmm1, DWORD PTR _x_proposed6[rip]
	ucomiss	xmm0, xmm1
	jp	.L1400
	ucomiss	xmm0, xmm1
	jne	.L1400
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L1400
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L1400
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L1400
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L1400
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L1400
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1400
	movss	xmm0, DWORD PTR p6_c[rip]
	movss	xmm1, DWORD PTR _x_p6_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1400
	ucomiss	xmm0, xmm1
	je	.L1402
.L1400:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	je	.L1402
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L1402
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L1402
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L1402
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1402
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1402
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L377
.L1402:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	je	.L1404
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L1404
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L1404
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L1405
.L1404:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L1406
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L1406
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L1406
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L1405
.L1406:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L1407
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L1407
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L1407
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L1405
.L1407:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L1408
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L1408
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L1408
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L1405
.L1408:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L1409
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L1409
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L1409
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L1405
.L1409:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L1410
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L1410
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L1410
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L1405
.L1410:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L1411
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L1411
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L1411
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L1405
.L1411:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L1412
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L1412
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L1412
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L1405
.L1412:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L377
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L377
.L1405:
	movss	xmm1, DWORD PTR _x_p5_c[rip]
	movss	xmm0, DWORD PTR _x_proposed5[rip]
	comiss	xmm0, xmm1
	jnb	.L1413
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L1414
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L1414
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L1414
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L377
.L1414:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L1415
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L1415
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L1415
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L377
.L1415:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L1416
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L1416
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L1416
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L377
.L1416:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	je	.L1413
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L1413
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L1413
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L377
.L1413:
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1417
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1417
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1417
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1417
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p5_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p5_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L1417
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L1417
	movss	xmm0, DWORD PTR proposed5[rip]
	movss	xmm1, DWORD PTR _x_proposed5[rip]
	ucomiss	xmm0, xmm1
	jp	.L1417
	ucomiss	xmm0, xmm1
	je	.L1419
.L1417:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L377
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	je	.L377
.L1419:
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L1422
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L1422
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L1422
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L1422
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L1422
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1422
	movss	xmm0, DWORD PTR _x_p5_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1422
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1422
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1422
	movss	xmm0, DWORD PTR proposed5[rip]
	movss	xmm1, DWORD PTR _x_proposed5[rip]
	ucomiss	xmm0, xmm1
	jp	.L1422
	ucomiss	xmm0, xmm1
	je	.L1424
.L1422:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L1424
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L1424
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L1424
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L1424
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1424
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1424
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L377
.L1424:
	movss	xmm0, DWORD PTR proposed5[rip]
	movss	xmm1, DWORD PTR _x_proposed5[rip]
	ucomiss	xmm0, xmm1
	jp	.L1426
	ucomiss	xmm0, xmm1
	jne	.L1426
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1426
	movss	xmm0, DWORD PTR _x_p5_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1426
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1426
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L1426
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L1426
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L1426
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L1426
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 6
	je	.L1429
.L1426:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L1429
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L1429
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L1429
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L1429
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1429
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1429
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L377
.L1429:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1430
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1430
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L1431
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L1431
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L1431
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L1432
.L1431:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L1430
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L1430
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L1430
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L1430
.L1432:
	movss	xmm0, DWORD PTR p5_c[rip]
	movss	xmm1, DWORD PTR _x_p5_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1430
	ucomiss	xmm0, xmm1
	je	.L1433
.L1430:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L1433
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L1433
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L1433
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L1433
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1433
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1433
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L377
.L1433:
	movss	xmm0, DWORD PTR proposed5[rip]
	movss	xmm1, DWORD PTR _x_proposed5[rip]
	ucomiss	xmm0, xmm1
	jp	.L1435
	ucomiss	xmm0, xmm1
	jne	.L1435
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 6
	jne	.L1437
.L1435:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1437
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1437
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	je	.L1437
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L1437
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L1437
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L1437
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L1437
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L1437
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L1437
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L1437
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L377
.L1437:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 6
	jne	.L1438
	movss	xmm1, DWORD PTR p5_c[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L1438
	movss	xmm1, DWORD PTR proposed5[rip]
	movss	xmm0, DWORD PTR _x_proposed5[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L1439
.L1438:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1439
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1439
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	je	.L1439
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L1439
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L1439
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L1439
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L1439
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L1439
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L1439
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L1439
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L377
.L1439:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1440
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1440
	movss	xmm0, DWORD PTR proposed5[rip]
	movss	xmm1, DWORD PTR _x_proposed5[rip]
	ucomiss	xmm0, xmm1
	jp	.L1440
	ucomiss	xmm0, xmm1
	jne	.L1440
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L1442
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L1442
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L1442
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L1443
.L1442:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L1440
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L1440
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L1440
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L1443
.L1440:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L1443
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L1443
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L1443
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L1443
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1443
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1443
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L377
.L1443:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L1444
	movss	xmm0, DWORD PTR p5_c[rip]
	movss	xmm1, DWORD PTR _x_p5_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1444
	ucomiss	xmm0, xmm1
	je	.L1445
.L1444:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1445
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1445
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	je	.L1445
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L1445
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L1445
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L1445
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L1445
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L1445
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L1445
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L1445
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L377
.L1445:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L1447
	movss	xmm0, DWORD PTR _x_p5_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1447
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1448
.L1447:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1448
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1448
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	je	.L1448
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L1448
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L1448
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L1448
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L1448
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L1448
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L1448
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L1448
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L377
.L1448:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1450
	movss	xmm0, DWORD PTR proposed5[rip]
	movss	xmm1, DWORD PTR _x_proposed5[rip]
	ucomiss	xmm0, xmm1
	jp	.L1450
	ucomiss	xmm0, xmm1
	jne	.L1450
	movss	xmm0, DWORD PTR _x_p5_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1450
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1450
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L1450
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L1450
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L1450
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L1450
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L1453
.L1450:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L1453
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L1453
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L1453
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L1453
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1453
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1453
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L377
.L1453:
	movss	xmm0, DWORD PTR proposed5[rip]
	movss	xmm1, DWORD PTR _x_proposed5[rip]
	ucomiss	xmm0, xmm1
	jp	.L1454
	ucomiss	xmm0, xmm1
	jne	.L1454
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1454
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1454
	movss	xmm0, DWORD PTR p5_c[rip]
	movss	xmm1, DWORD PTR _x_p5_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1454
	ucomiss	xmm0, xmm1
	jne	.L1454
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L1457
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L1457
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L1457
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L1458
.L1457:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L1454
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L1454
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L1454
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L1458
.L1454:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L1458
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L1458
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L1458
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L1458
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1458
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1458
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L377
.L1458:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 6
	jne	.L1459
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1459
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1459
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	je	.L1459
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L1459
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L1459
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L1459
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L1459
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L1459
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L1459
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L1459
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L377
.L1459:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 6
	je	.L1460
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1460
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1460
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	je	.L1460
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L1460
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L1460
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L1460
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L1460
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L1460
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L1460
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L1460
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L377
.L1460:
	movss	xmm0, DWORD PTR proposed5[rip]
	movss	xmm1, DWORD PTR _x_proposed5[rip]
	ucomiss	xmm0, xmm1
	jp	.L1461
	ucomiss	xmm0, xmm1
	jne	.L1461
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1461
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1461
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L1461
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L1461
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L1461
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L1461
	movss	xmm0, DWORD PTR _x_p5_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1461
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1463
.L1461:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L1463
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L1463
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L1463
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L1463
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1463
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1463
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L377
.L1463:
	movss	xmm0, DWORD PTR proposed5[rip]
	movss	xmm1, DWORD PTR _x_proposed5[rip]
	ucomiss	xmm0, xmm1
	jp	.L1465
	ucomiss	xmm0, xmm1
	jne	.L1465
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L1465
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	je	.L1465
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L1465
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L1465
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L1465
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1465
	movss	xmm0, DWORD PTR _x_p5_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1465
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1467
.L1465:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L1467
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L1467
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L1467
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L1467
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1467
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1467
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L377
.L1467:
	movss	xmm0, DWORD PTR proposed5[rip]
	movss	xmm1, DWORD PTR _x_proposed5[rip]
	ucomiss	xmm0, xmm1
	jp	.L1469
	ucomiss	xmm0, xmm1
	jne	.L1469
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L1469
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L1469
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L1469
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L1469
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L1469
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1469
	movss	xmm0, DWORD PTR p5_c[rip]
	movss	xmm1, DWORD PTR _x_p5_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1469
	ucomiss	xmm0, xmm1
	je	.L1471
.L1469:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	je	.L1471
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L1471
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L1471
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L1471
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1471
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1471
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L377
.L1471:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	je	.L1473
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L1473
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L1473
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L1474
.L1473:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L1475
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L1475
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L1475
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L1474
.L1475:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L1476
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L1476
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L1476
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L1474
.L1476:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L1477
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L1477
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L1477
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L1474
.L1477:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L1478
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L1478
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L1478
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L1474
.L1478:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L1479
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L1479
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L1479
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L1474
.L1479:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L1480
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L1480
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L1480
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L1474
.L1480:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L1481
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L1481
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L1481
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L1474
.L1481:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L377
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L377
.L1474:
	movss	xmm1, DWORD PTR _x_p4_c[rip]
	movss	xmm0, DWORD PTR _x_proposed4[rip]
	comiss	xmm0, xmm1
	jnb	.L1482
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L1483
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L1483
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L1483
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L377
.L1483:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L1484
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L1484
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L1484
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L377
.L1484:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L1485
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L1485
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L1485
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L377
.L1485:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	je	.L1482
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L1482
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L1482
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L377
.L1482:
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1486
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1486
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1486
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1486
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p4_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p4_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L1486
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L1486
	movss	xmm0, DWORD PTR proposed4[rip]
	movss	xmm1, DWORD PTR _x_proposed4[rip]
	ucomiss	xmm0, xmm1
	jp	.L1486
	ucomiss	xmm0, xmm1
	je	.L1488
.L1486:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L377
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	je	.L377
.L1488:
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L1491
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L1491
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L1491
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L1491
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L1491
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1491
	movss	xmm0, DWORD PTR _x_p4_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1491
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1491
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1491
	movss	xmm0, DWORD PTR proposed4[rip]
	movss	xmm1, DWORD PTR _x_proposed4[rip]
	ucomiss	xmm0, xmm1
	jp	.L1491
	ucomiss	xmm0, xmm1
	je	.L1493
.L1491:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L1493
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L1493
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L1493
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L1493
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1493
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1493
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L377
.L1493:
	movss	xmm0, DWORD PTR proposed4[rip]
	movss	xmm1, DWORD PTR _x_proposed4[rip]
	ucomiss	xmm0, xmm1
	jp	.L1495
	ucomiss	xmm0, xmm1
	jne	.L1495
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1495
	movss	xmm0, DWORD PTR _x_p4_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1495
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1495
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L1495
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L1495
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L1495
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L1495
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 5
	je	.L1498
.L1495:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L1498
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L1498
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L1498
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L1498
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1498
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1498
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L377
.L1498:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1499
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1499
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L1500
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L1500
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L1500
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L1501
.L1500:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L1499
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L1499
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L1499
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L1499
.L1501:
	movss	xmm0, DWORD PTR p4_c[rip]
	movss	xmm1, DWORD PTR _x_p4_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1499
	ucomiss	xmm0, xmm1
	je	.L1502
.L1499:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L1502
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L1502
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L1502
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L1502
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1502
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1502
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L377
.L1502:
	movss	xmm0, DWORD PTR proposed4[rip]
	movss	xmm1, DWORD PTR _x_proposed4[rip]
	ucomiss	xmm0, xmm1
	jp	.L1504
	ucomiss	xmm0, xmm1
	jne	.L1504
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 5
	jne	.L1506
.L1504:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1506
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1506
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	je	.L1506
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L1506
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L1506
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L1506
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L1506
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L1506
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L1506
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L1506
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L377
.L1506:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 5
	jne	.L1507
	movss	xmm1, DWORD PTR p4_c[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L1507
	movss	xmm1, DWORD PTR proposed4[rip]
	movss	xmm0, DWORD PTR _x_proposed4[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L1508
.L1507:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1508
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1508
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	je	.L1508
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L1508
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L1508
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L1508
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L1508
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L1508
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L1508
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L1508
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L377
.L1508:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1509
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1509
	movss	xmm0, DWORD PTR proposed4[rip]
	movss	xmm1, DWORD PTR _x_proposed4[rip]
	ucomiss	xmm0, xmm1
	jp	.L1509
	ucomiss	xmm0, xmm1
	jne	.L1509
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L1511
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L1511
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L1511
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L1512
.L1511:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L1509
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L1509
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L1509
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L1512
.L1509:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L1512
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L1512
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L1512
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L1512
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1512
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1512
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L377
.L1512:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L1513
	movss	xmm0, DWORD PTR p4_c[rip]
	movss	xmm1, DWORD PTR _x_p4_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1513
	ucomiss	xmm0, xmm1
	je	.L1514
.L1513:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1514
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1514
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	je	.L1514
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L1514
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L1514
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L1514
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L1514
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L1514
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L1514
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L1514
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L377
.L1514:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L1516
	movss	xmm0, DWORD PTR _x_p4_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1516
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1517
.L1516:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1517
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1517
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	je	.L1517
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L1517
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L1517
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L1517
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L1517
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L1517
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L1517
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L1517
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L377
.L1517:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1519
	movss	xmm0, DWORD PTR proposed4[rip]
	movss	xmm1, DWORD PTR _x_proposed4[rip]
	ucomiss	xmm0, xmm1
	jp	.L1519
	ucomiss	xmm0, xmm1
	jne	.L1519
	movss	xmm0, DWORD PTR _x_p4_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1519
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1519
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L1519
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L1519
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L1519
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L1519
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L1522
.L1519:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L1522
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L1522
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L1522
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L1522
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1522
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1522
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L377
.L1522:
	movss	xmm0, DWORD PTR proposed4[rip]
	movss	xmm1, DWORD PTR _x_proposed4[rip]
	ucomiss	xmm0, xmm1
	jp	.L1523
	ucomiss	xmm0, xmm1
	jne	.L1523
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1523
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1523
	movss	xmm0, DWORD PTR p4_c[rip]
	movss	xmm1, DWORD PTR _x_p4_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1523
	ucomiss	xmm0, xmm1
	jne	.L1523
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L1526
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L1526
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L1526
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L1527
.L1526:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L1523
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L1523
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L1523
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L1527
.L1523:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L1527
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L1527
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L1527
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L1527
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1527
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1527
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L377
.L1527:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 5
	jne	.L1528
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1528
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1528
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	je	.L1528
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L1528
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L1528
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L1528
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L1528
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L1528
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L1528
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L1528
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L377
.L1528:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 5
	je	.L1529
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1529
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1529
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	je	.L1529
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L1529
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L1529
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L1529
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L1529
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L1529
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L1529
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L1529
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L377
.L1529:
	movss	xmm0, DWORD PTR proposed4[rip]
	movss	xmm1, DWORD PTR _x_proposed4[rip]
	ucomiss	xmm0, xmm1
	jp	.L1530
	ucomiss	xmm0, xmm1
	jne	.L1530
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1530
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1530
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L1530
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L1530
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L1530
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L1530
	movss	xmm0, DWORD PTR _x_p4_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1530
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1532
.L1530:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L1532
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L1532
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L1532
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L1532
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1532
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1532
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L377
.L1532:
	movss	xmm0, DWORD PTR proposed4[rip]
	movss	xmm1, DWORD PTR _x_proposed4[rip]
	ucomiss	xmm0, xmm1
	jp	.L1534
	ucomiss	xmm0, xmm1
	jne	.L1534
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L1534
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	je	.L1534
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L1534
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L1534
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L1534
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1534
	movss	xmm0, DWORD PTR _x_p4_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1534
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1536
.L1534:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L1536
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L1536
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L1536
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L1536
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1536
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1536
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L377
.L1536:
	movss	xmm0, DWORD PTR proposed4[rip]
	movss	xmm1, DWORD PTR _x_proposed4[rip]
	ucomiss	xmm0, xmm1
	jp	.L1538
	ucomiss	xmm0, xmm1
	jne	.L1538
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L1538
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L1538
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L1538
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L1538
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L1538
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1538
	movss	xmm0, DWORD PTR p4_c[rip]
	movss	xmm1, DWORD PTR _x_p4_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1538
	ucomiss	xmm0, xmm1
	je	.L1540
.L1538:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	je	.L1540
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L1540
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L1540
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L1540
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1540
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1540
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L377
.L1540:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	je	.L1542
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1542
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1542
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1543
.L1542:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1544
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L1544
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L1544
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L1543
.L1544:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1545
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L1545
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1545
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L1543
.L1545:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1546
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L1546
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L1546
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1543
.L1546:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1547
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L1547
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1547
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1543
.L1547:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1548
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1548
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L1548
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L1543
.L1548:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1549
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1549
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1549
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L1543
.L1549:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1550
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1550
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1550
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1543
.L1550:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L377
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L377
.L1543:
	movss	xmm1, DWORD PTR _x_p3_c[rip]
	movss	xmm0, DWORD PTR _x_proposed3[rip]
	comiss	xmm0, xmm1
	jnb	.L1551
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1552
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1552
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L1552
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L377
.L1552:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1553
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L1553
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1553
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L377
.L1553:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1554
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L1554
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L1554
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L377
.L1554:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	je	.L1551
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1551
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1551
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L377
.L1551:
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1555
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1555
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1555
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1555
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p3_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p3_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L1555
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L1555
	movss	xmm0, DWORD PTR proposed3[rip]
	movss	xmm1, DWORD PTR _x_proposed3[rip]
	ucomiss	xmm0, xmm1
	jp	.L1555
	ucomiss	xmm0, xmm1
	je	.L1557
.L1555:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L377
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	je	.L377
.L1557:
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L1560
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1560
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1560
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L1560
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L1560
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1560
	movss	xmm0, DWORD PTR _x_p3_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1560
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1560
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1560
	movss	xmm0, DWORD PTR proposed3[rip]
	movss	xmm1, DWORD PTR _x_proposed3[rip]
	ucomiss	xmm0, xmm1
	jp	.L1560
	ucomiss	xmm0, xmm1
	je	.L1562
.L1560:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L1562
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L1562
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L1562
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L1562
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1562
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1562
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L377
.L1562:
	movss	xmm0, DWORD PTR proposed3[rip]
	movss	xmm1, DWORD PTR _x_proposed3[rip]
	ucomiss	xmm0, xmm1
	jp	.L1564
	ucomiss	xmm0, xmm1
	jne	.L1564
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1564
	movss	xmm0, DWORD PTR _x_p3_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1564
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1564
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1564
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1564
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1564
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1564
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 4
	je	.L1567
.L1564:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L1567
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L1567
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L1567
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L1567
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1567
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1567
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L377
.L1567:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1568
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1568
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1569
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1569
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1569
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1570
.L1569:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1568
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1568
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L1568
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1568
.L1570:
	movss	xmm0, DWORD PTR p3_c[rip]
	movss	xmm1, DWORD PTR _x_p3_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1568
	ucomiss	xmm0, xmm1
	je	.L1571
.L1568:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L1571
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L1571
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L1571
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L1571
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1571
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1571
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L377
.L1571:
	movss	xmm0, DWORD PTR proposed3[rip]
	movss	xmm1, DWORD PTR _x_proposed3[rip]
	ucomiss	xmm0, xmm1
	jp	.L1573
	ucomiss	xmm0, xmm1
	jne	.L1573
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 4
	jne	.L1575
.L1573:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1575
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1575
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	je	.L1575
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1575
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1575
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1575
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L1575
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L1575
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L1575
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L1575
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L377
.L1575:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 4
	jne	.L1576
	movss	xmm1, DWORD PTR p3_c[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L1576
	movss	xmm1, DWORD PTR proposed3[rip]
	movss	xmm0, DWORD PTR _x_proposed3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L1577
.L1576:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1577
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1577
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	je	.L1577
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L1577
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L1577
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L1577
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L1577
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1577
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1577
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L1577
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L377
.L1577:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1578
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1578
	movss	xmm0, DWORD PTR proposed3[rip]
	movss	xmm1, DWORD PTR _x_proposed3[rip]
	ucomiss	xmm0, xmm1
	jp	.L1578
	ucomiss	xmm0, xmm1
	jne	.L1578
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1580
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1580
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1580
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1581
.L1580:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1578
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L1578
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1578
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1581
.L1578:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L1581
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L1581
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L1581
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L1581
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1581
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1581
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L377
.L1581:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L1582
	movss	xmm0, DWORD PTR p3_c[rip]
	movss	xmm1, DWORD PTR _x_p3_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1582
	ucomiss	xmm0, xmm1
	je	.L1583
.L1582:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1583
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1583
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	je	.L1583
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1583
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1583
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1583
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L1583
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L1583
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L1583
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L1583
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L377
.L1583:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L1585
	movss	xmm0, DWORD PTR _x_p3_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1585
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1586
.L1585:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1586
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1586
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	je	.L1586
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L1586
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L1586
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L1586
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L1586
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1586
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L1586
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1586
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L377
.L1586:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1588
	movss	xmm0, DWORD PTR proposed3[rip]
	movss	xmm1, DWORD PTR _x_proposed3[rip]
	ucomiss	xmm0, xmm1
	jp	.L1588
	ucomiss	xmm0, xmm1
	jne	.L1588
	movss	xmm0, DWORD PTR _x_p3_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1588
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1588
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L1588
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1588
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L1588
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L1588
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1591
.L1588:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L1591
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L1591
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L1591
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L1591
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1591
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1591
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L377
.L1591:
	movss	xmm0, DWORD PTR proposed3[rip]
	movss	xmm1, DWORD PTR _x_proposed3[rip]
	ucomiss	xmm0, xmm1
	jp	.L1592
	ucomiss	xmm0, xmm1
	jne	.L1592
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1592
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1592
	movss	xmm0, DWORD PTR p3_c[rip]
	movss	xmm1, DWORD PTR _x_p3_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1592
	ucomiss	xmm0, xmm1
	jne	.L1592
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1595
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1595
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1595
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1596
.L1595:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1592
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L1592
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1592
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L1596
.L1592:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L1596
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L1596
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L1596
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L1596
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1596
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1596
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L377
.L1596:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 4
	jne	.L1597
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1597
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1597
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	je	.L1597
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1597
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1597
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1597
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L1597
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L1597
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L1597
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L1597
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L377
.L1597:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 4
	je	.L1598
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1598
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1598
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	je	.L1598
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L1598
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L1598
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L1598
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L1598
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1598
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L1598
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1598
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L377
.L1598:
	movss	xmm0, DWORD PTR proposed3[rip]
	movss	xmm1, DWORD PTR _x_proposed3[rip]
	ucomiss	xmm0, xmm1
	jp	.L1599
	ucomiss	xmm0, xmm1
	jne	.L1599
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1599
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1599
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1599
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L1599
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L1599
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L1599
	movss	xmm0, DWORD PTR _x_p3_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1599
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1601
.L1599:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L1601
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L1601
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L1601
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L1601
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1601
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1601
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L377
.L1601:
	movss	xmm0, DWORD PTR proposed3[rip]
	movss	xmm1, DWORD PTR _x_proposed3[rip]
	ucomiss	xmm0, xmm1
	jp	.L1603
	ucomiss	xmm0, xmm1
	jne	.L1603
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L1603
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	je	.L1603
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1603
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1603
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L1603
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1603
	movss	xmm0, DWORD PTR _x_p3_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1603
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1605
.L1603:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L1605
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L1605
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L1605
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L1605
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1605
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1605
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L377
.L1605:
	movss	xmm0, DWORD PTR proposed3[rip]
	movss	xmm1, DWORD PTR _x_proposed3[rip]
	ucomiss	xmm0, xmm1
	jp	.L1607
	ucomiss	xmm0, xmm1
	jne	.L1607
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L1607
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L1607
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L1607
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L1607
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L1607
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1607
	movss	xmm0, DWORD PTR p3_c[rip]
	movss	xmm1, DWORD PTR _x_p3_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1607
	ucomiss	xmm0, xmm1
	je	.L1609
.L1607:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	je	.L1609
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L1609
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L1609
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L1609
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1609
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1609
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L377
.L1609:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	je	.L1611
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1611
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1611
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1612
.L1611:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1613
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L1613
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L1613
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L1612
.L1613:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1614
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L1614
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1614
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L1612
.L1614:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1615
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L1615
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L1615
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1612
.L1615:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1616
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L1616
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1616
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1612
.L1616:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1617
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1617
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L1617
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L1612
.L1617:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1618
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1618
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1618
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L1612
.L1618:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1619
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1619
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1619
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1612
.L1619:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L377
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L377
.L1612:
	movss	xmm1, DWORD PTR _x_p2_c[rip]
	movss	xmm0, DWORD PTR _x_proposed2[rip]
	comiss	xmm0, xmm1
	jnb	.L1620
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1621
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1621
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L1621
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L377
.L1621:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1622
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L1622
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1622
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L377
.L1622:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1623
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L1623
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L1623
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L377
.L1623:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	je	.L1620
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1620
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1620
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L377
.L1620:
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1624
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1624
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1624
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1624
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p2_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p2_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L1624
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L1624
	movss	xmm0, DWORD PTR proposed2[rip]
	movss	xmm1, DWORD PTR _x_proposed2[rip]
	ucomiss	xmm0, xmm1
	jp	.L1624
	ucomiss	xmm0, xmm1
	je	.L1626
.L1624:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L377
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	je	.L377
.L1626:
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L1629
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1629
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1629
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L1629
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L1629
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1629
	movss	xmm0, DWORD PTR _x_p2_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1629
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1629
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1629
	movss	xmm0, DWORD PTR proposed2[rip]
	movss	xmm1, DWORD PTR _x_proposed2[rip]
	ucomiss	xmm0, xmm1
	jp	.L1629
	ucomiss	xmm0, xmm1
	je	.L1631
.L1629:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L1631
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L1631
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L1631
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L1631
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1631
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1631
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L377
.L1631:
	movss	xmm0, DWORD PTR proposed2[rip]
	movss	xmm1, DWORD PTR _x_proposed2[rip]
	ucomiss	xmm0, xmm1
	jp	.L1633
	ucomiss	xmm0, xmm1
	jne	.L1633
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1633
	movss	xmm0, DWORD PTR _x_p2_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1633
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1633
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1633
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1633
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1633
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1633
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 3
	je	.L1636
.L1633:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L1636
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L1636
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L1636
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L1636
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1636
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1636
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L377
.L1636:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1637
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1637
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1638
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1638
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1638
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1639
.L1638:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1637
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1637
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L1637
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1637
.L1639:
	movss	xmm0, DWORD PTR p2_c[rip]
	movss	xmm1, DWORD PTR _x_p2_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1637
	ucomiss	xmm0, xmm1
	je	.L1640
.L1637:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L1640
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L1640
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L1640
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L1640
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1640
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1640
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L377
.L1640:
	movss	xmm0, DWORD PTR proposed2[rip]
	movss	xmm1, DWORD PTR _x_proposed2[rip]
	ucomiss	xmm0, xmm1
	jp	.L1642
	ucomiss	xmm0, xmm1
	jne	.L1642
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 3
	jne	.L1644
.L1642:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1644
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1644
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	je	.L1644
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1644
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1644
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1644
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L1644
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L1644
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L1644
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L1644
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L377
.L1644:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 3
	jne	.L1645
	movss	xmm1, DWORD PTR p2_c[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L1645
	movss	xmm1, DWORD PTR proposed2[rip]
	movss	xmm0, DWORD PTR _x_proposed2[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L1646
.L1645:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1646
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1646
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	je	.L1646
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L1646
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L1646
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L1646
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L1646
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1646
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1646
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L1646
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L377
.L1646:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1647
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1647
	movss	xmm0, DWORD PTR proposed2[rip]
	movss	xmm1, DWORD PTR _x_proposed2[rip]
	ucomiss	xmm0, xmm1
	jp	.L1647
	ucomiss	xmm0, xmm1
	jne	.L1647
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1649
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1649
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1649
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1650
.L1649:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1647
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L1647
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1647
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1650
.L1647:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L1650
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L1650
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L1650
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L1650
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1650
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1650
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L377
.L1650:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L1651
	movss	xmm0, DWORD PTR p2_c[rip]
	movss	xmm1, DWORD PTR _x_p2_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1651
	ucomiss	xmm0, xmm1
	je	.L1652
.L1651:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1652
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1652
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	je	.L1652
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1652
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1652
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1652
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L1652
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L1652
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L1652
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L1652
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L377
.L1652:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L1654
	movss	xmm0, DWORD PTR _x_p2_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1654
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1655
.L1654:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1655
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1655
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	je	.L1655
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L1655
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L1655
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L1655
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L1655
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1655
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L1655
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1655
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L377
.L1655:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1657
	movss	xmm0, DWORD PTR proposed2[rip]
	movss	xmm1, DWORD PTR _x_proposed2[rip]
	ucomiss	xmm0, xmm1
	jp	.L1657
	ucomiss	xmm0, xmm1
	jne	.L1657
	movss	xmm0, DWORD PTR _x_p2_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1657
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1657
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L1657
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1657
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L1657
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L1657
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1660
.L1657:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L1660
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L1660
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L1660
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L1660
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1660
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1660
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L377
.L1660:
	movss	xmm0, DWORD PTR proposed2[rip]
	movss	xmm1, DWORD PTR _x_proposed2[rip]
	ucomiss	xmm0, xmm1
	jp	.L1661
	ucomiss	xmm0, xmm1
	jne	.L1661
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1661
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1661
	movss	xmm0, DWORD PTR p2_c[rip]
	movss	xmm1, DWORD PTR _x_p2_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1661
	ucomiss	xmm0, xmm1
	jne	.L1661
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1664
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1664
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1664
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1665
.L1664:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1661
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L1661
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1661
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L1665
.L1661:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L1665
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L1665
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L1665
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L1665
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1665
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1665
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L377
.L1665:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 3
	jne	.L1666
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1666
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1666
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	je	.L1666
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1666
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1666
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1666
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L1666
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L1666
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L1666
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L1666
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L377
.L1666:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 3
	je	.L1667
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1667
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1667
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	je	.L1667
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L1667
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L1667
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L1667
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L1667
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1667
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L1667
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1667
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L377
.L1667:
	movss	xmm0, DWORD PTR proposed2[rip]
	movss	xmm1, DWORD PTR _x_proposed2[rip]
	ucomiss	xmm0, xmm1
	jp	.L1668
	ucomiss	xmm0, xmm1
	jne	.L1668
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1668
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1668
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1668
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L1668
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L1668
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L1668
	movss	xmm0, DWORD PTR _x_p2_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1668
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1670
.L1668:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L1670
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L1670
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L1670
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L1670
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1670
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1670
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L377
.L1670:
	movss	xmm0, DWORD PTR proposed2[rip]
	movss	xmm1, DWORD PTR _x_proposed2[rip]
	ucomiss	xmm0, xmm1
	jp	.L1672
	ucomiss	xmm0, xmm1
	jne	.L1672
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L1672
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	je	.L1672
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1672
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1672
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L1672
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1672
	movss	xmm0, DWORD PTR _x_p2_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1672
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1674
.L1672:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L1674
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L1674
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L1674
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L1674
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1674
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1674
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L377
.L1674:
	movss	xmm0, DWORD PTR proposed2[rip]
	movss	xmm1, DWORD PTR _x_proposed2[rip]
	ucomiss	xmm0, xmm1
	jp	.L1676
	ucomiss	xmm0, xmm1
	jne	.L1676
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L1676
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L1676
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L1676
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L1676
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L1676
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1676
	movss	xmm0, DWORD PTR p2_c[rip]
	movss	xmm1, DWORD PTR _x_p2_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1676
	ucomiss	xmm0, xmm1
	je	.L1678
.L1676:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	je	.L1678
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L1678
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L1678
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L1678
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1678
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1678
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L377
.L1678:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	je	.L1680
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1680
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1680
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1681
.L1680:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1682
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L1682
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L1682
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L1681
.L1682:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1683
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L1683
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1683
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L1681
.L1683:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1684
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L1684
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L1684
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1681
.L1684:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1685
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L1685
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1685
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1681
.L1685:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1686
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1686
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L1686
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L1681
.L1686:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1687
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1687
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1687
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L1681
.L1687:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1688
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1688
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1688
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1681
.L1688:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L377
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L377
.L1681:
	movss	xmm1, DWORD PTR _x_p1_c[rip]
	movss	xmm0, DWORD PTR _x_proposed1[rip]
	comiss	xmm0, xmm1
	jnb	.L1689
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1690
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1690
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L1690
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L377
.L1690:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1691
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L1691
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1691
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L377
.L1691:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1692
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L1692
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L1692
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L377
.L1692:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	je	.L1689
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1689
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1689
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L377
.L1689:
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1693
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1693
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1693
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1693
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p1_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p1_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L1693
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L1693
	movss	xmm0, DWORD PTR proposed1[rip]
	movss	xmm1, DWORD PTR _x_proposed1[rip]
	ucomiss	xmm0, xmm1
	jp	.L1693
	ucomiss	xmm0, xmm1
	je	.L1695
.L1693:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L377
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	je	.L377
.L1695:
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L1698
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1698
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1698
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L1698
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L1698
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1698
	movss	xmm0, DWORD PTR _x_p1_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1698
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1698
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1698
	movss	xmm0, DWORD PTR proposed1[rip]
	movss	xmm1, DWORD PTR _x_proposed1[rip]
	ucomiss	xmm0, xmm1
	jp	.L1698
	ucomiss	xmm0, xmm1
	je	.L1700
.L1698:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1700
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L1700
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L1700
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L1700
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1700
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1700
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L377
.L1700:
	movss	xmm0, DWORD PTR proposed1[rip]
	movss	xmm1, DWORD PTR _x_proposed1[rip]
	ucomiss	xmm0, xmm1
	jp	.L1702
	ucomiss	xmm0, xmm1
	jne	.L1702
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1702
	movss	xmm0, DWORD PTR _x_p1_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1702
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1702
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1702
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1702
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1702
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1702
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 2
	je	.L1705
.L1702:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1705
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L1705
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L1705
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L1705
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1705
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1705
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L377
.L1705:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1706
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1706
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1707
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1707
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1707
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1708
.L1707:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1706
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1706
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L1706
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1706
.L1708:
	movss	xmm0, DWORD PTR p1_c[rip]
	movss	xmm1, DWORD PTR _x_p1_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1706
	ucomiss	xmm0, xmm1
	je	.L1709
.L1706:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1709
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L1709
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L1709
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L1709
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1709
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1709
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L377
.L1709:
	movss	xmm0, DWORD PTR proposed1[rip]
	movss	xmm1, DWORD PTR _x_proposed1[rip]
	ucomiss	xmm0, xmm1
	jp	.L1711
	ucomiss	xmm0, xmm1
	jne	.L1711
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 2
	jne	.L1713
.L1711:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1713
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1713
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	je	.L1713
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1713
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1713
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1713
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L1713
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1713
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L1713
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L1713
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L377
.L1713:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 2
	jne	.L1714
	movss	xmm1, DWORD PTR p1_c[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L1714
	movss	xmm1, DWORD PTR proposed1[rip]
	movss	xmm0, DWORD PTR _x_proposed1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L1715
.L1714:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1715
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1715
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	je	.L1715
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1715
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L1715
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L1715
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L1715
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1715
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1715
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L1715
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L377
.L1715:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1716
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1716
	movss	xmm0, DWORD PTR proposed1[rip]
	movss	xmm1, DWORD PTR _x_proposed1[rip]
	ucomiss	xmm0, xmm1
	jp	.L1716
	ucomiss	xmm0, xmm1
	jne	.L1716
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1718
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1718
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1718
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1719
.L1718:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1716
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L1716
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1716
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1719
.L1716:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1719
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L1719
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L1719
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L1719
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1719
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1719
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L377
.L1719:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L1720
	movss	xmm0, DWORD PTR p1_c[rip]
	movss	xmm1, DWORD PTR _x_p1_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1720
	ucomiss	xmm0, xmm1
	je	.L1721
.L1720:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1721
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1721
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	je	.L1721
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1721
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1721
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1721
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L1721
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1721
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L1721
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L1721
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L377
.L1721:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L1723
	movss	xmm0, DWORD PTR _x_p1_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1723
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1724
.L1723:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1724
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1724
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	je	.L1724
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1724
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L1724
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L1724
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L1724
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1724
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L1724
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1724
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L377
.L1724:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1726
	movss	xmm0, DWORD PTR proposed1[rip]
	movss	xmm1, DWORD PTR _x_proposed1[rip]
	ucomiss	xmm0, xmm1
	jp	.L1726
	ucomiss	xmm0, xmm1
	jne	.L1726
	movss	xmm0, DWORD PTR _x_p1_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1726
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1726
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L1726
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1726
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L1726
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L1726
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1729
.L1726:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1729
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L1729
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L1729
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L1729
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1729
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1729
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L377
.L1729:
	movss	xmm0, DWORD PTR proposed1[rip]
	movss	xmm1, DWORD PTR _x_proposed1[rip]
	ucomiss	xmm0, xmm1
	jp	.L1730
	ucomiss	xmm0, xmm1
	jne	.L1730
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1730
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1730
	movss	xmm0, DWORD PTR p1_c[rip]
	movss	xmm1, DWORD PTR _x_p1_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1730
	ucomiss	xmm0, xmm1
	jne	.L1730
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1733
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1733
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1733
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1734
.L1733:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1730
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L1730
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1730
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L1734
.L1730:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1734
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L1734
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L1734
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L1734
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1734
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1734
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L377
.L1734:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 2
	jne	.L1735
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1735
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1735
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	je	.L1735
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1735
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1735
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1735
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L1735
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1735
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L1735
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L1735
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L377
.L1735:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 2
	je	.L1736
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1736
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1736
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	je	.L1736
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1736
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L1736
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L1736
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L1736
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1736
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L1736
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1736
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L377
.L1736:
	movss	xmm0, DWORD PTR proposed1[rip]
	movss	xmm1, DWORD PTR _x_proposed1[rip]
	ucomiss	xmm0, xmm1
	jp	.L1737
	ucomiss	xmm0, xmm1
	jne	.L1737
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1737
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1737
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1737
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L1737
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L1737
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1737
	movss	xmm0, DWORD PTR _x_p1_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1737
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1739
.L1737:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1739
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L1739
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L1739
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L1739
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1739
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1739
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L377
.L1739:
	movss	xmm0, DWORD PTR proposed1[rip]
	movss	xmm1, DWORD PTR _x_proposed1[rip]
	ucomiss	xmm0, xmm1
	jp	.L1741
	ucomiss	xmm0, xmm1
	jne	.L1741
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L1741
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	je	.L1741
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1741
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1741
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L1741
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1741
	movss	xmm0, DWORD PTR _x_p1_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1741
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1743
.L1741:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1743
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L1743
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L1743
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L1743
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1743
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1743
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L377
.L1743:
	movss	xmm0, DWORD PTR proposed1[rip]
	movss	xmm1, DWORD PTR _x_proposed1[rip]
	ucomiss	xmm0, xmm1
	jp	.L1745
	ucomiss	xmm0, xmm1
	jne	.L1745
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L1745
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1745
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1745
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1745
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L1745
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1745
	movss	xmm0, DWORD PTR p1_c[rip]
	movss	xmm1, DWORD PTR _x_p1_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1745
	ucomiss	xmm0, xmm1
	je	.L1747
.L1745:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	je	.L1747
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L1747
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L1747
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L1747
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1747
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1747
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L377
.L1747:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	je	.L1749
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1749
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1749
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1750
.L1749:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1751
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1751
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1751
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L1750
.L1751:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1752
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1752
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1752
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1750
.L1752:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1753
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1753
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1753
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1750
.L1753:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1754
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1754
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1754
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1750
.L1754:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1755
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1755
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1755
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L1750
.L1755:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1756
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1756
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1756
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1750
.L1756:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1757
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1757
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1757
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1750
.L1757:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L377
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L377
.L1750:
	movss	xmm1, DWORD PTR _x_p0_c[rip]
	movss	xmm0, DWORD PTR _x_proposed0[rip]
	comiss	xmm0, xmm1
	jnb	.L1758
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1759
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1759
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1759
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L377
.L1759:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1760
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1760
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1760
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L377
.L1760:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1761
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1761
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1761
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L377
.L1761:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	je	.L1758
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1758
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1758
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L377
.L1758:
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1762
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1762
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1762
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1762
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p0_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p0_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L1762
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L1762
	movss	xmm0, DWORD PTR proposed0[rip]
	movss	xmm1, DWORD PTR _x_proposed0[rip]
	ucomiss	xmm0, xmm1
	jp	.L1762
	ucomiss	xmm0, xmm1
	je	.L1764
.L1762:
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L377
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L377
.L1764:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1767
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1767
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1767
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L1767
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L1767
	movss	xmm0, DWORD PTR _x_p0_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1767
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1767
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1767
	movss	xmm0, DWORD PTR proposed0[rip]
	movss	xmm1, DWORD PTR _x_proposed0[rip]
	ucomiss	xmm0, xmm1
	jp	.L1767
	ucomiss	xmm0, xmm1
	jne	.L1767
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	je	.L1770
.L1767:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1770
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L1770
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L1770
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L1770
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1770
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1770
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L377
.L1770:
	movss	xmm0, DWORD PTR proposed0[rip]
	movss	xmm1, DWORD PTR _x_proposed0[rip]
	ucomiss	xmm0, xmm1
	jp	.L1772
	ucomiss	xmm0, xmm1
	jne	.L1772
	movss	xmm0, DWORD PTR _x_p0_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1772
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1772
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1772
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1772
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1772
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1772
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1772
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 1
	je	.L1775
.L1772:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1775
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L1775
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L1775
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L1775
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1775
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1775
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L377
.L1775:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1777
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1777
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1777
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1778
.L1777:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1779
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1779
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1779
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1779
.L1778:
	movss	xmm0, DWORD PTR p0_c[rip]
	movss	xmm1, DWORD PTR _x_p0_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1779
	ucomiss	xmm0, xmm1
	jne	.L1779
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1779
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	je	.L1781
.L1779:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1781
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L1781
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L1781
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L1781
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1781
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1781
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L377
.L1781:
	movss	xmm0, DWORD PTR proposed0[rip]
	movss	xmm1, DWORD PTR _x_proposed0[rip]
	ucomiss	xmm0, xmm1
	jp	.L1783
	ucomiss	xmm0, xmm1
	jne	.L1783
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 1
	jne	.L1785
.L1783:
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1785
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1785
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1785
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1785
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1785
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1785
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L1785
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1785
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L1785
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L1785
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L377
.L1785:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 1
	jne	.L1786
	movss	xmm1, DWORD PTR p0_c[rip]
	movss	xmm0, DWORD PTR max_prop[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L1786
	movss	xmm1, DWORD PTR proposed0[rip]
	movss	xmm0, DWORD PTR _x_proposed0[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L1787
.L1786:
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1787
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1787
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1787
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1787
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L1787
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L1787
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L1787
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1787
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1787
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1787
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L377
.L1787:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1788
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1788
	movss	xmm0, DWORD PTR proposed0[rip]
	movss	xmm1, DWORD PTR _x_proposed0[rip]
	ucomiss	xmm0, xmm1
	jp	.L1788
	ucomiss	xmm0, xmm1
	jne	.L1788
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1790
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1790
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1790
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1791
.L1790:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1788
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1788
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1788
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1791
.L1788:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1791
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L1791
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L1791
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L1791
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1791
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1791
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L377
.L1791:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L1793
	movss	xmm0, DWORD PTR p0_c[rip]
	movss	xmm1, DWORD PTR _x_p0_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1793
	ucomiss	xmm0, xmm1
	je	.L1794
.L1793:
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1794
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1794
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1794
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1794
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1794
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1794
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L1794
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1794
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L1794
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L1794
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L377
.L1794:
	movss	xmm0, DWORD PTR _x_p0_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1796
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1796
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L1798
.L1796:
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1798
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1798
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1798
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1798
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L1798
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L1798
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L1798
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1798
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1798
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1798
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L377
.L1798:
	movss	xmm0, DWORD PTR proposed0[rip]
	movss	xmm1, DWORD PTR _x_proposed0[rip]
	ucomiss	xmm0, xmm1
	jp	.L1799
	ucomiss	xmm0, xmm1
	jne	.L1799
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1799
	movss	xmm0, DWORD PTR _x_p0_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1799
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1799
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L1799
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1799
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1799
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1799
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1802
.L1799:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1802
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L1802
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L1802
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L1802
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1802
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1802
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L377
.L1802:
	movss	xmm0, DWORD PTR proposed0[rip]
	movss	xmm1, DWORD PTR _x_proposed0[rip]
	ucomiss	xmm0, xmm1
	jp	.L1804
	ucomiss	xmm0, xmm1
	jne	.L1804
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1804
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1804
	movss	xmm0, DWORD PTR p0_c[rip]
	movss	xmm1, DWORD PTR _x_p0_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1804
	ucomiss	xmm0, xmm1
	jne	.L1804
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1807
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1807
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1807
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1808
.L1807:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1804
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1804
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1804
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1808
.L1804:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1808
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L1808
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L1808
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L1808
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1808
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1808
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L377
.L1808:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 1
	jne	.L1810
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1810
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1810
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1810
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1810
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1810
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1810
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L1810
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1810
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L1810
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L1810
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L377
.L1810:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 1
	je	.L1811
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1811
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1811
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1811
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1811
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L1811
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L1811
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L1811
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1811
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1811
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1811
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L377
.L1811:
	movss	xmm0, DWORD PTR proposed0[rip]
	movss	xmm1, DWORD PTR _x_proposed0[rip]
	ucomiss	xmm0, xmm1
	jp	.L1812
	ucomiss	xmm0, xmm1
	jne	.L1812
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1812
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1812
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1812
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1812
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1812
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1812
	movss	xmm0, DWORD PTR _x_p0_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1812
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1814
.L1812:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1814
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L1814
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L1814
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L1814
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1814
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1814
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L377
.L1814:
	movss	xmm0, DWORD PTR proposed0[rip]
	movss	xmm1, DWORD PTR _x_proposed0[rip]
	ucomiss	xmm0, xmm1
	jp	.L1817
	ucomiss	xmm0, xmm1
	jne	.L1817
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	je	.L1817
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1817
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1817
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L1817
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L1817
	movss	xmm0, DWORD PTR _x_p0_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1817
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1817
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	je	.L1820
.L1817:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1820
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L1820
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L1820
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L1820
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1820
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1820
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L377
.L1820:
	movss	xmm0, DWORD PTR proposed0[rip]
	movss	xmm1, DWORD PTR _x_proposed0[rip]
	ucomiss	xmm0, xmm1
	jp	.L1822
	ucomiss	xmm0, xmm1
	jne	.L1822
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1822
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1822
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1822
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L1822
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L1822
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1822
	movss	xmm0, DWORD PTR p0_c[rip]
	movss	xmm1, DWORD PTR _x_p0_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1822
	ucomiss	xmm0, xmm1
	je	.L1824
.L1822:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	je	.L1824
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L1824
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L1824
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L1824
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1824
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1824
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L377
.L1824:
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 21
	je	.L1827
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 20
	je	.L1827
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 19
	je	.L1827
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 18
	je	.L1827
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 17
	je	.L1827
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 16
	je	.L1827
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 15
	je	.L1827
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 14
	je	.L1827
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 13
	je	.L1827
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 12
	je	.L1827
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 11
	je	.L1827
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 10
	je	.L1827
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 9
	je	.L1827
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 8
	je	.L1827
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 7
	je	.L1827
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 6
	je	.L1827
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 5
	je	.L1827
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 4
	je	.L1827
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 3
	je	.L1827
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 2
	je	.L1827
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 1
	je	.L1827
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L377
.L1827:
	movss	xmm0, DWORD PTR _x_delta[rip]
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jb	.L377
	movss	xmm1, DWORD PTR _x_proposed0[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L377
	movss	xmm1, DWORD PTR _x_proposed0[rip]
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L377
	movss	xmm1, DWORD PTR _x_proposed1[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L377
	movss	xmm1, DWORD PTR _x_proposed1[rip]
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L377
	movss	xmm1, DWORD PTR _x_proposed2[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L377
	movss	xmm1, DWORD PTR _x_proposed2[rip]
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L377
	movss	xmm1, DWORD PTR _x_proposed3[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L377
	movss	xmm1, DWORD PTR _x_proposed3[rip]
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L377
	movss	xmm1, DWORD PTR _x_proposed4[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L377
	movss	xmm1, DWORD PTR _x_proposed4[rip]
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L377
	movss	xmm1, DWORD PTR _x_proposed5[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L377
	movss	xmm1, DWORD PTR _x_proposed5[rip]
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L377
	movss	xmm1, DWORD PTR _x_proposed6[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L377
	movss	xmm1, DWORD PTR _x_proposed6[rip]
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L377
	movss	xmm1, DWORD PTR _x_proposed7[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L377
	movss	xmm1, DWORD PTR _x_proposed7[rip]
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L377
	movss	xmm1, DWORD PTR _x_proposed8[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L377
	movss	xmm1, DWORD PTR _x_proposed8[rip]
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L377
	movss	xmm1, DWORD PTR _x_proposed9[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L377
	movss	xmm1, DWORD PTR _x_proposed9[rip]
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L377
	movss	xmm1, DWORD PTR _x_proposed10[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L377
	movss	xmm1, DWORD PTR _x_proposed10[rip]
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L377
	movss	xmm1, DWORD PTR _x_proposed11[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L377
	movss	xmm1, DWORD PTR _x_proposed11[rip]
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L377
	movss	xmm1, DWORD PTR _x_proposed12[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L377
	movss	xmm1, DWORD PTR _x_proposed12[rip]
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L377
	movss	xmm1, DWORD PTR _x_proposed13[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L377
	movss	xmm1, DWORD PTR _x_proposed13[rip]
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L377
	movss	xmm1, DWORD PTR _x_proposed14[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L377
	movss	xmm1, DWORD PTR _x_proposed14[rip]
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L377
	movss	xmm1, DWORD PTR _x_proposed15[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L377
	movss	xmm1, DWORD PTR _x_proposed15[rip]
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L377
	movss	xmm1, DWORD PTR _x_proposed16[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L377
	movss	xmm1, DWORD PTR _x_proposed16[rip]
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L377
	movss	xmm1, DWORD PTR _x_proposed17[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L377
	movss	xmm1, DWORD PTR _x_proposed17[rip]
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L377
	movss	xmm1, DWORD PTR _x_proposed18[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L377
	movss	xmm1, DWORD PTR _x_proposed18[rip]
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L377
	movss	xmm1, DWORD PTR _x_proposed19[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L377
	movss	xmm1, DWORD PTR _x_proposed19[rip]
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L377
	movss	xmm1, DWORD PTR _x_proposed20[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L377
	movss	xmm1, DWORD PTR _x_proposed20[rip]
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	comiss	xmm0, xmm1
	jb	.L377
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	movss	xmm1, DWORD PTR _x_proposed0[rip]
	ucomiss	xmm0, xmm1
	jp	.L2286
	ucomiss	xmm0, xmm1
	je	.L1850
.L2286:
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	movss	xmm1, DWORD PTR _x_proposed1[rip]
	ucomiss	xmm0, xmm1
	jp	.L2287
	ucomiss	xmm0, xmm1
	je	.L1850
.L2287:
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	movss	xmm1, DWORD PTR _x_proposed2[rip]
	ucomiss	xmm0, xmm1
	jp	.L2288
	ucomiss	xmm0, xmm1
	je	.L1850
.L2288:
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	movss	xmm1, DWORD PTR _x_proposed3[rip]
	ucomiss	xmm0, xmm1
	jp	.L2289
	ucomiss	xmm0, xmm1
	je	.L1850
.L2289:
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	movss	xmm1, DWORD PTR _x_proposed4[rip]
	ucomiss	xmm0, xmm1
	jp	.L2290
	ucomiss	xmm0, xmm1
	je	.L1850
.L2290:
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	movss	xmm1, DWORD PTR _x_proposed5[rip]
	ucomiss	xmm0, xmm1
	jp	.L2291
	ucomiss	xmm0, xmm1
	je	.L1850
.L2291:
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	movss	xmm1, DWORD PTR _x_proposed6[rip]
	ucomiss	xmm0, xmm1
	jp	.L2292
	ucomiss	xmm0, xmm1
	je	.L1850
.L2292:
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	movss	xmm1, DWORD PTR _x_proposed7[rip]
	ucomiss	xmm0, xmm1
	jp	.L2293
	ucomiss	xmm0, xmm1
	je	.L1850
.L2293:
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	movss	xmm1, DWORD PTR _x_proposed8[rip]
	ucomiss	xmm0, xmm1
	jp	.L2294
	ucomiss	xmm0, xmm1
	je	.L1850
.L2294:
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	movss	xmm1, DWORD PTR _x_proposed9[rip]
	ucomiss	xmm0, xmm1
	jp	.L2295
	ucomiss	xmm0, xmm1
	je	.L1850
.L2295:
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	movss	xmm1, DWORD PTR _x_proposed10[rip]
	ucomiss	xmm0, xmm1
	jp	.L2296
	ucomiss	xmm0, xmm1
	je	.L1850
.L2296:
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	movss	xmm1, DWORD PTR _x_proposed11[rip]
	ucomiss	xmm0, xmm1
	jp	.L2297
	ucomiss	xmm0, xmm1
	je	.L1850
.L2297:
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	movss	xmm1, DWORD PTR _x_proposed12[rip]
	ucomiss	xmm0, xmm1
	jp	.L2298
	ucomiss	xmm0, xmm1
	je	.L1850
.L2298:
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	movss	xmm1, DWORD PTR _x_proposed13[rip]
	ucomiss	xmm0, xmm1
	jp	.L2299
	ucomiss	xmm0, xmm1
	je	.L1850
.L2299:
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	movss	xmm1, DWORD PTR _x_proposed14[rip]
	ucomiss	xmm0, xmm1
	jp	.L2300
	ucomiss	xmm0, xmm1
	je	.L1850
.L2300:
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	movss	xmm1, DWORD PTR _x_proposed15[rip]
	ucomiss	xmm0, xmm1
	jp	.L2301
	ucomiss	xmm0, xmm1
	je	.L1850
.L2301:
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	movss	xmm1, DWORD PTR _x_proposed16[rip]
	ucomiss	xmm0, xmm1
	jp	.L2302
	ucomiss	xmm0, xmm1
	je	.L1850
.L2302:
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	movss	xmm1, DWORD PTR _x_proposed17[rip]
	ucomiss	xmm0, xmm1
	jp	.L2303
	ucomiss	xmm0, xmm1
	je	.L1850
.L2303:
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	movss	xmm1, DWORD PTR _x_proposed18[rip]
	ucomiss	xmm0, xmm1
	jp	.L2304
	ucomiss	xmm0, xmm1
	je	.L1850
.L2304:
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	movss	xmm1, DWORD PTR _x_proposed19[rip]
	ucomiss	xmm0, xmm1
	jp	.L2305
	ucomiss	xmm0, xmm1
	je	.L1850
.L2305:
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	movss	xmm1, DWORD PTR _x_proposed20[rip]
	ucomiss	xmm0, xmm1
	jp	.L377
	ucomiss	xmm0, xmm1
	jne	.L377
.L1850:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L1872
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L377
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L377
.L1872:
	movzx	eax, BYTE PTR p20_evt[rip]
	test	al, al
	jne	.L1873
	movzx	eax, BYTE PTR p19_evt[rip]
	test	al, al
	jne	.L1873
	movzx	eax, BYTE PTR p18_evt[rip]
	test	al, al
	jne	.L1873
	movzx	eax, BYTE PTR p17_evt[rip]
	test	al, al
	jne	.L1873
	movzx	eax, BYTE PTR p16_evt[rip]
	test	al, al
	jne	.L1873
	movzx	eax, BYTE PTR p15_evt[rip]
	test	al, al
	jne	.L1873
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L1873
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L1873
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L1873
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L1873
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L1873
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L1873
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L1873
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L1873
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L1873
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L1873
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L1873
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L1873
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L1873
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	jne	.L1873
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L1873
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1873
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L377
.L1873:
	movzx	eax, BYTE PTR _x_inc_max_prop[rip]
	test	al, al
	sete	dl
	movss	xmm1, DWORD PTR max_prop[rip]
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, edx
	test	al, al
	je	.L377
	movss	xmm0, DWORD PTR delta[rip]
	movss	xmm1, DWORD PTR _x__diverge_delta[rip]
	ucomiss	xmm0, xmm1
	jp	.L2306
	ucomiss	xmm0, xmm1
	je	.L1875
.L2306:
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	movss	xmm1, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L377
.L1875:
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	movss	xmm1, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	jnb	.L1877
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x__diverge_delta[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L377
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L377
.L1877:
	mov	eax, 1
	jmp	.L1879
.L377:
	mov	eax, 0
.L1879:
	mov	DWORD PTR -4[rbp], eax
	movzx	eax, BYTE PTR _x_p20_l3[rip]
	mov	BYTE PTR p20_l3[rip], al
	movzx	eax, BYTE PTR _x_p20_l2[rip]
	mov	BYTE PTR p20_l2[rip], al
	movzx	eax, BYTE PTR _x_p19_l3[rip]
	mov	BYTE PTR p19_l3[rip], al
	movzx	eax, BYTE PTR _x_p19_l2[rip]
	mov	BYTE PTR p19_l2[rip], al
	movzx	eax, BYTE PTR _x_p18_l3[rip]
	mov	BYTE PTR p18_l3[rip], al
	movzx	eax, BYTE PTR _x_p20_evt[rip]
	mov	BYTE PTR p20_evt[rip], al
	movzx	eax, BYTE PTR _x_p18_l2[rip]
	mov	BYTE PTR p18_l2[rip], al
	movzx	eax, BYTE PTR _x_p17_l3[rip]
	mov	BYTE PTR p17_l3[rip], al
	movzx	eax, BYTE PTR _x_p19_evt[rip]
	mov	BYTE PTR p19_evt[rip], al
	movzx	eax, BYTE PTR _x_p17_l2[rip]
	mov	BYTE PTR p17_l2[rip], al
	movzx	eax, BYTE PTR _x_p16_l3[rip]
	mov	BYTE PTR p16_l3[rip], al
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	mov	BYTE PTR p10_l0[rip], al
	movss	xmm0, DWORD PTR _x_p6_c[rip]
	movss	DWORD PTR p6_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	mov	BYTE PTR p4_l0[rip], al
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	mov	BYTE PTR p4_l2[rip], al
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	mov	BYTE PTR p13_l1[rip], al
	movzx	eax, BYTE PTR _x_p1_evt[rip]
	mov	BYTE PTR p1_evt[rip], al
	movss	xmm0, DWORD PTR _x_p1_c[rip]
	movss	DWORD PTR p1_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	mov	BYTE PTR p0_l3[rip], al
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	mov	BYTE PTR p0_l2[rip], al
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	mov	BYTE PTR p0_l1[rip], al
	movss	xmm0, DWORD PTR _x_proposed7[rip]
	movss	DWORD PTR proposed7[rip], xmm0
	movss	xmm0, DWORD PTR _x_proposed6[rip]
	movss	DWORD PTR proposed6[rip], xmm0
	movss	xmm0, DWORD PTR _x_proposed5[rip]
	movss	DWORD PTR proposed5[rip], xmm0
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	mov	BYTE PTR p12_l0[rip], al
	movss	xmm0, DWORD PTR _x_proposed4[rip]
	movss	DWORD PTR proposed4[rip], xmm0
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	mov	BYTE PTR p7_l0[rip], al
	movss	xmm0, DWORD PTR _x_proposed3[rip]
	movss	DWORD PTR proposed3[rip], xmm0
	movss	xmm0, DWORD PTR _x_proposed2[rip]
	movss	DWORD PTR proposed2[rip], xmm0
	movss	xmm0, DWORD PTR _x_proposed1[rip]
	movss	DWORD PTR proposed1[rip], xmm0
	movss	xmm0, DWORD PTR _x_p8_c[rip]
	movss	DWORD PTR p8_c[rip], xmm0
	movss	xmm0, DWORD PTR _x_proposed0[rip]
	movss	DWORD PTR proposed0[rip], xmm0
	movzx	eax, BYTE PTR _x_inc_max_prop[rip]
	mov	BYTE PTR inc_max_prop[rip], al
	movss	xmm0, DWORD PTR _x_max_prop[rip]
	movss	DWORD PTR max_prop[rip], xmm0
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	mov	BYTE PTR p20_l1[rip], al
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	mov	BYTE PTR p11_l3[rip], al
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	mov	BYTE PTR p2_l3[rip], al
	movzx	eax, BYTE PTR _x_v2[rip]
	mov	BYTE PTR v2[rip], al
	movzx	eax, BYTE PTR _x_p15_evt[rip]
	mov	BYTE PTR p15_evt[rip], al
	mov	eax, DWORD PTR _x_v1[rip]
	mov	DWORD PTR v1[rip], eax
	movss	xmm0, DWORD PTR _x_p15_c[rip]
	movss	DWORD PTR p15_c[rip], xmm0
	movss	xmm0, DWORD PTR _x_delta[rip]
	movss	DWORD PTR delta[rip], xmm0
	movss	xmm0, DWORD PTR _x_proposed8[rip]
	movss	DWORD PTR proposed8[rip], xmm0
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	mov	BYTE PTR p7_l1[rip], al
	movss	xmm0, DWORD PTR _x_p9_c[rip]
	movss	DWORD PTR p9_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	mov	BYTE PTR p12_l3[rip], al
	movss	xmm0, DWORD PTR _x_proposed9[rip]
	movss	DWORD PTR proposed9[rip], xmm0
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	mov	BYTE PTR p12_l1[rip], al
	movss	xmm0, DWORD PTR _x_p14_c[rip]
	movss	DWORD PTR p14_c[rip], xmm0
	movss	xmm0, DWORD PTR _x_proposed10[rip]
	movss	DWORD PTR proposed10[rip], xmm0
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	mov	BYTE PTR p12_l2[rip], al
	movzx	eax, BYTE PTR _x_p14_evt[rip]
	mov	BYTE PTR p14_evt[rip], al
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	mov	BYTE PTR p3_l0[rip], al
	movss	xmm0, DWORD PTR _x_p5_c[rip]
	movss	DWORD PTR p5_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	mov	BYTE PTR p3_l3[rip], al
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	mov	BYTE PTR p8_l1[rip], al
	movss	xmm0, DWORD PTR _x_p10_c[rip]
	movss	DWORD PTR p10_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	mov	BYTE PTR p13_l3[rip], al
	movss	xmm0, DWORD PTR _x_proposed11[rip]
	movss	DWORD PTR proposed11[rip], xmm0
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	mov	BYTE PTR p3_l1[rip], al
	movzx	eax, BYTE PTR _x_p5_evt[rip]
	mov	BYTE PTR p5_evt[rip], al
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	mov	BYTE PTR p17_l0[rip], al
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	mov	BYTE PTR p8_l2[rip], al
	movzx	eax, BYTE PTR _x_p10_evt[rip]
	mov	BYTE PTR p10_evt[rip], al
	movss	xmm0, DWORD PTR _x_proposed12[rip]
	movss	DWORD PTR proposed12[rip], xmm0
	movss	xmm0, DWORD PTR _x_proposed13[rip]
	movss	DWORD PTR proposed13[rip], xmm0
	movss	xmm0, DWORD PTR _x_proposed14[rip]
	movss	DWORD PTR proposed14[rip], xmm0
	movss	xmm0, DWORD PTR _x_proposed15[rip]
	movss	DWORD PTR proposed15[rip], xmm0
	movss	xmm0, DWORD PTR _x_p13_c[rip]
	movss	DWORD PTR p13_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	mov	BYTE PTR p11_l1[rip], al
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	mov	BYTE PTR p2_l1[rip], al
	movzx	eax, BYTE PTR _x_p4_evt[rip]
	mov	BYTE PTR p4_evt[rip], al
	movss	xmm0, DWORD PTR _x_proposed16[rip]
	movss	DWORD PTR proposed16[rip], xmm0
	movss	xmm0, DWORD PTR _x_p3_c[rip]
	movss	DWORD PTR p3_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	mov	BYTE PTR p1_l0[rip], al
	movss	xmm0, DWORD PTR _x_proposed17[rip]
	movss	DWORD PTR proposed17[rip], xmm0
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	mov	BYTE PTR p6_l0[rip], al
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	mov	BYTE PTR p6_l1[rip], al
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	mov	BYTE PTR p7_l2[rip], al
	movzx	eax, BYTE PTR _x_p9_evt[rip]
	mov	BYTE PTR p9_evt[rip], al
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	mov	BYTE PTR p16_l0[rip], al
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	mov	BYTE PTR p1_l2[rip], al
	movss	xmm0, DWORD PTR _x_proposed19[rip]
	movss	DWORD PTR proposed19[rip], xmm0
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	mov	BYTE PTR p6_l2[rip], al
	movss	xmm0, DWORD PTR _x_p18_c[rip]
	movss	DWORD PTR p18_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	mov	BYTE PTR p7_l3[rip], al
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	mov	BYTE PTR p16_l1[rip], al
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	mov	BYTE PTR p1_l1[rip], al
	movss	xmm0, DWORD PTR _x_proposed18[rip]
	movss	DWORD PTR proposed18[rip], xmm0
	movzx	eax, BYTE PTR _x_p3_evt[rip]
	mov	BYTE PTR p3_evt[rip], al
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	mov	BYTE PTR p20_l0[rip], al
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	mov	BYTE PTR p11_l2[rip], al
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	mov	BYTE PTR p2_l2[rip], al
	movzx	eax, BYTE PTR _x_p13_evt[rip]
	mov	BYTE PTR p13_evt[rip], al
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	mov	BYTE PTR p1_l3[rip], al
	movss	xmm0, DWORD PTR _x_proposed20[rip]
	movss	DWORD PTR proposed20[rip], xmm0
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	mov	BYTE PTR p6_l3[rip], al
	movzx	eax, BYTE PTR _x_p18_evt[rip]
	mov	BYTE PTR p18_evt[rip], al
	movzx	eax, BYTE PTR _x_p16_l2[rip]
	mov	BYTE PTR p16_l2[rip], al
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	mov	BYTE PTR p3_l2[rip], al
	movss	xmm0, DWORD PTR _x_p19_c[rip]
	movss	DWORD PTR p19_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	mov	BYTE PTR p17_l1[rip], al
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	mov	BYTE PTR p8_l3[rip], al
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	mov	BYTE PTR p4_l3[rip], al
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	mov	BYTE PTR p13_l2[rip], al
	movss	xmm0, DWORD PTR _x_p0_c[rip]
	movss	DWORD PTR p0_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	mov	BYTE PTR p0_l0[rip], al
	movzx	eax, BYTE PTR _x_p0_evt[rip]
	mov	BYTE PTR p0_evt[rip], al
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	mov	BYTE PTR p5_l0[rip], al
	movss	xmm0, DWORD PTR _x_p7_c[rip]
	movss	DWORD PTR p7_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	mov	BYTE PTR p19_l1[rip], al
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	mov	BYTE PTR p10_l3[rip], al
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	mov	BYTE PTR p4_l1[rip], al
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	mov	BYTE PTR p13_l0[rip], al
	movzx	eax, BYTE PTR _x_p6_evt[rip]
	mov	BYTE PTR p6_evt[rip], al
	movss	xmm0, DWORD PTR _x__diverge_delta[rip]
	movss	DWORD PTR _diverge_delta[rip], xmm0
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	mov	BYTE PTR p5_l2[rip], al
	movss	xmm0, DWORD PTR _x_p16_c[rip]
	movss	DWORD PTR p16_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	mov	BYTE PTR p5_l1[rip], al
	movzx	eax, BYTE PTR _x_p7_evt[rip]
	mov	BYTE PTR p7_evt[rip], al
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	mov	BYTE PTR p10_l1[rip], al
	movss	xmm0, DWORD PTR _x_p12_c[rip]
	movss	DWORD PTR p12_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	mov	BYTE PTR p8_l0[rip], al
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	mov	BYTE PTR p9_l0[rip], al
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	mov	BYTE PTR p14_l0[rip], al
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	mov	BYTE PTR p18_l0[rip], al
	movzx	eax, BYTE PTR _x_p11_evt[rip]
	mov	BYTE PTR p11_evt[rip], al
	movzx	eax, BYTE PTR _x_p2_evt[rip]
	mov	BYTE PTR p2_evt[rip], al
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	mov	BYTE PTR p9_l2[rip], al
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	mov	BYTE PTR p14_l1[rip], al
	movss	xmm0, DWORD PTR _x_p20_c[rip]
	movss	DWORD PTR p20_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	mov	BYTE PTR p18_l1[rip], al
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	mov	BYTE PTR p9_l3[rip], al
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	mov	BYTE PTR p14_l2[rip], al
	movss	xmm0, DWORD PTR _x_p2_c[rip]
	movss	DWORD PTR p2_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	mov	BYTE PTR p9_l1[rip], al
	movss	xmm0, DWORD PTR _x_p11_c[rip]
	movss	DWORD PTR p11_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	mov	BYTE PTR p14_l3[rip], al
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	mov	BYTE PTR p2_l0[rip], al
	movss	xmm0, DWORD PTR _x_p4_c[rip]
	movss	DWORD PTR p4_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	mov	BYTE PTR p11_l0[rip], al
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	mov	BYTE PTR p19_l0[rip], al
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	mov	BYTE PTR p10_l2[rip], al
	movzx	eax, BYTE PTR _x_p12_evt[rip]
	mov	BYTE PTR p12_evt[rip], al
	movzx	eax, BYTE PTR _x_p8_evt[rip]
	mov	BYTE PTR p8_evt[rip], al
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	mov	BYTE PTR p15_l0[rip], al
	movss	xmm0, DWORD PTR _x_p17_c[rip]
	movss	DWORD PTR p17_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	mov	BYTE PTR p15_l1[rip], al
	movzx	eax, BYTE PTR _x_p17_evt[rip]
	mov	BYTE PTR p17_evt[rip], al
	movzx	eax, BYTE PTR _x_p15_l2[rip]
	mov	BYTE PTR p15_l2[rip], al
	movzx	eax, BYTE PTR _x_p15_l3[rip]
	mov	BYTE PTR p15_l3[rip], al
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	mov	BYTE PTR p5_l3[rip], al
	movzx	eax, BYTE PTR _x_p16_evt[rip]
	mov	BYTE PTR p16_evt[rip], al
.L367:
	cmp	DWORD PTR -4[rbp], 0
	jne	.L1880
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	main, .-main
	.section	.rodata
	.align 4
.LC1:
	.long	1098907648
	.align 4
.LC3:
	.long	1065353216
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"268103.c"
	.text
	.align	2
	.global	__VERIFIER_nondet_bool
	.syntax unified
	.arm
	.fpu softvfp
	.type	__VERIFIER_nondet_bool, %function
__VERIFIER_nondet_bool:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	pop	{fp, pc}
	.size	__VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
	.comm	p20_l3,1,1
	.comm	_x_p20_l3,1,1
	.comm	p20_l2,1,1
	.comm	_x_p20_l2,1,1
	.comm	p19_l3,1,1
	.comm	_x_p19_l3,1,1
	.comm	p19_l2,1,1
	.comm	_x_p19_l2,1,1
	.comm	p18_l3,1,1
	.comm	_x_p18_l3,1,1
	.comm	p20_evt,1,1
	.comm	_x_p20_evt,1,1
	.comm	p18_l2,1,1
	.comm	_x_p18_l2,1,1
	.comm	p17_l3,1,1
	.comm	_x_p17_l3,1,1
	.comm	p19_evt,1,1
	.comm	_x_p19_evt,1,1
	.comm	p17_l2,1,1
	.comm	_x_p17_l2,1,1
	.comm	p16_l3,1,1
	.comm	_x_p16_l3,1,1
	.comm	p10_l0,1,1
	.comm	_x_p10_l0,1,1
	.comm	p6_c,4,4
	.comm	_x_p6_c,4,4
	.comm	p4_l0,1,1
	.comm	_x_p4_l0,1,1
	.comm	p4_l2,1,1
	.comm	_x_p4_l2,1,1
	.comm	p13_l1,1,1
	.comm	_x_p13_l1,1,1
	.comm	p1_evt,1,1
	.comm	_x_p1_evt,1,1
	.comm	p1_c,4,4
	.comm	_x_p1_c,4,4
	.comm	p0_l3,1,1
	.comm	_x_p0_l3,1,1
	.comm	p0_l2,1,1
	.comm	_x_p0_l2,1,1
	.comm	p0_l1,1,1
	.comm	_x_p0_l1,1,1
	.comm	proposed7,4,4
	.comm	_x_proposed7,4,4
	.comm	proposed6,4,4
	.comm	_x_proposed6,4,4
	.comm	proposed5,4,4
	.comm	_x_proposed5,4,4
	.comm	p12_l0,1,1
	.comm	_x_p12_l0,1,1
	.comm	proposed4,4,4
	.comm	_x_proposed4,4,4
	.comm	p7_l0,1,1
	.comm	_x_p7_l0,1,1
	.comm	proposed3,4,4
	.comm	_x_proposed3,4,4
	.comm	proposed2,4,4
	.comm	_x_proposed2,4,4
	.comm	proposed1,4,4
	.comm	_x_proposed1,4,4
	.comm	p8_c,4,4
	.comm	_x_p8_c,4,4
	.comm	proposed0,4,4
	.comm	_x_proposed0,4,4
	.comm	inc_max_prop,1,1
	.comm	_x_inc_max_prop,1,1
	.comm	max_prop,4,4
	.comm	_x_max_prop,4,4
	.comm	p20_l1,1,1
	.comm	_x_p20_l1,1,1
	.comm	p11_l3,1,1
	.comm	_x_p11_l3,1,1
	.comm	p2_l3,1,1
	.comm	_x_p2_l3,1,1
	.comm	v2,1,1
	.comm	_x_v2,1,1
	.comm	p15_evt,1,1
	.comm	_x_p15_evt,1,1
	.comm	v1,4,4
	.comm	_x_v1,4,4
	.comm	p15_c,4,4
	.comm	_x_p15_c,4,4
	.comm	delta,4,4
	.comm	_x_delta,4,4
	.comm	proposed8,4,4
	.comm	_x_proposed8,4,4
	.comm	p7_l1,1,1
	.comm	_x_p7_l1,1,1
	.comm	p9_c,4,4
	.comm	_x_p9_c,4,4
	.comm	p12_l3,1,1
	.comm	_x_p12_l3,1,1
	.comm	proposed9,4,4
	.comm	_x_proposed9,4,4
	.comm	p12_l1,1,1
	.comm	_x_p12_l1,1,1
	.comm	p14_c,4,4
	.comm	_x_p14_c,4,4
	.comm	proposed10,4,4
	.comm	_x_proposed10,4,4
	.comm	p12_l2,1,1
	.comm	_x_p12_l2,1,1
	.comm	p14_evt,1,1
	.comm	_x_p14_evt,1,1
	.comm	p3_l0,1,1
	.comm	_x_p3_l0,1,1
	.comm	p5_c,4,4
	.comm	_x_p5_c,4,4
	.comm	p3_l3,1,1
	.comm	_x_p3_l3,1,1
	.comm	p8_l1,1,1
	.comm	_x_p8_l1,1,1
	.comm	p10_c,4,4
	.comm	_x_p10_c,4,4
	.comm	p13_l3,1,1
	.comm	_x_p13_l3,1,1
	.comm	proposed11,4,4
	.comm	_x_proposed11,4,4
	.comm	p3_l1,1,1
	.comm	_x_p3_l1,1,1
	.comm	p5_evt,1,1
	.comm	_x_p5_evt,1,1
	.comm	p17_l0,1,1
	.comm	_x_p17_l0,1,1
	.comm	p8_l2,1,1
	.comm	_x_p8_l2,1,1
	.comm	p10_evt,1,1
	.comm	_x_p10_evt,1,1
	.comm	proposed12,4,4
	.comm	_x_proposed12,4,4
	.comm	proposed13,4,4
	.comm	_x_proposed13,4,4
	.comm	proposed14,4,4
	.comm	_x_proposed14,4,4
	.comm	proposed15,4,4
	.comm	_x_proposed15,4,4
	.comm	p13_c,4,4
	.comm	_x_p13_c,4,4
	.comm	p11_l1,1,1
	.comm	_x_p11_l1,1,1
	.comm	p2_l1,1,1
	.comm	_x_p2_l1,1,1
	.comm	p4_evt,1,1
	.comm	_x_p4_evt,1,1
	.comm	proposed16,4,4
	.comm	_x_proposed16,4,4
	.comm	p3_c,4,4
	.comm	_x_p3_c,4,4
	.comm	p1_l0,1,1
	.comm	_x_p1_l0,1,1
	.comm	proposed17,4,4
	.comm	_x_proposed17,4,4
	.comm	p6_l0,1,1
	.comm	_x_p6_l0,1,1
	.comm	p6_l1,1,1
	.comm	_x_p6_l1,1,1
	.comm	p7_l2,1,1
	.comm	_x_p7_l2,1,1
	.comm	p9_evt,1,1
	.comm	_x_p9_evt,1,1
	.comm	p16_l0,1,1
	.comm	_x_p16_l0,1,1
	.comm	p1_l2,1,1
	.comm	_x_p1_l2,1,1
	.comm	proposed19,4,4
	.comm	_x_proposed19,4,4
	.comm	p6_l2,1,1
	.comm	_x_p6_l2,1,1
	.comm	p18_c,4,4
	.comm	_x_p18_c,4,4
	.comm	p7_l3,1,1
	.comm	_x_p7_l3,1,1
	.comm	p16_l1,1,1
	.comm	_x_p16_l1,1,1
	.comm	p1_l1,1,1
	.comm	_x_p1_l1,1,1
	.comm	proposed18,4,4
	.comm	_x_proposed18,4,4
	.comm	p3_evt,1,1
	.comm	_x_p3_evt,1,1
	.comm	p20_l0,1,1
	.comm	_x_p20_l0,1,1
	.comm	p11_l2,1,1
	.comm	_x_p11_l2,1,1
	.comm	p2_l2,1,1
	.comm	_x_p2_l2,1,1
	.comm	p13_evt,1,1
	.comm	_x_p13_evt,1,1
	.comm	p1_l3,1,1
	.comm	_x_p1_l3,1,1
	.comm	proposed20,4,4
	.comm	_x_proposed20,4,4
	.comm	p6_l3,1,1
	.comm	_x_p6_l3,1,1
	.comm	p18_evt,1,1
	.comm	_x_p18_evt,1,1
	.comm	p16_l2,1,1
	.comm	_x_p16_l2,1,1
	.comm	p3_l2,1,1
	.comm	_x_p3_l2,1,1
	.comm	p19_c,4,4
	.comm	_x_p19_c,4,4
	.comm	p17_l1,1,1
	.comm	_x_p17_l1,1,1
	.comm	p8_l3,1,1
	.comm	_x_p8_l3,1,1
	.comm	p4_l3,1,1
	.comm	_x_p4_l3,1,1
	.comm	p13_l2,1,1
	.comm	_x_p13_l2,1,1
	.comm	p0_c,4,4
	.comm	_x_p0_c,4,4
	.comm	p0_l0,1,1
	.comm	_x_p0_l0,1,1
	.comm	p0_evt,1,1
	.comm	_x_p0_evt,1,1
	.comm	p5_l0,1,1
	.comm	_x_p5_l0,1,1
	.comm	p7_c,4,4
	.comm	_x_p7_c,4,4
	.comm	p19_l1,1,1
	.comm	_x_p19_l1,1,1
	.comm	p10_l3,1,1
	.comm	_x_p10_l3,1,1
	.comm	p4_l1,1,1
	.comm	_x_p4_l1,1,1
	.comm	p13_l0,1,1
	.comm	_x_p13_l0,1,1
	.comm	p6_evt,1,1
	.comm	_x_p6_evt,1,1
	.comm	_diverge_delta,4,4
	.comm	_x__diverge_delta,4,4
	.comm	p5_l2,1,1
	.comm	_x_p5_l2,1,1
	.comm	p16_c,4,4
	.comm	_x_p16_c,4,4
	.comm	p5_l1,1,1
	.comm	_x_p5_l1,1,1
	.comm	p7_evt,1,1
	.comm	_x_p7_evt,1,1
	.comm	p10_l1,1,1
	.comm	_x_p10_l1,1,1
	.comm	p12_c,4,4
	.comm	_x_p12_c,4,4
	.comm	p8_l0,1,1
	.comm	_x_p8_l0,1,1
	.comm	p9_l0,1,1
	.comm	_x_p9_l0,1,1
	.comm	p14_l0,1,1
	.comm	_x_p14_l0,1,1
	.comm	p18_l0,1,1
	.comm	_x_p18_l0,1,1
	.comm	p11_evt,1,1
	.comm	_x_p11_evt,1,1
	.comm	p2_evt,1,1
	.comm	_x_p2_evt,1,1
	.comm	p9_l2,1,1
	.comm	_x_p9_l2,1,1
	.comm	p14_l1,1,1
	.comm	_x_p14_l1,1,1
	.comm	p20_c,4,4
	.comm	_x_p20_c,4,4
	.comm	p18_l1,1,1
	.comm	_x_p18_l1,1,1
	.comm	p9_l3,1,1
	.comm	_x_p9_l3,1,1
	.comm	p14_l2,1,1
	.comm	_x_p14_l2,1,1
	.comm	p2_c,4,4
	.comm	_x_p2_c,4,4
	.comm	p9_l1,1,1
	.comm	_x_p9_l1,1,1
	.comm	p11_c,4,4
	.comm	_x_p11_c,4,4
	.comm	p14_l3,1,1
	.comm	_x_p14_l3,1,1
	.comm	p2_l0,1,1
	.comm	_x_p2_l0,1,1
	.comm	p4_c,4,4
	.comm	_x_p4_c,4,4
	.comm	p11_l0,1,1
	.comm	_x_p11_l0,1,1
	.comm	p19_l0,1,1
	.comm	_x_p19_l0,1,1
	.comm	p10_l2,1,1
	.comm	_x_p10_l2,1,1
	.comm	p12_evt,1,1
	.comm	_x_p12_evt,1,1
	.comm	p8_evt,1,1
	.comm	_x_p8_evt,1,1
	.comm	p15_l0,1,1
	.comm	_x_p15_l0,1,1
	.comm	p17_c,4,4
	.comm	_x_p17_c,4,4
	.comm	p15_l1,1,1
	.comm	_x_p15_l1,1,1
	.comm	p17_evt,1,1
	.comm	_x_p17_evt,1,1
	.comm	p15_l2,1,1
	.comm	_x_p15_l2,1,1
	.comm	p15_l3,1,1
	.comm	_x_p15_l3,1,1
	.comm	p5_l3,1,1
	.comm	_x_p5_l3,1,1
	.comm	p16_evt,1,1
	.comm	_x_p16_evt,1,1
	.global	__aeabi_fcmpeq
	.global	__aeabi_fcmple
	.global	__aeabi_fcmpge
	.global	__aeabi_f2d
	.global	__aeabi_dsub
	.global	__aeabi_dadd
	.global	__aeabi_dcmpeq
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #8
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+4
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+8
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+12
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+16
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+20
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+24
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+28
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+32
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+36
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+40
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+44
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+48
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+52
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+56
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+60
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+64
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+68
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+72
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+76
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+80
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+84
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+88
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+92
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+96
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+100
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+104
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+108
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+112
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+116
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+120
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+124
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+128
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+132
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+136
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+140
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+144
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+148
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+152
	strb	r2, [r3]
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L2147+156
	str	r3, [r2]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+160
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+164
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+168
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+172
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+176
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+180
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+184
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+188
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+192
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+196
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+200
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+204
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+208
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+212
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+216
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+220
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+224
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+228
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+232
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+236
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+240
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+592
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+244
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+248
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+252
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+256
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+260
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+264
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+268
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+272
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+276
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+280
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+604
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+284
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+288
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+580
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+292
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+296
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+300
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+304
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+616
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+308
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+532
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+312
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+552
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+316
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+620
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+320
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+556
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+324
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+328
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+332
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+336
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+340
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+344
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+348
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+352
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+356
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+612
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+360
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+528
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+596
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+364
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+368
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+372
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+376
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+380
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+384
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+388
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+392
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+548
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+396
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+400
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+404
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+408
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+412
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+416
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+600
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+420
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+424
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+428
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+432
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+436
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+440
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+444
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+568
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+448
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+452
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+456
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+460
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+464
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+572
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+468
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+472
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+476
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+480
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+484
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+488
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+492
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+496
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+500
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+544
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+504
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+508
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+512
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+628
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2147+576
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+624
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+516
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+636
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+632
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+520
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2147+524
	strb	r2, [r3]
	ldr	r3, .L2147
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L2147+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L2147+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L2147+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L5
.L4:
	ldr	r3, .L2147
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L6
	ldr	r3, .L2147+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L6
	ldr	r3, .L2147+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L6
	ldr	r3, .L2147+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L5
.L6:
	ldr	r3, .L2147
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L7
	ldr	r3, .L2147+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
	ldr	r3, .L2147+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
	ldr	r3, .L2147+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L5
.L7:
	ldr	r3, .L2147
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L2147+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L2147+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L2147+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L5
.L8:
	ldr	r3, .L2147
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L9
	ldr	r3, .L2147+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L9
	ldr	r3, .L2147+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L9
	ldr	r3, .L2147+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L5
.L9:
	ldr	r3, .L2147
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L10
	ldr	r3, .L2147+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L10
	ldr	r3, .L2147+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L10
	ldr	r3, .L2147+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L5
.L10:
	ldr	r3, .L2147
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L11
	ldr	r3, .L2147+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L11
	ldr	r3, .L2147+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L11
	ldr	r3, .L2147+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L5
.L11:
	ldr	r3, .L2147
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L12
	ldr	r3, .L2147+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L12
	ldr	r3, .L2147+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L12
	ldr	r3, .L2147+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L5
.L12:
	ldr	r3, .L2147
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2147+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2147+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2147+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L5:
	ldr	r3, .L2147
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2147+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2147+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2147+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2147+464
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2147+464
	ldr	r3, [r3]	@ float
	ldr	r2, .L2147+348
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L15
	ldr	r3, .L2147
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L16
	ldr	r3, .L2147+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L16
	ldr	r3, .L2147+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L16
	ldr	r3, .L2147+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L16:
	ldr	r3, .L2147
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L17
	ldr	r3, .L2147+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L17
	ldr	r3, .L2147+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L17
	ldr	r3, .L2147+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L17:
	ldr	r3, .L2147
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L18
	ldr	r3, .L2147+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L18
	ldr	r3, .L2147+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L18
	ldr	r3, .L2147+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L18:
	ldr	r3, .L2147
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L15
	ldr	r3, .L2147+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L15
	ldr	r3, .L2147+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L15
	ldr	r3, .L2147+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L15:
	ldr	r3, .L2147+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L19
	ldr	r3, .L2147+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L19
	ldr	r3, .L2147+544
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L19
	ldr	r3, .L2147+548
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L20
.L19:
	ldr	r3, .L2147+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L21
	ldr	r3, .L2147+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L21
	ldr	r3, .L2147+544
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L21
	ldr	r3, .L2147+548
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L20
.L21:
	ldr	r3, .L2147+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L22
	ldr	r3, .L2147+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L22
	ldr	r3, .L2147+548
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L22
	ldr	r3, .L2147+544
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L20
.L22:
	ldr	r3, .L2147+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L23
	ldr	r3, .L2147+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L23
	ldr	r3, .L2147+544
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L23
	ldr	r3, .L2147+548
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L20
	b	.L2148
.L2149:
	.align	2
.L2147:
	.word	p20_l3
	.word	p20_l2
	.word	p19_l3
	.word	p19_l2
	.word	p18_l3
	.word	p20_evt
	.word	p18_l2
	.word	p17_l3
	.word	p19_evt
	.word	p17_l2
	.word	p16_l3
	.word	p10_l0
	.word	p6_c
	.word	p4_l0
	.word	p4_l2
	.word	p13_l1
	.word	p1_evt
	.word	p1_c
	.word	p0_l3
	.word	p0_l2
	.word	p0_l1
	.word	proposed7
	.word	proposed6
	.word	proposed5
	.word	p12_l0
	.word	proposed4
	.word	p7_l0
	.word	proposed3
	.word	proposed2
	.word	proposed1
	.word	p8_c
	.word	proposed0
	.word	inc_max_prop
	.word	max_prop
	.word	p20_l1
	.word	p11_l3
	.word	p2_l3
	.word	v2
	.word	p15_evt
	.word	v1
	.word	p15_c
	.word	delta
	.word	proposed8
	.word	p7_l1
	.word	p9_c
	.word	p12_l3
	.word	proposed9
	.word	p12_l1
	.word	p14_c
	.word	proposed10
	.word	p12_l2
	.word	p14_evt
	.word	p3_l0
	.word	p5_c
	.word	p3_l3
	.word	p8_l1
	.word	p10_c
	.word	p13_l3
	.word	proposed11
	.word	p3_l1
	.word	p5_evt
	.word	p8_l2
	.word	p10_evt
	.word	proposed12
	.word	proposed13
	.word	proposed14
	.word	proposed15
	.word	p13_c
	.word	p11_l1
	.word	p2_l1
	.word	p4_evt
	.word	p3_c
	.word	p1_l0
	.word	p6_l0
	.word	p6_l1
	.word	p7_l2
	.word	p9_evt
	.word	p1_l2
	.word	p6_l2
	.word	p7_l3
	.word	p1_l1
	.word	p3_evt
	.word	p20_l0
	.word	p11_l2
	.word	p2_l2
	.word	p13_evt
	.word	p1_l3
	.word	proposed20
	.word	p6_l3
	.word	p18_evt
	.word	p3_l2
	.word	p8_l3
	.word	p4_l3
	.word	p13_l2
	.word	p0_c
	.word	p0_l0
	.word	p0_evt
	.word	p5_l0
	.word	p7_c
	.word	p10_l3
	.word	p4_l1
	.word	p13_l0
	.word	p6_evt
	.word	_diverge_delta
	.word	p5_l2
	.word	p5_l1
	.word	p7_evt
	.word	p10_l1
	.word	p12_c
	.word	p8_l0
	.word	p9_l0
	.word	p14_l0
	.word	p11_evt
	.word	p2_evt
	.word	p9_l2
	.word	p14_l1
	.word	p20_c
	.word	p9_l3
	.word	p14_l2
	.word	p2_c
	.word	p9_l1
	.word	p11_c
	.word	p14_l3
	.word	p2_l0
	.word	p4_c
	.word	p11_l0
	.word	p10_l2
	.word	p12_evt
	.word	p8_evt
	.word	p17_evt
	.word	p5_l3
	.word	p16_evt
	.word	p19_c
	.word	proposed19
	.word	p19_l3
	.word	p19_l2
	.word	p19_l0
	.word	p19_l1
	.word	p18_c
	.word	proposed18
	.word	p18_l3
	.word	p18_l2
	.word	p18_l0
	.word	p18_l1
	.word	p17_c
	.word	proposed17
	.word	p17_l3
	.word	p17_l2
	.word	p17_l0
	.word	p17_l1
	.word	p16_c
	.word	proposed16
	.word	p16_l3
	.word	p16_l2
	.word	p16_l0
	.word	p16_l1
	.word	p15_l1
	.word	p15_l0
	.word	p15_l3
	.word	p15_l2
.L2148:
.L23:
	ldr	r3, .L2147+536
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L24
	ldr	r3, .L2147+540
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L24
	ldr	r3, .L2147+544
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L24
	ldr	r3, .L2147+548
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L20
.L24:
	ldr	r3, .L2147+536
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L25
	ldr	r3, .L2147+540
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L25
	ldr	r3, .L2147+544
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L25
	ldr	r3, .L2147+548
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L20
.L25:
	ldr	r3, .L2147+536
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L26
	ldr	r3, .L2147+540
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L26
	ldr	r3, .L2147+548
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L26
	ldr	r3, .L2147+544
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L20
.L26:
	ldr	r3, .L2147+536
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L27
	ldr	r3, .L2147+540
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L27
	ldr	r3, .L2147+544
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L27
	ldr	r3, .L2147+548
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L20
.L27:
	ldr	r3, .L2147+536
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2147+540
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2147+544
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2147+548
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L20:
	ldr	r3, .L2147+536
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2147+540
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2147+544
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2147+548
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2147+528
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2147+528
	ldr	r3, [r3]	@ float
	ldr	r2, .L2147+532
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L29
	ldr	r3, .L2147+536
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L30
	ldr	r3, .L2147+540
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L30
	ldr	r3, .L2147+544
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L30
	ldr	r3, .L2147+548
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L30:
	ldr	r3, .L2147+536
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L31
	ldr	r3, .L2147+540
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L31
	ldr	r3, .L2147+544
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L31
	ldr	r3, .L2147+548
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L31:
	ldr	r3, .L2147+536
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L32
	ldr	r3, .L2147+540
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L32
	ldr	r3, .L2147+544
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L32
	ldr	r3, .L2147+548
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L32:
	ldr	r3, .L2147+536
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L29
	ldr	r3, .L2147+540
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L29
	ldr	r3, .L2147+544
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L29
	ldr	r3, .L2147+548
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L29:
	ldr	r3, .L2147+560
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L33
	ldr	r3, .L2147+564
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L33
	ldr	r3, .L2147+568
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L33
	ldr	r3, .L2147+572
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L34
.L33:
	ldr	r3, .L2147+560
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L35
	ldr	r3, .L2147+564
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L35
	ldr	r3, .L2147+568
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L35
	ldr	r3, .L2147+572
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L34
.L35:
	ldr	r3, .L2147+560
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L36
	ldr	r3, .L2147+564
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L36
	ldr	r3, .L2147+572
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L36
	ldr	r3, .L2147+568
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L34
.L36:
	ldr	r3, .L2147+560
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L37
	ldr	r3, .L2147+564
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L37
	ldr	r3, .L2147+568
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L37
	ldr	r3, .L2147+572
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L34
.L37:
	ldr	r3, .L2147+560
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L38
	ldr	r3, .L2147+564
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L38
	ldr	r3, .L2147+568
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L38
	ldr	r3, .L2147+572
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L34
.L38:
	ldr	r3, .L2147+560
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L39
	ldr	r3, .L2147+564
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L39
	ldr	r3, .L2147+568
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L39
	ldr	r3, .L2147+572
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L34
.L39:
	ldr	r3, .L2147+560
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L40
	ldr	r3, .L2147+564
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L40
	ldr	r3, .L2147+572
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L40
	ldr	r3, .L2147+568
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L34
.L40:
	ldr	r3, .L2147+560
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L41
	ldr	r3, .L2147+564
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L41
	ldr	r3, .L2147+568
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L41
	ldr	r3, .L2147+572
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L34
.L41:
	ldr	r3, .L2147+560
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2147+564
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2147+568
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2147+572
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L34:
	ldr	r3, .L2147+560
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2147+564
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2147+568
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2147+572
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2147+552
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2147+552
	ldr	r3, [r3]	@ float
	ldr	r2, .L2147+556
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L43
	ldr	r3, .L2147+560
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L44
	ldr	r3, .L2147+564
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L44
	ldr	r3, .L2147+568
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L44
	ldr	r3, .L2147+572
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L44:
	ldr	r3, .L2147+560
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L45
	ldr	r3, .L2147+564
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L45
	ldr	r3, .L2147+568
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L45
	ldr	r3, .L2147+572
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L45:
	ldr	r3, .L2147+560
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L46
	ldr	r3, .L2147+564
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L46
	ldr	r3, .L2147+568
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L46
	ldr	r3, .L2147+572
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L46:
	ldr	r3, .L2147+560
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L43
	ldr	r3, .L2147+564
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L43
	ldr	r3, .L2147+568
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L43
	ldr	r3, .L2147+572
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L43:
	ldr	r3, .L2147+584
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L47
	ldr	r3, .L2147+588
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L47
	ldr	r3, .L2147+592
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L47
	ldr	r3, .L2147+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L48
.L47:
	ldr	r3, .L2147+584
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L49
	ldr	r3, .L2147+588
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L49
	ldr	r3, .L2147+592
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L49
	ldr	r3, .L2147+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L48
.L49:
	ldr	r3, .L2147+584
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L50
	ldr	r3, .L2147+588
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L50
	ldr	r3, .L2147+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L50
	ldr	r3, .L2147+592
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L48
.L50:
	ldr	r3, .L2147+584
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L51
	ldr	r3, .L2147+588
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L51
	ldr	r3, .L2147+592
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L51
	ldr	r3, .L2147+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L48
.L51:
	ldr	r3, .L2147+584
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L52
	ldr	r3, .L2147+588
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L52
	ldr	r3, .L2147+592
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L52
	ldr	r3, .L2147+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L48
.L52:
	ldr	r3, .L2147+584
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L53
	ldr	r3, .L2147+588
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L53
	ldr	r3, .L2147+592
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L53
	ldr	r3, .L2147+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L48
.L53:
	ldr	r3, .L2147+584
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L54
	ldr	r3, .L2147+588
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L54
	ldr	r3, .L2147+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L54
	ldr	r3, .L2147+592
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L48
.L54:
	ldr	r3, .L2147+584
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L55
	ldr	r3, .L2147+588
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L55
	ldr	r3, .L2147+592
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L55
	ldr	r3, .L2147+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L48
.L55:
	ldr	r3, .L2147+584
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2147+588
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2147+592
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2147+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L48:
	ldr	r3, .L2147+584
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2147+588
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2147+592
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2147+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2147+576
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2147+576
	ldr	r3, [r3]	@ float
	ldr	r2, .L2147+580
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L57
	ldr	r3, .L2147+584
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L58
	ldr	r3, .L2147+588
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L58
	ldr	r3, .L2147+592
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L58
	ldr	r3, .L2147+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L58:
	ldr	r3, .L2147+584
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L59
	ldr	r3, .L2147+588
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L59
	ldr	r3, .L2147+592
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L59
	ldr	r3, .L2147+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L59:
	ldr	r3, .L2147+584
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L60
	ldr	r3, .L2147+588
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L60
	ldr	r3, .L2147+592
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L60
	ldr	r3, .L2147+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L60:
	ldr	r3, .L2147+584
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L57
	ldr	r3, .L2147+588
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L57
	ldr	r3, .L2147+592
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L57
	ldr	r3, .L2147+596
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L57:
	ldr	r3, .L2147+608
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L61
	ldr	r3, .L2147+612
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L61
	ldr	r3, .L2147+616
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L61
	ldr	r3, .L2147+620
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L62
.L61:
	ldr	r3, .L2147+608
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L63
	ldr	r3, .L2147+612
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L63
	ldr	r3, .L2147+616
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L63
	ldr	r3, .L2147+620
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L62
.L63:
	ldr	r3, .L2147+608
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L64
	ldr	r3, .L2147+612
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L64
	ldr	r3, .L2147+620
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L64
	ldr	r3, .L2147+616
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L62
.L64:
	ldr	r3, .L2147+608
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L65
	ldr	r3, .L2147+612
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L65
	ldr	r3, .L2147+616
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L65
	ldr	r3, .L2147+620
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L62
.L65:
	ldr	r3, .L2147+608
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L66
	ldr	r3, .L2147+612
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L66
	ldr	r3, .L2147+616
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L66
	ldr	r3, .L2147+620
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L62
.L66:
	ldr	r3, .L2147+608
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L67
	ldr	r3, .L2147+612
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L67
	ldr	r3, .L2147+616
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L67
	ldr	r3, .L2147+620
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L62
.L67:
	ldr	r3, .L2147+608
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L68
	ldr	r3, .L2147+612
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L68
	ldr	r3, .L2147+620
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L68
	ldr	r3, .L2147+616
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L62
.L68:
	ldr	r3, .L2147+608
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L69
	ldr	r3, .L2147+612
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L69
	ldr	r3, .L2147+616
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L69
	ldr	r3, .L2147+620
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L62
.L69:
	ldr	r3, .L2147+608
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2147+612
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2147+616
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2147+620
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L62:
	ldr	r3, .L2147+608
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2147+612
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2147+616
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2147+620
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2147+600
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2147+600
	ldr	r3, [r3]	@ float
	ldr	r2, .L2147+604
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L71
	ldr	r3, .L2147+608
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L72
	ldr	r3, .L2147+612
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L72
	ldr	r3, .L2147+616
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L72
	ldr	r3, .L2147+620
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L72:
	ldr	r3, .L2147+608
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L73
	ldr	r3, .L2147+612
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L73
	ldr	r3, .L2147+616
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L73
	ldr	r3, .L2147+620
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L73:
	ldr	r3, .L2147+608
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L74
	ldr	r3, .L2147+612
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L74
	ldr	r3, .L2147+616
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L74
	ldr	r3, .L2147+620
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L74:
	ldr	r3, .L2147+608
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L71
	ldr	r3, .L2147+612
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L71
	ldr	r3, .L2147+616
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L71
	ldr	r3, .L2147+620
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L71:
	ldr	r3, .L2147+632
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L75
	ldr	r3, .L2147+636
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L75
	ldr	r3, .L2147+628
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L75
	ldr	r3, .L2147+624
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L76
.L75:
	ldr	r3, .L2147+632
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L77
	ldr	r3, .L2147+636
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L77
	ldr	r3, .L2147+628
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L77
	ldr	r3, .L2147+624
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L76
.L77:
	ldr	r3, .L2147+632
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L78
	ldr	r3, .L2147+636
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L78
	ldr	r3, .L2147+624
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L78
	ldr	r3, .L2147+628
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L76
.L78:
	ldr	r3, .L2147+632
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L79
	ldr	r3, .L2147+636
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L79
	ldr	r3, .L2147+628
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L79
	ldr	r3, .L2147+624
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L76
.L79:
	ldr	r3, .L2147+632
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L80
	ldr	r3, .L2147+636
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L80
	ldr	r3, .L2147+628
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L80
	ldr	r3, .L2147+624
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L76
.L80:
	ldr	r3, .L2147+632
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L81
	ldr	r3, .L2147+636
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L81
	ldr	r3, .L2147+628
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L81
	ldr	r3, .L2147+624
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L76
.L81:
	ldr	r3, .L2147+632
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L82
	ldr	r3, .L2147+636
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L82
	ldr	r3, .L2147+624
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L82
	ldr	r3, .L2147+628
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L76
.L82:
	ldr	r3, .L2147+632
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L83
	ldr	r3, .L2147+636
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L83
	ldr	r3, .L2150
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L83
	ldr	r3, .L2150+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L76
.L83:
	ldr	r3, .L2150+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2150+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L76:
	ldr	r3, .L2150+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2150+16
	ldr	r3, [r3]	@ float
	ldr	r2, .L2150+20
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L85
	ldr	r3, .L2150+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L86
	ldr	r3, .L2150+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L86
	ldr	r3, .L2150
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L86
	ldr	r3, .L2150+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L86:
	ldr	r3, .L2150+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L87
	ldr	r3, .L2150+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L87
	ldr	r3, .L2150
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L87
	ldr	r3, .L2150+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L87:
	ldr	r3, .L2150+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L88
	ldr	r3, .L2150+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L88
	ldr	r3, .L2150
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L88
	ldr	r3, .L2150+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L88:
	ldr	r3, .L2150+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L85
	ldr	r3, .L2150+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L85
	ldr	r3, .L2150
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L85
	ldr	r3, .L2150+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L85:
	ldr	r3, .L2150+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L2150+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L2150+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L2150+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L90
.L89:
	ldr	r3, .L2150+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L91
	ldr	r3, .L2150+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
	ldr	r3, .L2150+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
	ldr	r3, .L2150+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L90
.L91:
	ldr	r3, .L2150+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L92
	ldr	r3, .L2150+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L92
	ldr	r3, .L2150+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L92
	ldr	r3, .L2150+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L90
.L92:
	ldr	r3, .L2150+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L93
	ldr	r3, .L2150+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L93
	ldr	r3, .L2150+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L93
	ldr	r3, .L2150+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L90
.L93:
	ldr	r3, .L2150+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L94
	ldr	r3, .L2150+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L94
	ldr	r3, .L2150+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L94
	ldr	r3, .L2150+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L90
.L94:
	ldr	r3, .L2150+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L95
	ldr	r3, .L2150+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L95
	ldr	r3, .L2150+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L95
	ldr	r3, .L2150+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L90
.L95:
	ldr	r3, .L2150+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L96
	ldr	r3, .L2150+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L96
	ldr	r3, .L2150+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L96
	ldr	r3, .L2150+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L90
.L96:
	ldr	r3, .L2150+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L97
	ldr	r3, .L2150+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L97
	ldr	r3, .L2150+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L97
	ldr	r3, .L2150+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L90
.L97:
	ldr	r3, .L2150+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2150+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L90:
	ldr	r3, .L2150+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+40
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2150+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L2150+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L99
	ldr	r3, .L2150+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L100
	ldr	r3, .L2150+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L100
	ldr	r3, .L2150+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L100
	ldr	r3, .L2150+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L100:
	ldr	r3, .L2150+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L101
	ldr	r3, .L2150+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L101
	ldr	r3, .L2150+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L101
	ldr	r3, .L2150+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L101:
	ldr	r3, .L2150+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L102
	ldr	r3, .L2150+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L102
	ldr	r3, .L2150+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L102
	ldr	r3, .L2150+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L102:
	ldr	r3, .L2150+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L99
	ldr	r3, .L2150+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L99
	ldr	r3, .L2150+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L99
	ldr	r3, .L2150+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L99:
	ldr	r3, .L2150+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L103
	ldr	r3, .L2150+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L103
	ldr	r3, .L2150+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L103
	ldr	r3, .L2150+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L104
.L103:
	ldr	r3, .L2150+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L105
	ldr	r3, .L2150+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L105
	ldr	r3, .L2150+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L105
	ldr	r3, .L2150+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L104
.L105:
	ldr	r3, .L2150+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L106
	ldr	r3, .L2150+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L106
	ldr	r3, .L2150+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L106
	ldr	r3, .L2150+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L104
.L106:
	ldr	r3, .L2150+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L107
	ldr	r3, .L2150+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L107
	ldr	r3, .L2150+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L107
	ldr	r3, .L2150+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L104
.L107:
	ldr	r3, .L2150+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L108
	ldr	r3, .L2150+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L108
	ldr	r3, .L2150+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L108
	ldr	r3, .L2150+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L104
.L108:
	ldr	r3, .L2150+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L109
	ldr	r3, .L2150+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L109
	ldr	r3, .L2150+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L109
	ldr	r3, .L2150+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L104
.L109:
	ldr	r3, .L2150+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L110
	ldr	r3, .L2150+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L110
	ldr	r3, .L2150+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L110
	ldr	r3, .L2150+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L104
.L110:
	ldr	r3, .L2150+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L111
	ldr	r3, .L2150+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L111
	ldr	r3, .L2150+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L111
	ldr	r3, .L2150+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L104
.L111:
	ldr	r3, .L2150+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2150+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L104:
	ldr	r3, .L2150+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+64
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2150+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2150+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L113
	ldr	r3, .L2150+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L114
	ldr	r3, .L2150+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L114
	ldr	r3, .L2150+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L114
	ldr	r3, .L2150+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L114:
	ldr	r3, .L2150+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L115
	ldr	r3, .L2150+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L115
	ldr	r3, .L2150+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L115
	ldr	r3, .L2150+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L115:
	ldr	r3, .L2150+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L116
	ldr	r3, .L2150+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L116
	ldr	r3, .L2150+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L116
	ldr	r3, .L2150+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L116:
	ldr	r3, .L2150+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L113
	ldr	r3, .L2150+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L113
	ldr	r3, .L2150+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L113
	ldr	r3, .L2150+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L113:
	ldr	r3, .L2150+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L2150+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L117
	ldr	r3, .L2150+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L117
	ldr	r3, .L2150+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L118
.L117:
	ldr	r3, .L2150+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L119
	ldr	r3, .L2150+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L119
	ldr	r3, .L2150+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L119
	ldr	r3, .L2150+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L118
.L119:
	ldr	r3, .L2150+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L120
	ldr	r3, .L2150+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L120
	ldr	r3, .L2150+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L120
	ldr	r3, .L2150+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L118
.L120:
	ldr	r3, .L2150+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L121
	ldr	r3, .L2150+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L121
	ldr	r3, .L2150+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L121
	ldr	r3, .L2150+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L118
.L121:
	ldr	r3, .L2150+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L122
	ldr	r3, .L2150+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L122
	ldr	r3, .L2150+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L122
	ldr	r3, .L2150+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L118
.L122:
	ldr	r3, .L2150+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L123
	ldr	r3, .L2150+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L123
	ldr	r3, .L2150+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L123
	ldr	r3, .L2150+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L118
.L123:
	ldr	r3, .L2150+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L124
	ldr	r3, .L2150+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L124
	ldr	r3, .L2150+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L124
	ldr	r3, .L2150+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L118
.L124:
	ldr	r3, .L2150+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L125
	ldr	r3, .L2150+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L125
	ldr	r3, .L2150+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L125
	ldr	r3, .L2150+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L118
.L125:
	ldr	r3, .L2150+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2150+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L118:
	ldr	r3, .L2150+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2150+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L2150+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L127
	ldr	r3, .L2150+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L128
	ldr	r3, .L2150+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L128
	ldr	r3, .L2150+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L128
	ldr	r3, .L2150+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L128:
	ldr	r3, .L2150+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L129
	ldr	r3, .L2150+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L129
	ldr	r3, .L2150+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L129
	ldr	r3, .L2150+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L129:
	ldr	r3, .L2150+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L130
	ldr	r3, .L2150+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L130
	ldr	r3, .L2150+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L130
	ldr	r3, .L2150+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L130:
	ldr	r3, .L2150+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L127
	ldr	r3, .L2150+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L127
	ldr	r3, .L2150+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L127
	ldr	r3, .L2150+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L127:
	ldr	r3, .L2150+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L131
	ldr	r3, .L2150+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L131
	ldr	r3, .L2150+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L131
	ldr	r3, .L2150+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L132
.L131:
	ldr	r3, .L2150+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L133
	ldr	r3, .L2150+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L133
	ldr	r3, .L2150+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L133
	ldr	r3, .L2150+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L132
.L133:
	ldr	r3, .L2150+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L134
	ldr	r3, .L2150+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L134
	ldr	r3, .L2150+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L134
	ldr	r3, .L2150+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L132
.L134:
	ldr	r3, .L2150+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L135
	ldr	r3, .L2150+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L135
	ldr	r3, .L2150+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L135
	ldr	r3, .L2150+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L132
.L135:
	ldr	r3, .L2150+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L136
	ldr	r3, .L2150+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L136
	ldr	r3, .L2150+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L136
	ldr	r3, .L2150+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L132
.L136:
	ldr	r3, .L2150+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L137
	ldr	r3, .L2150+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L137
	ldr	r3, .L2150+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L137
	ldr	r3, .L2150+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L132
.L137:
	ldr	r3, .L2150+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L138
	ldr	r3, .L2150+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L138
	ldr	r3, .L2150+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L138
	ldr	r3, .L2150+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L132
.L138:
	ldr	r3, .L2150+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L139
	ldr	r3, .L2150+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L139
	ldr	r3, .L2150+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L139
	ldr	r3, .L2150+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L132
.L139:
	ldr	r3, .L2150+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2150+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L132:
	ldr	r3, .L2150+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+96
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2150+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L2150+100
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	b	.L2151
.L2152:
	.align	2
.L2150:
	.word	p15_l0
	.word	p15_l1
	.word	p15_l3
	.word	p15_l2
	.word	p15_c
	.word	proposed15
	.word	p14_l3
	.word	p14_l2
	.word	p14_l0
	.word	p14_l1
	.word	p14_c
	.word	proposed14
	.word	p13_l3
	.word	p13_l2
	.word	p13_l0
	.word	p13_l1
	.word	p13_c
	.word	proposed13
	.word	p12_l3
	.word	p12_l2
	.word	p12_l0
	.word	p12_l1
	.word	p12_c
	.word	proposed12
	.word	p11_c
	.word	proposed11
	.word	p11_l3
	.word	p11_l2
	.word	p11_l0
	.word	p11_l1
	.word	p10_c
	.word	proposed10
	.word	p10_l3
	.word	p10_l2
	.word	p10_l0
	.word	p10_l1
	.word	p9_c
	.word	proposed9
	.word	p9_l3
	.word	p9_l2
	.word	p9_l0
	.word	p9_l1
	.word	p8_c
	.word	proposed8
	.word	p8_l3
	.word	p8_l2
	.word	p8_l0
	.word	p8_l1
	.word	p7_c
	.word	proposed7
	.word	p7_l2
	.word	p7_l0
	.word	p7_l1
	.word	p7_l3
.L2151:
	mov	r3, r0
	cmp	r3, #0
	bne	.L141
	ldr	r3, .L2150+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L142
	ldr	r3, .L2150+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L142
	ldr	r3, .L2150+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L142
	ldr	r3, .L2150+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L142:
	ldr	r3, .L2150+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L143
	ldr	r3, .L2150+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L143
	ldr	r3, .L2150+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L143
	ldr	r3, .L2150+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L143:
	ldr	r3, .L2150+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L144
	ldr	r3, .L2150+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L144
	ldr	r3, .L2150+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L144
	ldr	r3, .L2150+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L144:
	ldr	r3, .L2150+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L141
	ldr	r3, .L2150+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L141
	ldr	r3, .L2150+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L141
	ldr	r3, .L2150+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L141:
	ldr	r3, .L2150+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L145
	ldr	r3, .L2150+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L145
	ldr	r3, .L2150+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L145
	ldr	r3, .L2150+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L146
.L145:
	ldr	r3, .L2150+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L147
	ldr	r3, .L2150+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L147
	ldr	r3, .L2150+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L147
	ldr	r3, .L2150+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L146
.L147:
	ldr	r3, .L2150+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L148
	ldr	r3, .L2150+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L148
	ldr	r3, .L2150+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L148
	ldr	r3, .L2150+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L146
.L148:
	ldr	r3, .L2150+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L2150+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L2150+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L2150+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L146
.L149:
	ldr	r3, .L2150+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L150
	ldr	r3, .L2150+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L150
	ldr	r3, .L2150+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L150
	ldr	r3, .L2150+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L146
.L150:
	ldr	r3, .L2150+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L151
	ldr	r3, .L2150+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L151
	ldr	r3, .L2150+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L151
	ldr	r3, .L2150+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L146
.L151:
	ldr	r3, .L2150+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L152
	ldr	r3, .L2150+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L152
	ldr	r3, .L2150+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L152
	ldr	r3, .L2150+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L146
.L152:
	ldr	r3, .L2150+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L153
	ldr	r3, .L2150+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L153
	ldr	r3, .L2150+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L153
	ldr	r3, .L2150+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L146
.L153:
	ldr	r3, .L2150+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2150+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L146:
	ldr	r3, .L2150+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2150+120
	ldr	r3, [r3]	@ float
	ldr	r2, .L2150+124
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L155
	ldr	r3, .L2150+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L156
	ldr	r3, .L2150+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L156
	ldr	r3, .L2150+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L156
	ldr	r3, .L2150+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L156:
	ldr	r3, .L2150+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L2150+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L2150+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L2150+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L157:
	ldr	r3, .L2150+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L158
	ldr	r3, .L2150+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L158
	ldr	r3, .L2150+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L158
	ldr	r3, .L2150+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L158:
	ldr	r3, .L2150+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L155
	ldr	r3, .L2150+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L155
	ldr	r3, .L2150+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L155
	ldr	r3, .L2150+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L155:
	ldr	r3, .L2150+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L2150+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L159
	ldr	r3, .L2150+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L159
	ldr	r3, .L2150+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L160
.L159:
	ldr	r3, .L2150+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L161
	ldr	r3, .L2150+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L161
	ldr	r3, .L2150+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L161
	ldr	r3, .L2150+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L160
.L161:
	ldr	r3, .L2150+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L162
	ldr	r3, .L2150+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L162
	ldr	r3, .L2150+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L162
	ldr	r3, .L2150+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L160
.L162:
	ldr	r3, .L2150+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L163
	ldr	r3, .L2150+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L163
	ldr	r3, .L2150+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L163
	ldr	r3, .L2150+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L160
.L163:
	ldr	r3, .L2150+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L164
	ldr	r3, .L2150+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L164
	ldr	r3, .L2150+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L164
	ldr	r3, .L2150+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L160
.L164:
	ldr	r3, .L2150+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L165
	ldr	r3, .L2150+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L165
	ldr	r3, .L2150+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L165
	ldr	r3, .L2150+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L160
.L165:
	ldr	r3, .L2150+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L166
	ldr	r3, .L2150+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L166
	ldr	r3, .L2150+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L166
	ldr	r3, .L2150+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L160
.L166:
	ldr	r3, .L2150+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L167
	ldr	r3, .L2150+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L167
	ldr	r3, .L2150+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L167
	ldr	r3, .L2150+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L160
.L167:
	ldr	r3, .L2150+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2150+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L160:
	ldr	r3, .L2150+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2150+144
	ldr	r3, [r3]	@ float
	ldr	r2, .L2150+148
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L169
	ldr	r3, .L2150+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L170
	ldr	r3, .L2150+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L170
	ldr	r3, .L2150+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L170
	ldr	r3, .L2150+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L170:
	ldr	r3, .L2150+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L171
	ldr	r3, .L2150+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L171
	ldr	r3, .L2150+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L171
	ldr	r3, .L2150+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L171:
	ldr	r3, .L2150+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L172
	ldr	r3, .L2150+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L172
	ldr	r3, .L2150+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L172
	ldr	r3, .L2150+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L172:
	ldr	r3, .L2150+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L169
	ldr	r3, .L2150+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L169
	ldr	r3, .L2150+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L169
	ldr	r3, .L2150+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L169:
	ldr	r3, .L2150+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L173
	ldr	r3, .L2150+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L173
	ldr	r3, .L2150+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L173
	ldr	r3, .L2150+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L174
.L173:
	ldr	r3, .L2150+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L175
	ldr	r3, .L2150+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L175
	ldr	r3, .L2150+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L175
	ldr	r3, .L2150+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L174
.L175:
	ldr	r3, .L2150+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L176
	ldr	r3, .L2150+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L176
	ldr	r3, .L2150+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L176
	ldr	r3, .L2150+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L174
.L176:
	ldr	r3, .L2150+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L177
	ldr	r3, .L2150+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L177
	ldr	r3, .L2150+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L177
	ldr	r3, .L2150+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L174
.L177:
	ldr	r3, .L2150+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L178
	ldr	r3, .L2150+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L178
	ldr	r3, .L2150+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L178
	ldr	r3, .L2150+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L174
.L178:
	ldr	r3, .L2150+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L179
	ldr	r3, .L2150+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L179
	ldr	r3, .L2150+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L179
	ldr	r3, .L2150+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L174
.L179:
	ldr	r3, .L2150+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L180
	ldr	r3, .L2150+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L180
	ldr	r3, .L2150+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L180
	ldr	r3, .L2150+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L174
.L180:
	ldr	r3, .L2150+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L181
	ldr	r3, .L2150+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L181
	ldr	r3, .L2150+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L181
	ldr	r3, .L2150+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L174
.L181:
	ldr	r3, .L2150+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2150+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L174:
	ldr	r3, .L2150+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+168
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2150+168
	ldr	r3, [r3]	@ float
	ldr	r2, .L2150+172
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L183
	ldr	r3, .L2150+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L184
	ldr	r3, .L2150+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L184
	ldr	r3, .L2150+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L184
	ldr	r3, .L2150+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L184:
	ldr	r3, .L2150+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L185
	ldr	r3, .L2150+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L185
	ldr	r3, .L2150+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L185
	ldr	r3, .L2150+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L185:
	ldr	r3, .L2150+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L186
	ldr	r3, .L2150+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L186
	ldr	r3, .L2150+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L186
	ldr	r3, .L2150+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L186:
	ldr	r3, .L2150+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L183
	ldr	r3, .L2150+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L183
	ldr	r3, .L2150+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L183
	ldr	r3, .L2150+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L183:
	ldr	r3, .L2150+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L187
	ldr	r3, .L2150+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L187
	ldr	r3, .L2150+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L187
	ldr	r3, .L2150+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L188
.L187:
	ldr	r3, .L2150+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L189
	ldr	r3, .L2150+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L189
	ldr	r3, .L2150+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L189
	ldr	r3, .L2150+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L188
.L189:
	ldr	r3, .L2150+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L190
	ldr	r3, .L2150+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L190
	ldr	r3, .L2150+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L190
	ldr	r3, .L2150+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L188
.L190:
	ldr	r3, .L2150+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L191
	ldr	r3, .L2150+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L191
	ldr	r3, .L2150+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L191
	ldr	r3, .L2150+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L188
.L191:
	ldr	r3, .L2150+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L192
	ldr	r3, .L2150+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L192
	ldr	r3, .L2150+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L192
	ldr	r3, .L2150+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L188
.L192:
	ldr	r3, .L2150+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L193
	ldr	r3, .L2150+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L193
	ldr	r3, .L2150+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L193
	ldr	r3, .L2150+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L188
.L193:
	ldr	r3, .L2150+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L194
	ldr	r3, .L2150+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L194
	ldr	r3, .L2150+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L194
	ldr	r3, .L2150+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L188
.L194:
	ldr	r3, .L2150+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L195
	ldr	r3, .L2150+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L195
	ldr	r3, .L2150+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L195
	ldr	r3, .L2150+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L188
.L195:
	ldr	r3, .L2150+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2150+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L188:
	ldr	r3, .L2150+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2150+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2150+192
	ldr	r3, [r3]	@ float
	ldr	r2, .L2150+196
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L197
	ldr	r3, .L2150+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L198
	ldr	r3, .L2150+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L198
	ldr	r3, .L2150+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L198
	ldr	r3, .L2150+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L198:
	ldr	r3, .L2150+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L199
	ldr	r3, .L2150+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L199
	ldr	r3, .L2150+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L199
	ldr	r3, .L2150+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L199:
	ldr	r3, .L2150+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L200
	ldr	r3, .L2150+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L200
	ldr	r3, .L2150+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L200
	ldr	r3, .L2150+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L200:
	ldr	r3, .L2150+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L197
	ldr	r3, .L2153
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L197
	ldr	r3, .L2153+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L197
	ldr	r3, .L2153+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L197:
	ldr	r3, .L2153+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L201
	ldr	r3, .L2153+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L201
	ldr	r3, .L2153+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L201
	ldr	r3, .L2153+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L202
.L201:
	ldr	r3, .L2153+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L203
	ldr	r3, .L2153+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L203
	ldr	r3, .L2153+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L203
	ldr	r3, .L2153+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L202
.L203:
	ldr	r3, .L2153+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L204
	ldr	r3, .L2153+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L204
	ldr	r3, .L2153+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L204
	ldr	r3, .L2153+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L202
.L204:
	ldr	r3, .L2153+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L205
	ldr	r3, .L2153+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L205
	ldr	r3, .L2153+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L205
	ldr	r3, .L2153+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L202
.L205:
	ldr	r3, .L2153+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L206
	ldr	r3, .L2153+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L206
	ldr	r3, .L2153+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L206
	ldr	r3, .L2153+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L202
.L206:
	ldr	r3, .L2153+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L2153+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L2153+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L2153+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L202
.L207:
	ldr	r3, .L2153+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L208
	ldr	r3, .L2153+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L208
	ldr	r3, .L2153+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L208
	ldr	r3, .L2153+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L202
.L208:
	ldr	r3, .L2153+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L209
	ldr	r3, .L2153+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L209
	ldr	r3, .L2153+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L209
	ldr	r3, .L2153+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L202
.L209:
	ldr	r3, .L2153+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L202:
	ldr	r3, .L2153+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L2153+172
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L211
	ldr	r3, .L2153+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L212
	ldr	r3, .L2153+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L212
	ldr	r3, .L2153+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L212
	ldr	r3, .L2153+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L212:
	ldr	r3, .L2153+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L213
	ldr	r3, .L2153+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L213
	ldr	r3, .L2153+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L213
	ldr	r3, .L2153+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L213:
	ldr	r3, .L2153+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L214
	ldr	r3, .L2153+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L214
	ldr	r3, .L2153+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L214
	ldr	r3, .L2153+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L214:
	ldr	r3, .L2153+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L211
	ldr	r3, .L2153+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L211
	ldr	r3, .L2153+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L211
	ldr	r3, .L2153+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L211:
	ldr	r3, .L2153+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L215
	ldr	r3, .L2153+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L215
	ldr	r3, .L2153+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L215
	ldr	r3, .L2153+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L216
.L215:
	ldr	r3, .L2153+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L217
	ldr	r3, .L2153+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L217
	ldr	r3, .L2153+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L217
	ldr	r3, .L2153+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L216
.L217:
	ldr	r3, .L2153+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L218
	ldr	r3, .L2153+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L218
	ldr	r3, .L2153+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L218
	ldr	r3, .L2153+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L216
.L218:
	ldr	r3, .L2153+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L219
	ldr	r3, .L2153+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L219
	ldr	r3, .L2153+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L219
	ldr	r3, .L2153+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L216
.L219:
	ldr	r3, .L2153+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L220
	ldr	r3, .L2153+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L220
	ldr	r3, .L2153+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L220
	ldr	r3, .L2153+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L216
.L220:
	ldr	r3, .L2153+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L221
	ldr	r3, .L2153+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L221
	ldr	r3, .L2153+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L221
	ldr	r3, .L2153+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L216
.L221:
	ldr	r3, .L2153+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L222
	ldr	r3, .L2153+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L222
	ldr	r3, .L2153+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L222
	ldr	r3, .L2153+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L216
.L222:
	ldr	r3, .L2153+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L223
	ldr	r3, .L2153+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L223
	ldr	r3, .L2153+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L223
	ldr	r3, .L2153+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L216
.L223:
	ldr	r3, .L2153+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L216:
	ldr	r3, .L2153+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L2153+168
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L225
	ldr	r3, .L2153+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L226
	ldr	r3, .L2153+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L226
	ldr	r3, .L2153+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L226
	ldr	r3, .L2153+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L226:
	ldr	r3, .L2153+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L227
	ldr	r3, .L2153+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L227
	ldr	r3, .L2153+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L227
	ldr	r3, .L2153+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L227:
	ldr	r3, .L2153+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L228
	ldr	r3, .L2153+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L228
	ldr	r3, .L2153+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L228
	ldr	r3, .L2153+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L228:
	ldr	r3, .L2153+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L225
	ldr	r3, .L2153+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L225
	ldr	r3, .L2153+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L225
	ldr	r3, .L2153+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L225:
	ldr	r3, .L2153+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L2153+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L2153+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L2153+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L230
.L229:
	ldr	r3, .L2153+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L231
	ldr	r3, .L2153+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L231
	ldr	r3, .L2153+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L231
	ldr	r3, .L2153+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L230
.L231:
	ldr	r3, .L2153+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L232
	ldr	r3, .L2153+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L232
	ldr	r3, .L2153+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L232
	ldr	r3, .L2153+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L230
.L232:
	ldr	r3, .L2153+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L233
	ldr	r3, .L2153+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L233
	ldr	r3, .L2153+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L233
	ldr	r3, .L2153+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L230
.L233:
	ldr	r3, .L2153+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L234
	ldr	r3, .L2153+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L234
	ldr	r3, .L2153+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L234
	ldr	r3, .L2153+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L230
.L234:
	ldr	r3, .L2153+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L235
	ldr	r3, .L2153+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L235
	ldr	r3, .L2153+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L235
	ldr	r3, .L2153+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L230
.L235:
	ldr	r3, .L2153+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L236
	ldr	r3, .L2153+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L236
	ldr	r3, .L2153+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L236
	ldr	r3, .L2153+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L230
.L236:
	ldr	r3, .L2153+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L237
	ldr	r3, .L2153+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L237
	ldr	r3, .L2153+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L237
	ldr	r3, .L2153+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L230
.L237:
	ldr	r3, .L2153+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L230:
	ldr	r3, .L2153+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+68
	ldr	r3, [r3]	@ float
	ldr	r2, .L2153+164
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L239
	ldr	r3, .L2153+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L240
	ldr	r3, .L2153+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L240
	ldr	r3, .L2153+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L240
	ldr	r3, .L2153+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L240:
	ldr	r3, .L2153+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L241
	ldr	r3, .L2153+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L241
	ldr	r3, .L2153+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L241
	ldr	r3, .L2153+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L241:
	ldr	r3, .L2153+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L242
	ldr	r3, .L2153+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L242
	ldr	r3, .L2153+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L242
	ldr	r3, .L2153+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L242:
	ldr	r3, .L2153+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L239
	ldr	r3, .L2153+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L239
	ldr	r3, .L2153+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L239
	ldr	r3, .L2153+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L239:
	ldr	r3, .L2153+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L243
	ldr	r3, .L2153+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L243
	ldr	r3, .L2153+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L243
	ldr	r3, .L2153+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L244
.L243:
	ldr	r3, .L2153+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L245
	ldr	r3, .L2153+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L245
	ldr	r3, .L2153+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L245
	ldr	r3, .L2153+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L244
.L245:
	ldr	r3, .L2153+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L246
	ldr	r3, .L2153+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L246
	ldr	r3, .L2153+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L246
	ldr	r3, .L2153+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L244
.L246:
	ldr	r3, .L2153+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L247
	ldr	r3, .L2153+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L247
	ldr	r3, .L2153+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L247
	ldr	r3, .L2153+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L244
.L247:
	ldr	r3, .L2153+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L248
	ldr	r3, .L2153+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L248
	ldr	r3, .L2153+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L248
	ldr	r3, .L2153+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L244
.L248:
	ldr	r3, .L2153+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L249
	ldr	r3, .L2153+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L249
	ldr	r3, .L2153+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L249
	ldr	r3, .L2153+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L244
.L249:
	ldr	r3, .L2153+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L250
	ldr	r3, .L2153+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L250
	ldr	r3, .L2153+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L250
	ldr	r3, .L2153+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L244
.L250:
	ldr	r3, .L2153+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L251
	ldr	r3, .L2153+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L251
	ldr	r3, .L2153+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L251
	ldr	r3, .L2153+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L244
.L251:
	ldr	r3, .L2153+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L244:
	ldr	r3, .L2153+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L2153+160
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L253
	ldr	r3, .L2153+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L254
	ldr	r3, .L2153+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L254
	ldr	r3, .L2153+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L254
	ldr	r3, .L2153+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L254:
	ldr	r3, .L2153+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L255
	ldr	r3, .L2153+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L255
	ldr	r3, .L2153+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L255
	ldr	r3, .L2153+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L255:
	ldr	r3, .L2153+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L256
	ldr	r3, .L2153+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L256
	ldr	r3, .L2153+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L256
	ldr	r3, .L2153+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L256:
	ldr	r3, .L2153+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L253
	ldr	r3, .L2153+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L253
	ldr	r3, .L2153+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L253
	ldr	r3, .L2153+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L253:
	ldr	r3, .L2153+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L2153+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L2153+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L2153+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L258
.L257:
	ldr	r3, .L2153+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L259
	ldr	r3, .L2153+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L259
	ldr	r3, .L2153+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L259
	ldr	r3, .L2153+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L258
.L259:
	ldr	r3, .L2153+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L260
	ldr	r3, .L2153+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L260
	ldr	r3, .L2153+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	b	.L2154
.L2155:
	.align	2
.L2153:
	.word	p7_l2
	.word	p7_l0
	.word	p7_l1
	.word	p6_l3
	.word	p6_l2
	.word	p6_l0
	.word	p6_l1
	.word	p6_c
	.word	p5_l3
	.word	p5_l2
	.word	p5_l0
	.word	p5_l1
	.word	p5_c
	.word	p4_l3
	.word	p4_l2
	.word	p4_l0
	.word	p4_l1
	.word	p4_c
	.word	p3_l3
	.word	p3_l2
	.word	p3_l0
	.word	p3_l1
	.word	p3_c
	.word	p2_c
	.word	p2_l3
	.word	p2_l2
	.word	p2_l0
	.word	p2_l1
	.word	p1_c
	.word	p1_l3
	.word	p1_l2
	.word	p1_l0
	.word	p1_l1
	.word	p0_c
	.word	p0_l3
	.word	p0_l2
	.word	p0_l0
	.word	p0_l1
	.word	inc_max_prop
	.word	v1
	.word	proposed3
	.word	proposed4
	.word	proposed5
	.word	proposed6
	.word	proposed7
	.word	proposed8
	.word	proposed9
	.word	proposed10
	.word	proposed11
	.word	proposed12
	.word	proposed13
	.word	proposed14
	.word	proposed15
	.word	proposed16
	.word	proposed17
	.word	proposed18
	.word	proposed19
	.word	proposed20
	.word	1098907648
	.word	delta
	.word	proposed0
	.word	proposed1
	.word	max_prop
	.word	proposed2
.L2154:
	beq	.L260
	ldr	r3, .L2153+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L258
.L260:
	ldr	r3, .L2153+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L261
	ldr	r3, .L2153+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L261
	ldr	r3, .L2153+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L261
	ldr	r3, .L2153+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L258
.L261:
	ldr	r3, .L2153+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L262
	ldr	r3, .L2153+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L262
	ldr	r3, .L2153+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L262
	ldr	r3, .L2153+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L258
.L262:
	ldr	r3, .L2153+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L263
	ldr	r3, .L2153+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L263
	ldr	r3, .L2153+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L263
	ldr	r3, .L2153+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L258
.L263:
	ldr	r3, .L2153+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L264
	ldr	r3, .L2153+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L264
	ldr	r3, .L2153+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L264
	ldr	r3, .L2153+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L258
.L264:
	ldr	r3, .L2153+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L265
	ldr	r3, .L2153+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L265
	ldr	r3, .L2153+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L265
	ldr	r3, .L2153+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L258
.L265:
	ldr	r3, .L2153+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L258:
	ldr	r3, .L2153+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+92
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+92
	ldr	r3, [r3]	@ float
	ldr	r2, .L2153+252
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L267
	ldr	r3, .L2153+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L268
	ldr	r3, .L2153+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L268
	ldr	r3, .L2153+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L268
	ldr	r3, .L2153+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L268:
	ldr	r3, .L2153+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L269
	ldr	r3, .L2153+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L269
	ldr	r3, .L2153+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L269
	ldr	r3, .L2153+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L269:
	ldr	r3, .L2153+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L270
	ldr	r3, .L2153+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L270
	ldr	r3, .L2153+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L270
	ldr	r3, .L2153+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L270:
	ldr	r3, .L2153+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L267
	ldr	r3, .L2153+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L267
	ldr	r3, .L2153+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L267
	ldr	r3, .L2153+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L267:
	ldr	r3, .L2153+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L271
	ldr	r3, .L2153+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L271
	ldr	r3, .L2153+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L271
	ldr	r3, .L2153+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L272
.L271:
	ldr	r3, .L2153+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L273
	ldr	r3, .L2153+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L273
	ldr	r3, .L2153+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L273
	ldr	r3, .L2153+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L272
.L273:
	ldr	r3, .L2153+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L274
	ldr	r3, .L2153+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L274
	ldr	r3, .L2153+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L274
	ldr	r3, .L2153+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L272
.L274:
	ldr	r3, .L2153+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L275
	ldr	r3, .L2153+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L275
	ldr	r3, .L2153+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L275
	ldr	r3, .L2153+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L272
.L275:
	ldr	r3, .L2153+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L276
	ldr	r3, .L2153+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L276
	ldr	r3, .L2153+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L276
	ldr	r3, .L2153+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L272
.L276:
	ldr	r3, .L2153+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L277
	ldr	r3, .L2153+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L277
	ldr	r3, .L2153+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L277
	ldr	r3, .L2153+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L272
.L277:
	ldr	r3, .L2153+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L278
	ldr	r3, .L2153+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L278
	ldr	r3, .L2153+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L278
	ldr	r3, .L2153+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L272
.L278:
	ldr	r3, .L2153+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L279
	ldr	r3, .L2153+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L279
	ldr	r3, .L2153+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L279
	ldr	r3, .L2153+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L272
.L279:
	ldr	r3, .L2153+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L272:
	ldr	r3, .L2153+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+112
	ldr	r3, [r3]	@ float
	ldr	r2, .L2153+244
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L281
	ldr	r3, .L2153+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L282
	ldr	r3, .L2153+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L282
	ldr	r3, .L2153+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L282
	ldr	r3, .L2153+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L282:
	ldr	r3, .L2153+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L283
	ldr	r3, .L2153+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L283
	ldr	r3, .L2153+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L283
	ldr	r3, .L2153+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L283:
	ldr	r3, .L2153+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L284
	ldr	r3, .L2153+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L284
	ldr	r3, .L2153+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L284
	ldr	r3, .L2153+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L284:
	ldr	r3, .L2153+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L281
	ldr	r3, .L2153+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L281
	ldr	r3, .L2153+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L281
	ldr	r3, .L2153+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L281:
	ldr	r3, .L2153+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L285
	ldr	r3, .L2153+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L285
	ldr	r3, .L2153+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L285
	ldr	r3, .L2153+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L286
.L285:
	ldr	r3, .L2153+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L287
	ldr	r3, .L2153+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L287
	ldr	r3, .L2153+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L287
	ldr	r3, .L2153+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L286
.L287:
	ldr	r3, .L2153+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L288
	ldr	r3, .L2153+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L288
	ldr	r3, .L2153+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L288
	ldr	r3, .L2153+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L286
.L288:
	ldr	r3, .L2153+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L289
	ldr	r3, .L2153+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L289
	ldr	r3, .L2153+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L289
	ldr	r3, .L2153+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L286
.L289:
	ldr	r3, .L2153+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L290
	ldr	r3, .L2153+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L290
	ldr	r3, .L2153+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L290
	ldr	r3, .L2153+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L286
.L290:
	ldr	r3, .L2153+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L291
	ldr	r3, .L2153+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L291
	ldr	r3, .L2153+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L291
	ldr	r3, .L2153+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L286
.L291:
	ldr	r3, .L2153+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L292
	ldr	r3, .L2153+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L292
	ldr	r3, .L2153+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L292
	ldr	r3, .L2153+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L286
.L292:
	ldr	r3, .L2153+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L293
	ldr	r3, .L2153+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L293
	ldr	r3, .L2153+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L293
	ldr	r3, .L2153+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L286
.L293:
	ldr	r3, .L2153+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L286:
	ldr	r3, .L2153+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L2153+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+132
	ldr	r3, [r3]	@ float
	ldr	r2, .L2153+240
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L295
	ldr	r3, .L2153+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L296
	ldr	r3, .L2153+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L296
	ldr	r3, .L2153+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L296
	ldr	r3, .L2153+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L296:
	ldr	r3, .L2153+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L297
	ldr	r3, .L2153+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L297
	ldr	r3, .L2153+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L297
	ldr	r3, .L2153+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L297:
	ldr	r3, .L2153+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L298
	ldr	r3, .L2153+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L298
	ldr	r3, .L2153+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L298
	ldr	r3, .L2153+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
.L298:
	ldr	r3, .L2153+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L295
	ldr	r3, .L2153+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L295
	ldr	r3, .L2153+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L295
	ldr	r3, .L2153+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L295:
	ldr	r3, .L2153+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+156
	ldr	r3, [r3]
	cmp	r3, #21
	beq	.L299
	ldr	r3, .L2153+156
	ldr	r3, [r3]
	cmp	r3, #20
	beq	.L299
	ldr	r3, .L2153+156
	ldr	r3, [r3]
	cmp	r3, #19
	beq	.L299
	ldr	r3, .L2153+156
	ldr	r3, [r3]
	cmp	r3, #18
	beq	.L299
	ldr	r3, .L2153+156
	ldr	r3, [r3]
	cmp	r3, #17
	beq	.L299
	ldr	r3, .L2153+156
	ldr	r3, [r3]
	cmp	r3, #16
	beq	.L299
	ldr	r3, .L2153+156
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L299
	ldr	r3, .L2153+156
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L299
	ldr	r3, .L2153+156
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L299
	ldr	r3, .L2153+156
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L299
	ldr	r3, .L2153+156
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L299
	ldr	r3, .L2153+156
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L299
	ldr	r3, .L2153+156
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L299
	ldr	r3, .L2153+156
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L299
	ldr	r3, .L2153+156
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L299
	ldr	r3, .L2153+156
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L299
	ldr	r3, .L2153+156
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L299
	ldr	r3, .L2153+156
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L299
	ldr	r3, .L2153+156
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L299
	ldr	r3, .L2153+156
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L299
	ldr	r3, .L2153+156
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L299
	ldr	r3, .L2153+156
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L13
.L299:
	ldr	r3, .L2153+240
	ldr	r3, [r3]	@ float
	ldr	r1, .L2153+232
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+244
	ldr	r3, [r3]	@ float
	ldr	r1, .L2153+232
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+252
	ldr	r3, [r3]	@ float
	ldr	r1, .L2153+232
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+160
	ldr	r3, [r3]	@ float
	ldr	r1, .L2153+232
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+164
	ldr	r3, [r3]	@ float
	ldr	r1, .L2153+232
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+168
	ldr	r3, [r3]	@ float
	ldr	r1, .L2153+232
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+172
	ldr	r3, [r3]	@ float
	ldr	r1, .L2153+232
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+176
	ldr	r3, [r3]	@ float
	ldr	r1, .L2153+232
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+180
	ldr	r3, [r3]	@ float
	ldr	r1, .L2153+232
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+184
	ldr	r3, [r3]	@ float
	ldr	r1, .L2153+232
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+188
	ldr	r3, [r3]	@ float
	ldr	r1, .L2153+232
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+192
	ldr	r3, [r3]	@ float
	ldr	r1, .L2153+232
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+196
	ldr	r3, [r3]	@ float
	ldr	r1, .L2153+232
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+200
	ldr	r3, [r3]	@ float
	ldr	r1, .L2153+232
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+204
	ldr	r3, [r3]	@ float
	ldr	r1, .L2153+232
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+208
	ldr	r3, [r3]	@ float
	ldr	r1, .L2153+232
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+212
	ldr	r3, [r3]	@ float
	ldr	r1, .L2153+232
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+216
	ldr	r3, [r3]	@ float
	ldr	r1, .L2153+232
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+220
	ldr	r3, [r3]	@ float
	ldr	r1, .L2153+232
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+224
	ldr	r3, [r3]	@ float
	ldr	r1, .L2153+232
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+228
	ldr	r3, [r3]	@ float
	ldr	r1, .L2153+232
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+236
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+240
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L322
	mov	r3, #0
	mov	r4, r3
.L322:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+240
	ldr	r3, [r3]	@ float
	ldr	r2, .L2153+248
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+244
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L324
	mov	r3, #0
	mov	r4, r3
.L324:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+244
	ldr	r3, [r3]	@ float
	ldr	r2, .L2153+248
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2153+252
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L326
	mov	r3, #0
	mov	r4, r3
.L326:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+8
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L328
	mov	r3, #0
	mov	r4, r3
.L328:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+8
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+12
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L330
	mov	r3, #0
	mov	r4, r3
.L330:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+12
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+16
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L332
	mov	r3, #0
	mov	r4, r3
.L332:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+16
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+20
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L334
	mov	r3, #0
	mov	r4, r3
.L334:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+24
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L336
	mov	r3, #0
	mov	r4, r3
.L336:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+24
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+28
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L338
	mov	r3, #0
	mov	r4, r3
.L338:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+32
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L340
	mov	r3, #0
	mov	r4, r3
.L340:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+36
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L342
	mov	r3, #0
	mov	r4, r3
.L342:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+40
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L344
	mov	r3, #0
	mov	r4, r3
.L344:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+44
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L346
	mov	r3, #0
	mov	r4, r3
.L346:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+48
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L348
	mov	r3, #0
	mov	r4, r3
.L348:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+52
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L350
	mov	r3, #0
	mov	r4, r3
.L350:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+56
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L352
	mov	r3, #0
	mov	r4, r3
.L352:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+60
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L354
	mov	r3, #0
	mov	r4, r3
.L354:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+64
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L356
	mov	r3, #0
	mov	r4, r3
.L356:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+68
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L358
	mov	r3, #0
	mov	r4, r3
.L358:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+68
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+72
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L360
	mov	r3, #0
	mov	r4, r3
.L360:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+76
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L362
	mov	r3, #0
	mov	r4, r3
.L362:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L2156+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L364
	ldr	r3, .L2156+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L364
	ldr	r3, .L2156+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L364
	ldr	r3, .L2156+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+8
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L364
	ldr	r3, .L2156+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+12
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L364
	ldr	r3, .L2156+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+16
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L364
	ldr	r3, .L2156+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+20
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L364
	ldr	r3, .L2156+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L364
	ldr	r3, .L2156+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+28
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L364
	ldr	r3, .L2156+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L364
	ldr	r3, .L2156+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+36
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L364
	ldr	r3, .L2156+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L364
	ldr	r3, .L2156+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L364
	ldr	r3, .L2156+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L364
	ldr	r3, .L2156+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L364
	ldr	r3, .L2156+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+56
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L364
	ldr	r3, .L2156+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+60
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L364
	ldr	r3, .L2156+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L364
	ldr	r3, .L2156+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L364
	ldr	r3, .L2156+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L364
	ldr	r3, .L2156+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
.L364:
	ldr	r3, .L2156+716
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L13
	mov	r3, #1
	b	.L367
.L13:
	mov	r3, #0
.L367:
	str	r3, [fp, #-24]
	b	.L368
.L2157:
	.align	2
.L2156:
	.word	proposed2
	.word	max_prop
	.word	proposed3
	.word	proposed4
	.word	proposed5
	.word	proposed6
	.word	proposed7
	.word	proposed8
	.word	proposed9
	.word	proposed10
	.word	proposed11
	.word	proposed12
	.word	proposed13
	.word	proposed14
	.word	proposed15
	.word	proposed16
	.word	proposed17
	.word	proposed18
	.word	proposed19
	.word	proposed20
	.word	proposed0
	.word	proposed1
	.word	_diverge_delta
	.word	_x_p19_l3
	.word	_x_p19_l2
	.word	_x_p18_l3
	.word	_x_p20_evt
	.word	_x_p18_l2
	.word	_x_p17_l3
	.word	_x_p19_evt
	.word	_x_p17_l2
	.word	_x_p16_l3
	.word	_x_p10_l0
	.word	_x_p6_c
	.word	_x_p4_l0
	.word	_x_p4_l2
	.word	_x_p13_l1
	.word	_x_p1_evt
	.word	_x_p1_c
	.word	_x_p0_l3
	.word	_x_p0_l2
	.word	_x_p0_l1
	.word	_x_proposed7
	.word	_x_proposed6
	.word	_x_proposed5
	.word	_x_p12_l0
	.word	_x_proposed4
	.word	_x_p7_l0
	.word	_x_proposed3
	.word	_x_proposed2
	.word	_x_proposed1
	.word	_x_p8_c
	.word	_x_proposed0
	.word	_x_inc_max_prop
	.word	_x_max_prop
	.word	_x_p11_l3
	.word	_x_p2_l3
	.word	_x_v2
	.word	_x_p15_evt
	.word	_x_v1
	.word	_x_p15_c
	.word	_x_delta
	.word	_x_proposed8
	.word	_x_p7_l1
	.word	_x_p9_c
	.word	_x_p12_l3
	.word	_x_proposed9
	.word	_x_p12_l1
	.word	_x_p14_c
	.word	_x_proposed10
	.word	_x_p12_l2
	.word	_x_p14_evt
	.word	_x_p3_l0
	.word	_x_p5_c
	.word	_x_p3_l3
	.word	_x_p8_l1
	.word	_x_p10_c
	.word	_x_p13_l3
	.word	_x_proposed11
	.word	_x_p3_l1
	.word	_x_p5_evt
	.word	_x_p17_l0
	.word	_x_p8_l2
	.word	_x_p10_evt
	.word	_x_proposed12
	.word	_x_proposed13
	.word	_x_proposed14
	.word	_x_proposed15
	.word	_x_p13_c
	.word	_x_p11_l1
	.word	_x_p2_l1
	.word	_x_p4_evt
	.word	_x_proposed16
	.word	_x_p3_c
	.word	_x_p1_l0
	.word	_x_proposed17
	.word	_x_p6_l0
	.word	_x_p6_l1
	.word	_x_p7_l2
	.word	_x_p9_evt
	.word	_x_p16_l0
	.word	_x_p1_l2
	.word	_x_proposed19
	.word	_x_p6_l2
	.word	_x_p18_c
	.word	_x_p7_l3
	.word	_x_p16_l1
	.word	_x_p1_l1
	.word	_x_proposed18
	.word	_x_p3_evt
	.word	_x_p11_l2
	.word	_x_p2_l2
	.word	_x_p13_evt
	.word	_x_p1_l3
	.word	_x_p6_l3
	.word	_x_p18_evt
	.word	_x_p16_l2
	.word	_x_p3_l2
	.word	_x_p19_c
	.word	_x_p17_l1
	.word	_x_p8_l3
	.word	_x_p4_l3
	.word	_x_p13_l2
	.word	_x_p0_c
	.word	_x_p0_l0
	.word	_x_p0_evt
	.word	_x_p5_l0
	.word	_x_p7_c
	.word	_x_p19_l1
	.word	_x_p10_l3
	.word	_x_p4_l1
	.word	_x_p13_l0
	.word	_x_p6_evt
	.word	_x__diverge_delta
	.word	_x_p5_l2
	.word	_x_p16_c
	.word	_x_p5_l1
	.word	_x_p7_evt
	.word	_x_p10_l1
	.word	_x_p12_c
	.word	_x_p8_l0
	.word	_x_p9_l0
	.word	_x_p14_l0
	.word	_x_p18_l0
	.word	_x_p11_evt
	.word	_x_p2_evt
	.word	_x_p9_l2
	.word	_x_p14_l1
	.word	_x_p18_l1
	.word	_x_p9_l3
	.word	_x_p14_l2
	.word	_x_p2_c
	.word	_x_p9_l1
	.word	_x_p11_c
	.word	_x_p14_l3
	.word	_x_p2_l0
	.word	_x_p4_c
	.word	_x_p11_l0
	.word	_x_p19_l0
	.word	_x_p10_l2
	.word	_x_p12_evt
	.word	_x_p8_evt
	.word	_x_p15_l0
	.word	_x_p17_c
	.word	_x_p15_l1
	.word	_x_p17_evt
	.word	_x_p15_l2
	.word	_x_p15_l3
	.word	_x_p5_l3
	.word	_x_p16_evt
	.word	_x_proposed20
	.word	p20_l0
	.word	_x_p20_l0
	.word	p20_l1
	.word	_x_p20_l1
	.word	p20_l2
	.word	_x_p20_l2
	.word	p20_l3
	.word	_x_p20_l3
	.word	delta
	.word	p20_c
	.word	_x_p20_c
.L1761:
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+712
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+704
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+92
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+96
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+100
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+104
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+108
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+112
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+116
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+120
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+124
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+128
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+132
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+136
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+140
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+144
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+148
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+152
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+156
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+160
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+164
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+168
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+172
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+176
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+180
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+184
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+188
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+192
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+196
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+200
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+204
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+208
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+212
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+216
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+696
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+220
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+224
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+228
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+232
	strb	r2, [r3]
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L2156+236
	str	r3, [r2]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+240
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+244
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+248
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+252
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+256
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+260
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+264
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+268
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+272
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+276
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+280
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+284
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+288
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+292
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+296
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+300
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+304
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+308
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+312
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+316
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+320
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+324
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+328
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+332
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+336
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+340
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+344
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+348
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+352
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+356
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+360
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+364
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+368
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+372
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+376
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+380
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+384
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+388
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+392
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+396
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+400
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+404
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+408
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+412
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+416
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+420
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+424
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+428
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+432
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+436
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+688
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+440
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+444
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+448
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+452
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+680
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+456
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+460
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+464
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+468
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+472
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+476
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+480
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+484
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+488
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+492
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+496
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+500
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+504
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+508
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+512
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+516
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+520
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+524
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+528
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+532
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+536
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+540
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+544
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+548
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+552
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+556
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+560
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+564
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+568
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+572
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+576
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+580
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+584
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+588
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+724
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+592
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+596
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+600
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+604
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+608
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+612
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+616
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+620
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+624
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+628
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+632
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+636
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+640
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+644
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+648
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L2156+652
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+656
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+660
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+664
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+668
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+672
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L2156+676
	strb	r2, [r3]
	ldr	r3, .L2156+712
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L369
	ldr	r3, .L2156+704
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L369
	ldr	r3, .L2156+688
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L369
	ldr	r3, .L2156+696
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L370
.L369:
	ldr	r3, .L2156+712
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L371
	ldr	r3, .L2156+704
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L371
	ldr	r3, .L2156+688
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L371
	ldr	r3, .L2156+696
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L370
.L371:
	ldr	r3, .L2156+712
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L372
	ldr	r3, .L2156+704
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L372
	ldr	r3, .L2156+696
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L372
	ldr	r3, .L2156+688
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L370
.L372:
	ldr	r3, .L2156+712
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L373
	ldr	r3, .L2156+704
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L373
	ldr	r3, .L2156+688
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L373
	ldr	r3, .L2156+696
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L370
.L373:
	ldr	r3, .L2156+712
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L374
	ldr	r3, .L2156+704
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L374
	ldr	r3, .L2156+688
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L374
	ldr	r3, .L2156+696
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L370
.L374:
	ldr	r3, .L2156+712
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L375
	ldr	r3, .L2156+704
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L375
	ldr	r3, .L2156+688
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L375
	ldr	r3, .L2156+696
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L370
.L375:
	ldr	r3, .L2156+712
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L376
	ldr	r3, .L2156+704
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L376
	ldr	r3, .L2156+696
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L376
	ldr	r3, .L2156+688
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L370
.L376:
	ldr	r3, .L2156+712
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L377
	ldr	r3, .L2156+704
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L377
	ldr	r3, .L2156+688
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L377
	ldr	r3, .L2156+696
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L370
.L377:
	ldr	r3, .L2156+712
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2156+704
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2156+688
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2156+696
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L370:
	ldr	r3, .L2156+724
	ldr	r3, [r3]	@ float
	ldr	r2, .L2156+680
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L379
	ldr	r3, .L2156+712
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L380
	ldr	r3, .L2156+704
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L380
	ldr	r3, .L2156+688
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L380
	ldr	r3, .L2156+696
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L380:
	ldr	r3, .L2156+712
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L381
	ldr	r3, .L2156+704
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L381
	ldr	r3, .L2156+688
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L381
	ldr	r3, .L2156+696
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L381:
	ldr	r3, .L2156+712
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L382
	ldr	r3, .L2156+704
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L382
	ldr	r3, .L2156+688
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L382
	ldr	r3, .L2156+696
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L382:
	ldr	r3, .L2156+712
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L379
	ldr	r3, .L2156+704
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L379
	ldr	r3, .L2156+688
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L379
	ldr	r3, .L2156+696
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L379:
	ldr	r3, .L2156+684
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2156+688
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L383
	ldr	r3, .L2156+692
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2156+696
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L383
	ldr	r3, .L2156+700
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2156+704
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L383
	ldr	r3, .L2156+708
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2156+712
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L383
	ldr	r3, .L2156+716
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L2156+720
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L2156+724
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L383
	ldr	r3, .L2158
	ldr	r3, [r3]	@ float
	ldr	r2, .L2158+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L385
.L383:
	ldr	r3, .L2158+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2158+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L385:
	ldr	r3, .L2158+16
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L387
	ldr	r3, .L2158+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L387
	ldr	r3, .L2158+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L387
	ldr	r3, .L2158+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L387
	ldr	r3, .L2158+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L387
	ldr	r3, .L2158+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2158+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L387
	ldr	r3, .L2158+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L387
	ldr	r3, .L2158+16
	ldr	r2, [r3]
	ldr	r3, .L2158+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L387
	ldr	r3, .L2158
	ldr	r3, [r3]	@ float
	ldr	r2, .L2158+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L389
.L387:
	ldr	r3, .L2158+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L389
	ldr	r3, .L2158+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L389
	ldr	r3, .L2158+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L389
	ldr	r3, .L2158+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L389
	ldr	r3, .L2158+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L389
	ldr	r3, .L2158+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L389:
	ldr	r3, .L2158
	ldr	r3, [r3]	@ float
	ldr	r2, .L2158+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L390
	ldr	r3, .L2158+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2158+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L390
	ldr	r3, .L2158+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L390
	ldr	r3, .L2158+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L390
	ldr	r3, .L2158+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L390
	ldr	r3, .L2158+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L390
	ldr	r3, .L2158+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L390
	ldr	r3, .L2158+84
	ldr	r3, [r3]
	cmp	r3, #21
	beq	.L393
.L390:
	ldr	r3, .L2158+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L393
	ldr	r3, .L2158+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L393
	ldr	r3, .L2158+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L393
	ldr	r3, .L2158+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L393
	ldr	r3, .L2158+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L393
	ldr	r3, .L2158+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L393:
	ldr	r3, .L2158+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2158+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L394
	ldr	r3, .L2158+16
	ldr	r2, [r3]
	ldr	r3, .L2158+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L394
	ldr	r3, .L2158+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L395
	ldr	r3, .L2158+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L395
	ldr	r3, .L2158+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L395
	ldr	r3, .L2158+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L396
.L395:
	ldr	r3, .L2158+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L394
	ldr	r3, .L2158+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L394
	ldr	r3, .L2158+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L394
	ldr	r3, .L2158+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L394
.L396:
	ldr	r3, .L2158+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2158+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L397
.L394:
	ldr	r3, .L2158+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L397
	ldr	r3, .L2158+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L397
	ldr	r3, .L2158+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L397
	ldr	r3, .L2158+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L397
	ldr	r3, .L2158+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L397
	ldr	r3, .L2158+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L397:
	ldr	r3, .L2158
	ldr	r3, [r3]	@ float
	ldr	r2, .L2158+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L398
	ldr	r3, .L2158+16
	ldr	r3, [r3]
	cmp	r3, #21
	bne	.L400
.L398:
	ldr	r3, .L2158+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L400
	ldr	r3, .L2158+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L400
	ldr	r3, .L2158+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L400
	ldr	r3, .L2158+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L400
	ldr	r3, .L2158+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L400
	ldr	r3, .L2158+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L400
	ldr	r3, .L2158+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L400
	ldr	r3, .L2158+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L400
	ldr	r3, .L2158+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L400
	ldr	r3, .L2158+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L400:
	ldr	r3, .L2158+16
	ldr	r3, [r3]
	cmp	r3, #21
	bne	.L401
	ldr	r3, .L2158+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2158+72
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L402
	mov	r3, #0
	mov	r4, r3
.L402:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L401
	ldr	r3, .L2158
	ldr	r3, [r3]	@ float
	ldr	r2, .L2158+4
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L403
	mov	r3, #0
	mov	r4, r3
.L403:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L404
.L401:
	ldr	r3, .L2158+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L404
	ldr	r3, .L2158+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L404
	ldr	r3, .L2158+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L404
	ldr	r3, .L2158+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L404
	ldr	r3, .L2158+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L404
	ldr	r3, .L2158+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L404
	ldr	r3, .L2158+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L404
	ldr	r3, .L2158+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L404
	ldr	r3, .L2158+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L404
	ldr	r3, .L2158+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L404:
	ldr	r3, .L2158+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2158+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L405
	ldr	r3, .L2158+16
	ldr	r2, [r3]
	ldr	r3, .L2158+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L405
	ldr	r3, .L2158
	ldr	r3, [r3]	@ float
	ldr	r2, .L2158+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L405
	ldr	r3, .L2158+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L407
	ldr	r3, .L2158+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L407
	ldr	r3, .L2158+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L407
	ldr	r3, .L2158+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L408
.L407:
	ldr	r3, .L2158+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L405
	ldr	r3, .L2158+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L405
	ldr	r3, .L2158+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L405
	ldr	r3, .L2158+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L408
.L405:
	ldr	r3, .L2158+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L408
	ldr	r3, .L2158+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L408
	ldr	r3, .L2158+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L408
	ldr	r3, .L2158+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L408
	ldr	r3, .L2158+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L408
	ldr	r3, .L2158+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L408:
	ldr	r3, .L2158+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L409
	ldr	r3, .L2158+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2158+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L410
.L409:
	ldr	r3, .L2158+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L410
	ldr	r3, .L2158+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L410
	ldr	r3, .L2158+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L410
	ldr	r3, .L2158+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L410
	ldr	r3, .L2158+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L410
	ldr	r3, .L2158+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L410
	ldr	r3, .L2158+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L410
	ldr	r3, .L2158+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L410
	ldr	r3, .L2158+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L410
	ldr	r3, .L2158+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L410:
	ldr	r3, .L2158+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L411
	ldr	r3, .L2158+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L412
.L411:
	ldr	r3, .L2158+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L412
	ldr	r3, .L2158+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L412
	ldr	r3, .L2158+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L412
	ldr	r3, .L2158+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L412
	ldr	r3, .L2158+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L412
	ldr	r3, .L2158+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L412
	ldr	r3, .L2158+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L412
	ldr	r3, .L2158+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L412
	ldr	r3, .L2158+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L412
	ldr	r3, .L2158+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L412:
	ldr	r3, .L2158+16
	ldr	r2, [r3]
	ldr	r3, .L2158+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L413
	ldr	r3, .L2158
	ldr	r3, [r3]	@ float
	ldr	r2, .L2158+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L413
	ldr	r3, .L2158+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L413
	ldr	r3, .L2158+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L413
	ldr	r3, .L2158+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L413
	ldr	r3, .L2158+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L413
	ldr	r3, .L2158+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L413
	ldr	r3, .L2158+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L416
.L413:
	ldr	r3, .L2158+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L416
	ldr	r3, .L2158+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L416
	ldr	r3, .L2158+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L416
	ldr	r3, .L2158+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L416
	ldr	r3, .L2158+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L416
	ldr	r3, .L2158+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L416:
	ldr	r3, .L2158
	ldr	r3, [r3]	@ float
	ldr	r2, .L2158+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L417
	ldr	r3, .L2158+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2158+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L417
	ldr	r3, .L2158+16
	ldr	r2, [r3]
	ldr	r3, .L2158+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L417
	ldr	r3, .L2158+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2158+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L417
	ldr	r3, .L2158+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L420
	ldr	r3, .L2158+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L420
	ldr	r3, .L2158+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L420
	ldr	r3, .L2158+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L421
.L420:
	ldr	r3, .L2158+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L417
	ldr	r3, .L2158+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L417
	ldr	r3, .L2158+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L417
	ldr	r3, .L2158+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L421
.L417:
	ldr	r3, .L2158+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L421
	ldr	r3, .L2158+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L421
	ldr	r3, .L2158+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L421
	ldr	r3, .L2158+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L421
	ldr	r3, .L2158+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L421
	ldr	r3, .L2158+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L421:
	ldr	r3, .L2158+16
	ldr	r3, [r3]
	cmp	r3, #21
	bne	.L422
	ldr	r3, .L2158+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L422
	ldr	r3, .L2158+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L422
	ldr	r3, .L2158+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L422
	ldr	r3, .L2158+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L422
	ldr	r3, .L2158+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L422
	ldr	r3, .L2158+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L422
	ldr	r3, .L2158+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L422
	ldr	r3, .L2158+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L422
	ldr	r3, .L2158+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L422
	ldr	r3, .L2158+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L422:
	ldr	r3, .L2158+16
	ldr	r3, [r3]
	cmp	r3, #21
	beq	.L423
	ldr	r3, .L2158+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L423
	ldr	r3, .L2158+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L423
	ldr	r3, .L2158+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L423
	ldr	r3, .L2158+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L423
	ldr	r3, .L2158+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L423
	ldr	r3, .L2158+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L423
	ldr	r3, .L2158+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L423
	ldr	r3, .L2158+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L423
	ldr	r3, .L2158+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L423
	ldr	r3, .L2158+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L423:
	ldr	r3, .L2158
	ldr	r3, [r3]	@ float
	ldr	r2, .L2158+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L424
	ldr	r3, .L2158+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2158+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L424
	ldr	r3, .L2158+16
	ldr	r2, [r3]
	ldr	r3, .L2158+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L424
	ldr	r3, .L2158+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L424
	ldr	r3, .L2158+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L424
	ldr	r3, .L2158+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L424
	ldr	r3, .L2158+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L424
	ldr	r3, .L2158+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L426
.L424:
	ldr	r3, .L2158+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L426
	ldr	r3, .L2158+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L426
	ldr	r3, .L2158+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L426
	ldr	r3, .L2158+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L426
	ldr	r3, .L2158+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L426
	ldr	r3, .L2158+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L426:
	ldr	r3, .L2158
	ldr	r3, [r3]	@ float
	ldr	r2, .L2158+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L427
	ldr	r3, .L2158+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L427
	ldr	r3, .L2158+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L427
	ldr	r3, .L2158+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L427
	ldr	r3, .L2158+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L427
	ldr	r3, .L2158+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L427
	ldr	r3, .L2158+16
	ldr	r2, [r3]
	ldr	r3, .L2158+84
	ldr	r3, [r3]
	cmp	r2, r3
	b	.L2159
.L2160:
	.align	2
.L2158:
	.word	proposed20
	.word	_x_proposed20
	.word	delta
	.word	p20_evt
	.word	v1
	.word	proposed20
	.word	_x_proposed20
	.word	_x_p20_l3
	.word	_x_p20_l2
	.word	_x_p20_l0
	.word	_x_p20_l1
	.word	p20_c
	.word	_x_p20_c
	.word	p20_l3
	.word	p20_l2
	.word	p20_l0
	.word	p20_l1
	.word	p20_evt
	.word	max_prop
	.word	_x_v2
	.word	v1
	.word	_x_v1
	.word	proposed19
	.word	_x_proposed19
	.word	p19_c
	.word	_x_p19_c
	.word	delta
	.word	p19_evt
	.word	_x_p19_l3
	.word	_x_p19_l2
	.word	_x_p19_l0
	.word	_x_p19_l1
	.word	p19_l3
	.word	p19_l2
	.word	p19_l0
	.word	p19_l1
	.word	v2
.L2159:
	bne	.L427
	ldr	r3, .L2158+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L429
.L427:
	ldr	r3, .L2158+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L429
	ldr	r3, .L2158+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L429
	ldr	r3, .L2158+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L429
	ldr	r3, .L2158+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L429
	ldr	r3, .L2158+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L429
	ldr	r3, .L2158+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L429:
	ldr	r3, .L2158+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2158+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L430
	ldr	r3, .L2158+84
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L430
	ldr	r3, .L2158+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L430
	ldr	r3, .L2158+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L430
	ldr	r3, .L2158+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L430
	ldr	r3, .L2158+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L430
	ldr	r3, .L2158+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2158+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L430
	ldr	r3, .L2158+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2158+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L432
.L430:
	ldr	r3, .L2158+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L432
	ldr	r3, .L2158+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L432
	ldr	r3, .L2158+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L432
	ldr	r3, .L2158+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L432
	ldr	r3, .L2158+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L432
	ldr	r3, .L2158+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L432:
	ldr	r3, .L2158+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L433
	ldr	r3, .L2158+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L433
	ldr	r3, .L2158+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L433
	ldr	r3, .L2158+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L434
.L433:
	ldr	r3, .L2158+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L435
	ldr	r3, .L2158+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L435
	ldr	r3, .L2158+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L435
	ldr	r3, .L2158+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L434
.L435:
	ldr	r3, .L2158+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L436
	ldr	r3, .L2158+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L436
	ldr	r3, .L2158+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L436
	ldr	r3, .L2158+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L434
.L436:
	ldr	r3, .L2158+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L437
	ldr	r3, .L2158+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L437
	ldr	r3, .L2158+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L437
	ldr	r3, .L2158+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L434
.L437:
	ldr	r3, .L2158+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L438
	ldr	r3, .L2158+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L438
	ldr	r3, .L2158+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L438
	ldr	r3, .L2158+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L434
.L438:
	ldr	r3, .L2158+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L439
	ldr	r3, .L2158+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L439
	ldr	r3, .L2158+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L439
	ldr	r3, .L2158+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L434
.L439:
	ldr	r3, .L2158+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L440
	ldr	r3, .L2158+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L440
	ldr	r3, .L2158+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L440
	ldr	r3, .L2158+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L434
.L440:
	ldr	r3, .L2158+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L441
	ldr	r3, .L2158+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L441
	ldr	r3, .L2158+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L441
	ldr	r3, .L2158+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L434
.L441:
	ldr	r3, .L2158+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2158+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2158+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2158+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L434:
	ldr	r3, .L2158+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L2158+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L442
	ldr	r3, .L2158+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L443
	ldr	r3, .L2158+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L443
	ldr	r3, .L2158+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L443
	ldr	r3, .L2158+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L443:
	ldr	r3, .L2158+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L444
	ldr	r3, .L2158+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L444
	ldr	r3, .L2158+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L444
	ldr	r3, .L2158+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L444:
	ldr	r3, .L2158+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L445
	ldr	r3, .L2158+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L445
	ldr	r3, .L2158+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L445
	ldr	r3, .L2158+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L445:
	ldr	r3, .L2158+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L442
	ldr	r3, .L2158+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L442
	ldr	r3, .L2158+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L442
	ldr	r3, .L2158+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L442:
	ldr	r3, .L2158+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2158+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L446
	ldr	r3, .L2158+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2158+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L446
	ldr	r3, .L2158+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2158+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L446
	ldr	r3, .L2158+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2158+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L446
	ldr	r3, .L2158+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L2158+96
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L2158+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L446
	ldr	r3, .L2158+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L2158+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L448
.L446:
	ldr	r3, .L2158+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2158+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L448:
	ldr	r3, .L2158+80
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L450
	ldr	r3, .L2158+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L450
	ldr	r3, .L2158+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L450
	ldr	r3, .L2158+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L450
	ldr	r3, .L2158+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L450
	ldr	r3, .L2158+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2158+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L450
	ldr	r3, .L2158+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L450
	ldr	r3, .L2158+80
	ldr	r2, [r3]
	ldr	r3, .L2158+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L450
	ldr	r3, .L2158+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L2158+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L452
.L450:
	ldr	r3, .L2158+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L452
	ldr	r3, .L2158+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L452
	ldr	r3, .L2158+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L452
	ldr	r3, .L2158+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L452
	ldr	r3, .L2158+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L452
	ldr	r3, .L2158+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L452:
	ldr	r3, .L2158+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L2158+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L453
	ldr	r3, .L2158+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2158+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L453
	ldr	r3, .L2158+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L453
	ldr	r3, .L2158+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L453
	ldr	r3, .L2158+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L453
	ldr	r3, .L2158+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L453
	ldr	r3, .L2158+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L453
	ldr	r3, .L2158+84
	ldr	r3, [r3]
	cmp	r3, #20
	beq	.L456
.L453:
	ldr	r3, .L2158+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L456
	ldr	r3, .L2158+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L456
	ldr	r3, .L2158+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L456
	ldr	r3, .L2158+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L456
	ldr	r3, .L2158+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L456
	ldr	r3, .L2158+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L456:
	ldr	r3, .L2158+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2158+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L457
	ldr	r3, .L2158+80
	ldr	r2, [r3]
	ldr	r3, .L2158+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L457
	ldr	r3, .L2158+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L458
	ldr	r3, .L2158+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L458
	ldr	r3, .L2158+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L458
	ldr	r3, .L2158+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L459
.L458:
	ldr	r3, .L2158+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L457
	ldr	r3, .L2158+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L457
	ldr	r3, .L2158+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L457
	ldr	r3, .L2158+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L457
.L459:
	ldr	r3, .L2158+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L2158+100
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L460
.L457:
	ldr	r3, .L2158+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L460
	ldr	r3, .L2158+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L460
	ldr	r3, .L2158+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L460
	ldr	r3, .L2158+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L460
	ldr	r3, .L2158+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L460
	ldr	r3, .L2158+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L460:
	ldr	r3, .L2158+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L2158+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L461
	ldr	r3, .L2158+80
	ldr	r3, [r3]
	cmp	r3, #20
	bne	.L463
.L461:
	ldr	r3, .L2158+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L463
	ldr	r3, .L2158+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L463
	ldr	r3, .L2158+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L463
	ldr	r3, .L2158+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L463
	ldr	r3, .L2158+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L463
	ldr	r3, .L2158+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L463
	ldr	r3, .L2158+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L463
	ldr	r3, .L2158+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L463
	ldr	r3, .L2158+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L463
	ldr	r3, .L2158+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L463:
	ldr	r3, .L2158+80
	ldr	r3, [r3]
	cmp	r3, #20
	bne	.L464
	ldr	r3, .L2158+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L2158+72
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L465
	mov	r3, #0
	mov	r4, r3
.L465:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L464
	ldr	r3, .L2158+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L2158+92
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L466
	mov	r3, #0
	mov	r4, r3
.L466:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L467
.L464:
	ldr	r3, .L2158+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L467
	ldr	r3, .L2158+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L467
	ldr	r3, .L2158+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L467
	ldr	r3, .L2158+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L467
	ldr	r3, .L2158+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L467
	ldr	r3, .L2158+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L467
	ldr	r3, .L2158+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L467
	ldr	r3, .L2158+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L467
	ldr	r3, .L2158+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L467
	ldr	r3, .L2158+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L467:
	ldr	r3, .L2158+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2158+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L468
	ldr	r3, .L2158+80
	ldr	r2, [r3]
	ldr	r3, .L2158+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L468
	ldr	r3, .L2158+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L2158+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L468
	ldr	r3, .L2158+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L470
	ldr	r3, .L2158+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L470
	ldr	r3, .L2158+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L470
	ldr	r3, .L2158+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L471
.L470:
	ldr	r3, .L2158+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L468
	ldr	r3, .L2158+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L468
	ldr	r3, .L2158+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L468
	ldr	r3, .L2158+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L471
.L468:
	ldr	r3, .L2158+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L471
	ldr	r3, .L2158+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L471
	ldr	r3, .L2158+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L471
	ldr	r3, .L2158+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L471
	ldr	r3, .L2158+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L471
	ldr	r3, .L2158+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L471:
	ldr	r3, .L2158+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L472
	ldr	r3, .L2158+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L2158+100
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L473
.L472:
	ldr	r3, .L2158+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L473
	ldr	r3, .L2158+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L473
	ldr	r3, .L2158+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L473
	ldr	r3, .L2158+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L473
	ldr	r3, .L2158+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L473
	ldr	r3, .L2158+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L473
	ldr	r3, .L2158+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L473
	ldr	r3, .L2158+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L473
	ldr	r3, .L2158+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L473
	ldr	r3, .L2158+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L473:
	ldr	r3, .L2158+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L474
	ldr	r3, .L2161
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L475
.L474:
	ldr	r3, .L2161+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L475
	ldr	r3, .L2161+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L475
	ldr	r3, .L2161+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L475
	ldr	r3, .L2161+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L475
	ldr	r3, .L2161+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L475
	ldr	r3, .L2161+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L475
	ldr	r3, .L2161+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L475
	ldr	r3, .L2161+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L475
	ldr	r3, .L2161+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L475
	ldr	r3, .L2161+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L475:
	ldr	r3, .L2161+60
	ldr	r2, [r3]
	ldr	r3, .L2161+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L476
	ldr	r3, .L2161+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2161+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L476
	ldr	r3, .L2161
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L476
	ldr	r3, .L2161+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L476
	ldr	r3, .L2161+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L476
	ldr	r3, .L2161+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L476
	ldr	r3, .L2161+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L476
	ldr	r3, .L2161+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L479
.L476:
	ldr	r3, .L2161+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L479
	ldr	r3, .L2161+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L479
	ldr	r3, .L2161+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L479
	ldr	r3, .L2161+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L479
	ldr	r3, .L2161+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L479
	ldr	r3, .L2161+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L479:
	ldr	r3, .L2161+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2161+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L480
	ldr	r3, .L2161+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2161+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L480
	ldr	r3, .L2161+60
	ldr	r2, [r3]
	ldr	r3, .L2161+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L480
	ldr	r3, .L2161+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L2161
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L480
	ldr	r3, .L2161+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L483
	ldr	r3, .L2161+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L483
	ldr	r3, .L2161+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L483
	ldr	r3, .L2161+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L484
.L483:
	ldr	r3, .L2161+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L480
	ldr	r3, .L2161+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L480
	ldr	r3, .L2161+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L480
	ldr	r3, .L2161+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L484
.L480:
	ldr	r3, .L2161+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L484
	ldr	r3, .L2161+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L484
	ldr	r3, .L2161+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L484
	ldr	r3, .L2161+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L484
	ldr	r3, .L2161+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L484
	ldr	r3, .L2161+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L484:
	ldr	r3, .L2161+60
	ldr	r3, [r3]
	cmp	r3, #20
	bne	.L485
	ldr	r3, .L2161+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L485
	ldr	r3, .L2161+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L485
	ldr	r3, .L2161+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L485
	ldr	r3, .L2161+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L485
	ldr	r3, .L2161+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L485
	ldr	r3, .L2161+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L485
	ldr	r3, .L2161+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L485
	ldr	r3, .L2161+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L485
	ldr	r3, .L2161+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L485
	ldr	r3, .L2161+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L485:
	ldr	r3, .L2161+60
	ldr	r3, [r3]
	cmp	r3, #20
	beq	.L486
	ldr	r3, .L2161+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L486
	ldr	r3, .L2161+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L486
	ldr	r3, .L2161+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L486
	ldr	r3, .L2161+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L486
	ldr	r3, .L2161+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L486
	ldr	r3, .L2161+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L486
	ldr	r3, .L2161+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L486
	ldr	r3, .L2161+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L486
	ldr	r3, .L2161+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L486
	ldr	r3, .L2161+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L486:
	ldr	r3, .L2161+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2161+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L487
	ldr	r3, .L2161+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2161+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L487
	ldr	r3, .L2161+60
	ldr	r2, [r3]
	ldr	r3, .L2161+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L487
	ldr	r3, .L2161+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L487
	ldr	r3, .L2161+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L487
	ldr	r3, .L2161+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L487
	ldr	r3, .L2161+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L487
	ldr	r3, .L2161
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L489
.L487:
	ldr	r3, .L2161+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L489
	ldr	r3, .L2161+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L489
	ldr	r3, .L2161+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L489
	ldr	r3, .L2161+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L489
	ldr	r3, .L2161+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L489
	ldr	r3, .L2161+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L489:
	ldr	r3, .L2161+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2161+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L490
	ldr	r3, .L2161+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L490
	ldr	r3, .L2161+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L490
	ldr	r3, .L2161+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L490
	ldr	r3, .L2161+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L490
	ldr	r3, .L2161+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L490
	ldr	r3, .L2161+60
	ldr	r2, [r3]
	ldr	r3, .L2161+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L490
	ldr	r3, .L2161
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L492
.L490:
	ldr	r3, .L2161+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L492
	ldr	r3, .L2161+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L492
	ldr	r3, .L2161+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L492
	ldr	r3, .L2161+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L492
	ldr	r3, .L2161+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L492
	ldr	r3, .L2161+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L492:
	ldr	r3, .L2161+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2161+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L493
	ldr	r3, .L2161+72
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L493
	ldr	r3, .L2161+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L493
	ldr	r3, .L2161+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L493
	ldr	r3, .L2161+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L493
	ldr	r3, .L2161+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L493
	ldr	r3, .L2161+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2161+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L493
	ldr	r3, .L2161+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L2161
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L495
.L493:
	ldr	r3, .L2161+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L495
	ldr	r3, .L2161+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L495
	ldr	r3, .L2161+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L495
	ldr	r3, .L2161+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L495
	ldr	r3, .L2161+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L495
	ldr	r3, .L2161+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L495:
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L496
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L496
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L496
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L497
.L496:
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L498
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L498
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L498
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L497
.L498:
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L499
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L499
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L499
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L497
.L499:
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L500
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L500
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L500
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L497
.L500:
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L501
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L501
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L501
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L497
.L501:
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L502
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L502
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L502
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L497
.L502:
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L503
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L503
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L503
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L497
.L503:
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L504
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L504
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L504
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L497
.L504:
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L497:
	ldr	r3, .L2161+104
	ldr	r3, [r3]	@ float
	ldr	r2, .L2161+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L505
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L506
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L506
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L506
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L506:
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L507
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L507
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L507
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L507:
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L508
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L508
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L508
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L508:
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L505
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L505
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L505
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L505:
	ldr	r3, .L2161+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L509
	ldr	r3, .L2161+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L509
	ldr	r3, .L2161+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L509
	ldr	r3, .L2161+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L509
	ldr	r3, .L2161+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L2161+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L2161+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L509
	ldr	r3, .L2161+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2161+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L511
.L509:
	ldr	r3, .L2161+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2161+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L511:
	ldr	r3, .L2161+60
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L513
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L513
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L513
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L513
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L513
	ldr	r3, .L2161+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2161+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L513
	ldr	r3, .L2161+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L513
	ldr	r3, .L2161+60
	ldr	r2, [r3]
	ldr	r3, .L2161+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L513
	ldr	r3, .L2161+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2161+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L515
.L513:
	ldr	r3, .L2161+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L515
	ldr	r3, .L2161+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L515
	ldr	r3, .L2161+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L515
	ldr	r3, .L2161+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L515
	ldr	r3, .L2161+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L515
	ldr	r3, .L2161+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L515:
	ldr	r3, .L2161+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2161+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L516
	ldr	r3, .L2161+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2161+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L516
	ldr	r3, .L2161+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	b	.L2162
.L2163:
	.align	2
.L2161:
	.word	_x_p19_c
	.word	delta
	.word	p19_evt
	.word	p19_l3
	.word	p19_l2
	.word	p19_l0
	.word	p19_l1
	.word	_x_p19_l3
	.word	_x_p19_l2
	.word	_x_p19_l0
	.word	_x_p19_l1
	.word	proposed19
	.word	_x_proposed19
	.word	p19_c
	.word	max_prop
	.word	v1
	.word	proposed18
	.word	_x_proposed18
	.word	_x_v1
	.word	_x_p18_l3
	.word	_x_p18_l2
	.word	_x_p18_l0
	.word	_x_p18_l1
	.word	v2
	.word	_x_v2
	.word	p18_c
	.word	_x_p18_c
	.word	p18_l3
	.word	p18_l2
	.word	p18_l0
	.word	p18_l1
	.word	delta
	.word	p18_evt
	.word	_x_p17_l2
	.word	_x_p17_l0
	.word	_x_p17_l1
	.word	_x_p17_l3
.L2162:
	beq	.L516
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L516
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L516
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L516
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L516
	ldr	r3, .L2161+72
	ldr	r3, [r3]
	cmp	r3, #19
	beq	.L519
.L516:
	ldr	r3, .L2161+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L519
	ldr	r3, .L2161+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L519
	ldr	r3, .L2161+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L519
	ldr	r3, .L2161+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L519
	ldr	r3, .L2161+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L519
	ldr	r3, .L2161+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L519:
	ldr	r3, .L2161+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2161+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L520
	ldr	r3, .L2161+60
	ldr	r2, [r3]
	ldr	r3, .L2161+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L520
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L521
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L521
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L521
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L522
.L521:
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L520
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L520
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L520
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L520
.L522:
	ldr	r3, .L2161+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L2161+104
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L523
.L520:
	ldr	r3, .L2161+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L523
	ldr	r3, .L2161+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L523
	ldr	r3, .L2161+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L523
	ldr	r3, .L2161+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L523
	ldr	r3, .L2161+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L523
	ldr	r3, .L2161+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L523:
	ldr	r3, .L2161+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2161+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L524
	ldr	r3, .L2161+60
	ldr	r3, [r3]
	cmp	r3, #19
	bne	.L526
.L524:
	ldr	r3, .L2161+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L526
	ldr	r3, .L2161+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L526
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L526
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L526
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L526
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L526
	ldr	r3, .L2161+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L526
	ldr	r3, .L2161+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L526
	ldr	r3, .L2161+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L526
	ldr	r3, .L2161+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L526:
	ldr	r3, .L2161+60
	ldr	r3, [r3]
	cmp	r3, #19
	bne	.L527
	ldr	r3, .L2161+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L2161+56
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L528
	mov	r3, #0
	mov	r4, r3
.L528:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L527
	ldr	r3, .L2161+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2161+68
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L529
	mov	r3, #0
	mov	r4, r3
.L529:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L530
.L527:
	ldr	r3, .L2161+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L530
	ldr	r3, .L2161+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L530
	ldr	r3, .L2161+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L530
	ldr	r3, .L2161+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L530
	ldr	r3, .L2161+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L530
	ldr	r3, .L2161+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L530
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L530
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L530
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L530
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L530:
	ldr	r3, .L2161+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2161+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L531
	ldr	r3, .L2161+60
	ldr	r2, [r3]
	ldr	r3, .L2161+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L531
	ldr	r3, .L2161+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2161+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L531
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L533
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L533
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L533
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L534
.L533:
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L531
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L531
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L531
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L534
.L531:
	ldr	r3, .L2161+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L534
	ldr	r3, .L2161+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L534
	ldr	r3, .L2161+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L534
	ldr	r3, .L2161+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L534
	ldr	r3, .L2161+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L534
	ldr	r3, .L2161+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L534:
	ldr	r3, .L2161+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L535
	ldr	r3, .L2161+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L2161+104
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L536
.L535:
	ldr	r3, .L2161+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L536
	ldr	r3, .L2161+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L536
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L536
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L536
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L536
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L536
	ldr	r3, .L2161+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L536
	ldr	r3, .L2161+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L536
	ldr	r3, .L2161+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L536
	ldr	r3, .L2161+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L536:
	ldr	r3, .L2161+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L537
	ldr	r3, .L2161+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L538
.L537:
	ldr	r3, .L2161+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L538
	ldr	r3, .L2161+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L538
	ldr	r3, .L2161+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L538
	ldr	r3, .L2161+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L538
	ldr	r3, .L2161+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L538
	ldr	r3, .L2161+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L538
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L538
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L538
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L538
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L538:
	ldr	r3, .L2161+60
	ldr	r2, [r3]
	ldr	r3, .L2161+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L539
	ldr	r3, .L2161+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2161+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L539
	ldr	r3, .L2161+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L539
	ldr	r3, .L2161+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L539
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L539
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L539
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L539
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L542
.L539:
	ldr	r3, .L2161+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L542
	ldr	r3, .L2161+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L542
	ldr	r3, .L2161+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L542
	ldr	r3, .L2161+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L542
	ldr	r3, .L2161+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L542
	ldr	r3, .L2161+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L542:
	ldr	r3, .L2161+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2161+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L543
	ldr	r3, .L2161+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2161+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L543
	ldr	r3, .L2161+60
	ldr	r2, [r3]
	ldr	r3, .L2161+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L543
	ldr	r3, .L2161+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L2161+104
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L543
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L546
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L546
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L546
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L547
.L546:
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L543
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L543
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L543
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L547
.L543:
	ldr	r3, .L2161+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L547
	ldr	r3, .L2161+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L547
	ldr	r3, .L2161+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L547
	ldr	r3, .L2161+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L547
	ldr	r3, .L2161+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L547
	ldr	r3, .L2161+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L547:
	ldr	r3, .L2161+60
	ldr	r3, [r3]
	cmp	r3, #19
	bne	.L548
	ldr	r3, .L2161+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L548
	ldr	r3, .L2161+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L548
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L548
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L548
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L548
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L548
	ldr	r3, .L2161+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L548
	ldr	r3, .L2161+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L548
	ldr	r3, .L2161+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L548
	ldr	r3, .L2161+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L548:
	ldr	r3, .L2161+60
	ldr	r3, [r3]
	cmp	r3, #19
	beq	.L549
	ldr	r3, .L2161+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L549
	ldr	r3, .L2161+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L549
	ldr	r3, .L2161+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L549
	ldr	r3, .L2161+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L549
	ldr	r3, .L2161+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L549
	ldr	r3, .L2161+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L549
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L549
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L549
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L549
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L549:
	ldr	r3, .L2161+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2161+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L550
	ldr	r3, .L2161+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2161+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L550
	ldr	r3, .L2161+60
	ldr	r2, [r3]
	ldr	r3, .L2161+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L550
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L550
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L550
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L550
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L550
	ldr	r3, .L2161+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L552
.L550:
	ldr	r3, .L2161+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L552
	ldr	r3, .L2161+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L552
	ldr	r3, .L2161+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L552
	ldr	r3, .L2161+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L552
	ldr	r3, .L2161+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L552
	ldr	r3, .L2161+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L552:
	ldr	r3, .L2161+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2161+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L553
	ldr	r3, .L2161+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L553
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L553
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L553
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L553
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L553
	ldr	r3, .L2161+60
	ldr	r2, [r3]
	ldr	r3, .L2161+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L553
	ldr	r3, .L2161+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L555
.L553:
	ldr	r3, .L2161+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L555
	ldr	r3, .L2161+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L555
	ldr	r3, .L2161+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L555
	ldr	r3, .L2161+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L555
	ldr	r3, .L2161+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L555
	ldr	r3, .L2161+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L555:
	ldr	r3, .L2161+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2161+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L556
	ldr	r3, .L2161+72
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L556
	ldr	r3, .L2161+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L556
	ldr	r3, .L2161+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L556
	ldr	r3, .L2161+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L556
	ldr	r3, .L2161+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L556
	ldr	r3, .L2161+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2161+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L556
	ldr	r3, .L2161+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L2161+104
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L558
.L556:
	ldr	r3, .L2161+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L558
	ldr	r3, .L2161+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L558
	ldr	r3, .L2161+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L558
	ldr	r3, .L2161+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L558
	ldr	r3, .L2161+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L558
	ldr	r3, .L2161+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L558:
	ldr	r3, .L2161+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L559
	ldr	r3, .L2161+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L559
	ldr	r3, .L2161+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L559
	ldr	r3, .L2161+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L560
.L559:
	ldr	r3, .L2161+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L561
	ldr	r3, .L2164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L561
	ldr	r3, .L2164+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L561
	ldr	r3, .L2164+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L560
.L561:
	ldr	r3, .L2164+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L562
	ldr	r3, .L2164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L562
	ldr	r3, .L2164+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L562
	ldr	r3, .L2164+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L560
.L562:
	ldr	r3, .L2164+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L563
	ldr	r3, .L2164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L563
	ldr	r3, .L2164+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L563
	ldr	r3, .L2164+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L560
.L563:
	ldr	r3, .L2164+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L564
	ldr	r3, .L2164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L564
	ldr	r3, .L2164+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L564
	ldr	r3, .L2164+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L560
.L564:
	ldr	r3, .L2164+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L565
	ldr	r3, .L2164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L565
	ldr	r3, .L2164+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L565
	ldr	r3, .L2164+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L560
.L565:
	ldr	r3, .L2164+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L566
	ldr	r3, .L2164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L566
	ldr	r3, .L2164+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L566
	ldr	r3, .L2164+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L560
.L566:
	ldr	r3, .L2164+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L567
	ldr	r3, .L2164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L567
	ldr	r3, .L2164+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L567
	ldr	r3, .L2164+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L560
.L567:
	ldr	r3, .L2164+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2164+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2164+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L560:
	ldr	r3, .L2164+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L2164+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L568
	ldr	r3, .L2164+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L569
	ldr	r3, .L2164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L569
	ldr	r3, .L2164+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L569
	ldr	r3, .L2164+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L569:
	ldr	r3, .L2164+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L570
	ldr	r3, .L2164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L570
	ldr	r3, .L2164+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L570
	ldr	r3, .L2164+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L570:
	ldr	r3, .L2164+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L571
	ldr	r3, .L2164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L571
	ldr	r3, .L2164+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L571
	ldr	r3, .L2164+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L571:
	ldr	r3, .L2164+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L568
	ldr	r3, .L2164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L568
	ldr	r3, .L2164+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L568
	ldr	r3, .L2164+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L568:
	ldr	r3, .L2164+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2164+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L572
	ldr	r3, .L2164+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2164+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L572
	ldr	r3, .L2164+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L572
	ldr	r3, .L2164+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2164+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L572
	ldr	r3, .L2164+136
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L2164+44
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L2164+48
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L572
	ldr	r3, .L2164+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2164+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L574
.L572:
	ldr	r3, .L2164+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2164+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L574:
	ldr	r3, .L2164+88
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L576
	ldr	r3, .L2164+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L576
	ldr	r3, .L2164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L576
	ldr	r3, .L2164+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L576
	ldr	r3, .L2164+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L576
	ldr	r3, .L2164+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2164+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L576
	ldr	r3, .L2164+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L576
	ldr	r3, .L2164+88
	ldr	r2, [r3]
	ldr	r3, .L2164+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L576
	ldr	r3, .L2164+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2164+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L578
.L576:
	ldr	r3, .L2164+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L578
	ldr	r3, .L2164+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L578
	ldr	r3, .L2164+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L578
	ldr	r3, .L2164+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L578
	ldr	r3, .L2164+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L578
	ldr	r3, .L2164+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L578:
	ldr	r3, .L2164+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2164+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L579
	ldr	r3, .L2164+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2164+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L579
	ldr	r3, .L2164+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L579
	ldr	r3, .L2164+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L579
	ldr	r3, .L2164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L579
	ldr	r3, .L2164+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L579
	ldr	r3, .L2164+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L579
	ldr	r3, .L2164+92
	ldr	r3, [r3]
	cmp	r3, #18
	beq	.L582
.L579:
	ldr	r3, .L2164+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L582
	ldr	r3, .L2164+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L582
	ldr	r3, .L2164+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L582
	ldr	r3, .L2164+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L582
	ldr	r3, .L2164+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L582
	ldr	r3, .L2164+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L582:
	ldr	r3, .L2164+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2164+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L583
	ldr	r3, .L2164+88
	ldr	r2, [r3]
	ldr	r3, .L2164+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L583
	ldr	r3, .L2164+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L584
	ldr	r3, .L2164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L584
	ldr	r3, .L2164+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L584
	ldr	r3, .L2164+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L585
.L584:
	ldr	r3, .L2164+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L583
	ldr	r3, .L2164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L583
	ldr	r3, .L2164+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L583
	ldr	r3, .L2164+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L583
.L585:
	ldr	r3, .L2164+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2164+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L586
.L583:
	ldr	r3, .L2164+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L586
	ldr	r3, .L2164+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L586
	ldr	r3, .L2164+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L586
	ldr	r3, .L2164+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L586
	ldr	r3, .L2164+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L586
	ldr	r3, .L2164+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L586:
	ldr	r3, .L2164+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2164+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L587
	ldr	r3, .L2164+88
	ldr	r3, [r3]
	cmp	r3, #18
	bne	.L589
.L587:
	ldr	r3, .L2164+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L589
	ldr	r3, .L2164+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L589
	ldr	r3, .L2164+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L589
	ldr	r3, .L2164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L589
	ldr	r3, .L2164+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L589
	ldr	r3, .L2164+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L589
	ldr	r3, .L2164+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L589
	ldr	r3, .L2164+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L589
	ldr	r3, .L2164+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L589
	ldr	r3, .L2164+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L589:
	ldr	r3, .L2164+88
	ldr	r3, [r3]
	cmp	r3, #18
	bne	.L590
	ldr	r3, .L2164+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2164+16
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L591
	mov	r3, #0
	mov	r4, r3
.L591:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L590
	ldr	r3, .L2164+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2164+24
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L592
	mov	r3, #0
	mov	r4, r3
.L592:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L593
.L590:
	ldr	r3, .L2164+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L593
	ldr	r3, .L2164+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L593
	ldr	r3, .L2164+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L593
	ldr	r3, .L2164+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L593
	ldr	r3, .L2164+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L593
	ldr	r3, .L2164+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L593
	ldr	r3, .L2164+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L593
	ldr	r3, .L2164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L593
	ldr	r3, .L2164+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L593
	ldr	r3, .L2164+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L593:
	ldr	r3, .L2164+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2164+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L594
	ldr	r3, .L2164+88
	ldr	r2, [r3]
	ldr	r3, .L2164+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L594
	ldr	r3, .L2164+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2164+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L594
	ldr	r3, .L2164+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L596
	ldr	r3, .L2164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L596
	ldr	r3, .L2164+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L596
	ldr	r3, .L2164+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L597
.L596:
	ldr	r3, .L2164+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L594
	ldr	r3, .L2164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L594
	ldr	r3, .L2164+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L594
	ldr	r3, .L2164+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L597
.L594:
	ldr	r3, .L2164+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L597
	ldr	r3, .L2164+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L597
	ldr	r3, .L2164+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L597
	ldr	r3, .L2164+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L597
	ldr	r3, .L2164+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L597
	ldr	r3, .L2164+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L597:
	ldr	r3, .L2164+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L598
	ldr	r3, .L2164+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2164+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L599
.L598:
	ldr	r3, .L2164+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L599
	ldr	r3, .L2164+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L599
	ldr	r3, .L2164+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L599
	ldr	r3, .L2164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L599
	ldr	r3, .L2164+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L599
	ldr	r3, .L2164+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L599
	ldr	r3, .L2164+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L599
	ldr	r3, .L2164+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L599
	ldr	r3, .L2164+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L599
	ldr	r3, .L2164+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L599:
	ldr	r3, .L2164+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L600
	ldr	r3, .L2164+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L601
.L600:
	ldr	r3, .L2164+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L601
	ldr	r3, .L2164+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L601
	ldr	r3, .L2164+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L601
	ldr	r3, .L2164+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L601
	ldr	r3, .L2164+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L601
	ldr	r3, .L2164+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L601
	ldr	r3, .L2164+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L601
	ldr	r3, .L2164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L601
	ldr	r3, .L2164+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L601
	ldr	r3, .L2164+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L601:
	ldr	r3, .L2164+88
	ldr	r2, [r3]
	ldr	r3, .L2164+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L602
	ldr	r3, .L2164+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2164+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L602
	ldr	r3, .L2164+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L602
	ldr	r3, .L2164+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L602
	ldr	r3, .L2164+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L602
	ldr	r3, .L2164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L602
	ldr	r3, .L2164+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L602
	ldr	r3, .L2164+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L605
.L602:
	ldr	r3, .L2164+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L605
	ldr	r3, .L2164+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L605
	ldr	r3, .L2164+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L605
	ldr	r3, .L2164+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L605
	ldr	r3, .L2164+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L605
	ldr	r3, .L2164+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L605:
	ldr	r3, .L2164+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2164+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L606
	ldr	r3, .L2164+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2164+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	b	.L2165
.L2166:
	.align	2
.L2164:
	.word	_x_p17_l2
	.word	_x_p17_l0
	.word	_x_p17_l1
	.word	_x_p17_l3
	.word	max_prop
	.word	proposed17
	.word	_x_proposed17
	.word	_x_p17_l3
	.word	_x_p17_l2
	.word	_x_p17_l0
	.word	_x_p17_l1
	.word	p17_c
	.word	_x_p17_c
	.word	p17_l3
	.word	p17_l2
	.word	p17_l0
	.word	p17_l1
	.word	p17_evt
	.word	proposed16
	.word	_x_proposed16
	.word	v2
	.word	_x_v2
	.word	v1
	.word	_x_v1
	.word	_x_p16_l3
	.word	_x_p16_l2
	.word	_x_p16_l0
	.word	_x_p16_l1
	.word	p16_c
	.word	_x_p16_c
	.word	p16_l3
	.word	p16_l2
	.word	p16_l1
	.word	p16_l0
	.word	delta
	.word	p16_evt
.L2165:
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L606
	ldr	r3, .L2164+88
	ldr	r2, [r3]
	ldr	r3, .L2164+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L606
	ldr	r3, .L2164+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2164+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L606
	ldr	r3, .L2164+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L609
	ldr	r3, .L2164+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L609
	ldr	r3, .L2164+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L609
	ldr	r3, .L2164+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L610
.L609:
	ldr	r3, .L2164+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L606
	ldr	r3, .L2164+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L606
	ldr	r3, .L2164+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L606
	ldr	r3, .L2164+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L610
.L606:
	ldr	r3, .L2164+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L610
	ldr	r3, .L2164+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L610
	ldr	r3, .L2164+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L610
	ldr	r3, .L2164+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L610
	ldr	r3, .L2164+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L610
	ldr	r3, .L2164+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L610:
	ldr	r3, .L2164+88
	ldr	r3, [r3]
	cmp	r3, #18
	bne	.L611
	ldr	r3, .L2164+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L611
	ldr	r3, .L2164+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L611
	ldr	r3, .L2164+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L611
	ldr	r3, .L2164+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L611
	ldr	r3, .L2164+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L611
	ldr	r3, .L2164+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L611
	ldr	r3, .L2164+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L611
	ldr	r3, .L2164+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L611
	ldr	r3, .L2164+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L611
	ldr	r3, .L2164+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L611:
	ldr	r3, .L2164+88
	ldr	r3, [r3]
	cmp	r3, #18
	beq	.L612
	ldr	r3, .L2164+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L612
	ldr	r3, .L2164+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L612
	ldr	r3, .L2164+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L612
	ldr	r3, .L2164+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L612
	ldr	r3, .L2164+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L612
	ldr	r3, .L2164+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L612
	ldr	r3, .L2164+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L612
	ldr	r3, .L2164+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L612
	ldr	r3, .L2164+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L612
	ldr	r3, .L2164+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L612:
	ldr	r3, .L2164+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2164+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L613
	ldr	r3, .L2164+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2164+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L613
	ldr	r3, .L2164+88
	ldr	r2, [r3]
	ldr	r3, .L2164+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L613
	ldr	r3, .L2164+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L613
	ldr	r3, .L2164+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L613
	ldr	r3, .L2164+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L613
	ldr	r3, .L2164+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L613
	ldr	r3, .L2164+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L615
.L613:
	ldr	r3, .L2164+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L615
	ldr	r3, .L2164+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L615
	ldr	r3, .L2164+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L615
	ldr	r3, .L2164+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L615
	ldr	r3, .L2164+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L615
	ldr	r3, .L2164+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L615:
	ldr	r3, .L2164+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2164+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L616
	ldr	r3, .L2164+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L616
	ldr	r3, .L2164+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L616
	ldr	r3, .L2164+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L616
	ldr	r3, .L2164+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L616
	ldr	r3, .L2164+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L616
	ldr	r3, .L2164+88
	ldr	r2, [r3]
	ldr	r3, .L2164+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L616
	ldr	r3, .L2164+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L618
.L616:
	ldr	r3, .L2164+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L618
	ldr	r3, .L2164+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L618
	ldr	r3, .L2164+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L618
	ldr	r3, .L2164+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L618
	ldr	r3, .L2164+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L618
	ldr	r3, .L2164+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L618:
	ldr	r3, .L2164+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2164+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L619
	ldr	r3, .L2164+92
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L619
	ldr	r3, .L2164+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L619
	ldr	r3, .L2164+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L619
	ldr	r3, .L2164+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L619
	ldr	r3, .L2164+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L619
	ldr	r3, .L2164+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2164+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L619
	ldr	r3, .L2164+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2164+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L621
.L619:
	ldr	r3, .L2164+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L621
	ldr	r3, .L2164+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L621
	ldr	r3, .L2164+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L621
	ldr	r3, .L2164+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L621
	ldr	r3, .L2164+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L621
	ldr	r3, .L2164+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L621:
	ldr	r3, .L2164+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L622
	ldr	r3, .L2164+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L622
	ldr	r3, .L2164+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L622
	ldr	r3, .L2164+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L623
.L622:
	ldr	r3, .L2164+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L624
	ldr	r3, .L2164+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L624
	ldr	r3, .L2164+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L624
	ldr	r3, .L2164+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L623
.L624:
	ldr	r3, .L2164+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L625
	ldr	r3, .L2164+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L625
	ldr	r3, .L2164+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L625
	ldr	r3, .L2164+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L623
.L625:
	ldr	r3, .L2164+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L626
	ldr	r3, .L2164+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L626
	ldr	r3, .L2164+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L626
	ldr	r3, .L2164+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L623
.L626:
	ldr	r3, .L2164+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L627
	ldr	r3, .L2164+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L627
	ldr	r3, .L2164+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L627
	ldr	r3, .L2164+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L623
.L627:
	ldr	r3, .L2164+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L628
	ldr	r3, .L2164+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L628
	ldr	r3, .L2164+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L628
	ldr	r3, .L2164+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L623
.L628:
	ldr	r3, .L2164+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L629
	ldr	r3, .L2164+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L629
	ldr	r3, .L2164+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L629
	ldr	r3, .L2164+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L623
.L629:
	ldr	r3, .L2164+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L630
	ldr	r3, .L2164+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L630
	ldr	r3, .L2164+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L630
	ldr	r3, .L2164+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L623
.L630:
	ldr	r3, .L2164+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2164+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2164+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2164+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L623:
	ldr	r3, .L2164+116
	ldr	r3, [r3]	@ float
	ldr	r2, .L2164+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L631
	ldr	r3, .L2164+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L632
	ldr	r3, .L2164+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L632
	ldr	r3, .L2164+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L632
	ldr	r3, .L2164+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L632:
	ldr	r3, .L2164+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L633
	ldr	r3, .L2164+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L633
	ldr	r3, .L2164+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L633
	ldr	r3, .L2164+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L633:
	ldr	r3, .L2164+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L634
	ldr	r3, .L2164+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L634
	ldr	r3, .L2164+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L634
	ldr	r3, .L2164+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L634:
	ldr	r3, .L2164+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L631
	ldr	r3, .L2164+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L631
	ldr	r3, .L2164+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L631
	ldr	r3, .L2164+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L631:
	ldr	r3, .L2164+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2164+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L635
	ldr	r3, .L2164+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2164+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L635
	ldr	r3, .L2164+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2164+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L635
	ldr	r3, .L2164+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2164+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L635
	ldr	r3, .L2164+136
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L2164+112
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L2164+116
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L635
	ldr	r3, .L2164+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L2164+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L637
.L635:
	ldr	r3, .L2164+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2164+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L637:
	ldr	r3, .L2164+88
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L639
	ldr	r3, .L2164+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L639
	ldr	r3, .L2164+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L639
	ldr	r3, .L2164+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L639
	ldr	r3, .L2164+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L639
	ldr	r3, .L2164+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2164+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L639
	ldr	r3, .L2164+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L639
	ldr	r3, .L2164+88
	ldr	r2, [r3]
	ldr	r3, .L2164+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L639
	ldr	r3, .L2164+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L2164+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L641
.L639:
	ldr	r3, .L2164+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L641
	ldr	r3, .L2164+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L641
	ldr	r3, .L2164+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L641
	ldr	r3, .L2164+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L641
	ldr	r3, .L2164+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L641
	ldr	r3, .L2164+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L641:
	ldr	r3, .L2164+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L2164+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L642
	ldr	r3, .L2164+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2164+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L642
	ldr	r3, .L2164+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L642
	ldr	r3, .L2164+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L642
	ldr	r3, .L2164+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L642
	ldr	r3, .L2164+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L642
	ldr	r3, .L2164+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L642
	ldr	r3, .L2164+92
	ldr	r3, [r3]
	cmp	r3, #17
	beq	.L645
.L642:
	ldr	r3, .L2164+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L645
	ldr	r3, .L2164+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L645
	ldr	r3, .L2164+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L645
	ldr	r3, .L2164+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L645
	ldr	r3, .L2164+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L645
	ldr	r3, .L2164+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L645:
	ldr	r3, .L2164+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2164+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L646
	ldr	r3, .L2164+88
	ldr	r2, [r3]
	ldr	r3, .L2164+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L646
	ldr	r3, .L2164+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L647
	ldr	r3, .L2164+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L647
	ldr	r3, .L2164+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L647
	ldr	r3, .L2164+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L648
.L647:
	ldr	r3, .L2164+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L646
	ldr	r3, .L2164+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L646
	ldr	r3, .L2164+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L646
	ldr	r3, .L2164+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L646
.L648:
	ldr	r3, .L2164+112
	ldr	r3, [r3]	@ float
	ldr	r2, .L2164+116
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L649
.L646:
	ldr	r3, .L2164+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L649
	ldr	r3, .L2164+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L649
	ldr	r3, .L2164+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L649
	ldr	r3, .L2164+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L649
	ldr	r3, .L2164+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L649
	ldr	r3, .L2164+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L649:
	ldr	r3, .L2167
	ldr	r3, [r3]	@ float
	ldr	r2, .L2167+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L650
	ldr	r3, .L2167+8
	ldr	r3, [r3]
	cmp	r3, #17
	bne	.L652
.L650:
	ldr	r3, .L2167+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L652
	ldr	r3, .L2167+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L652
	ldr	r3, .L2167+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L652
	ldr	r3, .L2167+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L652
	ldr	r3, .L2167+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L652
	ldr	r3, .L2167+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L652
	ldr	r3, .L2167+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L652
	ldr	r3, .L2167+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L652
	ldr	r3, .L2167+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L652
	ldr	r3, .L2167+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L652:
	ldr	r3, .L2167+8
	ldr	r3, [r3]
	cmp	r3, #17
	bne	.L653
	ldr	r3, .L2167+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L2167+60
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L654
	mov	r3, #0
	mov	r4, r3
.L654:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L653
	ldr	r3, .L2167
	ldr	r3, [r3]	@ float
	ldr	r2, .L2167+4
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L655
	mov	r3, #0
	mov	r4, r3
.L655:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L656
.L653:
	ldr	r3, .L2167+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L656
	ldr	r3, .L2167+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L656
	ldr	r3, .L2167+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L656
	ldr	r3, .L2167+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L656
	ldr	r3, .L2167+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L656
	ldr	r3, .L2167+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L656
	ldr	r3, .L2167+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L656
	ldr	r3, .L2167+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L656
	ldr	r3, .L2167+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L656
	ldr	r3, .L2167+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L656:
	ldr	r3, .L2167+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2167+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L657
	ldr	r3, .L2167+8
	ldr	r2, [r3]
	ldr	r3, .L2167+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L657
	ldr	r3, .L2167
	ldr	r3, [r3]	@ float
	ldr	r2, .L2167+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L657
	ldr	r3, .L2167+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L659
	ldr	r3, .L2167+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L659
	ldr	r3, .L2167+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L659
	ldr	r3, .L2167+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L660
.L659:
	ldr	r3, .L2167+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L657
	ldr	r3, .L2167+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L657
	ldr	r3, .L2167+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L657
	ldr	r3, .L2167+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L660
.L657:
	ldr	r3, .L2167+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L660
	ldr	r3, .L2167+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L660
	ldr	r3, .L2167+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L660
	ldr	r3, .L2167+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L660
	ldr	r3, .L2167+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L660
	ldr	r3, .L2167+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L660:
	ldr	r3, .L2167+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L661
	ldr	r3, .L2167+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L2167+56
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L662
.L661:
	ldr	r3, .L2167+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L662
	ldr	r3, .L2167+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L662
	ldr	r3, .L2167+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L662
	ldr	r3, .L2167+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L662
	ldr	r3, .L2167+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L662
	ldr	r3, .L2167+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L662
	ldr	r3, .L2167+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L662
	ldr	r3, .L2167+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L662
	ldr	r3, .L2167+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L662
	ldr	r3, .L2167+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L662:
	ldr	r3, .L2167+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L663
	ldr	r3, .L2167+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L664
.L663:
	ldr	r3, .L2167+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L664
	ldr	r3, .L2167+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L664
	ldr	r3, .L2167+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L664
	ldr	r3, .L2167+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L664
	ldr	r3, .L2167+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L664
	ldr	r3, .L2167+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L664
	ldr	r3, .L2167+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L664
	ldr	r3, .L2167+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L664
	ldr	r3, .L2167+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L664
	ldr	r3, .L2167+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L664:
	ldr	r3, .L2167+8
	ldr	r2, [r3]
	ldr	r3, .L2167+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L665
	ldr	r3, .L2167
	ldr	r3, [r3]	@ float
	ldr	r2, .L2167+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L665
	ldr	r3, .L2167+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L665
	ldr	r3, .L2167+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L665
	ldr	r3, .L2167+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L665
	ldr	r3, .L2167+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L665
	ldr	r3, .L2167+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L665
	ldr	r3, .L2167+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L668
.L665:
	ldr	r3, .L2167+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L668
	ldr	r3, .L2167+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L668
	ldr	r3, .L2167+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L668
	ldr	r3, .L2167+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L668
	ldr	r3, .L2167+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L668
	ldr	r3, .L2167+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L668:
	ldr	r3, .L2167
	ldr	r3, [r3]	@ float
	ldr	r2, .L2167+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L669
	ldr	r3, .L2167+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2167+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L669
	ldr	r3, .L2167+8
	ldr	r2, [r3]
	ldr	r3, .L2167+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L669
	ldr	r3, .L2167+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L2167+56
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L669
	ldr	r3, .L2167+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L672
	ldr	r3, .L2167+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L672
	ldr	r3, .L2167+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L672
	ldr	r3, .L2167+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L673
.L672:
	ldr	r3, .L2167+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L669
	ldr	r3, .L2167+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L669
	ldr	r3, .L2167+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L669
	ldr	r3, .L2167+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L673
.L669:
	ldr	r3, .L2167+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L673
	ldr	r3, .L2167+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L673
	ldr	r3, .L2167+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L673
	ldr	r3, .L2167+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L673
	ldr	r3, .L2167+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L673
	ldr	r3, .L2167+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L673:
	ldr	r3, .L2167+8
	ldr	r3, [r3]
	cmp	r3, #17
	bne	.L674
	ldr	r3, .L2167+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L674
	ldr	r3, .L2167+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L674
	ldr	r3, .L2167+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L674
	ldr	r3, .L2167+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L674
	ldr	r3, .L2167+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L674
	ldr	r3, .L2167+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L674
	ldr	r3, .L2167+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L674
	ldr	r3, .L2167+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L674
	ldr	r3, .L2167+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L674
	ldr	r3, .L2167+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L674:
	ldr	r3, .L2167+8
	ldr	r3, [r3]
	cmp	r3, #17
	beq	.L675
	ldr	r3, .L2167+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L675
	ldr	r3, .L2167+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L675
	ldr	r3, .L2167+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L675
	ldr	r3, .L2167+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L675
	ldr	r3, .L2167+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L675
	ldr	r3, .L2167+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L675
	ldr	r3, .L2167+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L675
	ldr	r3, .L2167+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L675
	ldr	r3, .L2167+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L675
	ldr	r3, .L2167+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L675:
	ldr	r3, .L2167
	ldr	r3, [r3]	@ float
	ldr	r2, .L2167+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L676
	ldr	r3, .L2167+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2167+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L676
	ldr	r3, .L2167+8
	ldr	r2, [r3]
	ldr	r3, .L2167+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L676
	ldr	r3, .L2167+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L676
	ldr	r3, .L2167+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L676
	ldr	r3, .L2167+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L676
	ldr	r3, .L2167+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L676
	ldr	r3, .L2167+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L678
.L676:
	ldr	r3, .L2167+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L678
	ldr	r3, .L2167+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L678
	ldr	r3, .L2167+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L678
	ldr	r3, .L2167+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L678
	ldr	r3, .L2167+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L678
	ldr	r3, .L2167+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L678:
	ldr	r3, .L2167
	ldr	r3, [r3]	@ float
	ldr	r2, .L2167+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L679
	ldr	r3, .L2167+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L679
	ldr	r3, .L2167+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L679
	ldr	r3, .L2167+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L679
	ldr	r3, .L2167+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L679
	ldr	r3, .L2167+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L679
	ldr	r3, .L2167+8
	ldr	r2, [r3]
	ldr	r3, .L2167+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L679
	ldr	r3, .L2167+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L681
.L679:
	ldr	r3, .L2167+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L681
	ldr	r3, .L2167+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L681
	ldr	r3, .L2167+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L681
	ldr	r3, .L2167+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L681
	ldr	r3, .L2167+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L681
	ldr	r3, .L2167+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L681:
	ldr	r3, .L2167
	ldr	r3, [r3]	@ float
	ldr	r2, .L2167+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L682
	ldr	r3, .L2167+80
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L682
	ldr	r3, .L2167+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L682
	ldr	r3, .L2167+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L682
	ldr	r3, .L2167+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L682
	ldr	r3, .L2167+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L682
	ldr	r3, .L2167+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2167+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L682
	ldr	r3, .L2167+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L2167+56
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L684
.L682:
	ldr	r3, .L2167+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L684
	ldr	r3, .L2167+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L684
	ldr	r3, .L2167+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L684
	ldr	r3, .L2167+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L684
	ldr	r3, .L2167+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L684
	ldr	r3, .L2167+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L684:
	ldr	r3, .L2167+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L685
	ldr	r3, .L2167+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L685
	ldr	r3, .L2167+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L685
	ldr	r3, .L2167+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L686
.L685:
	ldr	r3, .L2167+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L687
	ldr	r3, .L2167+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L687
	ldr	r3, .L2167+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L687
	ldr	r3, .L2167+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L686
.L687:
	ldr	r3, .L2167+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L688
	ldr	r3, .L2167+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L688
	ldr	r3, .L2167+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L688
	ldr	r3, .L2167+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L686
.L688:
	ldr	r3, .L2167+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L689
	ldr	r3, .L2167+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L689
	ldr	r3, .L2167+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L689
	ldr	r3, .L2167+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L686
.L689:
	ldr	r3, .L2167+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L690
	ldr	r3, .L2167+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L690
	ldr	r3, .L2167+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L690
	ldr	r3, .L2167+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L686
.L690:
	ldr	r3, .L2167+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L691
	ldr	r3, .L2167+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L691
	ldr	r3, .L2167+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L691
	ldr	r3, .L2167+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L686
.L691:
	ldr	r3, .L2167+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L692
	ldr	r3, .L2167+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L692
	ldr	r3, .L2167+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L692
	ldr	r3, .L2167+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L686
.L692:
	ldr	r3, .L2167+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L693
	ldr	r3, .L2167+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L693
	ldr	r3, .L2167+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L693
	ldr	r3, .L2167+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L686
.L693:
	ldr	r3, .L2167+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2167+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2167+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2167+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L686:
	ldr	r3, .L2167+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L2167+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L694
	ldr	r3, .L2167+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L695
	ldr	r3, .L2167+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L695
	b	.L2168
.L2169:
	.align	2
.L2167:
	.word	proposed16
	.word	_x_proposed16
	.word	v1
	.word	delta
	.word	p16_evt
	.word	_x_p16_l3
	.word	_x_p16_l2
	.word	_x_p16_l0
	.word	_x_p16_l1
	.word	p16_l3
	.word	p16_l2
	.word	p16_l1
	.word	p16_l0
	.word	p16_c
	.word	_x_p16_c
	.word	max_prop
	.word	proposed15
	.word	_x_proposed15
	.word	v2
	.word	_x_v2
	.word	_x_v1
	.word	p15_c
	.word	_x_p15_c
	.word	p15_evt
	.word	_x_p15_l3
	.word	_x_p15_l2
	.word	_x_p15_l0
	.word	_x_p15_l1
	.word	p15_l3
	.word	p15_l2
	.word	p15_l0
	.word	p15_l1
	.word	v1
	.word	delta
.L2168:
	ldr	r3, .L2167+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L695
	ldr	r3, .L2167+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L695:
	ldr	r3, .L2167+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L696
	ldr	r3, .L2167+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L696
	ldr	r3, .L2167+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L696
	ldr	r3, .L2167+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L696:
	ldr	r3, .L2167+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L697
	ldr	r3, .L2167+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L697
	ldr	r3, .L2167+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L697
	ldr	r3, .L2167+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L697:
	ldr	r3, .L2167+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L694
	ldr	r3, .L2167+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L694
	ldr	r3, .L2167+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L694
	ldr	r3, .L2167+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L694:
	ldr	r3, .L2167+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2167+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L698
	ldr	r3, .L2167+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2167+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L698
	ldr	r3, .L2167+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2167+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L698
	ldr	r3, .L2167+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2167+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L698
	ldr	r3, .L2167+132
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L2167+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L2167+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L698
	ldr	r3, .L2167+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2167+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L700
.L698:
	ldr	r3, .L2167+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2167+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L700:
	ldr	r3, .L2167+128
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L702
	ldr	r3, .L2167+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L702
	ldr	r3, .L2167+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L702
	ldr	r3, .L2167+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L702
	ldr	r3, .L2167+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L702
	ldr	r3, .L2167+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2167+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L702
	ldr	r3, .L2167+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L702
	ldr	r3, .L2167+128
	ldr	r2, [r3]
	ldr	r3, .L2167+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L702
	ldr	r3, .L2167+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2167+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L704
.L702:
	ldr	r3, .L2167+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L704
	ldr	r3, .L2167+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L704
	ldr	r3, .L2167+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L704
	ldr	r3, .L2167+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L704
	ldr	r3, .L2167+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L704
	ldr	r3, .L2167+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L704:
	ldr	r3, .L2167+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2167+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L705
	ldr	r3, .L2167+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2167+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L705
	ldr	r3, .L2167+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L705
	ldr	r3, .L2167+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L705
	ldr	r3, .L2167+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L705
	ldr	r3, .L2167+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L705
	ldr	r3, .L2167+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L705
	ldr	r3, .L2167+80
	ldr	r3, [r3]
	cmp	r3, #16
	beq	.L708
.L705:
	ldr	r3, .L2167+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L708
	ldr	r3, .L2167+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L708
	ldr	r3, .L2167+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L708
	ldr	r3, .L2167+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L708
	ldr	r3, .L2167+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L708
	ldr	r3, .L2167+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L708:
	ldr	r3, .L2167+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2167+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L709
	ldr	r3, .L2167+128
	ldr	r2, [r3]
	ldr	r3, .L2167+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L709
	ldr	r3, .L2167+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L710
	ldr	r3, .L2167+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L710
	ldr	r3, .L2167+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L710
	ldr	r3, .L2167+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L711
.L710:
	ldr	r3, .L2167+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L709
	ldr	r3, .L2167+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L709
	ldr	r3, .L2167+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L709
	ldr	r3, .L2167+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L709
.L711:
	ldr	r3, .L2167+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L2167+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L712
.L709:
	ldr	r3, .L2167+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L712
	ldr	r3, .L2167+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L712
	ldr	r3, .L2167+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L712
	ldr	r3, .L2167+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L712
	ldr	r3, .L2167+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L712
	ldr	r3, .L2167+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L712:
	ldr	r3, .L2167+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2167+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L713
	ldr	r3, .L2167+128
	ldr	r3, [r3]
	cmp	r3, #16
	bne	.L715
.L713:
	ldr	r3, .L2167+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L715
	ldr	r3, .L2167+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L715
	ldr	r3, .L2167+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L715
	ldr	r3, .L2167+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L715
	ldr	r3, .L2167+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L715
	ldr	r3, .L2167+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L715
	ldr	r3, .L2167+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L715
	ldr	r3, .L2167+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L715
	ldr	r3, .L2167+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L715
	ldr	r3, .L2167+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L715:
	ldr	r3, .L2167+128
	ldr	r3, [r3]
	cmp	r3, #16
	bne	.L716
	ldr	r3, .L2167+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L2167+60
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L717
	mov	r3, #0
	mov	r4, r3
.L717:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L716
	ldr	r3, .L2167+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2167+68
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L718
	mov	r3, #0
	mov	r4, r3
.L718:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L719
.L716:
	ldr	r3, .L2167+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L719
	ldr	r3, .L2167+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L719
	ldr	r3, .L2167+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L719
	ldr	r3, .L2167+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L719
	ldr	r3, .L2167+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L719
	ldr	r3, .L2167+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L719
	ldr	r3, .L2167+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L719
	ldr	r3, .L2167+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L719
	ldr	r3, .L2167+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L719
	ldr	r3, .L2167+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L719:
	ldr	r3, .L2167+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2167+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L720
	ldr	r3, .L2167+128
	ldr	r2, [r3]
	ldr	r3, .L2167+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L720
	ldr	r3, .L2167+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2167+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L720
	ldr	r3, .L2167+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L722
	ldr	r3, .L2167+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L722
	ldr	r3, .L2167+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L722
	ldr	r3, .L2167+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L723
.L722:
	ldr	r3, .L2167+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L720
	ldr	r3, .L2167+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L720
	ldr	r3, .L2167+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L720
	ldr	r3, .L2167+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L723
.L720:
	ldr	r3, .L2167+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L723
	ldr	r3, .L2167+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L723
	ldr	r3, .L2167+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L723
	ldr	r3, .L2167+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L723
	ldr	r3, .L2167+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L723
	ldr	r3, .L2167+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L723:
	ldr	r3, .L2167+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L724
	ldr	r3, .L2167+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L2167+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L725
.L724:
	ldr	r3, .L2167+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L725
	ldr	r3, .L2167+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L725
	ldr	r3, .L2167+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L725
	ldr	r3, .L2167+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L725
	ldr	r3, .L2167+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L725
	ldr	r3, .L2167+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L725
	ldr	r3, .L2167+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L725
	ldr	r3, .L2167+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L725
	ldr	r3, .L2167+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L725
	ldr	r3, .L2167+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L725:
	ldr	r3, .L2167+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L726
	ldr	r3, .L2167+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L727
.L726:
	ldr	r3, .L2167+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L727
	ldr	r3, .L2167+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L727
	ldr	r3, .L2167+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L727
	ldr	r3, .L2167+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L727
	ldr	r3, .L2167+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L727
	ldr	r3, .L2167+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L727
	ldr	r3, .L2167+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L727
	ldr	r3, .L2167+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L727
	ldr	r3, .L2167+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L727
	ldr	r3, .L2167+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L727:
	ldr	r3, .L2167+128
	ldr	r2, [r3]
	ldr	r3, .L2167+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L728
	ldr	r3, .L2167+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2167+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L728
	ldr	r3, .L2167+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L728
	ldr	r3, .L2167+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L728
	ldr	r3, .L2167+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L728
	ldr	r3, .L2167+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L728
	ldr	r3, .L2167+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L728
	ldr	r3, .L2167+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L731
.L728:
	ldr	r3, .L2167+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L731
	ldr	r3, .L2167+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L731
	ldr	r3, .L2167+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L731
	ldr	r3, .L2167+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L731
	ldr	r3, .L2167+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L731
	ldr	r3, .L2167+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L731:
	ldr	r3, .L2167+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2167+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L732
	ldr	r3, .L2167+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2167+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L732
	ldr	r3, .L2167+128
	ldr	r2, [r3]
	ldr	r3, .L2167+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L732
	ldr	r3, .L2167+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L2167+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L732
	ldr	r3, .L2167+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L735
	ldr	r3, .L2167+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L735
	ldr	r3, .L2167+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L735
	ldr	r3, .L2167+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L736
.L735:
	ldr	r3, .L2167+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L732
	ldr	r3, .L2167+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L732
	ldr	r3, .L2167+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L732
	ldr	r3, .L2167+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L736
.L732:
	ldr	r3, .L2167+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L736
	ldr	r3, .L2167+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L736
	ldr	r3, .L2167+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L736
	ldr	r3, .L2167+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L736
	ldr	r3, .L2167+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L736
	ldr	r3, .L2167+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L736:
	ldr	r3, .L2167+128
	ldr	r3, [r3]
	cmp	r3, #16
	bne	.L737
	ldr	r3, .L2167+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L737
	ldr	r3, .L2167+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L737
	ldr	r3, .L2167+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L737
	ldr	r3, .L2167+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L737
	ldr	r3, .L2167+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L737
	ldr	r3, .L2167+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L737
	ldr	r3, .L2167+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L737
	ldr	r3, .L2167+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L737
	ldr	r3, .L2167+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L737
	ldr	r3, .L2167+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L737:
	ldr	r3, .L2167+128
	ldr	r3, [r3]
	cmp	r3, #16
	beq	.L738
	ldr	r3, .L2167+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L738
	ldr	r3, .L2170
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L738
	ldr	r3, .L2170+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L738
	ldr	r3, .L2170+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L738
	ldr	r3, .L2170+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L738
	ldr	r3, .L2170+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L738
	ldr	r3, .L2170+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L738
	ldr	r3, .L2170+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L738
	ldr	r3, .L2170+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L738
	ldr	r3, .L2170+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L738:
	ldr	r3, .L2170+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L2170+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L739
	ldr	r3, .L2170+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2170+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L739
	ldr	r3, .L2170+56
	ldr	r2, [r3]
	ldr	r3, .L2170+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L739
	ldr	r3, .L2170+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L739
	ldr	r3, .L2170+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L739
	ldr	r3, .L2170+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L739
	ldr	r3, .L2170+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L739
	ldr	r3, .L2170+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L741
.L739:
	ldr	r3, .L2170+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L741
	ldr	r3, .L2170+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L741
	ldr	r3, .L2170+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L741
	ldr	r3, .L2170+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L741
	ldr	r3, .L2170+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L741
	ldr	r3, .L2170
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L741:
	ldr	r3, .L2170+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L2170+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L742
	ldr	r3, .L2170+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L742
	ldr	r3, .L2170+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L742
	ldr	r3, .L2170+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L742
	ldr	r3, .L2170+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L742
	ldr	r3, .L2170+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L742
	ldr	r3, .L2170+56
	ldr	r2, [r3]
	ldr	r3, .L2170+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L742
	ldr	r3, .L2170+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L744
.L742:
	ldr	r3, .L2170+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L744
	ldr	r3, .L2170+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L744
	ldr	r3, .L2170+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L744
	ldr	r3, .L2170+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L744
	ldr	r3, .L2170+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L744
	ldr	r3, .L2170
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L744:
	ldr	r3, .L2170+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L2170+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L745
	ldr	r3, .L2170+68
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L745
	ldr	r3, .L2170+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L745
	ldr	r3, .L2170+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L745
	ldr	r3, .L2170+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L745
	ldr	r3, .L2170+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L745
	ldr	r3, .L2170+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2170+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L745
	ldr	r3, .L2170+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L2170+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L747
.L745:
	ldr	r3, .L2170+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L747
	ldr	r3, .L2170+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L747
	ldr	r3, .L2170+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L747
	ldr	r3, .L2170+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L747
	ldr	r3, .L2170+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L747
	ldr	r3, .L2170
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L747:
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L748
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L748
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L748
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L749
.L748:
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L750
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L750
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L750
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L749
.L750:
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L751
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L751
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L751
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L749
.L751:
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L752
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L752
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L752
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L749
.L752:
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L753
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L753
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L753
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L749
.L753:
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L754
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L754
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L754
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L749
.L754:
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L755
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L755
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L755
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L749
.L755:
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L756
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L756
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L756
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L749
.L756:
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L749:
	ldr	r3, .L2170+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L2170+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L757
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L758
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L758
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L758
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L758:
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L759
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L759
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L759
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L759:
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L760
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L760
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L760
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L760:
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L757
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L757
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L757
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L757:
	ldr	r3, .L2170+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L761
	ldr	r3, .L2170+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L761
	ldr	r3, .L2170+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L761
	ldr	r3, .L2170+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L761
	ldr	r3, .L2170+160
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L2170+96
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L2170+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L761
	ldr	r3, .L2170+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L2170+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L763
.L761:
	ldr	r3, .L2170+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2170+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L763:
	ldr	r3, .L2170+56
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L765
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L765
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L765
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L765
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L765
	ldr	r3, .L2170+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2170+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L765
	ldr	r3, .L2170+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L765
	ldr	r3, .L2170+56
	ldr	r2, [r3]
	ldr	r3, .L2170+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L765
	ldr	r3, .L2170+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L2170+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L767
.L765:
	ldr	r3, .L2170+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L767
	ldr	r3, .L2170+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L767
	ldr	r3, .L2170+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L767
	ldr	r3, .L2170+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L767
	ldr	r3, .L2170+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L767
	ldr	r3, .L2170+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L767:
	ldr	r3, .L2170+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L2170+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L768
	ldr	r3, .L2170+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2170+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L768
	ldr	r3, .L2170+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L768
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L768
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L768
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L768
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L768
	ldr	r3, .L2170+68
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L771
.L768:
	ldr	r3, .L2170+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L771
	ldr	r3, .L2170+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L771
	ldr	r3, .L2170+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L771
	ldr	r3, .L2170+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L771
	ldr	r3, .L2170+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L771
	ldr	r3, .L2170+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L771:
	ldr	r3, .L2170+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2170+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L772
	ldr	r3, .L2170+56
	ldr	r2, [r3]
	ldr	r3, .L2170+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L772
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L773
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L773
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L773
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L774
.L773:
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L772
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L772
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L772
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L772
.L774:
	ldr	r3, .L2170+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L2170+100
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L775
.L772:
	ldr	r3, .L2170+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L775
	ldr	r3, .L2170+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L775
	ldr	r3, .L2170+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L775
	ldr	r3, .L2170+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L775
	ldr	r3, .L2170+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L775
	ldr	r3, .L2170+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L775:
	ldr	r3, .L2170+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L2170+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L776
	ldr	r3, .L2170+56
	ldr	r3, [r3]
	cmp	r3, #15
	bne	.L778
.L776:
	ldr	r3, .L2170+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L778
	ldr	r3, .L2170+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L778
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L778
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L778
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L778
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L778
	ldr	r3, .L2170+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L778
	ldr	r3, .L2170+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L778
	ldr	r3, .L2170+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L778
	ldr	r3, .L2170+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L778:
	ldr	r3, .L2170+56
	ldr	r3, [r3]
	cmp	r3, #15
	bne	.L779
	ldr	r3, .L2170+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L2170+52
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L780
	mov	r3, #0
	mov	r4, r3
.L780:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L779
	ldr	r3, .L2170+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L2170+64
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L781
	mov	r3, #0
	mov	r4, r3
.L781:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L782
.L779:
	ldr	r3, .L2170+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L782
	ldr	r3, .L2170+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L782
	ldr	r3, .L2170+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L782
	ldr	r3, .L2170+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L782
	ldr	r3, .L2170+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L782
	ldr	r3, .L2170+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L782
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L782
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L782
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L782
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	b	.L2171
.L2172:
	.align	2
.L2170:
	.word	p15_evt
	.word	p15_l3
	.word	p15_l2
	.word	p15_l0
	.word	p15_l1
	.word	_x_p15_l3
	.word	_x_p15_l2
	.word	_x_p15_l1
	.word	_x_p15_l0
	.word	proposed15
	.word	_x_proposed15
	.word	_x_p15_c
	.word	p15_c
	.word	max_prop
	.word	v1
	.word	proposed14
	.word	_x_proposed14
	.word	_x_v1
	.word	_x_p14_l3
	.word	_x_p14_l2
	.word	_x_p14_l0
	.word	_x_p14_l1
	.word	v2
	.word	_x_v2
	.word	p14_c
	.word	_x_p14_c
	.word	p14_l3
	.word	p14_l2
	.word	p14_l0
	.word	p14_l1
	.word	p14_evt
	.word	_x_proposed13
	.word	p13_l0
	.word	_x_p13_l0
	.word	p13_l1
	.word	_x_p13_l1
	.word	p13_l2
	.word	_x_p13_l2
	.word	p13_l3
	.word	_x_p13_l3
	.word	delta
	.word	p13_c
	.word	_x_p13_c
.L2171:
.L782:
	ldr	r3, .L2170+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2170+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L783
	ldr	r3, .L2170+56
	ldr	r2, [r3]
	ldr	r3, .L2170+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L783
	ldr	r3, .L2170+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L2170+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L783
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L785
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L785
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L785
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L786
.L785:
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L783
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L783
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L783
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L786
.L783:
	ldr	r3, .L2170+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L786
	ldr	r3, .L2170+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L786
	ldr	r3, .L2170+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L786
	ldr	r3, .L2170+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L786
	ldr	r3, .L2170+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L786
	ldr	r3, .L2170+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L786:
	ldr	r3, .L2170+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L787
	ldr	r3, .L2170+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L2170+100
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L788
.L787:
	ldr	r3, .L2170+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L788
	ldr	r3, .L2170+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L788
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L788
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L788
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L788
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L788
	ldr	r3, .L2170+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L788
	ldr	r3, .L2170+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L788
	ldr	r3, .L2170+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L788
	ldr	r3, .L2170+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L788:
	ldr	r3, .L2170+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L789
	ldr	r3, .L2170+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L790
.L789:
	ldr	r3, .L2170+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L790
	ldr	r3, .L2170+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L790
	ldr	r3, .L2170+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L790
	ldr	r3, .L2170+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L790
	ldr	r3, .L2170+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L790
	ldr	r3, .L2170+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L790
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L790
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L790
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L790
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L790:
	ldr	r3, .L2170+56
	ldr	r2, [r3]
	ldr	r3, .L2170+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L791
	ldr	r3, .L2170+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L2170+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L791
	ldr	r3, .L2170+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L791
	ldr	r3, .L2170+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L791
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L791
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L791
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L791
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L794
.L791:
	ldr	r3, .L2170+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L794
	ldr	r3, .L2170+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L794
	ldr	r3, .L2170+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L794
	ldr	r3, .L2170+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L794
	ldr	r3, .L2170+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L794
	ldr	r3, .L2170+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L794:
	ldr	r3, .L2170+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L2170+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L795
	ldr	r3, .L2170+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2170+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L795
	ldr	r3, .L2170+56
	ldr	r2, [r3]
	ldr	r3, .L2170+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L795
	ldr	r3, .L2170+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L2170+100
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L795
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L798
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L798
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L798
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L799
.L798:
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L795
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L795
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L795
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L799
.L795:
	ldr	r3, .L2170+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L799
	ldr	r3, .L2170+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L799
	ldr	r3, .L2170+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L799
	ldr	r3, .L2170+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L799
	ldr	r3, .L2170+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L799
	ldr	r3, .L2170+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L799:
	ldr	r3, .L2170+56
	ldr	r3, [r3]
	cmp	r3, #15
	bne	.L800
	ldr	r3, .L2170+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L800
	ldr	r3, .L2170+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L800
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L800
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L800
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L800
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L800
	ldr	r3, .L2170+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L800
	ldr	r3, .L2170+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L800
	ldr	r3, .L2170+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L800
	ldr	r3, .L2170+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L800:
	ldr	r3, .L2170+56
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L801
	ldr	r3, .L2170+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L801
	ldr	r3, .L2170+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L801
	ldr	r3, .L2170+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L801
	ldr	r3, .L2170+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L801
	ldr	r3, .L2170+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L801
	ldr	r3, .L2170+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L801
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L801
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L801
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L801
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L801:
	ldr	r3, .L2170+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L2170+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L802
	ldr	r3, .L2170+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2170+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L802
	ldr	r3, .L2170+56
	ldr	r2, [r3]
	ldr	r3, .L2170+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L802
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L802
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L802
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L802
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L802
	ldr	r3, .L2170+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L804
.L802:
	ldr	r3, .L2170+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L804
	ldr	r3, .L2170+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L804
	ldr	r3, .L2170+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L804
	ldr	r3, .L2170+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L804
	ldr	r3, .L2170+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L804
	ldr	r3, .L2170+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L804:
	ldr	r3, .L2170+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L2170+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L805
	ldr	r3, .L2170+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L805
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L805
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L805
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L805
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L805
	ldr	r3, .L2170+56
	ldr	r2, [r3]
	ldr	r3, .L2170+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L805
	ldr	r3, .L2170+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L807
.L805:
	ldr	r3, .L2170+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L807
	ldr	r3, .L2170+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L807
	ldr	r3, .L2170+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L807
	ldr	r3, .L2170+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L807
	ldr	r3, .L2170+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L807
	ldr	r3, .L2170+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L807:
	ldr	r3, .L2170+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L2170+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L808
	ldr	r3, .L2170+68
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L808
	ldr	r3, .L2170+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L808
	ldr	r3, .L2170+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L808
	ldr	r3, .L2170+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L808
	ldr	r3, .L2170+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L808
	ldr	r3, .L2170+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2170+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L808
	ldr	r3, .L2170+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L2170+100
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L810
.L808:
	ldr	r3, .L2170+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L810
	ldr	r3, .L2170+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L810
	ldr	r3, .L2170+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L810
	ldr	r3, .L2170+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L810
	ldr	r3, .L2170+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L810
	ldr	r3, .L2170+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L810:
	ldr	r3, .L2170+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L811
	ldr	r3, .L2170+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L811
	ldr	r3, .L2170+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L811
	ldr	r3, .L2170+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L812
.L811:
	ldr	r3, .L2170+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L813
	ldr	r3, .L2170+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L813
	ldr	r3, .L2170+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L813
	ldr	r3, .L2170+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L812
.L813:
	ldr	r3, .L2170+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L814
	ldr	r3, .L2170+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L814
	ldr	r3, .L2170+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L814
	ldr	r3, .L2170+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L812
.L814:
	ldr	r3, .L2170+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L815
	ldr	r3, .L2170+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L815
	ldr	r3, .L2170+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L815
	ldr	r3, .L2170+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L812
.L815:
	ldr	r3, .L2170+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L816
	ldr	r3, .L2170+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L816
	ldr	r3, .L2170+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L816
	ldr	r3, .L2170+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L812
.L816:
	ldr	r3, .L2170+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L817
	ldr	r3, .L2170+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L817
	ldr	r3, .L2170+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L817
	ldr	r3, .L2170+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L812
.L817:
	ldr	r3, .L2170+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L818
	ldr	r3, .L2170+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L818
	ldr	r3, .L2170+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L818
	ldr	r3, .L2170+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L812
.L818:
	ldr	r3, .L2170+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L819
	ldr	r3, .L2170+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L819
	ldr	r3, .L2170+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L819
	ldr	r3, .L2170+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L812
.L819:
	ldr	r3, .L2170+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2170+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2170+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2170+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L812:
	ldr	r3, .L2170+168
	ldr	r3, [r3]	@ float
	ldr	r2, .L2170+124
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L820
	ldr	r3, .L2170+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L821
	ldr	r3, .L2170+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L821
	ldr	r3, .L2170+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L821
	ldr	r3, .L2170+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L821:
	ldr	r3, .L2170+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L822
	ldr	r3, .L2170+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L822
	ldr	r3, .L2170+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L822
	ldr	r3, .L2170+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L822:
	ldr	r3, .L2170+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L823
	ldr	r3, .L2170+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L823
	ldr	r3, .L2170+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L823
	ldr	r3, .L2170+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L823:
	ldr	r3, .L2170+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L820
	ldr	r3, .L2170+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L820
	ldr	r3, .L2170+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L820
	ldr	r3, .L2170+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L820:
	ldr	r3, .L2170+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2170+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L824
	ldr	r3, .L2170+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2170+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L824
	ldr	r3, .L2170+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2170+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L824
	ldr	r3, .L2170+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2170+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L824
	ldr	r3, .L2170+160
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L2170+164
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L2170+168
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L824
	ldr	r3, .L2173
	ldr	r3, [r3]	@ float
	ldr	r2, .L2173+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L826
.L824:
	ldr	r3, .L2173+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2173+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L826:
	ldr	r3, .L2173+16
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L828
	ldr	r3, .L2173+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L828
	ldr	r3, .L2173+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L828
	ldr	r3, .L2173+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L828
	ldr	r3, .L2173+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L828
	ldr	r3, .L2173+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2173+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L828
	ldr	r3, .L2173+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L828
	ldr	r3, .L2173+16
	ldr	r2, [r3]
	ldr	r3, .L2173+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L828
	ldr	r3, .L2173
	ldr	r3, [r3]	@ float
	ldr	r2, .L2173+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L830
.L828:
	ldr	r3, .L2173+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L830
	ldr	r3, .L2173+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L830
	ldr	r3, .L2173+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L830
	ldr	r3, .L2173+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L830
	ldr	r3, .L2173+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L830
	ldr	r3, .L2173+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L830:
	ldr	r3, .L2173
	ldr	r3, [r3]	@ float
	ldr	r2, .L2173+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L831
	ldr	r3, .L2173+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2173+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L831
	ldr	r3, .L2173+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L831
	ldr	r3, .L2173+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L831
	ldr	r3, .L2173+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L831
	ldr	r3, .L2173+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L831
	ldr	r3, .L2173+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L831
	ldr	r3, .L2173+84
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L834
.L831:
	ldr	r3, .L2173+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L834
	ldr	r3, .L2173+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L834
	ldr	r3, .L2173+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L834
	ldr	r3, .L2173+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L834
	ldr	r3, .L2173+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L834
	ldr	r3, .L2173+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L834:
	ldr	r3, .L2173+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2173+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L835
	ldr	r3, .L2173+16
	ldr	r2, [r3]
	ldr	r3, .L2173+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L835
	ldr	r3, .L2173+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L836
	ldr	r3, .L2173+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L836
	ldr	r3, .L2173+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L836
	ldr	r3, .L2173+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L837
.L836:
	ldr	r3, .L2173+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L835
	ldr	r3, .L2173+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L835
	ldr	r3, .L2173+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L835
	ldr	r3, .L2173+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L835
.L837:
	ldr	r3, .L2173+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2173+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L838
.L835:
	ldr	r3, .L2173+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L838
	ldr	r3, .L2173+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L838
	ldr	r3, .L2173+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L838
	ldr	r3, .L2173+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L838
	ldr	r3, .L2173+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L838
	ldr	r3, .L2173+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L838:
	ldr	r3, .L2173
	ldr	r3, [r3]	@ float
	ldr	r2, .L2173+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L839
	ldr	r3, .L2173+16
	ldr	r3, [r3]
	cmp	r3, #14
	bne	.L841
.L839:
	ldr	r3, .L2173+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L841
	ldr	r3, .L2173+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L841
	ldr	r3, .L2173+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L841
	ldr	r3, .L2173+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L841
	ldr	r3, .L2173+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L841
	ldr	r3, .L2173+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L841
	ldr	r3, .L2173+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L841
	ldr	r3, .L2173+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L841
	ldr	r3, .L2173+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L841
	ldr	r3, .L2173+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L841:
	ldr	r3, .L2173+16
	ldr	r3, [r3]
	cmp	r3, #14
	bne	.L842
	ldr	r3, .L2173+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2173+72
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L843
	mov	r3, #0
	mov	r4, r3
.L843:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L842
	ldr	r3, .L2173
	ldr	r3, [r3]	@ float
	ldr	r2, .L2173+4
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L844
	mov	r3, #0
	mov	r4, r3
.L844:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L845
.L842:
	ldr	r3, .L2173+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L845
	ldr	r3, .L2173+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L845
	ldr	r3, .L2173+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L845
	ldr	r3, .L2173+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L845
	ldr	r3, .L2173+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L845
	ldr	r3, .L2173+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L845
	ldr	r3, .L2173+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L845
	ldr	r3, .L2173+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L845
	ldr	r3, .L2173+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L845
	ldr	r3, .L2173+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L845:
	ldr	r3, .L2173+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2173+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L846
	ldr	r3, .L2173+16
	ldr	r2, [r3]
	ldr	r3, .L2173+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L846
	ldr	r3, .L2173
	ldr	r3, [r3]	@ float
	ldr	r2, .L2173+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L846
	ldr	r3, .L2173+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L848
	ldr	r3, .L2173+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L848
	ldr	r3, .L2173+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L848
	ldr	r3, .L2173+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L849
.L848:
	ldr	r3, .L2173+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L846
	ldr	r3, .L2173+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L846
	ldr	r3, .L2173+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L846
	ldr	r3, .L2173+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L849
.L846:
	ldr	r3, .L2173+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L849
	ldr	r3, .L2173+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L849
	ldr	r3, .L2173+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L849
	ldr	r3, .L2173+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L849
	ldr	r3, .L2173+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L849
	ldr	r3, .L2173+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L849:
	ldr	r3, .L2173+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L850
	ldr	r3, .L2173+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2173+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L851
.L850:
	ldr	r3, .L2173+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L851
	ldr	r3, .L2173+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L851
	ldr	r3, .L2173+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L851
	ldr	r3, .L2173+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L851
	ldr	r3, .L2173+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L851
	ldr	r3, .L2173+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L851
	ldr	r3, .L2173+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L851
	ldr	r3, .L2173+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L851
	ldr	r3, .L2173+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L851
	ldr	r3, .L2173+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L851:
	ldr	r3, .L2173+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L852
	ldr	r3, .L2173+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L853
.L852:
	ldr	r3, .L2173+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L853
	ldr	r3, .L2173+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L853
	ldr	r3, .L2173+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L853
	ldr	r3, .L2173+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L853
	ldr	r3, .L2173+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L853
	ldr	r3, .L2173+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L853
	ldr	r3, .L2173+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L853
	ldr	r3, .L2173+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L853
	ldr	r3, .L2173+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L853
	ldr	r3, .L2173+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L853:
	ldr	r3, .L2173+16
	ldr	r2, [r3]
	ldr	r3, .L2173+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L854
	ldr	r3, .L2173
	ldr	r3, [r3]	@ float
	ldr	r2, .L2173+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L854
	ldr	r3, .L2173+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L854
	ldr	r3, .L2173+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L854
	ldr	r3, .L2173+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L854
	ldr	r3, .L2173+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L854
	ldr	r3, .L2173+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L854
	ldr	r3, .L2173+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L857
.L854:
	ldr	r3, .L2173+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L857
	ldr	r3, .L2173+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L857
	ldr	r3, .L2173+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L857
	ldr	r3, .L2173+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L857
	ldr	r3, .L2173+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L857
	ldr	r3, .L2173+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L857:
	ldr	r3, .L2173
	ldr	r3, [r3]	@ float
	ldr	r2, .L2173+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L858
	ldr	r3, .L2173+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2173+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L858
	ldr	r3, .L2173+16
	ldr	r2, [r3]
	ldr	r3, .L2173+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L858
	ldr	r3, .L2173+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2173+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L858
	ldr	r3, .L2173+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L861
	ldr	r3, .L2173+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L861
	ldr	r3, .L2173+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L861
	ldr	r3, .L2173+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L862
.L861:
	ldr	r3, .L2173+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L858
	ldr	r3, .L2173+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L858
	ldr	r3, .L2173+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L858
	ldr	r3, .L2173+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L862
.L858:
	ldr	r3, .L2173+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L862
	ldr	r3, .L2173+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L862
	ldr	r3, .L2173+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L862
	ldr	r3, .L2173+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L862
	ldr	r3, .L2173+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L862
	ldr	r3, .L2173+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L862:
	ldr	r3, .L2173+16
	ldr	r3, [r3]
	cmp	r3, #14
	bne	.L863
	ldr	r3, .L2173+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L863
	ldr	r3, .L2173+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L863
	ldr	r3, .L2173+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L863
	ldr	r3, .L2173+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L863
	ldr	r3, .L2173+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L863
	ldr	r3, .L2173+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L863
	ldr	r3, .L2173+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L863
	ldr	r3, .L2173+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L863
	ldr	r3, .L2173+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L863
	ldr	r3, .L2173+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L863:
	ldr	r3, .L2173+16
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L864
	ldr	r3, .L2173+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L864
	ldr	r3, .L2173+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L864
	ldr	r3, .L2173+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L864
	ldr	r3, .L2173+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L864
	ldr	r3, .L2173+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L864
	ldr	r3, .L2173+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L864
	ldr	r3, .L2173+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L864
	ldr	r3, .L2173+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L864
	ldr	r3, .L2173+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L864
	ldr	r3, .L2173+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L864:
	ldr	r3, .L2173
	ldr	r3, [r3]	@ float
	ldr	r2, .L2173+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L865
	ldr	r3, .L2173+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2173+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L865
	ldr	r3, .L2173+16
	ldr	r2, [r3]
	ldr	r3, .L2173+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L865
	ldr	r3, .L2173+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L865
	ldr	r3, .L2173+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L865
	ldr	r3, .L2173+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L865
	ldr	r3, .L2173+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L865
	ldr	r3, .L2173+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L867
.L865:
	ldr	r3, .L2173+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L867
	ldr	r3, .L2173+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L867
	ldr	r3, .L2173+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L867
	ldr	r3, .L2173+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L867
	ldr	r3, .L2173+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L867
	ldr	r3, .L2173+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L867:
	ldr	r3, .L2173
	ldr	r3, [r3]	@ float
	ldr	r2, .L2173+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L868
	ldr	r3, .L2173+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L868
	ldr	r3, .L2173+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L868
	ldr	r3, .L2173+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L868
	ldr	r3, .L2173+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L868
	ldr	r3, .L2173+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L868
	ldr	r3, .L2173+16
	ldr	r2, [r3]
	ldr	r3, .L2173+84
	ldr	r3, [r3]
	cmp	r2, r3
	b	.L2174
.L2175:
	.align	2
.L2173:
	.word	proposed13
	.word	_x_proposed13
	.word	delta
	.word	p13_evt
	.word	v1
	.word	proposed13
	.word	_x_proposed13
	.word	_x_p13_l3
	.word	_x_p13_l2
	.word	_x_p13_l0
	.word	_x_p13_l1
	.word	p13_c
	.word	_x_p13_c
	.word	p13_l3
	.word	p13_l2
	.word	p13_l0
	.word	p13_l1
	.word	p13_evt
	.word	max_prop
	.word	_x_v2
	.word	v1
	.word	_x_v1
	.word	proposed12
	.word	_x_proposed12
	.word	p12_c
	.word	_x_p12_c
	.word	delta
	.word	p12_evt
	.word	_x_p12_l3
	.word	_x_p12_l2
	.word	_x_p12_l0
	.word	_x_p12_l1
	.word	p12_l3
	.word	p12_l2
	.word	p12_l0
	.word	p12_l1
	.word	v2
.L2174:
	bne	.L868
	ldr	r3, .L2173+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L870
.L868:
	ldr	r3, .L2173+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L870
	ldr	r3, .L2173+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L870
	ldr	r3, .L2173+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L870
	ldr	r3, .L2173+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L870
	ldr	r3, .L2173+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L870
	ldr	r3, .L2173+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L870:
	ldr	r3, .L2173+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2173+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L871
	ldr	r3, .L2173+84
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L871
	ldr	r3, .L2173+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L871
	ldr	r3, .L2173+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L871
	ldr	r3, .L2173+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L871
	ldr	r3, .L2173+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L871
	ldr	r3, .L2173+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2173+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L871
	ldr	r3, .L2173+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2173+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L873
.L871:
	ldr	r3, .L2173+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L873
	ldr	r3, .L2173+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L873
	ldr	r3, .L2173+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L873
	ldr	r3, .L2173+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L873
	ldr	r3, .L2173+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L873
	ldr	r3, .L2173+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L873:
	ldr	r3, .L2173+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L874
	ldr	r3, .L2173+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L874
	ldr	r3, .L2173+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L874
	ldr	r3, .L2173+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L875
.L874:
	ldr	r3, .L2173+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L876
	ldr	r3, .L2173+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L876
	ldr	r3, .L2173+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L876
	ldr	r3, .L2173+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L875
.L876:
	ldr	r3, .L2173+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L877
	ldr	r3, .L2173+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L877
	ldr	r3, .L2173+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L877
	ldr	r3, .L2173+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L875
.L877:
	ldr	r3, .L2173+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L878
	ldr	r3, .L2173+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L878
	ldr	r3, .L2173+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L878
	ldr	r3, .L2173+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L875
.L878:
	ldr	r3, .L2173+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L879
	ldr	r3, .L2173+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L879
	ldr	r3, .L2173+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L879
	ldr	r3, .L2173+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L875
.L879:
	ldr	r3, .L2173+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L880
	ldr	r3, .L2173+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L880
	ldr	r3, .L2173+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L880
	ldr	r3, .L2173+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L875
.L880:
	ldr	r3, .L2173+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L881
	ldr	r3, .L2173+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L881
	ldr	r3, .L2173+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L881
	ldr	r3, .L2173+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L875
.L881:
	ldr	r3, .L2173+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L882
	ldr	r3, .L2173+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L882
	ldr	r3, .L2173+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L882
	ldr	r3, .L2173+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L875
.L882:
	ldr	r3, .L2173+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2173+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2173+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2173+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L875:
	ldr	r3, .L2173+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L2173+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L883
	ldr	r3, .L2173+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L884
	ldr	r3, .L2173+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L884
	ldr	r3, .L2173+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L884
	ldr	r3, .L2173+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L884:
	ldr	r3, .L2173+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L885
	ldr	r3, .L2173+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L885
	ldr	r3, .L2173+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L885
	ldr	r3, .L2173+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L885:
	ldr	r3, .L2173+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L886
	ldr	r3, .L2173+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L886
	ldr	r3, .L2173+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L886
	ldr	r3, .L2173+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L886:
	ldr	r3, .L2173+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L883
	ldr	r3, .L2173+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L883
	ldr	r3, .L2173+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L883
	ldr	r3, .L2173+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L883:
	ldr	r3, .L2173+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2173+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L887
	ldr	r3, .L2173+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2173+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L887
	ldr	r3, .L2173+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2173+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L887
	ldr	r3, .L2173+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2173+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L887
	ldr	r3, .L2173+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L2173+96
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L2173+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L887
	ldr	r3, .L2173+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L2173+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L889
.L887:
	ldr	r3, .L2173+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2173+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L889:
	ldr	r3, .L2173+80
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L891
	ldr	r3, .L2173+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L891
	ldr	r3, .L2173+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L891
	ldr	r3, .L2173+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L891
	ldr	r3, .L2173+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L891
	ldr	r3, .L2173+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2173+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L891
	ldr	r3, .L2173+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L891
	ldr	r3, .L2173+80
	ldr	r2, [r3]
	ldr	r3, .L2173+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L891
	ldr	r3, .L2173+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L2173+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L893
.L891:
	ldr	r3, .L2173+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L893
	ldr	r3, .L2173+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L893
	ldr	r3, .L2173+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L893
	ldr	r3, .L2173+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L893
	ldr	r3, .L2173+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L893
	ldr	r3, .L2173+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L893:
	ldr	r3, .L2173+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L2173+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L894
	ldr	r3, .L2173+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2173+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L894
	ldr	r3, .L2173+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L894
	ldr	r3, .L2173+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L894
	ldr	r3, .L2173+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L894
	ldr	r3, .L2173+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L894
	ldr	r3, .L2173+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L894
	ldr	r3, .L2173+84
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L897
.L894:
	ldr	r3, .L2173+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L897
	ldr	r3, .L2173+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L897
	ldr	r3, .L2173+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L897
	ldr	r3, .L2173+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L897
	ldr	r3, .L2173+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L897
	ldr	r3, .L2173+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L897:
	ldr	r3, .L2173+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2173+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L898
	ldr	r3, .L2173+80
	ldr	r2, [r3]
	ldr	r3, .L2173+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L898
	ldr	r3, .L2173+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L899
	ldr	r3, .L2173+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L899
	ldr	r3, .L2173+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L899
	ldr	r3, .L2173+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L900
.L899:
	ldr	r3, .L2173+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L898
	ldr	r3, .L2173+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L898
	ldr	r3, .L2173+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L898
	ldr	r3, .L2173+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L898
.L900:
	ldr	r3, .L2173+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L2173+100
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L901
.L898:
	ldr	r3, .L2173+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L901
	ldr	r3, .L2173+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L901
	ldr	r3, .L2173+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L901
	ldr	r3, .L2173+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L901
	ldr	r3, .L2173+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L901
	ldr	r3, .L2173+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L901:
	ldr	r3, .L2173+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L2173+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L902
	ldr	r3, .L2173+80
	ldr	r3, [r3]
	cmp	r3, #13
	bne	.L904
.L902:
	ldr	r3, .L2173+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L904
	ldr	r3, .L2173+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L904
	ldr	r3, .L2173+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L904
	ldr	r3, .L2173+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L904
	ldr	r3, .L2173+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L904
	ldr	r3, .L2173+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L904
	ldr	r3, .L2173+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L904
	ldr	r3, .L2173+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L904
	ldr	r3, .L2173+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L904
	ldr	r3, .L2173+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L904:
	ldr	r3, .L2173+80
	ldr	r3, [r3]
	cmp	r3, #13
	bne	.L905
	ldr	r3, .L2173+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L2173+72
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L906
	mov	r3, #0
	mov	r4, r3
.L906:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L905
	ldr	r3, .L2173+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L2173+92
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L907
	mov	r3, #0
	mov	r4, r3
.L907:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L908
.L905:
	ldr	r3, .L2173+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L908
	ldr	r3, .L2173+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L908
	ldr	r3, .L2173+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L908
	ldr	r3, .L2173+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L908
	ldr	r3, .L2173+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L908
	ldr	r3, .L2173+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L908
	ldr	r3, .L2173+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L908
	ldr	r3, .L2173+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L908
	ldr	r3, .L2173+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L908
	ldr	r3, .L2173+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L908:
	ldr	r3, .L2173+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2173+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L909
	ldr	r3, .L2173+80
	ldr	r2, [r3]
	ldr	r3, .L2173+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L909
	ldr	r3, .L2173+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L2173+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L909
	ldr	r3, .L2173+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L911
	ldr	r3, .L2173+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L911
	ldr	r3, .L2173+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L911
	ldr	r3, .L2173+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L912
.L911:
	ldr	r3, .L2173+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L909
	ldr	r3, .L2173+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L909
	ldr	r3, .L2173+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L909
	ldr	r3, .L2173+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L912
.L909:
	ldr	r3, .L2173+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L912
	ldr	r3, .L2173+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L912
	ldr	r3, .L2173+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L912
	ldr	r3, .L2173+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L912
	ldr	r3, .L2173+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L912
	ldr	r3, .L2173+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L912:
	ldr	r3, .L2173+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L913
	ldr	r3, .L2173+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L2173+100
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L914
.L913:
	ldr	r3, .L2173+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L914
	ldr	r3, .L2173+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L914
	ldr	r3, .L2173+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L914
	ldr	r3, .L2173+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L914
	ldr	r3, .L2173+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L914
	ldr	r3, .L2173+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L914
	ldr	r3, .L2173+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L914
	ldr	r3, .L2173+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L914
	ldr	r3, .L2173+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L914
	ldr	r3, .L2173+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L914:
	ldr	r3, .L2173+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L915
	ldr	r3, .L2176
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L916
.L915:
	ldr	r3, .L2176+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L916
	ldr	r3, .L2176+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L916
	ldr	r3, .L2176+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L916
	ldr	r3, .L2176+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L916
	ldr	r3, .L2176+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L916
	ldr	r3, .L2176+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L916
	ldr	r3, .L2176+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L916
	ldr	r3, .L2176+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L916
	ldr	r3, .L2176+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L916
	ldr	r3, .L2176+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L916:
	ldr	r3, .L2176+60
	ldr	r2, [r3]
	ldr	r3, .L2176+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L917
	ldr	r3, .L2176+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2176+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L917
	ldr	r3, .L2176
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L917
	ldr	r3, .L2176+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L917
	ldr	r3, .L2176+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L917
	ldr	r3, .L2176+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L917
	ldr	r3, .L2176+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L917
	ldr	r3, .L2176+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L920
.L917:
	ldr	r3, .L2176+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L920
	ldr	r3, .L2176+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L920
	ldr	r3, .L2176+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L920
	ldr	r3, .L2176+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L920
	ldr	r3, .L2176+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L920
	ldr	r3, .L2176+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L920:
	ldr	r3, .L2176+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2176+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L921
	ldr	r3, .L2176+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2176+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L921
	ldr	r3, .L2176+60
	ldr	r2, [r3]
	ldr	r3, .L2176+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L921
	ldr	r3, .L2176+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L2176
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L921
	ldr	r3, .L2176+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L924
	ldr	r3, .L2176+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L924
	ldr	r3, .L2176+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L924
	ldr	r3, .L2176+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L925
.L924:
	ldr	r3, .L2176+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L921
	ldr	r3, .L2176+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L921
	ldr	r3, .L2176+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L921
	ldr	r3, .L2176+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L925
.L921:
	ldr	r3, .L2176+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L925
	ldr	r3, .L2176+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L925
	ldr	r3, .L2176+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L925
	ldr	r3, .L2176+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L925
	ldr	r3, .L2176+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L925
	ldr	r3, .L2176+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L925:
	ldr	r3, .L2176+60
	ldr	r3, [r3]
	cmp	r3, #13
	bne	.L926
	ldr	r3, .L2176+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L926
	ldr	r3, .L2176+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L926
	ldr	r3, .L2176+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L926
	ldr	r3, .L2176+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L926
	ldr	r3, .L2176+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L926
	ldr	r3, .L2176+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L926
	ldr	r3, .L2176+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L926
	ldr	r3, .L2176+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L926
	ldr	r3, .L2176+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L926
	ldr	r3, .L2176+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L926:
	ldr	r3, .L2176+60
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L927
	ldr	r3, .L2176+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L927
	ldr	r3, .L2176+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L927
	ldr	r3, .L2176+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L927
	ldr	r3, .L2176+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L927
	ldr	r3, .L2176+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L927
	ldr	r3, .L2176+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L927
	ldr	r3, .L2176+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L927
	ldr	r3, .L2176+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L927
	ldr	r3, .L2176+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L927
	ldr	r3, .L2176+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L927:
	ldr	r3, .L2176+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2176+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L928
	ldr	r3, .L2176+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2176+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L928
	ldr	r3, .L2176+60
	ldr	r2, [r3]
	ldr	r3, .L2176+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L928
	ldr	r3, .L2176+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L928
	ldr	r3, .L2176+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L928
	ldr	r3, .L2176+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L928
	ldr	r3, .L2176+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L928
	ldr	r3, .L2176
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L930
.L928:
	ldr	r3, .L2176+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L930
	ldr	r3, .L2176+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L930
	ldr	r3, .L2176+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L930
	ldr	r3, .L2176+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L930
	ldr	r3, .L2176+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L930
	ldr	r3, .L2176+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L930:
	ldr	r3, .L2176+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2176+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L931
	ldr	r3, .L2176+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L931
	ldr	r3, .L2176+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L931
	ldr	r3, .L2176+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L931
	ldr	r3, .L2176+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L931
	ldr	r3, .L2176+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L931
	ldr	r3, .L2176+60
	ldr	r2, [r3]
	ldr	r3, .L2176+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L931
	ldr	r3, .L2176
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L933
.L931:
	ldr	r3, .L2176+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L933
	ldr	r3, .L2176+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L933
	ldr	r3, .L2176+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L933
	ldr	r3, .L2176+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L933
	ldr	r3, .L2176+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L933
	ldr	r3, .L2176+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L933:
	ldr	r3, .L2176+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2176+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L934
	ldr	r3, .L2176+72
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L934
	ldr	r3, .L2176+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L934
	ldr	r3, .L2176+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L934
	ldr	r3, .L2176+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L934
	ldr	r3, .L2176+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L934
	ldr	r3, .L2176+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2176+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L934
	ldr	r3, .L2176+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L2176
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L936
.L934:
	ldr	r3, .L2176+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L936
	ldr	r3, .L2176+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L936
	ldr	r3, .L2176+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L936
	ldr	r3, .L2176+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L936
	ldr	r3, .L2176+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L936
	ldr	r3, .L2176+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L936:
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L937
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L937
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L937
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L938
.L937:
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L939
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L939
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L939
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L938
.L939:
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L940
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L940
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L940
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L938
.L940:
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L941
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L941
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L941
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L938
.L941:
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L942
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L942
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L942
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L938
.L942:
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L943
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L943
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L943
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L938
.L943:
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L944
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L944
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L944
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L938
.L944:
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L945
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L945
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L945
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L938
.L945:
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L938:
	ldr	r3, .L2176+104
	ldr	r3, [r3]	@ float
	ldr	r2, .L2176+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L946
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L947
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L947
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L947
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L947:
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L948
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L948
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L948
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L948:
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L949
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L949
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L949
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L949:
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L946
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L946
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L946
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L946:
	ldr	r3, .L2176+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L950
	ldr	r3, .L2176+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L950
	ldr	r3, .L2176+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L950
	ldr	r3, .L2176+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L950
	ldr	r3, .L2176+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L2176+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L2176+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L950
	ldr	r3, .L2176+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2176+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L952
.L950:
	ldr	r3, .L2176+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2176+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L952:
	ldr	r3, .L2176+60
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L954
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L954
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L954
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L954
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L954
	ldr	r3, .L2176+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2176+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L954
	ldr	r3, .L2176+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L954
	ldr	r3, .L2176+60
	ldr	r2, [r3]
	ldr	r3, .L2176+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L954
	ldr	r3, .L2176+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2176+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L956
.L954:
	ldr	r3, .L2176+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L956
	ldr	r3, .L2176+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L956
	ldr	r3, .L2176+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L956
	ldr	r3, .L2176+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L956
	ldr	r3, .L2176+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L956
	ldr	r3, .L2176+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L956:
	ldr	r3, .L2176+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2176+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L957
	ldr	r3, .L2176+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2176+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L957
	ldr	r3, .L2176+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	b	.L2177
.L2178:
	.align	2
.L2176:
	.word	_x_p12_c
	.word	delta
	.word	p12_evt
	.word	p12_l3
	.word	p12_l2
	.word	p12_l0
	.word	p12_l1
	.word	_x_p12_l3
	.word	_x_p12_l2
	.word	_x_p12_l0
	.word	_x_p12_l1
	.word	proposed12
	.word	_x_proposed12
	.word	p12_c
	.word	max_prop
	.word	v1
	.word	proposed11
	.word	_x_proposed11
	.word	_x_v1
	.word	_x_p11_l3
	.word	_x_p11_l2
	.word	_x_p11_l0
	.word	_x_p11_l1
	.word	v2
	.word	_x_v2
	.word	p11_c
	.word	_x_p11_c
	.word	p11_l3
	.word	p11_l2
	.word	p11_l0
	.word	p11_l1
	.word	delta
	.word	p11_evt
	.word	_x_p10_l2
	.word	_x_p10_l0
	.word	_x_p10_l1
	.word	_x_p10_l3
.L2177:
	beq	.L957
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L957
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L957
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L957
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L957
	ldr	r3, .L2176+72
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L960
.L957:
	ldr	r3, .L2176+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L960
	ldr	r3, .L2176+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L960
	ldr	r3, .L2176+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L960
	ldr	r3, .L2176+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L960
	ldr	r3, .L2176+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L960
	ldr	r3, .L2176+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L960:
	ldr	r3, .L2176+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2176+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L961
	ldr	r3, .L2176+60
	ldr	r2, [r3]
	ldr	r3, .L2176+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L961
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L962
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L962
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L962
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L963
.L962:
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L961
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L961
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L961
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L961
.L963:
	ldr	r3, .L2176+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L2176+104
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L964
.L961:
	ldr	r3, .L2176+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L964
	ldr	r3, .L2176+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L964
	ldr	r3, .L2176+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L964
	ldr	r3, .L2176+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L964
	ldr	r3, .L2176+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L964
	ldr	r3, .L2176+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L964:
	ldr	r3, .L2176+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2176+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L965
	ldr	r3, .L2176+60
	ldr	r3, [r3]
	cmp	r3, #12
	bne	.L967
.L965:
	ldr	r3, .L2176+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L967
	ldr	r3, .L2176+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L967
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L967
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L967
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L967
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L967
	ldr	r3, .L2176+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L967
	ldr	r3, .L2176+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L967
	ldr	r3, .L2176+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L967
	ldr	r3, .L2176+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L967:
	ldr	r3, .L2176+60
	ldr	r3, [r3]
	cmp	r3, #12
	bne	.L968
	ldr	r3, .L2176+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L2176+56
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L969
	mov	r3, #0
	mov	r4, r3
.L969:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L968
	ldr	r3, .L2176+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2176+68
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L970
	mov	r3, #0
	mov	r4, r3
.L970:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L971
.L968:
	ldr	r3, .L2176+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L971
	ldr	r3, .L2176+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L971
	ldr	r3, .L2176+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L971
	ldr	r3, .L2176+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L971
	ldr	r3, .L2176+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L971
	ldr	r3, .L2176+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L971
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L971
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L971
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L971
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L971:
	ldr	r3, .L2176+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2176+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L972
	ldr	r3, .L2176+60
	ldr	r2, [r3]
	ldr	r3, .L2176+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L972
	ldr	r3, .L2176+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2176+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L972
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L974
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L974
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L974
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L975
.L974:
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L972
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L972
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L972
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L975
.L972:
	ldr	r3, .L2176+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L975
	ldr	r3, .L2176+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L975
	ldr	r3, .L2176+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L975
	ldr	r3, .L2176+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L975
	ldr	r3, .L2176+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L975
	ldr	r3, .L2176+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L975:
	ldr	r3, .L2176+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L976
	ldr	r3, .L2176+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L2176+104
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L977
.L976:
	ldr	r3, .L2176+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L977
	ldr	r3, .L2176+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L977
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L977
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L977
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L977
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L977
	ldr	r3, .L2176+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L977
	ldr	r3, .L2176+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L977
	ldr	r3, .L2176+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L977
	ldr	r3, .L2176+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L977:
	ldr	r3, .L2176+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L978
	ldr	r3, .L2176+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L979
.L978:
	ldr	r3, .L2176+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L979
	ldr	r3, .L2176+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L979
	ldr	r3, .L2176+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L979
	ldr	r3, .L2176+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L979
	ldr	r3, .L2176+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L979
	ldr	r3, .L2176+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L979
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L979
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L979
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L979
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L979:
	ldr	r3, .L2176+60
	ldr	r2, [r3]
	ldr	r3, .L2176+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L980
	ldr	r3, .L2176+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2176+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L980
	ldr	r3, .L2176+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L980
	ldr	r3, .L2176+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L980
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L980
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L980
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L980
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L983
.L980:
	ldr	r3, .L2176+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L983
	ldr	r3, .L2176+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L983
	ldr	r3, .L2176+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L983
	ldr	r3, .L2176+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L983
	ldr	r3, .L2176+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L983
	ldr	r3, .L2176+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L983:
	ldr	r3, .L2176+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2176+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L984
	ldr	r3, .L2176+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2176+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L984
	ldr	r3, .L2176+60
	ldr	r2, [r3]
	ldr	r3, .L2176+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L984
	ldr	r3, .L2176+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L2176+104
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L984
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L987
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L987
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L987
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L988
.L987:
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L984
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L984
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L984
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L988
.L984:
	ldr	r3, .L2176+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L988
	ldr	r3, .L2176+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L988
	ldr	r3, .L2176+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L988
	ldr	r3, .L2176+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L988
	ldr	r3, .L2176+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L988
	ldr	r3, .L2176+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L988:
	ldr	r3, .L2176+60
	ldr	r3, [r3]
	cmp	r3, #12
	bne	.L989
	ldr	r3, .L2176+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L989
	ldr	r3, .L2176+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L989
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L989
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L989
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L989
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L989
	ldr	r3, .L2176+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L989
	ldr	r3, .L2176+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L989
	ldr	r3, .L2176+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L989
	ldr	r3, .L2176+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L989:
	ldr	r3, .L2176+60
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L990
	ldr	r3, .L2176+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L990
	ldr	r3, .L2176+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L990
	ldr	r3, .L2176+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L990
	ldr	r3, .L2176+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L990
	ldr	r3, .L2176+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L990
	ldr	r3, .L2176+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L990
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L990
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L990
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L990
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L990:
	ldr	r3, .L2176+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2176+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L991
	ldr	r3, .L2176+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2176+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L991
	ldr	r3, .L2176+60
	ldr	r2, [r3]
	ldr	r3, .L2176+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L991
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L991
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L991
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L991
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L991
	ldr	r3, .L2176+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L993
.L991:
	ldr	r3, .L2176+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L993
	ldr	r3, .L2176+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L993
	ldr	r3, .L2176+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L993
	ldr	r3, .L2176+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L993
	ldr	r3, .L2176+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L993
	ldr	r3, .L2176+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L993:
	ldr	r3, .L2176+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2176+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L994
	ldr	r3, .L2176+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L994
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L994
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L994
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L994
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L994
	ldr	r3, .L2176+60
	ldr	r2, [r3]
	ldr	r3, .L2176+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L994
	ldr	r3, .L2176+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L996
.L994:
	ldr	r3, .L2176+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L996
	ldr	r3, .L2176+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L996
	ldr	r3, .L2176+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L996
	ldr	r3, .L2176+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L996
	ldr	r3, .L2176+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L996
	ldr	r3, .L2176+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L996:
	ldr	r3, .L2176+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2176+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L997
	ldr	r3, .L2176+72
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L997
	ldr	r3, .L2176+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L997
	ldr	r3, .L2176+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L997
	ldr	r3, .L2176+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L997
	ldr	r3, .L2176+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L997
	ldr	r3, .L2176+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2176+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L997
	ldr	r3, .L2176+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L2176+104
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L999
.L997:
	ldr	r3, .L2176+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L999
	ldr	r3, .L2176+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L999
	ldr	r3, .L2176+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L999
	ldr	r3, .L2176+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L999
	ldr	r3, .L2176+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L999
	ldr	r3, .L2176+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L999:
	ldr	r3, .L2176+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1000
	ldr	r3, .L2176+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1000
	ldr	r3, .L2176+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1000
	ldr	r3, .L2176+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1001
.L1000:
	ldr	r3, .L2176+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L2179
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1002
	ldr	r3, .L2179+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1002
	ldr	r3, .L2179+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1001
.L1002:
	ldr	r3, .L2179+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1003
	ldr	r3, .L2179
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1003
	ldr	r3, .L2179+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1003
	ldr	r3, .L2179+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1001
.L1003:
	ldr	r3, .L2179+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1004
	ldr	r3, .L2179
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1004
	ldr	r3, .L2179+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1004
	ldr	r3, .L2179+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1001
.L1004:
	ldr	r3, .L2179+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1005
	ldr	r3, .L2179
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1005
	ldr	r3, .L2179+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1005
	ldr	r3, .L2179+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1001
.L1005:
	ldr	r3, .L2179+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1006
	ldr	r3, .L2179
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1006
	ldr	r3, .L2179+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1006
	ldr	r3, .L2179+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1001
.L1006:
	ldr	r3, .L2179+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1007
	ldr	r3, .L2179
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1007
	ldr	r3, .L2179+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1007
	ldr	r3, .L2179+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1001
.L1007:
	ldr	r3, .L2179+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1008
	ldr	r3, .L2179
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1008
	ldr	r3, .L2179+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1008
	ldr	r3, .L2179+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1001
.L1008:
	ldr	r3, .L2179+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2179
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2179+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2179+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1001:
	ldr	r3, .L2179+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L2179+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1009
	ldr	r3, .L2179+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1010
	ldr	r3, .L2179
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1010
	ldr	r3, .L2179+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1010
	ldr	r3, .L2179+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1010:
	ldr	r3, .L2179+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1011
	ldr	r3, .L2179
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1011
	ldr	r3, .L2179+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1011
	ldr	r3, .L2179+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1011:
	ldr	r3, .L2179+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1012
	ldr	r3, .L2179
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1012
	ldr	r3, .L2179+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1012
	ldr	r3, .L2179+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1012:
	ldr	r3, .L2179+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1009
	ldr	r3, .L2179
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1009
	ldr	r3, .L2179+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1009
	ldr	r3, .L2179+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1009:
	ldr	r3, .L2179+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2179+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1013
	ldr	r3, .L2179+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2179+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1013
	ldr	r3, .L2179+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2179
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1013
	ldr	r3, .L2179+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2179+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1013
	ldr	r3, .L2179+136
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L2179+44
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L2179+48
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1013
	ldr	r3, .L2179+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2179+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1015
.L1013:
	ldr	r3, .L2179+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2179+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1015:
	ldr	r3, .L2179+88
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1017
	ldr	r3, .L2179+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1017
	ldr	r3, .L2179
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1017
	ldr	r3, .L2179+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1017
	ldr	r3, .L2179+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1017
	ldr	r3, .L2179+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2179+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1017
	ldr	r3, .L2179+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1017
	ldr	r3, .L2179+88
	ldr	r2, [r3]
	ldr	r3, .L2179+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1017
	ldr	r3, .L2179+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2179+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1019
.L1017:
	ldr	r3, .L2179+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1019
	ldr	r3, .L2179+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1019
	ldr	r3, .L2179+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1019
	ldr	r3, .L2179+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1019
	ldr	r3, .L2179+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1019
	ldr	r3, .L2179+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1019:
	ldr	r3, .L2179+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2179+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1020
	ldr	r3, .L2179+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2179+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1020
	ldr	r3, .L2179+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1020
	ldr	r3, .L2179+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1020
	ldr	r3, .L2179
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1020
	ldr	r3, .L2179+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1020
	ldr	r3, .L2179+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1020
	ldr	r3, .L2179+92
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L1023
.L1020:
	ldr	r3, .L2179+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1023
	ldr	r3, .L2179+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1023
	ldr	r3, .L2179+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1023
	ldr	r3, .L2179+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1023
	ldr	r3, .L2179+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1023
	ldr	r3, .L2179+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1023:
	ldr	r3, .L2179+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2179+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1024
	ldr	r3, .L2179+88
	ldr	r2, [r3]
	ldr	r3, .L2179+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1024
	ldr	r3, .L2179+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1025
	ldr	r3, .L2179
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1025
	ldr	r3, .L2179+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1025
	ldr	r3, .L2179+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1026
.L1025:
	ldr	r3, .L2179+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1024
	ldr	r3, .L2179
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1024
	ldr	r3, .L2179+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1024
	ldr	r3, .L2179+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1024
.L1026:
	ldr	r3, .L2179+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2179+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1027
.L1024:
	ldr	r3, .L2179+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1027
	ldr	r3, .L2179+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1027
	ldr	r3, .L2179+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1027
	ldr	r3, .L2179+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1027
	ldr	r3, .L2179+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1027
	ldr	r3, .L2179+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1027:
	ldr	r3, .L2179+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2179+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1028
	ldr	r3, .L2179+88
	ldr	r3, [r3]
	cmp	r3, #11
	bne	.L1030
.L1028:
	ldr	r3, .L2179+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1030
	ldr	r3, .L2179+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1030
	ldr	r3, .L2179+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1030
	ldr	r3, .L2179
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1030
	ldr	r3, .L2179+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1030
	ldr	r3, .L2179+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1030
	ldr	r3, .L2179+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1030
	ldr	r3, .L2179+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1030
	ldr	r3, .L2179+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1030
	ldr	r3, .L2179+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1030:
	ldr	r3, .L2179+88
	ldr	r3, [r3]
	cmp	r3, #11
	bne	.L1031
	ldr	r3, .L2179+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2179+16
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1032
	mov	r3, #0
	mov	r4, r3
.L1032:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1031
	ldr	r3, .L2179+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2179+24
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1033
	mov	r3, #0
	mov	r4, r3
.L1033:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L1034
.L1031:
	ldr	r3, .L2179+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1034
	ldr	r3, .L2179+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1034
	ldr	r3, .L2179+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1034
	ldr	r3, .L2179+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1034
	ldr	r3, .L2179+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1034
	ldr	r3, .L2179+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1034
	ldr	r3, .L2179+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1034
	ldr	r3, .L2179
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1034
	ldr	r3, .L2179+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1034
	ldr	r3, .L2179+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1034:
	ldr	r3, .L2179+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2179+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1035
	ldr	r3, .L2179+88
	ldr	r2, [r3]
	ldr	r3, .L2179+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1035
	ldr	r3, .L2179+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2179+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1035
	ldr	r3, .L2179+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1037
	ldr	r3, .L2179
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1037
	ldr	r3, .L2179+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1037
	ldr	r3, .L2179+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1038
.L1037:
	ldr	r3, .L2179+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1035
	ldr	r3, .L2179
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1035
	ldr	r3, .L2179+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1035
	ldr	r3, .L2179+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1038
.L1035:
	ldr	r3, .L2179+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1038
	ldr	r3, .L2179+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1038
	ldr	r3, .L2179+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1038
	ldr	r3, .L2179+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1038
	ldr	r3, .L2179+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1038
	ldr	r3, .L2179+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1038:
	ldr	r3, .L2179+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1039
	ldr	r3, .L2179+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2179+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1040
.L1039:
	ldr	r3, .L2179+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1040
	ldr	r3, .L2179+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1040
	ldr	r3, .L2179+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1040
	ldr	r3, .L2179
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1040
	ldr	r3, .L2179+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1040
	ldr	r3, .L2179+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1040
	ldr	r3, .L2179+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1040
	ldr	r3, .L2179+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1040
	ldr	r3, .L2179+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1040
	ldr	r3, .L2179+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1040:
	ldr	r3, .L2179+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1041
	ldr	r3, .L2179+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1042
.L1041:
	ldr	r3, .L2179+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1042
	ldr	r3, .L2179+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1042
	ldr	r3, .L2179+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1042
	ldr	r3, .L2179+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1042
	ldr	r3, .L2179+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1042
	ldr	r3, .L2179+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1042
	ldr	r3, .L2179+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1042
	ldr	r3, .L2179
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1042
	ldr	r3, .L2179+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1042
	ldr	r3, .L2179+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1042:
	ldr	r3, .L2179+88
	ldr	r2, [r3]
	ldr	r3, .L2179+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1043
	ldr	r3, .L2179+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2179+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1043
	ldr	r3, .L2179+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1043
	ldr	r3, .L2179+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1043
	ldr	r3, .L2179+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1043
	ldr	r3, .L2179
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1043
	ldr	r3, .L2179+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1043
	ldr	r3, .L2179+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1046
.L1043:
	ldr	r3, .L2179+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1046
	ldr	r3, .L2179+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1046
	ldr	r3, .L2179+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1046
	ldr	r3, .L2179+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1046
	ldr	r3, .L2179+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1046
	ldr	r3, .L2179+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1046:
	ldr	r3, .L2179+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2179+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1047
	ldr	r3, .L2179+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2179+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	b	.L2180
.L2181:
	.align	2
.L2179:
	.word	_x_p10_l2
	.word	_x_p10_l0
	.word	_x_p10_l1
	.word	_x_p10_l3
	.word	max_prop
	.word	proposed10
	.word	_x_proposed10
	.word	_x_p10_l3
	.word	_x_p10_l2
	.word	_x_p10_l0
	.word	_x_p10_l1
	.word	p10_c
	.word	_x_p10_c
	.word	p10_l3
	.word	p10_l2
	.word	p10_l0
	.word	p10_l1
	.word	p10_evt
	.word	proposed9
	.word	_x_proposed9
	.word	v2
	.word	_x_v2
	.word	v1
	.word	_x_v1
	.word	_x_p9_l3
	.word	_x_p9_l2
	.word	_x_p9_l0
	.word	_x_p9_l1
	.word	p9_c
	.word	_x_p9_c
	.word	p9_l3
	.word	p9_l2
	.word	p9_l1
	.word	p9_l0
	.word	delta
	.word	p9_evt
.L2180:
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1047
	ldr	r3, .L2179+88
	ldr	r2, [r3]
	ldr	r3, .L2179+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1047
	ldr	r3, .L2179+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2179+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1047
	ldr	r3, .L2179+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1050
	ldr	r3, .L2179+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1050
	ldr	r3, .L2179+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1050
	ldr	r3, .L2179+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1051
.L1050:
	ldr	r3, .L2179+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1047
	ldr	r3, .L2179+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1047
	ldr	r3, .L2179+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1047
	ldr	r3, .L2179+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1051
.L1047:
	ldr	r3, .L2179+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1051
	ldr	r3, .L2179+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1051
	ldr	r3, .L2179+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1051
	ldr	r3, .L2179+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1051
	ldr	r3, .L2179+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1051
	ldr	r3, .L2179+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1051:
	ldr	r3, .L2179+88
	ldr	r3, [r3]
	cmp	r3, #11
	bne	.L1052
	ldr	r3, .L2179+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1052
	ldr	r3, .L2179+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1052
	ldr	r3, .L2179+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1052
	ldr	r3, .L2179+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1052
	ldr	r3, .L2179+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1052
	ldr	r3, .L2179+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1052
	ldr	r3, .L2179+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1052
	ldr	r3, .L2179+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1052
	ldr	r3, .L2179+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1052
	ldr	r3, .L2179+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1052:
	ldr	r3, .L2179+88
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L1053
	ldr	r3, .L2179+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1053
	ldr	r3, .L2179+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1053
	ldr	r3, .L2179+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1053
	ldr	r3, .L2179+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1053
	ldr	r3, .L2179+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1053
	ldr	r3, .L2179+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1053
	ldr	r3, .L2179+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1053
	ldr	r3, .L2179+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1053
	ldr	r3, .L2179+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1053
	ldr	r3, .L2179+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1053:
	ldr	r3, .L2179+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2179+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1054
	ldr	r3, .L2179+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2179+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1054
	ldr	r3, .L2179+88
	ldr	r2, [r3]
	ldr	r3, .L2179+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1054
	ldr	r3, .L2179+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1054
	ldr	r3, .L2179+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1054
	ldr	r3, .L2179+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1054
	ldr	r3, .L2179+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1054
	ldr	r3, .L2179+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1056
.L1054:
	ldr	r3, .L2179+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1056
	ldr	r3, .L2179+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1056
	ldr	r3, .L2179+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1056
	ldr	r3, .L2179+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1056
	ldr	r3, .L2179+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1056
	ldr	r3, .L2179+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1056:
	ldr	r3, .L2179+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2179+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1057
	ldr	r3, .L2179+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1057
	ldr	r3, .L2179+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1057
	ldr	r3, .L2179+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1057
	ldr	r3, .L2179+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1057
	ldr	r3, .L2179+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1057
	ldr	r3, .L2179+88
	ldr	r2, [r3]
	ldr	r3, .L2179+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1057
	ldr	r3, .L2179+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1059
.L1057:
	ldr	r3, .L2179+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1059
	ldr	r3, .L2179+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1059
	ldr	r3, .L2179+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1059
	ldr	r3, .L2179+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1059
	ldr	r3, .L2179+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1059
	ldr	r3, .L2179+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1059:
	ldr	r3, .L2179+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2179+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1060
	ldr	r3, .L2179+92
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1060
	ldr	r3, .L2179+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1060
	ldr	r3, .L2179+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1060
	ldr	r3, .L2179+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1060
	ldr	r3, .L2179+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1060
	ldr	r3, .L2179+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2179+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1060
	ldr	r3, .L2179+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2179+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1062
.L1060:
	ldr	r3, .L2179+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1062
	ldr	r3, .L2179+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1062
	ldr	r3, .L2179+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1062
	ldr	r3, .L2179+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1062
	ldr	r3, .L2179+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1062
	ldr	r3, .L2179+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1062:
	ldr	r3, .L2179+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1063
	ldr	r3, .L2179+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1063
	ldr	r3, .L2179+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1063
	ldr	r3, .L2179+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1064
.L1063:
	ldr	r3, .L2179+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1065
	ldr	r3, .L2179+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1065
	ldr	r3, .L2179+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1065
	ldr	r3, .L2179+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1064
.L1065:
	ldr	r3, .L2179+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1066
	ldr	r3, .L2179+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1066
	ldr	r3, .L2179+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1066
	ldr	r3, .L2179+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1064
.L1066:
	ldr	r3, .L2179+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1067
	ldr	r3, .L2179+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1067
	ldr	r3, .L2179+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1067
	ldr	r3, .L2179+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1064
.L1067:
	ldr	r3, .L2179+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1068
	ldr	r3, .L2179+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1068
	ldr	r3, .L2179+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1068
	ldr	r3, .L2179+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1064
.L1068:
	ldr	r3, .L2179+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1069
	ldr	r3, .L2179+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1069
	ldr	r3, .L2179+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1069
	ldr	r3, .L2179+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1064
.L1069:
	ldr	r3, .L2179+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1070
	ldr	r3, .L2179+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1070
	ldr	r3, .L2179+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1070
	ldr	r3, .L2179+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1064
.L1070:
	ldr	r3, .L2179+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1071
	ldr	r3, .L2179+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1071
	ldr	r3, .L2179+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1071
	ldr	r3, .L2179+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1064
.L1071:
	ldr	r3, .L2179+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2179+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2179+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2179+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1064:
	ldr	r3, .L2179+116
	ldr	r3, [r3]	@ float
	ldr	r2, .L2179+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1072
	ldr	r3, .L2179+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1073
	ldr	r3, .L2179+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1073
	ldr	r3, .L2179+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1073
	ldr	r3, .L2179+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1073:
	ldr	r3, .L2179+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1074
	ldr	r3, .L2179+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1074
	ldr	r3, .L2179+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1074
	ldr	r3, .L2179+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1074:
	ldr	r3, .L2179+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1075
	ldr	r3, .L2179+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1075
	ldr	r3, .L2179+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1075
	ldr	r3, .L2179+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1075:
	ldr	r3, .L2179+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1072
	ldr	r3, .L2179+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1072
	ldr	r3, .L2179+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1072
	ldr	r3, .L2179+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1072:
	ldr	r3, .L2179+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2179+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1076
	ldr	r3, .L2179+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2179+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1076
	ldr	r3, .L2179+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2179+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1076
	ldr	r3, .L2179+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2179+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1076
	ldr	r3, .L2179+136
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L2179+112
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L2179+116
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1076
	ldr	r3, .L2179+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L2179+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1078
.L1076:
	ldr	r3, .L2179+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2179+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1078:
	ldr	r3, .L2179+88
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1080
	ldr	r3, .L2179+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1080
	ldr	r3, .L2179+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1080
	ldr	r3, .L2179+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1080
	ldr	r3, .L2179+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1080
	ldr	r3, .L2179+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2179+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1080
	ldr	r3, .L2179+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1080
	ldr	r3, .L2179+88
	ldr	r2, [r3]
	ldr	r3, .L2179+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1080
	ldr	r3, .L2179+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L2179+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1082
.L1080:
	ldr	r3, .L2179+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1082
	ldr	r3, .L2179+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1082
	ldr	r3, .L2179+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1082
	ldr	r3, .L2179+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1082
	ldr	r3, .L2179+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1082
	ldr	r3, .L2179+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1082:
	ldr	r3, .L2179+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L2179+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1083
	ldr	r3, .L2179+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2179+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1083
	ldr	r3, .L2179+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1083
	ldr	r3, .L2179+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1083
	ldr	r3, .L2179+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1083
	ldr	r3, .L2179+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1083
	ldr	r3, .L2179+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1083
	ldr	r3, .L2179+92
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L1086
.L1083:
	ldr	r3, .L2179+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1086
	ldr	r3, .L2179+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1086
	ldr	r3, .L2179+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1086
	ldr	r3, .L2179+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1086
	ldr	r3, .L2179+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1086
	ldr	r3, .L2179+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1086:
	ldr	r3, .L2179+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2179+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1087
	ldr	r3, .L2179+88
	ldr	r2, [r3]
	ldr	r3, .L2179+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1087
	ldr	r3, .L2179+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1088
	ldr	r3, .L2179+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1088
	ldr	r3, .L2179+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1088
	ldr	r3, .L2179+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1089
.L1088:
	ldr	r3, .L2179+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1087
	ldr	r3, .L2179+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1087
	ldr	r3, .L2179+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1087
	ldr	r3, .L2179+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1087
.L1089:
	ldr	r3, .L2179+112
	ldr	r3, [r3]	@ float
	ldr	r2, .L2179+116
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1090
.L1087:
	ldr	r3, .L2179+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1090
	ldr	r3, .L2179+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1090
	ldr	r3, .L2179+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1090
	ldr	r3, .L2179+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1090
	ldr	r3, .L2179+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1090
	ldr	r3, .L2179+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1090:
	ldr	r3, .L2182
	ldr	r3, [r3]	@ float
	ldr	r2, .L2182+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1091
	ldr	r3, .L2182+8
	ldr	r3, [r3]
	cmp	r3, #10
	bne	.L1093
.L1091:
	ldr	r3, .L2182+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1093
	ldr	r3, .L2182+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1093
	ldr	r3, .L2182+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1093
	ldr	r3, .L2182+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1093
	ldr	r3, .L2182+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1093
	ldr	r3, .L2182+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1093
	ldr	r3, .L2182+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1093
	ldr	r3, .L2182+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1093
	ldr	r3, .L2182+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1093
	ldr	r3, .L2182+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1093:
	ldr	r3, .L2182+8
	ldr	r3, [r3]
	cmp	r3, #10
	bne	.L1094
	ldr	r3, .L2182+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L2182+60
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1095
	mov	r3, #0
	mov	r4, r3
.L1095:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1094
	ldr	r3, .L2182
	ldr	r3, [r3]	@ float
	ldr	r2, .L2182+4
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1096
	mov	r3, #0
	mov	r4, r3
.L1096:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L1097
.L1094:
	ldr	r3, .L2182+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1097
	ldr	r3, .L2182+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1097
	ldr	r3, .L2182+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1097
	ldr	r3, .L2182+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1097
	ldr	r3, .L2182+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1097
	ldr	r3, .L2182+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1097
	ldr	r3, .L2182+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1097
	ldr	r3, .L2182+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1097
	ldr	r3, .L2182+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1097
	ldr	r3, .L2182+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1097:
	ldr	r3, .L2182+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2182+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1098
	ldr	r3, .L2182+8
	ldr	r2, [r3]
	ldr	r3, .L2182+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1098
	ldr	r3, .L2182
	ldr	r3, [r3]	@ float
	ldr	r2, .L2182+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1098
	ldr	r3, .L2182+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1100
	ldr	r3, .L2182+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1100
	ldr	r3, .L2182+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1100
	ldr	r3, .L2182+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1101
.L1100:
	ldr	r3, .L2182+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1098
	ldr	r3, .L2182+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1098
	ldr	r3, .L2182+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1098
	ldr	r3, .L2182+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1101
.L1098:
	ldr	r3, .L2182+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1101
	ldr	r3, .L2182+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1101
	ldr	r3, .L2182+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1101
	ldr	r3, .L2182+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1101
	ldr	r3, .L2182+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1101
	ldr	r3, .L2182+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1101:
	ldr	r3, .L2182+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1102
	ldr	r3, .L2182+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L2182+56
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1103
.L1102:
	ldr	r3, .L2182+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1103
	ldr	r3, .L2182+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1103
	ldr	r3, .L2182+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1103
	ldr	r3, .L2182+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1103
	ldr	r3, .L2182+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1103
	ldr	r3, .L2182+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1103
	ldr	r3, .L2182+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1103
	ldr	r3, .L2182+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1103
	ldr	r3, .L2182+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1103
	ldr	r3, .L2182+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1103:
	ldr	r3, .L2182+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1104
	ldr	r3, .L2182+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1105
.L1104:
	ldr	r3, .L2182+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1105
	ldr	r3, .L2182+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1105
	ldr	r3, .L2182+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1105
	ldr	r3, .L2182+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1105
	ldr	r3, .L2182+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1105
	ldr	r3, .L2182+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1105
	ldr	r3, .L2182+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1105
	ldr	r3, .L2182+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1105
	ldr	r3, .L2182+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1105
	ldr	r3, .L2182+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1105:
	ldr	r3, .L2182+8
	ldr	r2, [r3]
	ldr	r3, .L2182+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1106
	ldr	r3, .L2182
	ldr	r3, [r3]	@ float
	ldr	r2, .L2182+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1106
	ldr	r3, .L2182+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1106
	ldr	r3, .L2182+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1106
	ldr	r3, .L2182+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1106
	ldr	r3, .L2182+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1106
	ldr	r3, .L2182+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1106
	ldr	r3, .L2182+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1109
.L1106:
	ldr	r3, .L2182+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1109
	ldr	r3, .L2182+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1109
	ldr	r3, .L2182+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1109
	ldr	r3, .L2182+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1109
	ldr	r3, .L2182+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1109
	ldr	r3, .L2182+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1109:
	ldr	r3, .L2182
	ldr	r3, [r3]	@ float
	ldr	r2, .L2182+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1110
	ldr	r3, .L2182+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2182+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1110
	ldr	r3, .L2182+8
	ldr	r2, [r3]
	ldr	r3, .L2182+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1110
	ldr	r3, .L2182+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L2182+56
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1110
	ldr	r3, .L2182+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1113
	ldr	r3, .L2182+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1113
	ldr	r3, .L2182+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1113
	ldr	r3, .L2182+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1114
.L1113:
	ldr	r3, .L2182+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1110
	ldr	r3, .L2182+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1110
	ldr	r3, .L2182+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1110
	ldr	r3, .L2182+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1114
.L1110:
	ldr	r3, .L2182+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1114
	ldr	r3, .L2182+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1114
	ldr	r3, .L2182+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1114
	ldr	r3, .L2182+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1114
	ldr	r3, .L2182+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1114
	ldr	r3, .L2182+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1114:
	ldr	r3, .L2182+8
	ldr	r3, [r3]
	cmp	r3, #10
	bne	.L1115
	ldr	r3, .L2182+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1115
	ldr	r3, .L2182+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1115
	ldr	r3, .L2182+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1115
	ldr	r3, .L2182+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1115
	ldr	r3, .L2182+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1115
	ldr	r3, .L2182+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1115
	ldr	r3, .L2182+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1115
	ldr	r3, .L2182+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1115
	ldr	r3, .L2182+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1115
	ldr	r3, .L2182+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1115:
	ldr	r3, .L2182+8
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L1116
	ldr	r3, .L2182+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1116
	ldr	r3, .L2182+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1116
	ldr	r3, .L2182+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1116
	ldr	r3, .L2182+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1116
	ldr	r3, .L2182+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1116
	ldr	r3, .L2182+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1116
	ldr	r3, .L2182+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1116
	ldr	r3, .L2182+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1116
	ldr	r3, .L2182+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1116
	ldr	r3, .L2182+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1116:
	ldr	r3, .L2182
	ldr	r3, [r3]	@ float
	ldr	r2, .L2182+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1117
	ldr	r3, .L2182+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2182+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1117
	ldr	r3, .L2182+8
	ldr	r2, [r3]
	ldr	r3, .L2182+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1117
	ldr	r3, .L2182+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1117
	ldr	r3, .L2182+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1117
	ldr	r3, .L2182+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1117
	ldr	r3, .L2182+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1117
	ldr	r3, .L2182+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1119
.L1117:
	ldr	r3, .L2182+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1119
	ldr	r3, .L2182+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1119
	ldr	r3, .L2182+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1119
	ldr	r3, .L2182+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1119
	ldr	r3, .L2182+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1119
	ldr	r3, .L2182+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1119:
	ldr	r3, .L2182
	ldr	r3, [r3]	@ float
	ldr	r2, .L2182+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1120
	ldr	r3, .L2182+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1120
	ldr	r3, .L2182+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1120
	ldr	r3, .L2182+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1120
	ldr	r3, .L2182+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1120
	ldr	r3, .L2182+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1120
	ldr	r3, .L2182+8
	ldr	r2, [r3]
	ldr	r3, .L2182+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1120
	ldr	r3, .L2182+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1122
.L1120:
	ldr	r3, .L2182+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1122
	ldr	r3, .L2182+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1122
	ldr	r3, .L2182+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1122
	ldr	r3, .L2182+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1122
	ldr	r3, .L2182+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1122
	ldr	r3, .L2182+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1122:
	ldr	r3, .L2182
	ldr	r3, [r3]	@ float
	ldr	r2, .L2182+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1123
	ldr	r3, .L2182+80
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1123
	ldr	r3, .L2182+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1123
	ldr	r3, .L2182+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1123
	ldr	r3, .L2182+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1123
	ldr	r3, .L2182+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1123
	ldr	r3, .L2182+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2182+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1123
	ldr	r3, .L2182+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L2182+56
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1125
.L1123:
	ldr	r3, .L2182+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1125
	ldr	r3, .L2182+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1125
	ldr	r3, .L2182+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1125
	ldr	r3, .L2182+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1125
	ldr	r3, .L2182+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1125
	ldr	r3, .L2182+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1125:
	ldr	r3, .L2182+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1126
	ldr	r3, .L2182+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1126
	ldr	r3, .L2182+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1126
	ldr	r3, .L2182+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1127
.L1126:
	ldr	r3, .L2182+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1128
	ldr	r3, .L2182+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1128
	ldr	r3, .L2182+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1128
	ldr	r3, .L2182+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1127
.L1128:
	ldr	r3, .L2182+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1129
	ldr	r3, .L2182+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1129
	ldr	r3, .L2182+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1129
	ldr	r3, .L2182+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1127
.L1129:
	ldr	r3, .L2182+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1130
	ldr	r3, .L2182+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1130
	ldr	r3, .L2182+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1130
	ldr	r3, .L2182+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1127
.L1130:
	ldr	r3, .L2182+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1131
	ldr	r3, .L2182+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1131
	ldr	r3, .L2182+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1131
	ldr	r3, .L2182+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1127
.L1131:
	ldr	r3, .L2182+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1132
	ldr	r3, .L2182+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1132
	ldr	r3, .L2182+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1132
	ldr	r3, .L2182+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1127
.L1132:
	ldr	r3, .L2182+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1133
	ldr	r3, .L2182+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1133
	ldr	r3, .L2182+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1133
	ldr	r3, .L2182+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1127
.L1133:
	ldr	r3, .L2182+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1134
	ldr	r3, .L2182+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1134
	ldr	r3, .L2182+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1134
	ldr	r3, .L2182+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1127
.L1134:
	ldr	r3, .L2182+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2182+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2182+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2182+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1127:
	ldr	r3, .L2182+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L2182+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1135
	ldr	r3, .L2182+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1136
	ldr	r3, .L2182+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1136
	b	.L2183
.L2184:
	.align	2
.L2182:
	.word	proposed9
	.word	_x_proposed9
	.word	v1
	.word	delta
	.word	p9_evt
	.word	_x_p9_l3
	.word	_x_p9_l2
	.word	_x_p9_l0
	.word	_x_p9_l1
	.word	p9_l3
	.word	p9_l2
	.word	p9_l1
	.word	p9_l0
	.word	p9_c
	.word	_x_p9_c
	.word	max_prop
	.word	proposed8
	.word	_x_proposed8
	.word	v2
	.word	_x_v2
	.word	_x_v1
	.word	p8_c
	.word	_x_p8_c
	.word	p8_evt
	.word	_x_p8_l3
	.word	_x_p8_l2
	.word	_x_p8_l0
	.word	_x_p8_l1
	.word	p8_l3
	.word	p8_l2
	.word	p8_l0
	.word	p8_l1
	.word	v1
	.word	delta
.L2183:
	ldr	r3, .L2182+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1136
	ldr	r3, .L2182+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1136:
	ldr	r3, .L2182+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1137
	ldr	r3, .L2182+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
	ldr	r3, .L2182+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1137
	ldr	r3, .L2182+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1137:
	ldr	r3, .L2182+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1138
	ldr	r3, .L2182+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1138
	ldr	r3, .L2182+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1138
	ldr	r3, .L2182+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1138:
	ldr	r3, .L2182+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1135
	ldr	r3, .L2182+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1135
	ldr	r3, .L2182+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1135
	ldr	r3, .L2182+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1135:
	ldr	r3, .L2182+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2182+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1139
	ldr	r3, .L2182+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2182+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1139
	ldr	r3, .L2182+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2182+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1139
	ldr	r3, .L2182+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2182+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1139
	ldr	r3, .L2182+132
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L2182+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L2182+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1139
	ldr	r3, .L2182+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2182+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1141
.L1139:
	ldr	r3, .L2182+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2182+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1141:
	ldr	r3, .L2182+128
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1143
	ldr	r3, .L2182+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1143
	ldr	r3, .L2182+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1143
	ldr	r3, .L2182+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1143
	ldr	r3, .L2182+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1143
	ldr	r3, .L2182+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2182+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1143
	ldr	r3, .L2182+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1143
	ldr	r3, .L2182+128
	ldr	r2, [r3]
	ldr	r3, .L2182+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1143
	ldr	r3, .L2182+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2182+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1145
.L1143:
	ldr	r3, .L2182+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1145
	ldr	r3, .L2182+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1145
	ldr	r3, .L2182+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1145
	ldr	r3, .L2182+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1145
	ldr	r3, .L2182+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1145
	ldr	r3, .L2182+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1145:
	ldr	r3, .L2182+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2182+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1146
	ldr	r3, .L2182+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2182+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1146
	ldr	r3, .L2182+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1146
	ldr	r3, .L2182+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1146
	ldr	r3, .L2182+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1146
	ldr	r3, .L2182+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1146
	ldr	r3, .L2182+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1146
	ldr	r3, .L2182+80
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L1149
.L1146:
	ldr	r3, .L2182+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1149
	ldr	r3, .L2182+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1149
	ldr	r3, .L2182+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1149
	ldr	r3, .L2182+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1149
	ldr	r3, .L2182+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1149
	ldr	r3, .L2182+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1149:
	ldr	r3, .L2182+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2182+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1150
	ldr	r3, .L2182+128
	ldr	r2, [r3]
	ldr	r3, .L2182+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1150
	ldr	r3, .L2182+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1151
	ldr	r3, .L2182+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1151
	ldr	r3, .L2182+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1151
	ldr	r3, .L2182+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1152
.L1151:
	ldr	r3, .L2182+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1150
	ldr	r3, .L2182+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1150
	ldr	r3, .L2182+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1150
	ldr	r3, .L2182+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1150
.L1152:
	ldr	r3, .L2182+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L2182+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1153
.L1150:
	ldr	r3, .L2182+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1153
	ldr	r3, .L2182+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1153
	ldr	r3, .L2182+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1153
	ldr	r3, .L2182+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1153
	ldr	r3, .L2182+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1153
	ldr	r3, .L2182+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1153:
	ldr	r3, .L2182+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2182+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1154
	ldr	r3, .L2182+128
	ldr	r3, [r3]
	cmp	r3, #9
	bne	.L1156
.L1154:
	ldr	r3, .L2182+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1156
	ldr	r3, .L2182+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1156
	ldr	r3, .L2182+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1156
	ldr	r3, .L2182+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1156
	ldr	r3, .L2182+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1156
	ldr	r3, .L2182+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1156
	ldr	r3, .L2182+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1156
	ldr	r3, .L2182+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1156
	ldr	r3, .L2182+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1156
	ldr	r3, .L2182+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1156:
	ldr	r3, .L2182+128
	ldr	r3, [r3]
	cmp	r3, #9
	bne	.L1157
	ldr	r3, .L2182+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L2182+60
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1158
	mov	r3, #0
	mov	r4, r3
.L1158:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1157
	ldr	r3, .L2182+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2182+68
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1159
	mov	r3, #0
	mov	r4, r3
.L1159:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L1160
.L1157:
	ldr	r3, .L2182+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1160
	ldr	r3, .L2182+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1160
	ldr	r3, .L2182+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1160
	ldr	r3, .L2182+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1160
	ldr	r3, .L2182+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1160
	ldr	r3, .L2182+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1160
	ldr	r3, .L2182+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1160
	ldr	r3, .L2182+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1160
	ldr	r3, .L2182+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1160
	ldr	r3, .L2182+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1160:
	ldr	r3, .L2182+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2182+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1161
	ldr	r3, .L2182+128
	ldr	r2, [r3]
	ldr	r3, .L2182+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1161
	ldr	r3, .L2182+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2182+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1161
	ldr	r3, .L2182+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1163
	ldr	r3, .L2182+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1163
	ldr	r3, .L2182+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1163
	ldr	r3, .L2182+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1164
.L1163:
	ldr	r3, .L2182+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1161
	ldr	r3, .L2182+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1161
	ldr	r3, .L2182+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1161
	ldr	r3, .L2182+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1164
.L1161:
	ldr	r3, .L2182+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1164
	ldr	r3, .L2182+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1164
	ldr	r3, .L2182+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1164
	ldr	r3, .L2182+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1164
	ldr	r3, .L2182+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1164
	ldr	r3, .L2182+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1164:
	ldr	r3, .L2182+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1165
	ldr	r3, .L2182+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L2182+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1166
.L1165:
	ldr	r3, .L2182+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1166
	ldr	r3, .L2182+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1166
	ldr	r3, .L2182+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1166
	ldr	r3, .L2182+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1166
	ldr	r3, .L2182+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1166
	ldr	r3, .L2182+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1166
	ldr	r3, .L2182+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1166
	ldr	r3, .L2182+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1166
	ldr	r3, .L2182+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1166
	ldr	r3, .L2182+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1166:
	ldr	r3, .L2182+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1167
	ldr	r3, .L2182+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1168
.L1167:
	ldr	r3, .L2182+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1168
	ldr	r3, .L2182+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1168
	ldr	r3, .L2182+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1168
	ldr	r3, .L2182+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1168
	ldr	r3, .L2182+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1168
	ldr	r3, .L2182+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1168
	ldr	r3, .L2182+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1168
	ldr	r3, .L2182+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1168
	ldr	r3, .L2182+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1168
	ldr	r3, .L2182+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1168:
	ldr	r3, .L2182+128
	ldr	r2, [r3]
	ldr	r3, .L2182+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1169
	ldr	r3, .L2182+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2182+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1169
	ldr	r3, .L2182+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1169
	ldr	r3, .L2182+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1169
	ldr	r3, .L2182+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1169
	ldr	r3, .L2182+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1169
	ldr	r3, .L2182+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1169
	ldr	r3, .L2182+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1172
.L1169:
	ldr	r3, .L2182+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1172
	ldr	r3, .L2182+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1172
	ldr	r3, .L2182+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1172
	ldr	r3, .L2182+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1172
	ldr	r3, .L2182+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1172
	ldr	r3, .L2182+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1172:
	ldr	r3, .L2182+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2182+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1173
	ldr	r3, .L2182+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2182+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1173
	ldr	r3, .L2182+128
	ldr	r2, [r3]
	ldr	r3, .L2182+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1173
	ldr	r3, .L2182+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L2182+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1173
	ldr	r3, .L2182+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1176
	ldr	r3, .L2182+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1176
	ldr	r3, .L2182+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1176
	ldr	r3, .L2182+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1177
.L1176:
	ldr	r3, .L2182+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1173
	ldr	r3, .L2182+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1173
	ldr	r3, .L2182+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1173
	ldr	r3, .L2182+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1177
.L1173:
	ldr	r3, .L2182+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1177
	ldr	r3, .L2182+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1177
	ldr	r3, .L2182+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1177
	ldr	r3, .L2182+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1177
	ldr	r3, .L2182+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1177
	ldr	r3, .L2182+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1177:
	ldr	r3, .L2182+128
	ldr	r3, [r3]
	cmp	r3, #9
	bne	.L1178
	ldr	r3, .L2182+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1178
	ldr	r3, .L2182+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1178
	ldr	r3, .L2182+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1178
	ldr	r3, .L2182+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1178
	ldr	r3, .L2182+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1178
	ldr	r3, .L2182+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1178
	ldr	r3, .L2182+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1178
	ldr	r3, .L2182+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1178
	ldr	r3, .L2182+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1178
	ldr	r3, .L2182+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1178:
	ldr	r3, .L2182+128
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L1179
	ldr	r3, .L2182+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1179
	ldr	r3, .L2185
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1179
	ldr	r3, .L2185+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1179
	ldr	r3, .L2185+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1179
	ldr	r3, .L2185+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1179
	ldr	r3, .L2185+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1179
	ldr	r3, .L2185+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1179
	ldr	r3, .L2185+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1179
	ldr	r3, .L2185+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1179
	ldr	r3, .L2185+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1179:
	ldr	r3, .L2185+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L2185+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1180
	ldr	r3, .L2185+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2185+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1180
	ldr	r3, .L2185+56
	ldr	r2, [r3]
	ldr	r3, .L2185+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1180
	ldr	r3, .L2185+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1180
	ldr	r3, .L2185+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1180
	ldr	r3, .L2185+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1180
	ldr	r3, .L2185+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1180
	ldr	r3, .L2185+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1182
.L1180:
	ldr	r3, .L2185+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1182
	ldr	r3, .L2185+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1182
	ldr	r3, .L2185+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1182
	ldr	r3, .L2185+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1182
	ldr	r3, .L2185+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1182
	ldr	r3, .L2185
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1182:
	ldr	r3, .L2185+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L2185+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1183
	ldr	r3, .L2185+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1183
	ldr	r3, .L2185+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1183
	ldr	r3, .L2185+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1183
	ldr	r3, .L2185+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1183
	ldr	r3, .L2185+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1183
	ldr	r3, .L2185+56
	ldr	r2, [r3]
	ldr	r3, .L2185+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1183
	ldr	r3, .L2185+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1185
.L1183:
	ldr	r3, .L2185+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1185
	ldr	r3, .L2185+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1185
	ldr	r3, .L2185+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1185
	ldr	r3, .L2185+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1185
	ldr	r3, .L2185+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1185
	ldr	r3, .L2185
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1185:
	ldr	r3, .L2185+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L2185+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1186
	ldr	r3, .L2185+68
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1186
	ldr	r3, .L2185+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1186
	ldr	r3, .L2185+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1186
	ldr	r3, .L2185+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1186
	ldr	r3, .L2185+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1186
	ldr	r3, .L2185+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2185+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1186
	ldr	r3, .L2185+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L2185+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1188
.L1186:
	ldr	r3, .L2185+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1188
	ldr	r3, .L2185+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1188
	ldr	r3, .L2185+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1188
	ldr	r3, .L2185+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1188
	ldr	r3, .L2185+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1188
	ldr	r3, .L2185
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1188:
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1189
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1189
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1189
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1190
.L1189:
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1191
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1191
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1191
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1190
.L1191:
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1192
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1192
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1192
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1190
.L1192:
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1193
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1193
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1193
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1190
.L1193:
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1194
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1194
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1194
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1190
.L1194:
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1195
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1195
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1195
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1190
.L1195:
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1196
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1196
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1196
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1190
.L1196:
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1197
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1197
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1197
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1190
.L1197:
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1190:
	ldr	r3, .L2185+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L2185+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1198
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1199
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1199
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1199
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1199:
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1200
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1200
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1200
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1200:
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1201
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1201
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1201
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1201:
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1198
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1198
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1198
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1198:
	ldr	r3, .L2185+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1202
	ldr	r3, .L2185+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1202
	ldr	r3, .L2185+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1202
	ldr	r3, .L2185+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1202
	ldr	r3, .L2185+160
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L2185+96
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L2185+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1202
	ldr	r3, .L2185+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L2185+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1204
.L1202:
	ldr	r3, .L2185+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2185+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1204:
	ldr	r3, .L2185+56
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1206
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1206
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1206
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1206
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1206
	ldr	r3, .L2185+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2185+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1206
	ldr	r3, .L2185+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1206
	ldr	r3, .L2185+56
	ldr	r2, [r3]
	ldr	r3, .L2185+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1206
	ldr	r3, .L2185+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L2185+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1208
.L1206:
	ldr	r3, .L2185+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1208
	ldr	r3, .L2185+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1208
	ldr	r3, .L2185+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1208
	ldr	r3, .L2185+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1208
	ldr	r3, .L2185+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1208
	ldr	r3, .L2185+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1208:
	ldr	r3, .L2185+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L2185+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1209
	ldr	r3, .L2185+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2185+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1209
	ldr	r3, .L2185+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1209
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1209
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1209
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1209
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1209
	ldr	r3, .L2185+68
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L1212
.L1209:
	ldr	r3, .L2185+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L2185+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L2185+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1212
	ldr	r3, .L2185+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L2185+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1212
	ldr	r3, .L2185+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1212:
	ldr	r3, .L2185+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2185+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1213
	ldr	r3, .L2185+56
	ldr	r2, [r3]
	ldr	r3, .L2185+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1213
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1214
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1214
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1214
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1215
.L1214:
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1213
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1213
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1213
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1213
.L1215:
	ldr	r3, .L2185+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L2185+100
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1216
.L1213:
	ldr	r3, .L2185+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1216
	ldr	r3, .L2185+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1216
	ldr	r3, .L2185+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1216
	ldr	r3, .L2185+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1216
	ldr	r3, .L2185+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1216
	ldr	r3, .L2185+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1216:
	ldr	r3, .L2185+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L2185+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1217
	ldr	r3, .L2185+56
	ldr	r3, [r3]
	cmp	r3, #8
	bne	.L1219
.L1217:
	ldr	r3, .L2185+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1219
	ldr	r3, .L2185+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1219
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1219
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1219
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1219
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1219
	ldr	r3, .L2185+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1219
	ldr	r3, .L2185+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1219
	ldr	r3, .L2185+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1219
	ldr	r3, .L2185+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1219:
	ldr	r3, .L2185+56
	ldr	r3, [r3]
	cmp	r3, #8
	bne	.L1220
	ldr	r3, .L2185+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L2185+52
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1221
	mov	r3, #0
	mov	r4, r3
.L1221:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1220
	ldr	r3, .L2185+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L2185+64
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1222
	mov	r3, #0
	mov	r4, r3
.L1222:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L1223
.L1220:
	ldr	r3, .L2185+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1223
	ldr	r3, .L2185+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1223
	ldr	r3, .L2185+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1223
	ldr	r3, .L2185+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1223
	ldr	r3, .L2185+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1223
	ldr	r3, .L2185+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1223
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1223
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1223
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1223
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	b	.L2186
.L2187:
	.align	2
.L2185:
	.word	p8_evt
	.word	p8_l3
	.word	p8_l2
	.word	p8_l0
	.word	p8_l1
	.word	_x_p8_l3
	.word	_x_p8_l2
	.word	_x_p8_l1
	.word	_x_p8_l0
	.word	proposed8
	.word	_x_proposed8
	.word	_x_p8_c
	.word	p8_c
	.word	max_prop
	.word	v1
	.word	proposed7
	.word	_x_proposed7
	.word	_x_v1
	.word	_x_p7_l3
	.word	_x_p7_l2
	.word	_x_p7_l0
	.word	_x_p7_l1
	.word	v2
	.word	_x_v2
	.word	p7_c
	.word	_x_p7_c
	.word	p7_l3
	.word	p7_l2
	.word	p7_l0
	.word	p7_l1
	.word	p7_evt
	.word	_x_proposed6
	.word	p6_l0
	.word	_x_p6_l0
	.word	p6_l1
	.word	_x_p6_l1
	.word	p6_l2
	.word	_x_p6_l2
	.word	p6_l3
	.word	_x_p6_l3
	.word	delta
	.word	p6_c
	.word	_x_p6_c
.L2186:
.L1223:
	ldr	r3, .L2185+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2185+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1224
	ldr	r3, .L2185+56
	ldr	r2, [r3]
	ldr	r3, .L2185+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1224
	ldr	r3, .L2185+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L2185+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1224
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1226
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1226
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1226
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1227
.L1226:
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1224
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1224
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1224
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1227
.L1224:
	ldr	r3, .L2185+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1227
	ldr	r3, .L2185+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1227
	ldr	r3, .L2185+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1227
	ldr	r3, .L2185+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1227
	ldr	r3, .L2185+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1227
	ldr	r3, .L2185+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1227:
	ldr	r3, .L2185+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1228
	ldr	r3, .L2185+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L2185+100
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1229
.L1228:
	ldr	r3, .L2185+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1229
	ldr	r3, .L2185+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1229
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1229
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1229
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1229
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1229
	ldr	r3, .L2185+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1229
	ldr	r3, .L2185+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1229
	ldr	r3, .L2185+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1229
	ldr	r3, .L2185+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1229:
	ldr	r3, .L2185+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1230
	ldr	r3, .L2185+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1231
.L1230:
	ldr	r3, .L2185+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1231
	ldr	r3, .L2185+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1231
	ldr	r3, .L2185+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1231
	ldr	r3, .L2185+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1231
	ldr	r3, .L2185+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1231
	ldr	r3, .L2185+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1231
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1231
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1231
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1231
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1231:
	ldr	r3, .L2185+56
	ldr	r2, [r3]
	ldr	r3, .L2185+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1232
	ldr	r3, .L2185+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L2185+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1232
	ldr	r3, .L2185+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1232
	ldr	r3, .L2185+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1232
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1232
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1232
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1232
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1235
.L1232:
	ldr	r3, .L2185+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1235
	ldr	r3, .L2185+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1235
	ldr	r3, .L2185+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1235
	ldr	r3, .L2185+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1235
	ldr	r3, .L2185+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1235
	ldr	r3, .L2185+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1235:
	ldr	r3, .L2185+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L2185+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1236
	ldr	r3, .L2185+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2185+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1236
	ldr	r3, .L2185+56
	ldr	r2, [r3]
	ldr	r3, .L2185+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1236
	ldr	r3, .L2185+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L2185+100
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1236
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1239
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1239
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1239
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1240
.L1239:
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1236
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1236
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1236
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1240
.L1236:
	ldr	r3, .L2185+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1240
	ldr	r3, .L2185+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1240
	ldr	r3, .L2185+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1240
	ldr	r3, .L2185+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1240
	ldr	r3, .L2185+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1240
	ldr	r3, .L2185+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1240:
	ldr	r3, .L2185+56
	ldr	r3, [r3]
	cmp	r3, #8
	bne	.L1241
	ldr	r3, .L2185+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1241
	ldr	r3, .L2185+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1241
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1241
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1241
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1241
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1241
	ldr	r3, .L2185+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1241
	ldr	r3, .L2185+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1241
	ldr	r3, .L2185+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1241
	ldr	r3, .L2185+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1241:
	ldr	r3, .L2185+56
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L1242
	ldr	r3, .L2185+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1242
	ldr	r3, .L2185+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1242
	ldr	r3, .L2185+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1242
	ldr	r3, .L2185+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1242
	ldr	r3, .L2185+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1242
	ldr	r3, .L2185+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1242
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1242
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1242
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1242
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1242:
	ldr	r3, .L2185+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L2185+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1243
	ldr	r3, .L2185+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2185+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1243
	ldr	r3, .L2185+56
	ldr	r2, [r3]
	ldr	r3, .L2185+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1243
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1243
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1243
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1243
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1243
	ldr	r3, .L2185+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1245
.L1243:
	ldr	r3, .L2185+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1245
	ldr	r3, .L2185+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1245
	ldr	r3, .L2185+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1245
	ldr	r3, .L2185+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1245
	ldr	r3, .L2185+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1245
	ldr	r3, .L2185+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1245:
	ldr	r3, .L2185+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L2185+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1246
	ldr	r3, .L2185+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1246
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1246
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1246
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1246
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1246
	ldr	r3, .L2185+56
	ldr	r2, [r3]
	ldr	r3, .L2185+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1246
	ldr	r3, .L2185+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1248
.L1246:
	ldr	r3, .L2185+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1248
	ldr	r3, .L2185+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1248
	ldr	r3, .L2185+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1248
	ldr	r3, .L2185+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1248
	ldr	r3, .L2185+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1248
	ldr	r3, .L2185+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1248:
	ldr	r3, .L2185+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L2185+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1249
	ldr	r3, .L2185+68
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1249
	ldr	r3, .L2185+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1249
	ldr	r3, .L2185+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1249
	ldr	r3, .L2185+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1249
	ldr	r3, .L2185+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1249
	ldr	r3, .L2185+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2185+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1249
	ldr	r3, .L2185+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L2185+100
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1251
.L1249:
	ldr	r3, .L2185+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1251
	ldr	r3, .L2185+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1251
	ldr	r3, .L2185+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1251
	ldr	r3, .L2185+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1251
	ldr	r3, .L2185+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1251
	ldr	r3, .L2185+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1251:
	ldr	r3, .L2185+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1252
	ldr	r3, .L2185+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1252
	ldr	r3, .L2185+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1252
	ldr	r3, .L2185+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1253
.L1252:
	ldr	r3, .L2185+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1254
	ldr	r3, .L2185+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1254
	ldr	r3, .L2185+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1254
	ldr	r3, .L2185+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1253
.L1254:
	ldr	r3, .L2185+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1255
	ldr	r3, .L2185+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1255
	ldr	r3, .L2185+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1255
	ldr	r3, .L2185+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1253
.L1255:
	ldr	r3, .L2185+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1256
	ldr	r3, .L2185+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1256
	ldr	r3, .L2185+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1256
	ldr	r3, .L2185+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1253
.L1256:
	ldr	r3, .L2185+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1257
	ldr	r3, .L2185+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1257
	ldr	r3, .L2185+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1257
	ldr	r3, .L2185+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1253
.L1257:
	ldr	r3, .L2185+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1258
	ldr	r3, .L2185+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1258
	ldr	r3, .L2185+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1258
	ldr	r3, .L2185+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1253
.L1258:
	ldr	r3, .L2185+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1259
	ldr	r3, .L2185+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1259
	ldr	r3, .L2185+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1259
	ldr	r3, .L2185+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1253
.L1259:
	ldr	r3, .L2185+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1260
	ldr	r3, .L2185+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1260
	ldr	r3, .L2185+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1260
	ldr	r3, .L2185+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1253
.L1260:
	ldr	r3, .L2185+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2185+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2185+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2185+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1253:
	ldr	r3, .L2185+168
	ldr	r3, [r3]	@ float
	ldr	r2, .L2185+124
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1261
	ldr	r3, .L2185+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1262
	ldr	r3, .L2185+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1262
	ldr	r3, .L2185+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1262
	ldr	r3, .L2185+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1262:
	ldr	r3, .L2185+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1263
	ldr	r3, .L2185+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1263
	ldr	r3, .L2185+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1263
	ldr	r3, .L2185+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1263:
	ldr	r3, .L2185+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1264
	ldr	r3, .L2185+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1264
	ldr	r3, .L2185+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1264
	ldr	r3, .L2185+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1264:
	ldr	r3, .L2185+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1261
	ldr	r3, .L2185+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1261
	ldr	r3, .L2185+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1261
	ldr	r3, .L2185+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1261:
	ldr	r3, .L2185+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2185+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1265
	ldr	r3, .L2185+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2185+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1265
	ldr	r3, .L2185+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2185+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1265
	ldr	r3, .L2185+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2185+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1265
	ldr	r3, .L2185+160
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L2185+164
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L2185+168
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1265
	ldr	r3, .L2188
	ldr	r3, [r3]	@ float
	ldr	r2, .L2188+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1267
.L1265:
	ldr	r3, .L2188+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2188+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1267:
	ldr	r3, .L2188+16
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1269
	ldr	r3, .L2188+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1269
	ldr	r3, .L2188+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1269
	ldr	r3, .L2188+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1269
	ldr	r3, .L2188+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1269
	ldr	r3, .L2188+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2188+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1269
	ldr	r3, .L2188+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1269
	ldr	r3, .L2188+16
	ldr	r2, [r3]
	ldr	r3, .L2188+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1269
	ldr	r3, .L2188
	ldr	r3, [r3]	@ float
	ldr	r2, .L2188+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1271
.L1269:
	ldr	r3, .L2188+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1271
	ldr	r3, .L2188+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1271
	ldr	r3, .L2188+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1271
	ldr	r3, .L2188+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1271
	ldr	r3, .L2188+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1271
	ldr	r3, .L2188+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1271:
	ldr	r3, .L2188
	ldr	r3, [r3]	@ float
	ldr	r2, .L2188+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1272
	ldr	r3, .L2188+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2188+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1272
	ldr	r3, .L2188+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1272
	ldr	r3, .L2188+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1272
	ldr	r3, .L2188+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1272
	ldr	r3, .L2188+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1272
	ldr	r3, .L2188+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1272
	ldr	r3, .L2188+84
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L1275
.L1272:
	ldr	r3, .L2188+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1275
	ldr	r3, .L2188+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1275
	ldr	r3, .L2188+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1275
	ldr	r3, .L2188+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1275
	ldr	r3, .L2188+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1275
	ldr	r3, .L2188+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1275:
	ldr	r3, .L2188+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2188+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1276
	ldr	r3, .L2188+16
	ldr	r2, [r3]
	ldr	r3, .L2188+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1276
	ldr	r3, .L2188+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1277
	ldr	r3, .L2188+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1277
	ldr	r3, .L2188+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1277
	ldr	r3, .L2188+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1278
.L1277:
	ldr	r3, .L2188+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1276
	ldr	r3, .L2188+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1276
	ldr	r3, .L2188+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1276
	ldr	r3, .L2188+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1276
.L1278:
	ldr	r3, .L2188+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2188+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1279
.L1276:
	ldr	r3, .L2188+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1279
	ldr	r3, .L2188+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1279
	ldr	r3, .L2188+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1279
	ldr	r3, .L2188+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1279
	ldr	r3, .L2188+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1279
	ldr	r3, .L2188+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1279:
	ldr	r3, .L2188
	ldr	r3, [r3]	@ float
	ldr	r2, .L2188+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1280
	ldr	r3, .L2188+16
	ldr	r3, [r3]
	cmp	r3, #7
	bne	.L1282
.L1280:
	ldr	r3, .L2188+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1282
	ldr	r3, .L2188+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1282
	ldr	r3, .L2188+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1282
	ldr	r3, .L2188+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1282
	ldr	r3, .L2188+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1282
	ldr	r3, .L2188+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1282
	ldr	r3, .L2188+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1282
	ldr	r3, .L2188+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1282
	ldr	r3, .L2188+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1282
	ldr	r3, .L2188+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1282:
	ldr	r3, .L2188+16
	ldr	r3, [r3]
	cmp	r3, #7
	bne	.L1283
	ldr	r3, .L2188+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2188+72
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1284
	mov	r3, #0
	mov	r4, r3
.L1284:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1283
	ldr	r3, .L2188
	ldr	r3, [r3]	@ float
	ldr	r2, .L2188+4
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1285
	mov	r3, #0
	mov	r4, r3
.L1285:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L1286
.L1283:
	ldr	r3, .L2188+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1286
	ldr	r3, .L2188+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1286
	ldr	r3, .L2188+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1286
	ldr	r3, .L2188+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1286
	ldr	r3, .L2188+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1286
	ldr	r3, .L2188+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1286
	ldr	r3, .L2188+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1286
	ldr	r3, .L2188+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1286
	ldr	r3, .L2188+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1286
	ldr	r3, .L2188+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1286:
	ldr	r3, .L2188+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2188+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1287
	ldr	r3, .L2188+16
	ldr	r2, [r3]
	ldr	r3, .L2188+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1287
	ldr	r3, .L2188
	ldr	r3, [r3]	@ float
	ldr	r2, .L2188+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1287
	ldr	r3, .L2188+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1289
	ldr	r3, .L2188+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1289
	ldr	r3, .L2188+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1289
	ldr	r3, .L2188+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1290
.L1289:
	ldr	r3, .L2188+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1287
	ldr	r3, .L2188+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1287
	ldr	r3, .L2188+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1287
	ldr	r3, .L2188+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1290
.L1287:
	ldr	r3, .L2188+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1290
	ldr	r3, .L2188+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1290
	ldr	r3, .L2188+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1290
	ldr	r3, .L2188+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1290
	ldr	r3, .L2188+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1290
	ldr	r3, .L2188+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1290:
	ldr	r3, .L2188+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1291
	ldr	r3, .L2188+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2188+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1292
.L1291:
	ldr	r3, .L2188+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1292
	ldr	r3, .L2188+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1292
	ldr	r3, .L2188+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1292
	ldr	r3, .L2188+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1292
	ldr	r3, .L2188+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1292
	ldr	r3, .L2188+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1292
	ldr	r3, .L2188+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1292
	ldr	r3, .L2188+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1292
	ldr	r3, .L2188+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1292
	ldr	r3, .L2188+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1292:
	ldr	r3, .L2188+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1293
	ldr	r3, .L2188+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1294
.L1293:
	ldr	r3, .L2188+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1294
	ldr	r3, .L2188+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1294
	ldr	r3, .L2188+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1294
	ldr	r3, .L2188+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1294
	ldr	r3, .L2188+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1294
	ldr	r3, .L2188+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1294
	ldr	r3, .L2188+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1294
	ldr	r3, .L2188+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1294
	ldr	r3, .L2188+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1294
	ldr	r3, .L2188+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1294:
	ldr	r3, .L2188+16
	ldr	r2, [r3]
	ldr	r3, .L2188+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1295
	ldr	r3, .L2188
	ldr	r3, [r3]	@ float
	ldr	r2, .L2188+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1295
	ldr	r3, .L2188+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1295
	ldr	r3, .L2188+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1295
	ldr	r3, .L2188+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1295
	ldr	r3, .L2188+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1295
	ldr	r3, .L2188+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1295
	ldr	r3, .L2188+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1298
.L1295:
	ldr	r3, .L2188+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1298
	ldr	r3, .L2188+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1298
	ldr	r3, .L2188+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1298
	ldr	r3, .L2188+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1298
	ldr	r3, .L2188+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1298
	ldr	r3, .L2188+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1298:
	ldr	r3, .L2188
	ldr	r3, [r3]	@ float
	ldr	r2, .L2188+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1299
	ldr	r3, .L2188+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2188+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1299
	ldr	r3, .L2188+16
	ldr	r2, [r3]
	ldr	r3, .L2188+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1299
	ldr	r3, .L2188+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2188+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1299
	ldr	r3, .L2188+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1302
	ldr	r3, .L2188+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1302
	ldr	r3, .L2188+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1302
	ldr	r3, .L2188+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1303
.L1302:
	ldr	r3, .L2188+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1299
	ldr	r3, .L2188+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1299
	ldr	r3, .L2188+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1299
	ldr	r3, .L2188+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1303
.L1299:
	ldr	r3, .L2188+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1303
	ldr	r3, .L2188+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1303
	ldr	r3, .L2188+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1303
	ldr	r3, .L2188+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1303
	ldr	r3, .L2188+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1303
	ldr	r3, .L2188+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1303:
	ldr	r3, .L2188+16
	ldr	r3, [r3]
	cmp	r3, #7
	bne	.L1304
	ldr	r3, .L2188+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1304
	ldr	r3, .L2188+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1304
	ldr	r3, .L2188+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1304
	ldr	r3, .L2188+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1304
	ldr	r3, .L2188+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1304
	ldr	r3, .L2188+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1304
	ldr	r3, .L2188+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1304
	ldr	r3, .L2188+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1304
	ldr	r3, .L2188+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1304
	ldr	r3, .L2188+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1304:
	ldr	r3, .L2188+16
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L1305
	ldr	r3, .L2188+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1305
	ldr	r3, .L2188+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1305
	ldr	r3, .L2188+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1305
	ldr	r3, .L2188+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1305
	ldr	r3, .L2188+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1305
	ldr	r3, .L2188+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1305
	ldr	r3, .L2188+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1305
	ldr	r3, .L2188+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1305
	ldr	r3, .L2188+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1305
	ldr	r3, .L2188+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1305:
	ldr	r3, .L2188
	ldr	r3, [r3]	@ float
	ldr	r2, .L2188+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1306
	ldr	r3, .L2188+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2188+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1306
	ldr	r3, .L2188+16
	ldr	r2, [r3]
	ldr	r3, .L2188+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1306
	ldr	r3, .L2188+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1306
	ldr	r3, .L2188+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1306
	ldr	r3, .L2188+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1306
	ldr	r3, .L2188+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1306
	ldr	r3, .L2188+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1308
.L1306:
	ldr	r3, .L2188+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1308
	ldr	r3, .L2188+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1308
	ldr	r3, .L2188+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1308
	ldr	r3, .L2188+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1308
	ldr	r3, .L2188+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1308
	ldr	r3, .L2188+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1308:
	ldr	r3, .L2188
	ldr	r3, [r3]	@ float
	ldr	r2, .L2188+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1309
	ldr	r3, .L2188+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1309
	ldr	r3, .L2188+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1309
	ldr	r3, .L2188+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1309
	ldr	r3, .L2188+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1309
	ldr	r3, .L2188+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1309
	ldr	r3, .L2188+16
	ldr	r2, [r3]
	ldr	r3, .L2188+84
	ldr	r3, [r3]
	cmp	r2, r3
	b	.L2189
.L2190:
	.align	2
.L2188:
	.word	proposed6
	.word	_x_proposed6
	.word	delta
	.word	p6_evt
	.word	v1
	.word	proposed6
	.word	_x_proposed6
	.word	_x_p6_l3
	.word	_x_p6_l2
	.word	_x_p6_l0
	.word	_x_p6_l1
	.word	p6_c
	.word	_x_p6_c
	.word	p6_l3
	.word	p6_l2
	.word	p6_l0
	.word	p6_l1
	.word	p6_evt
	.word	max_prop
	.word	_x_v2
	.word	v1
	.word	_x_v1
	.word	proposed5
	.word	_x_proposed5
	.word	p5_c
	.word	_x_p5_c
	.word	delta
	.word	p5_evt
	.word	_x_p5_l3
	.word	_x_p5_l2
	.word	_x_p5_l0
	.word	_x_p5_l1
	.word	p5_l3
	.word	p5_l2
	.word	p5_l0
	.word	p5_l1
	.word	v2
.L2189:
	bne	.L1309
	ldr	r3, .L2188+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1311
.L1309:
	ldr	r3, .L2188+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1311
	ldr	r3, .L2188+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1311
	ldr	r3, .L2188+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1311
	ldr	r3, .L2188+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1311
	ldr	r3, .L2188+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1311
	ldr	r3, .L2188+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1311:
	ldr	r3, .L2188+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2188+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1312
	ldr	r3, .L2188+84
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1312
	ldr	r3, .L2188+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1312
	ldr	r3, .L2188+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1312
	ldr	r3, .L2188+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1312
	ldr	r3, .L2188+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1312
	ldr	r3, .L2188+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2188+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1312
	ldr	r3, .L2188+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2188+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1314
.L1312:
	ldr	r3, .L2188+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1314
	ldr	r3, .L2188+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1314
	ldr	r3, .L2188+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1314
	ldr	r3, .L2188+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1314
	ldr	r3, .L2188+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1314
	ldr	r3, .L2188+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1314:
	ldr	r3, .L2188+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1315
	ldr	r3, .L2188+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1315
	ldr	r3, .L2188+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1315
	ldr	r3, .L2188+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1316
.L1315:
	ldr	r3, .L2188+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1317
	ldr	r3, .L2188+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1317
	ldr	r3, .L2188+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1317
	ldr	r3, .L2188+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1316
.L1317:
	ldr	r3, .L2188+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1318
	ldr	r3, .L2188+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1318
	ldr	r3, .L2188+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1318
	ldr	r3, .L2188+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1316
.L1318:
	ldr	r3, .L2188+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1319
	ldr	r3, .L2188+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1319
	ldr	r3, .L2188+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1319
	ldr	r3, .L2188+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1316
.L1319:
	ldr	r3, .L2188+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1320
	ldr	r3, .L2188+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1320
	ldr	r3, .L2188+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1320
	ldr	r3, .L2188+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1316
.L1320:
	ldr	r3, .L2188+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1321
	ldr	r3, .L2188+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1321
	ldr	r3, .L2188+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1321
	ldr	r3, .L2188+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1316
.L1321:
	ldr	r3, .L2188+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1322
	ldr	r3, .L2188+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1322
	ldr	r3, .L2188+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1322
	ldr	r3, .L2188+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1316
.L1322:
	ldr	r3, .L2188+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1323
	ldr	r3, .L2188+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1323
	ldr	r3, .L2188+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1323
	ldr	r3, .L2188+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1316
.L1323:
	ldr	r3, .L2188+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2188+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2188+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2188+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1316:
	ldr	r3, .L2188+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L2188+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1324
	ldr	r3, .L2188+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1325
	ldr	r3, .L2188+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1325
	ldr	r3, .L2188+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1325
	ldr	r3, .L2188+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1325:
	ldr	r3, .L2188+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1326
	ldr	r3, .L2188+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1326
	ldr	r3, .L2188+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1326
	ldr	r3, .L2188+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1326:
	ldr	r3, .L2188+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1327
	ldr	r3, .L2188+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1327
	ldr	r3, .L2188+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1327
	ldr	r3, .L2188+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1327:
	ldr	r3, .L2188+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1324
	ldr	r3, .L2188+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1324
	ldr	r3, .L2188+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1324
	ldr	r3, .L2188+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1324:
	ldr	r3, .L2188+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2188+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1328
	ldr	r3, .L2188+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2188+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1328
	ldr	r3, .L2188+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2188+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1328
	ldr	r3, .L2188+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2188+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1328
	ldr	r3, .L2188+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L2188+96
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L2188+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1328
	ldr	r3, .L2188+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L2188+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1330
.L1328:
	ldr	r3, .L2188+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2188+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1330:
	ldr	r3, .L2188+80
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1332
	ldr	r3, .L2188+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1332
	ldr	r3, .L2188+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1332
	ldr	r3, .L2188+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1332
	ldr	r3, .L2188+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1332
	ldr	r3, .L2188+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2188+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1332
	ldr	r3, .L2188+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1332
	ldr	r3, .L2188+80
	ldr	r2, [r3]
	ldr	r3, .L2188+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1332
	ldr	r3, .L2188+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L2188+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1334
.L1332:
	ldr	r3, .L2188+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1334
	ldr	r3, .L2188+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1334
	ldr	r3, .L2188+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1334
	ldr	r3, .L2188+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1334
	ldr	r3, .L2188+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1334
	ldr	r3, .L2188+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1334:
	ldr	r3, .L2188+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L2188+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1335
	ldr	r3, .L2188+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2188+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1335
	ldr	r3, .L2188+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1335
	ldr	r3, .L2188+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1335
	ldr	r3, .L2188+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1335
	ldr	r3, .L2188+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1335
	ldr	r3, .L2188+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1335
	ldr	r3, .L2188+84
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L1338
.L1335:
	ldr	r3, .L2188+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1338
	ldr	r3, .L2188+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1338
	ldr	r3, .L2188+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1338
	ldr	r3, .L2188+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1338
	ldr	r3, .L2188+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1338
	ldr	r3, .L2188+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1338:
	ldr	r3, .L2188+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2188+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1339
	ldr	r3, .L2188+80
	ldr	r2, [r3]
	ldr	r3, .L2188+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1339
	ldr	r3, .L2188+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1340
	ldr	r3, .L2188+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1340
	ldr	r3, .L2188+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1340
	ldr	r3, .L2188+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1341
.L1340:
	ldr	r3, .L2188+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1339
	ldr	r3, .L2188+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1339
	ldr	r3, .L2188+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1339
	ldr	r3, .L2188+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1339
.L1341:
	ldr	r3, .L2188+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L2188+100
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1342
.L1339:
	ldr	r3, .L2188+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1342
	ldr	r3, .L2188+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1342
	ldr	r3, .L2188+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1342
	ldr	r3, .L2188+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1342
	ldr	r3, .L2188+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1342
	ldr	r3, .L2188+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1342:
	ldr	r3, .L2188+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L2188+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1343
	ldr	r3, .L2188+80
	ldr	r3, [r3]
	cmp	r3, #6
	bne	.L1345
.L1343:
	ldr	r3, .L2188+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1345
	ldr	r3, .L2188+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1345
	ldr	r3, .L2188+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1345
	ldr	r3, .L2188+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1345
	ldr	r3, .L2188+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1345
	ldr	r3, .L2188+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1345
	ldr	r3, .L2188+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1345
	ldr	r3, .L2188+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1345
	ldr	r3, .L2188+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1345
	ldr	r3, .L2188+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1345:
	ldr	r3, .L2188+80
	ldr	r3, [r3]
	cmp	r3, #6
	bne	.L1346
	ldr	r3, .L2188+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L2188+72
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1347
	mov	r3, #0
	mov	r4, r3
.L1347:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1346
	ldr	r3, .L2188+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L2188+92
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1348
	mov	r3, #0
	mov	r4, r3
.L1348:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L1349
.L1346:
	ldr	r3, .L2188+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1349
	ldr	r3, .L2188+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1349
	ldr	r3, .L2188+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1349
	ldr	r3, .L2188+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1349
	ldr	r3, .L2188+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1349
	ldr	r3, .L2188+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1349
	ldr	r3, .L2188+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1349
	ldr	r3, .L2188+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1349
	ldr	r3, .L2188+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1349
	ldr	r3, .L2188+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1349:
	ldr	r3, .L2188+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2188+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1350
	ldr	r3, .L2188+80
	ldr	r2, [r3]
	ldr	r3, .L2188+84
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1350
	ldr	r3, .L2188+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L2188+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1350
	ldr	r3, .L2188+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1352
	ldr	r3, .L2188+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1352
	ldr	r3, .L2188+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1352
	ldr	r3, .L2188+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1353
.L1352:
	ldr	r3, .L2188+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1350
	ldr	r3, .L2188+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1350
	ldr	r3, .L2188+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1350
	ldr	r3, .L2188+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1353
.L1350:
	ldr	r3, .L2188+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1353
	ldr	r3, .L2188+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1353
	ldr	r3, .L2188+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1353
	ldr	r3, .L2188+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1353
	ldr	r3, .L2188+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1353
	ldr	r3, .L2188+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1353:
	ldr	r3, .L2188+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1354
	ldr	r3, .L2188+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L2188+100
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1355
.L1354:
	ldr	r3, .L2188+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1355
	ldr	r3, .L2188+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1355
	ldr	r3, .L2188+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1355
	ldr	r3, .L2188+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1355
	ldr	r3, .L2188+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1355
	ldr	r3, .L2188+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1355
	ldr	r3, .L2188+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1355
	ldr	r3, .L2188+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1355
	ldr	r3, .L2188+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1355
	ldr	r3, .L2188+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1355:
	ldr	r3, .L2188+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1356
	ldr	r3, .L2191
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1357
.L1356:
	ldr	r3, .L2191+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1357
	ldr	r3, .L2191+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1357
	ldr	r3, .L2191+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1357
	ldr	r3, .L2191+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1357
	ldr	r3, .L2191+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1357
	ldr	r3, .L2191+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1357
	ldr	r3, .L2191+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1357
	ldr	r3, .L2191+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1357
	ldr	r3, .L2191+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1357
	ldr	r3, .L2191+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1357:
	ldr	r3, .L2191+60
	ldr	r2, [r3]
	ldr	r3, .L2191+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1358
	ldr	r3, .L2191+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2191+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1358
	ldr	r3, .L2191
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1358
	ldr	r3, .L2191+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1358
	ldr	r3, .L2191+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1358
	ldr	r3, .L2191+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1358
	ldr	r3, .L2191+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1358
	ldr	r3, .L2191+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1361
.L1358:
	ldr	r3, .L2191+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1361
	ldr	r3, .L2191+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1361
	ldr	r3, .L2191+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1361
	ldr	r3, .L2191+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1361
	ldr	r3, .L2191+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1361
	ldr	r3, .L2191+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1361:
	ldr	r3, .L2191+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2191+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1362
	ldr	r3, .L2191+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2191+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1362
	ldr	r3, .L2191+60
	ldr	r2, [r3]
	ldr	r3, .L2191+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1362
	ldr	r3, .L2191+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L2191
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1362
	ldr	r3, .L2191+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1365
	ldr	r3, .L2191+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1365
	ldr	r3, .L2191+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1365
	ldr	r3, .L2191+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1366
.L1365:
	ldr	r3, .L2191+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1362
	ldr	r3, .L2191+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1362
	ldr	r3, .L2191+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1362
	ldr	r3, .L2191+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1366
.L1362:
	ldr	r3, .L2191+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1366
	ldr	r3, .L2191+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1366
	ldr	r3, .L2191+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1366
	ldr	r3, .L2191+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1366
	ldr	r3, .L2191+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1366
	ldr	r3, .L2191+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1366:
	ldr	r3, .L2191+60
	ldr	r3, [r3]
	cmp	r3, #6
	bne	.L1367
	ldr	r3, .L2191+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1367
	ldr	r3, .L2191+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1367
	ldr	r3, .L2191+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1367
	ldr	r3, .L2191+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1367
	ldr	r3, .L2191+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1367
	ldr	r3, .L2191+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1367
	ldr	r3, .L2191+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1367
	ldr	r3, .L2191+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1367
	ldr	r3, .L2191+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1367
	ldr	r3, .L2191+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1367:
	ldr	r3, .L2191+60
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L1368
	ldr	r3, .L2191+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1368
	ldr	r3, .L2191+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1368
	ldr	r3, .L2191+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1368
	ldr	r3, .L2191+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1368
	ldr	r3, .L2191+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1368
	ldr	r3, .L2191+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1368
	ldr	r3, .L2191+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1368
	ldr	r3, .L2191+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1368
	ldr	r3, .L2191+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1368
	ldr	r3, .L2191+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1368:
	ldr	r3, .L2191+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2191+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1369
	ldr	r3, .L2191+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2191+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1369
	ldr	r3, .L2191+60
	ldr	r2, [r3]
	ldr	r3, .L2191+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1369
	ldr	r3, .L2191+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1369
	ldr	r3, .L2191+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1369
	ldr	r3, .L2191+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1369
	ldr	r3, .L2191+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1369
	ldr	r3, .L2191
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1371
.L1369:
	ldr	r3, .L2191+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1371
	ldr	r3, .L2191+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1371
	ldr	r3, .L2191+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1371
	ldr	r3, .L2191+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1371
	ldr	r3, .L2191+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1371
	ldr	r3, .L2191+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1371:
	ldr	r3, .L2191+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2191+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1372
	ldr	r3, .L2191+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1372
	ldr	r3, .L2191+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1372
	ldr	r3, .L2191+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1372
	ldr	r3, .L2191+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1372
	ldr	r3, .L2191+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1372
	ldr	r3, .L2191+60
	ldr	r2, [r3]
	ldr	r3, .L2191+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1372
	ldr	r3, .L2191
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1374
.L1372:
	ldr	r3, .L2191+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1374
	ldr	r3, .L2191+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1374
	ldr	r3, .L2191+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1374
	ldr	r3, .L2191+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1374
	ldr	r3, .L2191+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1374
	ldr	r3, .L2191+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1374:
	ldr	r3, .L2191+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2191+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1375
	ldr	r3, .L2191+72
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1375
	ldr	r3, .L2191+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1375
	ldr	r3, .L2191+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1375
	ldr	r3, .L2191+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1375
	ldr	r3, .L2191+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1375
	ldr	r3, .L2191+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2191+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1375
	ldr	r3, .L2191+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L2191
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1377
.L1375:
	ldr	r3, .L2191+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1377
	ldr	r3, .L2191+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1377
	ldr	r3, .L2191+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1377
	ldr	r3, .L2191+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1377
	ldr	r3, .L2191+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1377
	ldr	r3, .L2191+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1377:
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1378
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1378
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1378
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1379
.L1378:
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1380
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1380
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1380
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1379
.L1380:
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1381
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1381
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1381
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1379
.L1381:
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1382
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1382
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1382
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1379
.L1382:
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1383
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1383
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1383
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1379
.L1383:
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1384
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1384
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1384
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1379
.L1384:
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1385
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1385
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1385
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1379
.L1385:
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1386
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1386
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1386
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1379
.L1386:
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1379:
	ldr	r3, .L2191+104
	ldr	r3, [r3]	@ float
	ldr	r2, .L2191+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1387
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1388
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1388
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1388
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1388:
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1389
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1389
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1389
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1389:
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1390
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1390
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1390
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1390:
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1387
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1387
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1387
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1387:
	ldr	r3, .L2191+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1391
	ldr	r3, .L2191+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1391
	ldr	r3, .L2191+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1391
	ldr	r3, .L2191+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1391
	ldr	r3, .L2191+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L2191+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L2191+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1391
	ldr	r3, .L2191+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2191+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1393
.L1391:
	ldr	r3, .L2191+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2191+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1393:
	ldr	r3, .L2191+60
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1395
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1395
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1395
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1395
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1395
	ldr	r3, .L2191+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2191+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1395
	ldr	r3, .L2191+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1395
	ldr	r3, .L2191+60
	ldr	r2, [r3]
	ldr	r3, .L2191+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1395
	ldr	r3, .L2191+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2191+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1397
.L1395:
	ldr	r3, .L2191+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1397
	ldr	r3, .L2191+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1397
	ldr	r3, .L2191+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1397
	ldr	r3, .L2191+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1397
	ldr	r3, .L2191+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1397
	ldr	r3, .L2191+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1397:
	ldr	r3, .L2191+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2191+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1398
	ldr	r3, .L2191+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2191+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1398
	ldr	r3, .L2191+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	b	.L2192
.L2193:
	.align	2
.L2191:
	.word	_x_p5_c
	.word	delta
	.word	p5_evt
	.word	p5_l3
	.word	p5_l2
	.word	p5_l0
	.word	p5_l1
	.word	_x_p5_l3
	.word	_x_p5_l2
	.word	_x_p5_l0
	.word	_x_p5_l1
	.word	proposed5
	.word	_x_proposed5
	.word	p5_c
	.word	max_prop
	.word	v1
	.word	proposed4
	.word	_x_proposed4
	.word	_x_v1
	.word	_x_p4_l3
	.word	_x_p4_l2
	.word	_x_p4_l0
	.word	_x_p4_l1
	.word	v2
	.word	_x_v2
	.word	p4_c
	.word	_x_p4_c
	.word	p4_l3
	.word	p4_l2
	.word	p4_l0
	.word	p4_l1
	.word	delta
	.word	p4_evt
	.word	_x_p3_l2
	.word	_x_p3_l0
	.word	_x_p3_l1
	.word	_x_p3_l3
.L2192:
	beq	.L1398
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1398
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1398
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1398
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1398
	ldr	r3, .L2191+72
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L1401
.L1398:
	ldr	r3, .L2191+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1401
	ldr	r3, .L2191+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1401
	ldr	r3, .L2191+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1401
	ldr	r3, .L2191+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1401
	ldr	r3, .L2191+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1401
	ldr	r3, .L2191+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1401:
	ldr	r3, .L2191+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2191+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1402
	ldr	r3, .L2191+60
	ldr	r2, [r3]
	ldr	r3, .L2191+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1402
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1403
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1403
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1403
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1404
.L1403:
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1402
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1402
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1402
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1402
.L1404:
	ldr	r3, .L2191+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L2191+104
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1405
.L1402:
	ldr	r3, .L2191+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1405
	ldr	r3, .L2191+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1405
	ldr	r3, .L2191+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1405
	ldr	r3, .L2191+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1405
	ldr	r3, .L2191+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1405
	ldr	r3, .L2191+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1405:
	ldr	r3, .L2191+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2191+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1406
	ldr	r3, .L2191+60
	ldr	r3, [r3]
	cmp	r3, #5
	bne	.L1408
.L1406:
	ldr	r3, .L2191+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1408
	ldr	r3, .L2191+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1408
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1408
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1408
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1408
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1408
	ldr	r3, .L2191+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1408
	ldr	r3, .L2191+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1408
	ldr	r3, .L2191+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1408
	ldr	r3, .L2191+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1408:
	ldr	r3, .L2191+60
	ldr	r3, [r3]
	cmp	r3, #5
	bne	.L1409
	ldr	r3, .L2191+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L2191+56
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1410
	mov	r3, #0
	mov	r4, r3
.L1410:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1409
	ldr	r3, .L2191+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2191+68
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1411
	mov	r3, #0
	mov	r4, r3
.L1411:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L1412
.L1409:
	ldr	r3, .L2191+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1412
	ldr	r3, .L2191+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1412
	ldr	r3, .L2191+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1412
	ldr	r3, .L2191+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1412
	ldr	r3, .L2191+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1412
	ldr	r3, .L2191+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1412
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1412
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1412
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1412
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1412:
	ldr	r3, .L2191+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2191+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1413
	ldr	r3, .L2191+60
	ldr	r2, [r3]
	ldr	r3, .L2191+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1413
	ldr	r3, .L2191+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2191+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1413
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1415
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1415
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1415
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1416
.L1415:
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1413
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1413
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1413
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1416
.L1413:
	ldr	r3, .L2191+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1416
	ldr	r3, .L2191+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1416
	ldr	r3, .L2191+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1416
	ldr	r3, .L2191+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1416
	ldr	r3, .L2191+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1416
	ldr	r3, .L2191+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1416:
	ldr	r3, .L2191+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1417
	ldr	r3, .L2191+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L2191+104
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1418
.L1417:
	ldr	r3, .L2191+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1418
	ldr	r3, .L2191+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1418
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1418
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1418
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1418
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1418
	ldr	r3, .L2191+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1418
	ldr	r3, .L2191+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1418
	ldr	r3, .L2191+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1418
	ldr	r3, .L2191+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1418:
	ldr	r3, .L2191+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1419
	ldr	r3, .L2191+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1420
.L1419:
	ldr	r3, .L2191+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1420
	ldr	r3, .L2191+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1420
	ldr	r3, .L2191+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1420
	ldr	r3, .L2191+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1420
	ldr	r3, .L2191+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1420
	ldr	r3, .L2191+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1420
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1420
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1420
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1420
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1420:
	ldr	r3, .L2191+60
	ldr	r2, [r3]
	ldr	r3, .L2191+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1421
	ldr	r3, .L2191+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2191+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1421
	ldr	r3, .L2191+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1421
	ldr	r3, .L2191+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1421
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1421
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1421
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1421
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1424
.L1421:
	ldr	r3, .L2191+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1424
	ldr	r3, .L2191+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1424
	ldr	r3, .L2191+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1424
	ldr	r3, .L2191+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1424
	ldr	r3, .L2191+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1424
	ldr	r3, .L2191+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1424:
	ldr	r3, .L2191+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2191+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1425
	ldr	r3, .L2191+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2191+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1425
	ldr	r3, .L2191+60
	ldr	r2, [r3]
	ldr	r3, .L2191+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1425
	ldr	r3, .L2191+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L2191+104
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1425
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1428
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1428
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1428
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1429
.L1428:
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1425
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1425
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1425
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1429
.L1425:
	ldr	r3, .L2191+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1429
	ldr	r3, .L2191+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1429
	ldr	r3, .L2191+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1429
	ldr	r3, .L2191+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1429
	ldr	r3, .L2191+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1429
	ldr	r3, .L2191+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1429:
	ldr	r3, .L2191+60
	ldr	r3, [r3]
	cmp	r3, #5
	bne	.L1430
	ldr	r3, .L2191+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1430
	ldr	r3, .L2191+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1430
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1430
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1430
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1430
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1430
	ldr	r3, .L2191+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1430
	ldr	r3, .L2191+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1430
	ldr	r3, .L2191+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1430
	ldr	r3, .L2191+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1430:
	ldr	r3, .L2191+60
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L1431
	ldr	r3, .L2191+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1431
	ldr	r3, .L2191+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1431
	ldr	r3, .L2191+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1431
	ldr	r3, .L2191+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1431
	ldr	r3, .L2191+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1431
	ldr	r3, .L2191+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1431
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1431
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1431
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1431
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1431:
	ldr	r3, .L2191+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2191+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1432
	ldr	r3, .L2191+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2191+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1432
	ldr	r3, .L2191+60
	ldr	r2, [r3]
	ldr	r3, .L2191+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1432
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1432
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1432
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1432
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1432
	ldr	r3, .L2191+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1434
.L1432:
	ldr	r3, .L2191+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1434
	ldr	r3, .L2191+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1434
	ldr	r3, .L2191+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1434
	ldr	r3, .L2191+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1434
	ldr	r3, .L2191+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1434
	ldr	r3, .L2191+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1434:
	ldr	r3, .L2191+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2191+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1435
	ldr	r3, .L2191+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1435
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1435
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1435
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1435
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1435
	ldr	r3, .L2191+60
	ldr	r2, [r3]
	ldr	r3, .L2191+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1435
	ldr	r3, .L2191+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1437
.L1435:
	ldr	r3, .L2191+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1437
	ldr	r3, .L2191+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1437
	ldr	r3, .L2191+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1437
	ldr	r3, .L2191+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1437
	ldr	r3, .L2191+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1437
	ldr	r3, .L2191+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1437:
	ldr	r3, .L2191+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2191+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1438
	ldr	r3, .L2191+72
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1438
	ldr	r3, .L2191+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1438
	ldr	r3, .L2191+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1438
	ldr	r3, .L2191+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1438
	ldr	r3, .L2191+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1438
	ldr	r3, .L2191+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2191+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1438
	ldr	r3, .L2191+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L2191+104
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1440
.L1438:
	ldr	r3, .L2191+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1440
	ldr	r3, .L2191+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1440
	ldr	r3, .L2191+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1440
	ldr	r3, .L2191+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1440
	ldr	r3, .L2191+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1440
	ldr	r3, .L2191+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1440:
	ldr	r3, .L2191+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1441
	ldr	r3, .L2191+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1441
	ldr	r3, .L2191+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1441
	ldr	r3, .L2191+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1442
.L1441:
	ldr	r3, .L2191+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1443
	ldr	r3, .L2194
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1443
	ldr	r3, .L2194+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1443
	ldr	r3, .L2194+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1442
.L1443:
	ldr	r3, .L2194+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1444
	ldr	r3, .L2194
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1444
	ldr	r3, .L2194+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1444
	ldr	r3, .L2194+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1442
.L1444:
	ldr	r3, .L2194+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1445
	ldr	r3, .L2194
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1445
	ldr	r3, .L2194+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1445
	ldr	r3, .L2194+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1442
.L1445:
	ldr	r3, .L2194+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1446
	ldr	r3, .L2194
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1446
	ldr	r3, .L2194+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1446
	ldr	r3, .L2194+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1442
.L1446:
	ldr	r3, .L2194+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1447
	ldr	r3, .L2194
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1447
	ldr	r3, .L2194+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1447
	ldr	r3, .L2194+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1442
.L1447:
	ldr	r3, .L2194+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1448
	ldr	r3, .L2194
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1448
	ldr	r3, .L2194+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1448
	ldr	r3, .L2194+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1442
.L1448:
	ldr	r3, .L2194+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1449
	ldr	r3, .L2194
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1449
	ldr	r3, .L2194+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1449
	ldr	r3, .L2194+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1442
.L1449:
	ldr	r3, .L2194+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2194
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2194+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2194+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1442:
	ldr	r3, .L2194+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L2194+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1450
	ldr	r3, .L2194+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1451
	ldr	r3, .L2194
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1451
	ldr	r3, .L2194+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1451
	ldr	r3, .L2194+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1451:
	ldr	r3, .L2194+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1452
	ldr	r3, .L2194
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1452
	ldr	r3, .L2194+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1452
	ldr	r3, .L2194+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1452:
	ldr	r3, .L2194+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1453
	ldr	r3, .L2194
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1453
	ldr	r3, .L2194+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1453
	ldr	r3, .L2194+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1453:
	ldr	r3, .L2194+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1450
	ldr	r3, .L2194
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1450
	ldr	r3, .L2194+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1450
	ldr	r3, .L2194+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1450:
	ldr	r3, .L2194+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2194+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1454
	ldr	r3, .L2194+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2194+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1454
	ldr	r3, .L2194+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2194
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1454
	ldr	r3, .L2194+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2194+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1454
	ldr	r3, .L2194+136
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L2194+44
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L2194+48
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1454
	ldr	r3, .L2194+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2194+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1456
.L1454:
	ldr	r3, .L2194+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2194+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1456:
	ldr	r3, .L2194+88
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1458
	ldr	r3, .L2194+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1458
	ldr	r3, .L2194
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1458
	ldr	r3, .L2194+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1458
	ldr	r3, .L2194+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1458
	ldr	r3, .L2194+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2194+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1458
	ldr	r3, .L2194+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1458
	ldr	r3, .L2194+88
	ldr	r2, [r3]
	ldr	r3, .L2194+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1458
	ldr	r3, .L2194+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2194+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1460
.L1458:
	ldr	r3, .L2194+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1460
	ldr	r3, .L2194+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1460
	ldr	r3, .L2194+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1460
	ldr	r3, .L2194+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1460
	ldr	r3, .L2194+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1460
	ldr	r3, .L2194+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1460:
	ldr	r3, .L2194+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2194+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1461
	ldr	r3, .L2194+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2194+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1461
	ldr	r3, .L2194+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1461
	ldr	r3, .L2194+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1461
	ldr	r3, .L2194
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1461
	ldr	r3, .L2194+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1461
	ldr	r3, .L2194+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1461
	ldr	r3, .L2194+92
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L1464
.L1461:
	ldr	r3, .L2194+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1464
	ldr	r3, .L2194+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1464
	ldr	r3, .L2194+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1464
	ldr	r3, .L2194+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1464
	ldr	r3, .L2194+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1464
	ldr	r3, .L2194+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1464:
	ldr	r3, .L2194+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2194+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1465
	ldr	r3, .L2194+88
	ldr	r2, [r3]
	ldr	r3, .L2194+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1465
	ldr	r3, .L2194+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1466
	ldr	r3, .L2194
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1466
	ldr	r3, .L2194+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1466
	ldr	r3, .L2194+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1467
.L1466:
	ldr	r3, .L2194+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1465
	ldr	r3, .L2194
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1465
	ldr	r3, .L2194+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1465
	ldr	r3, .L2194+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1465
.L1467:
	ldr	r3, .L2194+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2194+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1468
.L1465:
	ldr	r3, .L2194+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1468
	ldr	r3, .L2194+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1468
	ldr	r3, .L2194+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1468
	ldr	r3, .L2194+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1468
	ldr	r3, .L2194+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1468
	ldr	r3, .L2194+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1468:
	ldr	r3, .L2194+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2194+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1469
	ldr	r3, .L2194+88
	ldr	r3, [r3]
	cmp	r3, #4
	bne	.L1471
.L1469:
	ldr	r3, .L2194+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1471
	ldr	r3, .L2194+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1471
	ldr	r3, .L2194+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1471
	ldr	r3, .L2194
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1471
	ldr	r3, .L2194+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1471
	ldr	r3, .L2194+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1471
	ldr	r3, .L2194+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1471
	ldr	r3, .L2194+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1471
	ldr	r3, .L2194+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1471
	ldr	r3, .L2194+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1471:
	ldr	r3, .L2194+88
	ldr	r3, [r3]
	cmp	r3, #4
	bne	.L1472
	ldr	r3, .L2194+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2194+16
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1473
	mov	r3, #0
	mov	r4, r3
.L1473:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1472
	ldr	r3, .L2194+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2194+24
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1474
	mov	r3, #0
	mov	r4, r3
.L1474:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L1475
.L1472:
	ldr	r3, .L2194+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1475
	ldr	r3, .L2194+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1475
	ldr	r3, .L2194+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1475
	ldr	r3, .L2194+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1475
	ldr	r3, .L2194+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1475
	ldr	r3, .L2194+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1475
	ldr	r3, .L2194+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1475
	ldr	r3, .L2194
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1475
	ldr	r3, .L2194+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1475
	ldr	r3, .L2194+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1475:
	ldr	r3, .L2194+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2194+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1476
	ldr	r3, .L2194+88
	ldr	r2, [r3]
	ldr	r3, .L2194+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1476
	ldr	r3, .L2194+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2194+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1476
	ldr	r3, .L2194+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1478
	ldr	r3, .L2194
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1478
	ldr	r3, .L2194+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1478
	ldr	r3, .L2194+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1479
.L1478:
	ldr	r3, .L2194+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1476
	ldr	r3, .L2194
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1476
	ldr	r3, .L2194+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1476
	ldr	r3, .L2194+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1479
.L1476:
	ldr	r3, .L2194+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1479
	ldr	r3, .L2194+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1479
	ldr	r3, .L2194+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1479
	ldr	r3, .L2194+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1479
	ldr	r3, .L2194+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1479
	ldr	r3, .L2194+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1479:
	ldr	r3, .L2194+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1480
	ldr	r3, .L2194+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2194+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1481
.L1480:
	ldr	r3, .L2194+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1481
	ldr	r3, .L2194+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1481
	ldr	r3, .L2194+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1481
	ldr	r3, .L2194
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1481
	ldr	r3, .L2194+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1481
	ldr	r3, .L2194+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1481
	ldr	r3, .L2194+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1481
	ldr	r3, .L2194+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1481
	ldr	r3, .L2194+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1481
	ldr	r3, .L2194+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1481:
	ldr	r3, .L2194+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1482
	ldr	r3, .L2194+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1483
.L1482:
	ldr	r3, .L2194+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1483
	ldr	r3, .L2194+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1483
	ldr	r3, .L2194+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1483
	ldr	r3, .L2194+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1483
	ldr	r3, .L2194+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1483
	ldr	r3, .L2194+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1483
	ldr	r3, .L2194+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1483
	ldr	r3, .L2194
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1483
	ldr	r3, .L2194+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1483
	ldr	r3, .L2194+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1483:
	ldr	r3, .L2194+88
	ldr	r2, [r3]
	ldr	r3, .L2194+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1484
	ldr	r3, .L2194+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2194+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1484
	ldr	r3, .L2194+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1484
	ldr	r3, .L2194+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1484
	ldr	r3, .L2194+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1484
	ldr	r3, .L2194
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1484
	ldr	r3, .L2194+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1484
	ldr	r3, .L2194+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1487
.L1484:
	ldr	r3, .L2194+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1487
	ldr	r3, .L2194+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1487
	ldr	r3, .L2194+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1487
	ldr	r3, .L2194+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1487
	ldr	r3, .L2194+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1487
	ldr	r3, .L2194+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1487:
	ldr	r3, .L2194+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2194+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1488
	ldr	r3, .L2194+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2194+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	b	.L2195
.L2196:
	.align	2
.L2194:
	.word	_x_p3_l2
	.word	_x_p3_l0
	.word	_x_p3_l1
	.word	_x_p3_l3
	.word	max_prop
	.word	proposed3
	.word	_x_proposed3
	.word	_x_p3_l3
	.word	_x_p3_l2
	.word	_x_p3_l0
	.word	_x_p3_l1
	.word	p3_c
	.word	_x_p3_c
	.word	p3_l3
	.word	p3_l2
	.word	p3_l0
	.word	p3_l1
	.word	p3_evt
	.word	proposed2
	.word	_x_proposed2
	.word	v2
	.word	_x_v2
	.word	v1
	.word	_x_v1
	.word	_x_p2_l3
	.word	_x_p2_l2
	.word	_x_p2_l0
	.word	_x_p2_l1
	.word	p2_c
	.word	_x_p2_c
	.word	p2_l3
	.word	p2_l2
	.word	p2_l1
	.word	p2_l0
	.word	delta
	.word	p2_evt
.L2195:
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1488
	ldr	r3, .L2194+88
	ldr	r2, [r3]
	ldr	r3, .L2194+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1488
	ldr	r3, .L2194+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2194+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1488
	ldr	r3, .L2194+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1491
	ldr	r3, .L2194+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1491
	ldr	r3, .L2194+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1491
	ldr	r3, .L2194+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1492
.L1491:
	ldr	r3, .L2194+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1488
	ldr	r3, .L2194+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1488
	ldr	r3, .L2194+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1488
	ldr	r3, .L2194+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1492
.L1488:
	ldr	r3, .L2194+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1492
	ldr	r3, .L2194+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1492
	ldr	r3, .L2194+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1492
	ldr	r3, .L2194+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1492
	ldr	r3, .L2194+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1492
	ldr	r3, .L2194+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1492:
	ldr	r3, .L2194+88
	ldr	r3, [r3]
	cmp	r3, #4
	bne	.L1493
	ldr	r3, .L2194+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1493
	ldr	r3, .L2194+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1493
	ldr	r3, .L2194+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1493
	ldr	r3, .L2194+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1493
	ldr	r3, .L2194+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1493
	ldr	r3, .L2194+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1493
	ldr	r3, .L2194+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1493
	ldr	r3, .L2194+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1493
	ldr	r3, .L2194+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1493
	ldr	r3, .L2194+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1493:
	ldr	r3, .L2194+88
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L1494
	ldr	r3, .L2194+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1494
	ldr	r3, .L2194+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1494
	ldr	r3, .L2194+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1494
	ldr	r3, .L2194+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1494
	ldr	r3, .L2194+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1494
	ldr	r3, .L2194+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1494
	ldr	r3, .L2194+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1494
	ldr	r3, .L2194+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1494
	ldr	r3, .L2194+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1494
	ldr	r3, .L2194+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1494:
	ldr	r3, .L2194+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2194+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1495
	ldr	r3, .L2194+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2194+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1495
	ldr	r3, .L2194+88
	ldr	r2, [r3]
	ldr	r3, .L2194+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1495
	ldr	r3, .L2194+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1495
	ldr	r3, .L2194+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1495
	ldr	r3, .L2194+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1495
	ldr	r3, .L2194+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1495
	ldr	r3, .L2194+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1497
.L1495:
	ldr	r3, .L2194+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1497
	ldr	r3, .L2194+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1497
	ldr	r3, .L2194+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1497
	ldr	r3, .L2194+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1497
	ldr	r3, .L2194+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1497
	ldr	r3, .L2194+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1497:
	ldr	r3, .L2194+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2194+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1498
	ldr	r3, .L2194+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1498
	ldr	r3, .L2194+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1498
	ldr	r3, .L2194+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1498
	ldr	r3, .L2194+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1498
	ldr	r3, .L2194+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1498
	ldr	r3, .L2194+88
	ldr	r2, [r3]
	ldr	r3, .L2194+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1498
	ldr	r3, .L2194+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1500
.L1498:
	ldr	r3, .L2194+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1500
	ldr	r3, .L2194+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1500
	ldr	r3, .L2194+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1500
	ldr	r3, .L2194+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1500
	ldr	r3, .L2194+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1500
	ldr	r3, .L2194+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1500:
	ldr	r3, .L2194+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L2194+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1501
	ldr	r3, .L2194+92
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1501
	ldr	r3, .L2194+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1501
	ldr	r3, .L2194+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1501
	ldr	r3, .L2194+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1501
	ldr	r3, .L2194+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1501
	ldr	r3, .L2194+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2194+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1501
	ldr	r3, .L2194+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2194+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1503
.L1501:
	ldr	r3, .L2194+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1503
	ldr	r3, .L2194+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1503
	ldr	r3, .L2194+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1503
	ldr	r3, .L2194+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1503
	ldr	r3, .L2194+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1503
	ldr	r3, .L2194+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1503:
	ldr	r3, .L2194+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1504
	ldr	r3, .L2194+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1504
	ldr	r3, .L2194+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1504
	ldr	r3, .L2194+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1505
.L1504:
	ldr	r3, .L2194+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1506
	ldr	r3, .L2194+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1506
	ldr	r3, .L2194+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1506
	ldr	r3, .L2194+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1505
.L1506:
	ldr	r3, .L2194+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1507
	ldr	r3, .L2194+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1507
	ldr	r3, .L2194+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1507
	ldr	r3, .L2194+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1505
.L1507:
	ldr	r3, .L2194+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1508
	ldr	r3, .L2194+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1508
	ldr	r3, .L2194+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1508
	ldr	r3, .L2194+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1505
.L1508:
	ldr	r3, .L2194+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1509
	ldr	r3, .L2194+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1509
	ldr	r3, .L2194+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1509
	ldr	r3, .L2194+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1505
.L1509:
	ldr	r3, .L2194+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1510
	ldr	r3, .L2194+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1510
	ldr	r3, .L2194+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1510
	ldr	r3, .L2194+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1505
.L1510:
	ldr	r3, .L2194+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1511
	ldr	r3, .L2194+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1511
	ldr	r3, .L2194+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1511
	ldr	r3, .L2194+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1505
.L1511:
	ldr	r3, .L2194+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1512
	ldr	r3, .L2194+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1512
	ldr	r3, .L2194+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1512
	ldr	r3, .L2194+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1505
.L1512:
	ldr	r3, .L2194+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2194+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2194+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2194+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1505:
	ldr	r3, .L2194+116
	ldr	r3, [r3]	@ float
	ldr	r2, .L2194+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1513
	ldr	r3, .L2194+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1514
	ldr	r3, .L2194+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1514
	ldr	r3, .L2194+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1514
	ldr	r3, .L2194+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1514:
	ldr	r3, .L2194+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1515
	ldr	r3, .L2194+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1515
	ldr	r3, .L2194+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1515
	ldr	r3, .L2194+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1515:
	ldr	r3, .L2194+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1516
	ldr	r3, .L2194+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1516
	ldr	r3, .L2194+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1516
	ldr	r3, .L2194+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1516:
	ldr	r3, .L2194+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1513
	ldr	r3, .L2194+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1513
	ldr	r3, .L2194+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1513
	ldr	r3, .L2194+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1513:
	ldr	r3, .L2194+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2194+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1517
	ldr	r3, .L2194+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2194+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1517
	ldr	r3, .L2194+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2194+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1517
	ldr	r3, .L2194+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2194+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1517
	ldr	r3, .L2194+136
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L2194+112
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L2194+116
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1517
	ldr	r3, .L2194+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L2194+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1519
.L1517:
	ldr	r3, .L2194+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2194+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1519:
	ldr	r3, .L2194+88
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1521
	ldr	r3, .L2194+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1521
	ldr	r3, .L2194+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1521
	ldr	r3, .L2194+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1521
	ldr	r3, .L2194+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1521
	ldr	r3, .L2194+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2194+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1521
	ldr	r3, .L2194+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1521
	ldr	r3, .L2194+88
	ldr	r2, [r3]
	ldr	r3, .L2194+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1521
	ldr	r3, .L2194+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L2194+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1523
.L1521:
	ldr	r3, .L2194+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1523
	ldr	r3, .L2194+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1523
	ldr	r3, .L2194+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1523
	ldr	r3, .L2194+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1523
	ldr	r3, .L2194+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1523
	ldr	r3, .L2194+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1523:
	ldr	r3, .L2194+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L2194+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1524
	ldr	r3, .L2194+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2194+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1524
	ldr	r3, .L2194+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1524
	ldr	r3, .L2194+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1524
	ldr	r3, .L2194+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1524
	ldr	r3, .L2194+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1524
	ldr	r3, .L2194+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1524
	ldr	r3, .L2194+92
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L1527
.L1524:
	ldr	r3, .L2194+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1527
	ldr	r3, .L2194+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1527
	ldr	r3, .L2194+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1527
	ldr	r3, .L2194+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1527
	ldr	r3, .L2194+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1527
	ldr	r3, .L2194+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1527:
	ldr	r3, .L2194+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2194+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1528
	ldr	r3, .L2194+88
	ldr	r2, [r3]
	ldr	r3, .L2194+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1528
	ldr	r3, .L2194+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1529
	ldr	r3, .L2194+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1529
	ldr	r3, .L2194+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1529
	ldr	r3, .L2194+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1530
.L1529:
	ldr	r3, .L2194+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1528
	ldr	r3, .L2194+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1528
	ldr	r3, .L2194+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1528
	ldr	r3, .L2194+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1528
.L1530:
	ldr	r3, .L2194+112
	ldr	r3, [r3]	@ float
	ldr	r2, .L2194+116
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1531
.L1528:
	ldr	r3, .L2194+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1531
	ldr	r3, .L2194+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1531
	ldr	r3, .L2194+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1531
	ldr	r3, .L2194+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1531
	ldr	r3, .L2194+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1531
	ldr	r3, .L2194+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1531:
	ldr	r3, .L2197
	ldr	r3, [r3]	@ float
	ldr	r2, .L2197+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1532
	ldr	r3, .L2197+8
	ldr	r3, [r3]
	cmp	r3, #3
	bne	.L1534
.L1532:
	ldr	r3, .L2197+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1534
	ldr	r3, .L2197+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1534
	ldr	r3, .L2197+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1534
	ldr	r3, .L2197+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1534
	ldr	r3, .L2197+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1534
	ldr	r3, .L2197+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1534
	ldr	r3, .L2197+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1534
	ldr	r3, .L2197+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1534
	ldr	r3, .L2197+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1534
	ldr	r3, .L2197+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1534:
	ldr	r3, .L2197+8
	ldr	r3, [r3]
	cmp	r3, #3
	bne	.L1535
	ldr	r3, .L2197+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L2197+60
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1536
	mov	r3, #0
	mov	r4, r3
.L1536:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1535
	ldr	r3, .L2197
	ldr	r3, [r3]	@ float
	ldr	r2, .L2197+4
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1537
	mov	r3, #0
	mov	r4, r3
.L1537:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L1538
.L1535:
	ldr	r3, .L2197+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1538
	ldr	r3, .L2197+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1538
	ldr	r3, .L2197+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1538
	ldr	r3, .L2197+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1538
	ldr	r3, .L2197+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1538
	ldr	r3, .L2197+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1538
	ldr	r3, .L2197+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1538
	ldr	r3, .L2197+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1538
	ldr	r3, .L2197+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1538
	ldr	r3, .L2197+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1538:
	ldr	r3, .L2197+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2197+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1539
	ldr	r3, .L2197+8
	ldr	r2, [r3]
	ldr	r3, .L2197+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1539
	ldr	r3, .L2197
	ldr	r3, [r3]	@ float
	ldr	r2, .L2197+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1539
	ldr	r3, .L2197+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1541
	ldr	r3, .L2197+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1541
	ldr	r3, .L2197+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1541
	ldr	r3, .L2197+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1542
.L1541:
	ldr	r3, .L2197+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1539
	ldr	r3, .L2197+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1539
	ldr	r3, .L2197+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1539
	ldr	r3, .L2197+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1542
.L1539:
	ldr	r3, .L2197+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1542
	ldr	r3, .L2197+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1542
	ldr	r3, .L2197+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1542
	ldr	r3, .L2197+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1542
	ldr	r3, .L2197+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1542
	ldr	r3, .L2197+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1542:
	ldr	r3, .L2197+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1543
	ldr	r3, .L2197+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L2197+56
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1544
.L1543:
	ldr	r3, .L2197+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1544
	ldr	r3, .L2197+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1544
	ldr	r3, .L2197+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1544
	ldr	r3, .L2197+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1544
	ldr	r3, .L2197+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1544
	ldr	r3, .L2197+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1544
	ldr	r3, .L2197+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1544
	ldr	r3, .L2197+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1544
	ldr	r3, .L2197+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1544
	ldr	r3, .L2197+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1544:
	ldr	r3, .L2197+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1545
	ldr	r3, .L2197+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1546
.L1545:
	ldr	r3, .L2197+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1546
	ldr	r3, .L2197+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1546
	ldr	r3, .L2197+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1546
	ldr	r3, .L2197+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1546
	ldr	r3, .L2197+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1546
	ldr	r3, .L2197+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1546
	ldr	r3, .L2197+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1546
	ldr	r3, .L2197+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1546
	ldr	r3, .L2197+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1546
	ldr	r3, .L2197+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1546:
	ldr	r3, .L2197+8
	ldr	r2, [r3]
	ldr	r3, .L2197+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1547
	ldr	r3, .L2197
	ldr	r3, [r3]	@ float
	ldr	r2, .L2197+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1547
	ldr	r3, .L2197+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1547
	ldr	r3, .L2197+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1547
	ldr	r3, .L2197+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1547
	ldr	r3, .L2197+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1547
	ldr	r3, .L2197+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1547
	ldr	r3, .L2197+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1550
.L1547:
	ldr	r3, .L2197+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1550
	ldr	r3, .L2197+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1550
	ldr	r3, .L2197+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1550
	ldr	r3, .L2197+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1550
	ldr	r3, .L2197+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1550
	ldr	r3, .L2197+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1550:
	ldr	r3, .L2197
	ldr	r3, [r3]	@ float
	ldr	r2, .L2197+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1551
	ldr	r3, .L2197+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2197+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1551
	ldr	r3, .L2197+8
	ldr	r2, [r3]
	ldr	r3, .L2197+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1551
	ldr	r3, .L2197+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L2197+56
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1551
	ldr	r3, .L2197+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1554
	ldr	r3, .L2197+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1554
	ldr	r3, .L2197+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1554
	ldr	r3, .L2197+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1555
.L1554:
	ldr	r3, .L2197+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1551
	ldr	r3, .L2197+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1551
	ldr	r3, .L2197+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1551
	ldr	r3, .L2197+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1555
.L1551:
	ldr	r3, .L2197+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1555
	ldr	r3, .L2197+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1555
	ldr	r3, .L2197+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1555
	ldr	r3, .L2197+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1555
	ldr	r3, .L2197+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1555
	ldr	r3, .L2197+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1555:
	ldr	r3, .L2197+8
	ldr	r3, [r3]
	cmp	r3, #3
	bne	.L1556
	ldr	r3, .L2197+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1556
	ldr	r3, .L2197+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1556
	ldr	r3, .L2197+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1556
	ldr	r3, .L2197+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1556
	ldr	r3, .L2197+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1556
	ldr	r3, .L2197+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1556
	ldr	r3, .L2197+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1556
	ldr	r3, .L2197+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1556
	ldr	r3, .L2197+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1556
	ldr	r3, .L2197+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1556:
	ldr	r3, .L2197+8
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L1557
	ldr	r3, .L2197+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1557
	ldr	r3, .L2197+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1557
	ldr	r3, .L2197+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1557
	ldr	r3, .L2197+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1557
	ldr	r3, .L2197+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1557
	ldr	r3, .L2197+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1557
	ldr	r3, .L2197+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1557
	ldr	r3, .L2197+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1557
	ldr	r3, .L2197+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1557
	ldr	r3, .L2197+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1557:
	ldr	r3, .L2197
	ldr	r3, [r3]	@ float
	ldr	r2, .L2197+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1558
	ldr	r3, .L2197+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2197+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1558
	ldr	r3, .L2197+8
	ldr	r2, [r3]
	ldr	r3, .L2197+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1558
	ldr	r3, .L2197+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1558
	ldr	r3, .L2197+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1558
	ldr	r3, .L2197+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1558
	ldr	r3, .L2197+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1558
	ldr	r3, .L2197+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1560
.L1558:
	ldr	r3, .L2197+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1560
	ldr	r3, .L2197+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1560
	ldr	r3, .L2197+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1560
	ldr	r3, .L2197+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1560
	ldr	r3, .L2197+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1560
	ldr	r3, .L2197+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1560:
	ldr	r3, .L2197
	ldr	r3, [r3]	@ float
	ldr	r2, .L2197+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1561
	ldr	r3, .L2197+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1561
	ldr	r3, .L2197+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1561
	ldr	r3, .L2197+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1561
	ldr	r3, .L2197+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1561
	ldr	r3, .L2197+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1561
	ldr	r3, .L2197+8
	ldr	r2, [r3]
	ldr	r3, .L2197+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1561
	ldr	r3, .L2197+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1563
.L1561:
	ldr	r3, .L2197+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1563
	ldr	r3, .L2197+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1563
	ldr	r3, .L2197+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1563
	ldr	r3, .L2197+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1563
	ldr	r3, .L2197+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1563
	ldr	r3, .L2197+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1563:
	ldr	r3, .L2197
	ldr	r3, [r3]	@ float
	ldr	r2, .L2197+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1564
	ldr	r3, .L2197+80
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1564
	ldr	r3, .L2197+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1564
	ldr	r3, .L2197+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1564
	ldr	r3, .L2197+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1564
	ldr	r3, .L2197+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1564
	ldr	r3, .L2197+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2197+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1564
	ldr	r3, .L2197+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L2197+56
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1566
.L1564:
	ldr	r3, .L2197+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1566
	ldr	r3, .L2197+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1566
	ldr	r3, .L2197+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1566
	ldr	r3, .L2197+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1566
	ldr	r3, .L2197+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1566
	ldr	r3, .L2197+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1566:
	ldr	r3, .L2197+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1567
	ldr	r3, .L2197+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1567
	ldr	r3, .L2197+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1567
	ldr	r3, .L2197+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1568
.L1567:
	ldr	r3, .L2197+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1569
	ldr	r3, .L2197+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1569
	ldr	r3, .L2197+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1569
	ldr	r3, .L2197+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1568
.L1569:
	ldr	r3, .L2197+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1570
	ldr	r3, .L2197+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1570
	ldr	r3, .L2197+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1570
	ldr	r3, .L2197+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1568
.L1570:
	ldr	r3, .L2197+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1571
	ldr	r3, .L2197+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1571
	ldr	r3, .L2197+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1571
	ldr	r3, .L2197+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1568
.L1571:
	ldr	r3, .L2197+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1572
	ldr	r3, .L2197+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1572
	ldr	r3, .L2197+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1572
	ldr	r3, .L2197+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1568
.L1572:
	ldr	r3, .L2197+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1573
	ldr	r3, .L2197+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1573
	ldr	r3, .L2197+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1573
	ldr	r3, .L2197+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1568
.L1573:
	ldr	r3, .L2197+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1574
	ldr	r3, .L2197+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1574
	ldr	r3, .L2197+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1574
	ldr	r3, .L2197+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1568
.L1574:
	ldr	r3, .L2197+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1575
	ldr	r3, .L2197+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1575
	ldr	r3, .L2197+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1575
	ldr	r3, .L2197+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1568
.L1575:
	ldr	r3, .L2197+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2197+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2197+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2197+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1568:
	ldr	r3, .L2197+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L2197+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1576
	ldr	r3, .L2197+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1577
	ldr	r3, .L2197+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1577
	b	.L2198
.L2199:
	.align	2
.L2197:
	.word	proposed2
	.word	_x_proposed2
	.word	v1
	.word	delta
	.word	p2_evt
	.word	_x_p2_l3
	.word	_x_p2_l2
	.word	_x_p2_l0
	.word	_x_p2_l1
	.word	p2_l3
	.word	p2_l2
	.word	p2_l1
	.word	p2_l0
	.word	p2_c
	.word	_x_p2_c
	.word	max_prop
	.word	proposed1
	.word	_x_proposed1
	.word	v2
	.word	_x_v2
	.word	_x_v1
	.word	p1_c
	.word	_x_p1_c
	.word	p1_evt
	.word	_x_p1_l3
	.word	_x_p1_l2
	.word	_x_p1_l0
	.word	_x_p1_l1
	.word	p1_l3
	.word	p1_l2
	.word	p1_l0
	.word	p1_l1
	.word	v1
	.word	delta
.L2198:
	ldr	r3, .L2197+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1577
	ldr	r3, .L2197+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1577:
	ldr	r3, .L2197+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1578
	ldr	r3, .L2197+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1578
	ldr	r3, .L2197+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1578
	ldr	r3, .L2197+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1578:
	ldr	r3, .L2197+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1579
	ldr	r3, .L2197+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1579
	ldr	r3, .L2197+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1579
	ldr	r3, .L2197+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1579:
	ldr	r3, .L2197+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1576
	ldr	r3, .L2197+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1576
	ldr	r3, .L2197+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1576
	ldr	r3, .L2197+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1576:
	ldr	r3, .L2197+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2197+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1580
	ldr	r3, .L2197+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2197+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1580
	ldr	r3, .L2197+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2197+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1580
	ldr	r3, .L2197+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2197+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1580
	ldr	r3, .L2197+132
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L2197+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L2197+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1580
	ldr	r3, .L2197+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2197+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1582
.L1580:
	ldr	r3, .L2197+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2197+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1582:
	ldr	r3, .L2197+128
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1584
	ldr	r3, .L2197+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1584
	ldr	r3, .L2197+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1584
	ldr	r3, .L2197+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1584
	ldr	r3, .L2197+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1584
	ldr	r3, .L2197+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2197+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1584
	ldr	r3, .L2197+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1584
	ldr	r3, .L2197+128
	ldr	r2, [r3]
	ldr	r3, .L2197+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1584
	ldr	r3, .L2197+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2197+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1586
.L1584:
	ldr	r3, .L2197+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1586
	ldr	r3, .L2197+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1586
	ldr	r3, .L2197+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1586
	ldr	r3, .L2197+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1586
	ldr	r3, .L2197+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1586
	ldr	r3, .L2197+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1586:
	ldr	r3, .L2197+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2197+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1587
	ldr	r3, .L2197+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2197+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1587
	ldr	r3, .L2197+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1587
	ldr	r3, .L2197+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1587
	ldr	r3, .L2197+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1587
	ldr	r3, .L2197+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1587
	ldr	r3, .L2197+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1587
	ldr	r3, .L2197+80
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L1590
.L1587:
	ldr	r3, .L2197+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1590
	ldr	r3, .L2197+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1590
	ldr	r3, .L2197+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1590
	ldr	r3, .L2197+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1590
	ldr	r3, .L2197+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1590
	ldr	r3, .L2197+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1590:
	ldr	r3, .L2197+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2197+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1591
	ldr	r3, .L2197+128
	ldr	r2, [r3]
	ldr	r3, .L2197+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1591
	ldr	r3, .L2197+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1592
	ldr	r3, .L2197+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1592
	ldr	r3, .L2197+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1592
	ldr	r3, .L2197+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1593
.L1592:
	ldr	r3, .L2197+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1591
	ldr	r3, .L2197+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1591
	ldr	r3, .L2197+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1591
	ldr	r3, .L2197+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1591
.L1593:
	ldr	r3, .L2197+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L2197+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1594
.L1591:
	ldr	r3, .L2197+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1594
	ldr	r3, .L2197+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1594
	ldr	r3, .L2197+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1594
	ldr	r3, .L2197+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1594
	ldr	r3, .L2197+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1594
	ldr	r3, .L2197+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1594:
	ldr	r3, .L2197+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2197+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1595
	ldr	r3, .L2197+128
	ldr	r3, [r3]
	cmp	r3, #2
	bne	.L1597
.L1595:
	ldr	r3, .L2197+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1597
	ldr	r3, .L2197+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1597
	ldr	r3, .L2197+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1597
	ldr	r3, .L2197+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1597
	ldr	r3, .L2197+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1597
	ldr	r3, .L2197+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1597
	ldr	r3, .L2197+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1597
	ldr	r3, .L2197+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1597
	ldr	r3, .L2197+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1597
	ldr	r3, .L2197+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1597:
	ldr	r3, .L2197+128
	ldr	r3, [r3]
	cmp	r3, #2
	bne	.L1598
	ldr	r3, .L2197+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L2197+60
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1599
	mov	r3, #0
	mov	r4, r3
.L1599:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1598
	ldr	r3, .L2197+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2197+68
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1600
	mov	r3, #0
	mov	r4, r3
.L1600:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L1601
.L1598:
	ldr	r3, .L2197+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1601
	ldr	r3, .L2197+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1601
	ldr	r3, .L2197+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1601
	ldr	r3, .L2197+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1601
	ldr	r3, .L2197+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1601
	ldr	r3, .L2197+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1601
	ldr	r3, .L2197+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1601
	ldr	r3, .L2197+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1601
	ldr	r3, .L2197+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1601
	ldr	r3, .L2197+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1601:
	ldr	r3, .L2197+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2197+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1602
	ldr	r3, .L2197+128
	ldr	r2, [r3]
	ldr	r3, .L2197+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1602
	ldr	r3, .L2197+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2197+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1602
	ldr	r3, .L2197+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1604
	ldr	r3, .L2197+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1604
	ldr	r3, .L2197+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1604
	ldr	r3, .L2197+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1605
.L1604:
	ldr	r3, .L2197+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1602
	ldr	r3, .L2197+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1602
	ldr	r3, .L2197+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1602
	ldr	r3, .L2197+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1605
.L1602:
	ldr	r3, .L2197+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1605
	ldr	r3, .L2197+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1605
	ldr	r3, .L2197+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1605
	ldr	r3, .L2197+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1605
	ldr	r3, .L2197+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1605
	ldr	r3, .L2197+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1605:
	ldr	r3, .L2197+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1606
	ldr	r3, .L2197+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L2197+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1607
.L1606:
	ldr	r3, .L2197+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1607
	ldr	r3, .L2197+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1607
	ldr	r3, .L2197+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1607
	ldr	r3, .L2197+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1607
	ldr	r3, .L2197+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1607
	ldr	r3, .L2197+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1607
	ldr	r3, .L2197+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1607
	ldr	r3, .L2197+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1607
	ldr	r3, .L2197+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1607
	ldr	r3, .L2197+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1607:
	ldr	r3, .L2197+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1608
	ldr	r3, .L2197+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1609
.L1608:
	ldr	r3, .L2197+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1609
	ldr	r3, .L2197+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1609
	ldr	r3, .L2197+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1609
	ldr	r3, .L2197+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1609
	ldr	r3, .L2197+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1609
	ldr	r3, .L2197+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1609
	ldr	r3, .L2197+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1609
	ldr	r3, .L2197+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1609
	ldr	r3, .L2197+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1609
	ldr	r3, .L2197+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1609:
	ldr	r3, .L2197+128
	ldr	r2, [r3]
	ldr	r3, .L2197+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1610
	ldr	r3, .L2197+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2197+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1610
	ldr	r3, .L2197+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1610
	ldr	r3, .L2197+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1610
	ldr	r3, .L2197+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1610
	ldr	r3, .L2197+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1610
	ldr	r3, .L2197+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1610
	ldr	r3, .L2197+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1613
.L1610:
	ldr	r3, .L2197+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1613
	ldr	r3, .L2197+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1613
	ldr	r3, .L2197+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1613
	ldr	r3, .L2197+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1613
	ldr	r3, .L2197+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1613
	ldr	r3, .L2197+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1613:
	ldr	r3, .L2197+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L2197+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1614
	ldr	r3, .L2197+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2197+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1614
	ldr	r3, .L2197+128
	ldr	r2, [r3]
	ldr	r3, .L2197+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1614
	ldr	r3, .L2197+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L2197+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1614
	ldr	r3, .L2197+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1617
	ldr	r3, .L2197+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1617
	ldr	r3, .L2197+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1617
	ldr	r3, .L2197+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1618
.L1617:
	ldr	r3, .L2197+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1614
	ldr	r3, .L2197+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1614
	ldr	r3, .L2197+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1614
	ldr	r3, .L2197+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1618
.L1614:
	ldr	r3, .L2197+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1618
	ldr	r3, .L2197+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1618
	ldr	r3, .L2197+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1618
	ldr	r3, .L2197+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1618
	ldr	r3, .L2197+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1618
	ldr	r3, .L2197+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1618:
	ldr	r3, .L2197+128
	ldr	r3, [r3]
	cmp	r3, #2
	bne	.L1619
	ldr	r3, .L2197+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1619
	ldr	r3, .L2197+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1619
	ldr	r3, .L2197+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1619
	ldr	r3, .L2197+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1619
	ldr	r3, .L2197+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1619
	ldr	r3, .L2197+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1619
	ldr	r3, .L2197+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1619
	ldr	r3, .L2197+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1619
	ldr	r3, .L2197+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1619
	ldr	r3, .L2197+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1619:
	ldr	r3, .L2197+128
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L1620
	ldr	r3, .L2197+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1620
	ldr	r3, .L2200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1620
	ldr	r3, .L2200+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1620
	ldr	r3, .L2200+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1620
	ldr	r3, .L2200+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1620
	ldr	r3, .L2200+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1620
	ldr	r3, .L2200+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1620
	ldr	r3, .L2200+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1620
	ldr	r3, .L2200+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1620
	ldr	r3, .L2200+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1620:
	ldr	r3, .L2200+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L2200+128
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1621
	ldr	r3, .L2200+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2200+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1621
	ldr	r3, .L2200+52
	ldr	r2, [r3]
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1621
	ldr	r3, .L2200+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1621
	ldr	r3, .L2200+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1621
	ldr	r3, .L2200+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1621
	ldr	r3, .L2200+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1621
	ldr	r3, .L2200+40
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1623
.L1621:
	ldr	r3, .L2200+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1623
	ldr	r3, .L2200+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1623
	ldr	r3, .L2200+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1623
	ldr	r3, .L2200+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1623
	ldr	r3, .L2200+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1623
	ldr	r3, .L2200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1623:
	ldr	r3, .L2200+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L2200+128
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1624
	ldr	r3, .L2200+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1624
	ldr	r3, .L2200+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1624
	ldr	r3, .L2200+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1624
	ldr	r3, .L2200+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1624
	ldr	r3, .L2200+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1624
	ldr	r3, .L2200+52
	ldr	r2, [r3]
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1624
	ldr	r3, .L2200+40
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1626
.L1624:
	ldr	r3, .L2200+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1626
	ldr	r3, .L2200+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1626
	ldr	r3, .L2200+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1626
	ldr	r3, .L2200+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1626
	ldr	r3, .L2200+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1626
	ldr	r3, .L2200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1626:
	ldr	r3, .L2200+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L2200+128
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1627
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1627
	ldr	r3, .L2200+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1627
	ldr	r3, .L2200+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1627
	ldr	r3, .L2200+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1627
	ldr	r3, .L2200+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1627
	ldr	r3, .L2200+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2200+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1627
	ldr	r3, .L2200+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L2200+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1629
.L1627:
	ldr	r3, .L2200+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1629
	ldr	r3, .L2200+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1629
	ldr	r3, .L2200+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1629
	ldr	r3, .L2200+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1629
	ldr	r3, .L2200+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1629
	ldr	r3, .L2200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1629:
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1630
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1630
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1630
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1631
.L1630:
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1632
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1632
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1632
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1631
.L1632:
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1633
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1633
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1633
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1631
.L1633:
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1634
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1634
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1634
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1631
.L1634:
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1635
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1635
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1635
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1631
.L1635:
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1636
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1636
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1636
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1631
.L1636:
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1637
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1637
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1637
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1631
.L1637:
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1638
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1638
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1638
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1631
.L1638:
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1631:
	ldr	r3, .L2200+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L2200+124
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1639
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1640
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1640
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1640
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1640:
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1641
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1641
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1641
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1641:
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1642
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1642
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1642
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1642:
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1639
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1639
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1639
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1639:
	ldr	r3, .L2200+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1643
	ldr	r3, .L2200+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1643
	ldr	r3, .L2200+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1643
	ldr	r3, .L2200+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1643
	ldr	r3, .L2200+112
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L2200+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L2200+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1643
	ldr	r3, .L2200+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L2200+124
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1645
.L1643:
	ldr	r3, .L2200+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2200+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
.L1645:
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1647
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1647
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1647
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1647
	ldr	r3, .L2200+52
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1647
	ldr	r3, .L2200+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1647
	ldr	r3, .L2200+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2200+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1647
	ldr	r3, .L2200+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L2200+124
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1647
	ldr	r3, .L2200+52
	ldr	r2, [r3]
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L1650
.L1647:
	ldr	r3, .L2200+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1650
	ldr	r3, .L2200+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1650
	ldr	r3, .L2200+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1650
	ldr	r3, .L2200+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1650
	ldr	r3, .L2200+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1650
	ldr	r3, .L2200+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L378
.L1650:
	ldr	r3, .L2200+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L2200+124
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1652
	ldr	r3, .L2200+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1652
	ldr	r3, .L2200+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2200+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1652
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1652
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1652
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1652
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1652
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L1655
.L1652:
	ldr	r3, .L2200+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1655
	ldr	r3, .L2200+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1655
	ldr	r3, .L2200+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1655
	ldr	r3, .L2200+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1655
	ldr	r3, .L2200+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1655
	ldr	r3, .L2200+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L378
.L1655:
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1657
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1657
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1657
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1658
.L1657:
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1659
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1659
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1659
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1659
.L1658:
	ldr	r3, .L2200+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L2200+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1659
	ldr	r3, .L2200+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2200+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1659
	ldr	r3, .L2200+52
	ldr	r2, [r3]
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L1661
.L1659:
	ldr	r3, .L2200+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1661
	ldr	r3, .L2200+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1661
	ldr	r3, .L2200+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1661
	ldr	r3, .L2200+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1661
	ldr	r3, .L2200+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1661
	ldr	r3, .L2200+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L378
.L1661:
	ldr	r3, .L2200+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L2200+124
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1663
	ldr	r3, .L2200+52
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L1665
.L1663:
	ldr	r3, .L2200+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1665
	ldr	r3, .L2200+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1665
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1665
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1665
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1665
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1665
	ldr	r3, .L2200+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1665
	ldr	r3, .L2200+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1665
	ldr	r3, .L2200+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1665
	ldr	r3, .L2200+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1665:
	ldr	r3, .L2200+52
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L1666
	ldr	r3, .L2200+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L2200+48
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1667
	mov	r3, #0
	mov	r4, r3
.L1667:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1666
	ldr	r3, .L2200+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L2200+124
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1668
	mov	r3, #0
	mov	r4, r3
.L1668:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L1669
.L1666:
	ldr	r3, .L2200+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1669
	ldr	r3, .L2200+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1669
	ldr	r3, .L2200+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1669
	ldr	r3, .L2200+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1669
	ldr	r3, .L2200+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1669
	ldr	r3, .L2200+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1669
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1669
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1669
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1669
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	b	.L2201
.L2202:
	.align	2
.L2200:
	.word	p1_evt
	.word	p1_l3
	.word	p1_l2
	.word	p1_l0
	.word	p1_l1
	.word	_x_p1_l3
	.word	_x_p1_l2
	.word	_x_p1_l1
	.word	_x_p1_l0
	.word	proposed1
	.word	_x_p1_c
	.word	p1_c
	.word	max_prop
	.word	v1
	.word	proposed0
	.word	_x_p0_l3
	.word	_x_p0_l2
	.word	_x_p0_l0
	.word	_x_p0_l1
	.word	v2
	.word	_x_v2
	.word	p0_c
	.word	_x_p0_c
	.word	p0_l3
	.word	p0_l2
	.word	p0_l0
	.word	p0_l1
	.word	p0_evt
	.word	delta
	.word	_x_v1
	.word	_x_delta
	.word	_x_proposed0
	.word	_x_proposed1
	.word	_x_proposed2
	.word	_x_proposed3
	.word	_x_proposed4
	.word	_x_proposed5
	.word	_x_proposed6
	.word	_x_proposed7
	.word	_x_max_prop
.L2201:
.L1669:
	ldr	r3, .L2200+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2200+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1670
	ldr	r3, .L2200+52
	ldr	r2, [r3]
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1670
	ldr	r3, .L2200+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L2200+124
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1670
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1672
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1672
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1672
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1673
.L1672:
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1670
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1670
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1670
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1673
.L1670:
	ldr	r3, .L2200+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1673
	ldr	r3, .L2200+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1673
	ldr	r3, .L2200+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1673
	ldr	r3, .L2200+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1673
	ldr	r3, .L2200+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1673
	ldr	r3, .L2200+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L378
.L1673:
	ldr	r3, .L2200+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1675
	ldr	r3, .L2200+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L2200+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1676
.L1675:
	ldr	r3, .L2200+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1676
	ldr	r3, .L2200+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1676
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1676
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1676
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1676
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1676
	ldr	r3, .L2200+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1676
	ldr	r3, .L2200+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1676
	ldr	r3, .L2200+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1676
	ldr	r3, .L2200+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L1676:
	ldr	r3, .L2200+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1677
	ldr	r3, .L2200+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1679
.L1677:
	ldr	r3, .L2200+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1679
	ldr	r3, .L2200+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1679
	ldr	r3, .L2200+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1679
	ldr	r3, .L2200+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1679
	ldr	r3, .L2200+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1679
	ldr	r3, .L2200+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1679
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1679
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1679
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1679
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1679:
	ldr	r3, .L2200+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L2200+124
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1680
	ldr	r3, .L2200+52
	ldr	r2, [r3]
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1680
	ldr	r3, .L2200+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1680
	ldr	r3, .L2200+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1680
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1680
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1680
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1680
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1683
.L1680:
	ldr	r3, .L2200+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1683
	ldr	r3, .L2200+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1683
	ldr	r3, .L2200+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1683
	ldr	r3, .L2200+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1683
	ldr	r3, .L2200+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1683
	ldr	r3, .L2200+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L378
.L1683:
	ldr	r3, .L2200+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L2200+124
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1685
	ldr	r3, .L2200+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2200+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1685
	ldr	r3, .L2200+52
	ldr	r2, [r3]
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1685
	ldr	r3, .L2200+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L2200+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1685
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1688
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1688
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1688
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1689
.L1688:
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1685
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1685
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1685
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1689
.L1685:
	ldr	r3, .L2200+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1689
	ldr	r3, .L2200+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1689
	ldr	r3, .L2200+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1689
	ldr	r3, .L2200+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1689
	ldr	r3, .L2200+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1689
	ldr	r3, .L2200+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L378
.L1689:
	ldr	r3, .L2200+52
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L1691
	ldr	r3, .L2200+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1691
	ldr	r3, .L2200+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1691
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1691
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1691
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1691
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1691
	ldr	r3, .L2200+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1691
	ldr	r3, .L2200+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1691
	ldr	r3, .L2200+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1691
	ldr	r3, .L2200+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1691:
	ldr	r3, .L2200+52
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L1692
	ldr	r3, .L2200+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1692
	ldr	r3, .L2200+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1692
	ldr	r3, .L2200+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1692
	ldr	r3, .L2200+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1692
	ldr	r3, .L2200+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1692
	ldr	r3, .L2200+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1692
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1692
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1692
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1692
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L1692:
	ldr	r3, .L2200+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L2200+124
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1693
	ldr	r3, .L2200+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2200+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1693
	ldr	r3, .L2200+52
	ldr	r2, [r3]
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1693
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1693
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1693
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1693
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1693
	ldr	r3, .L2200+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1695
.L1693:
	ldr	r3, .L2200+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1695
	ldr	r3, .L2200+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1695
	ldr	r3, .L2200+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1695
	ldr	r3, .L2200+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1695
	ldr	r3, .L2200+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1695
	ldr	r3, .L2200+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L378
.L1695:
	ldr	r3, .L2200+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L2200+124
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1697
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1697
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1697
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1697
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1697
	ldr	r3, .L2200+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1697
	ldr	r3, .L2200+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1697
	ldr	r3, .L2200+52
	ldr	r2, [r3]
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L1700
.L1697:
	ldr	r3, .L2200+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1700
	ldr	r3, .L2200+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1700
	ldr	r3, .L2200+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1700
	ldr	r3, .L2200+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1700
	ldr	r3, .L2200+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1700
	ldr	r3, .L2200+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L378
.L1700:
	ldr	r3, .L2200+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L2200+124
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1702
	ldr	r3, .L2200+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1702
	ldr	r3, .L2200+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1702
	ldr	r3, .L2200+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1702
	ldr	r3, .L2200+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1702
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1702
	ldr	r3, .L2200+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2200+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1702
	ldr	r3, .L2200+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L2200+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1704
.L1702:
	ldr	r3, .L2200+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1704
	ldr	r3, .L2200+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1704
	ldr	r3, .L2200+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1704
	ldr	r3, .L2200+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1704
	ldr	r3, .L2200+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1704
	ldr	r3, .L2200+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L378
.L1704:
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r3, #21
	beq	.L1706
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r3, #20
	beq	.L1706
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r3, #19
	beq	.L1706
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r3, #18
	beq	.L1706
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r3, #17
	beq	.L1706
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r3, #16
	beq	.L1706
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L1706
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L1706
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L1706
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L1706
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L1706
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L1706
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L1706
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L1706
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L1706
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L1706
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L1706
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L1706
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L1706
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L1706
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L1706
	ldr	r3, .L2200+116
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L378
.L1706:
	ldr	r3, .L2200+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2200+124
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1708
	mov	r3, #0
	mov	r4, r3
.L1708:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2200+124
	ldr	r3, [r3]	@ float
	ldr	r2, .L2200+156
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2200+128
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1710
	mov	r3, #0
	mov	r4, r3
.L1710:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2200+128
	ldr	r3, [r3]	@ float
	ldr	r2, .L2200+156
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2200+132
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1712
	mov	r3, #0
	mov	r4, r3
.L1712:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2200+132
	ldr	r3, [r3]	@ float
	ldr	r2, .L2200+156
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2200+136
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1714
	mov	r3, #0
	mov	r4, r3
.L1714:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2200+136
	ldr	r3, [r3]	@ float
	ldr	r2, .L2200+156
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2200+140
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1716
	mov	r3, #0
	mov	r4, r3
.L1716:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2200+140
	ldr	r3, [r3]	@ float
	ldr	r2, .L2200+156
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2200+144
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1718
	mov	r3, #0
	mov	r4, r3
.L1718:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2200+144
	ldr	r3, [r3]	@ float
	ldr	r2, .L2200+156
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2200+148
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1720
	mov	r3, #0
	mov	r4, r3
.L1720:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2200+148
	ldr	r3, [r3]	@ float
	ldr	r2, .L2200+156
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2200+152
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1722
	mov	r3, #0
	mov	r4, r3
.L1722:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2200+152
	ldr	r3, [r3]	@ float
	ldr	r2, .L2200+156
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2203+336
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1724
	mov	r3, #0
	mov	r4, r3
.L1724:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2203+336
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+264
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2203+368
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1726
	mov	r3, #0
	mov	r4, r3
.L1726:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2203+368
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+264
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2203+392
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1728
	mov	r3, #0
	mov	r4, r3
.L1728:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2203+392
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+264
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2203+464
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1730
	mov	r3, #0
	mov	r4, r3
.L1730:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2203+464
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+264
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2203+512
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1732
	mov	r3, #0
	mov	r4, r3
.L1732:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2203+512
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+264
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2203+520
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1734
	mov	r3, #0
	mov	r4, r3
.L1734:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2203+520
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+264
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2203+528
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1736
	mov	r3, #0
	mov	r4, r3
.L1736:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2203+528
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+264
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2203+536
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1738
	mov	r3, #0
	mov	r4, r3
.L1738:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2203+536
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+264
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2203+576
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1740
	mov	r3, #0
	mov	r4, r3
.L1740:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2203+576
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+264
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2203+600
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1742
	mov	r3, #0
	mov	r4, r3
.L1742:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2203+600
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+264
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2203+704
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1744
	mov	r3, #0
	mov	r4, r3
.L1744:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2203+704
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+264
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2203+656
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1746
	mov	r3, #0
	mov	r4, r3
.L1746:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2203+656
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+264
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2203+760
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1748
	mov	r3, #0
	mov	r4, r3
.L1748:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2203+760
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+264
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2203+264
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+248
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1750
	ldr	r3, .L2203+264
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+232
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1750
	ldr	r3, .L2203+264
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+224
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1750
	ldr	r3, .L2203+264
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+216
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1750
	ldr	r3, .L2203+264
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+200
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1750
	ldr	r3, .L2203+264
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+184
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1750
	ldr	r3, .L2203+264
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+176
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1750
	ldr	r3, .L2203+264
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+168
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1750
	ldr	r3, .L2203+264
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+336
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1750
	ldr	r3, .L2203+264
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+368
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1750
	ldr	r3, .L2203+264
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+392
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1750
	ldr	r3, .L2203+264
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+464
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1750
	ldr	r3, .L2203+264
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+512
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1750
	ldr	r3, .L2203+264
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+520
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1750
	ldr	r3, .L2203+264
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+528
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1750
	ldr	r3, .L2203+264
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+536
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1750
	ldr	r3, .L2203+264
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+576
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1750
	ldr	r3, .L2203+264
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+600
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1750
	ldr	r3, .L2203+264
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+704
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1750
	ldr	r3, .L2203+264
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+656
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1750
	ldr	r3, .L2203+264
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+760
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
.L1750:
	ldr	r3, .L2203+332
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1752
	ldr	r3, .L2203+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L2203+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2203+316
	ldr	r2, [r3]
	ldr	r3, .L2203+312
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L378
.L1752:
	ldr	r3, .L2203+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1753
	ldr	r3, .L2203+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1753
	ldr	r3, .L2203+780
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1753
	ldr	r3, .L2203+1188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1753
	ldr	r3, .L2203+1220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1753
	ldr	r3, .L2203+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1753
	ldr	r3, .L2203+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1753
	ldr	r3, .L2203+748
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1753
	ldr	r3, .L2203+1148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1753
	ldr	r3, .L2203+1012
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1753
	ldr	r3, .L2203+508
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1753
	ldr	r3, .L2203+636
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1753
	ldr	r3, .L2203+1156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1753
	ldr	r3, .L2203+956
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1753
	ldr	r3, .L2203+916
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1753
	ldr	r3, .L2203+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1753
	ldr	r3, .L2203+572
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1753
	ldr	r3, .L2203+716
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1753
	ldr	r3, .L2203+1020
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1753
	ldr	r3, .L2203+860
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1753
	ldr	r3, .L2203+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1753
	ldr	r3, .L2203+332
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L378
.L1753:
	ldr	r3, .L2203+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r4, r3, #255
	ldr	r3, .L2203+268
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+264
	ldr	r2, [r2]	@ float
	mov	r1, #1
	mov	r5, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1755
	mov	r3, #0
	mov	r5, r3
.L1755:
	and	r3, r5, #255
	eor	r3, r3, r4
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L2203+332
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+920
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1756
	ldr	r3, .L2203+924
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L1757
	mov	r3, #0
	mov	r4, r3
.L1757:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L378
.L1756:
	ldr	r3, .L2203+924
	ldr	r3, [r3]	@ float
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L1758
	ldr	r3, .L2203+332
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L2203+924
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L2203+920
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
.L1758:
	mov	r3, #1
	b	.L1760
.L2204:
	.align	2
.L2203:
	.word	_x_p20_l3
	.word	p20_l3
	.word	_x_p20_l2
	.word	p20_l2
	.word	_x_p19_l3
	.word	p19_l3
	.word	_x_p19_l2
	.word	p19_l2
	.word	_x_p18_l3
	.word	p18_l3
	.word	_x_p20_evt
	.word	p20_evt
	.word	_x_p18_l2
	.word	p18_l2
	.word	_x_p17_l3
	.word	p17_l3
	.word	_x_p19_evt
	.word	p19_evt
	.word	_x_p17_l2
	.word	p17_l2
	.word	_x_p16_l3
	.word	p16_l3
	.word	_x_p10_l0
	.word	p10_l0
	.word	_x_p6_c
	.word	p6_c
	.word	_x_p4_l0
	.word	p4_l0
	.word	_x_p4_l2
	.word	p4_l2
	.word	_x_p13_l1
	.word	p13_l1
	.word	_x_p1_evt
	.word	p1_evt
	.word	_x_p1_c
	.word	p1_c
	.word	_x_p0_l3
	.word	p0_l3
	.word	_x_p0_l2
	.word	p0_l2
	.word	_x_p0_l1
	.word	p0_l1
	.word	_x_proposed7
	.word	proposed7
	.word	_x_proposed6
	.word	proposed6
	.word	_x_proposed5
	.word	proposed5
	.word	_x_p12_l0
	.word	p12_l0
	.word	_x_proposed4
	.word	proposed4
	.word	_x_p7_l0
	.word	p7_l0
	.word	_x_proposed3
	.word	proposed3
	.word	_x_proposed2
	.word	proposed2
	.word	_x_proposed1
	.word	proposed1
	.word	_x_p8_c
	.word	p8_c
	.word	_x_proposed0
	.word	proposed0
	.word	_x_inc_max_prop
	.word	inc_max_prop
	.word	_x_max_prop
	.word	max_prop
	.word	_x_p20_l1
	.word	p20_l1
	.word	_x_p11_l3
	.word	p11_l3
	.word	_x_p2_l3
	.word	p2_l3
	.word	_x_v2
	.word	v2
	.word	_x_p15_evt
	.word	p15_evt
	.word	_x_v1
	.word	v1
	.word	_x_p15_c
	.word	p15_c
	.word	_x_delta
	.word	delta
	.word	_x_proposed8
	.word	proposed8
	.word	_x_p7_l1
	.word	p7_l1
	.word	_x_p9_c
	.word	p9_c
	.word	_x_p12_l3
	.word	p12_l3
	.word	_x_proposed9
	.word	proposed9
	.word	_x_p12_l1
	.word	p12_l1
	.word	_x_p14_c
	.word	p14_c
	.word	_x_proposed10
	.word	proposed10
	.word	_x_p12_l2
	.word	p12_l2
	.word	_x_p14_evt
	.word	p14_evt
	.word	_x_p3_l0
	.word	p3_l0
	.word	_x_p5_c
	.word	p5_c
	.word	_x_p3_l3
	.word	p3_l3
	.word	_x_p8_l1
	.word	p8_l1
	.word	_x_p10_c
	.word	p10_c
	.word	_x_p13_l3
	.word	p13_l3
	.word	_x_proposed11
	.word	proposed11
	.word	_x_p3_l1
	.word	p3_l1
	.word	_x_p5_evt
	.word	p5_evt
	.word	_x_p17_l0
	.word	p17_l0
	.word	_x_p8_l2
	.word	p8_l2
	.word	_x_p10_evt
	.word	p10_evt
	.word	_x_proposed12
	.word	proposed12
	.word	_x_proposed13
	.word	proposed13
	.word	_x_proposed14
	.word	proposed14
	.word	_x_proposed15
	.word	proposed15
	.word	_x_p13_c
	.word	p13_c
	.word	_x_p11_l1
	.word	p11_l1
	.word	_x_p2_l1
	.word	p2_l1
	.word	_x_p4_evt
	.word	p4_evt
	.word	_x_proposed16
	.word	proposed16
	.word	_x_p3_c
	.word	p3_c
	.word	_x_p1_l0
	.word	p1_l0
	.word	_x_proposed17
	.word	proposed17
	.word	_x_p6_l0
	.word	p6_l0
	.word	_x_p6_l1
	.word	p6_l1
	.word	_x_p7_l2
	.word	p7_l2
	.word	_x_p9_evt
	.word	p9_evt
	.word	_x_p16_l0
	.word	p16_l0
	.word	_x_p1_l2
	.word	p1_l2
	.word	_x_proposed19
	.word	proposed19
	.word	_x_p6_l2
	.word	p6_l2
	.word	_x_p18_c
	.word	p18_c
	.word	_x_p7_l3
	.word	p7_l3
	.word	_x_p16_l1
	.word	p16_l1
	.word	_x_p1_l1
	.word	p1_l1
	.word	_x_proposed18
	.word	proposed18
	.word	_x_p3_evt
	.word	p3_evt
	.word	_x_p20_l0
	.word	p20_l0
	.word	_x_p11_l2
	.word	p11_l2
	.word	_x_p2_l2
	.word	p2_l2
	.word	_x_p13_evt
	.word	p13_evt
	.word	_x_p1_l3
	.word	p1_l3
	.word	_x_proposed20
	.word	proposed20
	.word	_x_p6_l3
	.word	p6_l3
	.word	_x_p18_evt
	.word	p18_evt
	.word	_x_p16_l2
	.word	p16_l2
	.word	_x_p3_l2
	.word	p3_l2
	.word	_x_p19_c
	.word	p19_c
	.word	_x_p17_l1
	.word	p17_l1
	.word	_x_p8_l3
	.word	p8_l3
	.word	_x_p4_l3
	.word	p4_l3
	.word	_x_p13_l2
	.word	p13_l2
	.word	_x_p0_c
	.word	p0_c
	.word	_x_p0_l0
	.word	p0_l0
	.word	_x_p0_evt
	.word	p0_evt
	.word	_x_p5_l0
	.word	p5_l0
	.word	_x_p7_c
	.word	p7_c
	.word	_x_p19_l1
	.word	p19_l1
	.word	_x_p10_l3
	.word	p10_l3
	.word	_x_p4_l1
	.word	p4_l1
	.word	_x_p13_l0
	.word	p13_l0
	.word	_x_p6_evt
	.word	p6_evt
	.word	_x__diverge_delta
	.word	_diverge_delta
	.word	_x_p5_l2
	.word	p5_l2
	.word	_x_p16_c
	.word	p16_c
	.word	_x_p5_l1
	.word	p5_l1
	.word	_x_p7_evt
	.word	p7_evt
	.word	_x_p10_l1
	.word	p10_l1
	.word	_x_p12_c
	.word	p12_c
	.word	_x_p8_l0
	.word	p8_l0
	.word	_x_p9_l0
	.word	p9_l0
	.word	_x_p14_l0
	.word	p14_l0
	.word	_x_p18_l0
	.word	p18_l0
	.word	_x_p11_evt
	.word	p11_evt
	.word	_x_p2_evt
	.word	p2_evt
	.word	_x_p9_l2
	.word	p9_l2
	.word	_x_p14_l1
	.word	p14_l1
	.word	_x_p20_c
	.word	p20_c
	.word	_x_p18_l1
	.word	p18_l1
	.word	_x_p9_l3
	.word	p9_l3
	.word	_x_p14_l2
	.word	p14_l2
	.word	_x_p2_c
	.word	p2_c
	.word	_x_p9_l1
	.word	p9_l1
	.word	_x_p11_c
	.word	p11_c
	.word	_x_p14_l3
	.word	p14_l3
	.word	_x_p2_l0
	.word	p2_l0
	.word	_x_p4_c
	.word	p4_c
	.word	_x_p11_l0
	.word	p11_l0
	.word	_x_p19_l0
	.word	p19_l0
	.word	_x_p10_l2
	.word	p10_l2
	.word	_x_p12_evt
	.word	p12_evt
	.word	_x_p8_evt
	.word	p8_evt
	.word	_x_p15_l0
	.word	p15_l0
	.word	_x_p17_c
	.word	p17_c
	.word	_x_p15_l1
	.word	p15_l1
	.word	_x_p17_evt
	.word	p17_evt
	.word	_x_p15_l2
	.word	p15_l2
	.word	_x_p15_l3
	.word	p15_l3
	.word	_x_p5_l3
	.word	p5_l3
	.word	_x_p16_evt
	.word	p16_evt
.L378:
	mov	r3, #0
.L1760:
	str	r3, [fp, #-24]
	ldr	r3, .L2203
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+4
	strb	r2, [r3]
	ldr	r3, .L2203+8
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+12
	strb	r2, [r3]
	ldr	r3, .L2203+16
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+20
	strb	r2, [r3]
	ldr	r3, .L2203+24
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+28
	strb	r2, [r3]
	ldr	r3, .L2203+32
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+36
	strb	r2, [r3]
	ldr	r3, .L2203+40
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+44
	strb	r2, [r3]
	ldr	r3, .L2203+48
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+52
	strb	r2, [r3]
	ldr	r3, .L2203+56
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+60
	strb	r2, [r3]
	ldr	r3, .L2203+64
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+68
	strb	r2, [r3]
	ldr	r3, .L2203+72
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+76
	strb	r2, [r3]
	ldr	r3, .L2203+80
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+84
	strb	r2, [r3]
	ldr	r3, .L2203+88
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+92
	strb	r2, [r3]
	ldr	r3, .L2203+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+100
	str	r3, [r2]	@ float
	ldr	r3, .L2203+104
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+108
	strb	r2, [r3]
	ldr	r3, .L2203+112
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+116
	strb	r2, [r3]
	ldr	r3, .L2203+120
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+124
	strb	r2, [r3]
	ldr	r3, .L2203+128
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+132
	strb	r2, [r3]
	ldr	r3, .L2203+136
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+140
	str	r3, [r2]	@ float
	ldr	r3, .L2203+144
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+148
	strb	r2, [r3]
	ldr	r3, .L2203+152
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+156
	strb	r2, [r3]
	ldr	r3, .L2203+160
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+164
	strb	r2, [r3]
	ldr	r3, .L2203+168
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+172
	str	r3, [r2]	@ float
	ldr	r3, .L2203+176
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+180
	str	r3, [r2]	@ float
	ldr	r3, .L2203+184
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+188
	str	r3, [r2]	@ float
	ldr	r3, .L2203+192
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+196
	strb	r2, [r3]
	ldr	r3, .L2203+200
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+204
	str	r3, [r2]	@ float
	ldr	r3, .L2203+208
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+212
	strb	r2, [r3]
	ldr	r3, .L2203+216
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+220
	str	r3, [r2]	@ float
	ldr	r3, .L2203+224
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+228
	str	r3, [r2]	@ float
	ldr	r3, .L2203+232
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+236
	str	r3, [r2]	@ float
	ldr	r3, .L2203+240
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+244
	str	r3, [r2]	@ float
	ldr	r3, .L2203+248
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+252
	str	r3, [r2]	@ float
	ldr	r3, .L2203+256
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+260
	strb	r2, [r3]
	ldr	r3, .L2203+264
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+268
	str	r3, [r2]	@ float
	ldr	r3, .L2203+272
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+276
	strb	r2, [r3]
	ldr	r3, .L2203+280
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+284
	strb	r2, [r3]
	ldr	r3, .L2203+288
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+292
	strb	r2, [r3]
	ldr	r3, .L2203+296
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+300
	strb	r2, [r3]
	ldr	r3, .L2203+304
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+308
	strb	r2, [r3]
	ldr	r3, .L2203+312
	ldr	r3, [r3]
	ldr	r2, .L2203+316
	str	r3, [r2]
	ldr	r3, .L2203+320
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+324
	str	r3, [r2]	@ float
	ldr	r3, .L2203+328
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+332
	str	r3, [r2]	@ float
	ldr	r3, .L2203+336
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+340
	str	r3, [r2]	@ float
	ldr	r3, .L2203+344
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+348
	strb	r2, [r3]
	ldr	r3, .L2203+352
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+356
	str	r3, [r2]	@ float
	ldr	r3, .L2203+360
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+364
	strb	r2, [r3]
	ldr	r3, .L2203+368
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+372
	str	r3, [r2]	@ float
	ldr	r3, .L2203+376
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+380
	strb	r2, [r3]
	ldr	r3, .L2203+384
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+388
	str	r3, [r2]	@ float
	ldr	r3, .L2203+392
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+396
	str	r3, [r2]	@ float
	ldr	r3, .L2203+400
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+404
	strb	r2, [r3]
	ldr	r3, .L2203+408
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+412
	strb	r2, [r3]
	ldr	r3, .L2203+416
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+420
	strb	r2, [r3]
	ldr	r3, .L2203+424
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+428
	str	r3, [r2]	@ float
	ldr	r3, .L2203+432
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+436
	strb	r2, [r3]
	ldr	r3, .L2203+440
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+444
	strb	r2, [r3]
	ldr	r3, .L2203+448
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+452
	str	r3, [r2]	@ float
	ldr	r3, .L2203+456
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+460
	strb	r2, [r3]
	ldr	r3, .L2203+464
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+468
	str	r3, [r2]	@ float
	ldr	r3, .L2203+472
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+476
	strb	r2, [r3]
	ldr	r3, .L2203+480
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+484
	strb	r2, [r3]
	ldr	r3, .L2203+488
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+492
	strb	r2, [r3]
	ldr	r3, .L2203+496
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+500
	strb	r2, [r3]
	ldr	r3, .L2203+504
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+508
	strb	r2, [r3]
	ldr	r3, .L2203+512
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+516
	str	r3, [r2]	@ float
	ldr	r3, .L2203+520
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+524
	str	r3, [r2]	@ float
	ldr	r3, .L2203+528
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+532
	str	r3, [r2]	@ float
	ldr	r3, .L2203+536
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+540
	str	r3, [r2]	@ float
	ldr	r3, .L2203+544
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+548
	str	r3, [r2]	@ float
	ldr	r3, .L2203+552
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+556
	strb	r2, [r3]
	ldr	r3, .L2203+560
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+564
	strb	r2, [r3]
	ldr	r3, .L2203+568
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+572
	strb	r2, [r3]
	ldr	r3, .L2203+576
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+580
	str	r3, [r2]	@ float
	ldr	r3, .L2203+584
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+588
	str	r3, [r2]	@ float
	ldr	r3, .L2203+592
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+596
	strb	r2, [r3]
	ldr	r3, .L2203+600
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+604
	str	r3, [r2]	@ float
	ldr	r3, .L2203+608
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+612
	strb	r2, [r3]
	ldr	r3, .L2203+616
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+620
	strb	r2, [r3]
	ldr	r3, .L2203+624
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+628
	strb	r2, [r3]
	ldr	r3, .L2203+632
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+636
	strb	r2, [r3]
	ldr	r3, .L2203+640
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+644
	strb	r2, [r3]
	ldr	r3, .L2203+648
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+652
	strb	r2, [r3]
	ldr	r3, .L2203+656
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+660
	str	r3, [r2]	@ float
	ldr	r3, .L2203+664
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+668
	strb	r2, [r3]
	ldr	r3, .L2203+672
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+676
	str	r3, [r2]	@ float
	ldr	r3, .L2203+680
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+684
	strb	r2, [r3]
	ldr	r3, .L2203+688
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+692
	strb	r2, [r3]
	ldr	r3, .L2203+696
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+700
	strb	r2, [r3]
	ldr	r3, .L2203+704
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+708
	str	r3, [r2]	@ float
	ldr	r3, .L2203+712
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+716
	strb	r2, [r3]
	ldr	r3, .L2203+720
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+724
	strb	r2, [r3]
	ldr	r3, .L2203+728
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+732
	strb	r2, [r3]
	ldr	r3, .L2203+736
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+740
	strb	r2, [r3]
	ldr	r3, .L2203+744
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+748
	strb	r2, [r3]
	ldr	r3, .L2203+752
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+756
	strb	r2, [r3]
	ldr	r3, .L2203+760
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+764
	str	r3, [r2]	@ float
	ldr	r3, .L2203+768
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+772
	strb	r2, [r3]
	ldr	r3, .L2203+776
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+780
	strb	r2, [r3]
	ldr	r3, .L2203+784
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+788
	strb	r2, [r3]
	ldr	r3, .L2203+792
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+796
	strb	r2, [r3]
	ldr	r3, .L2203+800
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+804
	str	r3, [r2]	@ float
	ldr	r3, .L2203+808
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+812
	strb	r2, [r3]
	ldr	r3, .L2203+816
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+820
	strb	r2, [r3]
	ldr	r3, .L2203+824
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+828
	strb	r2, [r3]
	ldr	r3, .L2203+832
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+836
	strb	r2, [r3]
	ldr	r3, .L2203+840
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+844
	str	r3, [r2]	@ float
	ldr	r3, .L2203+848
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+852
	strb	r2, [r3]
	ldr	r3, .L2203+856
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+860
	strb	r2, [r3]
	ldr	r3, .L2203+864
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+868
	strb	r2, [r3]
	ldr	r3, .L2203+872
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+876
	str	r3, [r2]	@ float
	ldr	r3, .L2203+880
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+884
	strb	r2, [r3]
	ldr	r3, .L2203+888
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+892
	strb	r2, [r3]
	ldr	r3, .L2203+896
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+900
	strb	r2, [r3]
	ldr	r3, .L2203+904
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+908
	strb	r2, [r3]
	ldr	r3, .L2203+912
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+916
	strb	r2, [r3]
	ldr	r3, .L2203+920
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+924
	str	r3, [r2]	@ float
	ldr	r3, .L2203+928
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+932
	strb	r2, [r3]
	ldr	r3, .L2203+936
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+940
	str	r3, [r2]	@ float
	ldr	r3, .L2203+944
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+948
	strb	r2, [r3]
	ldr	r3, .L2203+952
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+956
	strb	r2, [r3]
	ldr	r3, .L2203+960
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+964
	strb	r2, [r3]
	ldr	r3, .L2203+968
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+972
	str	r3, [r2]	@ float
	ldr	r3, .L2203+976
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+980
	strb	r2, [r3]
	ldr	r3, .L2203+984
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+988
	strb	r2, [r3]
	ldr	r3, .L2203+992
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+996
	strb	r2, [r3]
	ldr	r3, .L2203+1000
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+1004
	strb	r2, [r3]
	ldr	r3, .L2203+1008
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+1012
	strb	r2, [r3]
	ldr	r3, .L2203+1016
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+1020
	strb	r2, [r3]
	ldr	r3, .L2203+1024
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+1028
	strb	r2, [r3]
	ldr	r3, .L2203+1032
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+1036
	strb	r2, [r3]
	ldr	r3, .L2203+1040
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+1044
	str	r3, [r2]	@ float
	ldr	r3, .L2203+1048
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+1052
	strb	r2, [r3]
	ldr	r3, .L2203+1056
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+1060
	strb	r2, [r3]
	ldr	r3, .L2203+1064
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+1068
	strb	r2, [r3]
	ldr	r3, .L2203+1072
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+1076
	str	r3, [r2]	@ float
	ldr	r3, .L2203+1080
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+1084
	strb	r2, [r3]
	ldr	r3, .L2203+1088
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+1092
	str	r3, [r2]	@ float
	ldr	r3, .L2203+1096
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+1100
	strb	r2, [r3]
	ldr	r3, .L2203+1104
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+1108
	strb	r2, [r3]
	ldr	r3, .L2203+1112
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+1116
	str	r3, [r2]	@ float
	ldr	r3, .L2203+1120
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+1124
	strb	r2, [r3]
	ldr	r3, .L2203+1128
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+1132
	strb	r2, [r3]
	ldr	r3, .L2203+1136
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+1140
	strb	r2, [r3]
	ldr	r3, .L2203+1144
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+1148
	strb	r2, [r3]
	ldr	r3, .L2203+1152
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+1156
	strb	r2, [r3]
	ldr	r3, .L2203+1160
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+1164
	strb	r2, [r3]
	ldr	r3, .L2203+1168
	ldr	r3, [r3]	@ float
	ldr	r2, .L2203+1172
	str	r3, [r2]	@ float
	ldr	r3, .L2203+1176
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+1180
	strb	r2, [r3]
	ldr	r3, .L2203+1184
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+1188
	strb	r2, [r3]
	ldr	r3, .L2203+1192
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+1196
	strb	r2, [r3]
	ldr	r3, .L2203+1200
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+1204
	strb	r2, [r3]
	ldr	r3, .L2203+1208
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+1212
	strb	r2, [r3]
	ldr	r3, .L2203+1216
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L2203+1220
	strb	r2, [r3]
.L368:
	ldr	r3, [fp, #-24]
	cmp	r3, #0
	bne	.L1761
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
