	.file	"161080389.c"
	.intel_syntax noprefix
	.text
	.globl	__hsail_bitalign
	.type	__hsail_bitalign, @function
__hsail_bitalign:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	QWORD PTR -32[rbp], rsi
	mov	DWORD PTR -36[rbp], edx
	and	DWORD PTR -36[rbp], 31
	mov	rax, QWORD PTR -32[rbp]
	sal	rax, 32
	or	rax, QWORD PTR -24[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	eax, DWORD PTR -36[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	ecx, eax
	shr	rdx, cl
	mov	rax, rdx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	__hsail_bitalign, .-__hsail_bitalign
	.globl	__hsail_bytealign
	.type	__hsail_bytealign, @function
__hsail_bytealign:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	QWORD PTR -32[rbp], rsi
	mov	DWORD PTR -36[rbp], edx
	mov	eax, DWORD PTR -36[rbp]
	and	eax, 3
	sal	eax, 3
	mov	DWORD PTR -36[rbp], eax
	mov	rax, QWORD PTR -32[rbp]
	sal	rax, 32
	or	rax, QWORD PTR -24[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	eax, DWORD PTR -36[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	ecx, eax
	shr	rdx, cl
	mov	rax, rdx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	__hsail_bytealign, .-__hsail_bytealign
	.globl	__hsail_lerp
	.type	__hsail_lerp, @function
__hsail_lerp:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	DWORD PTR -28[rbp], edx
	mov	eax, DWORD PTR -20[rbp]
	shr	eax, 24
	mov	edx, eax
	mov	eax, DWORD PTR -24[rbp]
	shr	eax, 24
	add	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	shr	eax, 24
	and	eax, 1
	add	eax, edx
	shr	eax
	sal	eax, 24
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	shr	eax, 16
	movzx	edx, al
	mov	eax, DWORD PTR -24[rbp]
	shr	eax, 16
	movzx	eax, al
	add	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	shr	eax, 16
	and	eax, 1
	add	eax, edx
	shr	eax
	sal	eax, 16
	and	eax, 16711680
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	shr	eax, 8
	movzx	edx, al
	mov	eax, DWORD PTR -24[rbp]
	shr	eax, 8
	movzx	eax, al
	add	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	shr	eax, 8
	and	eax, 1
	add	eax, edx
	shr	eax
	sal	eax, 8
	and	eax, 65535
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	movzx	edx, al
	mov	eax, DWORD PTR -24[rbp]
	movzx	eax, al
	add	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	and	eax, 1
	add	eax, edx
	shr	eax
	and	eax, 255
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	or	eax, DWORD PTR -12[rbp]
	or	eax, DWORD PTR -8[rbp]
	or	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	__hsail_lerp, .-__hsail_lerp
	.type	cvt_neari_sat_u8_f32, @function
cvt_neari_sat_u8_f32:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	xmm0, DWORD PTR -4[rbp]
	movss	xmm1, DWORD PTR .LC0[rip]
	andps	xmm0, xmm1
	ucomiss	xmm0, DWORD PTR .LC1[rip]
	setbe	al
	xor	eax, 1
	test	al, al
	je	.L8
	mov	eax, DWORD PTR -4[rbp]
	and	eax, -2147483648
	test	eax, eax
	je	.L9
	mov	eax, 0
	jmp	.L10
.L9:
	mov	eax, -1
	jmp	.L10
.L8:
	movss	xmm0, DWORD PTR -4[rbp]
	ucomiss	xmm0, DWORD PTR -4[rbp]
	jnp	.L11
	mov	eax, 0
	jmp	.L10
.L11:
	pxor	xmm0, xmm0
	comiss	xmm0, DWORD PTR -4[rbp]
	jbe	.L18
	mov	eax, 0
	jmp	.L10
.L18:
	movss	xmm0, DWORD PTR -4[rbp]
	comiss	xmm0, DWORD PTR .LC3[rip]
	jbe	.L19
	mov	eax, -1
	jmp	.L10
.L19:
	cvttss2si	eax, DWORD PTR -4[rbp]
.L10:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	cvt_neari_sat_u8_f32, .-cvt_neari_sat_u8_f32
	.globl	__hsail_packcvt
	.type	__hsail_packcvt, @function
__hsail_packcvt:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 16
	.cfi_offset 3, -24
	movss	DWORD PTR -12[rbp], xmm0
	movss	DWORD PTR -16[rbp], xmm1
	movss	DWORD PTR -20[rbp], xmm2
	movss	DWORD PTR -24[rbp], xmm3
	mov	eax, DWORD PTR -12[rbp]
	movd	xmm0, eax
	call	cvt_neari_sat_u8_f32
	movzx	ebx, al
	mov	eax, DWORD PTR -16[rbp]
	movd	xmm0, eax
	call	cvt_neari_sat_u8_f32
	movzx	eax, al
	sal	eax, 8
	or	ebx, eax
	mov	eax, DWORD PTR -20[rbp]
	movd	xmm0, eax
	call	cvt_neari_sat_u8_f32
	movzx	eax, al
	sal	eax, 16
	or	ebx, eax
	mov	eax, DWORD PTR -24[rbp]
	movd	xmm0, eax
	call	cvt_neari_sat_u8_f32
	movzx	eax, al
	sal	eax, 24
	or	eax, ebx
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	__hsail_packcvt, .-__hsail_packcvt
	.globl	__hsail_unpackcvt
	.type	__hsail_unpackcvt, @function
__hsail_unpackcvt:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -8[rbp]
	sal	eax, 3
	mov	edx, DWORD PTR -4[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	movzx	eax, al
	mov	eax, eax
	test	rax, rax
	js	.L23
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, rax
	jmp	.L25
.L23:
	mov	rdx, rax
	shr	rdx
	and	eax, 1
	or	rdx, rax
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, rdx
	addss	xmm0, xmm0
.L25:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	__hsail_unpackcvt, .-__hsail_unpackcvt
	.type	abs_diff, @function
abs_diff:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -4[rbp]
	cmp	eax, DWORD PTR -8[rbp]
	jnb	.L27
	mov	eax, DWORD PTR -8[rbp]
	sub	eax, DWORD PTR -4[rbp]
	jmp	.L28
.L27:
	mov	eax, DWORD PTR -4[rbp]
	sub	eax, DWORD PTR -8[rbp]
.L28:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	abs_diff, .-abs_diff
	.globl	__hsail_sad_u8x4
	.type	__hsail_sad_u8x4, @function
__hsail_sad_u8x4:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 16
	.cfi_offset 3, -24
	mov	DWORD PTR -12[rbp], edi
	mov	DWORD PTR -16[rbp], esi
	mov	DWORD PTR -20[rbp], edx
	mov	eax, DWORD PTR -16[rbp]
	shr	eax, 24
	mov	edx, eax
	mov	eax, DWORD PTR -12[rbp]
	shr	eax, 24
	mov	esi, edx
	mov	edi, eax
	call	abs_diff
	mov	ebx, eax
	mov	eax, DWORD PTR -16[rbp]
	shr	eax, 16
	movzx	edx, al
	mov	eax, DWORD PTR -12[rbp]
	shr	eax, 16
	movzx	eax, al
	mov	esi, edx
	mov	edi, eax
	call	abs_diff
	add	ebx, eax
	mov	eax, DWORD PTR -16[rbp]
	shr	eax, 8
	movzx	edx, al
	mov	eax, DWORD PTR -12[rbp]
	shr	eax, 8
	movzx	eax, al
	mov	esi, edx
	mov	edi, eax
	call	abs_diff
	add	ebx, eax
	mov	eax, DWORD PTR -16[rbp]
	movzx	edx, al
	mov	eax, DWORD PTR -12[rbp]
	movzx	eax, al
	mov	esi, edx
	mov	edi, eax
	call	abs_diff
	lea	edx, [rbx+rax]
	mov	eax, DWORD PTR -20[rbp]
	add	eax, edx
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	__hsail_sad_u8x4, .-__hsail_sad_u8x4
	.globl	__hsail_sad_u16x2
	.type	__hsail_sad_u16x2, @function
__hsail_sad_u16x2:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 16
	.cfi_offset 3, -24
	mov	DWORD PTR -12[rbp], edi
	mov	DWORD PTR -16[rbp], esi
	mov	DWORD PTR -20[rbp], edx
	mov	eax, DWORD PTR -16[rbp]
	shr	eax, 16
	mov	edx, eax
	mov	eax, DWORD PTR -12[rbp]
	shr	eax, 16
	mov	esi, edx
	mov	edi, eax
	call	abs_diff
	mov	ebx, eax
	mov	eax, DWORD PTR -16[rbp]
	movzx	edx, ax
	mov	eax, DWORD PTR -12[rbp]
	movzx	eax, ax
	mov	esi, edx
	mov	edi, eax
	call	abs_diff
	lea	edx, [rbx+rax]
	mov	eax, DWORD PTR -20[rbp]
	add	eax, edx
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	__hsail_sad_u16x2, .-__hsail_sad_u16x2
	.globl	__hsail_sad_u32
	.type	__hsail_sad_u32, @function
__hsail_sad_u32:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	DWORD PTR -12[rbp], edx
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, DWORD PTR -4[rbp]
	mov	esi, edx
	mov	edi, eax
	call	abs_diff
	mov	edx, DWORD PTR -12[rbp]
	add	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	__hsail_sad_u32, .-__hsail_sad_u32
	.globl	__hsail_sadhi_u16x2_u8x4
	.type	__hsail_sadhi_u16x2_u8x4, @function
__hsail_sadhi_u16x2_u8x4:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 16
	.cfi_offset 3, -24
	mov	DWORD PTR -12[rbp], edi
	mov	DWORD PTR -16[rbp], esi
	mov	DWORD PTR -20[rbp], edx
	mov	eax, DWORD PTR -16[rbp]
	shr	eax, 24
	mov	edx, eax
	mov	eax, DWORD PTR -12[rbp]
	shr	eax, 24
	mov	esi, edx
	mov	edi, eax
	call	abs_diff
	sal	eax, 16
	mov	ebx, eax
	mov	eax, DWORD PTR -16[rbp]
	shr	eax, 16
	movzx	edx, al
	mov	eax, DWORD PTR -12[rbp]
	shr	eax, 16
	movzx	eax, al
	mov	esi, edx
	mov	edi, eax
	call	abs_diff
	sal	eax, 16
	add	ebx, eax
	mov	eax, DWORD PTR -16[rbp]
	shr	eax, 8
	movzx	edx, al
	mov	eax, DWORD PTR -12[rbp]
	shr	eax, 8
	movzx	eax, al
	mov	esi, edx
	mov	edi, eax
	call	abs_diff
	sal	eax, 16
	add	ebx, eax
	mov	eax, DWORD PTR -16[rbp]
	movzx	edx, al
	mov	eax, DWORD PTR -12[rbp]
	movzx	eax, al
	mov	esi, edx
	mov	edi, eax
	call	abs_diff
	sal	eax, 16
	lea	edx, [rbx+rax]
	mov	eax, DWORD PTR -20[rbp]
	add	eax, edx
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	__hsail_sadhi_u16x2_u8x4, .-__hsail_sadhi_u16x2_u8x4
	.section	.rodata
	.align 16
.LC0:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.align 4
.LC1:
	.long	2139095039
	.align 4
.LC3:
	.long	1132396544
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"161080389.c"
	.text
	.align	2
	.global	__hsail_bitalign
	.syntax unified
	.arm
	.fpu softvfp
	.type	__hsail_bitalign, %function
__hsail_bitalign:
	@ args = 4, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, fp}
	add	fp, sp, #16
	sub	sp, sp, #28
	str	r0, [fp, #-36]
	str	r1, [fp, #-32]
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	ldr	r3, [fp, #4]
	and	r3, r3, #31
	str	r3, [fp, #4]
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	mov	r3, r0
	mov	r2, #0
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	orr	r6, r0, r2
	orr	r7, r1, r3
	str	r6, [fp, #-28]
	str	r7, [fp, #-24]
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	ldr	r1, [fp, #4]
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r4, r2, r1
	orr	r4, r4, r3, lsl ip
	orr	r4, r4, r3, lsr r0
	lsr	r5, r3, r1
	mov	r3, r4
	mov	r0, r3
	sub	sp, fp, #16
	@ sp needed
	pop	{r4, r5, r6, r7, fp}
	bx	lr
	.size	__hsail_bitalign, .-__hsail_bitalign
	.align	2
	.global	__hsail_bytealign
	.syntax unified
	.arm
	.fpu softvfp
	.type	__hsail_bytealign, %function
__hsail_bytealign:
	@ args = 4, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, fp}
	add	fp, sp, #16
	sub	sp, sp, #28
	str	r0, [fp, #-36]
	str	r1, [fp, #-32]
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	ldr	r3, [fp, #4]
	and	r3, r3, #3
	lsl	r3, r3, #3
	str	r3, [fp, #4]
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	mov	r3, r0
	mov	r2, #0
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	orr	r6, r0, r2
	orr	r7, r1, r3
	str	r6, [fp, #-28]
	str	r7, [fp, #-24]
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	ldr	r1, [fp, #4]
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r4, r2, r1
	orr	r4, r4, r3, lsl ip
	orr	r4, r4, r3, lsr r0
	lsr	r5, r3, r1
	mov	r3, r4
	mov	r0, r3
	sub	sp, fp, #16
	@ sp needed
	pop	{r4, r5, r6, r7, fp}
	bx	lr
	.size	__hsail_bytealign, .-__hsail_bytealign
	.align	2
	.global	__hsail_lerp
	.syntax unified
	.arm
	.fpu softvfp
	.type	__hsail_lerp, %function
__hsail_lerp:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #36
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	str	r2, [fp, #-32]
	ldr	r3, [fp, #-24]
	lsr	r2, r3, #24
	ldr	r3, [fp, #-28]
	lsr	r3, r3, #24
	add	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r3, #24
	and	r3, r3, #1
	add	r3, r2, r3
	lsr	r3, r3, #1
	lsl	r3, r3, #24
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	lsr	r3, r3, #16
	and	r2, r3, #255
	ldr	r3, [fp, #-28]
	lsr	r3, r3, #16
	and	r3, r3, #255
	add	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r3, #16
	and	r3, r3, #1
	add	r3, r2, r3
	lsr	r3, r3, #1
	lsl	r3, r3, #16
	and	r3, r3, #16711680
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-24]
	lsr	r3, r3, #8
	and	r2, r3, #255
	ldr	r3, [fp, #-28]
	lsr	r3, r3, #8
	and	r3, r3, #255
	add	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r3, #8
	and	r3, r3, #1
	add	r3, r2, r3
	lsr	r3, r3, #1
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-24]
	and	r2, r3, #255
	ldr	r3, [fp, #-28]
	and	r3, r3, #255
	add	r2, r2, r3
	ldr	r3, [fp, #-32]
	and	r3, r3, #1
	add	r3, r2, r3
	lsr	r3, r3, #1
	and	r3, r3, #255
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-16]
	orr	r2, r2, r3
	ldr	r3, [fp, #-12]
	orr	r2, r2, r3
	ldr	r3, [fp, #-8]
	orr	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	__hsail_lerp, .-__hsail_lerp
	.global	__aeabi_fcmpun
	.global	__aeabi_fcmple
	.global	__aeabi_fcmplt
	.global	__aeabi_fcmpgt
	.global	__aeabi_f2uiz
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	cvt_neari_sat_u8_f32, %function
cvt_neari_sat_u8_f32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #8
	str	r0, [fp, #-16]	@ float
	ldr	r3, [fp, #-16]
	bic	r4, r3, #-2147483648
	mov	r3, #1
	mov	r5, r3
	ldr	r1, .L24
	mov	r0, r4
	bl	__aeabi_fcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L8
	ldr	r1, .L24
	mov	r0, r4
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L8
	mov	r3, #0
	mov	r5, r3
.L8:
	and	r3, r5, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L9
	ldr	r3, [fp, #-16]
	and	r3, r3, #-2147483648
	cmp	r3, #0
	beq	.L10
	mov	r3, #0
	b	.L11
.L10:
	mov	r3, #255
	b	.L11
.L9:
	ldr	r1, [fp, #-16]	@ float
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_fcmpun
	mov	r3, r0
	cmp	r3, #0
	beq	.L21
	mov	r3, #0
	b	.L11
.L21:
	mov	r1, #0
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_fcmplt
	mov	r3, r0
	cmp	r3, #0
	beq	.L22
	mov	r3, #0
	b	.L11
.L22:
	ldr	r1, .L24+4
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_fcmpgt
	mov	r3, r0
	cmp	r3, #0
	beq	.L23
	mov	r3, #255
	b	.L11
.L23:
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2uiz
	mov	r3, r0
	and	r3, r3, #255
.L11:
	mov	r0, r3
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L25:
	.align	2
.L24:
	.word	2139095039
	.word	1132396544
	.size	cvt_neari_sat_u8_f32, .-cvt_neari_sat_u8_f32
	.align	2
	.global	__hsail_packcvt
	.syntax unified
	.arm
	.fpu softvfp
	.type	__hsail_packcvt, %function
__hsail_packcvt:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-16]	@ float
	str	r1, [fp, #-20]	@ float
	str	r2, [fp, #-24]	@ float
	str	r3, [fp, #-28]	@ float
	ldr	r0, [fp, #-16]	@ float
	bl	cvt_neari_sat_u8_f32
	mov	r3, r0
	mov	r4, r3
	ldr	r0, [fp, #-20]	@ float
	bl	cvt_neari_sat_u8_f32
	mov	r3, r0
	lsl	r3, r3, #8
	orr	r4, r4, r3
	ldr	r0, [fp, #-24]	@ float
	bl	cvt_neari_sat_u8_f32
	mov	r3, r0
	lsl	r3, r3, #16
	orr	r4, r4, r3
	ldr	r0, [fp, #-28]	@ float
	bl	cvt_neari_sat_u8_f32
	mov	r3, r0
	lsl	r3, r3, #24
	orr	r3, r4, r3
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
	.size	__hsail_packcvt, .-__hsail_packcvt
	.global	__aeabi_ui2f
	.align	2
	.global	__hsail_unpackcvt
	.syntax unified
	.arm
	.fpu softvfp
	.type	__hsail_unpackcvt, %function
__hsail_unpackcvt:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #3
	ldr	r2, [fp, #-8]
	lsr	r3, r2, r3
	and	r3, r3, #255
	mov	r0, r3
	bl	__aeabi_ui2f
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	__hsail_unpackcvt, .-__hsail_unpackcvt
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	abs_diff, %function
abs_diff:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	cmp	r2, r3
	bcs	.L31
	ldr	r2, [fp, #-12]
	ldr	r3, [fp, #-8]
	sub	r3, r2, r3
	b	.L32
.L31:
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	sub	r3, r2, r3
.L32:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	abs_diff, .-abs_diff
	.align	2
	.global	__hsail_sad_u8x4
	.syntax unified
	.arm
	.fpu softvfp
	.type	__hsail_sad_u8x4, %function
__hsail_sad_u8x4:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-24]
	ldr	r3, [fp, #-16]
	lsr	r2, r3, #24
	ldr	r3, [fp, #-20]
	lsr	r3, r3, #24
	mov	r1, r3
	mov	r0, r2
	bl	abs_diff
	mov	r4, r0
	ldr	r3, [fp, #-16]
	lsr	r3, r3, #16
	and	r2, r3, #255
	ldr	r3, [fp, #-20]
	lsr	r3, r3, #16
	and	r3, r3, #255
	mov	r1, r3
	mov	r0, r2
	bl	abs_diff
	mov	r3, r0
	add	r4, r4, r3
	ldr	r3, [fp, #-16]
	lsr	r3, r3, #8
	and	r2, r3, #255
	ldr	r3, [fp, #-20]
	lsr	r3, r3, #8
	and	r3, r3, #255
	mov	r1, r3
	mov	r0, r2
	bl	abs_diff
	mov	r3, r0
	add	r4, r4, r3
	ldr	r3, [fp, #-16]
	and	r2, r3, #255
	ldr	r3, [fp, #-20]
	and	r3, r3, #255
	mov	r1, r3
	mov	r0, r2
	bl	abs_diff
	mov	r3, r0
	add	r2, r4, r3
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
	.size	__hsail_sad_u8x4, .-__hsail_sad_u8x4
	.align	2
	.global	__hsail_sad_u16x2
	.syntax unified
	.arm
	.fpu softvfp
	.type	__hsail_sad_u16x2, %function
__hsail_sad_u16x2:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-24]
	ldr	r3, [fp, #-16]
	lsr	r2, r3, #16
	ldr	r3, [fp, #-20]
	lsr	r3, r3, #16
	mov	r1, r3
	mov	r0, r2
	bl	abs_diff
	mov	r4, r0
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, [fp, #-20]
	lsl	r2, r2, #16
	lsr	r2, r2, #16
	mov	r1, r2
	mov	r0, r3
	bl	abs_diff
	mov	r3, r0
	add	r2, r4, r3
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
	.size	__hsail_sad_u16x2, .-__hsail_sad_u16x2
	.align	2
	.global	__hsail_sad_u32
	.syntax unified
	.arm
	.fpu softvfp
	.type	__hsail_sad_u32, %function
__hsail_sad_u32:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	str	r2, [fp, #-16]
	ldr	r1, [fp, #-12]
	ldr	r0, [fp, #-8]
	bl	abs_diff
	mov	r2, r0
	ldr	r3, [fp, #-16]
	add	r3, r2, r3
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	__hsail_sad_u32, .-__hsail_sad_u32
	.align	2
	.global	__hsail_sadhi_u16x2_u8x4
	.syntax unified
	.arm
	.fpu softvfp
	.type	__hsail_sadhi_u16x2_u8x4, %function
__hsail_sadhi_u16x2_u8x4:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-24]
	ldr	r3, [fp, #-16]
	lsr	r2, r3, #24
	ldr	r3, [fp, #-20]
	lsr	r3, r3, #24
	mov	r1, r3
	mov	r0, r2
	bl	abs_diff
	mov	r3, r0
	lsl	r4, r3, #16
	ldr	r3, [fp, #-16]
	lsr	r3, r3, #16
	and	r2, r3, #255
	ldr	r3, [fp, #-20]
	lsr	r3, r3, #16
	and	r3, r3, #255
	mov	r1, r3
	mov	r0, r2
	bl	abs_diff
	mov	r3, r0
	lsl	r3, r3, #16
	add	r4, r4, r3
	ldr	r3, [fp, #-16]
	lsr	r3, r3, #8
	and	r2, r3, #255
	ldr	r3, [fp, #-20]
	lsr	r3, r3, #8
	and	r3, r3, #255
	mov	r1, r3
	mov	r0, r2
	bl	abs_diff
	mov	r3, r0
	lsl	r3, r3, #16
	add	r4, r4, r3
	ldr	r3, [fp, #-16]
	and	r2, r3, #255
	ldr	r3, [fp, #-20]
	and	r3, r3, #255
	mov	r1, r3
	mov	r0, r2
	bl	abs_diff
	mov	r3, r0
	lsl	r3, r3, #16
	add	r2, r4, r3
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
	.size	__hsail_sadhi_u16x2_u8x4, .-__hsail_sadhi_u16x2_u8x4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
