	.file	"215767298.c"
	.intel_syntax noprefix
	.text
	.globl	vRegTest1Implementation
	.type	vRegTest1Implementation, @function
vRegTest1Implementation:
.LFB0:
	.cfi_startproc
	endbr64
#APP
# 84 "the_stack_data/215767298.c" 1
	.extern ulRegTest1LoopCounter 
/* Fill the core registers with known values. */		
mov	r0, #100			
mov	r1, #101			
mov	r2, #102			
mov	r3, #103			
mov	r4, #104			
mov	r5, #105			
mov	r6, #106			
mov	r7, #107			
mov	r8, #108			
mov	r9, #109			
mov	r10, #110			
mov	r11, #111			
mov	r12, #112			
reg1_loop:						
/* Check each register has maintained its expected value. */	
cmp	r0, #100			
bne	reg1_error_loop		
cmp	r1, #101			
bne	reg1_error_loop		
cmp	r2, #102			
bne	reg1_error_loop		
cmp 	r3, #103			
bne	reg1_error_loop		
cmp	r4, #104			
bne	reg1_error_loop		
cmp	r5, #105			
bne	reg1_error_loop		
cmp	r6, #106			
bne	reg1_error_loop		
cmp	r7, #107			
bne	reg1_error_loop		
cmp	r8, #108			
bne	reg1_error_loop		
cmp	r9, #109			
bne	reg1_error_loop		
cmp	r10, #110			
bne	reg1_error_loop		
cmp	r11, #111			
bne	reg1_error_loop		
cmp	r12, #112			
bne	reg1_error_loop		
/* Everything passed, increment the loop counter. */	
push 	{ r0-r1 }			
ldr	r0, =ulRegTest1LoopCounter	
ldr 	r1, [r0]			
adds 	r1, r1, #1			
str 	r1, [r0]			
pop 	{ r0-r1 }			
/* Start again. */			
b 		reg1_loop			
reg1_error_loop:				
/* If this line is hit then there was an error in a core register value. 
The loop ensures the loop counter stops incrementing. */	
b 	reg1_error_loop			
nop						
# 0 "" 2
#NO_APP
	nop
	ud2
	.cfi_endproc
.LFE0:
	.size	vRegTest1Implementation, .-vRegTest1Implementation
	.globl	vRegTest2Implementation
	.type	vRegTest2Implementation, @function
vRegTest2Implementation:
.LFB1:
	.cfi_startproc
	endbr64
#APP
# 154 "the_stack_data/215767298.c" 1
	.extern ulRegTest2LoopCounter 
/* Set all the core registers to known values. */	
mov 	r0, #-1				
mov 	r1, #1				
mov 	r2, #2				
mov 	r3, #3				
mov	r4, #4				
mov	r5, #5				
mov	r6, #6				
mov 	r7, #7				
mov	r8, #8				
mov	r9, #9				
mov	r10, #10			
mov	r11, #11			
mov 	r12, #12			
reg2_loop:						
cmp	r0, #-1				
bne	reg2_error_loop		
cmp	r1, #1				
bne	reg2_error_loop		
cmp	r2, #2				
bne	reg2_error_loop		
cmp 	r3, #3				
bne	reg2_error_loop		
cmp	r4, #4				
bne	reg2_error_loop		
cmp	r5, #5				
bne	reg2_error_loop		
cmp	r6, #6				
bne	reg2_error_loop		
cmp	r7, #7				
bne	reg2_error_loop		
cmp	r8, #8				
bne	reg2_error_loop		
cmp	r9, #9				
bne	reg2_error_loop		
cmp	r10, #10			
bne	reg2_error_loop		
cmp	r11, #11			
bne	reg2_error_loop		
cmp	r12, #12			
bne	reg2_error_loop		
/* Increment the loop counter to indicate this test is still functioning	
correctly. */				
push	{ r0-r1 }			
ldr	r0, =ulRegTest2LoopCounter	
ldr 	r1, [r0]			
adds 	r1, r1, #1			
str 	r1, [r0]			
/* Yield to increase test coverage. */			
movs 	r0, #0x01			
ldr 	r1, =0xe000ed04 /*NVIC_INT_CTRL */		
lsl 	r0, r0, #28 /* Shift to PendSV bit */	
str 	r0, [r1]			
dsb						
pop { r0-r1 }				
/* Start again. */			
b reg2_loop				
reg2_error_loop:				
/* If this line is hit then there was an error in a core register value.	
This loop ensures the loop counter variable stops incrementing. */			
b reg2_error_loop			

# 0 "" 2
#NO_APP
	nop
	ud2
	.cfi_endproc
.LFE1:
	.size	vRegTest2Implementation, .-vRegTest2Implementation
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"215767298.c"
	.text
	.align	2
	.global	vRegTest1Implementation
	.syntax unified
	.arm
	.fpu softvfp
	.type	vRegTest1Implementation, %function
vRegTest1Implementation:
	@ Naked Function: prologue and epilogue provided by programmer.
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	.syntax divided
@ 84 "the_stack_data/215767298.c" 1
	.extern ulRegTest1LoopCounter 
/* Fill the core registers with known values. */		
mov	r0, #100			
mov	r1, #101			
mov	r2, #102			
mov	r3, #103			
mov	r4, #104			
mov	r5, #105			
mov	r6, #106			
mov	r7, #107			
mov	r8, #108			
mov	r9, #109			
mov	r10, #110			
mov	r11, #111			
mov	r12, #112			
reg1_loop:						
/* Check each register has maintained its expected value. */	
cmp	r0, #100			
bne	reg1_error_loop		
cmp	r1, #101			
bne	reg1_error_loop		
cmp	r2, #102			
bne	reg1_error_loop		
cmp 	r3, #103			
bne	reg1_error_loop		
cmp	r4, #104			
bne	reg1_error_loop		
cmp	r5, #105			
bne	reg1_error_loop		
cmp	r6, #106			
bne	reg1_error_loop		
cmp	r7, #107			
bne	reg1_error_loop		
cmp	r8, #108			
bne	reg1_error_loop		
cmp	r9, #109			
bne	reg1_error_loop		
cmp	r10, #110			
bne	reg1_error_loop		
cmp	r11, #111			
bne	reg1_error_loop		
cmp	r12, #112			
bne	reg1_error_loop		
/* Everything passed, increment the loop counter. */	
push 	{ r0-r1 }			
ldr	r0, =ulRegTest1LoopCounter	
ldr 	r1, [r0]			
adds 	r1, r1, #1			
str 	r1, [r0]			
pop 	{ r0-r1 }			
/* Start again. */			
b 		reg1_loop			
reg1_error_loop:				
/* If this line is hit then there was an error in a core register value. 
The loop ensures the loop counter stops incrementing. */	
b 	reg1_error_loop			
nop						
@ 0 "" 2
	.arm
	.syntax unified
	nop
	.size	vRegTest1Implementation, .-vRegTest1Implementation
	.align	2
	.global	vRegTest2Implementation
	.syntax unified
	.arm
	.fpu softvfp
	.type	vRegTest2Implementation, %function
vRegTest2Implementation:
	@ Naked Function: prologue and epilogue provided by programmer.
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	.syntax divided
@ 154 "the_stack_data/215767298.c" 1
	.extern ulRegTest2LoopCounter 
/* Set all the core registers to known values. */	
mov 	r0, #-1				
mov 	r1, #1				
mov 	r2, #2				
mov 	r3, #3				
mov	r4, #4				
mov	r5, #5				
mov	r6, #6				
mov 	r7, #7				
mov	r8, #8				
mov	r9, #9				
mov	r10, #10			
mov	r11, #11			
mov 	r12, #12			
reg2_loop:						
cmp	r0, #-1				
bne	reg2_error_loop		
cmp	r1, #1				
bne	reg2_error_loop		
cmp	r2, #2				
bne	reg2_error_loop		
cmp 	r3, #3				
bne	reg2_error_loop		
cmp	r4, #4				
bne	reg2_error_loop		
cmp	r5, #5				
bne	reg2_error_loop		
cmp	r6, #6				
bne	reg2_error_loop		
cmp	r7, #7				
bne	reg2_error_loop		
cmp	r8, #8				
bne	reg2_error_loop		
cmp	r9, #9				
bne	reg2_error_loop		
cmp	r10, #10			
bne	reg2_error_loop		
cmp	r11, #11			
bne	reg2_error_loop		
cmp	r12, #12			
bne	reg2_error_loop		
/* Increment the loop counter to indicate this test is still functioning	
correctly. */				
push	{ r0-r1 }			
ldr	r0, =ulRegTest2LoopCounter	
ldr 	r1, [r0]			
adds 	r1, r1, #1			
str 	r1, [r0]			
/* Yield to increase test coverage. */			
movs 	r0, #0x01			
ldr 	r1, =0xe000ed04 /*NVIC_INT_CTRL */		
lsl 	r0, r0, #28 /* Shift to PendSV bit */	
str 	r0, [r1]			
dsb						
pop { r0-r1 }				
/* Start again. */			
b reg2_loop				
reg2_error_loop:				
/* If this line is hit then there was an error in a core register value.	
This loop ensures the loop counter variable stops incrementing. */			
b reg2_error_loop			

@ 0 "" 2
	.arm
	.syntax unified
	nop
	.size	vRegTest2Implementation, .-vRegTest2Implementation
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
