	.file	"182953729.c"
	.intel_syntax noprefix
	.text
	.globl	__VERIFIER_nondet_bool
	.type	__VERIFIER_nondet_bool, @function
__VERIFIER_nondet_bool:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	__VERIFIER_nondet_int@PLT
	test	eax, eax
	setne	al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	__VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
	.globl	t25_evt1
	.bss
	.type	t25_evt1, @object
	.size	t25_evt1, 1
t25_evt1:
	.zero	1
	.globl	_x_t25_evt1
	.type	_x_t25_evt1, @object
	.size	_x_t25_evt1, 1
_x_t25_evt1:
	.zero	1
	.globl	t25_evt0
	.type	t25_evt0, @object
	.size	t25_evt0, 1
t25_evt0:
	.zero	1
	.globl	_x_t25_evt0
	.type	_x_t25_evt0, @object
	.size	_x_t25_evt0, 1
_x_t25_evt0:
	.zero	1
	.globl	t25_x
	.align 4
	.type	t25_x, @object
	.size	t25_x, 4
t25_x:
	.zero	4
	.globl	_x_t25_x
	.align 4
	.type	_x_t25_x, @object
	.size	_x_t25_x, 4
_x_t25_x:
	.zero	4
	.globl	t24_l1
	.type	t24_l1, @object
	.size	t24_l1, 1
t24_l1:
	.zero	1
	.globl	_x_t24_l1
	.type	_x_t24_l1, @object
	.size	_x_t24_l1, 1
_x_t24_l1:
	.zero	1
	.globl	t24_evt1
	.type	t24_evt1, @object
	.size	t24_evt1, 1
t24_evt1:
	.zero	1
	.globl	_x_t24_evt1
	.type	_x_t24_evt1, @object
	.size	_x_t24_evt1, 1
_x_t24_evt1:
	.zero	1
	.globl	t24_evt0
	.type	t24_evt0, @object
	.size	t24_evt0, 1
t24_evt0:
	.zero	1
	.globl	_x_t24_evt0
	.type	_x_t24_evt0, @object
	.size	_x_t24_evt0, 1
_x_t24_evt0:
	.zero	1
	.globl	t24_x
	.align 4
	.type	t24_x, @object
	.size	t24_x, 4
t24_x:
	.zero	4
	.globl	_x_t24_x
	.align 4
	.type	_x_t24_x, @object
	.size	_x_t24_x, 4
_x_t24_x:
	.zero	4
	.globl	t23_l1
	.type	t23_l1, @object
	.size	t23_l1, 1
t23_l1:
	.zero	1
	.globl	_x_t23_l1
	.type	_x_t23_l1, @object
	.size	_x_t23_l1, 1
_x_t23_l1:
	.zero	1
	.globl	t23_evt1
	.type	t23_evt1, @object
	.size	t23_evt1, 1
t23_evt1:
	.zero	1
	.globl	_x_t23_evt1
	.type	_x_t23_evt1, @object
	.size	_x_t23_evt1, 1
_x_t23_evt1:
	.zero	1
	.globl	t23_evt0
	.type	t23_evt0, @object
	.size	t23_evt0, 1
t23_evt0:
	.zero	1
	.globl	_x_t23_evt0
	.type	_x_t23_evt0, @object
	.size	_x_t23_evt0, 1
_x_t23_evt0:
	.zero	1
	.globl	t23_x
	.align 4
	.type	t23_x, @object
	.size	t23_x, 4
t23_x:
	.zero	4
	.globl	_x_t23_x
	.align 4
	.type	_x_t23_x, @object
	.size	_x_t23_x, 4
_x_t23_x:
	.zero	4
	.globl	t22_l1
	.type	t22_l1, @object
	.size	t22_l1, 1
t22_l1:
	.zero	1
	.globl	_x_t22_l1
	.type	_x_t22_l1, @object
	.size	_x_t22_l1, 1
_x_t22_l1:
	.zero	1
	.globl	t8_l1
	.type	t8_l1, @object
	.size	t8_l1, 1
t8_l1:
	.zero	1
	.globl	_x_t8_l1
	.type	_x_t8_l1, @object
	.size	_x_t8_l1, 1
_x_t8_l1:
	.zero	1
	.globl	t9_x
	.align 4
	.type	t9_x, @object
	.size	t9_x, 4
t9_x:
	.zero	4
	.globl	_x_t9_x
	.align 4
	.type	_x_t9_x, @object
	.size	_x_t9_x, 4
_x_t9_x:
	.zero	4
	.globl	t23_l0
	.type	t23_l0, @object
	.size	t23_l0, 1
t23_l0:
	.zero	1
	.globl	_x_t23_l0
	.type	_x_t23_l0, @object
	.size	_x_t23_l0, 1
_x_t23_l0:
	.zero	1
	.globl	t8_evt1
	.type	t8_evt1, @object
	.size	t8_evt1, 1
t8_evt1:
	.zero	1
	.globl	_x_t8_evt1
	.type	_x_t8_evt1, @object
	.size	_x_t8_evt1, 1
_x_t8_evt1:
	.zero	1
	.globl	t8_evt0
	.type	t8_evt0, @object
	.size	t8_evt0, 1
t8_evt0:
	.zero	1
	.globl	_x_t8_evt0
	.type	_x_t8_evt0, @object
	.size	_x_t8_evt0, 1
_x_t8_evt0:
	.zero	1
	.globl	t7_l1
	.type	t7_l1, @object
	.size	t7_l1, 1
t7_l1:
	.zero	1
	.globl	_x_t7_l1
	.type	_x_t7_l1, @object
	.size	_x_t7_l1, 1
_x_t7_l1:
	.zero	1
	.globl	t8_x
	.align 4
	.type	t8_x, @object
	.size	t8_x, 4
t8_x:
	.zero	4
	.globl	_x_t8_x
	.align 4
	.type	_x_t8_x, @object
	.size	_x_t8_x, 4
_x_t8_x:
	.zero	4
	.globl	t7_evt0
	.type	t7_evt0, @object
	.size	t7_evt0, 1
t7_evt0:
	.zero	1
	.globl	_x_t7_evt0
	.type	_x_t7_evt0, @object
	.size	_x_t7_evt0, 1
_x_t7_evt0:
	.zero	1
	.globl	t6_l1
	.type	t6_l1, @object
	.size	t6_l1, 1
t6_l1:
	.zero	1
	.globl	_x_t6_l1
	.type	_x_t6_l1, @object
	.size	_x_t6_l1, 1
_x_t6_l1:
	.zero	1
	.globl	t6_l0
	.type	t6_l0, @object
	.size	t6_l0, 1
t6_l0:
	.zero	1
	.globl	_x_t6_l0
	.type	_x_t6_l0, @object
	.size	_x_t6_l0, 1
_x_t6_l0:
	.zero	1
	.globl	t7_x
	.align 4
	.type	t7_x, @object
	.size	t7_x, 4
t7_x:
	.zero	4
	.globl	_x_t7_x
	.align 4
	.type	_x_t7_x, @object
	.size	_x_t7_x, 4
_x_t7_x:
	.zero	4
	.globl	t6_evt0
	.type	t6_evt0, @object
	.size	t6_evt0, 1
t6_evt0:
	.zero	1
	.globl	_x_t6_evt0
	.type	_x_t6_evt0, @object
	.size	_x_t6_evt0, 1
_x_t6_evt0:
	.zero	1
	.globl	t5_l1
	.type	t5_l1, @object
	.size	t5_l1, 1
t5_l1:
	.zero	1
	.globl	_x_t5_l1
	.type	_x_t5_l1, @object
	.size	_x_t5_l1, 1
_x_t5_l1:
	.zero	1
	.globl	t5_x
	.align 4
	.type	t5_x, @object
	.size	t5_x, 4
t5_x:
	.zero	4
	.globl	_x_t5_x
	.align 4
	.type	_x_t5_x, @object
	.size	_x_t5_x, 4
_x_t5_x:
	.zero	4
	.globl	t4_evt0
	.type	t4_evt0, @object
	.size	t4_evt0, 1
t4_evt0:
	.zero	1
	.globl	_x_t4_evt0
	.type	_x_t4_evt0, @object
	.size	_x_t4_evt0, 1
_x_t4_evt0:
	.zero	1
	.globl	t3_l1
	.type	t3_l1, @object
	.size	t3_l1, 1
t3_l1:
	.zero	1
	.globl	_x_t3_l1
	.type	_x_t3_l1, @object
	.size	_x_t3_l1, 1
_x_t3_l1:
	.zero	1
	.globl	t3_l0
	.type	t3_l0, @object
	.size	t3_l0, 1
t3_l0:
	.zero	1
	.globl	_x_t3_l0
	.type	_x_t3_l0, @object
	.size	_x_t3_l0, 1
_x_t3_l0:
	.zero	1
	.globl	t4_x
	.align 4
	.type	t4_x, @object
	.size	t4_x, 4
t4_x:
	.zero	4
	.globl	_x_t4_x
	.align 4
	.type	_x_t4_x, @object
	.size	_x_t4_x, 4
_x_t4_x:
	.zero	4
	.globl	controller_cnt
	.align 4
	.type	controller_cnt, @object
	.size	controller_cnt, 4
controller_cnt:
	.zero	4
	.globl	_x_controller_cnt
	.align 4
	.type	_x_controller_cnt, @object
	.size	_x_controller_cnt, 4
_x_controller_cnt:
	.zero	4
	.globl	t12_evt0
	.type	t12_evt0, @object
	.size	t12_evt0, 1
t12_evt0:
	.zero	1
	.globl	_x_t12_evt0
	.type	_x_t12_evt0, @object
	.size	_x_t12_evt0, 1
_x_t12_evt0:
	.zero	1
	.globl	t6_x
	.align 4
	.type	t6_x, @object
	.size	t6_x, 4
t6_x:
	.zero	4
	.globl	_x_t6_x
	.align 4
	.type	_x_t6_x, @object
	.size	_x_t6_x, 4
_x_t6_x:
	.zero	4
	.globl	t7_l0
	.type	t7_l0, @object
	.size	t7_l0, 1
t7_l0:
	.zero	1
	.globl	_x_t7_l0
	.type	_x_t7_l0, @object
	.size	_x_t7_l0, 1
_x_t7_l0:
	.zero	1
	.globl	t8_l0
	.type	t8_l0, @object
	.size	t8_l0, 1
t8_l0:
	.zero	1
	.globl	_x_t8_l0
	.type	_x_t8_l0, @object
	.size	_x_t8_l0, 1
_x_t8_l0:
	.zero	1
	.globl	gate_evt1
	.type	gate_evt1, @object
	.size	gate_evt1, 1
gate_evt1:
	.zero	1
	.globl	_x_gate_evt1
	.type	_x_gate_evt1, @object
	.size	_x_gate_evt1, 1
_x_gate_evt1:
	.zero	1
	.globl	t5_evt0
	.type	t5_evt0, @object
	.size	t5_evt0, 1
t5_evt0:
	.zero	1
	.globl	_x_t5_evt0
	.type	_x_t5_evt0, @object
	.size	_x_t5_evt0, 1
_x_t5_evt0:
	.zero	1
	.globl	t4_l1
	.type	t4_l1, @object
	.size	t4_l1, 1
t4_l1:
	.zero	1
	.globl	_x_t4_l1
	.type	_x_t4_l1, @object
	.size	_x_t4_l1, 1
_x_t4_l1:
	.zero	1
	.globl	t14_x
	.align 4
	.type	t14_x, @object
	.size	t14_x, 4
t14_x:
	.zero	4
	.globl	_x_t14_x
	.align 4
	.type	_x_t14_x, @object
	.size	_x_t14_x, 4
_x_t14_x:
	.zero	4
	.globl	t0_l0
	.type	t0_l0, @object
	.size	t0_l0, 1
t0_l0:
	.zero	1
	.globl	_x_t0_l0
	.type	_x_t0_l0, @object
	.size	_x_t0_l0, 1
_x_t0_l0:
	.zero	1
	.globl	t4_l0
	.type	t4_l0, @object
	.size	t4_l0, 1
t4_l0:
	.zero	1
	.globl	_x_t4_l0
	.type	_x_t4_l0, @object
	.size	_x_t4_l0, 1
_x_t4_l0:
	.zero	1
	.globl	t19_evt1
	.type	t19_evt1, @object
	.size	t19_evt1, 1
t19_evt1:
	.zero	1
	.globl	_x_t19_evt1
	.type	_x_t19_evt1, @object
	.size	_x_t19_evt1, 1
_x_t19_evt1:
	.zero	1
	.globl	t5_l0
	.type	t5_l0, @object
	.size	t5_l0, 1
t5_l0:
	.zero	1
	.globl	_x_t5_l0
	.type	_x_t5_l0, @object
	.size	_x_t5_l0, 1
_x_t5_l0:
	.zero	1
	.globl	t14_evt0
	.type	t14_evt0, @object
	.size	t14_evt0, 1
t14_evt0:
	.zero	1
	.globl	_x_t14_evt0
	.type	_x_t14_evt0, @object
	.size	_x_t14_evt0, 1
_x_t14_evt0:
	.zero	1
	.globl	gate_y
	.align 4
	.type	gate_y, @object
	.size	gate_y, 4
gate_y:
	.zero	4
	.globl	_x_gate_y
	.align 4
	.type	_x_gate_y, @object
	.size	_x_gate_y, 4
_x_gate_y:
	.zero	4
	.globl	controller_l0
	.type	controller_l0, @object
	.size	controller_l0, 1
controller_l0:
	.zero	1
	.globl	_x_controller_l0
	.type	_x_controller_l0, @object
	.size	_x_controller_l0, 1
_x_controller_l0:
	.zero	1
	.globl	t19_l1
	.type	t19_l1, @object
	.size	t19_l1, 1
t19_l1:
	.zero	1
	.globl	_x_t19_l1
	.type	_x_t19_l1, @object
	.size	_x_t19_l1, 1
_x_t19_l1:
	.zero	1
	.globl	delta
	.align 4
	.type	delta, @object
	.size	delta, 4
delta:
	.zero	4
	.globl	_x_delta
	.align 4
	.type	_x_delta, @object
	.size	_x_delta, 4
_x_delta:
	.zero	4
	.globl	controller_l1
	.type	controller_l1, @object
	.size	controller_l1, 1
controller_l1:
	.zero	1
	.globl	_x_controller_l1
	.type	_x_controller_l1, @object
	.size	_x_controller_l1, 1
_x_controller_l1:
	.zero	1
	.globl	t2_l0
	.type	t2_l0, @object
	.size	t2_l0, 1
t2_l0:
	.zero	1
	.globl	_x_t2_l0
	.type	_x_t2_l0, @object
	.size	_x_t2_l0, 1
_x_t2_l0:
	.zero	1
	.globl	t25_l1
	.type	t25_l1, @object
	.size	t25_l1, 1
t25_l1:
	.zero	1
	.globl	_x_t25_l1
	.type	_x_t25_l1, @object
	.size	_x_t25_l1, 1
_x_t25_l1:
	.zero	1
	.globl	t0_x
	.align 4
	.type	t0_x, @object
	.size	t0_x, 4
t0_x:
	.zero	4
	.globl	_x_t0_x
	.align 4
	.type	_x_t0_x, @object
	.size	_x_t0_x, 4
_x_t0_x:
	.zero	4
	.globl	t0_evt0
	.type	t0_evt0, @object
	.size	t0_evt0, 1
t0_evt0:
	.zero	1
	.globl	_x_t0_evt0
	.type	_x_t0_evt0, @object
	.size	_x_t0_evt0, 1
_x_t0_evt0:
	.zero	1
	.globl	t22_evt0
	.type	t22_evt0, @object
	.size	t22_evt0, 1
t22_evt0:
	.zero	1
	.globl	_x_t22_evt0
	.type	_x_t22_evt0, @object
	.size	_x_t22_evt0, 1
_x_t22_evt0:
	.zero	1
	.globl	t1_x
	.align 4
	.type	t1_x, @object
	.size	t1_x, 4
t1_x:
	.zero	4
	.globl	_x_t1_x
	.align 4
	.type	_x_t1_x, @object
	.size	_x_t1_x, 4
_x_t1_x:
	.zero	4
	.globl	t0_l1
	.type	t0_l1, @object
	.size	t0_l1, 1
t0_l1:
	.zero	1
	.globl	_x_t0_l1
	.type	_x_t0_l1, @object
	.size	_x_t0_l1, 1
_x_t0_l1:
	.zero	1
	.globl	t7_evt1
	.type	t7_evt1, @object
	.size	t7_evt1, 1
t7_evt1:
	.zero	1
	.globl	_x_t7_evt1
	.type	_x_t7_evt1, @object
	.size	_x_t7_evt1, 1
_x_t7_evt1:
	.zero	1
	.globl	t22_l0
	.type	t22_l0, @object
	.size	t22_l0, 1
t22_l0:
	.zero	1
	.globl	_x_t22_l0
	.type	_x_t22_l0, @object
	.size	_x_t22_l0, 1
_x_t22_l0:
	.zero	1
	.globl	t1_evt0
	.type	t1_evt0, @object
	.size	t1_evt0, 1
t1_evt0:
	.zero	1
	.globl	_x_t1_evt0
	.type	_x_t1_evt0, @object
	.size	_x_t1_evt0, 1
_x_t1_evt0:
	.zero	1
	.globl	t1_l0
	.type	t1_l0, @object
	.size	t1_l0, 1
t1_l0:
	.zero	1
	.globl	_x_t1_l0
	.type	_x_t1_l0, @object
	.size	_x_t1_l0, 1
_x_t1_l0:
	.zero	1
	.globl	t2_x
	.align 4
	.type	t2_x, @object
	.size	t2_x, 4
t2_x:
	.zero	4
	.globl	_x_t2_x
	.align 4
	.type	_x_t2_x, @object
	.size	_x_t2_x, 4
_x_t2_x:
	.zero	4
	.globl	t2_l1
	.type	t2_l1, @object
	.size	t2_l1, 1
t2_l1:
	.zero	1
	.globl	_x_t2_l1
	.type	_x_t2_l1, @object
	.size	_x_t2_l1, 1
_x_t2_l1:
	.zero	1
	.globl	t1_l1
	.type	t1_l1, @object
	.size	t1_l1, 1
t1_l1:
	.zero	1
	.globl	_x_t1_l1
	.type	_x_t1_l1, @object
	.size	_x_t1_l1, 1
_x_t1_l1:
	.zero	1
	.globl	controller_evt1
	.type	controller_evt1, @object
	.size	controller_evt1, 1
controller_evt1:
	.zero	1
	.globl	_x_controller_evt1
	.type	_x_controller_evt1, @object
	.size	_x_controller_evt1, 1
_x_controller_evt1:
	.zero	1
	.globl	t2_evt0
	.type	t2_evt0, @object
	.size	t2_evt0, 1
t2_evt0:
	.zero	1
	.globl	_x_t2_evt0
	.type	_x_t2_evt0, @object
	.size	_x_t2_evt0, 1
_x_t2_evt0:
	.zero	1
	.globl	t3_evt0
	.type	t3_evt0, @object
	.size	t3_evt0, 1
t3_evt0:
	.zero	1
	.globl	_x_t3_evt0
	.type	_x_t3_evt0, @object
	.size	_x_t3_evt0, 1
_x_t3_evt0:
	.zero	1
	.globl	t17_l1
	.type	t17_l1, @object
	.size	t17_l1, 1
t17_l1:
	.zero	1
	.globl	_x_t17_l1
	.type	_x_t17_l1, @object
	.size	_x_t17_l1, 1
_x_t17_l1:
	.zero	1
	.globl	_diverge_delta
	.align 4
	.type	_diverge_delta, @object
	.size	_diverge_delta, 4
_diverge_delta:
	.zero	4
	.globl	_x__diverge_delta
	.align 4
	.type	_x__diverge_delta, @object
	.size	_x__diverge_delta, 4
_x__diverge_delta:
	.zero	4
	.globl	t3_x
	.align 4
	.type	t3_x, @object
	.size	t3_x, 4
t3_x:
	.zero	4
	.globl	_x_t3_x
	.align 4
	.type	_x_t3_x, @object
	.size	_x_t3_x, 4
_x_t3_x:
	.zero	4
	.globl	t9_evt0
	.type	t9_evt0, @object
	.size	t9_evt0, 1
t9_evt0:
	.zero	1
	.globl	_x_t9_evt0
	.type	_x_t9_evt0, @object
	.size	_x_t9_evt0, 1
_x_t9_evt0:
	.zero	1
	.globl	t24_l0
	.type	t24_l0, @object
	.size	t24_l0, 1
t24_l0:
	.zero	1
	.globl	_x_t24_l0
	.type	_x_t24_l0, @object
	.size	_x_t24_l0, 1
_x_t24_l0:
	.zero	1
	.globl	t9_evt1
	.type	t9_evt1, @object
	.size	t9_evt1, 1
t9_evt1:
	.zero	1
	.globl	_x_t9_evt1
	.type	_x_t9_evt1, @object
	.size	_x_t9_evt1, 1
_x_t9_evt1:
	.zero	1
	.globl	t9_l0
	.type	t9_l0, @object
	.size	t9_l0, 1
t9_l0:
	.zero	1
	.globl	_x_t9_l0
	.type	_x_t9_l0, @object
	.size	_x_t9_l0, 1
_x_t9_l0:
	.zero	1
	.globl	t9_l1
	.type	t9_l1, @object
	.size	t9_l1, 1
t9_l1:
	.zero	1
	.globl	_x_t9_l1
	.type	_x_t9_l1, @object
	.size	_x_t9_l1, 1
_x_t9_l1:
	.zero	1
	.globl	t10_x
	.align 4
	.type	t10_x, @object
	.size	t10_x, 4
t10_x:
	.zero	4
	.globl	_x_t10_x
	.align 4
	.type	_x_t10_x, @object
	.size	_x_t10_x, 4
_x_t10_x:
	.zero	4
	.globl	t10_evt0
	.type	t10_evt0, @object
	.size	t10_evt0, 1
t10_evt0:
	.zero	1
	.globl	_x_t10_evt0
	.type	_x_t10_evt0, @object
	.size	_x_t10_evt0, 1
_x_t10_evt0:
	.zero	1
	.globl	t25_l0
	.type	t25_l0, @object
	.size	t25_l0, 1
t25_l0:
	.zero	1
	.globl	_x_t25_l0
	.type	_x_t25_l0, @object
	.size	_x_t25_l0, 1
_x_t25_l0:
	.zero	1
	.globl	t10_evt1
	.type	t10_evt1, @object
	.size	t10_evt1, 1
t10_evt1:
	.zero	1
	.globl	_x_t10_evt1
	.type	_x_t10_evt1, @object
	.size	_x_t10_evt1, 1
_x_t10_evt1:
	.zero	1
	.globl	t10_l0
	.type	t10_l0, @object
	.size	t10_l0, 1
t10_l0:
	.zero	1
	.globl	_x_t10_l0
	.type	_x_t10_l0, @object
	.size	_x_t10_l0, 1
_x_t10_l0:
	.zero	1
	.globl	t10_l1
	.type	t10_l1, @object
	.size	t10_l1, 1
t10_l1:
	.zero	1
	.globl	_x_t10_l1
	.type	_x_t10_l1, @object
	.size	_x_t10_l1, 1
_x_t10_l1:
	.zero	1
	.globl	t11_x
	.align 4
	.type	t11_x, @object
	.size	t11_x, 4
t11_x:
	.zero	4
	.globl	_x_t11_x
	.align 4
	.type	_x_t11_x, @object
	.size	_x_t11_x, 4
_x_t11_x:
	.zero	4
	.globl	t11_evt0
	.type	t11_evt0, @object
	.size	t11_evt0, 1
t11_evt0:
	.zero	1
	.globl	_x_t11_evt0
	.type	_x_t11_evt0, @object
	.size	_x_t11_evt0, 1
_x_t11_evt0:
	.zero	1
	.globl	t11_evt1
	.type	t11_evt1, @object
	.size	t11_evt1, 1
t11_evt1:
	.zero	1
	.globl	_x_t11_evt1
	.type	_x_t11_evt1, @object
	.size	_x_t11_evt1, 1
_x_t11_evt1:
	.zero	1
	.globl	t11_l0
	.type	t11_l0, @object
	.size	t11_l0, 1
t11_l0:
	.zero	1
	.globl	_x_t11_l0
	.type	_x_t11_l0, @object
	.size	_x_t11_l0, 1
_x_t11_l0:
	.zero	1
	.globl	t11_l1
	.type	t11_l1, @object
	.size	t11_l1, 1
t11_l1:
	.zero	1
	.globl	_x_t11_l1
	.type	_x_t11_l1, @object
	.size	_x_t11_l1, 1
_x_t11_l1:
	.zero	1
	.globl	controller_z
	.align 4
	.type	controller_z, @object
	.size	controller_z, 4
controller_z:
	.zero	4
	.globl	_x_controller_z
	.align 4
	.type	_x_controller_z, @object
	.size	_x_controller_z, 4
_x_controller_z:
	.zero	4
	.globl	t12_x
	.align 4
	.type	t12_x, @object
	.size	t12_x, 4
t12_x:
	.zero	4
	.globl	_x_t12_x
	.align 4
	.type	_x_t12_x, @object
	.size	_x_t12_x, 4
_x_t12_x:
	.zero	4
	.globl	t12_evt1
	.type	t12_evt1, @object
	.size	t12_evt1, 1
t12_evt1:
	.zero	1
	.globl	_x_t12_evt1
	.type	_x_t12_evt1, @object
	.size	_x_t12_evt1, 1
_x_t12_evt1:
	.zero	1
	.globl	t12_l0
	.type	t12_l0, @object
	.size	t12_l0, 1
t12_l0:
	.zero	1
	.globl	_x_t12_l0
	.type	_x_t12_l0, @object
	.size	_x_t12_l0, 1
_x_t12_l0:
	.zero	1
	.globl	controller_evt0
	.type	controller_evt0, @object
	.size	controller_evt0, 1
controller_evt0:
	.zero	1
	.globl	_x_controller_evt0
	.type	_x_controller_evt0, @object
	.size	_x_controller_evt0, 1
_x_controller_evt0:
	.zero	1
	.globl	t12_l1
	.type	t12_l1, @object
	.size	t12_l1, 1
t12_l1:
	.zero	1
	.globl	_x_t12_l1
	.type	_x_t12_l1, @object
	.size	_x_t12_l1, 1
_x_t12_l1:
	.zero	1
	.globl	t13_x
	.align 4
	.type	t13_x, @object
	.size	t13_x, 4
t13_x:
	.zero	4
	.globl	_x_t13_x
	.align 4
	.type	_x_t13_x, @object
	.size	_x_t13_x, 4
_x_t13_x:
	.zero	4
	.globl	t13_evt0
	.type	t13_evt0, @object
	.size	t13_evt0, 1
t13_evt0:
	.zero	1
	.globl	_x_t13_evt0
	.type	_x_t13_evt0, @object
	.size	_x_t13_evt0, 1
_x_t13_evt0:
	.zero	1
	.globl	t13_evt1
	.type	t13_evt1, @object
	.size	t13_evt1, 1
t13_evt1:
	.zero	1
	.globl	_x_t13_evt1
	.type	_x_t13_evt1, @object
	.size	_x_t13_evt1, 1
_x_t13_evt1:
	.zero	1
	.globl	t13_l0
	.type	t13_l0, @object
	.size	t13_l0, 1
t13_l0:
	.zero	1
	.globl	_x_t13_l0
	.type	_x_t13_l0, @object
	.size	_x_t13_l0, 1
_x_t13_l0:
	.zero	1
	.globl	t13_l1
	.type	t13_l1, @object
	.size	t13_l1, 1
t13_l1:
	.zero	1
	.globl	_x_t13_l1
	.type	_x_t13_l1, @object
	.size	_x_t13_l1, 1
_x_t13_l1:
	.zero	1
	.globl	t14_evt1
	.type	t14_evt1, @object
	.size	t14_evt1, 1
t14_evt1:
	.zero	1
	.globl	_x_t14_evt1
	.type	_x_t14_evt1, @object
	.size	_x_t14_evt1, 1
_x_t14_evt1:
	.zero	1
	.globl	t14_l0
	.type	t14_l0, @object
	.size	t14_l0, 1
t14_l0:
	.zero	1
	.globl	_x_t14_l0
	.type	_x_t14_l0, @object
	.size	_x_t14_l0, 1
_x_t14_l0:
	.zero	1
	.globl	t14_l1
	.type	t14_l1, @object
	.size	t14_l1, 1
t14_l1:
	.zero	1
	.globl	_x_t14_l1
	.type	_x_t14_l1, @object
	.size	_x_t14_l1, 1
_x_t14_l1:
	.zero	1
	.globl	t15_x
	.align 4
	.type	t15_x, @object
	.size	t15_x, 4
t15_x:
	.zero	4
	.globl	_x_t15_x
	.align 4
	.type	_x_t15_x, @object
	.size	_x_t15_x, 4
_x_t15_x:
	.zero	4
	.globl	t15_evt0
	.type	t15_evt0, @object
	.size	t15_evt0, 1
t15_evt0:
	.zero	1
	.globl	_x_t15_evt0
	.type	_x_t15_evt0, @object
	.size	_x_t15_evt0, 1
_x_t15_evt0:
	.zero	1
	.globl	t15_evt1
	.type	t15_evt1, @object
	.size	t15_evt1, 1
t15_evt1:
	.zero	1
	.globl	_x_t15_evt1
	.type	_x_t15_evt1, @object
	.size	_x_t15_evt1, 1
_x_t15_evt1:
	.zero	1
	.globl	t0_evt1
	.type	t0_evt1, @object
	.size	t0_evt1, 1
t0_evt1:
	.zero	1
	.globl	_x_t0_evt1
	.type	_x_t0_evt1, @object
	.size	_x_t0_evt1, 1
_x_t0_evt1:
	.zero	1
	.globl	t15_l0
	.type	t15_l0, @object
	.size	t15_l0, 1
t15_l0:
	.zero	1
	.globl	_x_t15_l0
	.type	_x_t15_l0, @object
	.size	_x_t15_l0, 1
_x_t15_l0:
	.zero	1
	.globl	t15_l1
	.type	t15_l1, @object
	.size	t15_l1, 1
t15_l1:
	.zero	1
	.globl	_x_t15_l1
	.type	_x_t15_l1, @object
	.size	_x_t15_l1, 1
_x_t15_l1:
	.zero	1
	.globl	t16_x
	.align 4
	.type	t16_x, @object
	.size	t16_x, 4
t16_x:
	.zero	4
	.globl	_x_t16_x
	.align 4
	.type	_x_t16_x, @object
	.size	_x_t16_x, 4
_x_t16_x:
	.zero	4
	.globl	t16_evt0
	.type	t16_evt0, @object
	.size	t16_evt0, 1
t16_evt0:
	.zero	1
	.globl	_x_t16_evt0
	.type	_x_t16_evt0, @object
	.size	_x_t16_evt0, 1
_x_t16_evt0:
	.zero	1
	.globl	t16_evt1
	.type	t16_evt1, @object
	.size	t16_evt1, 1
t16_evt1:
	.zero	1
	.globl	_x_t16_evt1
	.type	_x_t16_evt1, @object
	.size	_x_t16_evt1, 1
_x_t16_evt1:
	.zero	1
	.globl	t1_evt1
	.type	t1_evt1, @object
	.size	t1_evt1, 1
t1_evt1:
	.zero	1
	.globl	_x_t1_evt1
	.type	_x_t1_evt1, @object
	.size	_x_t1_evt1, 1
_x_t1_evt1:
	.zero	1
	.globl	t16_l0
	.type	t16_l0, @object
	.size	t16_l0, 1
t16_l0:
	.zero	1
	.globl	_x_t16_l0
	.type	_x_t16_l0, @object
	.size	_x_t16_l0, 1
_x_t16_l0:
	.zero	1
	.globl	t16_l1
	.type	t16_l1, @object
	.size	t16_l1, 1
t16_l1:
	.zero	1
	.globl	_x_t16_l1
	.type	_x_t16_l1, @object
	.size	_x_t16_l1, 1
_x_t16_l1:
	.zero	1
	.globl	t17_x
	.align 4
	.type	t17_x, @object
	.size	t17_x, 4
t17_x:
	.zero	4
	.globl	_x_t17_x
	.align 4
	.type	_x_t17_x, @object
	.size	_x_t17_x, 4
_x_t17_x:
	.zero	4
	.globl	t17_evt0
	.type	t17_evt0, @object
	.size	t17_evt0, 1
t17_evt0:
	.zero	1
	.globl	_x_t17_evt0
	.type	_x_t17_evt0, @object
	.size	_x_t17_evt0, 1
_x_t17_evt0:
	.zero	1
	.globl	t17_evt1
	.type	t17_evt1, @object
	.size	t17_evt1, 1
t17_evt1:
	.zero	1
	.globl	_x_t17_evt1
	.type	_x_t17_evt1, @object
	.size	_x_t17_evt1, 1
_x_t17_evt1:
	.zero	1
	.globl	controller_evt2
	.type	controller_evt2, @object
	.size	controller_evt2, 1
controller_evt2:
	.zero	1
	.globl	_x_controller_evt2
	.type	_x_controller_evt2, @object
	.size	_x_controller_evt2, 1
_x_controller_evt2:
	.zero	1
	.globl	t2_evt1
	.type	t2_evt1, @object
	.size	t2_evt1, 1
t2_evt1:
	.zero	1
	.globl	_x_t2_evt1
	.type	_x_t2_evt1, @object
	.size	_x_t2_evt1, 1
_x_t2_evt1:
	.zero	1
	.globl	t17_l0
	.type	t17_l0, @object
	.size	t17_l0, 1
t17_l0:
	.zero	1
	.globl	_x_t17_l0
	.type	_x_t17_l0, @object
	.size	_x_t17_l0, 1
_x_t17_l0:
	.zero	1
	.globl	gate_evt0
	.type	gate_evt0, @object
	.size	gate_evt0, 1
gate_evt0:
	.zero	1
	.globl	_x_gate_evt0
	.type	_x_gate_evt0, @object
	.size	_x_gate_evt0, 1
_x_gate_evt0:
	.zero	1
	.globl	t18_x
	.align 4
	.type	t18_x, @object
	.size	t18_x, 4
t18_x:
	.zero	4
	.globl	_x_t18_x
	.align 4
	.type	_x_t18_x, @object
	.size	_x_t18_x, 4
_x_t18_x:
	.zero	4
	.globl	gate_l0
	.type	gate_l0, @object
	.size	gate_l0, 1
gate_l0:
	.zero	1
	.globl	_x_gate_l0
	.type	_x_gate_l0, @object
	.size	_x_gate_l0, 1
_x_gate_l0:
	.zero	1
	.globl	t18_evt0
	.type	t18_evt0, @object
	.size	t18_evt0, 1
t18_evt0:
	.zero	1
	.globl	_x_t18_evt0
	.type	_x_t18_evt0, @object
	.size	_x_t18_evt0, 1
_x_t18_evt0:
	.zero	1
	.globl	gate_l1
	.type	gate_l1, @object
	.size	gate_l1, 1
gate_l1:
	.zero	1
	.globl	_x_gate_l1
	.type	_x_gate_l1, @object
	.size	_x_gate_l1, 1
_x_gate_l1:
	.zero	1
	.globl	t18_evt1
	.type	t18_evt1, @object
	.size	t18_evt1, 1
t18_evt1:
	.zero	1
	.globl	_x_t18_evt1
	.type	_x_t18_evt1, @object
	.size	_x_t18_evt1, 1
_x_t18_evt1:
	.zero	1
	.globl	t3_evt1
	.type	t3_evt1, @object
	.size	t3_evt1, 1
t3_evt1:
	.zero	1
	.globl	_x_t3_evt1
	.type	_x_t3_evt1, @object
	.size	_x_t3_evt1, 1
_x_t3_evt1:
	.zero	1
	.globl	t18_l0
	.type	t18_l0, @object
	.size	t18_l0, 1
t18_l0:
	.zero	1
	.globl	_x_t18_l0
	.type	_x_t18_l0, @object
	.size	_x_t18_l0, 1
_x_t18_l0:
	.zero	1
	.globl	t18_l1
	.type	t18_l1, @object
	.size	t18_l1, 1
t18_l1:
	.zero	1
	.globl	_x_t18_l1
	.type	_x_t18_l1, @object
	.size	_x_t18_l1, 1
_x_t18_l1:
	.zero	1
	.globl	t19_x
	.align 4
	.type	t19_x, @object
	.size	t19_x, 4
t19_x:
	.zero	4
	.globl	_x_t19_x
	.align 4
	.type	_x_t19_x, @object
	.size	_x_t19_x, 4
_x_t19_x:
	.zero	4
	.globl	t19_evt0
	.type	t19_evt0, @object
	.size	t19_evt0, 1
t19_evt0:
	.zero	1
	.globl	_x_t19_evt0
	.type	_x_t19_evt0, @object
	.size	_x_t19_evt0, 1
_x_t19_evt0:
	.zero	1
	.globl	t4_evt1
	.type	t4_evt1, @object
	.size	t4_evt1, 1
t4_evt1:
	.zero	1
	.globl	_x_t4_evt1
	.type	_x_t4_evt1, @object
	.size	_x_t4_evt1, 1
_x_t4_evt1:
	.zero	1
	.globl	t19_l0
	.type	t19_l0, @object
	.size	t19_l0, 1
t19_l0:
	.zero	1
	.globl	_x_t19_l0
	.type	_x_t19_l0, @object
	.size	_x_t19_l0, 1
_x_t19_l0:
	.zero	1
	.globl	t20_x
	.align 4
	.type	t20_x, @object
	.size	t20_x, 4
t20_x:
	.zero	4
	.globl	_x_t20_x
	.align 4
	.type	_x_t20_x, @object
	.size	_x_t20_x, 4
_x_t20_x:
	.zero	4
	.globl	t20_evt0
	.type	t20_evt0, @object
	.size	t20_evt0, 1
t20_evt0:
	.zero	1
	.globl	_x_t20_evt0
	.type	_x_t20_evt0, @object
	.size	_x_t20_evt0, 1
_x_t20_evt0:
	.zero	1
	.globl	t20_evt1
	.type	t20_evt1, @object
	.size	t20_evt1, 1
t20_evt1:
	.zero	1
	.globl	_x_t20_evt1
	.type	_x_t20_evt1, @object
	.size	_x_t20_evt1, 1
_x_t20_evt1:
	.zero	1
	.globl	t5_evt1
	.type	t5_evt1, @object
	.size	t5_evt1, 1
t5_evt1:
	.zero	1
	.globl	_x_t5_evt1
	.type	_x_t5_evt1, @object
	.size	_x_t5_evt1, 1
_x_t5_evt1:
	.zero	1
	.globl	t20_l0
	.type	t20_l0, @object
	.size	t20_l0, 1
t20_l0:
	.zero	1
	.globl	_x_t20_l0
	.type	_x_t20_l0, @object
	.size	_x_t20_l0, 1
_x_t20_l0:
	.zero	1
	.globl	t20_l1
	.type	t20_l1, @object
	.size	t20_l1, 1
t20_l1:
	.zero	1
	.globl	_x_t20_l1
	.type	_x_t20_l1, @object
	.size	_x_t20_l1, 1
_x_t20_l1:
	.zero	1
	.globl	t21_x
	.align 4
	.type	t21_x, @object
	.size	t21_x, 4
t21_x:
	.zero	4
	.globl	_x_t21_x
	.align 4
	.type	_x_t21_x, @object
	.size	_x_t21_x, 4
_x_t21_x:
	.zero	4
	.globl	t21_evt0
	.type	t21_evt0, @object
	.size	t21_evt0, 1
t21_evt0:
	.zero	1
	.globl	_x_t21_evt0
	.type	_x_t21_evt0, @object
	.size	_x_t21_evt0, 1
_x_t21_evt0:
	.zero	1
	.globl	t21_evt1
	.type	t21_evt1, @object
	.size	t21_evt1, 1
t21_evt1:
	.zero	1
	.globl	_x_t21_evt1
	.type	_x_t21_evt1, @object
	.size	_x_t21_evt1, 1
_x_t21_evt1:
	.zero	1
	.globl	t6_evt1
	.type	t6_evt1, @object
	.size	t6_evt1, 1
t6_evt1:
	.zero	1
	.globl	_x_t6_evt1
	.type	_x_t6_evt1, @object
	.size	_x_t6_evt1, 1
_x_t6_evt1:
	.zero	1
	.globl	t21_l0
	.type	t21_l0, @object
	.size	t21_l0, 1
t21_l0:
	.zero	1
	.globl	_x_t21_l0
	.type	_x_t21_l0, @object
	.size	_x_t21_l0, 1
_x_t21_l0:
	.zero	1
	.globl	t21_l1
	.type	t21_l1, @object
	.size	t21_l1, 1
t21_l1:
	.zero	1
	.globl	_x_t21_l1
	.type	_x_t21_l1, @object
	.size	_x_t21_l1, 1
_x_t21_l1:
	.zero	1
	.globl	t22_x
	.align 4
	.type	t22_x, @object
	.size	t22_x, 4
t22_x:
	.zero	4
	.globl	_x_t22_x
	.align 4
	.type	_x_t22_x, @object
	.size	_x_t22_x, 4
_x_t22_x:
	.zero	4
	.globl	t22_evt1
	.type	t22_evt1, @object
	.size	t22_evt1, 1
t22_evt1:
	.zero	1
	.globl	_x_t22_evt1
	.type	_x_t22_evt1, @object
	.size	_x_t22_evt1, 1
_x_t22_evt1:
	.zero	1
	.text
	.globl	main
	.type	main, @function
main:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t25_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t25_evt0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t25_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t24_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t24_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t24_evt0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t24_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t23_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t23_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t23_evt0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t23_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t22_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t8_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t9_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t23_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t8_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t8_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t7_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t8_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t7_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t6_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t6_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t7_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t6_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t5_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t5_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t4_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t3_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t3_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t4_x[rip], eax
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR controller_cnt[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t12_evt0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t6_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t7_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t8_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR gate_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t5_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t4_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t14_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t0_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t4_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t19_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t5_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t14_evt0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR gate_y[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR controller_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t19_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR delta[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR controller_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t2_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t25_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t0_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t0_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t22_evt0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t1_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t0_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t7_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t22_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t1_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t1_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t2_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t2_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t1_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR controller_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t2_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t3_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t17_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _diverge_delta[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t3_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t9_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t24_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t9_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t9_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t9_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t10_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t10_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t25_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t10_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t10_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t10_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t11_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t11_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t11_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t11_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t11_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR controller_z[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t12_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t12_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t12_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR controller_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t12_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t13_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t13_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t13_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t13_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t13_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t14_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t14_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t14_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t15_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t15_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t15_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t0_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t15_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t15_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t16_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t16_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t16_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t1_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t16_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t16_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t17_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t17_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t17_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR controller_evt2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t2_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t17_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR gate_evt0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t18_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR gate_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t18_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR gate_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t18_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t3_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t18_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t18_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t19_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t19_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t4_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t19_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t20_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t20_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t20_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t5_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t20_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t20_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t21_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t21_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t21_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t6_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t21_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t21_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t22_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t22_evt1[rip], al
	movzx	eax, BYTE PTR t25_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t25_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t25_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t25_l0[rip]
	test	al, al
	jne	.L6
	movzx	eax, BYTE PTR t25_l1[rip]
	test	al, al
	je	.L7
.L6:
	movzx	eax, BYTE PTR t25_l0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR t25_l1[rip]
	test	al, al
	je	.L7
.L8:
	movzx	eax, BYTE PTR t25_l1[rip]
	test	al, al
	je	.L9
	movzx	eax, BYTE PTR t25_l0[rip]
	test	al, al
	je	.L7
.L9:
	movzx	eax, BYTE PTR t25_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t25_l1[rip]
	test	al, al
	je	.L4
.L7:
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L10
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L11
.L10:
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	je	.L12
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L11
.L12:
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L13
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	je	.L11
.L13:
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L4
.L11:
	movzx	eax, BYTE PTR t25_l0[rip]
	test	al, al
	jne	.L14
	movzx	eax, BYTE PTR t25_l1[rip]
	test	al, al
	je	.L15
.L14:
	movss	xmm1, DWORD PTR t25_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L15:
	movzx	eax, BYTE PTR t24_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t24_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t24_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t24_l0[rip]
	test	al, al
	jne	.L18
	movzx	eax, BYTE PTR t24_l1[rip]
	test	al, al
	je	.L19
.L18:
	movzx	eax, BYTE PTR t24_l0[rip]
	test	al, al
	je	.L20
	movzx	eax, BYTE PTR t24_l1[rip]
	test	al, al
	je	.L19
.L20:
	movzx	eax, BYTE PTR t24_l1[rip]
	test	al, al
	je	.L21
	movzx	eax, BYTE PTR t24_l0[rip]
	test	al, al
	je	.L19
.L21:
	movzx	eax, BYTE PTR t24_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t24_l1[rip]
	test	al, al
	je	.L4
.L19:
	movzx	eax, BYTE PTR t24_evt0[rip]
	test	al, al
	jne	.L22
	movzx	eax, BYTE PTR t24_evt1[rip]
	test	al, al
	je	.L23
.L22:
	movzx	eax, BYTE PTR t24_evt0[rip]
	test	al, al
	je	.L24
	movzx	eax, BYTE PTR t24_evt1[rip]
	test	al, al
	je	.L23
.L24:
	movzx	eax, BYTE PTR t24_evt1[rip]
	test	al, al
	je	.L25
	movzx	eax, BYTE PTR t24_evt0[rip]
	test	al, al
	je	.L23
.L25:
	movzx	eax, BYTE PTR t24_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t24_evt1[rip]
	test	al, al
	je	.L4
.L23:
	movzx	eax, BYTE PTR t24_l0[rip]
	test	al, al
	jne	.L26
	movzx	eax, BYTE PTR t24_l1[rip]
	test	al, al
	je	.L27
.L26:
	movss	xmm1, DWORD PTR t24_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L27:
	movzx	eax, BYTE PTR t23_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t23_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t23_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t23_l0[rip]
	test	al, al
	jne	.L30
	movzx	eax, BYTE PTR t23_l1[rip]
	test	al, al
	je	.L31
.L30:
	movzx	eax, BYTE PTR t23_l0[rip]
	test	al, al
	je	.L32
	movzx	eax, BYTE PTR t23_l1[rip]
	test	al, al
	je	.L31
.L32:
	movzx	eax, BYTE PTR t23_l1[rip]
	test	al, al
	je	.L33
	movzx	eax, BYTE PTR t23_l0[rip]
	test	al, al
	je	.L31
.L33:
	movzx	eax, BYTE PTR t23_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t23_l1[rip]
	test	al, al
	je	.L4
.L31:
	movzx	eax, BYTE PTR t23_evt0[rip]
	test	al, al
	jne	.L34
	movzx	eax, BYTE PTR t23_evt1[rip]
	test	al, al
	je	.L35
.L34:
	movzx	eax, BYTE PTR t23_evt0[rip]
	test	al, al
	je	.L36
	movzx	eax, BYTE PTR t23_evt1[rip]
	test	al, al
	je	.L35
.L36:
	movzx	eax, BYTE PTR t23_evt1[rip]
	test	al, al
	je	.L37
	movzx	eax, BYTE PTR t23_evt0[rip]
	test	al, al
	je	.L35
.L37:
	movzx	eax, BYTE PTR t23_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t23_evt1[rip]
	test	al, al
	je	.L4
.L35:
	movzx	eax, BYTE PTR t23_l0[rip]
	test	al, al
	jne	.L38
	movzx	eax, BYTE PTR t23_l1[rip]
	test	al, al
	je	.L39
.L38:
	movss	xmm1, DWORD PTR t23_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L39:
	movzx	eax, BYTE PTR t22_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t22_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t22_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t22_l0[rip]
	test	al, al
	jne	.L42
	movzx	eax, BYTE PTR t22_l1[rip]
	test	al, al
	je	.L43
.L42:
	movzx	eax, BYTE PTR t22_l0[rip]
	test	al, al
	je	.L44
	movzx	eax, BYTE PTR t22_l1[rip]
	test	al, al
	je	.L43
.L44:
	movzx	eax, BYTE PTR t22_l1[rip]
	test	al, al
	je	.L45
	movzx	eax, BYTE PTR t22_l0[rip]
	test	al, al
	je	.L43
.L45:
	movzx	eax, BYTE PTR t22_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t22_l1[rip]
	test	al, al
	je	.L4
.L43:
	movzx	eax, BYTE PTR t22_evt0[rip]
	test	al, al
	jne	.L46
	movzx	eax, BYTE PTR t22_evt1[rip]
	test	al, al
	je	.L47
.L46:
	movzx	eax, BYTE PTR t22_evt0[rip]
	test	al, al
	je	.L48
	movzx	eax, BYTE PTR t22_evt1[rip]
	test	al, al
	je	.L47
.L48:
	movzx	eax, BYTE PTR t22_evt1[rip]
	test	al, al
	je	.L49
	movzx	eax, BYTE PTR t22_evt0[rip]
	test	al, al
	je	.L47
.L49:
	movzx	eax, BYTE PTR t22_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t22_evt1[rip]
	test	al, al
	je	.L4
.L47:
	movzx	eax, BYTE PTR t22_l0[rip]
	test	al, al
	jne	.L50
	movzx	eax, BYTE PTR t22_l1[rip]
	test	al, al
	je	.L51
.L50:
	movss	xmm1, DWORD PTR t22_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L51:
	movzx	eax, BYTE PTR t21_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t21_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t21_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t21_l0[rip]
	test	al, al
	jne	.L54
	movzx	eax, BYTE PTR t21_l1[rip]
	test	al, al
	je	.L55
.L54:
	movzx	eax, BYTE PTR t21_l0[rip]
	test	al, al
	je	.L56
	movzx	eax, BYTE PTR t21_l1[rip]
	test	al, al
	je	.L55
.L56:
	movzx	eax, BYTE PTR t21_l1[rip]
	test	al, al
	je	.L57
	movzx	eax, BYTE PTR t21_l0[rip]
	test	al, al
	je	.L55
.L57:
	movzx	eax, BYTE PTR t21_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t21_l1[rip]
	test	al, al
	je	.L4
.L55:
	movzx	eax, BYTE PTR t21_evt0[rip]
	test	al, al
	jne	.L58
	movzx	eax, BYTE PTR t21_evt1[rip]
	test	al, al
	je	.L59
.L58:
	movzx	eax, BYTE PTR t21_evt0[rip]
	test	al, al
	je	.L60
	movzx	eax, BYTE PTR t21_evt1[rip]
	test	al, al
	je	.L59
.L60:
	movzx	eax, BYTE PTR t21_evt1[rip]
	test	al, al
	je	.L61
	movzx	eax, BYTE PTR t21_evt0[rip]
	test	al, al
	je	.L59
.L61:
	movzx	eax, BYTE PTR t21_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t21_evt1[rip]
	test	al, al
	je	.L4
.L59:
	movzx	eax, BYTE PTR t21_l0[rip]
	test	al, al
	jne	.L62
	movzx	eax, BYTE PTR t21_l1[rip]
	test	al, al
	je	.L63
.L62:
	movss	xmm1, DWORD PTR t21_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L63:
	movzx	eax, BYTE PTR t20_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t20_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t20_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t20_l0[rip]
	test	al, al
	jne	.L66
	movzx	eax, BYTE PTR t20_l1[rip]
	test	al, al
	je	.L67
.L66:
	movzx	eax, BYTE PTR t20_l0[rip]
	test	al, al
	je	.L68
	movzx	eax, BYTE PTR t20_l1[rip]
	test	al, al
	je	.L67
.L68:
	movzx	eax, BYTE PTR t20_l1[rip]
	test	al, al
	je	.L69
	movzx	eax, BYTE PTR t20_l0[rip]
	test	al, al
	je	.L67
.L69:
	movzx	eax, BYTE PTR t20_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t20_l1[rip]
	test	al, al
	je	.L4
.L67:
	movzx	eax, BYTE PTR t20_evt0[rip]
	test	al, al
	jne	.L70
	movzx	eax, BYTE PTR t20_evt1[rip]
	test	al, al
	je	.L71
.L70:
	movzx	eax, BYTE PTR t20_evt0[rip]
	test	al, al
	je	.L72
	movzx	eax, BYTE PTR t20_evt1[rip]
	test	al, al
	je	.L71
.L72:
	movzx	eax, BYTE PTR t20_evt1[rip]
	test	al, al
	je	.L73
	movzx	eax, BYTE PTR t20_evt0[rip]
	test	al, al
	je	.L71
.L73:
	movzx	eax, BYTE PTR t20_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t20_evt1[rip]
	test	al, al
	je	.L4
.L71:
	movzx	eax, BYTE PTR t20_l0[rip]
	test	al, al
	jne	.L74
	movzx	eax, BYTE PTR t20_l1[rip]
	test	al, al
	je	.L75
.L74:
	movss	xmm1, DWORD PTR t20_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L75:
	movzx	eax, BYTE PTR t19_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t19_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t19_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t19_l0[rip]
	test	al, al
	jne	.L78
	movzx	eax, BYTE PTR t19_l1[rip]
	test	al, al
	je	.L79
.L78:
	movzx	eax, BYTE PTR t19_l0[rip]
	test	al, al
	je	.L80
	movzx	eax, BYTE PTR t19_l1[rip]
	test	al, al
	je	.L79
.L80:
	movzx	eax, BYTE PTR t19_l1[rip]
	test	al, al
	je	.L81
	movzx	eax, BYTE PTR t19_l0[rip]
	test	al, al
	je	.L79
.L81:
	movzx	eax, BYTE PTR t19_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t19_l1[rip]
	test	al, al
	je	.L4
.L79:
	movzx	eax, BYTE PTR t19_evt0[rip]
	test	al, al
	jne	.L82
	movzx	eax, BYTE PTR t19_evt1[rip]
	test	al, al
	je	.L83
.L82:
	movzx	eax, BYTE PTR t19_evt0[rip]
	test	al, al
	je	.L84
	movzx	eax, BYTE PTR t19_evt1[rip]
	test	al, al
	je	.L83
.L84:
	movzx	eax, BYTE PTR t19_evt1[rip]
	test	al, al
	je	.L85
	movzx	eax, BYTE PTR t19_evt0[rip]
	test	al, al
	je	.L83
.L85:
	movzx	eax, BYTE PTR t19_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t19_evt1[rip]
	test	al, al
	je	.L4
.L83:
	movzx	eax, BYTE PTR t19_l0[rip]
	test	al, al
	jne	.L86
	movzx	eax, BYTE PTR t19_l1[rip]
	test	al, al
	je	.L87
.L86:
	movss	xmm1, DWORD PTR t19_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L87:
	movzx	eax, BYTE PTR t18_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t18_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t18_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t18_l0[rip]
	test	al, al
	jne	.L90
	movzx	eax, BYTE PTR t18_l1[rip]
	test	al, al
	je	.L91
.L90:
	movzx	eax, BYTE PTR t18_l0[rip]
	test	al, al
	je	.L92
	movzx	eax, BYTE PTR t18_l1[rip]
	test	al, al
	je	.L91
.L92:
	movzx	eax, BYTE PTR t18_l1[rip]
	test	al, al
	je	.L93
	movzx	eax, BYTE PTR t18_l0[rip]
	test	al, al
	je	.L91
.L93:
	movzx	eax, BYTE PTR t18_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t18_l1[rip]
	test	al, al
	je	.L4
.L91:
	movzx	eax, BYTE PTR t18_evt0[rip]
	test	al, al
	jne	.L94
	movzx	eax, BYTE PTR t18_evt1[rip]
	test	al, al
	je	.L95
.L94:
	movzx	eax, BYTE PTR t18_evt0[rip]
	test	al, al
	je	.L96
	movzx	eax, BYTE PTR t18_evt1[rip]
	test	al, al
	je	.L95
.L96:
	movzx	eax, BYTE PTR t18_evt1[rip]
	test	al, al
	je	.L97
	movzx	eax, BYTE PTR t18_evt0[rip]
	test	al, al
	je	.L95
.L97:
	movzx	eax, BYTE PTR t18_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t18_evt1[rip]
	test	al, al
	je	.L4
.L95:
	movzx	eax, BYTE PTR t18_l0[rip]
	test	al, al
	jne	.L98
	movzx	eax, BYTE PTR t18_l1[rip]
	test	al, al
	je	.L99
.L98:
	movss	xmm1, DWORD PTR t18_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L99:
	movzx	eax, BYTE PTR t17_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t17_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t17_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t17_l0[rip]
	test	al, al
	jne	.L102
	movzx	eax, BYTE PTR t17_l1[rip]
	test	al, al
	je	.L103
.L102:
	movzx	eax, BYTE PTR t17_l0[rip]
	test	al, al
	je	.L104
	movzx	eax, BYTE PTR t17_l1[rip]
	test	al, al
	je	.L103
.L104:
	movzx	eax, BYTE PTR t17_l1[rip]
	test	al, al
	je	.L105
	movzx	eax, BYTE PTR t17_l0[rip]
	test	al, al
	je	.L103
.L105:
	movzx	eax, BYTE PTR t17_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t17_l1[rip]
	test	al, al
	je	.L4
.L103:
	movzx	eax, BYTE PTR t17_evt0[rip]
	test	al, al
	jne	.L106
	movzx	eax, BYTE PTR t17_evt1[rip]
	test	al, al
	je	.L107
.L106:
	movzx	eax, BYTE PTR t17_evt0[rip]
	test	al, al
	je	.L108
	movzx	eax, BYTE PTR t17_evt1[rip]
	test	al, al
	je	.L107
.L108:
	movzx	eax, BYTE PTR t17_evt1[rip]
	test	al, al
	je	.L109
	movzx	eax, BYTE PTR t17_evt0[rip]
	test	al, al
	je	.L107
.L109:
	movzx	eax, BYTE PTR t17_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t17_evt1[rip]
	test	al, al
	je	.L4
.L107:
	movzx	eax, BYTE PTR t17_l0[rip]
	test	al, al
	jne	.L110
	movzx	eax, BYTE PTR t17_l1[rip]
	test	al, al
	je	.L111
.L110:
	movss	xmm1, DWORD PTR t17_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L111:
	movzx	eax, BYTE PTR t16_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t16_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t16_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t16_l0[rip]
	test	al, al
	jne	.L114
	movzx	eax, BYTE PTR t16_l1[rip]
	test	al, al
	je	.L115
.L114:
	movzx	eax, BYTE PTR t16_l0[rip]
	test	al, al
	je	.L116
	movzx	eax, BYTE PTR t16_l1[rip]
	test	al, al
	je	.L115
.L116:
	movzx	eax, BYTE PTR t16_l1[rip]
	test	al, al
	je	.L117
	movzx	eax, BYTE PTR t16_l0[rip]
	test	al, al
	je	.L115
.L117:
	movzx	eax, BYTE PTR t16_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t16_l1[rip]
	test	al, al
	je	.L4
.L115:
	movzx	eax, BYTE PTR t16_evt0[rip]
	test	al, al
	jne	.L118
	movzx	eax, BYTE PTR t16_evt1[rip]
	test	al, al
	je	.L119
.L118:
	movzx	eax, BYTE PTR t16_evt0[rip]
	test	al, al
	je	.L120
	movzx	eax, BYTE PTR t16_evt1[rip]
	test	al, al
	je	.L119
.L120:
	movzx	eax, BYTE PTR t16_evt1[rip]
	test	al, al
	je	.L121
	movzx	eax, BYTE PTR t16_evt0[rip]
	test	al, al
	je	.L119
.L121:
	movzx	eax, BYTE PTR t16_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t16_evt1[rip]
	test	al, al
	je	.L4
.L119:
	movzx	eax, BYTE PTR t16_l0[rip]
	test	al, al
	jne	.L122
	movzx	eax, BYTE PTR t16_l1[rip]
	test	al, al
	je	.L123
.L122:
	movss	xmm1, DWORD PTR t16_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L123:
	movzx	eax, BYTE PTR t15_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t15_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t15_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t15_l0[rip]
	test	al, al
	jne	.L126
	movzx	eax, BYTE PTR t15_l1[rip]
	test	al, al
	je	.L127
.L126:
	movzx	eax, BYTE PTR t15_l0[rip]
	test	al, al
	je	.L128
	movzx	eax, BYTE PTR t15_l1[rip]
	test	al, al
	je	.L127
.L128:
	movzx	eax, BYTE PTR t15_l1[rip]
	test	al, al
	je	.L129
	movzx	eax, BYTE PTR t15_l0[rip]
	test	al, al
	je	.L127
.L129:
	movzx	eax, BYTE PTR t15_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t15_l1[rip]
	test	al, al
	je	.L4
.L127:
	movzx	eax, BYTE PTR t15_evt0[rip]
	test	al, al
	jne	.L130
	movzx	eax, BYTE PTR t15_evt1[rip]
	test	al, al
	je	.L131
.L130:
	movzx	eax, BYTE PTR t15_evt0[rip]
	test	al, al
	je	.L132
	movzx	eax, BYTE PTR t15_evt1[rip]
	test	al, al
	je	.L131
.L132:
	movzx	eax, BYTE PTR t15_evt1[rip]
	test	al, al
	je	.L133
	movzx	eax, BYTE PTR t15_evt0[rip]
	test	al, al
	je	.L131
.L133:
	movzx	eax, BYTE PTR t15_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t15_evt1[rip]
	test	al, al
	je	.L4
.L131:
	movzx	eax, BYTE PTR t15_l0[rip]
	test	al, al
	jne	.L134
	movzx	eax, BYTE PTR t15_l1[rip]
	test	al, al
	je	.L135
.L134:
	movss	xmm1, DWORD PTR t15_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L135:
	movzx	eax, BYTE PTR t14_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t14_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t14_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t14_l0[rip]
	test	al, al
	jne	.L138
	movzx	eax, BYTE PTR t14_l1[rip]
	test	al, al
	je	.L139
.L138:
	movzx	eax, BYTE PTR t14_l0[rip]
	test	al, al
	je	.L140
	movzx	eax, BYTE PTR t14_l1[rip]
	test	al, al
	je	.L139
.L140:
	movzx	eax, BYTE PTR t14_l1[rip]
	test	al, al
	je	.L141
	movzx	eax, BYTE PTR t14_l0[rip]
	test	al, al
	je	.L139
.L141:
	movzx	eax, BYTE PTR t14_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t14_l1[rip]
	test	al, al
	je	.L4
.L139:
	movzx	eax, BYTE PTR t14_evt0[rip]
	test	al, al
	jne	.L142
	movzx	eax, BYTE PTR t14_evt1[rip]
	test	al, al
	je	.L143
.L142:
	movzx	eax, BYTE PTR t14_evt0[rip]
	test	al, al
	je	.L144
	movzx	eax, BYTE PTR t14_evt1[rip]
	test	al, al
	je	.L143
.L144:
	movzx	eax, BYTE PTR t14_evt1[rip]
	test	al, al
	je	.L145
	movzx	eax, BYTE PTR t14_evt0[rip]
	test	al, al
	je	.L143
.L145:
	movzx	eax, BYTE PTR t14_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t14_evt1[rip]
	test	al, al
	je	.L4
.L143:
	movzx	eax, BYTE PTR t14_l0[rip]
	test	al, al
	jne	.L146
	movzx	eax, BYTE PTR t14_l1[rip]
	test	al, al
	je	.L147
.L146:
	movss	xmm1, DWORD PTR t14_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L147:
	movzx	eax, BYTE PTR t13_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t13_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t13_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t13_l0[rip]
	test	al, al
	jne	.L150
	movzx	eax, BYTE PTR t13_l1[rip]
	test	al, al
	je	.L151
.L150:
	movzx	eax, BYTE PTR t13_l0[rip]
	test	al, al
	je	.L152
	movzx	eax, BYTE PTR t13_l1[rip]
	test	al, al
	je	.L151
.L152:
	movzx	eax, BYTE PTR t13_l1[rip]
	test	al, al
	je	.L153
	movzx	eax, BYTE PTR t13_l0[rip]
	test	al, al
	je	.L151
.L153:
	movzx	eax, BYTE PTR t13_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t13_l1[rip]
	test	al, al
	je	.L4
.L151:
	movzx	eax, BYTE PTR t13_evt0[rip]
	test	al, al
	jne	.L154
	movzx	eax, BYTE PTR t13_evt1[rip]
	test	al, al
	je	.L155
.L154:
	movzx	eax, BYTE PTR t13_evt0[rip]
	test	al, al
	je	.L156
	movzx	eax, BYTE PTR t13_evt1[rip]
	test	al, al
	je	.L155
.L156:
	movzx	eax, BYTE PTR t13_evt1[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR t13_evt0[rip]
	test	al, al
	je	.L155
.L157:
	movzx	eax, BYTE PTR t13_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t13_evt1[rip]
	test	al, al
	je	.L4
.L155:
	movzx	eax, BYTE PTR t13_l0[rip]
	test	al, al
	jne	.L158
	movzx	eax, BYTE PTR t13_l1[rip]
	test	al, al
	je	.L159
.L158:
	movss	xmm1, DWORD PTR t13_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L159:
	movzx	eax, BYTE PTR t12_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t12_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t12_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t12_l0[rip]
	test	al, al
	jne	.L162
	movzx	eax, BYTE PTR t12_l1[rip]
	test	al, al
	je	.L163
.L162:
	movzx	eax, BYTE PTR t12_l0[rip]
	test	al, al
	je	.L164
	movzx	eax, BYTE PTR t12_l1[rip]
	test	al, al
	je	.L163
.L164:
	movzx	eax, BYTE PTR t12_l1[rip]
	test	al, al
	je	.L165
	movzx	eax, BYTE PTR t12_l0[rip]
	test	al, al
	je	.L163
.L165:
	movzx	eax, BYTE PTR t12_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t12_l1[rip]
	test	al, al
	je	.L4
.L163:
	movzx	eax, BYTE PTR t12_evt0[rip]
	test	al, al
	jne	.L166
	movzx	eax, BYTE PTR t12_evt1[rip]
	test	al, al
	je	.L167
.L166:
	movzx	eax, BYTE PTR t12_evt0[rip]
	test	al, al
	je	.L168
	movzx	eax, BYTE PTR t12_evt1[rip]
	test	al, al
	je	.L167
.L168:
	movzx	eax, BYTE PTR t12_evt1[rip]
	test	al, al
	je	.L169
	movzx	eax, BYTE PTR t12_evt0[rip]
	test	al, al
	je	.L167
.L169:
	movzx	eax, BYTE PTR t12_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t12_evt1[rip]
	test	al, al
	je	.L4
.L167:
	movzx	eax, BYTE PTR t12_l0[rip]
	test	al, al
	jne	.L170
	movzx	eax, BYTE PTR t12_l1[rip]
	test	al, al
	je	.L171
.L170:
	movss	xmm1, DWORD PTR t12_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L171:
	movzx	eax, BYTE PTR t11_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t11_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t11_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t11_l0[rip]
	test	al, al
	jne	.L174
	movzx	eax, BYTE PTR t11_l1[rip]
	test	al, al
	je	.L175
.L174:
	movzx	eax, BYTE PTR t11_l0[rip]
	test	al, al
	je	.L176
	movzx	eax, BYTE PTR t11_l1[rip]
	test	al, al
	je	.L175
.L176:
	movzx	eax, BYTE PTR t11_l1[rip]
	test	al, al
	je	.L177
	movzx	eax, BYTE PTR t11_l0[rip]
	test	al, al
	je	.L175
.L177:
	movzx	eax, BYTE PTR t11_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t11_l1[rip]
	test	al, al
	je	.L4
.L175:
	movzx	eax, BYTE PTR t11_evt0[rip]
	test	al, al
	jne	.L178
	movzx	eax, BYTE PTR t11_evt1[rip]
	test	al, al
	je	.L179
.L178:
	movzx	eax, BYTE PTR t11_evt0[rip]
	test	al, al
	je	.L180
	movzx	eax, BYTE PTR t11_evt1[rip]
	test	al, al
	je	.L179
.L180:
	movzx	eax, BYTE PTR t11_evt1[rip]
	test	al, al
	je	.L181
	movzx	eax, BYTE PTR t11_evt0[rip]
	test	al, al
	je	.L179
.L181:
	movzx	eax, BYTE PTR t11_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t11_evt1[rip]
	test	al, al
	je	.L4
.L179:
	movzx	eax, BYTE PTR t11_l0[rip]
	test	al, al
	jne	.L182
	movzx	eax, BYTE PTR t11_l1[rip]
	test	al, al
	je	.L183
.L182:
	movss	xmm1, DWORD PTR t11_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L183:
	movzx	eax, BYTE PTR t10_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t10_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t10_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t10_l0[rip]
	test	al, al
	jne	.L186
	movzx	eax, BYTE PTR t10_l1[rip]
	test	al, al
	je	.L187
.L186:
	movzx	eax, BYTE PTR t10_l0[rip]
	test	al, al
	je	.L188
	movzx	eax, BYTE PTR t10_l1[rip]
	test	al, al
	je	.L187
.L188:
	movzx	eax, BYTE PTR t10_l1[rip]
	test	al, al
	je	.L189
	movzx	eax, BYTE PTR t10_l0[rip]
	test	al, al
	je	.L187
.L189:
	movzx	eax, BYTE PTR t10_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t10_l1[rip]
	test	al, al
	je	.L4
.L187:
	movzx	eax, BYTE PTR t10_evt0[rip]
	test	al, al
	jne	.L190
	movzx	eax, BYTE PTR t10_evt1[rip]
	test	al, al
	je	.L191
.L190:
	movzx	eax, BYTE PTR t10_evt0[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR t10_evt1[rip]
	test	al, al
	je	.L191
.L192:
	movzx	eax, BYTE PTR t10_evt1[rip]
	test	al, al
	je	.L193
	movzx	eax, BYTE PTR t10_evt0[rip]
	test	al, al
	je	.L191
.L193:
	movzx	eax, BYTE PTR t10_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t10_evt1[rip]
	test	al, al
	je	.L4
.L191:
	movzx	eax, BYTE PTR t10_l0[rip]
	test	al, al
	jne	.L194
	movzx	eax, BYTE PTR t10_l1[rip]
	test	al, al
	je	.L195
.L194:
	movss	xmm1, DWORD PTR t10_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L195:
	movzx	eax, BYTE PTR t9_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t9_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t9_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t9_l0[rip]
	test	al, al
	jne	.L198
	movzx	eax, BYTE PTR t9_l1[rip]
	test	al, al
	je	.L199
.L198:
	movzx	eax, BYTE PTR t9_l0[rip]
	test	al, al
	je	.L200
	movzx	eax, BYTE PTR t9_l1[rip]
	test	al, al
	je	.L199
.L200:
	movzx	eax, BYTE PTR t9_l1[rip]
	test	al, al
	je	.L201
	movzx	eax, BYTE PTR t9_l0[rip]
	test	al, al
	je	.L199
.L201:
	movzx	eax, BYTE PTR t9_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t9_l1[rip]
	test	al, al
	je	.L4
.L199:
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	jne	.L202
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	je	.L203
.L202:
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	je	.L204
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	je	.L203
.L204:
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	je	.L205
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	je	.L203
.L205:
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	je	.L4
.L203:
	movzx	eax, BYTE PTR t9_l0[rip]
	test	al, al
	jne	.L206
	movzx	eax, BYTE PTR t9_l1[rip]
	test	al, al
	je	.L207
.L206:
	movss	xmm1, DWORD PTR t9_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L207:
	movzx	eax, BYTE PTR t8_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t8_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t8_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t8_l0[rip]
	test	al, al
	jne	.L210
	movzx	eax, BYTE PTR t8_l1[rip]
	test	al, al
	je	.L211
.L210:
	movzx	eax, BYTE PTR t8_l0[rip]
	test	al, al
	je	.L212
	movzx	eax, BYTE PTR t8_l1[rip]
	test	al, al
	je	.L211
.L212:
	movzx	eax, BYTE PTR t8_l1[rip]
	test	al, al
	je	.L213
	movzx	eax, BYTE PTR t8_l0[rip]
	test	al, al
	je	.L211
.L213:
	movzx	eax, BYTE PTR t8_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t8_l1[rip]
	test	al, al
	je	.L4
.L211:
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	jne	.L214
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	je	.L215
.L214:
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	je	.L216
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	je	.L215
.L216:
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	je	.L217
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	je	.L215
.L217:
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	je	.L4
.L215:
	movzx	eax, BYTE PTR t8_l0[rip]
	test	al, al
	jne	.L218
	movzx	eax, BYTE PTR t8_l1[rip]
	test	al, al
	je	.L219
.L218:
	movss	xmm1, DWORD PTR t8_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L219:
	movzx	eax, BYTE PTR t7_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t7_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t7_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t7_l0[rip]
	test	al, al
	jne	.L222
	movzx	eax, BYTE PTR t7_l1[rip]
	test	al, al
	je	.L223
.L222:
	movzx	eax, BYTE PTR t7_l0[rip]
	test	al, al
	je	.L224
	movzx	eax, BYTE PTR t7_l1[rip]
	test	al, al
	je	.L223
.L224:
	movzx	eax, BYTE PTR t7_l1[rip]
	test	al, al
	je	.L225
	movzx	eax, BYTE PTR t7_l0[rip]
	test	al, al
	je	.L223
.L225:
	movzx	eax, BYTE PTR t7_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t7_l1[rip]
	test	al, al
	je	.L4
.L223:
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	jne	.L226
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	je	.L227
.L226:
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	je	.L228
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	je	.L227
.L228:
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	je	.L227
.L229:
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	je	.L4
.L227:
	movzx	eax, BYTE PTR t7_l0[rip]
	test	al, al
	jne	.L230
	movzx	eax, BYTE PTR t7_l1[rip]
	test	al, al
	je	.L231
.L230:
	movss	xmm1, DWORD PTR t7_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L231:
	movzx	eax, BYTE PTR t6_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t6_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t6_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t6_l0[rip]
	test	al, al
	jne	.L234
	movzx	eax, BYTE PTR t6_l1[rip]
	test	al, al
	je	.L235
.L234:
	movzx	eax, BYTE PTR t6_l0[rip]
	test	al, al
	je	.L236
	movzx	eax, BYTE PTR t6_l1[rip]
	test	al, al
	je	.L235
.L236:
	movzx	eax, BYTE PTR t6_l1[rip]
	test	al, al
	je	.L237
	movzx	eax, BYTE PTR t6_l0[rip]
	test	al, al
	je	.L235
.L237:
	movzx	eax, BYTE PTR t6_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t6_l1[rip]
	test	al, al
	je	.L4
.L235:
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	jne	.L238
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	je	.L239
.L238:
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	je	.L240
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	je	.L239
.L240:
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	je	.L241
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	je	.L239
.L241:
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	je	.L4
.L239:
	movzx	eax, BYTE PTR t6_l0[rip]
	test	al, al
	jne	.L242
	movzx	eax, BYTE PTR t6_l1[rip]
	test	al, al
	je	.L243
.L242:
	movss	xmm1, DWORD PTR t6_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L243:
	movzx	eax, BYTE PTR t5_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t5_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t5_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t5_l0[rip]
	test	al, al
	jne	.L246
	movzx	eax, BYTE PTR t5_l1[rip]
	test	al, al
	je	.L247
.L246:
	movzx	eax, BYTE PTR t5_l0[rip]
	test	al, al
	je	.L248
	movzx	eax, BYTE PTR t5_l1[rip]
	test	al, al
	je	.L247
.L248:
	movzx	eax, BYTE PTR t5_l1[rip]
	test	al, al
	je	.L249
	movzx	eax, BYTE PTR t5_l0[rip]
	test	al, al
	je	.L247
.L249:
	movzx	eax, BYTE PTR t5_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t5_l1[rip]
	test	al, al
	je	.L4
.L247:
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	jne	.L250
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	je	.L251
.L250:
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	je	.L252
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	je	.L251
.L252:
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	je	.L253
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	je	.L251
.L253:
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	je	.L4
.L251:
	movzx	eax, BYTE PTR t5_l0[rip]
	test	al, al
	jne	.L254
	movzx	eax, BYTE PTR t5_l1[rip]
	test	al, al
	je	.L255
.L254:
	movss	xmm1, DWORD PTR t5_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L255:
	movzx	eax, BYTE PTR t4_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t4_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t4_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t4_l0[rip]
	test	al, al
	jne	.L258
	movzx	eax, BYTE PTR t4_l1[rip]
	test	al, al
	je	.L259
.L258:
	movzx	eax, BYTE PTR t4_l0[rip]
	test	al, al
	je	.L260
	movzx	eax, BYTE PTR t4_l1[rip]
	test	al, al
	je	.L259
.L260:
	movzx	eax, BYTE PTR t4_l1[rip]
	test	al, al
	je	.L261
	movzx	eax, BYTE PTR t4_l0[rip]
	test	al, al
	je	.L259
.L261:
	movzx	eax, BYTE PTR t4_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t4_l1[rip]
	test	al, al
	je	.L4
.L259:
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	jne	.L262
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	je	.L263
.L262:
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	je	.L264
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	je	.L263
.L264:
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	je	.L265
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	je	.L263
.L265:
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	je	.L4
.L263:
	movzx	eax, BYTE PTR t4_l0[rip]
	test	al, al
	jne	.L266
	movzx	eax, BYTE PTR t4_l1[rip]
	test	al, al
	je	.L267
.L266:
	movss	xmm1, DWORD PTR t4_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L267:
	movzx	eax, BYTE PTR t3_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t3_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t3_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t3_l0[rip]
	test	al, al
	jne	.L270
	movzx	eax, BYTE PTR t3_l1[rip]
	test	al, al
	je	.L271
.L270:
	movzx	eax, BYTE PTR t3_l0[rip]
	test	al, al
	je	.L272
	movzx	eax, BYTE PTR t3_l1[rip]
	test	al, al
	je	.L271
.L272:
	movzx	eax, BYTE PTR t3_l1[rip]
	test	al, al
	je	.L273
	movzx	eax, BYTE PTR t3_l0[rip]
	test	al, al
	je	.L271
.L273:
	movzx	eax, BYTE PTR t3_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t3_l1[rip]
	test	al, al
	je	.L4
.L271:
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	jne	.L274
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	je	.L275
.L274:
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	je	.L276
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	je	.L275
.L276:
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	je	.L277
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	je	.L275
.L277:
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	je	.L4
.L275:
	movzx	eax, BYTE PTR t3_l0[rip]
	test	al, al
	jne	.L278
	movzx	eax, BYTE PTR t3_l1[rip]
	test	al, al
	je	.L279
.L278:
	movss	xmm1, DWORD PTR t3_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L279:
	movzx	eax, BYTE PTR t2_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t2_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t2_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t2_l0[rip]
	test	al, al
	jne	.L282
	movzx	eax, BYTE PTR t2_l1[rip]
	test	al, al
	je	.L283
.L282:
	movzx	eax, BYTE PTR t2_l0[rip]
	test	al, al
	je	.L284
	movzx	eax, BYTE PTR t2_l1[rip]
	test	al, al
	je	.L283
.L284:
	movzx	eax, BYTE PTR t2_l1[rip]
	test	al, al
	je	.L285
	movzx	eax, BYTE PTR t2_l0[rip]
	test	al, al
	je	.L283
.L285:
	movzx	eax, BYTE PTR t2_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t2_l1[rip]
	test	al, al
	je	.L4
.L283:
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	jne	.L286
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	je	.L287
.L286:
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	je	.L288
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	je	.L287
.L288:
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	je	.L289
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	je	.L287
.L289:
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	je	.L4
.L287:
	movzx	eax, BYTE PTR t2_l0[rip]
	test	al, al
	jne	.L290
	movzx	eax, BYTE PTR t2_l1[rip]
	test	al, al
	je	.L291
.L290:
	movss	xmm1, DWORD PTR t2_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L291:
	movzx	eax, BYTE PTR t1_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t1_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t1_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t1_l0[rip]
	test	al, al
	jne	.L294
	movzx	eax, BYTE PTR t1_l1[rip]
	test	al, al
	je	.L295
.L294:
	movzx	eax, BYTE PTR t1_l0[rip]
	test	al, al
	je	.L296
	movzx	eax, BYTE PTR t1_l1[rip]
	test	al, al
	je	.L295
.L296:
	movzx	eax, BYTE PTR t1_l1[rip]
	test	al, al
	je	.L297
	movzx	eax, BYTE PTR t1_l0[rip]
	test	al, al
	je	.L295
.L297:
	movzx	eax, BYTE PTR t1_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t1_l1[rip]
	test	al, al
	je	.L4
.L295:
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	jne	.L298
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	je	.L299
.L298:
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	je	.L300
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	je	.L299
.L300:
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	je	.L301
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	je	.L299
.L301:
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	je	.L4
.L299:
	movzx	eax, BYTE PTR t1_l0[rip]
	test	al, al
	jne	.L302
	movzx	eax, BYTE PTR t1_l1[rip]
	test	al, al
	je	.L303
.L302:
	movss	xmm1, DWORD PTR t1_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L303:
	movzx	eax, BYTE PTR t0_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t0_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t0_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t0_l0[rip]
	test	al, al
	jne	.L306
	movzx	eax, BYTE PTR t0_l1[rip]
	test	al, al
	je	.L307
.L306:
	movzx	eax, BYTE PTR t0_l0[rip]
	test	al, al
	je	.L308
	movzx	eax, BYTE PTR t0_l1[rip]
	test	al, al
	je	.L307
.L308:
	movzx	eax, BYTE PTR t0_l1[rip]
	test	al, al
	je	.L309
	movzx	eax, BYTE PTR t0_l0[rip]
	test	al, al
	je	.L307
.L309:
	movzx	eax, BYTE PTR t0_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t0_l1[rip]
	test	al, al
	je	.L4
.L307:
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	jne	.L310
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	je	.L311
.L310:
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	je	.L312
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	je	.L311
.L312:
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	je	.L313
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	je	.L311
.L313:
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	je	.L4
.L311:
	movzx	eax, BYTE PTR t0_l0[rip]
	test	al, al
	jne	.L314
	movzx	eax, BYTE PTR t0_l1[rip]
	test	al, al
	je	.L315
.L314:
	movss	xmm1, DWORD PTR t0_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L315:
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR controller_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	jne	.L318
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	je	.L319
.L318:
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	je	.L320
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	je	.L319
.L320:
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	je	.L321
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	je	.L319
.L321:
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	je	.L4
.L319:
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L322
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L322
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	je	.L323
.L322:
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L324
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	je	.L324
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	je	.L323
.L324:
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L325
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	je	.L325
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	je	.L323
.L325:
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L326
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	je	.L326
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	jne	.L323
.L326:
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	jne	.L4
.L323:
	mov	eax, DWORD PTR controller_cnt[rip]
	test	eax, eax
	je	.L327
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 1
	je	.L327
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 2
	je	.L327
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 3
	je	.L327
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 4
	je	.L327
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 5
	je	.L327
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 6
	je	.L327
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 7
	je	.L327
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 8
	je	.L327
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 9
	je	.L327
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 10
	je	.L327
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 11
	je	.L327
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 12
	je	.L327
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 13
	je	.L327
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 14
	je	.L327
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 15
	je	.L327
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 16
	je	.L327
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 17
	je	.L327
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 18
	je	.L327
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 19
	je	.L327
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 20
	je	.L327
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 21
	je	.L327
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 22
	je	.L327
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 23
	je	.L327
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 24
	je	.L327
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 25
	je	.L327
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 26
	je	.L327
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 27
	jne	.L4
.L327:
	movss	xmm1, DWORD PTR controller_z[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L328
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	je	.L329
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	je	.L4
.L329:
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	je	.L328
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	jne	.L4
.L328:
	movzx	eax, BYTE PTR gate_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR gate_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR gate_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR gate_l0[rip]
	test	al, al
	jne	.L331
	movzx	eax, BYTE PTR gate_l1[rip]
	test	al, al
	je	.L332
.L331:
	movzx	eax, BYTE PTR gate_l0[rip]
	test	al, al
	je	.L333
	movzx	eax, BYTE PTR gate_l1[rip]
	test	al, al
	je	.L332
.L333:
	movzx	eax, BYTE PTR gate_l1[rip]
	test	al, al
	je	.L334
	movzx	eax, BYTE PTR gate_l0[rip]
	test	al, al
	je	.L332
.L334:
	movzx	eax, BYTE PTR gate_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR gate_l1[rip]
	test	al, al
	je	.L4
.L332:
	movzx	eax, BYTE PTR gate_evt0[rip]
	test	al, al
	jne	.L335
	movzx	eax, BYTE PTR gate_evt1[rip]
	test	al, al
	je	.L336
.L335:
	movzx	eax, BYTE PTR gate_evt0[rip]
	test	al, al
	je	.L337
	movzx	eax, BYTE PTR gate_evt1[rip]
	test	al, al
	je	.L336
.L337:
	movzx	eax, BYTE PTR gate_evt1[rip]
	test	al, al
	je	.L338
	movzx	eax, BYTE PTR gate_evt0[rip]
	test	al, al
	je	.L336
.L338:
	movzx	eax, BYTE PTR gate_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR gate_evt1[rip]
	test	al, al
	je	.L4
.L336:
	movss	xmm1, DWORD PTR gate_y[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L339
	movzx	eax, BYTE PTR gate_l0[rip]
	test	al, al
	je	.L339
	movzx	eax, BYTE PTR gate_l1[rip]
	test	al, al
	je	.L4
.L339:
	movss	xmm1, DWORD PTR gate_y[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	jnb	.L340
	movzx	eax, BYTE PTR gate_l0[rip]
	test	al, al
	je	.L340
	movzx	eax, BYTE PTR gate_l1[rip]
	test	al, al
	jne	.L4
.L340:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jb	.L4
	movss	xmm0, DWORD PTR delta[rip]
	movss	xmm1, DWORD PTR _diverge_delta[rip]
	ucomiss	xmm0, xmm1
	jp	.L4
	ucomiss	xmm0, xmm1
	jne	.L4
	mov	eax, 1
	jmp	.L343
.L4:
	mov	eax, 0
.L343:
	mov	DWORD PTR -4[rbp], eax
	jmp	.L344
.L1284:
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t25_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t25_evt0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t25_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t24_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t24_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t24_evt0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t24_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t23_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t23_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t23_evt0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t23_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t22_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t8_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t9_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t23_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t8_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t8_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t7_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t8_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t7_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t6_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t6_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t7_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t6_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t5_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t5_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t4_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t3_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t3_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t4_x[rip], eax
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR _x_controller_cnt[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t12_evt0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t6_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t7_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t8_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_gate_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t5_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t4_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t14_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t0_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t4_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t19_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t5_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t14_evt0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_gate_y[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_controller_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t19_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_delta[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_controller_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t2_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t25_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t0_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t0_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t22_evt0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t1_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t0_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t7_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t22_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t1_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t1_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t2_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t2_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t1_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_controller_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t2_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t3_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t17_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x__diverge_delta[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t3_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t9_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t24_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t9_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t9_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t9_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t10_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t10_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t25_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t10_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t10_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t10_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t11_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t11_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t11_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t11_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t11_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_controller_z[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t12_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t12_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t12_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_controller_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t12_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t13_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t13_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t13_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t13_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t13_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t14_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t14_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t14_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t15_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t15_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t15_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t0_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t15_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t15_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t16_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t16_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t16_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t1_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t16_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t16_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t17_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t17_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t17_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_controller_evt2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t2_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t17_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_gate_evt0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t18_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_gate_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t18_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_gate_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t18_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t3_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t18_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t18_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t19_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t19_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t4_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t19_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t20_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t20_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t20_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t5_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t20_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t20_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t21_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t21_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t21_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t6_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t21_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t21_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t22_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t22_evt1[rip], al
	movzx	eax, BYTE PTR _x_t25_l0[rip]
	test	al, al
	jne	.L345
	movzx	eax, BYTE PTR _x_t25_l1[rip]
	test	al, al
	je	.L346
.L345:
	movzx	eax, BYTE PTR _x_t25_l0[rip]
	test	al, al
	je	.L347
	movzx	eax, BYTE PTR _x_t25_l1[rip]
	test	al, al
	je	.L346
.L347:
	movzx	eax, BYTE PTR _x_t25_l1[rip]
	test	al, al
	je	.L348
	movzx	eax, BYTE PTR _x_t25_l0[rip]
	test	al, al
	je	.L346
.L348:
	movzx	eax, BYTE PTR _x_t25_l0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t25_l1[rip]
	test	al, al
	je	.L349
.L346:
	movzx	eax, BYTE PTR _x_t25_evt0[rip]
	test	al, al
	jne	.L350
	movzx	eax, BYTE PTR _x_t25_evt1[rip]
	test	al, al
	je	.L351
.L350:
	movzx	eax, BYTE PTR _x_t25_evt0[rip]
	test	al, al
	je	.L352
	movzx	eax, BYTE PTR _x_t25_evt1[rip]
	test	al, al
	je	.L351
.L352:
	movzx	eax, BYTE PTR _x_t25_evt1[rip]
	test	al, al
	je	.L353
	movzx	eax, BYTE PTR _x_t25_evt0[rip]
	test	al, al
	je	.L351
.L353:
	movzx	eax, BYTE PTR _x_t25_evt0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t25_evt1[rip]
	test	al, al
	je	.L349
.L351:
	movzx	eax, BYTE PTR _x_t25_l0[rip]
	test	al, al
	jne	.L354
	movzx	eax, BYTE PTR _x_t25_l1[rip]
	test	al, al
	je	.L355
.L354:
	movss	xmm1, DWORD PTR _x_t25_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L349
.L355:
	movzx	eax, BYTE PTR t25_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t25_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L357
	movzx	eax, BYTE PTR t25_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t25_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L357
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t25_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t25_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L357
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L358
.L357:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L349
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L358
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L349
.L358:
	movzx	eax, BYTE PTR _x_t25_l0[rip]
	test	al, al
	je	.L361
	movzx	eax, BYTE PTR _x_t25_l1[rip]
	test	al, al
	jne	.L361
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	je	.L361
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	jne	.L361
	movss	xmm0, DWORD PTR _x_t25_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L361
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L362
.L361:
	movzx	eax, BYTE PTR t25_l0[rip]
	test	al, al
	jne	.L362
	movzx	eax, BYTE PTR t25_l1[rip]
	test	al, al
	jne	.L362
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L362
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L362
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	jne	.L349
.L362:
	movzx	eax, BYTE PTR _x_t25_l1[rip]
	test	al, al
	je	.L364
	movzx	eax, BYTE PTR _x_t25_l0[rip]
	test	al, al
	jne	.L364
	movss	xmm1, DWORD PTR t25_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L364
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	je	.L364
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L364
	movss	xmm0, DWORD PTR t25_x[rip]
	movss	xmm1, DWORD PTR _x_t25_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L364
	ucomiss	xmm0, xmm1
	je	.L365
.L364:
	movzx	eax, BYTE PTR t25_l0[rip]
	test	al, al
	je	.L365
	movzx	eax, BYTE PTR t25_l1[rip]
	test	al, al
	jne	.L365
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L365
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L365
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	jne	.L349
.L365:
	movss	xmm0, DWORD PTR t25_x[rip]
	movss	xmm1, DWORD PTR _x_t25_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L367
	ucomiss	xmm0, xmm1
	jne	.L367
	movzx	eax, BYTE PTR _x_t25_l0[rip]
	test	al, al
	je	.L367
	movzx	eax, BYTE PTR _x_t25_l1[rip]
	test	al, al
	je	.L367
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	je	.L367
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	jne	.L369
.L367:
	movzx	eax, BYTE PTR t25_l1[rip]
	test	al, al
	je	.L369
	movzx	eax, BYTE PTR t25_l0[rip]
	test	al, al
	jne	.L369
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L369
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L369
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	jne	.L349
.L369:
	movzx	eax, BYTE PTR _x_t25_l0[rip]
	test	al, al
	jne	.L370
	movzx	eax, BYTE PTR _x_t25_l1[rip]
	test	al, al
	jne	.L370
	movss	xmm1, DWORD PTR t25_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L370
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L370
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L370
	movss	xmm0, DWORD PTR t25_x[rip]
	movss	xmm1, DWORD PTR _x_t25_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L370
	ucomiss	xmm0, xmm1
	je	.L372
.L370:
	movzx	eax, BYTE PTR t25_l0[rip]
	test	al, al
	je	.L372
	movzx	eax, BYTE PTR t25_l1[rip]
	test	al, al
	je	.L372
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L372
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L372
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	jne	.L349
.L372:
	movzx	eax, BYTE PTR _x_t24_l0[rip]
	test	al, al
	jne	.L374
	movzx	eax, BYTE PTR _x_t24_l1[rip]
	test	al, al
	je	.L375
.L374:
	movzx	eax, BYTE PTR _x_t24_l0[rip]
	test	al, al
	je	.L376
	movzx	eax, BYTE PTR _x_t24_l1[rip]
	test	al, al
	je	.L375
.L376:
	movzx	eax, BYTE PTR _x_t24_l1[rip]
	test	al, al
	je	.L377
	movzx	eax, BYTE PTR _x_t24_l0[rip]
	test	al, al
	je	.L375
.L377:
	movzx	eax, BYTE PTR _x_t24_l0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t24_l1[rip]
	test	al, al
	je	.L349
.L375:
	movzx	eax, BYTE PTR _x_t24_evt0[rip]
	test	al, al
	jne	.L378
	movzx	eax, BYTE PTR _x_t24_evt1[rip]
	test	al, al
	je	.L379
.L378:
	movzx	eax, BYTE PTR _x_t24_evt0[rip]
	test	al, al
	je	.L380
	movzx	eax, BYTE PTR _x_t24_evt1[rip]
	test	al, al
	je	.L379
.L380:
	movzx	eax, BYTE PTR _x_t24_evt1[rip]
	test	al, al
	je	.L381
	movzx	eax, BYTE PTR _x_t24_evt0[rip]
	test	al, al
	je	.L379
.L381:
	movzx	eax, BYTE PTR _x_t24_evt0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t24_evt1[rip]
	test	al, al
	je	.L349
.L379:
	movzx	eax, BYTE PTR _x_t24_l0[rip]
	test	al, al
	jne	.L382
	movzx	eax, BYTE PTR _x_t24_l1[rip]
	test	al, al
	je	.L383
.L382:
	movss	xmm1, DWORD PTR _x_t24_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L349
.L383:
	movzx	eax, BYTE PTR t24_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t24_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L385
	movzx	eax, BYTE PTR t24_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t24_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L385
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t24_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t24_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L385
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L386
.L385:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L349
	movzx	eax, BYTE PTR t24_evt0[rip]
	test	al, al
	jne	.L386
	movzx	eax, BYTE PTR t24_evt1[rip]
	test	al, al
	je	.L349
.L386:
	movzx	eax, BYTE PTR _x_t24_l0[rip]
	test	al, al
	je	.L389
	movzx	eax, BYTE PTR _x_t24_l1[rip]
	test	al, al
	jne	.L389
	movzx	eax, BYTE PTR t24_evt0[rip]
	test	al, al
	je	.L389
	movzx	eax, BYTE PTR t24_evt1[rip]
	test	al, al
	jne	.L389
	movss	xmm0, DWORD PTR _x_t24_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L389
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L390
.L389:
	movzx	eax, BYTE PTR t24_l0[rip]
	test	al, al
	jne	.L390
	movzx	eax, BYTE PTR t24_l1[rip]
	test	al, al
	jne	.L390
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L390
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L390
	movzx	eax, BYTE PTR t24_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t24_evt1[rip]
	test	al, al
	jne	.L349
.L390:
	movzx	eax, BYTE PTR _x_t24_l1[rip]
	test	al, al
	je	.L392
	movzx	eax, BYTE PTR _x_t24_l0[rip]
	test	al, al
	jne	.L392
	movss	xmm1, DWORD PTR t24_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L392
	movzx	eax, BYTE PTR t24_evt0[rip]
	test	al, al
	je	.L392
	movzx	eax, BYTE PTR t24_evt1[rip]
	test	al, al
	je	.L392
	movss	xmm0, DWORD PTR t24_x[rip]
	movss	xmm1, DWORD PTR _x_t24_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L392
	ucomiss	xmm0, xmm1
	je	.L393
.L392:
	movzx	eax, BYTE PTR t24_l0[rip]
	test	al, al
	je	.L393
	movzx	eax, BYTE PTR t24_l1[rip]
	test	al, al
	jne	.L393
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L393
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L393
	movzx	eax, BYTE PTR t24_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t24_evt1[rip]
	test	al, al
	jne	.L349
.L393:
	movss	xmm0, DWORD PTR t24_x[rip]
	movss	xmm1, DWORD PTR _x_t24_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L395
	ucomiss	xmm0, xmm1
	jne	.L395
	movzx	eax, BYTE PTR _x_t24_l0[rip]
	test	al, al
	je	.L395
	movzx	eax, BYTE PTR _x_t24_l1[rip]
	test	al, al
	je	.L395
	movzx	eax, BYTE PTR t24_evt0[rip]
	test	al, al
	je	.L395
	movzx	eax, BYTE PTR t24_evt1[rip]
	test	al, al
	jne	.L397
.L395:
	movzx	eax, BYTE PTR t24_l1[rip]
	test	al, al
	je	.L397
	movzx	eax, BYTE PTR t24_l0[rip]
	test	al, al
	jne	.L397
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L397
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L397
	movzx	eax, BYTE PTR t24_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t24_evt1[rip]
	test	al, al
	jne	.L349
.L397:
	movzx	eax, BYTE PTR _x_t24_l0[rip]
	test	al, al
	jne	.L398
	movzx	eax, BYTE PTR _x_t24_l1[rip]
	test	al, al
	jne	.L398
	movss	xmm1, DWORD PTR t24_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L398
	movzx	eax, BYTE PTR t24_evt1[rip]
	test	al, al
	je	.L398
	movzx	eax, BYTE PTR t24_evt0[rip]
	test	al, al
	jne	.L398
	movss	xmm0, DWORD PTR t24_x[rip]
	movss	xmm1, DWORD PTR _x_t24_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L398
	ucomiss	xmm0, xmm1
	je	.L400
.L398:
	movzx	eax, BYTE PTR t24_l0[rip]
	test	al, al
	je	.L400
	movzx	eax, BYTE PTR t24_l1[rip]
	test	al, al
	je	.L400
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L400
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L400
	movzx	eax, BYTE PTR t24_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t24_evt1[rip]
	test	al, al
	jne	.L349
.L400:
	movzx	eax, BYTE PTR _x_t23_l0[rip]
	test	al, al
	jne	.L402
	movzx	eax, BYTE PTR _x_t23_l1[rip]
	test	al, al
	je	.L403
.L402:
	movzx	eax, BYTE PTR _x_t23_l0[rip]
	test	al, al
	je	.L404
	movzx	eax, BYTE PTR _x_t23_l1[rip]
	test	al, al
	je	.L403
.L404:
	movzx	eax, BYTE PTR _x_t23_l1[rip]
	test	al, al
	je	.L405
	movzx	eax, BYTE PTR _x_t23_l0[rip]
	test	al, al
	je	.L403
.L405:
	movzx	eax, BYTE PTR _x_t23_l0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t23_l1[rip]
	test	al, al
	je	.L349
.L403:
	movzx	eax, BYTE PTR _x_t23_evt0[rip]
	test	al, al
	jne	.L406
	movzx	eax, BYTE PTR _x_t23_evt1[rip]
	test	al, al
	je	.L407
.L406:
	movzx	eax, BYTE PTR _x_t23_evt0[rip]
	test	al, al
	je	.L408
	movzx	eax, BYTE PTR _x_t23_evt1[rip]
	test	al, al
	je	.L407
.L408:
	movzx	eax, BYTE PTR _x_t23_evt1[rip]
	test	al, al
	je	.L409
	movzx	eax, BYTE PTR _x_t23_evt0[rip]
	test	al, al
	je	.L407
.L409:
	movzx	eax, BYTE PTR _x_t23_evt0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t23_evt1[rip]
	test	al, al
	je	.L349
.L407:
	movzx	eax, BYTE PTR _x_t23_l0[rip]
	test	al, al
	jne	.L410
	movzx	eax, BYTE PTR _x_t23_l1[rip]
	test	al, al
	je	.L411
.L410:
	movss	xmm1, DWORD PTR _x_t23_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L349
.L411:
	movzx	eax, BYTE PTR t23_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t23_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L413
	movzx	eax, BYTE PTR t23_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t23_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L413
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t23_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t23_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L413
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L414
.L413:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L349
	movzx	eax, BYTE PTR t23_evt0[rip]
	test	al, al
	jne	.L414
	movzx	eax, BYTE PTR t23_evt1[rip]
	test	al, al
	je	.L349
.L414:
	movzx	eax, BYTE PTR _x_t23_l0[rip]
	test	al, al
	je	.L417
	movzx	eax, BYTE PTR _x_t23_l1[rip]
	test	al, al
	jne	.L417
	movzx	eax, BYTE PTR t23_evt0[rip]
	test	al, al
	je	.L417
	movzx	eax, BYTE PTR t23_evt1[rip]
	test	al, al
	jne	.L417
	movss	xmm0, DWORD PTR _x_t23_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L417
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L418
.L417:
	movzx	eax, BYTE PTR t23_l0[rip]
	test	al, al
	jne	.L418
	movzx	eax, BYTE PTR t23_l1[rip]
	test	al, al
	jne	.L418
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L418
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L418
	movzx	eax, BYTE PTR t23_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t23_evt1[rip]
	test	al, al
	jne	.L349
.L418:
	movzx	eax, BYTE PTR _x_t23_l1[rip]
	test	al, al
	je	.L420
	movzx	eax, BYTE PTR _x_t23_l0[rip]
	test	al, al
	jne	.L420
	movss	xmm1, DWORD PTR t23_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L420
	movzx	eax, BYTE PTR t23_evt0[rip]
	test	al, al
	je	.L420
	movzx	eax, BYTE PTR t23_evt1[rip]
	test	al, al
	je	.L420
	movss	xmm0, DWORD PTR t23_x[rip]
	movss	xmm1, DWORD PTR _x_t23_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L420
	ucomiss	xmm0, xmm1
	je	.L421
.L420:
	movzx	eax, BYTE PTR t23_l0[rip]
	test	al, al
	je	.L421
	movzx	eax, BYTE PTR t23_l1[rip]
	test	al, al
	jne	.L421
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L421
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L421
	movzx	eax, BYTE PTR t23_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t23_evt1[rip]
	test	al, al
	jne	.L349
.L421:
	movss	xmm0, DWORD PTR t23_x[rip]
	movss	xmm1, DWORD PTR _x_t23_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L423
	ucomiss	xmm0, xmm1
	jne	.L423
	movzx	eax, BYTE PTR _x_t23_l0[rip]
	test	al, al
	je	.L423
	movzx	eax, BYTE PTR _x_t23_l1[rip]
	test	al, al
	je	.L423
	movzx	eax, BYTE PTR t23_evt0[rip]
	test	al, al
	je	.L423
	movzx	eax, BYTE PTR t23_evt1[rip]
	test	al, al
	jne	.L425
.L423:
	movzx	eax, BYTE PTR t23_l1[rip]
	test	al, al
	je	.L425
	movzx	eax, BYTE PTR t23_l0[rip]
	test	al, al
	jne	.L425
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L425
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L425
	movzx	eax, BYTE PTR t23_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t23_evt1[rip]
	test	al, al
	jne	.L349
.L425:
	movzx	eax, BYTE PTR _x_t23_l0[rip]
	test	al, al
	jne	.L426
	movzx	eax, BYTE PTR _x_t23_l1[rip]
	test	al, al
	jne	.L426
	movss	xmm1, DWORD PTR t23_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L426
	movzx	eax, BYTE PTR t23_evt1[rip]
	test	al, al
	je	.L426
	movzx	eax, BYTE PTR t23_evt0[rip]
	test	al, al
	jne	.L426
	movss	xmm0, DWORD PTR t23_x[rip]
	movss	xmm1, DWORD PTR _x_t23_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L426
	ucomiss	xmm0, xmm1
	je	.L428
.L426:
	movzx	eax, BYTE PTR t23_l0[rip]
	test	al, al
	je	.L428
	movzx	eax, BYTE PTR t23_l1[rip]
	test	al, al
	je	.L428
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L428
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L428
	movzx	eax, BYTE PTR t23_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t23_evt1[rip]
	test	al, al
	jne	.L349
.L428:
	movzx	eax, BYTE PTR _x_t22_l0[rip]
	test	al, al
	jne	.L430
	movzx	eax, BYTE PTR _x_t22_l1[rip]
	test	al, al
	je	.L431
.L430:
	movzx	eax, BYTE PTR _x_t22_l0[rip]
	test	al, al
	je	.L432
	movzx	eax, BYTE PTR _x_t22_l1[rip]
	test	al, al
	je	.L431
.L432:
	movzx	eax, BYTE PTR _x_t22_l1[rip]
	test	al, al
	je	.L433
	movzx	eax, BYTE PTR _x_t22_l0[rip]
	test	al, al
	je	.L431
.L433:
	movzx	eax, BYTE PTR _x_t22_l0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t22_l1[rip]
	test	al, al
	je	.L349
.L431:
	movzx	eax, BYTE PTR _x_t22_evt0[rip]
	test	al, al
	jne	.L434
	movzx	eax, BYTE PTR _x_t22_evt1[rip]
	test	al, al
	je	.L435
.L434:
	movzx	eax, BYTE PTR _x_t22_evt0[rip]
	test	al, al
	je	.L436
	movzx	eax, BYTE PTR _x_t22_evt1[rip]
	test	al, al
	je	.L435
.L436:
	movzx	eax, BYTE PTR _x_t22_evt1[rip]
	test	al, al
	je	.L437
	movzx	eax, BYTE PTR _x_t22_evt0[rip]
	test	al, al
	je	.L435
.L437:
	movzx	eax, BYTE PTR _x_t22_evt0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t22_evt1[rip]
	test	al, al
	je	.L349
.L435:
	movzx	eax, BYTE PTR _x_t22_l0[rip]
	test	al, al
	jne	.L438
	movzx	eax, BYTE PTR _x_t22_l1[rip]
	test	al, al
	je	.L439
.L438:
	movss	xmm1, DWORD PTR _x_t22_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L349
.L439:
	movzx	eax, BYTE PTR t22_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t22_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L441
	movzx	eax, BYTE PTR t22_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t22_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L441
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t22_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t22_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L441
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L442
.L441:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L349
	movzx	eax, BYTE PTR t22_evt0[rip]
	test	al, al
	jne	.L442
	movzx	eax, BYTE PTR t22_evt1[rip]
	test	al, al
	je	.L349
.L442:
	movzx	eax, BYTE PTR _x_t22_l0[rip]
	test	al, al
	je	.L445
	movzx	eax, BYTE PTR _x_t22_l1[rip]
	test	al, al
	jne	.L445
	movzx	eax, BYTE PTR t22_evt0[rip]
	test	al, al
	je	.L445
	movzx	eax, BYTE PTR t22_evt1[rip]
	test	al, al
	jne	.L445
	movss	xmm0, DWORD PTR _x_t22_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L445
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L446
.L445:
	movzx	eax, BYTE PTR t22_l0[rip]
	test	al, al
	jne	.L446
	movzx	eax, BYTE PTR t22_l1[rip]
	test	al, al
	jne	.L446
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L446
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L446
	movzx	eax, BYTE PTR t22_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t22_evt1[rip]
	test	al, al
	jne	.L349
.L446:
	movzx	eax, BYTE PTR _x_t22_l1[rip]
	test	al, al
	je	.L448
	movzx	eax, BYTE PTR _x_t22_l0[rip]
	test	al, al
	jne	.L448
	movss	xmm1, DWORD PTR t22_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L448
	movzx	eax, BYTE PTR t22_evt0[rip]
	test	al, al
	je	.L448
	movzx	eax, BYTE PTR t22_evt1[rip]
	test	al, al
	je	.L448
	movss	xmm0, DWORD PTR t22_x[rip]
	movss	xmm1, DWORD PTR _x_t22_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L448
	ucomiss	xmm0, xmm1
	je	.L449
.L448:
	movzx	eax, BYTE PTR t22_l0[rip]
	test	al, al
	je	.L449
	movzx	eax, BYTE PTR t22_l1[rip]
	test	al, al
	jne	.L449
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L449
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L449
	movzx	eax, BYTE PTR t22_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t22_evt1[rip]
	test	al, al
	jne	.L349
.L449:
	movss	xmm0, DWORD PTR t22_x[rip]
	movss	xmm1, DWORD PTR _x_t22_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L451
	ucomiss	xmm0, xmm1
	jne	.L451
	movzx	eax, BYTE PTR _x_t22_l0[rip]
	test	al, al
	je	.L451
	movzx	eax, BYTE PTR _x_t22_l1[rip]
	test	al, al
	je	.L451
	movzx	eax, BYTE PTR t22_evt0[rip]
	test	al, al
	je	.L451
	movzx	eax, BYTE PTR t22_evt1[rip]
	test	al, al
	jne	.L453
.L451:
	movzx	eax, BYTE PTR t22_l1[rip]
	test	al, al
	je	.L453
	movzx	eax, BYTE PTR t22_l0[rip]
	test	al, al
	jne	.L453
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L453
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L453
	movzx	eax, BYTE PTR t22_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t22_evt1[rip]
	test	al, al
	jne	.L349
.L453:
	movzx	eax, BYTE PTR _x_t22_l0[rip]
	test	al, al
	jne	.L454
	movzx	eax, BYTE PTR _x_t22_l1[rip]
	test	al, al
	jne	.L454
	movss	xmm1, DWORD PTR t22_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L454
	movzx	eax, BYTE PTR t22_evt1[rip]
	test	al, al
	je	.L454
	movzx	eax, BYTE PTR t22_evt0[rip]
	test	al, al
	jne	.L454
	movss	xmm0, DWORD PTR t22_x[rip]
	movss	xmm1, DWORD PTR _x_t22_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L454
	ucomiss	xmm0, xmm1
	je	.L456
.L454:
	movzx	eax, BYTE PTR t22_l0[rip]
	test	al, al
	je	.L456
	movzx	eax, BYTE PTR t22_l1[rip]
	test	al, al
	je	.L456
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L456
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L456
	movzx	eax, BYTE PTR t22_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t22_evt1[rip]
	test	al, al
	jne	.L349
.L456:
	movzx	eax, BYTE PTR _x_t21_l0[rip]
	test	al, al
	jne	.L458
	movzx	eax, BYTE PTR _x_t21_l1[rip]
	test	al, al
	je	.L459
.L458:
	movzx	eax, BYTE PTR _x_t21_l0[rip]
	test	al, al
	je	.L460
	movzx	eax, BYTE PTR _x_t21_l1[rip]
	test	al, al
	je	.L459
.L460:
	movzx	eax, BYTE PTR _x_t21_l1[rip]
	test	al, al
	je	.L461
	movzx	eax, BYTE PTR _x_t21_l0[rip]
	test	al, al
	je	.L459
.L461:
	movzx	eax, BYTE PTR _x_t21_l0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t21_l1[rip]
	test	al, al
	je	.L349
.L459:
	movzx	eax, BYTE PTR _x_t21_evt0[rip]
	test	al, al
	jne	.L462
	movzx	eax, BYTE PTR _x_t21_evt1[rip]
	test	al, al
	je	.L463
.L462:
	movzx	eax, BYTE PTR _x_t21_evt0[rip]
	test	al, al
	je	.L464
	movzx	eax, BYTE PTR _x_t21_evt1[rip]
	test	al, al
	je	.L463
.L464:
	movzx	eax, BYTE PTR _x_t21_evt1[rip]
	test	al, al
	je	.L465
	movzx	eax, BYTE PTR _x_t21_evt0[rip]
	test	al, al
	je	.L463
.L465:
	movzx	eax, BYTE PTR _x_t21_evt0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t21_evt1[rip]
	test	al, al
	je	.L349
.L463:
	movzx	eax, BYTE PTR _x_t21_l0[rip]
	test	al, al
	jne	.L466
	movzx	eax, BYTE PTR _x_t21_l1[rip]
	test	al, al
	je	.L467
.L466:
	movss	xmm1, DWORD PTR _x_t21_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L349
.L467:
	movzx	eax, BYTE PTR t21_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t21_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L469
	movzx	eax, BYTE PTR t21_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t21_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L469
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t21_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t21_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L469
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L470
.L469:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L349
	movzx	eax, BYTE PTR t21_evt0[rip]
	test	al, al
	jne	.L470
	movzx	eax, BYTE PTR t21_evt1[rip]
	test	al, al
	je	.L349
.L470:
	movzx	eax, BYTE PTR _x_t21_l0[rip]
	test	al, al
	je	.L473
	movzx	eax, BYTE PTR _x_t21_l1[rip]
	test	al, al
	jne	.L473
	movzx	eax, BYTE PTR t21_evt0[rip]
	test	al, al
	je	.L473
	movzx	eax, BYTE PTR t21_evt1[rip]
	test	al, al
	jne	.L473
	movss	xmm0, DWORD PTR _x_t21_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L473
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L474
.L473:
	movzx	eax, BYTE PTR t21_l0[rip]
	test	al, al
	jne	.L474
	movzx	eax, BYTE PTR t21_l1[rip]
	test	al, al
	jne	.L474
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L474
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L474
	movzx	eax, BYTE PTR t21_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t21_evt1[rip]
	test	al, al
	jne	.L349
.L474:
	movzx	eax, BYTE PTR _x_t21_l1[rip]
	test	al, al
	je	.L476
	movzx	eax, BYTE PTR _x_t21_l0[rip]
	test	al, al
	jne	.L476
	movss	xmm1, DWORD PTR t21_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L476
	movzx	eax, BYTE PTR t21_evt0[rip]
	test	al, al
	je	.L476
	movzx	eax, BYTE PTR t21_evt1[rip]
	test	al, al
	je	.L476
	movss	xmm0, DWORD PTR t21_x[rip]
	movss	xmm1, DWORD PTR _x_t21_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L476
	ucomiss	xmm0, xmm1
	je	.L477
.L476:
	movzx	eax, BYTE PTR t21_l0[rip]
	test	al, al
	je	.L477
	movzx	eax, BYTE PTR t21_l1[rip]
	test	al, al
	jne	.L477
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L477
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L477
	movzx	eax, BYTE PTR t21_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t21_evt1[rip]
	test	al, al
	jne	.L349
.L477:
	movss	xmm0, DWORD PTR t21_x[rip]
	movss	xmm1, DWORD PTR _x_t21_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L479
	ucomiss	xmm0, xmm1
	jne	.L479
	movzx	eax, BYTE PTR _x_t21_l0[rip]
	test	al, al
	je	.L479
	movzx	eax, BYTE PTR _x_t21_l1[rip]
	test	al, al
	je	.L479
	movzx	eax, BYTE PTR t21_evt0[rip]
	test	al, al
	je	.L479
	movzx	eax, BYTE PTR t21_evt1[rip]
	test	al, al
	jne	.L481
.L479:
	movzx	eax, BYTE PTR t21_l1[rip]
	test	al, al
	je	.L481
	movzx	eax, BYTE PTR t21_l0[rip]
	test	al, al
	jne	.L481
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L481
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L481
	movzx	eax, BYTE PTR t21_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t21_evt1[rip]
	test	al, al
	jne	.L349
.L481:
	movzx	eax, BYTE PTR _x_t21_l0[rip]
	test	al, al
	jne	.L482
	movzx	eax, BYTE PTR _x_t21_l1[rip]
	test	al, al
	jne	.L482
	movss	xmm1, DWORD PTR t21_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L482
	movzx	eax, BYTE PTR t21_evt1[rip]
	test	al, al
	je	.L482
	movzx	eax, BYTE PTR t21_evt0[rip]
	test	al, al
	jne	.L482
	movss	xmm0, DWORD PTR t21_x[rip]
	movss	xmm1, DWORD PTR _x_t21_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L482
	ucomiss	xmm0, xmm1
	je	.L484
.L482:
	movzx	eax, BYTE PTR t21_l0[rip]
	test	al, al
	je	.L484
	movzx	eax, BYTE PTR t21_l1[rip]
	test	al, al
	je	.L484
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L484
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L484
	movzx	eax, BYTE PTR t21_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t21_evt1[rip]
	test	al, al
	jne	.L349
.L484:
	movzx	eax, BYTE PTR _x_t20_l0[rip]
	test	al, al
	jne	.L486
	movzx	eax, BYTE PTR _x_t20_l1[rip]
	test	al, al
	je	.L487
.L486:
	movzx	eax, BYTE PTR _x_t20_l0[rip]
	test	al, al
	je	.L488
	movzx	eax, BYTE PTR _x_t20_l1[rip]
	test	al, al
	je	.L487
.L488:
	movzx	eax, BYTE PTR _x_t20_l1[rip]
	test	al, al
	je	.L489
	movzx	eax, BYTE PTR _x_t20_l0[rip]
	test	al, al
	je	.L487
.L489:
	movzx	eax, BYTE PTR _x_t20_l0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t20_l1[rip]
	test	al, al
	je	.L349
.L487:
	movzx	eax, BYTE PTR _x_t20_evt0[rip]
	test	al, al
	jne	.L490
	movzx	eax, BYTE PTR _x_t20_evt1[rip]
	test	al, al
	je	.L491
.L490:
	movzx	eax, BYTE PTR _x_t20_evt0[rip]
	test	al, al
	je	.L492
	movzx	eax, BYTE PTR _x_t20_evt1[rip]
	test	al, al
	je	.L491
.L492:
	movzx	eax, BYTE PTR _x_t20_evt1[rip]
	test	al, al
	je	.L493
	movzx	eax, BYTE PTR _x_t20_evt0[rip]
	test	al, al
	je	.L491
.L493:
	movzx	eax, BYTE PTR _x_t20_evt0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t20_evt1[rip]
	test	al, al
	je	.L349
.L491:
	movzx	eax, BYTE PTR _x_t20_l0[rip]
	test	al, al
	jne	.L494
	movzx	eax, BYTE PTR _x_t20_l1[rip]
	test	al, al
	je	.L495
.L494:
	movss	xmm1, DWORD PTR _x_t20_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L349
.L495:
	movzx	eax, BYTE PTR t20_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t20_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L497
	movzx	eax, BYTE PTR t20_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t20_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L497
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t20_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t20_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L497
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L498
.L497:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L349
	movzx	eax, BYTE PTR t20_evt0[rip]
	test	al, al
	jne	.L498
	movzx	eax, BYTE PTR t20_evt1[rip]
	test	al, al
	je	.L349
.L498:
	movzx	eax, BYTE PTR _x_t20_l0[rip]
	test	al, al
	je	.L501
	movzx	eax, BYTE PTR _x_t20_l1[rip]
	test	al, al
	jne	.L501
	movzx	eax, BYTE PTR t20_evt0[rip]
	test	al, al
	je	.L501
	movzx	eax, BYTE PTR t20_evt1[rip]
	test	al, al
	jne	.L501
	movss	xmm0, DWORD PTR _x_t20_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L501
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L502
.L501:
	movzx	eax, BYTE PTR t20_l0[rip]
	test	al, al
	jne	.L502
	movzx	eax, BYTE PTR t20_l1[rip]
	test	al, al
	jne	.L502
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L502
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L502
	movzx	eax, BYTE PTR t20_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t20_evt1[rip]
	test	al, al
	jne	.L349
.L502:
	movzx	eax, BYTE PTR _x_t20_l1[rip]
	test	al, al
	je	.L504
	movzx	eax, BYTE PTR _x_t20_l0[rip]
	test	al, al
	jne	.L504
	movss	xmm1, DWORD PTR t20_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L504
	movzx	eax, BYTE PTR t20_evt0[rip]
	test	al, al
	je	.L504
	movzx	eax, BYTE PTR t20_evt1[rip]
	test	al, al
	je	.L504
	movss	xmm0, DWORD PTR t20_x[rip]
	movss	xmm1, DWORD PTR _x_t20_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L504
	ucomiss	xmm0, xmm1
	je	.L505
.L504:
	movzx	eax, BYTE PTR t20_l0[rip]
	test	al, al
	je	.L505
	movzx	eax, BYTE PTR t20_l1[rip]
	test	al, al
	jne	.L505
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L505
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L505
	movzx	eax, BYTE PTR t20_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t20_evt1[rip]
	test	al, al
	jne	.L349
.L505:
	movss	xmm0, DWORD PTR t20_x[rip]
	movss	xmm1, DWORD PTR _x_t20_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L507
	ucomiss	xmm0, xmm1
	jne	.L507
	movzx	eax, BYTE PTR _x_t20_l0[rip]
	test	al, al
	je	.L507
	movzx	eax, BYTE PTR _x_t20_l1[rip]
	test	al, al
	je	.L507
	movzx	eax, BYTE PTR t20_evt0[rip]
	test	al, al
	je	.L507
	movzx	eax, BYTE PTR t20_evt1[rip]
	test	al, al
	jne	.L509
.L507:
	movzx	eax, BYTE PTR t20_l1[rip]
	test	al, al
	je	.L509
	movzx	eax, BYTE PTR t20_l0[rip]
	test	al, al
	jne	.L509
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L509
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L509
	movzx	eax, BYTE PTR t20_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t20_evt1[rip]
	test	al, al
	jne	.L349
.L509:
	movzx	eax, BYTE PTR _x_t20_l0[rip]
	test	al, al
	jne	.L510
	movzx	eax, BYTE PTR _x_t20_l1[rip]
	test	al, al
	jne	.L510
	movss	xmm1, DWORD PTR t20_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L510
	movzx	eax, BYTE PTR t20_evt1[rip]
	test	al, al
	je	.L510
	movzx	eax, BYTE PTR t20_evt0[rip]
	test	al, al
	jne	.L510
	movss	xmm0, DWORD PTR t20_x[rip]
	movss	xmm1, DWORD PTR _x_t20_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L510
	ucomiss	xmm0, xmm1
	je	.L512
.L510:
	movzx	eax, BYTE PTR t20_l0[rip]
	test	al, al
	je	.L512
	movzx	eax, BYTE PTR t20_l1[rip]
	test	al, al
	je	.L512
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L512
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L512
	movzx	eax, BYTE PTR t20_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t20_evt1[rip]
	test	al, al
	jne	.L349
.L512:
	movzx	eax, BYTE PTR _x_t19_l0[rip]
	test	al, al
	jne	.L514
	movzx	eax, BYTE PTR _x_t19_l1[rip]
	test	al, al
	je	.L515
.L514:
	movzx	eax, BYTE PTR _x_t19_l0[rip]
	test	al, al
	je	.L516
	movzx	eax, BYTE PTR _x_t19_l1[rip]
	test	al, al
	je	.L515
.L516:
	movzx	eax, BYTE PTR _x_t19_l1[rip]
	test	al, al
	je	.L517
	movzx	eax, BYTE PTR _x_t19_l0[rip]
	test	al, al
	je	.L515
.L517:
	movzx	eax, BYTE PTR _x_t19_l0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t19_l1[rip]
	test	al, al
	je	.L349
.L515:
	movzx	eax, BYTE PTR _x_t19_evt0[rip]
	test	al, al
	jne	.L518
	movzx	eax, BYTE PTR _x_t19_evt1[rip]
	test	al, al
	je	.L519
.L518:
	movzx	eax, BYTE PTR _x_t19_evt0[rip]
	test	al, al
	je	.L520
	movzx	eax, BYTE PTR _x_t19_evt1[rip]
	test	al, al
	je	.L519
.L520:
	movzx	eax, BYTE PTR _x_t19_evt1[rip]
	test	al, al
	je	.L521
	movzx	eax, BYTE PTR _x_t19_evt0[rip]
	test	al, al
	je	.L519
.L521:
	movzx	eax, BYTE PTR _x_t19_evt0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t19_evt1[rip]
	test	al, al
	je	.L349
.L519:
	movzx	eax, BYTE PTR _x_t19_l0[rip]
	test	al, al
	jne	.L522
	movzx	eax, BYTE PTR _x_t19_l1[rip]
	test	al, al
	je	.L523
.L522:
	movss	xmm1, DWORD PTR _x_t19_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L349
.L523:
	movzx	eax, BYTE PTR t19_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t19_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L525
	movzx	eax, BYTE PTR t19_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t19_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L525
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t19_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t19_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L525
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L526
.L525:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L349
	movzx	eax, BYTE PTR t19_evt0[rip]
	test	al, al
	jne	.L526
	movzx	eax, BYTE PTR t19_evt1[rip]
	test	al, al
	je	.L349
.L526:
	movzx	eax, BYTE PTR _x_t19_l0[rip]
	test	al, al
	je	.L529
	movzx	eax, BYTE PTR _x_t19_l1[rip]
	test	al, al
	jne	.L529
	movzx	eax, BYTE PTR t19_evt0[rip]
	test	al, al
	je	.L529
	movzx	eax, BYTE PTR t19_evt1[rip]
	test	al, al
	jne	.L529
	movss	xmm0, DWORD PTR _x_t19_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L529
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L530
.L529:
	movzx	eax, BYTE PTR t19_l0[rip]
	test	al, al
	jne	.L530
	movzx	eax, BYTE PTR t19_l1[rip]
	test	al, al
	jne	.L530
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L530
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L530
	movzx	eax, BYTE PTR t19_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t19_evt1[rip]
	test	al, al
	jne	.L349
.L530:
	movzx	eax, BYTE PTR _x_t19_l1[rip]
	test	al, al
	je	.L532
	movzx	eax, BYTE PTR _x_t19_l0[rip]
	test	al, al
	jne	.L532
	movss	xmm1, DWORD PTR t19_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L532
	movzx	eax, BYTE PTR t19_evt0[rip]
	test	al, al
	je	.L532
	movzx	eax, BYTE PTR t19_evt1[rip]
	test	al, al
	je	.L532
	movss	xmm0, DWORD PTR t19_x[rip]
	movss	xmm1, DWORD PTR _x_t19_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L532
	ucomiss	xmm0, xmm1
	je	.L533
.L532:
	movzx	eax, BYTE PTR t19_l0[rip]
	test	al, al
	je	.L533
	movzx	eax, BYTE PTR t19_l1[rip]
	test	al, al
	jne	.L533
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L533
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L533
	movzx	eax, BYTE PTR t19_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t19_evt1[rip]
	test	al, al
	jne	.L349
.L533:
	movss	xmm0, DWORD PTR t19_x[rip]
	movss	xmm1, DWORD PTR _x_t19_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L535
	ucomiss	xmm0, xmm1
	jne	.L535
	movzx	eax, BYTE PTR _x_t19_l0[rip]
	test	al, al
	je	.L535
	movzx	eax, BYTE PTR _x_t19_l1[rip]
	test	al, al
	je	.L535
	movzx	eax, BYTE PTR t19_evt0[rip]
	test	al, al
	je	.L535
	movzx	eax, BYTE PTR t19_evt1[rip]
	test	al, al
	jne	.L537
.L535:
	movzx	eax, BYTE PTR t19_l1[rip]
	test	al, al
	je	.L537
	movzx	eax, BYTE PTR t19_l0[rip]
	test	al, al
	jne	.L537
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L537
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L537
	movzx	eax, BYTE PTR t19_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t19_evt1[rip]
	test	al, al
	jne	.L349
.L537:
	movzx	eax, BYTE PTR _x_t19_l0[rip]
	test	al, al
	jne	.L538
	movzx	eax, BYTE PTR _x_t19_l1[rip]
	test	al, al
	jne	.L538
	movss	xmm1, DWORD PTR t19_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L538
	movzx	eax, BYTE PTR t19_evt1[rip]
	test	al, al
	je	.L538
	movzx	eax, BYTE PTR t19_evt0[rip]
	test	al, al
	jne	.L538
	movss	xmm0, DWORD PTR t19_x[rip]
	movss	xmm1, DWORD PTR _x_t19_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L538
	ucomiss	xmm0, xmm1
	je	.L540
.L538:
	movzx	eax, BYTE PTR t19_l0[rip]
	test	al, al
	je	.L540
	movzx	eax, BYTE PTR t19_l1[rip]
	test	al, al
	je	.L540
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L540
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L540
	movzx	eax, BYTE PTR t19_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t19_evt1[rip]
	test	al, al
	jne	.L349
.L540:
	movzx	eax, BYTE PTR _x_t18_l0[rip]
	test	al, al
	jne	.L542
	movzx	eax, BYTE PTR _x_t18_l1[rip]
	test	al, al
	je	.L543
.L542:
	movzx	eax, BYTE PTR _x_t18_l0[rip]
	test	al, al
	je	.L544
	movzx	eax, BYTE PTR _x_t18_l1[rip]
	test	al, al
	je	.L543
.L544:
	movzx	eax, BYTE PTR _x_t18_l1[rip]
	test	al, al
	je	.L545
	movzx	eax, BYTE PTR _x_t18_l0[rip]
	test	al, al
	je	.L543
.L545:
	movzx	eax, BYTE PTR _x_t18_l0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t18_l1[rip]
	test	al, al
	je	.L349
.L543:
	movzx	eax, BYTE PTR _x_t18_evt0[rip]
	test	al, al
	jne	.L546
	movzx	eax, BYTE PTR _x_t18_evt1[rip]
	test	al, al
	je	.L547
.L546:
	movzx	eax, BYTE PTR _x_t18_evt0[rip]
	test	al, al
	je	.L548
	movzx	eax, BYTE PTR _x_t18_evt1[rip]
	test	al, al
	je	.L547
.L548:
	movzx	eax, BYTE PTR _x_t18_evt1[rip]
	test	al, al
	je	.L549
	movzx	eax, BYTE PTR _x_t18_evt0[rip]
	test	al, al
	je	.L547
.L549:
	movzx	eax, BYTE PTR _x_t18_evt0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t18_evt1[rip]
	test	al, al
	je	.L349
.L547:
	movzx	eax, BYTE PTR _x_t18_l0[rip]
	test	al, al
	jne	.L550
	movzx	eax, BYTE PTR _x_t18_l1[rip]
	test	al, al
	je	.L551
.L550:
	movss	xmm1, DWORD PTR _x_t18_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L349
.L551:
	movzx	eax, BYTE PTR t18_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t18_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L553
	movzx	eax, BYTE PTR t18_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t18_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L553
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t18_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t18_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L553
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L554
.L553:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L349
	movzx	eax, BYTE PTR t18_evt0[rip]
	test	al, al
	jne	.L554
	movzx	eax, BYTE PTR t18_evt1[rip]
	test	al, al
	je	.L349
.L554:
	movzx	eax, BYTE PTR _x_t18_l0[rip]
	test	al, al
	je	.L557
	movzx	eax, BYTE PTR _x_t18_l1[rip]
	test	al, al
	jne	.L557
	movzx	eax, BYTE PTR t18_evt0[rip]
	test	al, al
	je	.L557
	movzx	eax, BYTE PTR t18_evt1[rip]
	test	al, al
	jne	.L557
	movss	xmm0, DWORD PTR _x_t18_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L557
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L558
.L557:
	movzx	eax, BYTE PTR t18_l0[rip]
	test	al, al
	jne	.L558
	movzx	eax, BYTE PTR t18_l1[rip]
	test	al, al
	jne	.L558
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L558
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L558
	movzx	eax, BYTE PTR t18_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t18_evt1[rip]
	test	al, al
	jne	.L349
.L558:
	movzx	eax, BYTE PTR _x_t18_l1[rip]
	test	al, al
	je	.L560
	movzx	eax, BYTE PTR _x_t18_l0[rip]
	test	al, al
	jne	.L560
	movss	xmm1, DWORD PTR t18_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L560
	movzx	eax, BYTE PTR t18_evt0[rip]
	test	al, al
	je	.L560
	movzx	eax, BYTE PTR t18_evt1[rip]
	test	al, al
	je	.L560
	movss	xmm0, DWORD PTR t18_x[rip]
	movss	xmm1, DWORD PTR _x_t18_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L560
	ucomiss	xmm0, xmm1
	je	.L561
.L560:
	movzx	eax, BYTE PTR t18_l0[rip]
	test	al, al
	je	.L561
	movzx	eax, BYTE PTR t18_l1[rip]
	test	al, al
	jne	.L561
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L561
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L561
	movzx	eax, BYTE PTR t18_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t18_evt1[rip]
	test	al, al
	jne	.L349
.L561:
	movss	xmm0, DWORD PTR t18_x[rip]
	movss	xmm1, DWORD PTR _x_t18_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L563
	ucomiss	xmm0, xmm1
	jne	.L563
	movzx	eax, BYTE PTR _x_t18_l0[rip]
	test	al, al
	je	.L563
	movzx	eax, BYTE PTR _x_t18_l1[rip]
	test	al, al
	je	.L563
	movzx	eax, BYTE PTR t18_evt0[rip]
	test	al, al
	je	.L563
	movzx	eax, BYTE PTR t18_evt1[rip]
	test	al, al
	jne	.L565
.L563:
	movzx	eax, BYTE PTR t18_l1[rip]
	test	al, al
	je	.L565
	movzx	eax, BYTE PTR t18_l0[rip]
	test	al, al
	jne	.L565
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L565
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L565
	movzx	eax, BYTE PTR t18_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t18_evt1[rip]
	test	al, al
	jne	.L349
.L565:
	movzx	eax, BYTE PTR _x_t18_l0[rip]
	test	al, al
	jne	.L566
	movzx	eax, BYTE PTR _x_t18_l1[rip]
	test	al, al
	jne	.L566
	movss	xmm1, DWORD PTR t18_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L566
	movzx	eax, BYTE PTR t18_evt1[rip]
	test	al, al
	je	.L566
	movzx	eax, BYTE PTR t18_evt0[rip]
	test	al, al
	jne	.L566
	movss	xmm0, DWORD PTR t18_x[rip]
	movss	xmm1, DWORD PTR _x_t18_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L566
	ucomiss	xmm0, xmm1
	je	.L568
.L566:
	movzx	eax, BYTE PTR t18_l0[rip]
	test	al, al
	je	.L568
	movzx	eax, BYTE PTR t18_l1[rip]
	test	al, al
	je	.L568
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L568
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L568
	movzx	eax, BYTE PTR t18_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t18_evt1[rip]
	test	al, al
	jne	.L349
.L568:
	movzx	eax, BYTE PTR _x_t17_l0[rip]
	test	al, al
	jne	.L570
	movzx	eax, BYTE PTR _x_t17_l1[rip]
	test	al, al
	je	.L571
.L570:
	movzx	eax, BYTE PTR _x_t17_l0[rip]
	test	al, al
	je	.L572
	movzx	eax, BYTE PTR _x_t17_l1[rip]
	test	al, al
	je	.L571
.L572:
	movzx	eax, BYTE PTR _x_t17_l1[rip]
	test	al, al
	je	.L573
	movzx	eax, BYTE PTR _x_t17_l0[rip]
	test	al, al
	je	.L571
.L573:
	movzx	eax, BYTE PTR _x_t17_l0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t17_l1[rip]
	test	al, al
	je	.L349
.L571:
	movzx	eax, BYTE PTR _x_t17_evt0[rip]
	test	al, al
	jne	.L574
	movzx	eax, BYTE PTR _x_t17_evt1[rip]
	test	al, al
	je	.L575
.L574:
	movzx	eax, BYTE PTR _x_t17_evt0[rip]
	test	al, al
	je	.L576
	movzx	eax, BYTE PTR _x_t17_evt1[rip]
	test	al, al
	je	.L575
.L576:
	movzx	eax, BYTE PTR _x_t17_evt1[rip]
	test	al, al
	je	.L577
	movzx	eax, BYTE PTR _x_t17_evt0[rip]
	test	al, al
	je	.L575
.L577:
	movzx	eax, BYTE PTR _x_t17_evt0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t17_evt1[rip]
	test	al, al
	je	.L349
.L575:
	movzx	eax, BYTE PTR _x_t17_l0[rip]
	test	al, al
	jne	.L578
	movzx	eax, BYTE PTR _x_t17_l1[rip]
	test	al, al
	je	.L579
.L578:
	movss	xmm1, DWORD PTR _x_t17_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L349
.L579:
	movzx	eax, BYTE PTR t17_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t17_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L581
	movzx	eax, BYTE PTR t17_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t17_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L581
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t17_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t17_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L581
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L582
.L581:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L349
	movzx	eax, BYTE PTR t17_evt0[rip]
	test	al, al
	jne	.L582
	movzx	eax, BYTE PTR t17_evt1[rip]
	test	al, al
	je	.L349
.L582:
	movzx	eax, BYTE PTR _x_t17_l0[rip]
	test	al, al
	je	.L585
	movzx	eax, BYTE PTR _x_t17_l1[rip]
	test	al, al
	jne	.L585
	movzx	eax, BYTE PTR t17_evt0[rip]
	test	al, al
	je	.L585
	movzx	eax, BYTE PTR t17_evt1[rip]
	test	al, al
	jne	.L585
	movss	xmm0, DWORD PTR _x_t17_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L585
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L586
.L585:
	movzx	eax, BYTE PTR t17_l0[rip]
	test	al, al
	jne	.L586
	movzx	eax, BYTE PTR t17_l1[rip]
	test	al, al
	jne	.L586
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L586
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L586
	movzx	eax, BYTE PTR t17_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t17_evt1[rip]
	test	al, al
	jne	.L349
.L586:
	movzx	eax, BYTE PTR _x_t17_l1[rip]
	test	al, al
	je	.L588
	movzx	eax, BYTE PTR _x_t17_l0[rip]
	test	al, al
	jne	.L588
	movss	xmm1, DWORD PTR t17_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L588
	movzx	eax, BYTE PTR t17_evt0[rip]
	test	al, al
	je	.L588
	movzx	eax, BYTE PTR t17_evt1[rip]
	test	al, al
	je	.L588
	movss	xmm0, DWORD PTR t17_x[rip]
	movss	xmm1, DWORD PTR _x_t17_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L588
	ucomiss	xmm0, xmm1
	je	.L589
.L588:
	movzx	eax, BYTE PTR t17_l0[rip]
	test	al, al
	je	.L589
	movzx	eax, BYTE PTR t17_l1[rip]
	test	al, al
	jne	.L589
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L589
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L589
	movzx	eax, BYTE PTR t17_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t17_evt1[rip]
	test	al, al
	jne	.L349
.L589:
	movss	xmm0, DWORD PTR t17_x[rip]
	movss	xmm1, DWORD PTR _x_t17_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L591
	ucomiss	xmm0, xmm1
	jne	.L591
	movzx	eax, BYTE PTR _x_t17_l0[rip]
	test	al, al
	je	.L591
	movzx	eax, BYTE PTR _x_t17_l1[rip]
	test	al, al
	je	.L591
	movzx	eax, BYTE PTR t17_evt0[rip]
	test	al, al
	je	.L591
	movzx	eax, BYTE PTR t17_evt1[rip]
	test	al, al
	jne	.L593
.L591:
	movzx	eax, BYTE PTR t17_l1[rip]
	test	al, al
	je	.L593
	movzx	eax, BYTE PTR t17_l0[rip]
	test	al, al
	jne	.L593
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L593
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L593
	movzx	eax, BYTE PTR t17_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t17_evt1[rip]
	test	al, al
	jne	.L349
.L593:
	movzx	eax, BYTE PTR _x_t17_l0[rip]
	test	al, al
	jne	.L594
	movzx	eax, BYTE PTR _x_t17_l1[rip]
	test	al, al
	jne	.L594
	movss	xmm1, DWORD PTR t17_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L594
	movzx	eax, BYTE PTR t17_evt1[rip]
	test	al, al
	je	.L594
	movzx	eax, BYTE PTR t17_evt0[rip]
	test	al, al
	jne	.L594
	movss	xmm0, DWORD PTR t17_x[rip]
	movss	xmm1, DWORD PTR _x_t17_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L594
	ucomiss	xmm0, xmm1
	je	.L596
.L594:
	movzx	eax, BYTE PTR t17_l0[rip]
	test	al, al
	je	.L596
	movzx	eax, BYTE PTR t17_l1[rip]
	test	al, al
	je	.L596
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L596
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L596
	movzx	eax, BYTE PTR t17_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t17_evt1[rip]
	test	al, al
	jne	.L349
.L596:
	movzx	eax, BYTE PTR _x_t16_l0[rip]
	test	al, al
	jne	.L598
	movzx	eax, BYTE PTR _x_t16_l1[rip]
	test	al, al
	je	.L599
.L598:
	movzx	eax, BYTE PTR _x_t16_l0[rip]
	test	al, al
	je	.L600
	movzx	eax, BYTE PTR _x_t16_l1[rip]
	test	al, al
	je	.L599
.L600:
	movzx	eax, BYTE PTR _x_t16_l1[rip]
	test	al, al
	je	.L601
	movzx	eax, BYTE PTR _x_t16_l0[rip]
	test	al, al
	je	.L599
.L601:
	movzx	eax, BYTE PTR _x_t16_l0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t16_l1[rip]
	test	al, al
	je	.L349
.L599:
	movzx	eax, BYTE PTR _x_t16_evt0[rip]
	test	al, al
	jne	.L602
	movzx	eax, BYTE PTR _x_t16_evt1[rip]
	test	al, al
	je	.L603
.L602:
	movzx	eax, BYTE PTR _x_t16_evt0[rip]
	test	al, al
	je	.L604
	movzx	eax, BYTE PTR _x_t16_evt1[rip]
	test	al, al
	je	.L603
.L604:
	movzx	eax, BYTE PTR _x_t16_evt1[rip]
	test	al, al
	je	.L605
	movzx	eax, BYTE PTR _x_t16_evt0[rip]
	test	al, al
	je	.L603
.L605:
	movzx	eax, BYTE PTR _x_t16_evt0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t16_evt1[rip]
	test	al, al
	je	.L349
.L603:
	movzx	eax, BYTE PTR _x_t16_l0[rip]
	test	al, al
	jne	.L606
	movzx	eax, BYTE PTR _x_t16_l1[rip]
	test	al, al
	je	.L607
.L606:
	movss	xmm1, DWORD PTR _x_t16_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L349
.L607:
	movzx	eax, BYTE PTR t16_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t16_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L609
	movzx	eax, BYTE PTR t16_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t16_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L609
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t16_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t16_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L609
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L610
.L609:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L349
	movzx	eax, BYTE PTR t16_evt0[rip]
	test	al, al
	jne	.L610
	movzx	eax, BYTE PTR t16_evt1[rip]
	test	al, al
	je	.L349
.L610:
	movzx	eax, BYTE PTR _x_t16_l0[rip]
	test	al, al
	je	.L613
	movzx	eax, BYTE PTR _x_t16_l1[rip]
	test	al, al
	jne	.L613
	movzx	eax, BYTE PTR t16_evt0[rip]
	test	al, al
	je	.L613
	movzx	eax, BYTE PTR t16_evt1[rip]
	test	al, al
	jne	.L613
	movss	xmm0, DWORD PTR _x_t16_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L613
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L614
.L613:
	movzx	eax, BYTE PTR t16_l0[rip]
	test	al, al
	jne	.L614
	movzx	eax, BYTE PTR t16_l1[rip]
	test	al, al
	jne	.L614
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L614
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L614
	movzx	eax, BYTE PTR t16_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t16_evt1[rip]
	test	al, al
	jne	.L349
.L614:
	movzx	eax, BYTE PTR _x_t16_l1[rip]
	test	al, al
	je	.L616
	movzx	eax, BYTE PTR _x_t16_l0[rip]
	test	al, al
	jne	.L616
	movss	xmm1, DWORD PTR t16_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L616
	movzx	eax, BYTE PTR t16_evt0[rip]
	test	al, al
	je	.L616
	movzx	eax, BYTE PTR t16_evt1[rip]
	test	al, al
	je	.L616
	movss	xmm0, DWORD PTR t16_x[rip]
	movss	xmm1, DWORD PTR _x_t16_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L616
	ucomiss	xmm0, xmm1
	je	.L617
.L616:
	movzx	eax, BYTE PTR t16_l0[rip]
	test	al, al
	je	.L617
	movzx	eax, BYTE PTR t16_l1[rip]
	test	al, al
	jne	.L617
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L617
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L617
	movzx	eax, BYTE PTR t16_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t16_evt1[rip]
	test	al, al
	jne	.L349
.L617:
	movss	xmm0, DWORD PTR t16_x[rip]
	movss	xmm1, DWORD PTR _x_t16_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L619
	ucomiss	xmm0, xmm1
	jne	.L619
	movzx	eax, BYTE PTR _x_t16_l0[rip]
	test	al, al
	je	.L619
	movzx	eax, BYTE PTR _x_t16_l1[rip]
	test	al, al
	je	.L619
	movzx	eax, BYTE PTR t16_evt0[rip]
	test	al, al
	je	.L619
	movzx	eax, BYTE PTR t16_evt1[rip]
	test	al, al
	jne	.L621
.L619:
	movzx	eax, BYTE PTR t16_l1[rip]
	test	al, al
	je	.L621
	movzx	eax, BYTE PTR t16_l0[rip]
	test	al, al
	jne	.L621
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L621
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L621
	movzx	eax, BYTE PTR t16_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t16_evt1[rip]
	test	al, al
	jne	.L349
.L621:
	movzx	eax, BYTE PTR _x_t16_l0[rip]
	test	al, al
	jne	.L622
	movzx	eax, BYTE PTR _x_t16_l1[rip]
	test	al, al
	jne	.L622
	movss	xmm1, DWORD PTR t16_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L622
	movzx	eax, BYTE PTR t16_evt1[rip]
	test	al, al
	je	.L622
	movzx	eax, BYTE PTR t16_evt0[rip]
	test	al, al
	jne	.L622
	movss	xmm0, DWORD PTR t16_x[rip]
	movss	xmm1, DWORD PTR _x_t16_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L622
	ucomiss	xmm0, xmm1
	je	.L624
.L622:
	movzx	eax, BYTE PTR t16_l0[rip]
	test	al, al
	je	.L624
	movzx	eax, BYTE PTR t16_l1[rip]
	test	al, al
	je	.L624
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L624
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L624
	movzx	eax, BYTE PTR t16_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t16_evt1[rip]
	test	al, al
	jne	.L349
.L624:
	movzx	eax, BYTE PTR _x_t15_l0[rip]
	test	al, al
	jne	.L626
	movzx	eax, BYTE PTR _x_t15_l1[rip]
	test	al, al
	je	.L627
.L626:
	movzx	eax, BYTE PTR _x_t15_l0[rip]
	test	al, al
	je	.L628
	movzx	eax, BYTE PTR _x_t15_l1[rip]
	test	al, al
	je	.L627
.L628:
	movzx	eax, BYTE PTR _x_t15_l1[rip]
	test	al, al
	je	.L629
	movzx	eax, BYTE PTR _x_t15_l0[rip]
	test	al, al
	je	.L627
.L629:
	movzx	eax, BYTE PTR _x_t15_l0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t15_l1[rip]
	test	al, al
	je	.L349
.L627:
	movzx	eax, BYTE PTR _x_t15_evt0[rip]
	test	al, al
	jne	.L630
	movzx	eax, BYTE PTR _x_t15_evt1[rip]
	test	al, al
	je	.L631
.L630:
	movzx	eax, BYTE PTR _x_t15_evt0[rip]
	test	al, al
	je	.L632
	movzx	eax, BYTE PTR _x_t15_evt1[rip]
	test	al, al
	je	.L631
.L632:
	movzx	eax, BYTE PTR _x_t15_evt1[rip]
	test	al, al
	je	.L633
	movzx	eax, BYTE PTR _x_t15_evt0[rip]
	test	al, al
	je	.L631
.L633:
	movzx	eax, BYTE PTR _x_t15_evt0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t15_evt1[rip]
	test	al, al
	je	.L349
.L631:
	movzx	eax, BYTE PTR _x_t15_l0[rip]
	test	al, al
	jne	.L634
	movzx	eax, BYTE PTR _x_t15_l1[rip]
	test	al, al
	je	.L635
.L634:
	movss	xmm1, DWORD PTR _x_t15_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L349
.L635:
	movzx	eax, BYTE PTR t15_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t15_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L637
	movzx	eax, BYTE PTR t15_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t15_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L637
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t15_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t15_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L637
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L638
.L637:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L349
	movzx	eax, BYTE PTR t15_evt0[rip]
	test	al, al
	jne	.L638
	movzx	eax, BYTE PTR t15_evt1[rip]
	test	al, al
	je	.L349
.L638:
	movzx	eax, BYTE PTR _x_t15_l0[rip]
	test	al, al
	je	.L641
	movzx	eax, BYTE PTR _x_t15_l1[rip]
	test	al, al
	jne	.L641
	movzx	eax, BYTE PTR t15_evt0[rip]
	test	al, al
	je	.L641
	movzx	eax, BYTE PTR t15_evt1[rip]
	test	al, al
	jne	.L641
	movss	xmm0, DWORD PTR _x_t15_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L641
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L642
.L641:
	movzx	eax, BYTE PTR t15_l0[rip]
	test	al, al
	jne	.L642
	movzx	eax, BYTE PTR t15_l1[rip]
	test	al, al
	jne	.L642
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L642
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L642
	movzx	eax, BYTE PTR t15_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t15_evt1[rip]
	test	al, al
	jne	.L349
.L642:
	movzx	eax, BYTE PTR _x_t15_l1[rip]
	test	al, al
	je	.L644
	movzx	eax, BYTE PTR _x_t15_l0[rip]
	test	al, al
	jne	.L644
	movss	xmm1, DWORD PTR t15_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L644
	movzx	eax, BYTE PTR t15_evt0[rip]
	test	al, al
	je	.L644
	movzx	eax, BYTE PTR t15_evt1[rip]
	test	al, al
	je	.L644
	movss	xmm0, DWORD PTR t15_x[rip]
	movss	xmm1, DWORD PTR _x_t15_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L644
	ucomiss	xmm0, xmm1
	je	.L645
.L644:
	movzx	eax, BYTE PTR t15_l0[rip]
	test	al, al
	je	.L645
	movzx	eax, BYTE PTR t15_l1[rip]
	test	al, al
	jne	.L645
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L645
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L645
	movzx	eax, BYTE PTR t15_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t15_evt1[rip]
	test	al, al
	jne	.L349
.L645:
	movss	xmm0, DWORD PTR t15_x[rip]
	movss	xmm1, DWORD PTR _x_t15_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L647
	ucomiss	xmm0, xmm1
	jne	.L647
	movzx	eax, BYTE PTR _x_t15_l0[rip]
	test	al, al
	je	.L647
	movzx	eax, BYTE PTR _x_t15_l1[rip]
	test	al, al
	je	.L647
	movzx	eax, BYTE PTR t15_evt0[rip]
	test	al, al
	je	.L647
	movzx	eax, BYTE PTR t15_evt1[rip]
	test	al, al
	jne	.L649
.L647:
	movzx	eax, BYTE PTR t15_l1[rip]
	test	al, al
	je	.L649
	movzx	eax, BYTE PTR t15_l0[rip]
	test	al, al
	jne	.L649
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L649
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L649
	movzx	eax, BYTE PTR t15_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t15_evt1[rip]
	test	al, al
	jne	.L349
.L649:
	movzx	eax, BYTE PTR _x_t15_l0[rip]
	test	al, al
	jne	.L650
	movzx	eax, BYTE PTR _x_t15_l1[rip]
	test	al, al
	jne	.L650
	movss	xmm1, DWORD PTR t15_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L650
	movzx	eax, BYTE PTR t15_evt1[rip]
	test	al, al
	je	.L650
	movzx	eax, BYTE PTR t15_evt0[rip]
	test	al, al
	jne	.L650
	movss	xmm0, DWORD PTR t15_x[rip]
	movss	xmm1, DWORD PTR _x_t15_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L650
	ucomiss	xmm0, xmm1
	je	.L652
.L650:
	movzx	eax, BYTE PTR t15_l0[rip]
	test	al, al
	je	.L652
	movzx	eax, BYTE PTR t15_l1[rip]
	test	al, al
	je	.L652
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L652
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L652
	movzx	eax, BYTE PTR t15_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t15_evt1[rip]
	test	al, al
	jne	.L349
.L652:
	movzx	eax, BYTE PTR _x_t14_l0[rip]
	test	al, al
	jne	.L654
	movzx	eax, BYTE PTR _x_t14_l1[rip]
	test	al, al
	je	.L655
.L654:
	movzx	eax, BYTE PTR _x_t14_l0[rip]
	test	al, al
	je	.L656
	movzx	eax, BYTE PTR _x_t14_l1[rip]
	test	al, al
	je	.L655
.L656:
	movzx	eax, BYTE PTR _x_t14_l1[rip]
	test	al, al
	je	.L657
	movzx	eax, BYTE PTR _x_t14_l0[rip]
	test	al, al
	je	.L655
.L657:
	movzx	eax, BYTE PTR _x_t14_l0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t14_l1[rip]
	test	al, al
	je	.L349
.L655:
	movzx	eax, BYTE PTR _x_t14_evt0[rip]
	test	al, al
	jne	.L658
	movzx	eax, BYTE PTR _x_t14_evt1[rip]
	test	al, al
	je	.L659
.L658:
	movzx	eax, BYTE PTR _x_t14_evt0[rip]
	test	al, al
	je	.L660
	movzx	eax, BYTE PTR _x_t14_evt1[rip]
	test	al, al
	je	.L659
.L660:
	movzx	eax, BYTE PTR _x_t14_evt1[rip]
	test	al, al
	je	.L661
	movzx	eax, BYTE PTR _x_t14_evt0[rip]
	test	al, al
	je	.L659
.L661:
	movzx	eax, BYTE PTR _x_t14_evt0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t14_evt1[rip]
	test	al, al
	je	.L349
.L659:
	movzx	eax, BYTE PTR _x_t14_l0[rip]
	test	al, al
	jne	.L662
	movzx	eax, BYTE PTR _x_t14_l1[rip]
	test	al, al
	je	.L663
.L662:
	movss	xmm1, DWORD PTR _x_t14_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L349
.L663:
	movzx	eax, BYTE PTR t14_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t14_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L665
	movzx	eax, BYTE PTR t14_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t14_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L665
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t14_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t14_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L665
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L666
.L665:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L349
	movzx	eax, BYTE PTR t14_evt0[rip]
	test	al, al
	jne	.L666
	movzx	eax, BYTE PTR t14_evt1[rip]
	test	al, al
	je	.L349
.L666:
	movzx	eax, BYTE PTR _x_t14_l0[rip]
	test	al, al
	je	.L669
	movzx	eax, BYTE PTR _x_t14_l1[rip]
	test	al, al
	jne	.L669
	movzx	eax, BYTE PTR t14_evt0[rip]
	test	al, al
	je	.L669
	movzx	eax, BYTE PTR t14_evt1[rip]
	test	al, al
	jne	.L669
	movss	xmm0, DWORD PTR _x_t14_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L669
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L670
.L669:
	movzx	eax, BYTE PTR t14_l0[rip]
	test	al, al
	jne	.L670
	movzx	eax, BYTE PTR t14_l1[rip]
	test	al, al
	jne	.L670
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L670
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L670
	movzx	eax, BYTE PTR t14_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t14_evt1[rip]
	test	al, al
	jne	.L349
.L670:
	movzx	eax, BYTE PTR _x_t14_l1[rip]
	test	al, al
	je	.L672
	movzx	eax, BYTE PTR _x_t14_l0[rip]
	test	al, al
	jne	.L672
	movss	xmm1, DWORD PTR t14_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L672
	movzx	eax, BYTE PTR t14_evt0[rip]
	test	al, al
	je	.L672
	movzx	eax, BYTE PTR t14_evt1[rip]
	test	al, al
	je	.L672
	movss	xmm0, DWORD PTR t14_x[rip]
	movss	xmm1, DWORD PTR _x_t14_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L672
	ucomiss	xmm0, xmm1
	je	.L673
.L672:
	movzx	eax, BYTE PTR t14_l0[rip]
	test	al, al
	je	.L673
	movzx	eax, BYTE PTR t14_l1[rip]
	test	al, al
	jne	.L673
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L673
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L673
	movzx	eax, BYTE PTR t14_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t14_evt1[rip]
	test	al, al
	jne	.L349
.L673:
	movss	xmm0, DWORD PTR t14_x[rip]
	movss	xmm1, DWORD PTR _x_t14_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L675
	ucomiss	xmm0, xmm1
	jne	.L675
	movzx	eax, BYTE PTR _x_t14_l0[rip]
	test	al, al
	je	.L675
	movzx	eax, BYTE PTR _x_t14_l1[rip]
	test	al, al
	je	.L675
	movzx	eax, BYTE PTR t14_evt0[rip]
	test	al, al
	je	.L675
	movzx	eax, BYTE PTR t14_evt1[rip]
	test	al, al
	jne	.L677
.L675:
	movzx	eax, BYTE PTR t14_l1[rip]
	test	al, al
	je	.L677
	movzx	eax, BYTE PTR t14_l0[rip]
	test	al, al
	jne	.L677
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L677
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L677
	movzx	eax, BYTE PTR t14_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t14_evt1[rip]
	test	al, al
	jne	.L349
.L677:
	movzx	eax, BYTE PTR _x_t14_l0[rip]
	test	al, al
	jne	.L678
	movzx	eax, BYTE PTR _x_t14_l1[rip]
	test	al, al
	jne	.L678
	movss	xmm1, DWORD PTR t14_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L678
	movzx	eax, BYTE PTR t14_evt1[rip]
	test	al, al
	je	.L678
	movzx	eax, BYTE PTR t14_evt0[rip]
	test	al, al
	jne	.L678
	movss	xmm0, DWORD PTR t14_x[rip]
	movss	xmm1, DWORD PTR _x_t14_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L678
	ucomiss	xmm0, xmm1
	je	.L680
.L678:
	movzx	eax, BYTE PTR t14_l0[rip]
	test	al, al
	je	.L680
	movzx	eax, BYTE PTR t14_l1[rip]
	test	al, al
	je	.L680
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L680
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L680
	movzx	eax, BYTE PTR t14_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t14_evt1[rip]
	test	al, al
	jne	.L349
.L680:
	movzx	eax, BYTE PTR _x_t13_l0[rip]
	test	al, al
	jne	.L682
	movzx	eax, BYTE PTR _x_t13_l1[rip]
	test	al, al
	je	.L683
.L682:
	movzx	eax, BYTE PTR _x_t13_l0[rip]
	test	al, al
	je	.L684
	movzx	eax, BYTE PTR _x_t13_l1[rip]
	test	al, al
	je	.L683
.L684:
	movzx	eax, BYTE PTR _x_t13_l1[rip]
	test	al, al
	je	.L685
	movzx	eax, BYTE PTR _x_t13_l0[rip]
	test	al, al
	je	.L683
.L685:
	movzx	eax, BYTE PTR _x_t13_l0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t13_l1[rip]
	test	al, al
	je	.L349
.L683:
	movzx	eax, BYTE PTR _x_t13_evt0[rip]
	test	al, al
	jne	.L686
	movzx	eax, BYTE PTR _x_t13_evt1[rip]
	test	al, al
	je	.L687
.L686:
	movzx	eax, BYTE PTR _x_t13_evt0[rip]
	test	al, al
	je	.L688
	movzx	eax, BYTE PTR _x_t13_evt1[rip]
	test	al, al
	je	.L687
.L688:
	movzx	eax, BYTE PTR _x_t13_evt1[rip]
	test	al, al
	je	.L689
	movzx	eax, BYTE PTR _x_t13_evt0[rip]
	test	al, al
	je	.L687
.L689:
	movzx	eax, BYTE PTR _x_t13_evt0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t13_evt1[rip]
	test	al, al
	je	.L349
.L687:
	movzx	eax, BYTE PTR _x_t13_l0[rip]
	test	al, al
	jne	.L690
	movzx	eax, BYTE PTR _x_t13_l1[rip]
	test	al, al
	je	.L691
.L690:
	movss	xmm1, DWORD PTR _x_t13_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L349
.L691:
	movzx	eax, BYTE PTR t13_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t13_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L693
	movzx	eax, BYTE PTR t13_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t13_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L693
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t13_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t13_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L693
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L694
.L693:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L349
	movzx	eax, BYTE PTR t13_evt0[rip]
	test	al, al
	jne	.L694
	movzx	eax, BYTE PTR t13_evt1[rip]
	test	al, al
	je	.L349
.L694:
	movzx	eax, BYTE PTR _x_t13_l0[rip]
	test	al, al
	je	.L697
	movzx	eax, BYTE PTR _x_t13_l1[rip]
	test	al, al
	jne	.L697
	movzx	eax, BYTE PTR t13_evt0[rip]
	test	al, al
	je	.L697
	movzx	eax, BYTE PTR t13_evt1[rip]
	test	al, al
	jne	.L697
	movss	xmm0, DWORD PTR _x_t13_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L697
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L698
.L697:
	movzx	eax, BYTE PTR t13_l0[rip]
	test	al, al
	jne	.L698
	movzx	eax, BYTE PTR t13_l1[rip]
	test	al, al
	jne	.L698
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L698
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L698
	movzx	eax, BYTE PTR t13_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t13_evt1[rip]
	test	al, al
	jne	.L349
.L698:
	movzx	eax, BYTE PTR _x_t13_l1[rip]
	test	al, al
	je	.L700
	movzx	eax, BYTE PTR _x_t13_l0[rip]
	test	al, al
	jne	.L700
	movss	xmm1, DWORD PTR t13_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L700
	movzx	eax, BYTE PTR t13_evt0[rip]
	test	al, al
	je	.L700
	movzx	eax, BYTE PTR t13_evt1[rip]
	test	al, al
	je	.L700
	movss	xmm0, DWORD PTR t13_x[rip]
	movss	xmm1, DWORD PTR _x_t13_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L700
	ucomiss	xmm0, xmm1
	je	.L701
.L700:
	movzx	eax, BYTE PTR t13_l0[rip]
	test	al, al
	je	.L701
	movzx	eax, BYTE PTR t13_l1[rip]
	test	al, al
	jne	.L701
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L701
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L701
	movzx	eax, BYTE PTR t13_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t13_evt1[rip]
	test	al, al
	jne	.L349
.L701:
	movss	xmm0, DWORD PTR t13_x[rip]
	movss	xmm1, DWORD PTR _x_t13_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L703
	ucomiss	xmm0, xmm1
	jne	.L703
	movzx	eax, BYTE PTR _x_t13_l0[rip]
	test	al, al
	je	.L703
	movzx	eax, BYTE PTR _x_t13_l1[rip]
	test	al, al
	je	.L703
	movzx	eax, BYTE PTR t13_evt0[rip]
	test	al, al
	je	.L703
	movzx	eax, BYTE PTR t13_evt1[rip]
	test	al, al
	jne	.L705
.L703:
	movzx	eax, BYTE PTR t13_l1[rip]
	test	al, al
	je	.L705
	movzx	eax, BYTE PTR t13_l0[rip]
	test	al, al
	jne	.L705
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L705
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L705
	movzx	eax, BYTE PTR t13_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t13_evt1[rip]
	test	al, al
	jne	.L349
.L705:
	movzx	eax, BYTE PTR _x_t13_l0[rip]
	test	al, al
	jne	.L706
	movzx	eax, BYTE PTR _x_t13_l1[rip]
	test	al, al
	jne	.L706
	movss	xmm1, DWORD PTR t13_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L706
	movzx	eax, BYTE PTR t13_evt1[rip]
	test	al, al
	je	.L706
	movzx	eax, BYTE PTR t13_evt0[rip]
	test	al, al
	jne	.L706
	movss	xmm0, DWORD PTR t13_x[rip]
	movss	xmm1, DWORD PTR _x_t13_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L706
	ucomiss	xmm0, xmm1
	je	.L708
.L706:
	movzx	eax, BYTE PTR t13_l0[rip]
	test	al, al
	je	.L708
	movzx	eax, BYTE PTR t13_l1[rip]
	test	al, al
	je	.L708
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L708
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L708
	movzx	eax, BYTE PTR t13_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t13_evt1[rip]
	test	al, al
	jne	.L349
.L708:
	movzx	eax, BYTE PTR _x_t12_l0[rip]
	test	al, al
	jne	.L710
	movzx	eax, BYTE PTR _x_t12_l1[rip]
	test	al, al
	je	.L711
.L710:
	movzx	eax, BYTE PTR _x_t12_l0[rip]
	test	al, al
	je	.L712
	movzx	eax, BYTE PTR _x_t12_l1[rip]
	test	al, al
	je	.L711
.L712:
	movzx	eax, BYTE PTR _x_t12_l1[rip]
	test	al, al
	je	.L713
	movzx	eax, BYTE PTR _x_t12_l0[rip]
	test	al, al
	je	.L711
.L713:
	movzx	eax, BYTE PTR _x_t12_l0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t12_l1[rip]
	test	al, al
	je	.L349
.L711:
	movzx	eax, BYTE PTR _x_t12_evt0[rip]
	test	al, al
	jne	.L714
	movzx	eax, BYTE PTR _x_t12_evt1[rip]
	test	al, al
	je	.L715
.L714:
	movzx	eax, BYTE PTR _x_t12_evt0[rip]
	test	al, al
	je	.L716
	movzx	eax, BYTE PTR _x_t12_evt1[rip]
	test	al, al
	je	.L715
.L716:
	movzx	eax, BYTE PTR _x_t12_evt1[rip]
	test	al, al
	je	.L717
	movzx	eax, BYTE PTR _x_t12_evt0[rip]
	test	al, al
	je	.L715
.L717:
	movzx	eax, BYTE PTR _x_t12_evt0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t12_evt1[rip]
	test	al, al
	je	.L349
.L715:
	movzx	eax, BYTE PTR _x_t12_l0[rip]
	test	al, al
	jne	.L718
	movzx	eax, BYTE PTR _x_t12_l1[rip]
	test	al, al
	je	.L719
.L718:
	movss	xmm1, DWORD PTR _x_t12_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L349
.L719:
	movzx	eax, BYTE PTR t12_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t12_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L721
	movzx	eax, BYTE PTR t12_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t12_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L721
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t12_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t12_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L721
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L722
.L721:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L349
	movzx	eax, BYTE PTR t12_evt0[rip]
	test	al, al
	jne	.L722
	movzx	eax, BYTE PTR t12_evt1[rip]
	test	al, al
	je	.L349
.L722:
	movzx	eax, BYTE PTR _x_t12_l0[rip]
	test	al, al
	je	.L725
	movzx	eax, BYTE PTR _x_t12_l1[rip]
	test	al, al
	jne	.L725
	movzx	eax, BYTE PTR t12_evt0[rip]
	test	al, al
	je	.L725
	movzx	eax, BYTE PTR t12_evt1[rip]
	test	al, al
	jne	.L725
	movss	xmm0, DWORD PTR _x_t12_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L725
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L726
.L725:
	movzx	eax, BYTE PTR t12_l0[rip]
	test	al, al
	jne	.L726
	movzx	eax, BYTE PTR t12_l1[rip]
	test	al, al
	jne	.L726
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L726
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L726
	movzx	eax, BYTE PTR t12_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t12_evt1[rip]
	test	al, al
	jne	.L349
.L726:
	movzx	eax, BYTE PTR _x_t12_l1[rip]
	test	al, al
	je	.L728
	movzx	eax, BYTE PTR _x_t12_l0[rip]
	test	al, al
	jne	.L728
	movss	xmm1, DWORD PTR t12_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L728
	movzx	eax, BYTE PTR t12_evt0[rip]
	test	al, al
	je	.L728
	movzx	eax, BYTE PTR t12_evt1[rip]
	test	al, al
	je	.L728
	movss	xmm0, DWORD PTR t12_x[rip]
	movss	xmm1, DWORD PTR _x_t12_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L728
	ucomiss	xmm0, xmm1
	je	.L729
.L728:
	movzx	eax, BYTE PTR t12_l0[rip]
	test	al, al
	je	.L729
	movzx	eax, BYTE PTR t12_l1[rip]
	test	al, al
	jne	.L729
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L729
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L729
	movzx	eax, BYTE PTR t12_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t12_evt1[rip]
	test	al, al
	jne	.L349
.L729:
	movss	xmm0, DWORD PTR t12_x[rip]
	movss	xmm1, DWORD PTR _x_t12_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L731
	ucomiss	xmm0, xmm1
	jne	.L731
	movzx	eax, BYTE PTR _x_t12_l0[rip]
	test	al, al
	je	.L731
	movzx	eax, BYTE PTR _x_t12_l1[rip]
	test	al, al
	je	.L731
	movzx	eax, BYTE PTR t12_evt0[rip]
	test	al, al
	je	.L731
	movzx	eax, BYTE PTR t12_evt1[rip]
	test	al, al
	jne	.L733
.L731:
	movzx	eax, BYTE PTR t12_l1[rip]
	test	al, al
	je	.L733
	movzx	eax, BYTE PTR t12_l0[rip]
	test	al, al
	jne	.L733
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L733
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L733
	movzx	eax, BYTE PTR t12_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t12_evt1[rip]
	test	al, al
	jne	.L349
.L733:
	movzx	eax, BYTE PTR _x_t12_l0[rip]
	test	al, al
	jne	.L734
	movzx	eax, BYTE PTR _x_t12_l1[rip]
	test	al, al
	jne	.L734
	movss	xmm1, DWORD PTR t12_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L734
	movzx	eax, BYTE PTR t12_evt1[rip]
	test	al, al
	je	.L734
	movzx	eax, BYTE PTR t12_evt0[rip]
	test	al, al
	jne	.L734
	movss	xmm0, DWORD PTR t12_x[rip]
	movss	xmm1, DWORD PTR _x_t12_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L734
	ucomiss	xmm0, xmm1
	je	.L736
.L734:
	movzx	eax, BYTE PTR t12_l0[rip]
	test	al, al
	je	.L736
	movzx	eax, BYTE PTR t12_l1[rip]
	test	al, al
	je	.L736
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L736
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L736
	movzx	eax, BYTE PTR t12_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t12_evt1[rip]
	test	al, al
	jne	.L349
.L736:
	movzx	eax, BYTE PTR _x_t11_l0[rip]
	test	al, al
	jne	.L738
	movzx	eax, BYTE PTR _x_t11_l1[rip]
	test	al, al
	je	.L739
.L738:
	movzx	eax, BYTE PTR _x_t11_l0[rip]
	test	al, al
	je	.L740
	movzx	eax, BYTE PTR _x_t11_l1[rip]
	test	al, al
	je	.L739
.L740:
	movzx	eax, BYTE PTR _x_t11_l1[rip]
	test	al, al
	je	.L741
	movzx	eax, BYTE PTR _x_t11_l0[rip]
	test	al, al
	je	.L739
.L741:
	movzx	eax, BYTE PTR _x_t11_l0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t11_l1[rip]
	test	al, al
	je	.L349
.L739:
	movzx	eax, BYTE PTR _x_t11_evt0[rip]
	test	al, al
	jne	.L742
	movzx	eax, BYTE PTR _x_t11_evt1[rip]
	test	al, al
	je	.L743
.L742:
	movzx	eax, BYTE PTR _x_t11_evt0[rip]
	test	al, al
	je	.L744
	movzx	eax, BYTE PTR _x_t11_evt1[rip]
	test	al, al
	je	.L743
.L744:
	movzx	eax, BYTE PTR _x_t11_evt1[rip]
	test	al, al
	je	.L745
	movzx	eax, BYTE PTR _x_t11_evt0[rip]
	test	al, al
	je	.L743
.L745:
	movzx	eax, BYTE PTR _x_t11_evt0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t11_evt1[rip]
	test	al, al
	je	.L349
.L743:
	movzx	eax, BYTE PTR _x_t11_l0[rip]
	test	al, al
	jne	.L746
	movzx	eax, BYTE PTR _x_t11_l1[rip]
	test	al, al
	je	.L747
.L746:
	movss	xmm1, DWORD PTR _x_t11_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L349
.L747:
	movzx	eax, BYTE PTR t11_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t11_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L749
	movzx	eax, BYTE PTR t11_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t11_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L749
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t11_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t11_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L749
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L750
.L749:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L349
	movzx	eax, BYTE PTR t11_evt0[rip]
	test	al, al
	jne	.L750
	movzx	eax, BYTE PTR t11_evt1[rip]
	test	al, al
	je	.L349
.L750:
	movzx	eax, BYTE PTR _x_t11_l0[rip]
	test	al, al
	je	.L753
	movzx	eax, BYTE PTR _x_t11_l1[rip]
	test	al, al
	jne	.L753
	movzx	eax, BYTE PTR t11_evt0[rip]
	test	al, al
	je	.L753
	movzx	eax, BYTE PTR t11_evt1[rip]
	test	al, al
	jne	.L753
	movss	xmm0, DWORD PTR _x_t11_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L753
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L754
.L753:
	movzx	eax, BYTE PTR t11_l0[rip]
	test	al, al
	jne	.L754
	movzx	eax, BYTE PTR t11_l1[rip]
	test	al, al
	jne	.L754
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L754
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L754
	movzx	eax, BYTE PTR t11_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t11_evt1[rip]
	test	al, al
	jne	.L349
.L754:
	movzx	eax, BYTE PTR _x_t11_l1[rip]
	test	al, al
	je	.L756
	movzx	eax, BYTE PTR _x_t11_l0[rip]
	test	al, al
	jne	.L756
	movss	xmm1, DWORD PTR t11_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L756
	movzx	eax, BYTE PTR t11_evt0[rip]
	test	al, al
	je	.L756
	movzx	eax, BYTE PTR t11_evt1[rip]
	test	al, al
	je	.L756
	movss	xmm0, DWORD PTR t11_x[rip]
	movss	xmm1, DWORD PTR _x_t11_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L756
	ucomiss	xmm0, xmm1
	je	.L757
.L756:
	movzx	eax, BYTE PTR t11_l0[rip]
	test	al, al
	je	.L757
	movzx	eax, BYTE PTR t11_l1[rip]
	test	al, al
	jne	.L757
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L757
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L757
	movzx	eax, BYTE PTR t11_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t11_evt1[rip]
	test	al, al
	jne	.L349
.L757:
	movss	xmm0, DWORD PTR t11_x[rip]
	movss	xmm1, DWORD PTR _x_t11_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L759
	ucomiss	xmm0, xmm1
	jne	.L759
	movzx	eax, BYTE PTR _x_t11_l0[rip]
	test	al, al
	je	.L759
	movzx	eax, BYTE PTR _x_t11_l1[rip]
	test	al, al
	je	.L759
	movzx	eax, BYTE PTR t11_evt0[rip]
	test	al, al
	je	.L759
	movzx	eax, BYTE PTR t11_evt1[rip]
	test	al, al
	jne	.L761
.L759:
	movzx	eax, BYTE PTR t11_l1[rip]
	test	al, al
	je	.L761
	movzx	eax, BYTE PTR t11_l0[rip]
	test	al, al
	jne	.L761
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L761
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L761
	movzx	eax, BYTE PTR t11_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t11_evt1[rip]
	test	al, al
	jne	.L349
.L761:
	movzx	eax, BYTE PTR _x_t11_l0[rip]
	test	al, al
	jne	.L762
	movzx	eax, BYTE PTR _x_t11_l1[rip]
	test	al, al
	jne	.L762
	movss	xmm1, DWORD PTR t11_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L762
	movzx	eax, BYTE PTR t11_evt1[rip]
	test	al, al
	je	.L762
	movzx	eax, BYTE PTR t11_evt0[rip]
	test	al, al
	jne	.L762
	movss	xmm0, DWORD PTR t11_x[rip]
	movss	xmm1, DWORD PTR _x_t11_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L762
	ucomiss	xmm0, xmm1
	je	.L764
.L762:
	movzx	eax, BYTE PTR t11_l0[rip]
	test	al, al
	je	.L764
	movzx	eax, BYTE PTR t11_l1[rip]
	test	al, al
	je	.L764
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L764
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L764
	movzx	eax, BYTE PTR t11_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t11_evt1[rip]
	test	al, al
	jne	.L349
.L764:
	movzx	eax, BYTE PTR _x_t10_l0[rip]
	test	al, al
	jne	.L766
	movzx	eax, BYTE PTR _x_t10_l1[rip]
	test	al, al
	je	.L767
.L766:
	movzx	eax, BYTE PTR _x_t10_l0[rip]
	test	al, al
	je	.L768
	movzx	eax, BYTE PTR _x_t10_l1[rip]
	test	al, al
	je	.L767
.L768:
	movzx	eax, BYTE PTR _x_t10_l1[rip]
	test	al, al
	je	.L769
	movzx	eax, BYTE PTR _x_t10_l0[rip]
	test	al, al
	je	.L767
.L769:
	movzx	eax, BYTE PTR _x_t10_l0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t10_l1[rip]
	test	al, al
	je	.L349
.L767:
	movzx	eax, BYTE PTR _x_t10_evt0[rip]
	test	al, al
	jne	.L770
	movzx	eax, BYTE PTR _x_t10_evt1[rip]
	test	al, al
	je	.L771
.L770:
	movzx	eax, BYTE PTR _x_t10_evt0[rip]
	test	al, al
	je	.L772
	movzx	eax, BYTE PTR _x_t10_evt1[rip]
	test	al, al
	je	.L771
.L772:
	movzx	eax, BYTE PTR _x_t10_evt1[rip]
	test	al, al
	je	.L773
	movzx	eax, BYTE PTR _x_t10_evt0[rip]
	test	al, al
	je	.L771
.L773:
	movzx	eax, BYTE PTR _x_t10_evt0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t10_evt1[rip]
	test	al, al
	je	.L349
.L771:
	movzx	eax, BYTE PTR _x_t10_l0[rip]
	test	al, al
	jne	.L774
	movzx	eax, BYTE PTR _x_t10_l1[rip]
	test	al, al
	je	.L775
.L774:
	movss	xmm1, DWORD PTR _x_t10_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L349
.L775:
	movzx	eax, BYTE PTR t10_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t10_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L777
	movzx	eax, BYTE PTR t10_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t10_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L777
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t10_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t10_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L777
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L778
.L777:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L349
	movzx	eax, BYTE PTR t10_evt0[rip]
	test	al, al
	jne	.L778
	movzx	eax, BYTE PTR t10_evt1[rip]
	test	al, al
	je	.L349
.L778:
	movzx	eax, BYTE PTR _x_t10_l0[rip]
	test	al, al
	je	.L781
	movzx	eax, BYTE PTR _x_t10_l1[rip]
	test	al, al
	jne	.L781
	movzx	eax, BYTE PTR t10_evt0[rip]
	test	al, al
	je	.L781
	movzx	eax, BYTE PTR t10_evt1[rip]
	test	al, al
	jne	.L781
	movss	xmm0, DWORD PTR _x_t10_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L781
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L782
.L781:
	movzx	eax, BYTE PTR t10_l0[rip]
	test	al, al
	jne	.L782
	movzx	eax, BYTE PTR t10_l1[rip]
	test	al, al
	jne	.L782
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L782
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L782
	movzx	eax, BYTE PTR t10_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t10_evt1[rip]
	test	al, al
	jne	.L349
.L782:
	movzx	eax, BYTE PTR _x_t10_l1[rip]
	test	al, al
	je	.L784
	movzx	eax, BYTE PTR _x_t10_l0[rip]
	test	al, al
	jne	.L784
	movss	xmm1, DWORD PTR t10_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L784
	movzx	eax, BYTE PTR t10_evt0[rip]
	test	al, al
	je	.L784
	movzx	eax, BYTE PTR t10_evt1[rip]
	test	al, al
	je	.L784
	movss	xmm0, DWORD PTR t10_x[rip]
	movss	xmm1, DWORD PTR _x_t10_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L784
	ucomiss	xmm0, xmm1
	je	.L785
.L784:
	movzx	eax, BYTE PTR t10_l0[rip]
	test	al, al
	je	.L785
	movzx	eax, BYTE PTR t10_l1[rip]
	test	al, al
	jne	.L785
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L785
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L785
	movzx	eax, BYTE PTR t10_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t10_evt1[rip]
	test	al, al
	jne	.L349
.L785:
	movss	xmm0, DWORD PTR t10_x[rip]
	movss	xmm1, DWORD PTR _x_t10_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L787
	ucomiss	xmm0, xmm1
	jne	.L787
	movzx	eax, BYTE PTR _x_t10_l0[rip]
	test	al, al
	je	.L787
	movzx	eax, BYTE PTR _x_t10_l1[rip]
	test	al, al
	je	.L787
	movzx	eax, BYTE PTR t10_evt0[rip]
	test	al, al
	je	.L787
	movzx	eax, BYTE PTR t10_evt1[rip]
	test	al, al
	jne	.L789
.L787:
	movzx	eax, BYTE PTR t10_l1[rip]
	test	al, al
	je	.L789
	movzx	eax, BYTE PTR t10_l0[rip]
	test	al, al
	jne	.L789
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L789
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L789
	movzx	eax, BYTE PTR t10_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t10_evt1[rip]
	test	al, al
	jne	.L349
.L789:
	movzx	eax, BYTE PTR _x_t10_l0[rip]
	test	al, al
	jne	.L790
	movzx	eax, BYTE PTR _x_t10_l1[rip]
	test	al, al
	jne	.L790
	movss	xmm1, DWORD PTR t10_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L790
	movzx	eax, BYTE PTR t10_evt1[rip]
	test	al, al
	je	.L790
	movzx	eax, BYTE PTR t10_evt0[rip]
	test	al, al
	jne	.L790
	movss	xmm0, DWORD PTR t10_x[rip]
	movss	xmm1, DWORD PTR _x_t10_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L790
	ucomiss	xmm0, xmm1
	je	.L792
.L790:
	movzx	eax, BYTE PTR t10_l0[rip]
	test	al, al
	je	.L792
	movzx	eax, BYTE PTR t10_l1[rip]
	test	al, al
	je	.L792
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L792
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L792
	movzx	eax, BYTE PTR t10_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t10_evt1[rip]
	test	al, al
	jne	.L349
.L792:
	movzx	eax, BYTE PTR _x_t9_l0[rip]
	test	al, al
	jne	.L794
	movzx	eax, BYTE PTR _x_t9_l1[rip]
	test	al, al
	je	.L795
.L794:
	movzx	eax, BYTE PTR _x_t9_l0[rip]
	test	al, al
	je	.L796
	movzx	eax, BYTE PTR _x_t9_l1[rip]
	test	al, al
	je	.L795
.L796:
	movzx	eax, BYTE PTR _x_t9_l1[rip]
	test	al, al
	je	.L797
	movzx	eax, BYTE PTR _x_t9_l0[rip]
	test	al, al
	je	.L795
.L797:
	movzx	eax, BYTE PTR _x_t9_l0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t9_l1[rip]
	test	al, al
	je	.L349
.L795:
	movzx	eax, BYTE PTR _x_t9_evt0[rip]
	test	al, al
	jne	.L798
	movzx	eax, BYTE PTR _x_t9_evt1[rip]
	test	al, al
	je	.L799
.L798:
	movzx	eax, BYTE PTR _x_t9_evt0[rip]
	test	al, al
	je	.L800
	movzx	eax, BYTE PTR _x_t9_evt1[rip]
	test	al, al
	je	.L799
.L800:
	movzx	eax, BYTE PTR _x_t9_evt1[rip]
	test	al, al
	je	.L801
	movzx	eax, BYTE PTR _x_t9_evt0[rip]
	test	al, al
	je	.L799
.L801:
	movzx	eax, BYTE PTR _x_t9_evt0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t9_evt1[rip]
	test	al, al
	je	.L349
.L799:
	movzx	eax, BYTE PTR _x_t9_l0[rip]
	test	al, al
	jne	.L802
	movzx	eax, BYTE PTR _x_t9_l1[rip]
	test	al, al
	je	.L803
.L802:
	movss	xmm1, DWORD PTR _x_t9_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L349
.L803:
	movzx	eax, BYTE PTR t9_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t9_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L805
	movzx	eax, BYTE PTR t9_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t9_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L805
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t9_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t9_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L805
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L806
.L805:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L349
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	jne	.L806
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	je	.L349
.L806:
	movzx	eax, BYTE PTR _x_t9_l0[rip]
	test	al, al
	je	.L809
	movzx	eax, BYTE PTR _x_t9_l1[rip]
	test	al, al
	jne	.L809
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	je	.L809
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	jne	.L809
	movss	xmm0, DWORD PTR _x_t9_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L809
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L810
.L809:
	movzx	eax, BYTE PTR t9_l0[rip]
	test	al, al
	jne	.L810
	movzx	eax, BYTE PTR t9_l1[rip]
	test	al, al
	jne	.L810
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L810
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L810
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	jne	.L349
.L810:
	movzx	eax, BYTE PTR _x_t9_l1[rip]
	test	al, al
	je	.L812
	movzx	eax, BYTE PTR _x_t9_l0[rip]
	test	al, al
	jne	.L812
	movss	xmm1, DWORD PTR t9_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L812
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	je	.L812
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	je	.L812
	movss	xmm0, DWORD PTR t9_x[rip]
	movss	xmm1, DWORD PTR _x_t9_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L812
	ucomiss	xmm0, xmm1
	je	.L813
.L812:
	movzx	eax, BYTE PTR t9_l0[rip]
	test	al, al
	je	.L813
	movzx	eax, BYTE PTR t9_l1[rip]
	test	al, al
	jne	.L813
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L813
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L813
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	jne	.L349
.L813:
	movss	xmm0, DWORD PTR t9_x[rip]
	movss	xmm1, DWORD PTR _x_t9_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L815
	ucomiss	xmm0, xmm1
	jne	.L815
	movzx	eax, BYTE PTR _x_t9_l0[rip]
	test	al, al
	je	.L815
	movzx	eax, BYTE PTR _x_t9_l1[rip]
	test	al, al
	je	.L815
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	je	.L815
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	jne	.L817
.L815:
	movzx	eax, BYTE PTR t9_l1[rip]
	test	al, al
	je	.L817
	movzx	eax, BYTE PTR t9_l0[rip]
	test	al, al
	jne	.L817
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L817
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L817
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	jne	.L349
.L817:
	movzx	eax, BYTE PTR _x_t9_l0[rip]
	test	al, al
	jne	.L818
	movzx	eax, BYTE PTR _x_t9_l1[rip]
	test	al, al
	jne	.L818
	movss	xmm1, DWORD PTR t9_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L818
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	je	.L818
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	jne	.L818
	movss	xmm0, DWORD PTR t9_x[rip]
	movss	xmm1, DWORD PTR _x_t9_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L818
	ucomiss	xmm0, xmm1
	je	.L820
.L818:
	movzx	eax, BYTE PTR t9_l0[rip]
	test	al, al
	je	.L820
	movzx	eax, BYTE PTR t9_l1[rip]
	test	al, al
	je	.L820
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L820
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L820
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	jne	.L349
.L820:
	movzx	eax, BYTE PTR _x_t8_l0[rip]
	test	al, al
	jne	.L822
	movzx	eax, BYTE PTR _x_t8_l1[rip]
	test	al, al
	je	.L823
.L822:
	movzx	eax, BYTE PTR _x_t8_l0[rip]
	test	al, al
	je	.L824
	movzx	eax, BYTE PTR _x_t8_l1[rip]
	test	al, al
	je	.L823
.L824:
	movzx	eax, BYTE PTR _x_t8_l1[rip]
	test	al, al
	je	.L825
	movzx	eax, BYTE PTR _x_t8_l0[rip]
	test	al, al
	je	.L823
.L825:
	movzx	eax, BYTE PTR _x_t8_l0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t8_l1[rip]
	test	al, al
	je	.L349
.L823:
	movzx	eax, BYTE PTR _x_t8_evt0[rip]
	test	al, al
	jne	.L826
	movzx	eax, BYTE PTR _x_t8_evt1[rip]
	test	al, al
	je	.L827
.L826:
	movzx	eax, BYTE PTR _x_t8_evt0[rip]
	test	al, al
	je	.L828
	movzx	eax, BYTE PTR _x_t8_evt1[rip]
	test	al, al
	je	.L827
.L828:
	movzx	eax, BYTE PTR _x_t8_evt1[rip]
	test	al, al
	je	.L829
	movzx	eax, BYTE PTR _x_t8_evt0[rip]
	test	al, al
	je	.L827
.L829:
	movzx	eax, BYTE PTR _x_t8_evt0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t8_evt1[rip]
	test	al, al
	je	.L349
.L827:
	movzx	eax, BYTE PTR _x_t8_l0[rip]
	test	al, al
	jne	.L830
	movzx	eax, BYTE PTR _x_t8_l1[rip]
	test	al, al
	je	.L831
.L830:
	movss	xmm1, DWORD PTR _x_t8_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L349
.L831:
	movzx	eax, BYTE PTR t8_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t8_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L833
	movzx	eax, BYTE PTR t8_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t8_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L833
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t8_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t8_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L833
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L834
.L833:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L349
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	jne	.L834
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	je	.L349
.L834:
	movzx	eax, BYTE PTR _x_t8_l0[rip]
	test	al, al
	je	.L837
	movzx	eax, BYTE PTR _x_t8_l1[rip]
	test	al, al
	jne	.L837
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	je	.L837
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	jne	.L837
	movss	xmm0, DWORD PTR _x_t8_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L837
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L838
.L837:
	movzx	eax, BYTE PTR t8_l0[rip]
	test	al, al
	jne	.L838
	movzx	eax, BYTE PTR t8_l1[rip]
	test	al, al
	jne	.L838
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L838
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L838
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	jne	.L349
.L838:
	movzx	eax, BYTE PTR _x_t8_l1[rip]
	test	al, al
	je	.L840
	movzx	eax, BYTE PTR _x_t8_l0[rip]
	test	al, al
	jne	.L840
	movss	xmm1, DWORD PTR t8_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L840
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	je	.L840
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	je	.L840
	movss	xmm0, DWORD PTR t8_x[rip]
	movss	xmm1, DWORD PTR _x_t8_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L840
	ucomiss	xmm0, xmm1
	je	.L841
.L840:
	movzx	eax, BYTE PTR t8_l0[rip]
	test	al, al
	je	.L841
	movzx	eax, BYTE PTR t8_l1[rip]
	test	al, al
	jne	.L841
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L841
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L841
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	jne	.L349
.L841:
	movss	xmm0, DWORD PTR t8_x[rip]
	movss	xmm1, DWORD PTR _x_t8_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L843
	ucomiss	xmm0, xmm1
	jne	.L843
	movzx	eax, BYTE PTR _x_t8_l0[rip]
	test	al, al
	je	.L843
	movzx	eax, BYTE PTR _x_t8_l1[rip]
	test	al, al
	je	.L843
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	je	.L843
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	jne	.L845
.L843:
	movzx	eax, BYTE PTR t8_l1[rip]
	test	al, al
	je	.L845
	movzx	eax, BYTE PTR t8_l0[rip]
	test	al, al
	jne	.L845
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L845
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L845
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	jne	.L349
.L845:
	movzx	eax, BYTE PTR _x_t8_l0[rip]
	test	al, al
	jne	.L846
	movzx	eax, BYTE PTR _x_t8_l1[rip]
	test	al, al
	jne	.L846
	movss	xmm1, DWORD PTR t8_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L846
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	je	.L846
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	jne	.L846
	movss	xmm0, DWORD PTR t8_x[rip]
	movss	xmm1, DWORD PTR _x_t8_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L846
	ucomiss	xmm0, xmm1
	je	.L848
.L846:
	movzx	eax, BYTE PTR t8_l0[rip]
	test	al, al
	je	.L848
	movzx	eax, BYTE PTR t8_l1[rip]
	test	al, al
	je	.L848
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L848
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L848
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	jne	.L349
.L848:
	movzx	eax, BYTE PTR _x_t7_l0[rip]
	test	al, al
	jne	.L850
	movzx	eax, BYTE PTR _x_t7_l1[rip]
	test	al, al
	je	.L851
.L850:
	movzx	eax, BYTE PTR _x_t7_l0[rip]
	test	al, al
	je	.L852
	movzx	eax, BYTE PTR _x_t7_l1[rip]
	test	al, al
	je	.L851
.L852:
	movzx	eax, BYTE PTR _x_t7_l1[rip]
	test	al, al
	je	.L853
	movzx	eax, BYTE PTR _x_t7_l0[rip]
	test	al, al
	je	.L851
.L853:
	movzx	eax, BYTE PTR _x_t7_l0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t7_l1[rip]
	test	al, al
	je	.L349
.L851:
	movzx	eax, BYTE PTR _x_t7_evt0[rip]
	test	al, al
	jne	.L854
	movzx	eax, BYTE PTR _x_t7_evt1[rip]
	test	al, al
	je	.L855
.L854:
	movzx	eax, BYTE PTR _x_t7_evt0[rip]
	test	al, al
	je	.L856
	movzx	eax, BYTE PTR _x_t7_evt1[rip]
	test	al, al
	je	.L855
.L856:
	movzx	eax, BYTE PTR _x_t7_evt1[rip]
	test	al, al
	je	.L857
	movzx	eax, BYTE PTR _x_t7_evt0[rip]
	test	al, al
	je	.L855
.L857:
	movzx	eax, BYTE PTR _x_t7_evt0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t7_evt1[rip]
	test	al, al
	je	.L349
.L855:
	movzx	eax, BYTE PTR _x_t7_l0[rip]
	test	al, al
	jne	.L858
	movzx	eax, BYTE PTR _x_t7_l1[rip]
	test	al, al
	je	.L859
.L858:
	movss	xmm1, DWORD PTR _x_t7_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L349
.L859:
	movzx	eax, BYTE PTR t7_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t7_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L861
	movzx	eax, BYTE PTR t7_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t7_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L861
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t7_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t7_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L861
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L862
.L861:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L349
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	jne	.L862
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	je	.L349
.L862:
	movzx	eax, BYTE PTR _x_t7_l0[rip]
	test	al, al
	je	.L865
	movzx	eax, BYTE PTR _x_t7_l1[rip]
	test	al, al
	jne	.L865
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	je	.L865
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	jne	.L865
	movss	xmm0, DWORD PTR _x_t7_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L865
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L866
.L865:
	movzx	eax, BYTE PTR t7_l0[rip]
	test	al, al
	jne	.L866
	movzx	eax, BYTE PTR t7_l1[rip]
	test	al, al
	jne	.L866
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L866
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L866
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	jne	.L349
.L866:
	movzx	eax, BYTE PTR _x_t7_l1[rip]
	test	al, al
	je	.L868
	movzx	eax, BYTE PTR _x_t7_l0[rip]
	test	al, al
	jne	.L868
	movss	xmm1, DWORD PTR t7_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L868
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	je	.L868
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	je	.L868
	movss	xmm0, DWORD PTR t7_x[rip]
	movss	xmm1, DWORD PTR _x_t7_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L868
	ucomiss	xmm0, xmm1
	je	.L869
.L868:
	movzx	eax, BYTE PTR t7_l0[rip]
	test	al, al
	je	.L869
	movzx	eax, BYTE PTR t7_l1[rip]
	test	al, al
	jne	.L869
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L869
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L869
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	jne	.L349
.L869:
	movss	xmm0, DWORD PTR t7_x[rip]
	movss	xmm1, DWORD PTR _x_t7_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L871
	ucomiss	xmm0, xmm1
	jne	.L871
	movzx	eax, BYTE PTR _x_t7_l0[rip]
	test	al, al
	je	.L871
	movzx	eax, BYTE PTR _x_t7_l1[rip]
	test	al, al
	je	.L871
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	je	.L871
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	jne	.L873
.L871:
	movzx	eax, BYTE PTR t7_l1[rip]
	test	al, al
	je	.L873
	movzx	eax, BYTE PTR t7_l0[rip]
	test	al, al
	jne	.L873
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L873
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L873
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	jne	.L349
.L873:
	movzx	eax, BYTE PTR _x_t7_l0[rip]
	test	al, al
	jne	.L874
	movzx	eax, BYTE PTR _x_t7_l1[rip]
	test	al, al
	jne	.L874
	movss	xmm1, DWORD PTR t7_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L874
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	je	.L874
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	jne	.L874
	movss	xmm0, DWORD PTR t7_x[rip]
	movss	xmm1, DWORD PTR _x_t7_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L874
	ucomiss	xmm0, xmm1
	je	.L876
.L874:
	movzx	eax, BYTE PTR t7_l0[rip]
	test	al, al
	je	.L876
	movzx	eax, BYTE PTR t7_l1[rip]
	test	al, al
	je	.L876
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L876
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L876
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	jne	.L349
.L876:
	movzx	eax, BYTE PTR _x_t6_l0[rip]
	test	al, al
	jne	.L878
	movzx	eax, BYTE PTR _x_t6_l1[rip]
	test	al, al
	je	.L879
.L878:
	movzx	eax, BYTE PTR _x_t6_l0[rip]
	test	al, al
	je	.L880
	movzx	eax, BYTE PTR _x_t6_l1[rip]
	test	al, al
	je	.L879
.L880:
	movzx	eax, BYTE PTR _x_t6_l1[rip]
	test	al, al
	je	.L881
	movzx	eax, BYTE PTR _x_t6_l0[rip]
	test	al, al
	je	.L879
.L881:
	movzx	eax, BYTE PTR _x_t6_l0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t6_l1[rip]
	test	al, al
	je	.L349
.L879:
	movzx	eax, BYTE PTR _x_t6_evt0[rip]
	test	al, al
	jne	.L882
	movzx	eax, BYTE PTR _x_t6_evt1[rip]
	test	al, al
	je	.L883
.L882:
	movzx	eax, BYTE PTR _x_t6_evt0[rip]
	test	al, al
	je	.L884
	movzx	eax, BYTE PTR _x_t6_evt1[rip]
	test	al, al
	je	.L883
.L884:
	movzx	eax, BYTE PTR _x_t6_evt1[rip]
	test	al, al
	je	.L885
	movzx	eax, BYTE PTR _x_t6_evt0[rip]
	test	al, al
	je	.L883
.L885:
	movzx	eax, BYTE PTR _x_t6_evt0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t6_evt1[rip]
	test	al, al
	je	.L349
.L883:
	movzx	eax, BYTE PTR _x_t6_l0[rip]
	test	al, al
	jne	.L886
	movzx	eax, BYTE PTR _x_t6_l1[rip]
	test	al, al
	je	.L887
.L886:
	movss	xmm1, DWORD PTR _x_t6_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L349
.L887:
	movzx	eax, BYTE PTR t6_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t6_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L889
	movzx	eax, BYTE PTR t6_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t6_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L889
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t6_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t6_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L889
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L890
.L889:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L349
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	jne	.L890
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	je	.L349
.L890:
	movzx	eax, BYTE PTR _x_t6_l0[rip]
	test	al, al
	je	.L893
	movzx	eax, BYTE PTR _x_t6_l1[rip]
	test	al, al
	jne	.L893
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	je	.L893
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	jne	.L893
	movss	xmm0, DWORD PTR _x_t6_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L893
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L894
.L893:
	movzx	eax, BYTE PTR t6_l0[rip]
	test	al, al
	jne	.L894
	movzx	eax, BYTE PTR t6_l1[rip]
	test	al, al
	jne	.L894
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L894
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L894
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	jne	.L349
.L894:
	movzx	eax, BYTE PTR _x_t6_l1[rip]
	test	al, al
	je	.L896
	movzx	eax, BYTE PTR _x_t6_l0[rip]
	test	al, al
	jne	.L896
	movss	xmm1, DWORD PTR t6_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L896
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	je	.L896
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	je	.L896
	movss	xmm0, DWORD PTR t6_x[rip]
	movss	xmm1, DWORD PTR _x_t6_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L896
	ucomiss	xmm0, xmm1
	je	.L897
.L896:
	movzx	eax, BYTE PTR t6_l0[rip]
	test	al, al
	je	.L897
	movzx	eax, BYTE PTR t6_l1[rip]
	test	al, al
	jne	.L897
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L897
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L897
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	jne	.L349
.L897:
	movss	xmm0, DWORD PTR t6_x[rip]
	movss	xmm1, DWORD PTR _x_t6_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L899
	ucomiss	xmm0, xmm1
	jne	.L899
	movzx	eax, BYTE PTR _x_t6_l0[rip]
	test	al, al
	je	.L899
	movzx	eax, BYTE PTR _x_t6_l1[rip]
	test	al, al
	je	.L899
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	je	.L899
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	jne	.L901
.L899:
	movzx	eax, BYTE PTR t6_l1[rip]
	test	al, al
	je	.L901
	movzx	eax, BYTE PTR t6_l0[rip]
	test	al, al
	jne	.L901
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L901
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L901
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	jne	.L349
.L901:
	movzx	eax, BYTE PTR _x_t6_l0[rip]
	test	al, al
	jne	.L902
	movzx	eax, BYTE PTR _x_t6_l1[rip]
	test	al, al
	jne	.L902
	movss	xmm1, DWORD PTR t6_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L902
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	je	.L902
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	jne	.L902
	movss	xmm0, DWORD PTR t6_x[rip]
	movss	xmm1, DWORD PTR _x_t6_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L902
	ucomiss	xmm0, xmm1
	je	.L904
.L902:
	movzx	eax, BYTE PTR t6_l0[rip]
	test	al, al
	je	.L904
	movzx	eax, BYTE PTR t6_l1[rip]
	test	al, al
	je	.L904
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L904
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L904
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	jne	.L349
.L904:
	movzx	eax, BYTE PTR _x_t5_l0[rip]
	test	al, al
	jne	.L906
	movzx	eax, BYTE PTR _x_t5_l1[rip]
	test	al, al
	je	.L907
.L906:
	movzx	eax, BYTE PTR _x_t5_l0[rip]
	test	al, al
	je	.L908
	movzx	eax, BYTE PTR _x_t5_l1[rip]
	test	al, al
	je	.L907
.L908:
	movzx	eax, BYTE PTR _x_t5_l1[rip]
	test	al, al
	je	.L909
	movzx	eax, BYTE PTR _x_t5_l0[rip]
	test	al, al
	je	.L907
.L909:
	movzx	eax, BYTE PTR _x_t5_l0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t5_l1[rip]
	test	al, al
	je	.L349
.L907:
	movzx	eax, BYTE PTR _x_t5_evt0[rip]
	test	al, al
	jne	.L910
	movzx	eax, BYTE PTR _x_t5_evt1[rip]
	test	al, al
	je	.L911
.L910:
	movzx	eax, BYTE PTR _x_t5_evt0[rip]
	test	al, al
	je	.L912
	movzx	eax, BYTE PTR _x_t5_evt1[rip]
	test	al, al
	je	.L911
.L912:
	movzx	eax, BYTE PTR _x_t5_evt1[rip]
	test	al, al
	je	.L913
	movzx	eax, BYTE PTR _x_t5_evt0[rip]
	test	al, al
	je	.L911
.L913:
	movzx	eax, BYTE PTR _x_t5_evt0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t5_evt1[rip]
	test	al, al
	je	.L349
.L911:
	movzx	eax, BYTE PTR _x_t5_l0[rip]
	test	al, al
	jne	.L914
	movzx	eax, BYTE PTR _x_t5_l1[rip]
	test	al, al
	je	.L915
.L914:
	movss	xmm1, DWORD PTR _x_t5_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L349
.L915:
	movzx	eax, BYTE PTR t5_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t5_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L917
	movzx	eax, BYTE PTR t5_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t5_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L917
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t5_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t5_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L917
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L918
.L917:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L349
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	jne	.L918
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	je	.L349
.L918:
	movzx	eax, BYTE PTR _x_t5_l0[rip]
	test	al, al
	je	.L921
	movzx	eax, BYTE PTR _x_t5_l1[rip]
	test	al, al
	jne	.L921
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	je	.L921
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	jne	.L921
	movss	xmm0, DWORD PTR _x_t5_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L921
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L922
.L921:
	movzx	eax, BYTE PTR t5_l0[rip]
	test	al, al
	jne	.L922
	movzx	eax, BYTE PTR t5_l1[rip]
	test	al, al
	jne	.L922
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L922
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L922
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	jne	.L349
.L922:
	movzx	eax, BYTE PTR _x_t5_l1[rip]
	test	al, al
	je	.L924
	movzx	eax, BYTE PTR _x_t5_l0[rip]
	test	al, al
	jne	.L924
	movss	xmm1, DWORD PTR t5_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L924
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	je	.L924
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	je	.L924
	movss	xmm0, DWORD PTR t5_x[rip]
	movss	xmm1, DWORD PTR _x_t5_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L924
	ucomiss	xmm0, xmm1
	je	.L925
.L924:
	movzx	eax, BYTE PTR t5_l0[rip]
	test	al, al
	je	.L925
	movzx	eax, BYTE PTR t5_l1[rip]
	test	al, al
	jne	.L925
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L925
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L925
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	jne	.L349
.L925:
	movss	xmm0, DWORD PTR t5_x[rip]
	movss	xmm1, DWORD PTR _x_t5_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L927
	ucomiss	xmm0, xmm1
	jne	.L927
	movzx	eax, BYTE PTR _x_t5_l0[rip]
	test	al, al
	je	.L927
	movzx	eax, BYTE PTR _x_t5_l1[rip]
	test	al, al
	je	.L927
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	je	.L927
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	jne	.L929
.L927:
	movzx	eax, BYTE PTR t5_l1[rip]
	test	al, al
	je	.L929
	movzx	eax, BYTE PTR t5_l0[rip]
	test	al, al
	jne	.L929
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L929
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L929
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	jne	.L349
.L929:
	movzx	eax, BYTE PTR _x_t5_l0[rip]
	test	al, al
	jne	.L930
	movzx	eax, BYTE PTR _x_t5_l1[rip]
	test	al, al
	jne	.L930
	movss	xmm1, DWORD PTR t5_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L930
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	je	.L930
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	jne	.L930
	movss	xmm0, DWORD PTR t5_x[rip]
	movss	xmm1, DWORD PTR _x_t5_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L930
	ucomiss	xmm0, xmm1
	je	.L932
.L930:
	movzx	eax, BYTE PTR t5_l0[rip]
	test	al, al
	je	.L932
	movzx	eax, BYTE PTR t5_l1[rip]
	test	al, al
	je	.L932
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L932
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L932
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	jne	.L349
.L932:
	movzx	eax, BYTE PTR _x_t4_l0[rip]
	test	al, al
	jne	.L934
	movzx	eax, BYTE PTR _x_t4_l1[rip]
	test	al, al
	je	.L935
.L934:
	movzx	eax, BYTE PTR _x_t4_l0[rip]
	test	al, al
	je	.L936
	movzx	eax, BYTE PTR _x_t4_l1[rip]
	test	al, al
	je	.L935
.L936:
	movzx	eax, BYTE PTR _x_t4_l1[rip]
	test	al, al
	je	.L937
	movzx	eax, BYTE PTR _x_t4_l0[rip]
	test	al, al
	je	.L935
.L937:
	movzx	eax, BYTE PTR _x_t4_l0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t4_l1[rip]
	test	al, al
	je	.L349
.L935:
	movzx	eax, BYTE PTR _x_t4_evt0[rip]
	test	al, al
	jne	.L938
	movzx	eax, BYTE PTR _x_t4_evt1[rip]
	test	al, al
	je	.L939
.L938:
	movzx	eax, BYTE PTR _x_t4_evt0[rip]
	test	al, al
	je	.L940
	movzx	eax, BYTE PTR _x_t4_evt1[rip]
	test	al, al
	je	.L939
.L940:
	movzx	eax, BYTE PTR _x_t4_evt1[rip]
	test	al, al
	je	.L941
	movzx	eax, BYTE PTR _x_t4_evt0[rip]
	test	al, al
	je	.L939
.L941:
	movzx	eax, BYTE PTR _x_t4_evt0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t4_evt1[rip]
	test	al, al
	je	.L349
.L939:
	movzx	eax, BYTE PTR _x_t4_l0[rip]
	test	al, al
	jne	.L942
	movzx	eax, BYTE PTR _x_t4_l1[rip]
	test	al, al
	je	.L943
.L942:
	movss	xmm1, DWORD PTR _x_t4_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L349
.L943:
	movzx	eax, BYTE PTR t4_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t4_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L945
	movzx	eax, BYTE PTR t4_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t4_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L945
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t4_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t4_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L945
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L946
.L945:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L349
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	jne	.L946
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	je	.L349
.L946:
	movzx	eax, BYTE PTR _x_t4_l0[rip]
	test	al, al
	je	.L949
	movzx	eax, BYTE PTR _x_t4_l1[rip]
	test	al, al
	jne	.L949
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	je	.L949
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	jne	.L949
	movss	xmm0, DWORD PTR _x_t4_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L949
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L950
.L949:
	movzx	eax, BYTE PTR t4_l0[rip]
	test	al, al
	jne	.L950
	movzx	eax, BYTE PTR t4_l1[rip]
	test	al, al
	jne	.L950
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L950
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L950
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	jne	.L349
.L950:
	movzx	eax, BYTE PTR _x_t4_l1[rip]
	test	al, al
	je	.L952
	movzx	eax, BYTE PTR _x_t4_l0[rip]
	test	al, al
	jne	.L952
	movss	xmm1, DWORD PTR t4_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L952
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	je	.L952
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	je	.L952
	movss	xmm0, DWORD PTR t4_x[rip]
	movss	xmm1, DWORD PTR _x_t4_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L952
	ucomiss	xmm0, xmm1
	je	.L953
.L952:
	movzx	eax, BYTE PTR t4_l0[rip]
	test	al, al
	je	.L953
	movzx	eax, BYTE PTR t4_l1[rip]
	test	al, al
	jne	.L953
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L953
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L953
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	jne	.L349
.L953:
	movss	xmm0, DWORD PTR t4_x[rip]
	movss	xmm1, DWORD PTR _x_t4_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L955
	ucomiss	xmm0, xmm1
	jne	.L955
	movzx	eax, BYTE PTR _x_t4_l0[rip]
	test	al, al
	je	.L955
	movzx	eax, BYTE PTR _x_t4_l1[rip]
	test	al, al
	je	.L955
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	je	.L955
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	jne	.L957
.L955:
	movzx	eax, BYTE PTR t4_l1[rip]
	test	al, al
	je	.L957
	movzx	eax, BYTE PTR t4_l0[rip]
	test	al, al
	jne	.L957
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L957
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L957
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	jne	.L349
.L957:
	movzx	eax, BYTE PTR _x_t4_l0[rip]
	test	al, al
	jne	.L958
	movzx	eax, BYTE PTR _x_t4_l1[rip]
	test	al, al
	jne	.L958
	movss	xmm1, DWORD PTR t4_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L958
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	je	.L958
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	jne	.L958
	movss	xmm0, DWORD PTR t4_x[rip]
	movss	xmm1, DWORD PTR _x_t4_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L958
	ucomiss	xmm0, xmm1
	je	.L960
.L958:
	movzx	eax, BYTE PTR t4_l0[rip]
	test	al, al
	je	.L960
	movzx	eax, BYTE PTR t4_l1[rip]
	test	al, al
	je	.L960
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L960
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L960
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	jne	.L349
.L960:
	movzx	eax, BYTE PTR _x_t3_l0[rip]
	test	al, al
	jne	.L962
	movzx	eax, BYTE PTR _x_t3_l1[rip]
	test	al, al
	je	.L963
.L962:
	movzx	eax, BYTE PTR _x_t3_l0[rip]
	test	al, al
	je	.L964
	movzx	eax, BYTE PTR _x_t3_l1[rip]
	test	al, al
	je	.L963
.L964:
	movzx	eax, BYTE PTR _x_t3_l1[rip]
	test	al, al
	je	.L965
	movzx	eax, BYTE PTR _x_t3_l0[rip]
	test	al, al
	je	.L963
.L965:
	movzx	eax, BYTE PTR _x_t3_l0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t3_l1[rip]
	test	al, al
	je	.L349
.L963:
	movzx	eax, BYTE PTR _x_t3_evt0[rip]
	test	al, al
	jne	.L966
	movzx	eax, BYTE PTR _x_t3_evt1[rip]
	test	al, al
	je	.L967
.L966:
	movzx	eax, BYTE PTR _x_t3_evt0[rip]
	test	al, al
	je	.L968
	movzx	eax, BYTE PTR _x_t3_evt1[rip]
	test	al, al
	je	.L967
.L968:
	movzx	eax, BYTE PTR _x_t3_evt1[rip]
	test	al, al
	je	.L969
	movzx	eax, BYTE PTR _x_t3_evt0[rip]
	test	al, al
	je	.L967
.L969:
	movzx	eax, BYTE PTR _x_t3_evt0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t3_evt1[rip]
	test	al, al
	je	.L349
.L967:
	movzx	eax, BYTE PTR _x_t3_l0[rip]
	test	al, al
	jne	.L970
	movzx	eax, BYTE PTR _x_t3_l1[rip]
	test	al, al
	je	.L971
.L970:
	movss	xmm1, DWORD PTR _x_t3_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L349
.L971:
	movzx	eax, BYTE PTR t3_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t3_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L973
	movzx	eax, BYTE PTR t3_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t3_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L973
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t3_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t3_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L973
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L974
.L973:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L349
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	jne	.L974
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	je	.L349
.L974:
	movzx	eax, BYTE PTR _x_t3_l0[rip]
	test	al, al
	je	.L977
	movzx	eax, BYTE PTR _x_t3_l1[rip]
	test	al, al
	jne	.L977
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	je	.L977
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	jne	.L977
	movss	xmm0, DWORD PTR _x_t3_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L977
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L978
.L977:
	movzx	eax, BYTE PTR t3_l0[rip]
	test	al, al
	jne	.L978
	movzx	eax, BYTE PTR t3_l1[rip]
	test	al, al
	jne	.L978
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L978
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L978
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	jne	.L349
.L978:
	movzx	eax, BYTE PTR _x_t3_l1[rip]
	test	al, al
	je	.L980
	movzx	eax, BYTE PTR _x_t3_l0[rip]
	test	al, al
	jne	.L980
	movss	xmm1, DWORD PTR t3_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L980
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	je	.L980
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	je	.L980
	movss	xmm0, DWORD PTR t3_x[rip]
	movss	xmm1, DWORD PTR _x_t3_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L980
	ucomiss	xmm0, xmm1
	je	.L981
.L980:
	movzx	eax, BYTE PTR t3_l0[rip]
	test	al, al
	je	.L981
	movzx	eax, BYTE PTR t3_l1[rip]
	test	al, al
	jne	.L981
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L981
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L981
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	jne	.L349
.L981:
	movss	xmm0, DWORD PTR t3_x[rip]
	movss	xmm1, DWORD PTR _x_t3_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L983
	ucomiss	xmm0, xmm1
	jne	.L983
	movzx	eax, BYTE PTR _x_t3_l0[rip]
	test	al, al
	je	.L983
	movzx	eax, BYTE PTR _x_t3_l1[rip]
	test	al, al
	je	.L983
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	je	.L983
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	jne	.L985
.L983:
	movzx	eax, BYTE PTR t3_l1[rip]
	test	al, al
	je	.L985
	movzx	eax, BYTE PTR t3_l0[rip]
	test	al, al
	jne	.L985
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L985
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L985
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	jne	.L349
.L985:
	movzx	eax, BYTE PTR _x_t3_l0[rip]
	test	al, al
	jne	.L986
	movzx	eax, BYTE PTR _x_t3_l1[rip]
	test	al, al
	jne	.L986
	movss	xmm1, DWORD PTR t3_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L986
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	je	.L986
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	jne	.L986
	movss	xmm0, DWORD PTR t3_x[rip]
	movss	xmm1, DWORD PTR _x_t3_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L986
	ucomiss	xmm0, xmm1
	je	.L988
.L986:
	movzx	eax, BYTE PTR t3_l0[rip]
	test	al, al
	je	.L988
	movzx	eax, BYTE PTR t3_l1[rip]
	test	al, al
	je	.L988
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L988
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L988
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	jne	.L349
.L988:
	movzx	eax, BYTE PTR _x_t2_l0[rip]
	test	al, al
	jne	.L990
	movzx	eax, BYTE PTR _x_t2_l1[rip]
	test	al, al
	je	.L991
.L990:
	movzx	eax, BYTE PTR _x_t2_l0[rip]
	test	al, al
	je	.L992
	movzx	eax, BYTE PTR _x_t2_l1[rip]
	test	al, al
	je	.L991
.L992:
	movzx	eax, BYTE PTR _x_t2_l1[rip]
	test	al, al
	je	.L993
	movzx	eax, BYTE PTR _x_t2_l0[rip]
	test	al, al
	je	.L991
.L993:
	movzx	eax, BYTE PTR _x_t2_l0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t2_l1[rip]
	test	al, al
	je	.L349
.L991:
	movzx	eax, BYTE PTR _x_t2_evt0[rip]
	test	al, al
	jne	.L994
	movzx	eax, BYTE PTR _x_t2_evt1[rip]
	test	al, al
	je	.L995
.L994:
	movzx	eax, BYTE PTR _x_t2_evt0[rip]
	test	al, al
	je	.L996
	movzx	eax, BYTE PTR _x_t2_evt1[rip]
	test	al, al
	je	.L995
.L996:
	movzx	eax, BYTE PTR _x_t2_evt1[rip]
	test	al, al
	je	.L997
	movzx	eax, BYTE PTR _x_t2_evt0[rip]
	test	al, al
	je	.L995
.L997:
	movzx	eax, BYTE PTR _x_t2_evt0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t2_evt1[rip]
	test	al, al
	je	.L349
.L995:
	movzx	eax, BYTE PTR _x_t2_l0[rip]
	test	al, al
	jne	.L998
	movzx	eax, BYTE PTR _x_t2_l1[rip]
	test	al, al
	je	.L999
.L998:
	movss	xmm1, DWORD PTR _x_t2_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L349
.L999:
	movzx	eax, BYTE PTR t2_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t2_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1001
	movzx	eax, BYTE PTR t2_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t2_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1001
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t2_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t2_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L1001
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L1002
.L1001:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L349
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	jne	.L1002
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	je	.L349
.L1002:
	movzx	eax, BYTE PTR _x_t2_l0[rip]
	test	al, al
	je	.L1005
	movzx	eax, BYTE PTR _x_t2_l1[rip]
	test	al, al
	jne	.L1005
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	je	.L1005
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	jne	.L1005
	movss	xmm0, DWORD PTR _x_t2_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1005
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1006
.L1005:
	movzx	eax, BYTE PTR t2_l0[rip]
	test	al, al
	jne	.L1006
	movzx	eax, BYTE PTR t2_l1[rip]
	test	al, al
	jne	.L1006
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1006
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1006
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	jne	.L349
.L1006:
	movzx	eax, BYTE PTR _x_t2_l1[rip]
	test	al, al
	je	.L1008
	movzx	eax, BYTE PTR _x_t2_l0[rip]
	test	al, al
	jne	.L1008
	movss	xmm1, DWORD PTR t2_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L1008
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	je	.L1008
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	je	.L1008
	movss	xmm0, DWORD PTR t2_x[rip]
	movss	xmm1, DWORD PTR _x_t2_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L1008
	ucomiss	xmm0, xmm1
	je	.L1009
.L1008:
	movzx	eax, BYTE PTR t2_l0[rip]
	test	al, al
	je	.L1009
	movzx	eax, BYTE PTR t2_l1[rip]
	test	al, al
	jne	.L1009
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1009
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1009
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	jne	.L349
.L1009:
	movss	xmm0, DWORD PTR t2_x[rip]
	movss	xmm1, DWORD PTR _x_t2_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L1011
	ucomiss	xmm0, xmm1
	jne	.L1011
	movzx	eax, BYTE PTR _x_t2_l0[rip]
	test	al, al
	je	.L1011
	movzx	eax, BYTE PTR _x_t2_l1[rip]
	test	al, al
	je	.L1011
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	je	.L1011
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	jne	.L1013
.L1011:
	movzx	eax, BYTE PTR t2_l1[rip]
	test	al, al
	je	.L1013
	movzx	eax, BYTE PTR t2_l0[rip]
	test	al, al
	jne	.L1013
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1013
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1013
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	jne	.L349
.L1013:
	movzx	eax, BYTE PTR _x_t2_l0[rip]
	test	al, al
	jne	.L1014
	movzx	eax, BYTE PTR _x_t2_l1[rip]
	test	al, al
	jne	.L1014
	movss	xmm1, DWORD PTR t2_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L1014
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	je	.L1014
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	jne	.L1014
	movss	xmm0, DWORD PTR t2_x[rip]
	movss	xmm1, DWORD PTR _x_t2_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L1014
	ucomiss	xmm0, xmm1
	je	.L1016
.L1014:
	movzx	eax, BYTE PTR t2_l0[rip]
	test	al, al
	je	.L1016
	movzx	eax, BYTE PTR t2_l1[rip]
	test	al, al
	je	.L1016
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1016
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1016
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	jne	.L349
.L1016:
	movzx	eax, BYTE PTR _x_t1_l0[rip]
	test	al, al
	jne	.L1018
	movzx	eax, BYTE PTR _x_t1_l1[rip]
	test	al, al
	je	.L1019
.L1018:
	movzx	eax, BYTE PTR _x_t1_l0[rip]
	test	al, al
	je	.L1020
	movzx	eax, BYTE PTR _x_t1_l1[rip]
	test	al, al
	je	.L1019
.L1020:
	movzx	eax, BYTE PTR _x_t1_l1[rip]
	test	al, al
	je	.L1021
	movzx	eax, BYTE PTR _x_t1_l0[rip]
	test	al, al
	je	.L1019
.L1021:
	movzx	eax, BYTE PTR _x_t1_l0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t1_l1[rip]
	test	al, al
	je	.L349
.L1019:
	movzx	eax, BYTE PTR _x_t1_evt0[rip]
	test	al, al
	jne	.L1022
	movzx	eax, BYTE PTR _x_t1_evt1[rip]
	test	al, al
	je	.L1023
.L1022:
	movzx	eax, BYTE PTR _x_t1_evt0[rip]
	test	al, al
	je	.L1024
	movzx	eax, BYTE PTR _x_t1_evt1[rip]
	test	al, al
	je	.L1023
.L1024:
	movzx	eax, BYTE PTR _x_t1_evt1[rip]
	test	al, al
	je	.L1025
	movzx	eax, BYTE PTR _x_t1_evt0[rip]
	test	al, al
	je	.L1023
.L1025:
	movzx	eax, BYTE PTR _x_t1_evt0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t1_evt1[rip]
	test	al, al
	je	.L349
.L1023:
	movzx	eax, BYTE PTR _x_t1_l0[rip]
	test	al, al
	jne	.L1026
	movzx	eax, BYTE PTR _x_t1_l1[rip]
	test	al, al
	je	.L1027
.L1026:
	movss	xmm1, DWORD PTR _x_t1_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L349
.L1027:
	movzx	eax, BYTE PTR t1_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t1_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1029
	movzx	eax, BYTE PTR t1_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t1_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1029
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t1_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t1_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L1029
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L1030
.L1029:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L349
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	jne	.L1030
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	je	.L349
.L1030:
	movzx	eax, BYTE PTR _x_t1_l0[rip]
	test	al, al
	je	.L1033
	movzx	eax, BYTE PTR _x_t1_l1[rip]
	test	al, al
	jne	.L1033
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	je	.L1033
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	jne	.L1033
	movss	xmm0, DWORD PTR _x_t1_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1033
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1034
.L1033:
	movzx	eax, BYTE PTR t1_l0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR t1_l1[rip]
	test	al, al
	jne	.L1034
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1034
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1034
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	jne	.L349
.L1034:
	movzx	eax, BYTE PTR _x_t1_l1[rip]
	test	al, al
	je	.L1036
	movzx	eax, BYTE PTR _x_t1_l0[rip]
	test	al, al
	jne	.L1036
	movss	xmm1, DWORD PTR t1_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L1036
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	je	.L1036
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	je	.L1036
	movss	xmm0, DWORD PTR t1_x[rip]
	movss	xmm1, DWORD PTR _x_t1_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L1036
	ucomiss	xmm0, xmm1
	je	.L1037
.L1036:
	movzx	eax, BYTE PTR t1_l0[rip]
	test	al, al
	je	.L1037
	movzx	eax, BYTE PTR t1_l1[rip]
	test	al, al
	jne	.L1037
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1037
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1037
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	jne	.L349
.L1037:
	movss	xmm0, DWORD PTR t1_x[rip]
	movss	xmm1, DWORD PTR _x_t1_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L1039
	ucomiss	xmm0, xmm1
	jne	.L1039
	movzx	eax, BYTE PTR _x_t1_l0[rip]
	test	al, al
	je	.L1039
	movzx	eax, BYTE PTR _x_t1_l1[rip]
	test	al, al
	je	.L1039
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	je	.L1039
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	jne	.L1041
.L1039:
	movzx	eax, BYTE PTR t1_l1[rip]
	test	al, al
	je	.L1041
	movzx	eax, BYTE PTR t1_l0[rip]
	test	al, al
	jne	.L1041
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1041
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1041
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	jne	.L349
.L1041:
	movzx	eax, BYTE PTR _x_t1_l0[rip]
	test	al, al
	jne	.L1042
	movzx	eax, BYTE PTR _x_t1_l1[rip]
	test	al, al
	jne	.L1042
	movss	xmm1, DWORD PTR t1_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L1042
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	je	.L1042
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	jne	.L1042
	movss	xmm0, DWORD PTR t1_x[rip]
	movss	xmm1, DWORD PTR _x_t1_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L1042
	ucomiss	xmm0, xmm1
	je	.L1044
.L1042:
	movzx	eax, BYTE PTR t1_l0[rip]
	test	al, al
	je	.L1044
	movzx	eax, BYTE PTR t1_l1[rip]
	test	al, al
	je	.L1044
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1044
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1044
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	jne	.L349
.L1044:
	movzx	eax, BYTE PTR _x_t0_l0[rip]
	test	al, al
	jne	.L1046
	movzx	eax, BYTE PTR _x_t0_l1[rip]
	test	al, al
	je	.L1047
.L1046:
	movzx	eax, BYTE PTR _x_t0_l0[rip]
	test	al, al
	je	.L1048
	movzx	eax, BYTE PTR _x_t0_l1[rip]
	test	al, al
	je	.L1047
.L1048:
	movzx	eax, BYTE PTR _x_t0_l1[rip]
	test	al, al
	je	.L1049
	movzx	eax, BYTE PTR _x_t0_l0[rip]
	test	al, al
	je	.L1047
.L1049:
	movzx	eax, BYTE PTR _x_t0_l0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t0_l1[rip]
	test	al, al
	je	.L349
.L1047:
	movzx	eax, BYTE PTR _x_t0_evt0[rip]
	test	al, al
	jne	.L1050
	movzx	eax, BYTE PTR _x_t0_evt1[rip]
	test	al, al
	je	.L1051
.L1050:
	movzx	eax, BYTE PTR _x_t0_evt0[rip]
	test	al, al
	je	.L1052
	movzx	eax, BYTE PTR _x_t0_evt1[rip]
	test	al, al
	je	.L1051
.L1052:
	movzx	eax, BYTE PTR _x_t0_evt1[rip]
	test	al, al
	je	.L1053
	movzx	eax, BYTE PTR _x_t0_evt0[rip]
	test	al, al
	je	.L1051
.L1053:
	movzx	eax, BYTE PTR _x_t0_evt0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_t0_evt1[rip]
	test	al, al
	je	.L349
.L1051:
	movzx	eax, BYTE PTR _x_t0_l0[rip]
	test	al, al
	jne	.L1054
	movzx	eax, BYTE PTR _x_t0_l1[rip]
	test	al, al
	je	.L1055
.L1054:
	movss	xmm1, DWORD PTR _x_t0_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L349
.L1055:
	movzx	eax, BYTE PTR t0_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t0_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1057
	movzx	eax, BYTE PTR t0_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t0_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1057
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t0_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t0_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L1057
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L1058
.L1057:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L349
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	jne	.L1058
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	je	.L349
.L1058:
	movzx	eax, BYTE PTR _x_t0_l0[rip]
	test	al, al
	je	.L1061
	movzx	eax, BYTE PTR _x_t0_l1[rip]
	test	al, al
	jne	.L1061
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	je	.L1061
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	jne	.L1061
	movss	xmm0, DWORD PTR _x_t0_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1061
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1062
.L1061:
	movzx	eax, BYTE PTR t0_l0[rip]
	test	al, al
	jne	.L1062
	movzx	eax, BYTE PTR t0_l1[rip]
	test	al, al
	jne	.L1062
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1062
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1062
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	jne	.L349
.L1062:
	movzx	eax, BYTE PTR _x_t0_l1[rip]
	test	al, al
	je	.L1064
	movzx	eax, BYTE PTR _x_t0_l0[rip]
	test	al, al
	jne	.L1064
	movss	xmm1, DWORD PTR t0_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L1064
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	je	.L1064
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	je	.L1064
	movss	xmm0, DWORD PTR t0_x[rip]
	movss	xmm1, DWORD PTR _x_t0_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L1064
	ucomiss	xmm0, xmm1
	je	.L1065
.L1064:
	movzx	eax, BYTE PTR t0_l0[rip]
	test	al, al
	je	.L1065
	movzx	eax, BYTE PTR t0_l1[rip]
	test	al, al
	jne	.L1065
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1065
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1065
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	jne	.L349
.L1065:
	movss	xmm0, DWORD PTR t0_x[rip]
	movss	xmm1, DWORD PTR _x_t0_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L1067
	ucomiss	xmm0, xmm1
	jne	.L1067
	movzx	eax, BYTE PTR _x_t0_l0[rip]
	test	al, al
	je	.L1067
	movzx	eax, BYTE PTR _x_t0_l1[rip]
	test	al, al
	je	.L1067
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	je	.L1067
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	jne	.L1069
.L1067:
	movzx	eax, BYTE PTR t0_l1[rip]
	test	al, al
	je	.L1069
	movzx	eax, BYTE PTR t0_l0[rip]
	test	al, al
	jne	.L1069
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1069
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1069
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	jne	.L349
.L1069:
	movzx	eax, BYTE PTR _x_t0_l0[rip]
	test	al, al
	jne	.L1070
	movzx	eax, BYTE PTR _x_t0_l1[rip]
	test	al, al
	jne	.L1070
	movss	xmm1, DWORD PTR t0_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L1070
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	je	.L1070
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	jne	.L1070
	movss	xmm0, DWORD PTR t0_x[rip]
	movss	xmm1, DWORD PTR _x_t0_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L1070
	ucomiss	xmm0, xmm1
	je	.L1072
.L1070:
	movzx	eax, BYTE PTR t0_l0[rip]
	test	al, al
	je	.L1072
	movzx	eax, BYTE PTR t0_l1[rip]
	test	al, al
	je	.L1072
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1072
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1072
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	jne	.L349
.L1072:
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	jne	.L1074
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	je	.L1075
.L1074:
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	je	.L1076
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	je	.L1075
.L1076:
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	je	.L1077
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	je	.L1075
.L1077:
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	je	.L349
.L1075:
	movzx	eax, BYTE PTR _x_controller_evt2[rip]
	test	al, al
	jne	.L1078
	movzx	eax, BYTE PTR _x_controller_evt0[rip]
	test	al, al
	jne	.L1078
	movzx	eax, BYTE PTR _x_controller_evt1[rip]
	test	al, al
	je	.L1079
.L1078:
	movzx	eax, BYTE PTR _x_controller_evt2[rip]
	test	al, al
	jne	.L1080
	movzx	eax, BYTE PTR _x_controller_evt0[rip]
	test	al, al
	je	.L1080
	movzx	eax, BYTE PTR _x_controller_evt1[rip]
	test	al, al
	je	.L1079
.L1080:
	movzx	eax, BYTE PTR _x_controller_evt2[rip]
	test	al, al
	jne	.L1081
	movzx	eax, BYTE PTR _x_controller_evt1[rip]
	test	al, al
	je	.L1081
	movzx	eax, BYTE PTR _x_controller_evt0[rip]
	test	al, al
	je	.L1079
.L1081:
	movzx	eax, BYTE PTR _x_controller_evt2[rip]
	test	al, al
	jne	.L1082
	movzx	eax, BYTE PTR _x_controller_evt0[rip]
	test	al, al
	je	.L1082
	movzx	eax, BYTE PTR _x_controller_evt1[rip]
	test	al, al
	jne	.L1079
.L1082:
	movzx	eax, BYTE PTR _x_controller_evt2[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_controller_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR _x_controller_evt1[rip]
	test	al, al
	jne	.L349
.L1079:
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	test	eax, eax
	je	.L1083
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 1
	je	.L1083
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 2
	je	.L1083
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 3
	je	.L1083
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 4
	je	.L1083
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 5
	je	.L1083
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 6
	je	.L1083
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 7
	je	.L1083
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 8
	je	.L1083
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 9
	je	.L1083
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 10
	je	.L1083
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 11
	je	.L1083
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 12
	je	.L1083
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 13
	je	.L1083
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 14
	je	.L1083
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 15
	je	.L1083
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 16
	je	.L1083
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 17
	je	.L1083
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 18
	je	.L1083
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 19
	je	.L1083
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 20
	je	.L1083
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 21
	je	.L1083
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 22
	je	.L1083
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 23
	je	.L1083
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 24
	je	.L1083
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 25
	je	.L1083
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 26
	je	.L1083
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 27
	jne	.L349
.L1083:
	movss	xmm1, DWORD PTR _x_controller_z[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L1084
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	je	.L1085
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	je	.L349
.L1085:
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	je	.L1084
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	jne	.L349
.L1084:
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1086
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1086
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR controller_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_controller_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L1086
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L1086
	mov	edx, DWORD PTR controller_cnt[rip]
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	edx, eax
	je	.L1088
.L1086:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L349
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L1088
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L1088
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	je	.L349
.L1088:
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	je	.L1090
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	jne	.L1090
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L1090
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	je	.L1090
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	jne	.L1090
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 1
	jne	.L1090
	movss	xmm0, DWORD PTR _x_controller_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1090
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1091
.L1090:
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	jne	.L1091
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	jne	.L1091
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1091
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1091
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	jne	.L349
.L1091:
	movss	xmm0, DWORD PTR controller_z[rip]
	movss	xmm1, DWORD PTR _x_controller_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L1093
	ucomiss	xmm0, xmm1
	jne	.L1093
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	je	.L1095
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	je	.L1096
.L1095:
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	je	.L1093
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	je	.L1096
.L1093:
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	je	.L1096
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	jne	.L1096
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1096
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1096
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	jne	.L349
.L1096:
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L1097
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	je	.L1097
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	jne	.L1097
	mov	eax, DWORD PTR controller_cnt[rip]
	mov	edx, DWORD PTR _x_controller_cnt[rip]
	sub	eax, edx
	cmp	eax, -1
	je	.L1098
.L1097:
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L1099
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	je	.L1099
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L1099
	mov	eax, DWORD PTR controller_cnt[rip]
	mov	edx, DWORD PTR _x_controller_cnt[rip]
	sub	eax, edx
	cmp	eax, 1
	je	.L1098
.L1099:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1098
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1098
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L1100
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L1100
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	je	.L1098
.L1100:
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	je	.L1098
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	jne	.L1098
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	je	.L1098
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	je	.L349
.L1098:
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L1101
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	je	.L1101
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	je	.L1101
	mov	edx, DWORD PTR controller_cnt[rip]
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	edx, eax
	jne	.L1101
	movss	xmm0, DWORD PTR controller_z[rip]
	movss	xmm1, DWORD PTR .LC2[rip]
	ucomiss	xmm0, xmm1
	jp	.L1101
	movss	xmm1, DWORD PTR .LC2[rip]
	ucomiss	xmm0, xmm1
	je	.L1102
.L1101:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1102
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1102
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L1104
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L1104
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	je	.L1102
.L1104:
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	je	.L1102
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	jne	.L1102
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	je	.L1102
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	je	.L349
.L1102:
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	je	.L1105
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	je	.L1106
.L1105:
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	je	.L1107
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	jne	.L1106
.L1107:
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	je	.L1106
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	jne	.L1106
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1106
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1106
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	jne	.L349
.L1106:
	movss	xmm0, DWORD PTR controller_z[rip]
	movss	xmm1, DWORD PTR _x_controller_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L1108
	ucomiss	xmm0, xmm1
	jne	.L1108
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L1110
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	je	.L1110
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	jne	.L1110
	mov	eax, DWORD PTR controller_cnt[rip]
	mov	edx, DWORD PTR _x_controller_cnt[rip]
	sub	eax, edx
	cmp	eax, -1
	je	.L1111
.L1110:
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L1108
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	je	.L1108
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L1108
	mov	eax, DWORD PTR controller_cnt[rip]
	mov	edx, DWORD PTR _x_controller_cnt[rip]
	sub	eax, edx
	cmp	eax, 1
	jne	.L1108
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 1
	jg	.L1111
.L1108:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1111
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1111
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L1112
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L1112
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	je	.L1111
.L1112:
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	je	.L1111
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	jne	.L1111
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	je	.L1111
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	je	.L349
.L1111:
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L1113
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	je	.L1113
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L1113
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 1
	jne	.L1113
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	test	eax, eax
	jne	.L1113
	movss	xmm0, DWORD PTR _x_controller_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1113
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1114
.L1113:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1114
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1114
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L1116
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L1116
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	je	.L1114
.L1116:
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	je	.L1114
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	jne	.L1114
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	je	.L1114
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	jne	.L349
.L1114:
	movss	xmm0, DWORD PTR controller_z[rip]
	movss	xmm1, DWORD PTR _x_controller_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L1117
	ucomiss	xmm0, xmm1
	jne	.L1117
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	jne	.L1119
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	je	.L1120
.L1119:
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	je	.L1117
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	je	.L1120
.L1117:
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	je	.L1120
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	je	.L1120
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1120
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1120
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	jne	.L349
.L1120:
	mov	eax, DWORD PTR controller_cnt[rip]
	mov	edx, DWORD PTR _x_controller_cnt[rip]
	sub	eax, edx
	cmp	eax, -1
	jne	.L1121
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L1121
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	je	.L1121
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	jne	.L1121
	movss	xmm1, DWORD PTR controller_z[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L1122
.L1121:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1122
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1122
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L1123
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L1123
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	je	.L1122
.L1123:
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	je	.L1122
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	jne	.L1122
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	je	.L1122
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	jne	.L349
.L1122:
	movzx	eax, BYTE PTR _x_gate_l0[rip]
	test	al, al
	jne	.L1124
	movzx	eax, BYTE PTR _x_gate_l1[rip]
	test	al, al
	je	.L1125
.L1124:
	movzx	eax, BYTE PTR _x_gate_l0[rip]
	test	al, al
	je	.L1126
	movzx	eax, BYTE PTR _x_gate_l1[rip]
	test	al, al
	je	.L1125
.L1126:
	movzx	eax, BYTE PTR _x_gate_l1[rip]
	test	al, al
	je	.L1127
	movzx	eax, BYTE PTR _x_gate_l0[rip]
	test	al, al
	je	.L1125
.L1127:
	movzx	eax, BYTE PTR _x_gate_l0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_gate_l1[rip]
	test	al, al
	je	.L349
.L1125:
	movzx	eax, BYTE PTR _x_gate_evt0[rip]
	test	al, al
	jne	.L1128
	movzx	eax, BYTE PTR _x_gate_evt1[rip]
	test	al, al
	je	.L1129
.L1128:
	movzx	eax, BYTE PTR _x_gate_evt0[rip]
	test	al, al
	je	.L1130
	movzx	eax, BYTE PTR _x_gate_evt1[rip]
	test	al, al
	je	.L1129
.L1130:
	movzx	eax, BYTE PTR _x_gate_evt1[rip]
	test	al, al
	je	.L1131
	movzx	eax, BYTE PTR _x_gate_evt0[rip]
	test	al, al
	je	.L1129
.L1131:
	movzx	eax, BYTE PTR _x_gate_evt0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_gate_evt1[rip]
	test	al, al
	je	.L349
.L1129:
	movss	xmm1, DWORD PTR _x_gate_y[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L1132
	movzx	eax, BYTE PTR _x_gate_l0[rip]
	test	al, al
	je	.L1132
	movzx	eax, BYTE PTR _x_gate_l1[rip]
	test	al, al
	je	.L349
.L1132:
	movss	xmm1, DWORD PTR _x_gate_y[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	jnb	.L1133
	movzx	eax, BYTE PTR _x_gate_l0[rip]
	test	al, al
	je	.L1133
	movzx	eax, BYTE PTR _x_gate_l1[rip]
	test	al, al
	jne	.L349
.L1133:
	movzx	eax, BYTE PTR gate_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_gate_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1134
	movzx	eax, BYTE PTR gate_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_gate_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1134
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR gate_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_gate_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L1134
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L1135
.L1134:
	movzx	eax, BYTE PTR gate_evt0[rip]
	test	al, al
	jne	.L1137
	movzx	eax, BYTE PTR gate_evt1[rip]
	test	al, al
	je	.L349
.L1137:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L349
.L1135:
	movzx	eax, BYTE PTR _x_gate_l0[rip]
	test	al, al
	je	.L1139
	movzx	eax, BYTE PTR _x_gate_l1[rip]
	test	al, al
	jne	.L1139
	movzx	eax, BYTE PTR gate_evt0[rip]
	test	al, al
	je	.L1139
	movzx	eax, BYTE PTR gate_evt1[rip]
	test	al, al
	jne	.L1139
	movss	xmm0, DWORD PTR _x_gate_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1139
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1140
.L1139:
	movzx	eax, BYTE PTR gate_l0[rip]
	test	al, al
	jne	.L1140
	movzx	eax, BYTE PTR gate_l1[rip]
	test	al, al
	jne	.L1140
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1140
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1140
	movzx	eax, BYTE PTR gate_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR gate_evt1[rip]
	test	al, al
	jne	.L349
.L1140:
	movzx	eax, BYTE PTR _x_gate_l1[rip]
	test	al, al
	je	.L1142
	movzx	eax, BYTE PTR _x_gate_l0[rip]
	test	al, al
	jne	.L1142
	movzx	eax, BYTE PTR gate_evt0[rip]
	test	al, al
	je	.L1142
	movzx	eax, BYTE PTR gate_evt1[rip]
	test	al, al
	je	.L1142
	movss	xmm1, DWORD PTR gate_y[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jb	.L1142
	movss	xmm0, DWORD PTR gate_y[rip]
	movss	xmm1, DWORD PTR _x_gate_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L1142
	ucomiss	xmm0, xmm1
	je	.L1144
.L1142:
	movzx	eax, BYTE PTR gate_l0[rip]
	test	al, al
	je	.L1144
	movzx	eax, BYTE PTR gate_l1[rip]
	test	al, al
	jne	.L1144
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1144
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1144
	movzx	eax, BYTE PTR gate_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR gate_evt1[rip]
	test	al, al
	jne	.L349
.L1144:
	movss	xmm0, DWORD PTR _x_gate_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1146
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1146
	movzx	eax, BYTE PTR _x_gate_l0[rip]
	test	al, al
	je	.L1146
	movzx	eax, BYTE PTR _x_gate_l1[rip]
	test	al, al
	je	.L1146
	movzx	eax, BYTE PTR gate_evt1[rip]
	test	al, al
	je	.L1146
	movzx	eax, BYTE PTR gate_evt0[rip]
	test	al, al
	je	.L1148
.L1146:
	movzx	eax, BYTE PTR gate_l1[rip]
	test	al, al
	je	.L1148
	movzx	eax, BYTE PTR gate_l0[rip]
	test	al, al
	jne	.L1148
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1148
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1148
	movzx	eax, BYTE PTR gate_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR gate_evt1[rip]
	test	al, al
	jne	.L349
.L1148:
	movss	xmm0, DWORD PTR gate_y[rip]
	movss	xmm1, DWORD PTR _x_gate_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L1149
	ucomiss	xmm0, xmm1
	jne	.L1149
	movzx	eax, BYTE PTR _x_gate_l0[rip]
	test	al, al
	jne	.L1149
	movzx	eax, BYTE PTR _x_gate_l1[rip]
	test	al, al
	jne	.L1149
	movss	xmm0, DWORD PTR gate_y[rip]
	movss	xmm1, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jb	.L1149
	movzx	eax, BYTE PTR gate_evt0[rip]
	test	al, al
	je	.L1149
	movzx	eax, BYTE PTR gate_evt1[rip]
	test	al, al
	je	.L1149
	movss	xmm1, DWORD PTR gate_y[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	jnb	.L1152
.L1149:
	movzx	eax, BYTE PTR gate_l0[rip]
	test	al, al
	je	.L1152
	movzx	eax, BYTE PTR gate_l1[rip]
	test	al, al
	je	.L1152
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1152
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1152
	movzx	eax, BYTE PTR gate_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR gate_evt1[rip]
	test	al, al
	jne	.L349
.L1152:
	movss	xmm0, DWORD PTR _x_delta[rip]
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jb	.L349
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L1154
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L1155
.L1154:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1155
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1155
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	jne	.L349
.L1155:
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L1156
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L1157
.L1156:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1157
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1157
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	jne	.L349
.L1157:
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L1158
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L1159
.L1158:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1159
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1159
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	jne	.L349
.L1159:
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L1160
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L1161
.L1160:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1161
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1161
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	jne	.L349
.L1161:
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L1162
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L1163
.L1162:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1163
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1163
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	jne	.L349
.L1163:
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L1164
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L1165
.L1164:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1165
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1165
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	jne	.L349
.L1165:
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L1166
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L1167
.L1166:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1167
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1167
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	jne	.L349
.L1167:
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L1168
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L1169
.L1168:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1169
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1169
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	jne	.L349
.L1169:
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L1170
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L1171
.L1170:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1171
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1171
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	jne	.L349
.L1171:
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L1172
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L1173
.L1172:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1173
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1173
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	jne	.L349
.L1173:
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L1174
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L1175
.L1174:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1175
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1175
	movzx	eax, BYTE PTR t10_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t10_evt1[rip]
	test	al, al
	jne	.L349
.L1175:
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L1176
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L1177
.L1176:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1177
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1177
	movzx	eax, BYTE PTR t11_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t11_evt1[rip]
	test	al, al
	jne	.L349
.L1177:
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L1178
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L1179
.L1178:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1179
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1179
	movzx	eax, BYTE PTR t12_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t12_evt1[rip]
	test	al, al
	jne	.L349
.L1179:
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L1180
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L1181
.L1180:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1181
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1181
	movzx	eax, BYTE PTR t13_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t13_evt1[rip]
	test	al, al
	jne	.L349
.L1181:
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L1182
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L1183
.L1182:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1183
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1183
	movzx	eax, BYTE PTR t14_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t14_evt1[rip]
	test	al, al
	jne	.L349
.L1183:
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L1184
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L1185
.L1184:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1185
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1185
	movzx	eax, BYTE PTR t15_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t15_evt1[rip]
	test	al, al
	jne	.L349
.L1185:
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L1186
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L1187
.L1186:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1187
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1187
	movzx	eax, BYTE PTR t16_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t16_evt1[rip]
	test	al, al
	jne	.L349
.L1187:
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L1188
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L1189
.L1188:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1189
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1189
	movzx	eax, BYTE PTR t17_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t17_evt1[rip]
	test	al, al
	jne	.L349
.L1189:
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L1190
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L1191
.L1190:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1191
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1191
	movzx	eax, BYTE PTR t18_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t18_evt1[rip]
	test	al, al
	jne	.L349
.L1191:
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L1192
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L1193
.L1192:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1193
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1193
	movzx	eax, BYTE PTR t19_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t19_evt1[rip]
	test	al, al
	jne	.L349
.L1193:
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L1194
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L1195
.L1194:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1195
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1195
	movzx	eax, BYTE PTR t20_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t20_evt1[rip]
	test	al, al
	jne	.L349
.L1195:
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L1196
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L1197
.L1196:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1197
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1197
	movzx	eax, BYTE PTR t21_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t21_evt1[rip]
	test	al, al
	jne	.L349
.L1197:
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L1198
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L1199
.L1198:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1199
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1199
	movzx	eax, BYTE PTR t22_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t22_evt1[rip]
	test	al, al
	jne	.L349
.L1199:
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L1200
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L1201
.L1200:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1201
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1201
	movzx	eax, BYTE PTR t23_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t23_evt1[rip]
	test	al, al
	jne	.L349
.L1201:
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L1202
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L1203
.L1202:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1203
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1203
	movzx	eax, BYTE PTR t24_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t24_evt1[rip]
	test	al, al
	jne	.L349
.L1203:
	movzx	eax, BYTE PTR t24_evt0[rip]
	test	al, al
	jne	.L1204
	movzx	eax, BYTE PTR t24_evt1[rip]
	test	al, al
	je	.L1205
.L1204:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1205
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1205
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	jne	.L349
.L1205:
	movzx	eax, BYTE PTR gate_evt0[rip]
	test	al, al
	je	.L1206
	movzx	eax, BYTE PTR gate_evt1[rip]
	test	al, al
	jne	.L1206
	mov	eax, 1
	jmp	.L1207
.L1206:
	mov	eax, 0
.L1207:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L1208
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	je	.L1208
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	je	.L1208
	mov	eax, 1
	jmp	.L1209
.L1208:
	mov	eax, 0
.L1209:
	and	eax, 1
	xor	eax, edx
	test	al, al
	jne	.L1210
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1210
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L349
.L1210:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1212
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1212
	movzx	eax, BYTE PTR gate_evt1[rip]
	test	al, al
	je	.L1213
	movzx	eax, BYTE PTR gate_evt0[rip]
	test	al, al
	jne	.L1213
	mov	eax, 1
	jmp	.L1214
.L1213:
	mov	eax, 0
.L1214:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	je	.L1215
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L1215
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	jne	.L1215
	mov	eax, 1
	jmp	.L1216
.L1215:
	mov	eax, 0
.L1216:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L349
.L1212:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1217
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1217
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L1218
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	je	.L1218
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	jne	.L1218
	mov	eax, 1
	jmp	.L1219
.L1218:
	mov	eax, 0
.L1219:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	je	.L1220
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L1221
.L1220:
	movzx	eax, BYTE PTR t24_evt0[rip]
	test	al, al
	je	.L1222
	movzx	eax, BYTE PTR t24_evt1[rip]
	test	al, al
	je	.L1221
.L1222:
	movzx	eax, BYTE PTR t23_evt0[rip]
	test	al, al
	je	.L1223
	movzx	eax, BYTE PTR t23_evt1[rip]
	test	al, al
	je	.L1221
.L1223:
	movzx	eax, BYTE PTR t22_evt0[rip]
	test	al, al
	je	.L1224
	movzx	eax, BYTE PTR t22_evt1[rip]
	test	al, al
	je	.L1221
.L1224:
	movzx	eax, BYTE PTR t21_evt0[rip]
	test	al, al
	je	.L1225
	movzx	eax, BYTE PTR t21_evt1[rip]
	test	al, al
	je	.L1221
.L1225:
	movzx	eax, BYTE PTR t20_evt0[rip]
	test	al, al
	je	.L1226
	movzx	eax, BYTE PTR t20_evt1[rip]
	test	al, al
	je	.L1221
.L1226:
	movzx	eax, BYTE PTR t19_evt0[rip]
	test	al, al
	je	.L1227
	movzx	eax, BYTE PTR t19_evt1[rip]
	test	al, al
	je	.L1221
.L1227:
	movzx	eax, BYTE PTR t18_evt0[rip]
	test	al, al
	je	.L1228
	movzx	eax, BYTE PTR t18_evt1[rip]
	test	al, al
	je	.L1221
.L1228:
	movzx	eax, BYTE PTR t17_evt0[rip]
	test	al, al
	je	.L1229
	movzx	eax, BYTE PTR t17_evt1[rip]
	test	al, al
	je	.L1221
.L1229:
	movzx	eax, BYTE PTR t16_evt0[rip]
	test	al, al
	je	.L1230
	movzx	eax, BYTE PTR t16_evt1[rip]
	test	al, al
	je	.L1221
.L1230:
	movzx	eax, BYTE PTR t15_evt0[rip]
	test	al, al
	je	.L1231
	movzx	eax, BYTE PTR t15_evt1[rip]
	test	al, al
	je	.L1221
.L1231:
	movzx	eax, BYTE PTR t14_evt0[rip]
	test	al, al
	je	.L1232
	movzx	eax, BYTE PTR t14_evt1[rip]
	test	al, al
	je	.L1221
.L1232:
	movzx	eax, BYTE PTR t13_evt0[rip]
	test	al, al
	je	.L1233
	movzx	eax, BYTE PTR t13_evt1[rip]
	test	al, al
	je	.L1221
.L1233:
	movzx	eax, BYTE PTR t12_evt0[rip]
	test	al, al
	je	.L1234
	movzx	eax, BYTE PTR t12_evt1[rip]
	test	al, al
	je	.L1221
.L1234:
	movzx	eax, BYTE PTR t11_evt0[rip]
	test	al, al
	je	.L1235
	movzx	eax, BYTE PTR t11_evt1[rip]
	test	al, al
	je	.L1221
.L1235:
	movzx	eax, BYTE PTR t10_evt0[rip]
	test	al, al
	je	.L1236
	movzx	eax, BYTE PTR t10_evt1[rip]
	test	al, al
	je	.L1221
.L1236:
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	je	.L1237
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	je	.L1221
.L1237:
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	je	.L1238
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	je	.L1221
.L1238:
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	je	.L1239
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	je	.L1221
.L1239:
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	je	.L1240
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	je	.L1221
.L1240:
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	je	.L1241
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	je	.L1221
.L1241:
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	je	.L1242
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	je	.L1221
.L1242:
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	je	.L1243
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	je	.L1221
.L1243:
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	je	.L1244
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	je	.L1221
.L1244:
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	je	.L1245
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	je	.L1221
.L1245:
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	je	.L1246
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	jne	.L1246
.L1221:
	mov	eax, 1
	jmp	.L1247
.L1246:
	mov	eax, 0
.L1247:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L349
.L1217:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1248
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1248
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L1249
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	je	.L1249
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L1249
	mov	eax, 1
	jmp	.L1250
.L1249:
	mov	eax, 0
.L1250:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR t25_evt1[rip]
	test	al, al
	je	.L1251
	movzx	eax, BYTE PTR t25_evt0[rip]
	test	al, al
	je	.L1252
.L1251:
	movzx	eax, BYTE PTR t24_evt1[rip]
	test	al, al
	je	.L1253
	movzx	eax, BYTE PTR t24_evt0[rip]
	test	al, al
	je	.L1252
.L1253:
	movzx	eax, BYTE PTR t23_evt1[rip]
	test	al, al
	je	.L1254
	movzx	eax, BYTE PTR t23_evt0[rip]
	test	al, al
	je	.L1252
.L1254:
	movzx	eax, BYTE PTR t22_evt1[rip]
	test	al, al
	je	.L1255
	movzx	eax, BYTE PTR t22_evt0[rip]
	test	al, al
	je	.L1252
.L1255:
	movzx	eax, BYTE PTR t21_evt1[rip]
	test	al, al
	je	.L1256
	movzx	eax, BYTE PTR t21_evt0[rip]
	test	al, al
	je	.L1252
.L1256:
	movzx	eax, BYTE PTR t20_evt1[rip]
	test	al, al
	je	.L1257
	movzx	eax, BYTE PTR t20_evt0[rip]
	test	al, al
	je	.L1252
.L1257:
	movzx	eax, BYTE PTR t19_evt1[rip]
	test	al, al
	je	.L1258
	movzx	eax, BYTE PTR t19_evt0[rip]
	test	al, al
	je	.L1252
.L1258:
	movzx	eax, BYTE PTR t18_evt1[rip]
	test	al, al
	je	.L1259
	movzx	eax, BYTE PTR t18_evt0[rip]
	test	al, al
	je	.L1252
.L1259:
	movzx	eax, BYTE PTR t17_evt1[rip]
	test	al, al
	je	.L1260
	movzx	eax, BYTE PTR t17_evt0[rip]
	test	al, al
	je	.L1252
.L1260:
	movzx	eax, BYTE PTR t16_evt1[rip]
	test	al, al
	je	.L1261
	movzx	eax, BYTE PTR t16_evt0[rip]
	test	al, al
	je	.L1252
.L1261:
	movzx	eax, BYTE PTR t15_evt1[rip]
	test	al, al
	je	.L1262
	movzx	eax, BYTE PTR t15_evt0[rip]
	test	al, al
	je	.L1252
.L1262:
	movzx	eax, BYTE PTR t14_evt1[rip]
	test	al, al
	je	.L1263
	movzx	eax, BYTE PTR t14_evt0[rip]
	test	al, al
	je	.L1252
.L1263:
	movzx	eax, BYTE PTR t13_evt1[rip]
	test	al, al
	je	.L1264
	movzx	eax, BYTE PTR t13_evt0[rip]
	test	al, al
	je	.L1252
.L1264:
	movzx	eax, BYTE PTR t12_evt1[rip]
	test	al, al
	je	.L1265
	movzx	eax, BYTE PTR t12_evt0[rip]
	test	al, al
	je	.L1252
.L1265:
	movzx	eax, BYTE PTR t11_evt1[rip]
	test	al, al
	je	.L1266
	movzx	eax, BYTE PTR t11_evt0[rip]
	test	al, al
	je	.L1252
.L1266:
	movzx	eax, BYTE PTR t10_evt1[rip]
	test	al, al
	je	.L1267
	movzx	eax, BYTE PTR t10_evt0[rip]
	test	al, al
	je	.L1252
.L1267:
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	je	.L1268
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	je	.L1252
.L1268:
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	je	.L1269
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	je	.L1252
.L1269:
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	je	.L1270
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	je	.L1252
.L1270:
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	je	.L1271
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	je	.L1252
.L1271:
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	je	.L1272
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	je	.L1252
.L1272:
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	je	.L1273
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	je	.L1252
.L1273:
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	je	.L1274
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	je	.L1252
.L1274:
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	je	.L1275
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	je	.L1252
.L1275:
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	je	.L1276
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	je	.L1252
.L1276:
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	je	.L1277
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	jne	.L1277
.L1252:
	mov	eax, 1
	jmp	.L1278
.L1277:
	mov	eax, 0
.L1278:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L349
.L1248:
	movss	xmm0, DWORD PTR delta[rip]
	movss	xmm1, DWORD PTR _x__diverge_delta[rip]
	ucomiss	xmm0, xmm1
	jp	.L1404
	ucomiss	xmm0, xmm1
	je	.L1279
.L1404:
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	movss	xmm1, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L349
.L1279:
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	movss	xmm1, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L1281
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x__diverge_delta[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L349
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L349
.L1281:
	mov	eax, 1
	jmp	.L1283
.L349:
	mov	eax, 0
.L1283:
	mov	DWORD PTR -4[rbp], eax
	movzx	eax, BYTE PTR _x_t25_evt1[rip]
	mov	BYTE PTR t25_evt1[rip], al
	movzx	eax, BYTE PTR _x_t25_evt0[rip]
	mov	BYTE PTR t25_evt0[rip], al
	movss	xmm0, DWORD PTR _x_t25_x[rip]
	movss	DWORD PTR t25_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t24_l1[rip]
	mov	BYTE PTR t24_l1[rip], al
	movzx	eax, BYTE PTR _x_t24_evt1[rip]
	mov	BYTE PTR t24_evt1[rip], al
	movzx	eax, BYTE PTR _x_t24_evt0[rip]
	mov	BYTE PTR t24_evt0[rip], al
	movss	xmm0, DWORD PTR _x_t24_x[rip]
	movss	DWORD PTR t24_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t23_l1[rip]
	mov	BYTE PTR t23_l1[rip], al
	movzx	eax, BYTE PTR _x_t23_evt1[rip]
	mov	BYTE PTR t23_evt1[rip], al
	movzx	eax, BYTE PTR _x_t23_evt0[rip]
	mov	BYTE PTR t23_evt0[rip], al
	movss	xmm0, DWORD PTR _x_t23_x[rip]
	movss	DWORD PTR t23_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t22_l1[rip]
	mov	BYTE PTR t22_l1[rip], al
	movzx	eax, BYTE PTR _x_t8_l1[rip]
	mov	BYTE PTR t8_l1[rip], al
	movss	xmm0, DWORD PTR _x_t9_x[rip]
	movss	DWORD PTR t9_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t23_l0[rip]
	mov	BYTE PTR t23_l0[rip], al
	movzx	eax, BYTE PTR _x_t8_evt1[rip]
	mov	BYTE PTR t8_evt1[rip], al
	movzx	eax, BYTE PTR _x_t8_evt0[rip]
	mov	BYTE PTR t8_evt0[rip], al
	movzx	eax, BYTE PTR _x_t7_l1[rip]
	mov	BYTE PTR t7_l1[rip], al
	movss	xmm0, DWORD PTR _x_t8_x[rip]
	movss	DWORD PTR t8_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t7_evt0[rip]
	mov	BYTE PTR t7_evt0[rip], al
	movzx	eax, BYTE PTR _x_t6_l1[rip]
	mov	BYTE PTR t6_l1[rip], al
	movzx	eax, BYTE PTR _x_t6_l0[rip]
	mov	BYTE PTR t6_l0[rip], al
	movss	xmm0, DWORD PTR _x_t7_x[rip]
	movss	DWORD PTR t7_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t6_evt0[rip]
	mov	BYTE PTR t6_evt0[rip], al
	movzx	eax, BYTE PTR _x_t5_l1[rip]
	mov	BYTE PTR t5_l1[rip], al
	movss	xmm0, DWORD PTR _x_t5_x[rip]
	movss	DWORD PTR t5_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t4_evt0[rip]
	mov	BYTE PTR t4_evt0[rip], al
	movzx	eax, BYTE PTR _x_t3_l1[rip]
	mov	BYTE PTR t3_l1[rip], al
	movzx	eax, BYTE PTR _x_t3_l0[rip]
	mov	BYTE PTR t3_l0[rip], al
	movss	xmm0, DWORD PTR _x_t4_x[rip]
	movss	DWORD PTR t4_x[rip], xmm0
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	mov	DWORD PTR controller_cnt[rip], eax
	movzx	eax, BYTE PTR _x_t12_evt0[rip]
	mov	BYTE PTR t12_evt0[rip], al
	movss	xmm0, DWORD PTR _x_t6_x[rip]
	movss	DWORD PTR t6_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t7_l0[rip]
	mov	BYTE PTR t7_l0[rip], al
	movzx	eax, BYTE PTR _x_t8_l0[rip]
	mov	BYTE PTR t8_l0[rip], al
	movzx	eax, BYTE PTR _x_gate_evt1[rip]
	mov	BYTE PTR gate_evt1[rip], al
	movzx	eax, BYTE PTR _x_t5_evt0[rip]
	mov	BYTE PTR t5_evt0[rip], al
	movzx	eax, BYTE PTR _x_t4_l1[rip]
	mov	BYTE PTR t4_l1[rip], al
	movss	xmm0, DWORD PTR _x_t14_x[rip]
	movss	DWORD PTR t14_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t0_l0[rip]
	mov	BYTE PTR t0_l0[rip], al
	movzx	eax, BYTE PTR _x_t4_l0[rip]
	mov	BYTE PTR t4_l0[rip], al
	movzx	eax, BYTE PTR _x_t19_evt1[rip]
	mov	BYTE PTR t19_evt1[rip], al
	movzx	eax, BYTE PTR _x_t5_l0[rip]
	mov	BYTE PTR t5_l0[rip], al
	movzx	eax, BYTE PTR _x_t14_evt0[rip]
	mov	BYTE PTR t14_evt0[rip], al
	movss	xmm0, DWORD PTR _x_gate_y[rip]
	movss	DWORD PTR gate_y[rip], xmm0
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	mov	BYTE PTR controller_l0[rip], al
	movzx	eax, BYTE PTR _x_t19_l1[rip]
	mov	BYTE PTR t19_l1[rip], al
	movss	xmm0, DWORD PTR _x_delta[rip]
	movss	DWORD PTR delta[rip], xmm0
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	mov	BYTE PTR controller_l1[rip], al
	movzx	eax, BYTE PTR _x_t2_l0[rip]
	mov	BYTE PTR t2_l0[rip], al
	movzx	eax, BYTE PTR _x_t25_l1[rip]
	mov	BYTE PTR t25_l1[rip], al
	movss	xmm0, DWORD PTR _x_t0_x[rip]
	movss	DWORD PTR t0_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t0_evt0[rip]
	mov	BYTE PTR t0_evt0[rip], al
	movzx	eax, BYTE PTR _x_t22_evt0[rip]
	mov	BYTE PTR t22_evt0[rip], al
	movss	xmm0, DWORD PTR _x_t1_x[rip]
	movss	DWORD PTR t1_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t0_l1[rip]
	mov	BYTE PTR t0_l1[rip], al
	movzx	eax, BYTE PTR _x_t7_evt1[rip]
	mov	BYTE PTR t7_evt1[rip], al
	movzx	eax, BYTE PTR _x_t22_l0[rip]
	mov	BYTE PTR t22_l0[rip], al
	movzx	eax, BYTE PTR _x_t1_evt0[rip]
	mov	BYTE PTR t1_evt0[rip], al
	movzx	eax, BYTE PTR _x_t1_l0[rip]
	mov	BYTE PTR t1_l0[rip], al
	movss	xmm0, DWORD PTR _x_t2_x[rip]
	movss	DWORD PTR t2_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t2_l1[rip]
	mov	BYTE PTR t2_l1[rip], al
	movzx	eax, BYTE PTR _x_t1_l1[rip]
	mov	BYTE PTR t1_l1[rip], al
	movzx	eax, BYTE PTR _x_controller_evt1[rip]
	mov	BYTE PTR controller_evt1[rip], al
	movzx	eax, BYTE PTR _x_t2_evt0[rip]
	mov	BYTE PTR t2_evt0[rip], al
	movzx	eax, BYTE PTR _x_t3_evt0[rip]
	mov	BYTE PTR t3_evt0[rip], al
	movzx	eax, BYTE PTR _x_t17_l1[rip]
	mov	BYTE PTR t17_l1[rip], al
	movss	xmm0, DWORD PTR _x__diverge_delta[rip]
	movss	DWORD PTR _diverge_delta[rip], xmm0
	movss	xmm0, DWORD PTR _x_t3_x[rip]
	movss	DWORD PTR t3_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t9_evt0[rip]
	mov	BYTE PTR t9_evt0[rip], al
	movzx	eax, BYTE PTR _x_t24_l0[rip]
	mov	BYTE PTR t24_l0[rip], al
	movzx	eax, BYTE PTR _x_t9_evt1[rip]
	mov	BYTE PTR t9_evt1[rip], al
	movzx	eax, BYTE PTR _x_t9_l0[rip]
	mov	BYTE PTR t9_l0[rip], al
	movzx	eax, BYTE PTR _x_t9_l1[rip]
	mov	BYTE PTR t9_l1[rip], al
	movss	xmm0, DWORD PTR _x_t10_x[rip]
	movss	DWORD PTR t10_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t10_evt0[rip]
	mov	BYTE PTR t10_evt0[rip], al
	movzx	eax, BYTE PTR _x_t25_l0[rip]
	mov	BYTE PTR t25_l0[rip], al
	movzx	eax, BYTE PTR _x_t10_evt1[rip]
	mov	BYTE PTR t10_evt1[rip], al
	movzx	eax, BYTE PTR _x_t10_l0[rip]
	mov	BYTE PTR t10_l0[rip], al
	movzx	eax, BYTE PTR _x_t10_l1[rip]
	mov	BYTE PTR t10_l1[rip], al
	movss	xmm0, DWORD PTR _x_t11_x[rip]
	movss	DWORD PTR t11_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t11_evt0[rip]
	mov	BYTE PTR t11_evt0[rip], al
	movzx	eax, BYTE PTR _x_t11_evt1[rip]
	mov	BYTE PTR t11_evt1[rip], al
	movzx	eax, BYTE PTR _x_t11_l0[rip]
	mov	BYTE PTR t11_l0[rip], al
	movzx	eax, BYTE PTR _x_t11_l1[rip]
	mov	BYTE PTR t11_l1[rip], al
	movss	xmm0, DWORD PTR _x_controller_z[rip]
	movss	DWORD PTR controller_z[rip], xmm0
	movss	xmm0, DWORD PTR _x_t12_x[rip]
	movss	DWORD PTR t12_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t12_evt1[rip]
	mov	BYTE PTR t12_evt1[rip], al
	movzx	eax, BYTE PTR _x_t12_l0[rip]
	mov	BYTE PTR t12_l0[rip], al
	movzx	eax, BYTE PTR _x_controller_evt0[rip]
	mov	BYTE PTR controller_evt0[rip], al
	movzx	eax, BYTE PTR _x_t12_l1[rip]
	mov	BYTE PTR t12_l1[rip], al
	movss	xmm0, DWORD PTR _x_t13_x[rip]
	movss	DWORD PTR t13_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t13_evt0[rip]
	mov	BYTE PTR t13_evt0[rip], al
	movzx	eax, BYTE PTR _x_t13_evt1[rip]
	mov	BYTE PTR t13_evt1[rip], al
	movzx	eax, BYTE PTR _x_t13_l0[rip]
	mov	BYTE PTR t13_l0[rip], al
	movzx	eax, BYTE PTR _x_t13_l1[rip]
	mov	BYTE PTR t13_l1[rip], al
	movzx	eax, BYTE PTR _x_t14_evt1[rip]
	mov	BYTE PTR t14_evt1[rip], al
	movzx	eax, BYTE PTR _x_t14_l0[rip]
	mov	BYTE PTR t14_l0[rip], al
	movzx	eax, BYTE PTR _x_t14_l1[rip]
	mov	BYTE PTR t14_l1[rip], al
	movss	xmm0, DWORD PTR _x_t15_x[rip]
	movss	DWORD PTR t15_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t15_evt0[rip]
	mov	BYTE PTR t15_evt0[rip], al
	movzx	eax, BYTE PTR _x_t15_evt1[rip]
	mov	BYTE PTR t15_evt1[rip], al
	movzx	eax, BYTE PTR _x_t0_evt1[rip]
	mov	BYTE PTR t0_evt1[rip], al
	movzx	eax, BYTE PTR _x_t15_l0[rip]
	mov	BYTE PTR t15_l0[rip], al
	movzx	eax, BYTE PTR _x_t15_l1[rip]
	mov	BYTE PTR t15_l1[rip], al
	movss	xmm0, DWORD PTR _x_t16_x[rip]
	movss	DWORD PTR t16_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t16_evt0[rip]
	mov	BYTE PTR t16_evt0[rip], al
	movzx	eax, BYTE PTR _x_t16_evt1[rip]
	mov	BYTE PTR t16_evt1[rip], al
	movzx	eax, BYTE PTR _x_t1_evt1[rip]
	mov	BYTE PTR t1_evt1[rip], al
	movzx	eax, BYTE PTR _x_t16_l0[rip]
	mov	BYTE PTR t16_l0[rip], al
	movzx	eax, BYTE PTR _x_t16_l1[rip]
	mov	BYTE PTR t16_l1[rip], al
	movss	xmm0, DWORD PTR _x_t17_x[rip]
	movss	DWORD PTR t17_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t17_evt0[rip]
	mov	BYTE PTR t17_evt0[rip], al
	movzx	eax, BYTE PTR _x_t17_evt1[rip]
	mov	BYTE PTR t17_evt1[rip], al
	movzx	eax, BYTE PTR _x_controller_evt2[rip]
	mov	BYTE PTR controller_evt2[rip], al
	movzx	eax, BYTE PTR _x_t2_evt1[rip]
	mov	BYTE PTR t2_evt1[rip], al
	movzx	eax, BYTE PTR _x_t17_l0[rip]
	mov	BYTE PTR t17_l0[rip], al
	movzx	eax, BYTE PTR _x_gate_evt0[rip]
	mov	BYTE PTR gate_evt0[rip], al
	movss	xmm0, DWORD PTR _x_t18_x[rip]
	movss	DWORD PTR t18_x[rip], xmm0
	movzx	eax, BYTE PTR _x_gate_l0[rip]
	mov	BYTE PTR gate_l0[rip], al
	movzx	eax, BYTE PTR _x_t18_evt0[rip]
	mov	BYTE PTR t18_evt0[rip], al
	movzx	eax, BYTE PTR _x_gate_l1[rip]
	mov	BYTE PTR gate_l1[rip], al
	movzx	eax, BYTE PTR _x_t18_evt1[rip]
	mov	BYTE PTR t18_evt1[rip], al
	movzx	eax, BYTE PTR _x_t3_evt1[rip]
	mov	BYTE PTR t3_evt1[rip], al
	movzx	eax, BYTE PTR _x_t18_l0[rip]
	mov	BYTE PTR t18_l0[rip], al
	movzx	eax, BYTE PTR _x_t18_l1[rip]
	mov	BYTE PTR t18_l1[rip], al
	movss	xmm0, DWORD PTR _x_t19_x[rip]
	movss	DWORD PTR t19_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t19_evt0[rip]
	mov	BYTE PTR t19_evt0[rip], al
	movzx	eax, BYTE PTR _x_t4_evt1[rip]
	mov	BYTE PTR t4_evt1[rip], al
	movzx	eax, BYTE PTR _x_t19_l0[rip]
	mov	BYTE PTR t19_l0[rip], al
	movss	xmm0, DWORD PTR _x_t20_x[rip]
	movss	DWORD PTR t20_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t20_evt0[rip]
	mov	BYTE PTR t20_evt0[rip], al
	movzx	eax, BYTE PTR _x_t20_evt1[rip]
	mov	BYTE PTR t20_evt1[rip], al
	movzx	eax, BYTE PTR _x_t5_evt1[rip]
	mov	BYTE PTR t5_evt1[rip], al
	movzx	eax, BYTE PTR _x_t20_l0[rip]
	mov	BYTE PTR t20_l0[rip], al
	movzx	eax, BYTE PTR _x_t20_l1[rip]
	mov	BYTE PTR t20_l1[rip], al
	movss	xmm0, DWORD PTR _x_t21_x[rip]
	movss	DWORD PTR t21_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t21_evt0[rip]
	mov	BYTE PTR t21_evt0[rip], al
	movzx	eax, BYTE PTR _x_t21_evt1[rip]
	mov	BYTE PTR t21_evt1[rip], al
	movzx	eax, BYTE PTR _x_t6_evt1[rip]
	mov	BYTE PTR t6_evt1[rip], al
	movzx	eax, BYTE PTR _x_t21_l0[rip]
	mov	BYTE PTR t21_l0[rip], al
	movzx	eax, BYTE PTR _x_t21_l1[rip]
	mov	BYTE PTR t21_l1[rip], al
	movss	xmm0, DWORD PTR _x_t22_x[rip]
	movss	DWORD PTR t22_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t22_evt1[rip]
	mov	BYTE PTR t22_evt1[rip], al
.L344:
	cmp	DWORD PTR -4[rbp], 0
	jne	.L1284
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	main, .-main
	.section	.rodata
	.align 4
.LC1:
	.long	1084227584
	.align 4
.LC2:
	.long	1065353216
	.align 4
.LC3:
	.long	1073741824
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"182953729.c"
	.text
	.align	2
	.global	__VERIFIER_nondet_bool
	.syntax unified
	.arm
	.fpu softvfp
	.type	__VERIFIER_nondet_bool, %function
__VERIFIER_nondet_bool:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	pop	{fp, pc}
	.size	__VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
	.comm	t25_evt1,1,1
	.comm	_x_t25_evt1,1,1
	.comm	t25_evt0,1,1
	.comm	_x_t25_evt0,1,1
	.comm	t25_x,4,4
	.comm	_x_t25_x,4,4
	.comm	t24_l1,1,1
	.comm	_x_t24_l1,1,1
	.comm	t24_evt1,1,1
	.comm	_x_t24_evt1,1,1
	.comm	t24_evt0,1,1
	.comm	_x_t24_evt0,1,1
	.comm	t24_x,4,4
	.comm	_x_t24_x,4,4
	.comm	t23_l1,1,1
	.comm	_x_t23_l1,1,1
	.comm	t23_evt1,1,1
	.comm	_x_t23_evt1,1,1
	.comm	t23_evt0,1,1
	.comm	_x_t23_evt0,1,1
	.comm	t23_x,4,4
	.comm	_x_t23_x,4,4
	.comm	t22_l1,1,1
	.comm	_x_t22_l1,1,1
	.comm	t8_l1,1,1
	.comm	_x_t8_l1,1,1
	.comm	t9_x,4,4
	.comm	_x_t9_x,4,4
	.comm	t23_l0,1,1
	.comm	_x_t23_l0,1,1
	.comm	t8_evt1,1,1
	.comm	_x_t8_evt1,1,1
	.comm	t8_evt0,1,1
	.comm	_x_t8_evt0,1,1
	.comm	t7_l1,1,1
	.comm	_x_t7_l1,1,1
	.comm	t8_x,4,4
	.comm	_x_t8_x,4,4
	.comm	t7_evt0,1,1
	.comm	_x_t7_evt0,1,1
	.comm	t6_l1,1,1
	.comm	_x_t6_l1,1,1
	.comm	t6_l0,1,1
	.comm	_x_t6_l0,1,1
	.comm	t7_x,4,4
	.comm	_x_t7_x,4,4
	.comm	t6_evt0,1,1
	.comm	_x_t6_evt0,1,1
	.comm	t5_l1,1,1
	.comm	_x_t5_l1,1,1
	.comm	t5_x,4,4
	.comm	_x_t5_x,4,4
	.comm	t4_evt0,1,1
	.comm	_x_t4_evt0,1,1
	.comm	t3_l1,1,1
	.comm	_x_t3_l1,1,1
	.comm	t3_l0,1,1
	.comm	_x_t3_l0,1,1
	.comm	t4_x,4,4
	.comm	_x_t4_x,4,4
	.comm	controller_cnt,4,4
	.comm	_x_controller_cnt,4,4
	.comm	t12_evt0,1,1
	.comm	_x_t12_evt0,1,1
	.comm	t6_x,4,4
	.comm	_x_t6_x,4,4
	.comm	t7_l0,1,1
	.comm	_x_t7_l0,1,1
	.comm	t8_l0,1,1
	.comm	_x_t8_l0,1,1
	.comm	gate_evt1,1,1
	.comm	_x_gate_evt1,1,1
	.comm	t5_evt0,1,1
	.comm	_x_t5_evt0,1,1
	.comm	t4_l1,1,1
	.comm	_x_t4_l1,1,1
	.comm	t14_x,4,4
	.comm	_x_t14_x,4,4
	.comm	t0_l0,1,1
	.comm	_x_t0_l0,1,1
	.comm	t4_l0,1,1
	.comm	_x_t4_l0,1,1
	.comm	t19_evt1,1,1
	.comm	_x_t19_evt1,1,1
	.comm	t5_l0,1,1
	.comm	_x_t5_l0,1,1
	.comm	t14_evt0,1,1
	.comm	_x_t14_evt0,1,1
	.comm	gate_y,4,4
	.comm	_x_gate_y,4,4
	.comm	controller_l0,1,1
	.comm	_x_controller_l0,1,1
	.comm	t19_l1,1,1
	.comm	_x_t19_l1,1,1
	.comm	delta,4,4
	.comm	_x_delta,4,4
	.comm	controller_l1,1,1
	.comm	_x_controller_l1,1,1
	.comm	t2_l0,1,1
	.comm	_x_t2_l0,1,1
	.comm	t25_l1,1,1
	.comm	_x_t25_l1,1,1
	.comm	t0_x,4,4
	.comm	_x_t0_x,4,4
	.comm	t0_evt0,1,1
	.comm	_x_t0_evt0,1,1
	.comm	t22_evt0,1,1
	.comm	_x_t22_evt0,1,1
	.comm	t1_x,4,4
	.comm	_x_t1_x,4,4
	.comm	t0_l1,1,1
	.comm	_x_t0_l1,1,1
	.comm	t7_evt1,1,1
	.comm	_x_t7_evt1,1,1
	.comm	t22_l0,1,1
	.comm	_x_t22_l0,1,1
	.comm	t1_evt0,1,1
	.comm	_x_t1_evt0,1,1
	.comm	t1_l0,1,1
	.comm	_x_t1_l0,1,1
	.comm	t2_x,4,4
	.comm	_x_t2_x,4,4
	.comm	t2_l1,1,1
	.comm	_x_t2_l1,1,1
	.comm	t1_l1,1,1
	.comm	_x_t1_l1,1,1
	.comm	controller_evt1,1,1
	.comm	_x_controller_evt1,1,1
	.comm	t2_evt0,1,1
	.comm	_x_t2_evt0,1,1
	.comm	t3_evt0,1,1
	.comm	_x_t3_evt0,1,1
	.comm	t17_l1,1,1
	.comm	_x_t17_l1,1,1
	.comm	_diverge_delta,4,4
	.comm	_x__diverge_delta,4,4
	.comm	t3_x,4,4
	.comm	_x_t3_x,4,4
	.comm	t9_evt0,1,1
	.comm	_x_t9_evt0,1,1
	.comm	t24_l0,1,1
	.comm	_x_t24_l0,1,1
	.comm	t9_evt1,1,1
	.comm	_x_t9_evt1,1,1
	.comm	t9_l0,1,1
	.comm	_x_t9_l0,1,1
	.comm	t9_l1,1,1
	.comm	_x_t9_l1,1,1
	.comm	t10_x,4,4
	.comm	_x_t10_x,4,4
	.comm	t10_evt0,1,1
	.comm	_x_t10_evt0,1,1
	.comm	t25_l0,1,1
	.comm	_x_t25_l0,1,1
	.comm	t10_evt1,1,1
	.comm	_x_t10_evt1,1,1
	.comm	t10_l0,1,1
	.comm	_x_t10_l0,1,1
	.comm	t10_l1,1,1
	.comm	_x_t10_l1,1,1
	.comm	t11_x,4,4
	.comm	_x_t11_x,4,4
	.comm	t11_evt0,1,1
	.comm	_x_t11_evt0,1,1
	.comm	t11_evt1,1,1
	.comm	_x_t11_evt1,1,1
	.comm	t11_l0,1,1
	.comm	_x_t11_l0,1,1
	.comm	t11_l1,1,1
	.comm	_x_t11_l1,1,1
	.comm	controller_z,4,4
	.comm	_x_controller_z,4,4
	.comm	t12_x,4,4
	.comm	_x_t12_x,4,4
	.comm	t12_evt1,1,1
	.comm	_x_t12_evt1,1,1
	.comm	t12_l0,1,1
	.comm	_x_t12_l0,1,1
	.comm	controller_evt0,1,1
	.comm	_x_controller_evt0,1,1
	.comm	t12_l1,1,1
	.comm	_x_t12_l1,1,1
	.comm	t13_x,4,4
	.comm	_x_t13_x,4,4
	.comm	t13_evt0,1,1
	.comm	_x_t13_evt0,1,1
	.comm	t13_evt1,1,1
	.comm	_x_t13_evt1,1,1
	.comm	t13_l0,1,1
	.comm	_x_t13_l0,1,1
	.comm	t13_l1,1,1
	.comm	_x_t13_l1,1,1
	.comm	t14_evt1,1,1
	.comm	_x_t14_evt1,1,1
	.comm	t14_l0,1,1
	.comm	_x_t14_l0,1,1
	.comm	t14_l1,1,1
	.comm	_x_t14_l1,1,1
	.comm	t15_x,4,4
	.comm	_x_t15_x,4,4
	.comm	t15_evt0,1,1
	.comm	_x_t15_evt0,1,1
	.comm	t15_evt1,1,1
	.comm	_x_t15_evt1,1,1
	.comm	t0_evt1,1,1
	.comm	_x_t0_evt1,1,1
	.comm	t15_l0,1,1
	.comm	_x_t15_l0,1,1
	.comm	t15_l1,1,1
	.comm	_x_t15_l1,1,1
	.comm	t16_x,4,4
	.comm	_x_t16_x,4,4
	.comm	t16_evt0,1,1
	.comm	_x_t16_evt0,1,1
	.comm	t16_evt1,1,1
	.comm	_x_t16_evt1,1,1
	.comm	t1_evt1,1,1
	.comm	_x_t1_evt1,1,1
	.comm	t16_l0,1,1
	.comm	_x_t16_l0,1,1
	.comm	t16_l1,1,1
	.comm	_x_t16_l1,1,1
	.comm	t17_x,4,4
	.comm	_x_t17_x,4,4
	.comm	t17_evt0,1,1
	.comm	_x_t17_evt0,1,1
	.comm	t17_evt1,1,1
	.comm	_x_t17_evt1,1,1
	.comm	controller_evt2,1,1
	.comm	_x_controller_evt2,1,1
	.comm	t2_evt1,1,1
	.comm	_x_t2_evt1,1,1
	.comm	t17_l0,1,1
	.comm	_x_t17_l0,1,1
	.comm	gate_evt0,1,1
	.comm	_x_gate_evt0,1,1
	.comm	t18_x,4,4
	.comm	_x_t18_x,4,4
	.comm	gate_l0,1,1
	.comm	_x_gate_l0,1,1
	.comm	t18_evt0,1,1
	.comm	_x_t18_evt0,1,1
	.comm	gate_l1,1,1
	.comm	_x_gate_l1,1,1
	.comm	t18_evt1,1,1
	.comm	_x_t18_evt1,1,1
	.comm	t3_evt1,1,1
	.comm	_x_t3_evt1,1,1
	.comm	t18_l0,1,1
	.comm	_x_t18_l0,1,1
	.comm	t18_l1,1,1
	.comm	_x_t18_l1,1,1
	.comm	t19_x,4,4
	.comm	_x_t19_x,4,4
	.comm	t19_evt0,1,1
	.comm	_x_t19_evt0,1,1
	.comm	t4_evt1,1,1
	.comm	_x_t4_evt1,1,1
	.comm	t19_l0,1,1
	.comm	_x_t19_l0,1,1
	.comm	t20_x,4,4
	.comm	_x_t20_x,4,4
	.comm	t20_evt0,1,1
	.comm	_x_t20_evt0,1,1
	.comm	t20_evt1,1,1
	.comm	_x_t20_evt1,1,1
	.comm	t5_evt1,1,1
	.comm	_x_t5_evt1,1,1
	.comm	t20_l0,1,1
	.comm	_x_t20_l0,1,1
	.comm	t20_l1,1,1
	.comm	_x_t20_l1,1,1
	.comm	t21_x,4,4
	.comm	_x_t21_x,4,4
	.comm	t21_evt0,1,1
	.comm	_x_t21_evt0,1,1
	.comm	t21_evt1,1,1
	.comm	_x_t21_evt1,1,1
	.comm	t6_evt1,1,1
	.comm	_x_t6_evt1,1,1
	.comm	t21_l0,1,1
	.comm	_x_t21_l0,1,1
	.comm	t21_l1,1,1
	.comm	_x_t21_l1,1,1
	.comm	t22_x,4,4
	.comm	_x_t22_x,4,4
	.comm	t22_evt1,1,1
	.comm	_x_t22_evt1,1,1
	.global	__aeabi_fcmpeq
	.global	__aeabi_fcmple
	.global	__aeabi_fcmpge
	.global	__aeabi_f2d
	.global	__aeabi_dsub
	.global	__aeabi_dadd
	.global	__aeabi_dcmpeq
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #8
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+4
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1320+8
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+12
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+16
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+20
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1320+24
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+28
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+32
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+36
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1320+40
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+44
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+48
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1320+52
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+56
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+60
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+64
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+68
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1320+72
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+76
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+80
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+84
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1320+88
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+92
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+96
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1320+100
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+104
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+108
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+112
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1320+116
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L1320+120
	str	r3, [r2]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+548
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1320+124
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+128
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+132
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+136
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+140
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+144
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1320+524
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+148
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+152
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+412
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+156
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+508
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1320+160
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+164
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+420
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1320+168
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+172
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+176
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+180
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1320+184
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+188
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+348
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1320+192
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+196
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+200
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+356
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+204
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+208
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1320+212
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+216
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+220
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+224
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+228
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+232
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+460
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1320+236
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1320+240
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+244
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+248
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+252
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+256
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+260
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1320+264
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+268
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+272
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+276
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+280
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+284
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1320+580
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+288
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+292
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+572
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+576
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1320+296
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1320+564
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+552
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+556
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+300
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+560
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1320+544
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+528
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+532
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+536
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+540
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+512
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+516
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+520
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1320+504
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+488
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+492
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+304
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+496
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+500
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1320+484
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+468
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+472
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+308
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+476
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+480
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1320+464
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+448
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+452
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+312
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+316
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+456
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+320
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1320+444
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+324
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+428
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+328
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+432
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+332
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+436
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+440
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1320+424
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+408
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+336
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+416
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1320+404
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+388
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+392
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+340
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+396
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+400
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1320+384
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+368
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+372
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+344
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+376
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+380
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1320+364
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1320+352
	strb	r2, [r3]
	ldr	r3, .L1320+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1320+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1320+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L6
	ldr	r3, .L1320+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L6:
	ldr	r3, .L1320+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1320+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L8:
	ldr	r3, .L1320+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L9
	ldr	r3, .L1320+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L9:
	ldr	r3, .L1320+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L7:
	ldr	r3, .L1320+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L10
	ldr	r3, .L1320
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L11
.L10:
	ldr	r3, .L1320+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L12
	ldr	r3, .L1320
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L11
.L12:
	ldr	r3, .L1320
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L1320+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L11
.L13:
	ldr	r3, .L1320+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L11:
	ldr	r3, .L1320+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L14
	ldr	r3, .L1320+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L15
.L14:
	ldr	r3, .L1320+8
	ldr	r3, [r3]	@ float
	ldr	r1, .L1320+568
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L15:
	ldr	r3, .L1320+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1320+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1320+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L18
	ldr	r3, .L1320+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L19
.L18:
	ldr	r3, .L1320+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L20
	ldr	r3, .L1320+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L19
.L20:
	ldr	r3, .L1320+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L21
	ldr	r3, .L1320+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L19
.L21:
	ldr	r3, .L1320+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L19:
	ldr	r3, .L1320+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L22
	ldr	r3, .L1320+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L23
.L22:
	ldr	r3, .L1320+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L24
	ldr	r3, .L1320+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L23
.L24:
	ldr	r3, .L1320+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L25
	ldr	r3, .L1320+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L23
.L25:
	ldr	r3, .L1320+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L23:
	ldr	r3, .L1320+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L26
	ldr	r3, .L1320+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L27
.L26:
	ldr	r3, .L1320+24
	ldr	r3, [r3]	@ float
	ldr	r1, .L1320+568
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L27:
	ldr	r3, .L1320+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1320+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1320+40
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L30
	ldr	r3, .L1320+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L31
.L30:
	ldr	r3, .L1320+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L32
	ldr	r3, .L1320+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L31
.L32:
	ldr	r3, .L1320+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L33
	ldr	r3, .L1320+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L31
.L33:
	ldr	r3, .L1320+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L31:
	ldr	r3, .L1320+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L34
	ldr	r3, .L1320+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L35
.L34:
	ldr	r3, .L1320+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L36
	ldr	r3, .L1320+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L35
.L36:
	ldr	r3, .L1320+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L37
	ldr	r3, .L1320+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L35
.L37:
	ldr	r3, .L1320+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L35:
	ldr	r3, .L1320+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L38
	ldr	r3, .L1320+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L39
.L38:
	ldr	r3, .L1320+40
	ldr	r3, [r3]	@ float
	ldr	r1, .L1320+568
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L39:
	ldr	r3, .L1320+356
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1320+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1320+364
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+356
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L42
	ldr	r3, .L1320+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L43
.L42:
	ldr	r3, .L1320+356
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L44
	ldr	r3, .L1320+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L43
.L44:
	ldr	r3, .L1320+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L45
	ldr	r3, .L1320+356
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L43
.L45:
	ldr	r3, .L1320+356
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	b	.L1321
.L1322:
	.align	2
.L1320:
	.word	t25_evt1
	.word	t25_evt0
	.word	t25_x
	.word	t24_l1
	.word	t24_evt1
	.word	t24_evt0
	.word	t24_x
	.word	t23_l1
	.word	t23_evt1
	.word	t23_evt0
	.word	t23_x
	.word	t22_l1
	.word	t8_l1
	.word	t9_x
	.word	t23_l0
	.word	t8_evt1
	.word	t8_evt0
	.word	t7_l1
	.word	t8_x
	.word	t7_evt0
	.word	t6_l1
	.word	t6_l0
	.word	t7_x
	.word	t6_evt0
	.word	t5_l1
	.word	t5_x
	.word	t4_evt0
	.word	t3_l1
	.word	t3_l0
	.word	t4_x
	.word	controller_cnt
	.word	t6_x
	.word	t7_l0
	.word	t8_l0
	.word	gate_evt1
	.word	t5_evt0
	.word	t4_l1
	.word	t0_l0
	.word	t4_l0
	.word	t5_l0
	.word	gate_y
	.word	controller_l0
	.word	delta
	.word	controller_l1
	.word	t2_l0
	.word	t25_l1
	.word	t0_x
	.word	t0_evt0
	.word	t1_x
	.word	t0_l1
	.word	t7_evt1
	.word	t1_evt0
	.word	t1_l0
	.word	t2_x
	.word	t2_l1
	.word	t1_l1
	.word	controller_evt1
	.word	t2_evt0
	.word	t3_evt0
	.word	_diverge_delta
	.word	t3_x
	.word	t9_evt0
	.word	t24_l0
	.word	t9_evt1
	.word	t9_l0
	.word	t9_l1
	.word	t10_x
	.word	t10_evt0
	.word	t25_l0
	.word	t10_evt1
	.word	t10_l0
	.word	t10_l1
	.word	t11_evt0
	.word	t11_evt1
	.word	controller_z
	.word	controller_evt0
	.word	t0_evt1
	.word	t1_evt1
	.word	controller_evt2
	.word	t2_evt1
	.word	gate_evt0
	.word	gate_l0
	.word	gate_l1
	.word	t3_evt1
	.word	t4_evt1
	.word	t5_evt1
	.word	t6_evt1
	.word	t22_evt0
	.word	t22_evt1
	.word	t22_l0
	.word	t22_l1
	.word	t22_x
	.word	t21_evt0
	.word	t21_evt1
	.word	t21_l0
	.word	t21_l1
	.word	t21_x
	.word	t20_evt0
	.word	t20_evt1
	.word	t20_l0
	.word	t20_l1
	.word	t20_x
	.word	t19_evt0
	.word	t19_evt1
	.word	t19_l0
	.word	t19_l1
	.word	t19_x
	.word	t18_evt0
	.word	t18_evt1
	.word	t18_l0
	.word	t18_l1
	.word	t18_x
	.word	t17_evt0
	.word	t17_evt1
	.word	t17_l0
	.word	t17_l1
	.word	t17_x
	.word	t16_evt0
	.word	t16_evt1
	.word	t16_l0
	.word	t16_l1
	.word	t16_x
	.word	t15_evt0
	.word	t15_evt1
	.word	t15_l0
	.word	t15_l1
	.word	t15_x
	.word	t14_evt0
	.word	t14_evt1
	.word	t14_l0
	.word	t14_l1
	.word	t14_x
	.word	t13_evt0
	.word	t13_evt1
	.word	t13_l0
	.word	t13_l1
	.word	t13_x
	.word	t12_evt0
	.word	t12_evt1
	.word	t12_l0
	.word	t12_l1
	.word	t12_x
	.word	1084227584
	.word	t11_l0
	.word	t11_l1
	.word	t11_x
.L1321:
.L43:
	ldr	r3, .L1320+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L46
	ldr	r3, .L1320+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L47
.L46:
	ldr	r3, .L1320+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L48
	ldr	r3, .L1320+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L47
.L48:
	ldr	r3, .L1320+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L49
	ldr	r3, .L1320+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L47
.L49:
	ldr	r3, .L1320+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L47:
	ldr	r3, .L1320+356
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L50
	ldr	r3, .L1320+360
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L51
.L50:
	ldr	r3, .L1320+364
	ldr	r3, [r3]	@ float
	ldr	r1, .L1320+568
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L51:
	ldr	r3, .L1320+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1320+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1320+384
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L54
	ldr	r3, .L1320+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L55
.L54:
	ldr	r3, .L1320+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L56
	ldr	r3, .L1320+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L55
.L56:
	ldr	r3, .L1320+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L57
	ldr	r3, .L1320+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L55
.L57:
	ldr	r3, .L1320+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L55:
	ldr	r3, .L1320+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L58
	ldr	r3, .L1320+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L59
.L58:
	ldr	r3, .L1320+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L60
	ldr	r3, .L1320+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L59
.L60:
	ldr	r3, .L1320+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L61
	ldr	r3, .L1320+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L59
.L61:
	ldr	r3, .L1320+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L59:
	ldr	r3, .L1320+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L62
	ldr	r3, .L1320+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L63
.L62:
	ldr	r3, .L1320+384
	ldr	r3, [r3]	@ float
	ldr	r1, .L1320+568
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L63:
	ldr	r3, .L1320+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1320+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1320+404
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L66
	ldr	r3, .L1320+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L67
.L66:
	ldr	r3, .L1320+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L68
	ldr	r3, .L1320+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L67
.L68:
	ldr	r3, .L1320+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L69
	ldr	r3, .L1320+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L67
.L69:
	ldr	r3, .L1320+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L67:
	ldr	r3, .L1320+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L70
	ldr	r3, .L1320+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L71
.L70:
	ldr	r3, .L1320+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L72
	ldr	r3, .L1320+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L71
.L72:
	ldr	r3, .L1320+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L73
	ldr	r3, .L1320+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L71
.L73:
	ldr	r3, .L1320+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L71:
	ldr	r3, .L1320+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L74
	ldr	r3, .L1320+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L75
.L74:
	ldr	r3, .L1320+404
	ldr	r3, [r3]	@ float
	ldr	r1, .L1320+568
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L75:
	ldr	r3, .L1320+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1320+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1320+424
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L78
	ldr	r3, .L1320+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L79
.L78:
	ldr	r3, .L1320+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L80
	ldr	r3, .L1320+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L79
.L80:
	ldr	r3, .L1320+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L81
	ldr	r3, .L1320+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L79
.L81:
	ldr	r3, .L1320+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L79:
	ldr	r3, .L1320+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L82
	ldr	r3, .L1320+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L83
.L82:
	ldr	r3, .L1320+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L84
	ldr	r3, .L1320+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L83
.L84:
	ldr	r3, .L1320+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L85
	ldr	r3, .L1320+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L83
.L85:
	ldr	r3, .L1320+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L83:
	ldr	r3, .L1320+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L86
	ldr	r3, .L1320+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L87
.L86:
	ldr	r3, .L1320+424
	ldr	r3, [r3]	@ float
	ldr	r1, .L1320+568
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L87:
	ldr	r3, .L1320+436
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1320+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1320+444
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+436
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L90
	ldr	r3, .L1320+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L90:
	ldr	r3, .L1320+436
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L92
	ldr	r3, .L1320+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L92:
	ldr	r3, .L1320+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L93
	ldr	r3, .L1320+436
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L93:
	ldr	r3, .L1320+436
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L91:
	ldr	r3, .L1320+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L94
	ldr	r3, .L1320+432
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L95
.L94:
	ldr	r3, .L1320+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L96
	ldr	r3, .L1320+432
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L95
.L96:
	ldr	r3, .L1320+432
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L97
	ldr	r3, .L1320+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L95
.L97:
	ldr	r3, .L1320+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+432
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L95:
	ldr	r3, .L1320+436
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L98
	ldr	r3, .L1320+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L99
.L98:
	ldr	r3, .L1320+444
	ldr	r3, [r3]	@ float
	ldr	r1, .L1320+568
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L99:
	ldr	r3, .L1320+456
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1320+460
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1320+464
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+456
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L102
	ldr	r3, .L1320+460
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L103
.L102:
	ldr	r3, .L1320+456
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L104
	ldr	r3, .L1320+460
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L103
.L104:
	ldr	r3, .L1320+460
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L105
	ldr	r3, .L1320+456
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L103
.L105:
	ldr	r3, .L1320+456
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+460
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L103:
	ldr	r3, .L1320+448
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L106
	ldr	r3, .L1320+452
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L107
.L106:
	ldr	r3, .L1320+448
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L108
	ldr	r3, .L1320+452
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L107
.L108:
	ldr	r3, .L1320+452
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L109
	ldr	r3, .L1320+448
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L107
.L109:
	ldr	r3, .L1320+448
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+452
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L107:
	ldr	r3, .L1320+456
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L110
	ldr	r3, .L1320+460
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L111
.L110:
	ldr	r3, .L1320+464
	ldr	r3, [r3]	@ float
	ldr	r1, .L1320+568
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L111:
	ldr	r3, .L1320+476
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1320+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1320+484
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+476
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L114
	ldr	r3, .L1320+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L115
.L114:
	ldr	r3, .L1320+476
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L116
	ldr	r3, .L1320+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L115
.L116:
	ldr	r3, .L1320+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L1320+476
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L115
.L117:
	ldr	r3, .L1320+476
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L115:
	ldr	r3, .L1320+468
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L118
	ldr	r3, .L1320+472
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L119
.L118:
	ldr	r3, .L1320+468
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L120
	ldr	r3, .L1320+472
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L119
.L120:
	ldr	r3, .L1320+472
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L121
	ldr	r3, .L1320+468
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L119
.L121:
	ldr	r3, .L1320+468
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+472
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L119:
	ldr	r3, .L1320+476
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L122
	ldr	r3, .L1320+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L123
.L122:
	ldr	r3, .L1320+484
	ldr	r3, [r3]	@ float
	ldr	r1, .L1320+568
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L123:
	ldr	r3, .L1320+496
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1320+500
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1320+504
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+496
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L126
	ldr	r3, .L1320+500
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L127
.L126:
	ldr	r3, .L1320+496
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L128
	ldr	r3, .L1320+500
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L127
.L128:
	ldr	r3, .L1320+500
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L129
	ldr	r3, .L1320+496
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L127
.L129:
	ldr	r3, .L1320+496
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+500
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L127:
	ldr	r3, .L1320+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L130
	ldr	r3, .L1320+492
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L131
.L130:
	ldr	r3, .L1320+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L132
	ldr	r3, .L1320+492
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L131
.L132:
	ldr	r3, .L1320+492
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L133
	ldr	r3, .L1320+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L131
.L133:
	ldr	r3, .L1320+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+492
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L131:
	ldr	r3, .L1320+496
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L134
	ldr	r3, .L1320+500
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L135
.L134:
	ldr	r3, .L1320+504
	ldr	r3, [r3]	@ float
	ldr	r1, .L1320+568
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L135:
	ldr	r3, .L1320+516
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1320+520
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1320+524
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+516
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L138
	ldr	r3, .L1320+520
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L139
.L138:
	ldr	r3, .L1320+516
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L140
	ldr	r3, .L1320+520
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L139
.L140:
	ldr	r3, .L1320+520
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L141
	ldr	r3, .L1320+516
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L139
.L141:
	ldr	r3, .L1320+516
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+520
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L139:
	ldr	r3, .L1320+508
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L142
	ldr	r3, .L1320+512
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L143
.L142:
	ldr	r3, .L1320+508
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L144
	ldr	r3, .L1320+512
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L143
.L144:
	ldr	r3, .L1320+512
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L145
	ldr	r3, .L1320+508
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L143
.L145:
	ldr	r3, .L1320+508
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+512
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L143:
	ldr	r3, .L1320+516
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L146
	ldr	r3, .L1320+520
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L147
.L146:
	ldr	r3, .L1320+524
	ldr	r3, [r3]	@ float
	ldr	r1, .L1320+568
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L147:
	ldr	r3, .L1320+536
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1320+540
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1320+544
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+536
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L150
	ldr	r3, .L1320+540
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L151
.L150:
	ldr	r3, .L1320+536
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L152
	ldr	r3, .L1320+540
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L151
.L152:
	ldr	r3, .L1320+540
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L153
	ldr	r3, .L1320+536
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L151
.L153:
	ldr	r3, .L1320+536
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+540
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L151:
	ldr	r3, .L1320+528
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L154
	ldr	r3, .L1320+532
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L155
.L154:
	ldr	r3, .L1320+528
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L156
	ldr	r3, .L1320+532
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L155
.L156:
	ldr	r3, .L1320+532
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L1320+528
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L155
.L157:
	ldr	r3, .L1320+528
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+532
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L155:
	ldr	r3, .L1320+536
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L158
	ldr	r3, .L1320+540
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L158:
	ldr	r3, .L1320+544
	ldr	r3, [r3]	@ float
	ldr	r1, .L1320+568
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L159:
	ldr	r3, .L1320+556
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1320+560
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1320+564
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+556
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L162
	ldr	r3, .L1320+560
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L163
.L162:
	ldr	r3, .L1320+556
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L164
	ldr	r3, .L1320+560
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L163
.L164:
	ldr	r3, .L1320+560
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L165
	ldr	r3, .L1320+556
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L163
.L165:
	ldr	r3, .L1320+556
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+560
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L163:
	ldr	r3, .L1320+548
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L166
	ldr	r3, .L1320+552
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L167
.L166:
	ldr	r3, .L1320+548
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L168
	ldr	r3, .L1320+552
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L167
.L168:
	ldr	r3, .L1320+552
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L169
	ldr	r3, .L1320+548
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L167
.L169:
	ldr	r3, .L1320+548
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1320+552
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L167:
	ldr	r3, .L1320+556
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L170
	ldr	r3, .L1320+560
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L171
.L170:
	ldr	r3, .L1320+564
	ldr	r3, [r3]	@ float
	ldr	r1, .L1320+568
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L171:
	ldr	r3, .L1320+572
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1320+576
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1320+580
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L174
	ldr	r3, .L1323+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L175
.L174:
	ldr	r3, .L1323
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L176
	ldr	r3, .L1323+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L175
.L176:
	ldr	r3, .L1323+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L177
	ldr	r3, .L1323
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L175
.L177:
	ldr	r3, .L1323
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L175:
	ldr	r3, .L1323+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L178
	ldr	r3, .L1323+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L179
.L178:
	ldr	r3, .L1323+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L180
	ldr	r3, .L1323+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L179
.L180:
	ldr	r3, .L1323+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L181
	ldr	r3, .L1323+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L179
.L181:
	ldr	r3, .L1323+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L179:
	ldr	r3, .L1323
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L182
	ldr	r3, .L1323+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L183
.L182:
	ldr	r3, .L1323+16
	ldr	r3, [r3]	@ float
	ldr	r1, .L1323+240
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L183:
	ldr	r3, .L1323+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1323+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1323+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L186
	ldr	r3, .L1323+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L187
.L186:
	ldr	r3, .L1323+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L188
	ldr	r3, .L1323+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L187
.L188:
	ldr	r3, .L1323+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L189
	ldr	r3, .L1323+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L187
.L189:
	ldr	r3, .L1323+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L187:
	ldr	r3, .L1323+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L190
	ldr	r3, .L1323+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L191
.L190:
	ldr	r3, .L1323+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L192
	ldr	r3, .L1323+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L191
.L192:
	ldr	r3, .L1323+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L193
	ldr	r3, .L1323+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L191
.L193:
	ldr	r3, .L1323+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L191:
	ldr	r3, .L1323+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L194
	ldr	r3, .L1323+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L195
.L194:
	ldr	r3, .L1323+28
	ldr	r3, [r3]	@ float
	ldr	r1, .L1323+240
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L195:
	ldr	r3, .L1323+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1323+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1323+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L198
	ldr	r3, .L1323+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L199
.L198:
	ldr	r3, .L1323+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L200
	ldr	r3, .L1323+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L199
.L200:
	ldr	r3, .L1323+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L201
	ldr	r3, .L1323+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L199
.L201:
	ldr	r3, .L1323+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L199:
	ldr	r3, .L1323+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L202
	ldr	r3, .L1323+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L203
.L202:
	ldr	r3, .L1323+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L204
	ldr	r3, .L1323+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L203
.L204:
	ldr	r3, .L1323+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L205
	ldr	r3, .L1323+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L203
.L205:
	ldr	r3, .L1323+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L203:
	ldr	r3, .L1323+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L206
	ldr	r3, .L1323+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L206:
	ldr	r3, .L1323+48
	ldr	r3, [r3]	@ float
	ldr	r1, .L1323+240
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L207:
	ldr	r3, .L1323+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1323+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1323+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L210
	ldr	r3, .L1323+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L211
.L210:
	ldr	r3, .L1323+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L212
	ldr	r3, .L1323+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L211
.L212:
	ldr	r3, .L1323+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L213
	ldr	r3, .L1323+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L211
.L213:
	ldr	r3, .L1323+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L211:
	ldr	r3, .L1323+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L214
	ldr	r3, .L1323+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L215
.L214:
	ldr	r3, .L1323+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L216
	ldr	r3, .L1323+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L215
.L216:
	ldr	r3, .L1323+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L217
	ldr	r3, .L1323+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L215
.L217:
	ldr	r3, .L1323+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L215:
	ldr	r3, .L1323+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L218
	ldr	r3, .L1323+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L219
.L218:
	ldr	r3, .L1323+68
	ldr	r3, [r3]	@ float
	ldr	r1, .L1323+240
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L219:
	ldr	r3, .L1323+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1323+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1323+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L222
	ldr	r3, .L1323+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L223
.L222:
	ldr	r3, .L1323+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L224
	ldr	r3, .L1323+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L223
.L224:
	ldr	r3, .L1323+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L225
	ldr	r3, .L1323+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L223
.L225:
	ldr	r3, .L1323+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L223:
	ldr	r3, .L1323+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L226
	ldr	r3, .L1323+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L227
.L226:
	ldr	r3, .L1323+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L228
	ldr	r3, .L1323+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L227
.L228:
	ldr	r3, .L1323+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1323+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L227
.L229:
	ldr	r3, .L1323+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L227:
	ldr	r3, .L1323+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L230
	ldr	r3, .L1323+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L231
.L230:
	ldr	r3, .L1323+88
	ldr	r3, [r3]	@ float
	ldr	r1, .L1323+240
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L231:
	ldr	r3, .L1323+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1323+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1323+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L234
	ldr	r3, .L1323+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L235
.L234:
	ldr	r3, .L1323+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L236
	ldr	r3, .L1323+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L235
.L236:
	ldr	r3, .L1323+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L237
	ldr	r3, .L1323+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L235
.L237:
	ldr	r3, .L1323+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L235:
	ldr	r3, .L1323+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L238
	ldr	r3, .L1323+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L239
.L238:
	ldr	r3, .L1323+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L240
	ldr	r3, .L1323+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L239
.L240:
	ldr	r3, .L1323+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L241
	ldr	r3, .L1323+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L239
.L241:
	ldr	r3, .L1323+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L239:
	ldr	r3, .L1323+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L242
	ldr	r3, .L1323+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L243
.L242:
	ldr	r3, .L1323+108
	ldr	r3, [r3]	@ float
	ldr	r1, .L1323+240
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L243:
	ldr	r3, .L1323+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1323+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1323+128
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L246
	ldr	r3, .L1323+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L247
.L246:
	ldr	r3, .L1323+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L248
	ldr	r3, .L1323+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L247
.L248:
	ldr	r3, .L1323+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L249
	ldr	r3, .L1323+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L247
.L249:
	ldr	r3, .L1323+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L247:
	ldr	r3, .L1323+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L250
	ldr	r3, .L1323+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L251
.L250:
	ldr	r3, .L1323+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L252
	ldr	r3, .L1323+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L251
.L252:
	ldr	r3, .L1323+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L253
	ldr	r3, .L1323+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L251
.L253:
	ldr	r3, .L1323+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L251:
	ldr	r3, .L1323+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L254
	ldr	r3, .L1323+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L255
.L254:
	ldr	r3, .L1323+128
	ldr	r3, [r3]	@ float
	ldr	r1, .L1323+240
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L255:
	ldr	r3, .L1323+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1323+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1323+148
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L258
	ldr	r3, .L1323+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L259
.L258:
	ldr	r3, .L1323+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L260
	ldr	r3, .L1323+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L259
.L260:
	ldr	r3, .L1323+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L261
	ldr	r3, .L1323+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L259
.L261:
	ldr	r3, .L1323+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L259:
	ldr	r3, .L1323+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L262
	ldr	r3, .L1323+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L263
.L262:
	ldr	r3, .L1323+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L264
	ldr	r3, .L1323+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L263
.L264:
	ldr	r3, .L1323+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L265
	ldr	r3, .L1323+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L263
.L265:
	ldr	r3, .L1323+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L263:
	ldr	r3, .L1323+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L266
	ldr	r3, .L1323+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L267
.L266:
	ldr	r3, .L1323+148
	ldr	r3, [r3]	@ float
	ldr	r1, .L1323+240
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L267:
	ldr	r3, .L1323+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1323+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1323+168
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L270
	ldr	r3, .L1323+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L271
.L270:
	ldr	r3, .L1323+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L272
	ldr	r3, .L1323+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L271
.L272:
	ldr	r3, .L1323+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L273
	ldr	r3, .L1323+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L271
.L273:
	ldr	r3, .L1323+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L271:
	ldr	r3, .L1323+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L274
	ldr	r3, .L1323+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L275
.L274:
	ldr	r3, .L1323+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L276
	ldr	r3, .L1323+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L275
.L276:
	ldr	r3, .L1323+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L277
	ldr	r3, .L1323+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L275
.L277:
	ldr	r3, .L1323+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L275:
	ldr	r3, .L1323+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L278
	ldr	r3, .L1323+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L279
.L278:
	ldr	r3, .L1323+168
	ldr	r3, [r3]	@ float
	ldr	r1, .L1323+240
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L279:
	ldr	r3, .L1323+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1323+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1323+188
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L282
	ldr	r3, .L1323+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L283
.L282:
	ldr	r3, .L1323+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L284
	ldr	r3, .L1323+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L283
.L284:
	ldr	r3, .L1323+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L285
	ldr	r3, .L1323+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L283
.L285:
	ldr	r3, .L1323+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L283:
	ldr	r3, .L1323+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L286
	ldr	r3, .L1323+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L287
.L286:
	ldr	r3, .L1323+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L288
	ldr	r3, .L1323+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L287
.L288:
	ldr	r3, .L1323+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L289
	ldr	r3, .L1323+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L287
.L289:
	ldr	r3, .L1323+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L287:
	ldr	r3, .L1323+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L290
	ldr	r3, .L1323+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L291
.L290:
	ldr	r3, .L1323+188
	ldr	r3, [r3]	@ float
	ldr	r1, .L1323+240
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L291:
	ldr	r3, .L1323+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1323+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1323+216
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L294
	ldr	r3, .L1323+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L295
.L294:
	ldr	r3, .L1323+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L296
	ldr	r3, .L1323+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L295
.L296:
	ldr	r3, .L1323+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L297
	ldr	r3, .L1323+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L295
.L297:
	ldr	r3, .L1323+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L295:
	ldr	r3, .L1323+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L298
	ldr	r3, .L1323+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L299
.L298:
	ldr	r3, .L1323+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L300
	ldr	r3, .L1323+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L299
.L300:
	ldr	r3, .L1323+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L301
	ldr	r3, .L1323+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L299
.L301:
	ldr	r3, .L1323+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	b	.L1324
.L1325:
	.align	2
.L1323:
	.word	t11_l0
	.word	t11_l1
	.word	t11_evt0
	.word	t11_evt1
	.word	t11_x
	.word	t10_l0
	.word	t10_l1
	.word	t10_x
	.word	t10_evt0
	.word	t10_evt1
	.word	t9_l0
	.word	t9_l1
	.word	t9_x
	.word	t9_evt0
	.word	t9_evt1
	.word	t8_l0
	.word	t8_l1
	.word	t8_x
	.word	t8_evt0
	.word	t8_evt1
	.word	t7_l0
	.word	t7_l1
	.word	t7_x
	.word	t7_evt0
	.word	t7_evt1
	.word	t6_l0
	.word	t6_l1
	.word	t6_x
	.word	t6_evt0
	.word	t6_evt1
	.word	t5_l0
	.word	t5_l1
	.word	t5_x
	.word	t5_evt0
	.word	t5_evt1
	.word	t4_l0
	.word	t4_l1
	.word	t4_x
	.word	t4_evt0
	.word	t4_evt1
	.word	t3_l0
	.word	t3_l1
	.word	t3_x
	.word	t3_evt0
	.word	t3_evt1
	.word	t2_l0
	.word	t2_l1
	.word	t2_x
	.word	t2_evt0
	.word	t2_evt1
	.word	t1_evt0
	.word	t1_evt1
	.word	t1_l0
	.word	t1_l1
	.word	t1_x
	.word	t0_evt0
	.word	t0_evt1
	.word	t0_l0
	.word	t0_l1
	.word	t0_x
	.word	1084227584
	.word	controller_evt2
	.word	controller_evt0
	.word	controller_evt1
	.word	controller_cnt
	.word	controller_z
	.word	controller_l0
	.word	controller_l1
	.word	gate_evt0
	.word	gate_evt1
	.word	gate_y
	.word	gate_l0
	.word	gate_l1
	.word	delta
	.word	_diverge_delta
	.word	_x_t25_evt1
	.word	_x_t25_evt0
	.word	_x_t25_x
	.word	_x_t24_l1
	.word	_x_t24_evt1
	.word	_x_t24_evt0
	.word	_x_t24_x
	.word	_x_t23_l1
	.word	_x_t23_evt1
	.word	_x_t23_evt0
	.word	_x_t23_x
	.word	_x_t22_l1
	.word	_x_t8_l1
	.word	_x_t9_x
	.word	_x_t23_l0
	.word	_x_t8_evt1
	.word	_x_t8_evt0
	.word	_x_t7_l1
	.word	_x_t8_x
	.word	_x_t7_evt0
	.word	_x_t6_l1
	.word	_x_t6_l0
	.word	_x_t7_x
	.word	_x_t6_evt0
	.word	_x_t5_l1
	.word	_x_t5_x
	.word	_x_t4_evt0
	.word	_x_t3_l1
	.word	_x_t3_l0
	.word	_x_t4_x
	.word	_x_controller_cnt
	.word	_x_t12_evt0
	.word	_x_t6_x
	.word	_x_t7_l0
	.word	_x_t8_l0
	.word	_x_gate_evt1
	.word	_x_t5_evt0
	.word	_x_t4_l1
	.word	_x_t14_x
	.word	_x_t0_l0
	.word	_x_t4_l0
	.word	_x_t19_evt1
	.word	_x_t5_l0
	.word	_x_t14_evt0
	.word	_x_gate_y
	.word	_x_controller_l0
	.word	_x_t19_l1
	.word	_x_delta
	.word	_x_controller_l1
	.word	_x_t2_l0
	.word	_x_t25_l1
	.word	_x_t0_x
	.word	_x_t0_evt0
	.word	_x_t22_evt0
	.word	_x_t1_x
	.word	_x_t0_l1
	.word	_x_t7_evt1
	.word	_x_t22_l0
	.word	_x_t1_evt0
	.word	_x_t1_l0
	.word	_x_t2_x
	.word	_x_t2_l1
	.word	_x_t1_l1
	.word	_x_controller_evt1
	.word	_x_t2_evt0
	.word	_x_t3_evt0
	.word	_x_t17_l1
	.word	_x__diverge_delta
	.word	_x_t3_x
	.word	_x_t9_evt0
	.word	_x_t24_l0
	.word	_x_t9_evt1
	.word	_x_t9_l0
	.word	_x_t9_l1
	.word	_x_t10_x
	.word	_x_t10_evt0
	.word	_x_t25_l0
	.word	_x_t10_evt1
	.word	_x_t10_l0
	.word	_x_t10_l1
	.word	_x_t11_x
	.word	_x_t11_evt0
	.word	_x_t11_evt1
	.word	_x_t11_l0
	.word	_x_t11_l1
	.word	_x_controller_z
	.word	_x_t12_x
	.word	_x_t12_evt1
	.word	_x_t12_l0
	.word	_x_controller_evt0
	.word	_x_t12_l1
	.word	_x_t13_x
	.word	_x_t13_evt0
	.word	_x_t13_evt1
	.word	_x_t13_l0
	.word	_x_t13_l1
	.word	_x_t14_evt1
	.word	_x_t14_l0
	.word	_x_t14_l1
	.word	_x_t15_x
	.word	_x_t15_evt0
	.word	_x_t15_evt1
	.word	_x_t0_evt1
	.word	_x_t15_l0
	.word	_x_t15_l1
	.word	_x_t16_x
	.word	_x_t16_evt0
	.word	_x_t16_evt1
	.word	_x_t1_evt1
	.word	_x_t16_l0
	.word	_x_t16_l1
.L1324:
	beq	.L4
.L299:
	ldr	r3, .L1323+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L302
	ldr	r3, .L1323+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L303
.L302:
	ldr	r3, .L1323+216
	ldr	r3, [r3]	@ float
	ldr	r1, .L1323+240
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L303:
	ldr	r3, .L1323+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1323+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1323+236
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L306
	ldr	r3, .L1323+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L307
.L306:
	ldr	r3, .L1323+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L308
	ldr	r3, .L1323+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L307
.L308:
	ldr	r3, .L1323+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L309
	ldr	r3, .L1323+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L307
.L309:
	ldr	r3, .L1323+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L307:
	ldr	r3, .L1323+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L310
	ldr	r3, .L1323+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L311
.L310:
	ldr	r3, .L1323+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L312
	ldr	r3, .L1323+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L311
.L312:
	ldr	r3, .L1323+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L313
	ldr	r3, .L1323+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L311
.L313:
	ldr	r3, .L1323+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L311:
	ldr	r3, .L1323+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L314
	ldr	r3, .L1323+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L315
.L314:
	ldr	r3, .L1323+236
	ldr	r3, [r3]	@ float
	ldr	r1, .L1323+240
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L315:
	ldr	r3, .L1323+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1323+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1323+260
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L318
	ldr	r3, .L1323+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L319
.L318:
	ldr	r3, .L1323+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L320
	ldr	r3, .L1323+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L319
.L320:
	ldr	r3, .L1323+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L321
	ldr	r3, .L1323+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L319
.L321:
	ldr	r3, .L1323+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L319:
	ldr	r3, .L1323+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L322
	ldr	r3, .L1323+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L322
	ldr	r3, .L1323+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L323
.L322:
	ldr	r3, .L1323+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L324
	ldr	r3, .L1323+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L324
	ldr	r3, .L1323+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L323
.L324:
	ldr	r3, .L1323+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L325
	ldr	r3, .L1323+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L325
	ldr	r3, .L1323+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L323
.L325:
	ldr	r3, .L1323+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L326
	ldr	r3, .L1323+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L326
	ldr	r3, .L1323+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L323
.L326:
	ldr	r3, .L1323+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1323+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L323:
	ldr	r3, .L1323+256
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L327
	ldr	r3, .L1323+256
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L327
	ldr	r3, .L1323+256
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L327
	ldr	r3, .L1323+256
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L327
	ldr	r3, .L1323+256
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L327
	ldr	r3, .L1323+256
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L327
	ldr	r3, .L1323+256
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L327
	ldr	r3, .L1323+256
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L327
	ldr	r3, .L1323+256
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L327
	ldr	r3, .L1323+256
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L327
	ldr	r3, .L1323+256
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L327
	ldr	r3, .L1323+256
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L327
	ldr	r3, .L1323+256
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L327
	ldr	r3, .L1323+256
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L327
	ldr	r3, .L1323+256
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L327
	ldr	r3, .L1323+256
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L327
	ldr	r3, .L1323+256
	ldr	r3, [r3]
	cmp	r3, #16
	beq	.L327
	ldr	r3, .L1323+256
	ldr	r3, [r3]
	cmp	r3, #17
	beq	.L327
	ldr	r3, .L1323+256
	ldr	r3, [r3]
	cmp	r3, #18
	beq	.L327
	ldr	r3, .L1323+256
	ldr	r3, [r3]
	cmp	r3, #19
	beq	.L327
	ldr	r3, .L1323+256
	ldr	r3, [r3]
	cmp	r3, #20
	beq	.L327
	ldr	r3, .L1323+256
	ldr	r3, [r3]
	cmp	r3, #21
	beq	.L327
	ldr	r3, .L1323+256
	ldr	r3, [r3]
	cmp	r3, #22
	beq	.L327
	ldr	r3, .L1323+256
	ldr	r3, [r3]
	cmp	r3, #23
	beq	.L327
	ldr	r3, .L1323+256
	ldr	r3, [r3]
	cmp	r3, #24
	beq	.L327
	ldr	r3, .L1323+256
	ldr	r3, [r3]
	cmp	r3, #25
	beq	.L327
	ldr	r3, .L1323+256
	ldr	r3, [r3]
	cmp	r3, #26
	beq	.L327
	ldr	r3, .L1323+256
	ldr	r3, [r3]
	cmp	r3, #27
	bne	.L4
.L327:
	ldr	r3, .L1323+260
	ldr	r3, [r3]	@ float
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L328
	ldr	r3, .L1323+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L329
	ldr	r3, .L1323+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L329:
	ldr	r3, .L1323+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L328
	ldr	r3, .L1323+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L328:
	ldr	r3, .L1323+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1323+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1323+280
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L331
	ldr	r3, .L1323+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L332
.L331:
	ldr	r3, .L1323+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L333
	ldr	r3, .L1323+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L332
.L333:
	ldr	r3, .L1323+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L334
	ldr	r3, .L1323+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L332
.L334:
	ldr	r3, .L1323+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L332:
	ldr	r3, .L1323+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L335
	ldr	r3, .L1323+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L336
.L335:
	ldr	r3, .L1323+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L337
	ldr	r3, .L1323+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L336
.L337:
	ldr	r3, .L1323+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L338
	ldr	r3, .L1323+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L336
.L338:
	ldr	r3, .L1323+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L336:
	ldr	r3, .L1323+280
	ldr	r3, [r3]	@ float
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L339
	ldr	r3, .L1323+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L339
	ldr	r3, .L1323+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L339:
	ldr	r3, .L1323+280
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L340
	ldr	r3, .L1323+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L340
	ldr	r3, .L1323+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L340:
	ldr	r3, .L1323+292
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1323+292
	ldr	r3, [r3]	@ float
	ldr	r2, .L1323+296
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	mov	r3, #1
	b	.L343
.L4:
	mov	r3, #0
.L343:
	str	r3, [fp, #-24]
	b	.L344
.L1200:
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+300
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+304
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1323+308
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+312
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+316
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+320
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1323+324
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+328
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+332
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+336
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1323+340
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+344
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+348
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1323+352
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+356
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+360
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+364
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+368
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1323+372
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+376
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+380
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+384
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1323+388
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+392
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+396
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1323+400
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+404
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+408
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+412
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1323+416
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L1323+420
	str	r3, [r2]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+424
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1323+428
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+432
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+436
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+440
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+444
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+448
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1323+452
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+456
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+460
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+464
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+468
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+472
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1323+476
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+480
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+484
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1323+488
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+492
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+496
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+500
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1323+504
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+508
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+512
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1323+516
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+520
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+524
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+528
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+532
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+536
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1323+540
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+544
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+548
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+552
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+556
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+560
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+564
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1323+568
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1323+572
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+576
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+580
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+584
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+588
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+592
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1323+596
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+600
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+604
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+608
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+612
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+616
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1323+620
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+624
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+628
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+632
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+636
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1323+640
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1323+644
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+648
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+652
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+656
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+660
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1323+664
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+668
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+672
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+676
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+680
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+684
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+688
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+692
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1323+696
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+700
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+704
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+708
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+712
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+716
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1323+720
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+724
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+728
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+732
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+736
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1323+740
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1326
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1326+4
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1326+8
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1326+12
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1326+16
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1326+20
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1326+24
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1326+28
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1326+32
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1326+36
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1326+40
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1326+44
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1326+48
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1326+52
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1326+56
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1326+60
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1326+64
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1326+68
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1326+72
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1326+76
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1326+80
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1326+84
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1326+88
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1326+92
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1326+96
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1326+276
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1326+264
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1326+268
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1326+100
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1326+300
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1326+304
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1326+244
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1326+228
	strb	r2, [r3]
	ldr	r3, .L1326+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L345
	ldr	r3, .L1326+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L346
.L345:
	ldr	r3, .L1326+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L347
	ldr	r3, .L1326+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L346
.L347:
	ldr	r3, .L1326+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L348
	ldr	r3, .L1326+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L346
.L348:
	ldr	r3, .L1326+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1326+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L346:
	ldr	r3, .L1326+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L350
	ldr	r3, .L1326+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L351
.L350:
	ldr	r3, .L1326+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L352
	ldr	r3, .L1326+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L351
.L352:
	ldr	r3, .L1326+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L353
	ldr	r3, .L1326+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L351
.L353:
	ldr	r3, .L1326+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1326+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L351:
	ldr	r3, .L1326+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L354
	ldr	r3, .L1326+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L355
.L354:
	ldr	r3, .L1326+120
	ldr	r3, [r3]	@ float
	ldr	r1, .L1326+272
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
.L355:
	ldr	r3, .L1326+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1326+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L357
	ldr	r3, .L1326+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1326+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L357
	ldr	r3, .L1326+288
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1326+132
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1326+120
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L358
.L357:
	ldr	r3, .L1326+288
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1326+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L358
	ldr	r3, .L1326+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L358:
	ldr	r3, .L1326+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L360
	ldr	r3, .L1326+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L360
	ldr	r3, .L1326+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L360
	ldr	r3, .L1326+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L360
	ldr	r3, .L1326+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L361
.L360:
	ldr	r3, .L1326+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L361
	ldr	r3, .L1326+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L361
	ldr	r3, .L1326+288
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L361
	ldr	r3, .L1326+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1326+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L361:
	ldr	r3, .L1326+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L362
	ldr	r3, .L1326+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L362
	ldr	r3, .L1326+132
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L363
	mov	r3, #0
	mov	r4, r3
.L363:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L362
	ldr	r3, .L1326+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L362
	ldr	r3, .L1326+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L362
	ldr	r3, .L1326+132
	ldr	r3, [r3]	@ float
	ldr	r2, .L1326+120
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L364
.L362:
	ldr	r3, .L1326+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L364
	ldr	r3, .L1326+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L364
	ldr	r3, .L1326+288
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L364
	ldr	r3, .L1326+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1326+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L364:
	ldr	r3, .L1326+132
	ldr	r3, [r3]	@ float
	ldr	r2, .L1326+120
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L365
	ldr	r3, .L1326+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L365
	ldr	r3, .L1326+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L365
	ldr	r3, .L1326+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L365
	ldr	r3, .L1326+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L367
.L365:
	ldr	r3, .L1326+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L367
	ldr	r3, .L1326+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L367
	ldr	r3, .L1326+288
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L367
	ldr	r3, .L1326+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1326+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L367:
	ldr	r3, .L1326+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L368
	ldr	r3, .L1326+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L368
	ldr	r3, .L1326+132
	ldr	r3, [r3]	@ float
	ldr	r1, .L1326+272
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L368
	ldr	r3, .L1326+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L368
	ldr	r3, .L1326+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L368
	ldr	r3, .L1326+132
	ldr	r3, [r3]	@ float
	ldr	r2, .L1326+120
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L370
.L368:
	ldr	r3, .L1326+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L370
	ldr	r3, .L1326+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L370
	ldr	r3, .L1326+288
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L370
	ldr	r3, .L1326+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1326+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L370:
	ldr	r3, .L1326+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L371
	ldr	r3, .L1326+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L372
.L371:
	ldr	r3, .L1326+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L373
	ldr	r3, .L1326+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L372
.L373:
	ldr	r3, .L1326+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L374
	ldr	r3, .L1326+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L372
.L374:
	ldr	r3, .L1326+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1326+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L372:
	ldr	r3, .L1326+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L375
	ldr	r3, .L1326+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L376
.L375:
	ldr	r3, .L1326+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L377
	ldr	r3, .L1326+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L376
.L377:
	ldr	r3, .L1326+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L1326+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L376
.L378:
	ldr	r3, .L1326+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1326+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L376:
	ldr	r3, .L1326+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L379
	ldr	r3, .L1326+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L380
.L379:
	ldr	r3, .L1326+160
	ldr	r3, [r3]	@ float
	ldr	r1, .L1326+272
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
.L380:
	ldr	r3, .L1326+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1326+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L382
	ldr	r3, .L1326+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1326+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L382
	ldr	r3, .L1326+288
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1326+172
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1326+160
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L383
.L382:
	ldr	r3, .L1326+288
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1326+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L383
	ldr	r3, .L1326+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L383:
	ldr	r3, .L1326+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L385
	ldr	r3, .L1326+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L385
	ldr	r3, .L1326+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L385
	ldr	r3, .L1326+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L385
	ldr	r3, .L1326+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L386
.L385:
	ldr	r3, .L1326+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L386
	ldr	r3, .L1326+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L386
	ldr	r3, .L1326+288
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L386
	ldr	r3, .L1326+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1326+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L386:
	ldr	r3, .L1326+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L387
	ldr	r3, .L1326+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L387
	ldr	r3, .L1326+172
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L388
	mov	r3, #0
	mov	r4, r3
.L388:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L387
	ldr	r3, .L1326+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L387
	ldr	r3, .L1326+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L387
	ldr	r3, .L1326+172
	ldr	r3, [r3]	@ float
	ldr	r2, .L1326+160
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L389
.L387:
	ldr	r3, .L1326+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L389
	ldr	r3, .L1326+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L389
	ldr	r3, .L1326+288
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L389
	ldr	r3, .L1326+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1326+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L389:
	ldr	r3, .L1326+172
	ldr	r3, [r3]	@ float
	ldr	r2, .L1326+160
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L390
	ldr	r3, .L1326+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L390
	ldr	r3, .L1326+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L390
	ldr	r3, .L1326+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L390
	ldr	r3, .L1326+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L392
.L390:
	ldr	r3, .L1326+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L392
	ldr	r3, .L1326+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L392
	ldr	r3, .L1326+288
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L392
	ldr	r3, .L1326+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1326+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L392:
	ldr	r3, .L1326+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L393
	ldr	r3, .L1326+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L393
	ldr	r3, .L1326+172
	ldr	r3, [r3]	@ float
	ldr	r1, .L1326+272
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L393
	ldr	r3, .L1326+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L393
	ldr	r3, .L1326+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L393
	ldr	r3, .L1326+172
	ldr	r3, [r3]	@ float
	ldr	r2, .L1326+160
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L395
.L393:
	ldr	r3, .L1326+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L395
	ldr	r3, .L1326+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L395
	ldr	r3, .L1326+288
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L395
	ldr	r3, .L1326+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1326+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L395:
	ldr	r3, .L1326+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L396
	ldr	r3, .L1326+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L397
.L396:
	ldr	r3, .L1326+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L398
	ldr	r3, .L1326+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L397
.L398:
	ldr	r3, .L1326+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L399
	ldr	r3, .L1326+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L397
.L399:
	ldr	r3, .L1326+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1326+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L397:
	ldr	r3, .L1326+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L400
	ldr	r3, .L1326+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L401
.L400:
	ldr	r3, .L1326+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L402
	ldr	r3, .L1326+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L401
.L402:
	ldr	r3, .L1326+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L403
	ldr	r3, .L1326+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L401
.L403:
	ldr	r3, .L1326+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1326+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L401:
	ldr	r3, .L1326+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L404
	ldr	r3, .L1326+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L405
.L404:
	ldr	r3, .L1326+204
	ldr	r3, [r3]	@ float
	ldr	r1, .L1326+272
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
.L405:
	ldr	r3, .L1326+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1326+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	b	.L1327
.L1328:
	.align	2
.L1326:
	.word	_x_t17_x
	.word	_x_t17_evt0
	.word	_x_t17_evt1
	.word	_x_controller_evt2
	.word	_x_t2_evt1
	.word	_x_t17_l0
	.word	_x_gate_evt0
	.word	_x_t18_x
	.word	_x_gate_l0
	.word	_x_t18_evt0
	.word	_x_gate_l1
	.word	_x_t18_evt1
	.word	_x_t3_evt1
	.word	_x_t18_l0
	.word	_x_t18_l1
	.word	_x_t19_x
	.word	_x_t19_evt0
	.word	_x_t4_evt1
	.word	_x_t19_l0
	.word	_x_t20_x
	.word	_x_t20_evt0
	.word	_x_t20_evt1
	.word	_x_t5_evt1
	.word	_x_t20_l0
	.word	_x_t20_l1
	.word	_x_t6_evt1
	.word	_x_t25_l0
	.word	_x_t25_l1
	.word	_x_t25_evt0
	.word	_x_t25_evt1
	.word	_x_t25_x
	.word	t25_l0
	.word	t25_l1
	.word	t25_x
	.word	t25_evt0
	.word	t25_evt1
	.word	_x_t24_l0
	.word	_x_t24_l1
	.word	_x_t24_evt0
	.word	_x_t24_evt1
	.word	_x_t24_x
	.word	t24_l0
	.word	t24_l1
	.word	t24_x
	.word	t24_evt0
	.word	t24_evt1
	.word	_x_t23_evt0
	.word	_x_t23_evt1
	.word	_x_t23_l0
	.word	_x_t23_l1
	.word	t23_x
	.word	_x_t23_x
	.word	t23_l0
	.word	t23_l1
	.word	t23_evt0
	.word	t23_evt1
	.word	_x_t22_evt0
	.word	_x_t22_evt1
	.word	_x_t22_l0
	.word	_x_t22_l1
	.word	t22_x
	.word	_x_t22_x
	.word	t22_l0
	.word	t22_l1
	.word	t22_evt0
	.word	t22_evt1
	.word	_x_t21_evt0
	.word	_x_t21_evt1
	.word	1084227584
	.word	_x_t21_x
	.word	t21_l1
	.word	t21_l0
	.word	delta
	.word	t21_evt0
	.word	t21_evt1
	.word	_x_t21_l0
	.word	_x_t21_l1
	.word	t21_x
.L1327:
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L407
	ldr	r3, .L1326+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1326+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L407
	ldr	r3, .L1326+288
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1326+200
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1326+204
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L408
.L407:
	ldr	r3, .L1326+288
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1326+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L408
	ldr	r3, .L1326+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L408:
	ldr	r3, .L1326+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L410
	ldr	r3, .L1326+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L410
	ldr	r3, .L1326+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L410
	ldr	r3, .L1326+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L410
	ldr	r3, .L1326+204
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L411
.L410:
	ldr	r3, .L1326+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L411
	ldr	r3, .L1326+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L411
	ldr	r3, .L1326+288
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L411
	ldr	r3, .L1326+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1326+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L411:
	ldr	r3, .L1326+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L412
	ldr	r3, .L1326+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L412
	ldr	r3, .L1326+200
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L413
	mov	r3, #0
	mov	r4, r3
.L413:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L412
	ldr	r3, .L1326+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L412
	ldr	r3, .L1326+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L412
	ldr	r3, .L1326+200
	ldr	r3, [r3]	@ float
	ldr	r2, .L1326+204
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L414
.L412:
	ldr	r3, .L1326+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L414
	ldr	r3, .L1326+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L414
	ldr	r3, .L1326+288
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L414
	ldr	r3, .L1326+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1326+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L414:
	ldr	r3, .L1326+200
	ldr	r3, [r3]	@ float
	ldr	r2, .L1326+204
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L415
	ldr	r3, .L1326+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L415
	ldr	r3, .L1326+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L415
	ldr	r3, .L1326+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L415
	ldr	r3, .L1326+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L417
.L415:
	ldr	r3, .L1326+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L417
	ldr	r3, .L1326+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L417
	ldr	r3, .L1326+288
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L417
	ldr	r3, .L1326+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1326+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L417:
	ldr	r3, .L1326+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L418
	ldr	r3, .L1326+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L418
	ldr	r3, .L1326+200
	ldr	r3, [r3]	@ float
	ldr	r1, .L1326+272
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L418
	ldr	r3, .L1326+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L418
	ldr	r3, .L1326+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L418
	ldr	r3, .L1326+200
	ldr	r3, [r3]	@ float
	ldr	r2, .L1326+204
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L420
.L418:
	ldr	r3, .L1326+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L420
	ldr	r3, .L1326+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L420
	ldr	r3, .L1326+288
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L420
	ldr	r3, .L1326+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1326+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L420:
	ldr	r3, .L1326+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L421
	ldr	r3, .L1326+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L422
.L421:
	ldr	r3, .L1326+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L423
	ldr	r3, .L1326+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L422
.L423:
	ldr	r3, .L1326+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L424
	ldr	r3, .L1326+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L422
.L424:
	ldr	r3, .L1326+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1326+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L422:
	ldr	r3, .L1326+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L425
	ldr	r3, .L1326+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L426
.L425:
	ldr	r3, .L1326+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L427
	ldr	r3, .L1326+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L426
.L427:
	ldr	r3, .L1326+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L428
	ldr	r3, .L1326+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L426
.L428:
	ldr	r3, .L1326+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1326+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L426:
	ldr	r3, .L1326+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L429
	ldr	r3, .L1326+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L430
.L429:
	ldr	r3, .L1326+244
	ldr	r3, [r3]	@ float
	ldr	r1, .L1326+272
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
.L430:
	ldr	r3, .L1326+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1326+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L432
	ldr	r3, .L1326+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1326+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L432
	ldr	r3, .L1326+288
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1326+240
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1326+244
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L433
.L432:
	ldr	r3, .L1326+288
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1326+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L433
	ldr	r3, .L1326+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L433:
	ldr	r3, .L1326+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L435
	ldr	r3, .L1326+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L435
	ldr	r3, .L1326+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L435
	ldr	r3, .L1326+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L435
	ldr	r3, .L1326+244
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L436
.L435:
	ldr	r3, .L1326+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L436
	ldr	r3, .L1326+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L436
	ldr	r3, .L1326+288
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L436
	ldr	r3, .L1326+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1326+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L436:
	ldr	r3, .L1326+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L437
	ldr	r3, .L1326+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L437
	ldr	r3, .L1326+240
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L438
	mov	r3, #0
	mov	r4, r3
.L438:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L437
	ldr	r3, .L1326+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L437
	ldr	r3, .L1326+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L437
	ldr	r3, .L1326+240
	ldr	r3, [r3]	@ float
	ldr	r2, .L1326+244
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L439
.L437:
	ldr	r3, .L1326+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L439
	ldr	r3, .L1326+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L439
	ldr	r3, .L1326+288
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L439
	ldr	r3, .L1326+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1326+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L439:
	ldr	r3, .L1326+240
	ldr	r3, [r3]	@ float
	ldr	r2, .L1326+244
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L440
	ldr	r3, .L1326+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L440
	ldr	r3, .L1326+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L440
	ldr	r3, .L1326+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L440
	ldr	r3, .L1326+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L442
.L440:
	ldr	r3, .L1326+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L442
	ldr	r3, .L1326+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L442
	ldr	r3, .L1326+288
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L442
	ldr	r3, .L1326+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1326+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L442:
	ldr	r3, .L1326+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L443
	ldr	r3, .L1326+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L443
	ldr	r3, .L1326+240
	ldr	r3, [r3]	@ float
	ldr	r1, .L1326+272
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L443
	ldr	r3, .L1326+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L443
	ldr	r3, .L1326+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L443
	ldr	r3, .L1326+240
	ldr	r3, [r3]	@ float
	ldr	r2, .L1326+244
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L445
.L443:
	ldr	r3, .L1326+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L445
	ldr	r3, .L1326+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L445
	ldr	r3, .L1326+288
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L445
	ldr	r3, .L1326+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1326+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L445:
	ldr	r3, .L1326+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L446
	ldr	r3, .L1326+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L447
.L446:
	ldr	r3, .L1326+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L448
	ldr	r3, .L1326+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L447
.L448:
	ldr	r3, .L1326+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L449
	ldr	r3, .L1326+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L447
.L449:
	ldr	r3, .L1326+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1326+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L447:
	ldr	r3, .L1326+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L450
	ldr	r3, .L1326+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L451
.L450:
	ldr	r3, .L1326+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L452
	ldr	r3, .L1326+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L451
.L452:
	ldr	r3, .L1326+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L453
	ldr	r3, .L1326+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L451
.L453:
	ldr	r3, .L1326+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1326+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L451:
	ldr	r3, .L1326+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L454
	ldr	r3, .L1326+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L455
.L454:
	ldr	r3, .L1326+276
	ldr	r3, [r3]	@ float
	ldr	r1, .L1326+272
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
.L455:
	ldr	r3, .L1326+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1326+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L457
	ldr	r3, .L1326+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1326+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L457
	ldr	r3, .L1326+288
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1326+308
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1326+276
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L458
.L457:
	ldr	r3, .L1326+288
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1326+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L458
	ldr	r3, .L1326+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L458:
	ldr	r3, .L1326+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L460
	ldr	r3, .L1326+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L460
	ldr	r3, .L1326+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L460
	ldr	r3, .L1326+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L460
	ldr	r3, .L1326+276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L461
.L460:
	ldr	r3, .L1326+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L461
	ldr	r3, .L1326+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L461
	ldr	r3, .L1326+288
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L461
	ldr	r3, .L1326+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1326+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L461:
	ldr	r3, .L1326+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L462
	ldr	r3, .L1326+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L462
	ldr	r3, .L1326+308
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L463
	mov	r3, #0
	mov	r4, r3
.L463:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L462
	ldr	r3, .L1326+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L462
	ldr	r3, .L1326+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L462
	ldr	r3, .L1326+308
	ldr	r3, [r3]	@ float
	ldr	r2, .L1326+276
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L464
.L462:
	ldr	r3, .L1326+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L464
	ldr	r3, .L1326+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L464
	ldr	r3, .L1326+288
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L464
	ldr	r3, .L1326+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1326+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L464:
	ldr	r3, .L1326+308
	ldr	r3, [r3]	@ float
	ldr	r2, .L1326+276
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L465
	ldr	r3, .L1326+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L465
	ldr	r3, .L1326+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L465
	ldr	r3, .L1326+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L465
	ldr	r3, .L1326+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L467
.L465:
	ldr	r3, .L1326+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L467
	ldr	r3, .L1326+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L467
	ldr	r3, .L1326+288
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L467
	ldr	r3, .L1326+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1326+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L467:
	ldr	r3, .L1326+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L468
	ldr	r3, .L1326+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L468
	ldr	r3, .L1326+308
	ldr	r3, [r3]	@ float
	ldr	r1, .L1329
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L468
	ldr	r3, .L1329+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L468
	ldr	r3, .L1329+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L468
	ldr	r3, .L1329+12
	ldr	r3, [r3]	@ float
	ldr	r2, .L1329+16
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L470
.L468:
	ldr	r3, .L1329+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L470
	ldr	r3, .L1329+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L470
	ldr	r3, .L1329+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L470
	ldr	r3, .L1329+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1329+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L470:
	ldr	r3, .L1329+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L471
	ldr	r3, .L1329+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L472
.L471:
	ldr	r3, .L1329+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L473
	ldr	r3, .L1329+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L472
.L473:
	ldr	r3, .L1329+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L474
	ldr	r3, .L1329+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L472
.L474:
	ldr	r3, .L1329+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1329+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L472:
	ldr	r3, .L1329+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L475
	ldr	r3, .L1329+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L476
.L475:
	ldr	r3, .L1329+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L477
	ldr	r3, .L1329+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L476
.L477:
	ldr	r3, .L1329+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L478
	ldr	r3, .L1329+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L476
.L478:
	ldr	r3, .L1329+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1329+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L476:
	ldr	r3, .L1329+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L479
	ldr	r3, .L1329+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L480
.L479:
	ldr	r3, .L1329+48
	ldr	r3, [r3]	@ float
	ldr	r1, .L1329
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
.L480:
	ldr	r3, .L1329+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1329+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L482
	ldr	r3, .L1329+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1329+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L482
	ldr	r3, .L1329+28
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1329+60
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1329+48
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L483
.L482:
	ldr	r3, .L1329+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1329+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L483
	ldr	r3, .L1329+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L483:
	ldr	r3, .L1329+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L485
	ldr	r3, .L1329+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L485
	ldr	r3, .L1329+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L485
	ldr	r3, .L1329+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L485
	ldr	r3, .L1329+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L486
.L485:
	ldr	r3, .L1329+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L486
	ldr	r3, .L1329+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L486
	ldr	r3, .L1329+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L486
	ldr	r3, .L1329+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1329+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L486:
	ldr	r3, .L1329+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L487
	ldr	r3, .L1329+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L487
	ldr	r3, .L1329+60
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L488
	mov	r3, #0
	mov	r4, r3
.L488:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L487
	ldr	r3, .L1329+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L487
	ldr	r3, .L1329+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L487
	ldr	r3, .L1329+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L1329+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L489
.L487:
	ldr	r3, .L1329+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L489
	ldr	r3, .L1329+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L489
	ldr	r3, .L1329+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L489
	ldr	r3, .L1329+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1329+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L489:
	ldr	r3, .L1329+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L1329+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L490
	ldr	r3, .L1329+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L490
	ldr	r3, .L1329+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L490
	ldr	r3, .L1329+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L490
	ldr	r3, .L1329+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L492
.L490:
	ldr	r3, .L1329+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L492
	ldr	r3, .L1329+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L492
	ldr	r3, .L1329+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L492
	ldr	r3, .L1329+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1329+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L492:
	ldr	r3, .L1329+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L493
	ldr	r3, .L1329+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L493
	ldr	r3, .L1329+60
	ldr	r3, [r3]	@ float
	ldr	r1, .L1329
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L493
	ldr	r3, .L1329+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L493
	ldr	r3, .L1329+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L493
	ldr	r3, .L1329+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L1329+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L495
.L493:
	ldr	r3, .L1329+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L495
	ldr	r3, .L1329+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L495
	ldr	r3, .L1329+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L495
	ldr	r3, .L1329+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1329+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L495:
	ldr	r3, .L1329+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L496
	ldr	r3, .L1329+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L497
.L496:
	ldr	r3, .L1329+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L498
	ldr	r3, .L1329+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L497
.L498:
	ldr	r3, .L1329+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L499
	ldr	r3, .L1329+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L497
.L499:
	ldr	r3, .L1329+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1329+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L497:
	ldr	r3, .L1329+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L500
	ldr	r3, .L1329+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L501
.L500:
	ldr	r3, .L1329+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L502
	ldr	r3, .L1329+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L501
.L502:
	ldr	r3, .L1329+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L503
	ldr	r3, .L1329+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L501
.L503:
	ldr	r3, .L1329+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1329+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L501:
	ldr	r3, .L1329+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L504
	ldr	r3, .L1329+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L505
.L504:
	ldr	r3, .L1329+88
	ldr	r3, [r3]	@ float
	ldr	r1, .L1329
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
.L505:
	ldr	r3, .L1329+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1329+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L507
	ldr	r3, .L1329+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1329+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L507
	ldr	r3, .L1329+28
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1329+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1329+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L508
.L507:
	ldr	r3, .L1329+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1329+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L508
	ldr	r3, .L1329+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L508:
	ldr	r3, .L1329+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L510
	ldr	r3, .L1329+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L510
	ldr	r3, .L1329+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L510
	ldr	r3, .L1329+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L510
	ldr	r3, .L1329+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L511
.L510:
	ldr	r3, .L1329+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L511
	ldr	r3, .L1329+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L511
	ldr	r3, .L1329+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L511
	ldr	r3, .L1329+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1329+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L511:
	ldr	r3, .L1329+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L512
	ldr	r3, .L1329+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L512
	ldr	r3, .L1329+100
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L513
	mov	r3, #0
	mov	r4, r3
.L513:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L512
	ldr	r3, .L1329+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L512
	ldr	r3, .L1329+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L512
	ldr	r3, .L1329+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L1329+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L514
.L512:
	ldr	r3, .L1329+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L514
	ldr	r3, .L1329+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L514
	ldr	r3, .L1329+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L514
	ldr	r3, .L1329+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1329+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L514:
	ldr	r3, .L1329+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L1329+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L515
	ldr	r3, .L1329+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L515
	ldr	r3, .L1329+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L515
	ldr	r3, .L1329+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L515
	ldr	r3, .L1329+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L517
.L515:
	ldr	r3, .L1329+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L517
	ldr	r3, .L1329+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L517
	ldr	r3, .L1329+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L517
	ldr	r3, .L1329+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1329+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L517:
	ldr	r3, .L1329+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L518
	ldr	r3, .L1329+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L518
	ldr	r3, .L1329+100
	ldr	r3, [r3]	@ float
	ldr	r1, .L1329
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L518
	ldr	r3, .L1329+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L518
	ldr	r3, .L1329+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L518
	ldr	r3, .L1329+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L1329+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L520
.L518:
	ldr	r3, .L1329+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L520
	ldr	r3, .L1329+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L520
	ldr	r3, .L1329+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L520
	ldr	r3, .L1329+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1329+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L520:
	ldr	r3, .L1329+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L521
	ldr	r3, .L1329+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L522
.L521:
	ldr	r3, .L1329+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L523
	ldr	r3, .L1329+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L522
.L523:
	ldr	r3, .L1329+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L524
	ldr	r3, .L1329+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L522
.L524:
	ldr	r3, .L1329+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1329+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L522:
	ldr	r3, .L1329+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L525
	ldr	r3, .L1329+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L526
.L525:
	ldr	r3, .L1329+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L527
	ldr	r3, .L1329+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L526
.L527:
	ldr	r3, .L1329+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L528
	ldr	r3, .L1329+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L526
.L528:
	ldr	r3, .L1329+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1329+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L526:
	ldr	r3, .L1329+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L529
	ldr	r3, .L1329+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L530
.L529:
	ldr	r3, .L1329+132
	ldr	r3, [r3]	@ float
	ldr	r1, .L1329
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
.L530:
	ldr	r3, .L1329+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1329+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L532
	ldr	r3, .L1329+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1329+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L532
	ldr	r3, .L1329+28
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1329+128
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1329+132
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L533
.L532:
	ldr	r3, .L1329+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1329+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L533
	ldr	r3, .L1329+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L533:
	ldr	r3, .L1329+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L535
	ldr	r3, .L1329+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L535
	ldr	r3, .L1329+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L535
	ldr	r3, .L1329+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L535
	ldr	r3, .L1329+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L536
.L535:
	ldr	r3, .L1329+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L536
	ldr	r3, .L1329+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L536
	ldr	r3, .L1329+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	b	.L1330
.L1331:
	.align	2
.L1329:
	.word	1084227584
	.word	t21_evt1
	.word	t21_evt0
	.word	t21_x
	.word	_x_t21_x
	.word	t21_l0
	.word	t21_l1
	.word	delta
	.word	_x_t20_l0
	.word	_x_t20_l1
	.word	_x_t20_evt0
	.word	_x_t20_evt1
	.word	_x_t20_x
	.word	t20_l0
	.word	t20_l1
	.word	t20_x
	.word	t20_evt0
	.word	t20_evt1
	.word	_x_t19_l0
	.word	_x_t19_l1
	.word	_x_t19_evt0
	.word	_x_t19_evt1
	.word	_x_t19_x
	.word	t19_l0
	.word	t19_l1
	.word	t19_x
	.word	t19_evt0
	.word	t19_evt1
	.word	_x_t18_evt0
	.word	_x_t18_evt1
	.word	_x_t18_l0
	.word	_x_t18_l1
	.word	t18_x
	.word	_x_t18_x
	.word	t18_l0
	.word	t18_l1
	.word	t18_evt0
	.word	t18_evt1
	.word	_x_t17_evt0
	.word	_x_t17_evt1
	.word	_x_t17_l0
	.word	_x_t17_l1
	.word	t17_x
	.word	_x_t17_x
	.word	t17_l0
	.word	t17_l1
	.word	t17_evt0
	.word	t17_evt1
	.word	_x_t16_evt0
	.word	_x_t16_evt1
	.word	_x_t16_l0
	.word	_x_t16_l1
	.word	1084227584
	.word	t16_x
	.word	_x_t16_x
	.word	t16_l0
	.word	t16_l1
	.word	delta
	.word	t16_evt0
	.word	t16_evt1
	.word	_x_t15_l0
	.word	_x_t15_l1
	.word	_x_t15_evt0
	.word	_x_t15_evt1
.L1330:
	mov	r3, r0
	cmp	r3, #0
	beq	.L536
	ldr	r3, .L1329+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1329+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L536:
	ldr	r3, .L1329+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L537
	ldr	r3, .L1329+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L537
	ldr	r3, .L1329+128
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L538
	mov	r3, #0
	mov	r4, r3
.L538:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L537
	ldr	r3, .L1329+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L537
	ldr	r3, .L1329+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L537
	ldr	r3, .L1329+128
	ldr	r3, [r3]	@ float
	ldr	r2, .L1329+132
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L539
.L537:
	ldr	r3, .L1329+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L539
	ldr	r3, .L1329+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L539
	ldr	r3, .L1329+228
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L539
	ldr	r3, .L1329+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1329+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L539:
	ldr	r3, .L1329+128
	ldr	r3, [r3]	@ float
	ldr	r2, .L1329+132
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L540
	ldr	r3, .L1329+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L540
	ldr	r3, .L1329+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L540
	ldr	r3, .L1329+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L540
	ldr	r3, .L1329+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L542
.L540:
	ldr	r3, .L1329+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L542
	ldr	r3, .L1329+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L542
	ldr	r3, .L1329+228
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L542
	ldr	r3, .L1329+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1329+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L542:
	ldr	r3, .L1329+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L543
	ldr	r3, .L1329+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L543
	ldr	r3, .L1329+128
	ldr	r3, [r3]	@ float
	ldr	r1, .L1329+208
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L543
	ldr	r3, .L1329+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L543
	ldr	r3, .L1329+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L543
	ldr	r3, .L1329+128
	ldr	r3, [r3]	@ float
	ldr	r2, .L1329+132
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L545
.L543:
	ldr	r3, .L1329+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L545
	ldr	r3, .L1329+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L545
	ldr	r3, .L1329+228
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L545
	ldr	r3, .L1329+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1329+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L545:
	ldr	r3, .L1329+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L546
	ldr	r3, .L1329+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L547
.L546:
	ldr	r3, .L1329+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L548
	ldr	r3, .L1329+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L547
.L548:
	ldr	r3, .L1329+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L549
	ldr	r3, .L1329+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L547
.L549:
	ldr	r3, .L1329+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1329+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L547:
	ldr	r3, .L1329+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L550
	ldr	r3, .L1329+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L551
.L550:
	ldr	r3, .L1329+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L552
	ldr	r3, .L1329+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L551
.L552:
	ldr	r3, .L1329+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L553
	ldr	r3, .L1329+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L551
.L553:
	ldr	r3, .L1329+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1329+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L551:
	ldr	r3, .L1329+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L554
	ldr	r3, .L1329+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L555
.L554:
	ldr	r3, .L1329+172
	ldr	r3, [r3]	@ float
	ldr	r1, .L1329+208
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
.L555:
	ldr	r3, .L1329+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1329+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L557
	ldr	r3, .L1329+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1329+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L557
	ldr	r3, .L1329+228
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1329+168
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1329+172
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L558
.L557:
	ldr	r3, .L1329+228
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1329+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L558
	ldr	r3, .L1329+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L558:
	ldr	r3, .L1329+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L560
	ldr	r3, .L1329+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L560
	ldr	r3, .L1329+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L560
	ldr	r3, .L1329+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L560
	ldr	r3, .L1329+172
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L561
.L560:
	ldr	r3, .L1329+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L561
	ldr	r3, .L1329+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L561
	ldr	r3, .L1329+228
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L561
	ldr	r3, .L1329+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1329+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L561:
	ldr	r3, .L1329+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L562
	ldr	r3, .L1329+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L562
	ldr	r3, .L1329+168
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L563
	mov	r3, #0
	mov	r4, r3
.L563:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L562
	ldr	r3, .L1329+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L562
	ldr	r3, .L1329+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L562
	ldr	r3, .L1329+168
	ldr	r3, [r3]	@ float
	ldr	r2, .L1329+172
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L564
.L562:
	ldr	r3, .L1329+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L564
	ldr	r3, .L1329+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L564
	ldr	r3, .L1329+228
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L564
	ldr	r3, .L1329+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1329+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L564:
	ldr	r3, .L1329+168
	ldr	r3, [r3]	@ float
	ldr	r2, .L1329+172
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L565
	ldr	r3, .L1329+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L565
	ldr	r3, .L1329+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L565
	ldr	r3, .L1329+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L565
	ldr	r3, .L1329+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L567
.L565:
	ldr	r3, .L1329+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L567
	ldr	r3, .L1329+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L567
	ldr	r3, .L1329+228
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L567
	ldr	r3, .L1329+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1329+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L567:
	ldr	r3, .L1329+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L568
	ldr	r3, .L1329+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L568
	ldr	r3, .L1329+168
	ldr	r3, [r3]	@ float
	ldr	r1, .L1329+208
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L568
	ldr	r3, .L1329+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L568
	ldr	r3, .L1329+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L568
	ldr	r3, .L1329+168
	ldr	r3, [r3]	@ float
	ldr	r2, .L1329+172
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L570
.L568:
	ldr	r3, .L1329+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L570
	ldr	r3, .L1329+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L570
	ldr	r3, .L1329+228
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L570
	ldr	r3, .L1329+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1329+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L570:
	ldr	r3, .L1329+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L571
	ldr	r3, .L1329+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L572
.L571:
	ldr	r3, .L1329+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L573
	ldr	r3, .L1329+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L572
.L573:
	ldr	r3, .L1329+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L574
	ldr	r3, .L1329+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L572
.L574:
	ldr	r3, .L1329+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1329+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L572:
	ldr	r3, .L1329+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L575
	ldr	r3, .L1329+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L576
.L575:
	ldr	r3, .L1329+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L577
	ldr	r3, .L1329+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L576
.L577:
	ldr	r3, .L1329+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L578
	ldr	r3, .L1329+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L576
.L578:
	ldr	r3, .L1329+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1329+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L576:
	ldr	r3, .L1329+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L579
	ldr	r3, .L1329+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L580
.L579:
	ldr	r3, .L1329+216
	ldr	r3, [r3]	@ float
	ldr	r1, .L1329+208
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
.L580:
	ldr	r3, .L1329+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1329+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L582
	ldr	r3, .L1329+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1329+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L582
	ldr	r3, .L1329+228
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1329+212
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1329+216
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L583
.L582:
	ldr	r3, .L1329+228
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1329+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L583
	ldr	r3, .L1329+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L583:
	ldr	r3, .L1329+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L585
	ldr	r3, .L1329+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L585
	ldr	r3, .L1329+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L585
	ldr	r3, .L1329+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L585
	ldr	r3, .L1329+216
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L586
.L585:
	ldr	r3, .L1329+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L586
	ldr	r3, .L1329+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L586
	ldr	r3, .L1329+228
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L586
	ldr	r3, .L1329+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1329+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L586:
	ldr	r3, .L1329+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L587
	ldr	r3, .L1329+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L587
	ldr	r3, .L1329+212
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L588
	mov	r3, #0
	mov	r4, r3
.L588:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L587
	ldr	r3, .L1329+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L587
	ldr	r3, .L1329+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L587
	ldr	r3, .L1329+212
	ldr	r3, [r3]	@ float
	ldr	r2, .L1329+216
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L589
.L587:
	ldr	r3, .L1329+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L589
	ldr	r3, .L1329+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L589
	ldr	r3, .L1329+228
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L589
	ldr	r3, .L1329+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1329+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L589:
	ldr	r3, .L1329+212
	ldr	r3, [r3]	@ float
	ldr	r2, .L1329+216
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L590
	ldr	r3, .L1329+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L590
	ldr	r3, .L1329+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L590
	ldr	r3, .L1329+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L590
	ldr	r3, .L1329+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L592
.L590:
	ldr	r3, .L1329+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L592
	ldr	r3, .L1329+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L592
	ldr	r3, .L1329+228
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L592
	ldr	r3, .L1329+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1329+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L592:
	ldr	r3, .L1329+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L593
	ldr	r3, .L1329+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L593
	ldr	r3, .L1329+212
	ldr	r3, [r3]	@ float
	ldr	r1, .L1329+208
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L593
	ldr	r3, .L1329+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L593
	ldr	r3, .L1329+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L593
	ldr	r3, .L1329+212
	ldr	r3, [r3]	@ float
	ldr	r2, .L1329+216
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L595
.L593:
	ldr	r3, .L1329+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L595
	ldr	r3, .L1329+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L595
	ldr	r3, .L1329+228
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L595
	ldr	r3, .L1329+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1329+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L595:
	ldr	r3, .L1329+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L596
	ldr	r3, .L1329+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L597
.L596:
	ldr	r3, .L1329+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L598
	ldr	r3, .L1329+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L597
.L598:
	ldr	r3, .L1329+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L599
	ldr	r3, .L1329+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L597
.L599:
	ldr	r3, .L1329+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1329+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L597:
	ldr	r3, .L1329+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L600
	ldr	r3, .L1329+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L601
.L600:
	ldr	r3, .L1329+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L602
	ldr	r3, .L1329+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L601
.L602:
	ldr	r3, .L1329+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L603
	ldr	r3, .L1329+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L601
.L603:
	ldr	r3, .L1329+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1329+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L601:
	ldr	r3, .L1332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L604
	ldr	r3, .L1332+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L605
.L604:
	ldr	r3, .L1332+8
	ldr	r3, [r3]	@ float
	ldr	r1, .L1332+12
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
.L605:
	ldr	r3, .L1332+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L607
	ldr	r3, .L1332+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1332+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L607
	ldr	r3, .L1332+164
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1332+24
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1332+8
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L608
.L607:
	ldr	r3, .L1332+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1332+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L608
	ldr	r3, .L1332+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L608:
	ldr	r3, .L1332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L610
	ldr	r3, .L1332+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L610
	ldr	r3, .L1332+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L610
	ldr	r3, .L1332+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L610
	ldr	r3, .L1332+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L611
.L610:
	ldr	r3, .L1332+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L611
	ldr	r3, .L1332+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L611
	ldr	r3, .L1332+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L611
	ldr	r3, .L1332+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1332+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L611:
	ldr	r3, .L1332+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L612
	ldr	r3, .L1332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L612
	ldr	r3, .L1332+24
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L613
	mov	r3, #0
	mov	r4, r3
.L613:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L612
	ldr	r3, .L1332+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L612
	ldr	r3, .L1332+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L612
	ldr	r3, .L1332+24
	ldr	r3, [r3]	@ float
	ldr	r2, .L1332+8
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L614
.L612:
	ldr	r3, .L1332+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L614
	ldr	r3, .L1332+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L614
	ldr	r3, .L1332+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L614
	ldr	r3, .L1332+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1332+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L614:
	ldr	r3, .L1332+24
	ldr	r3, [r3]	@ float
	ldr	r2, .L1332+8
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L615
	ldr	r3, .L1332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L615
	ldr	r3, .L1332+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L615
	ldr	r3, .L1332+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L615
	ldr	r3, .L1332+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L617
.L615:
	ldr	r3, .L1332+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L617
	ldr	r3, .L1332+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L617
	ldr	r3, .L1332+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L617
	ldr	r3, .L1332+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1332+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L617:
	ldr	r3, .L1332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L618
	ldr	r3, .L1332+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L618
	ldr	r3, .L1332+24
	ldr	r3, [r3]	@ float
	ldr	r1, .L1332+12
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L618
	ldr	r3, .L1332+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L618
	ldr	r3, .L1332+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L618
	ldr	r3, .L1332+24
	ldr	r3, [r3]	@ float
	ldr	r2, .L1332+8
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L620
.L618:
	ldr	r3, .L1332+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L620
	ldr	r3, .L1332+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L620
	ldr	r3, .L1332+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L620
	ldr	r3, .L1332+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1332+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L620:
	ldr	r3, .L1332+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L621
	ldr	r3, .L1332+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L622
.L621:
	ldr	r3, .L1332+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L623
	ldr	r3, .L1332+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L622
.L623:
	ldr	r3, .L1332+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L624
	ldr	r3, .L1332+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L622
.L624:
	ldr	r3, .L1332+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1332+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L622:
	ldr	r3, .L1332+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L625
	ldr	r3, .L1332+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L626
.L625:
	ldr	r3, .L1332+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L627
	ldr	r3, .L1332+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L626
.L627:
	ldr	r3, .L1332+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L628
	ldr	r3, .L1332+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L626
.L628:
	ldr	r3, .L1332+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1332+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L626:
	ldr	r3, .L1332+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L629
	ldr	r3, .L1332+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L630
.L629:
	ldr	r3, .L1332+52
	ldr	r3, [r3]	@ float
	ldr	r1, .L1332+12
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
.L630:
	ldr	r3, .L1332+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1332+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L632
	ldr	r3, .L1332+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1332+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L632
	ldr	r3, .L1332+164
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1332+64
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1332+52
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L633
.L632:
	ldr	r3, .L1332+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1332+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L633
	ldr	r3, .L1332+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L633:
	ldr	r3, .L1332+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L635
	ldr	r3, .L1332+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L635
	ldr	r3, .L1332+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L635
	ldr	r3, .L1332+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L635
	ldr	r3, .L1332+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L636
.L635:
	ldr	r3, .L1332+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L636
	ldr	r3, .L1332+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L636
	ldr	r3, .L1332+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L636
	ldr	r3, .L1332+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1332+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L636:
	ldr	r3, .L1332+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L637
	ldr	r3, .L1332+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L637
	ldr	r3, .L1332+64
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L638
	mov	r3, #0
	mov	r4, r3
.L638:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L637
	ldr	r3, .L1332+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L637
	ldr	r3, .L1332+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L637
	ldr	r3, .L1332+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L1332+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L639
.L637:
	ldr	r3, .L1332+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L639
	ldr	r3, .L1332+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L639
	ldr	r3, .L1332+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L639
	ldr	r3, .L1332+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1332+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L639:
	ldr	r3, .L1332+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L1332+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L640
	ldr	r3, .L1332+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L640
	ldr	r3, .L1332+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L640
	ldr	r3, .L1332+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L640
	ldr	r3, .L1332+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L642
.L640:
	ldr	r3, .L1332+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L642
	ldr	r3, .L1332+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L642
	ldr	r3, .L1332+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L642
	ldr	r3, .L1332+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1332+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L642:
	ldr	r3, .L1332+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L643
	ldr	r3, .L1332+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L643
	ldr	r3, .L1332+64
	ldr	r3, [r3]	@ float
	ldr	r1, .L1332+12
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L643
	ldr	r3, .L1332+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L643
	ldr	r3, .L1332+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L643
	ldr	r3, .L1332+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L1332+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L645
.L643:
	ldr	r3, .L1332+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L645
	ldr	r3, .L1332+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L645
	ldr	r3, .L1332+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L645
	ldr	r3, .L1332+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1332+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L645:
	ldr	r3, .L1332+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L646
	ldr	r3, .L1332+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L647
.L646:
	ldr	r3, .L1332+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L648
	ldr	r3, .L1332+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L647
.L648:
	ldr	r3, .L1332+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L649
	ldr	r3, .L1332+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L647
.L649:
	ldr	r3, .L1332+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1332+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L647:
	ldr	r3, .L1332+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L650
	ldr	r3, .L1332+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L651
.L650:
	ldr	r3, .L1332+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L652
	ldr	r3, .L1332+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L651
.L652:
	ldr	r3, .L1332+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L653
	ldr	r3, .L1332+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L651
.L653:
	ldr	r3, .L1332+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1332+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L651:
	ldr	r3, .L1332+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L654
	ldr	r3, .L1332+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L655
.L654:
	ldr	r3, .L1332+96
	ldr	r3, [r3]	@ float
	ldr	r1, .L1332+12
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
.L655:
	ldr	r3, .L1332+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1332+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L657
	ldr	r3, .L1332+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1332+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L657
	ldr	r3, .L1332+164
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1332+92
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1332+96
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L658
.L657:
	ldr	r3, .L1332+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1332+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L658
	ldr	r3, .L1332+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L658:
	ldr	r3, .L1332+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L660
	ldr	r3, .L1332+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L660
	ldr	r3, .L1332+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L660
	ldr	r3, .L1332+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L660
	ldr	r3, .L1332+96
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L661
.L660:
	ldr	r3, .L1332+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L661
	ldr	r3, .L1332+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L661
	ldr	r3, .L1332+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L661
	ldr	r3, .L1332+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1332+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L661:
	ldr	r3, .L1332+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L662
	ldr	r3, .L1332+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L662
	ldr	r3, .L1332+92
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L663
	mov	r3, #0
	mov	r4, r3
.L663:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L662
	ldr	r3, .L1332+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L662
	ldr	r3, .L1332+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L662
	ldr	r3, .L1332+92
	ldr	r3, [r3]	@ float
	ldr	r2, .L1332+96
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L664
.L662:
	ldr	r3, .L1332+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L664
	ldr	r3, .L1332+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L664
	ldr	r3, .L1332+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L664
	ldr	r3, .L1332+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1332+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L664:
	ldr	r3, .L1332+92
	ldr	r3, [r3]	@ float
	ldr	r2, .L1332+96
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L665
	ldr	r3, .L1332+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L665
	ldr	r3, .L1332+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L665
	ldr	r3, .L1332+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L665
	ldr	r3, .L1332+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L667
.L665:
	ldr	r3, .L1332+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L667
	ldr	r3, .L1332+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L667
	b	.L1333
.L1334:
	.align	2
.L1332:
	.word	_x_t15_l0
	.word	_x_t15_l1
	.word	_x_t15_x
	.word	1084227584
	.word	t15_l0
	.word	t15_l1
	.word	t15_x
	.word	t15_evt0
	.word	t15_evt1
	.word	_x_t14_l0
	.word	_x_t14_l1
	.word	_x_t14_evt0
	.word	_x_t14_evt1
	.word	_x_t14_x
	.word	t14_l0
	.word	t14_l1
	.word	t14_x
	.word	t14_evt0
	.word	t14_evt1
	.word	_x_t13_evt0
	.word	_x_t13_evt1
	.word	_x_t13_l0
	.word	_x_t13_l1
	.word	t13_x
	.word	_x_t13_x
	.word	t13_l0
	.word	t13_l1
	.word	t13_evt0
	.word	t13_evt1
	.word	_x_t12_evt0
	.word	_x_t12_evt1
	.word	_x_t12_l0
	.word	_x_t12_l1
	.word	t12_x
	.word	_x_t12_x
	.word	t12_l0
	.word	t12_l1
	.word	t12_evt0
	.word	t12_evt1
	.word	_x_t11_evt0
	.word	_x_t11_evt1
	.word	delta
	.word	_x_t11_l0
	.word	_x_t11_l1
	.word	t11_x
	.word	_x_t11_x
	.word	t11_l0
	.word	t11_l1
	.word	t11_evt0
	.word	t11_evt1
	.word	_x_t10_evt0
	.word	_x_t10_evt1
	.word	1084227584
	.word	t10_l0
	.word	t10_l1
	.word	t10_x
	.word	_x_t10_x
	.word	delta
	.word	t10_evt1
	.word	_x_t10_l0
	.word	_x_t10_l1
	.word	t10_evt0
.L1333:
	ldr	r3, .L1332+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L667
	ldr	r3, .L1332+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1332+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L667:
	ldr	r3, .L1332+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L668
	ldr	r3, .L1332+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L668
	ldr	r3, .L1332+92
	ldr	r3, [r3]	@ float
	ldr	r1, .L1332+208
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L668
	ldr	r3, .L1332+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L668
	ldr	r3, .L1332+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L668
	ldr	r3, .L1332+92
	ldr	r3, [r3]	@ float
	ldr	r2, .L1332+96
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L670
.L668:
	ldr	r3, .L1332+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L670
	ldr	r3, .L1332+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L670
	ldr	r3, .L1332+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L670
	ldr	r3, .L1332+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1332+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L670:
	ldr	r3, .L1332+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L671
	ldr	r3, .L1332+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L672
.L671:
	ldr	r3, .L1332+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L673
	ldr	r3, .L1332+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L672
.L673:
	ldr	r3, .L1332+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L674
	ldr	r3, .L1332+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L672
.L674:
	ldr	r3, .L1332+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1332+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L672:
	ldr	r3, .L1332+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L675
	ldr	r3, .L1332+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L676
.L675:
	ldr	r3, .L1332+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L677
	ldr	r3, .L1332+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L676
.L677:
	ldr	r3, .L1332+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L678
	ldr	r3, .L1332+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L676
.L678:
	ldr	r3, .L1332+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1332+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L676:
	ldr	r3, .L1332+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L679
	ldr	r3, .L1332+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L680
.L679:
	ldr	r3, .L1332+136
	ldr	r3, [r3]	@ float
	ldr	r1, .L1332+208
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
.L680:
	ldr	r3, .L1332+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1332+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L682
	ldr	r3, .L1332+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1332+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L682
	ldr	r3, .L1332+164
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1332+132
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1332+136
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L683
.L682:
	ldr	r3, .L1332+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1332+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L683
	ldr	r3, .L1332+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L683:
	ldr	r3, .L1332+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L685
	ldr	r3, .L1332+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L685
	ldr	r3, .L1332+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L685
	ldr	r3, .L1332+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L685
	ldr	r3, .L1332+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L686
.L685:
	ldr	r3, .L1332+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L686
	ldr	r3, .L1332+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L686
	ldr	r3, .L1332+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L686
	ldr	r3, .L1332+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1332+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L686:
	ldr	r3, .L1332+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L687
	ldr	r3, .L1332+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L687
	ldr	r3, .L1332+132
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L688
	mov	r3, #0
	mov	r4, r3
.L688:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L687
	ldr	r3, .L1332+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L687
	ldr	r3, .L1332+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L687
	ldr	r3, .L1332+132
	ldr	r3, [r3]	@ float
	ldr	r2, .L1332+136
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L689
.L687:
	ldr	r3, .L1332+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L689
	ldr	r3, .L1332+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L689
	ldr	r3, .L1332+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L689
	ldr	r3, .L1332+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1332+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L689:
	ldr	r3, .L1332+132
	ldr	r3, [r3]	@ float
	ldr	r2, .L1332+136
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L690
	ldr	r3, .L1332+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L690
	ldr	r3, .L1332+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L690
	ldr	r3, .L1332+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L690
	ldr	r3, .L1332+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L692
.L690:
	ldr	r3, .L1332+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L692
	ldr	r3, .L1332+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L692
	ldr	r3, .L1332+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L692
	ldr	r3, .L1332+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1332+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L692:
	ldr	r3, .L1332+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L693
	ldr	r3, .L1332+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L693
	ldr	r3, .L1332+132
	ldr	r3, [r3]	@ float
	ldr	r1, .L1332+208
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L693
	ldr	r3, .L1332+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L693
	ldr	r3, .L1332+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L693
	ldr	r3, .L1332+132
	ldr	r3, [r3]	@ float
	ldr	r2, .L1332+136
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L695
.L693:
	ldr	r3, .L1332+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L695
	ldr	r3, .L1332+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L695
	ldr	r3, .L1332+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L695
	ldr	r3, .L1332+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1332+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L695:
	ldr	r3, .L1332+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L696
	ldr	r3, .L1332+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L697
.L696:
	ldr	r3, .L1332+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L698
	ldr	r3, .L1332+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L697
.L698:
	ldr	r3, .L1332+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L699
	ldr	r3, .L1332+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L697
.L699:
	ldr	r3, .L1332+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1332+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L697:
	ldr	r3, .L1332+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L700
	ldr	r3, .L1332+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L701
.L700:
	ldr	r3, .L1332+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L702
	ldr	r3, .L1332+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L701
.L702:
	ldr	r3, .L1332+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L703
	ldr	r3, .L1332+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L701
.L703:
	ldr	r3, .L1332+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1332+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L701:
	ldr	r3, .L1332+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L704
	ldr	r3, .L1332+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L705
.L704:
	ldr	r3, .L1332+180
	ldr	r3, [r3]	@ float
	ldr	r1, .L1332+208
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
.L705:
	ldr	r3, .L1332+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1332+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L707
	ldr	r3, .L1332+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1332+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L707
	ldr	r3, .L1332+164
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1332+176
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1332+180
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L708
.L707:
	ldr	r3, .L1332+228
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1332+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L708
	ldr	r3, .L1332+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L708:
	ldr	r3, .L1332+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L710
	ldr	r3, .L1332+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L710
	ldr	r3, .L1332+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L710
	ldr	r3, .L1332+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L710
	ldr	r3, .L1332+180
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L711
.L710:
	ldr	r3, .L1332+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L711
	ldr	r3, .L1332+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L711
	ldr	r3, .L1332+228
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L711
	ldr	r3, .L1332+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1332+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L711:
	ldr	r3, .L1332+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L712
	ldr	r3, .L1332+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L712
	ldr	r3, .L1332+176
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L713
	mov	r3, #0
	mov	r4, r3
.L713:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L712
	ldr	r3, .L1332+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L712
	ldr	r3, .L1332+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L712
	ldr	r3, .L1332+176
	ldr	r3, [r3]	@ float
	ldr	r2, .L1332+180
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L714
.L712:
	ldr	r3, .L1332+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L714
	ldr	r3, .L1332+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L714
	ldr	r3, .L1332+228
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L714
	ldr	r3, .L1332+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1332+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L714:
	ldr	r3, .L1332+176
	ldr	r3, [r3]	@ float
	ldr	r2, .L1332+180
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L715
	ldr	r3, .L1332+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L715
	ldr	r3, .L1332+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L715
	ldr	r3, .L1332+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L715
	ldr	r3, .L1332+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L717
.L715:
	ldr	r3, .L1332+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L717
	ldr	r3, .L1332+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L717
	ldr	r3, .L1332+228
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L717
	ldr	r3, .L1332+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1332+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L717:
	ldr	r3, .L1332+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L718
	ldr	r3, .L1332+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L718
	ldr	r3, .L1332+176
	ldr	r3, [r3]	@ float
	ldr	r1, .L1332+208
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L718
	ldr	r3, .L1332+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L718
	ldr	r3, .L1332+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L718
	ldr	r3, .L1332+176
	ldr	r3, [r3]	@ float
	ldr	r2, .L1332+180
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L720
.L718:
	ldr	r3, .L1332+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L720
	ldr	r3, .L1332+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L720
	ldr	r3, .L1332+228
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L720
	ldr	r3, .L1332+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1332+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L720:
	ldr	r3, .L1332+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L721
	ldr	r3, .L1332+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L722
.L721:
	ldr	r3, .L1332+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L723
	ldr	r3, .L1332+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L722
.L723:
	ldr	r3, .L1332+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L724
	ldr	r3, .L1332+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L722
.L724:
	ldr	r3, .L1332+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1332+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L722:
	ldr	r3, .L1332+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L725
	ldr	r3, .L1332+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L726
.L725:
	ldr	r3, .L1332+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L727
	ldr	r3, .L1332+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L726
.L727:
	ldr	r3, .L1332+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L728
	ldr	r3, .L1332+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L726
.L728:
	ldr	r3, .L1332+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1332+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L726:
	ldr	r3, .L1332+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L729
	ldr	r3, .L1332+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L730
.L729:
	ldr	r3, .L1332+224
	ldr	r3, [r3]	@ float
	ldr	r1, .L1332+208
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
.L730:
	ldr	r3, .L1332+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1332+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L732
	ldr	r3, .L1332+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1332+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L732
	ldr	r3, .L1332+228
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1332+220
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1332+224
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L733
.L732:
	ldr	r3, .L1332+228
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1332+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L733
	ldr	r3, .L1332+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L733:
	ldr	r3, .L1332+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L735
	ldr	r3, .L1332+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L735
	ldr	r3, .L1332+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L735
	ldr	r3, .L1335
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L735
	ldr	r3, .L1335+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L736
.L735:
	ldr	r3, .L1335+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L736
	ldr	r3, .L1335+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L736
	ldr	r3, .L1335+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L736
	ldr	r3, .L1335+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1335
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L736:
	ldr	r3, .L1335+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L737
	ldr	r3, .L1335+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L737
	ldr	r3, .L1335+32
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L738
	mov	r3, #0
	mov	r4, r3
.L738:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L737
	ldr	r3, .L1335+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L737
	ldr	r3, .L1335
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L737
	ldr	r3, .L1335+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L1335+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L739
.L737:
	ldr	r3, .L1335+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L739
	ldr	r3, .L1335+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L739
	ldr	r3, .L1335+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L739
	ldr	r3, .L1335+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1335
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L739:
	ldr	r3, .L1335+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L1335+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L740
	ldr	r3, .L1335+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L740
	ldr	r3, .L1335+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L740
	ldr	r3, .L1335+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L740
	ldr	r3, .L1335
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L742
.L740:
	ldr	r3, .L1335+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L742
	ldr	r3, .L1335+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L742
	ldr	r3, .L1335+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L742
	ldr	r3, .L1335+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1335
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L742:
	ldr	r3, .L1335+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L743
	ldr	r3, .L1335+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L743
	ldr	r3, .L1335+32
	ldr	r3, [r3]	@ float
	ldr	r1, .L1335+204
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L743
	ldr	r3, .L1335
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L743
	ldr	r3, .L1335+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L743
	ldr	r3, .L1335+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L1335+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L745
.L743:
	ldr	r3, .L1335+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L745
	ldr	r3, .L1335+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L745
	ldr	r3, .L1335+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L745
	ldr	r3, .L1335+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1335
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L745:
	ldr	r3, .L1335+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L746
	ldr	r3, .L1335+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L747
.L746:
	ldr	r3, .L1335+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L748
	ldr	r3, .L1335+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L747
.L748:
	ldr	r3, .L1335+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L749
	ldr	r3, .L1335+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L747
.L749:
	ldr	r3, .L1335+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1335+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L747:
	ldr	r3, .L1335+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L750
	ldr	r3, .L1335+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L751
.L750:
	ldr	r3, .L1335+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L752
	ldr	r3, .L1335+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L751
.L752:
	ldr	r3, .L1335+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L753
	ldr	r3, .L1335+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L751
.L753:
	ldr	r3, .L1335+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1335+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L751:
	ldr	r3, .L1335+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L754
	ldr	r3, .L1335+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L755
.L754:
	ldr	r3, .L1335+52
	ldr	r3, [r3]	@ float
	ldr	r1, .L1335+204
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
.L755:
	ldr	r3, .L1335+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1335+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L757
	ldr	r3, .L1335+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1335+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L757
	ldr	r3, .L1335+16
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1335+64
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1335+52
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L758
.L757:
	ldr	r3, .L1335+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1335+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L758
	ldr	r3, .L1335+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L758:
	ldr	r3, .L1335+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L760
	ldr	r3, .L1335+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L760
	ldr	r3, .L1335+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L760
	ldr	r3, .L1335+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L760
	ldr	r3, .L1335+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L761
.L760:
	ldr	r3, .L1335+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L761
	ldr	r3, .L1335+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L761
	ldr	r3, .L1335+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L761
	ldr	r3, .L1335+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1335+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L761:
	ldr	r3, .L1335+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L762
	ldr	r3, .L1335+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L762
	ldr	r3, .L1335+64
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L763
	mov	r3, #0
	mov	r4, r3
.L763:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L762
	ldr	r3, .L1335+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L762
	ldr	r3, .L1335+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L762
	ldr	r3, .L1335+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L1335+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L764
.L762:
	ldr	r3, .L1335+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L764
	ldr	r3, .L1335+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L764
	ldr	r3, .L1335+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L764
	ldr	r3, .L1335+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1335+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L764:
	ldr	r3, .L1335+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L1335+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L765
	ldr	r3, .L1335+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L765
	ldr	r3, .L1335+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L765
	ldr	r3, .L1335+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L765
	ldr	r3, .L1335+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L767
.L765:
	ldr	r3, .L1335+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L767
	ldr	r3, .L1335+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L767
	ldr	r3, .L1335+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L767
	ldr	r3, .L1335+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1335+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L767:
	ldr	r3, .L1335+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L768
	ldr	r3, .L1335+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L768
	ldr	r3, .L1335+64
	ldr	r3, [r3]	@ float
	ldr	r1, .L1335+204
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L768
	ldr	r3, .L1335+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L768
	ldr	r3, .L1335+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L768
	ldr	r3, .L1335+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L1335+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L770
.L768:
	ldr	r3, .L1335+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L770
	ldr	r3, .L1335+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L770
	ldr	r3, .L1335+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L770
	ldr	r3, .L1335+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1335+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L770:
	ldr	r3, .L1335+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L771
	ldr	r3, .L1335+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L772
.L771:
	ldr	r3, .L1335+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L773
	ldr	r3, .L1335+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L772
.L773:
	ldr	r3, .L1335+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L774
	ldr	r3, .L1335+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L772
.L774:
	ldr	r3, .L1335+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1335+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L772:
	ldr	r3, .L1335+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L775
	ldr	r3, .L1335+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L776
.L775:
	ldr	r3, .L1335+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L777
	ldr	r3, .L1335+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L776
.L777:
	ldr	r3, .L1335+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L778
	ldr	r3, .L1335+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L776
.L778:
	ldr	r3, .L1335+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1335+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L776:
	ldr	r3, .L1335+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L779
	ldr	r3, .L1335+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L780
.L779:
	ldr	r3, .L1335+92
	ldr	r3, [r3]	@ float
	ldr	r1, .L1335+204
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
.L780:
	ldr	r3, .L1335+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1335+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L782
	ldr	r3, .L1335+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1335+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L782
	ldr	r3, .L1335+16
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1335+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1335+92
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L783
.L782:
	ldr	r3, .L1335+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1335+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L783
	ldr	r3, .L1335+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L783:
	ldr	r3, .L1335+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L785
	ldr	r3, .L1335+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L785
	ldr	r3, .L1335+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L785
	ldr	r3, .L1335+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L785
	ldr	r3, .L1335+92
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L786
.L785:
	ldr	r3, .L1335+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L786
	ldr	r3, .L1335+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L786
	ldr	r3, .L1335+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L786
	ldr	r3, .L1335+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1335+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L786:
	ldr	r3, .L1335+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L787
	ldr	r3, .L1335+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L787
	ldr	r3, .L1335+104
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L788
	mov	r3, #0
	mov	r4, r3
.L788:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L787
	ldr	r3, .L1335+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L787
	ldr	r3, .L1335+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L787
	ldr	r3, .L1335+104
	ldr	r3, [r3]	@ float
	ldr	r2, .L1335+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L789
.L787:
	ldr	r3, .L1335+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L789
	ldr	r3, .L1335+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L789
	ldr	r3, .L1335+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L789
	ldr	r3, .L1335+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1335+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L789:
	ldr	r3, .L1335+104
	ldr	r3, [r3]	@ float
	ldr	r2, .L1335+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L790
	ldr	r3, .L1335+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L790
	ldr	r3, .L1335+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L790
	ldr	r3, .L1335+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L790
	ldr	r3, .L1335+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L792
.L790:
	ldr	r3, .L1335+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L792
	ldr	r3, .L1335+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L792
	ldr	r3, .L1335+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L792
	ldr	r3, .L1335+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1335+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L792:
	ldr	r3, .L1335+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L793
	ldr	r3, .L1335+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L793
	ldr	r3, .L1335+104
	ldr	r3, [r3]	@ float
	ldr	r1, .L1335+204
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L793
	ldr	r3, .L1335+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L793
	ldr	r3, .L1335+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L793
	ldr	r3, .L1335+104
	ldr	r3, [r3]	@ float
	ldr	r2, .L1335+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L795
.L793:
	ldr	r3, .L1335+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L795
	ldr	r3, .L1335+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L795
	ldr	r3, .L1335+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L795
	ldr	r3, .L1335+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1335+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L795:
	ldr	r3, .L1335+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L796
	ldr	r3, .L1335+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L797
.L796:
	ldr	r3, .L1335+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L798
	ldr	r3, .L1335+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L797
.L798:
	ldr	r3, .L1335+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L799
	ldr	r3, .L1335+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L797
.L799:
	ldr	r3, .L1335+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1335+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L797:
	ldr	r3, .L1335+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L800
	ldr	r3, .L1335+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	b	.L1336
.L1337:
	.align	2
.L1335:
	.word	t10_evt1
	.word	_x_t10_x
	.word	t10_l0
	.word	t10_l1
	.word	delta
	.word	t10_evt0
	.word	_x_t10_l1
	.word	_x_t10_l0
	.word	t10_x
	.word	_x_t9_l0
	.word	_x_t9_l1
	.word	_x_t9_evt0
	.word	_x_t9_evt1
	.word	_x_t9_x
	.word	t9_l0
	.word	t9_l1
	.word	t9_x
	.word	t9_evt0
	.word	t9_evt1
	.word	_x_t8_l0
	.word	_x_t8_l1
	.word	_x_t8_evt0
	.word	_x_t8_evt1
	.word	_x_t8_x
	.word	t8_l0
	.word	t8_l1
	.word	t8_x
	.word	t8_evt0
	.word	t8_evt1
	.word	_x_t7_evt0
	.word	_x_t7_evt1
	.word	_x_t7_l0
	.word	_x_t7_l1
	.word	t7_x
	.word	_x_t7_x
	.word	t7_l0
	.word	t7_l1
	.word	t7_evt0
	.word	t7_evt1
	.word	_x_t6_evt0
	.word	_x_t6_evt1
	.word	_x_t6_l0
	.word	_x_t6_l1
	.word	t6_x
	.word	_x_t6_x
	.word	t6_l0
	.word	t6_l1
	.word	t6_evt0
	.word	t6_evt1
	.word	_x_t5_evt0
	.word	_x_t5_evt1
	.word	1084227584
	.word	_x_t5_l1
	.word	_x_t5_l0
	.word	t5_l0
	.word	t5_l1
	.word	delta
	.word	t5_evt0
	.word	t5_evt1
	.word	t5_x
	.word	_x_t5_x
.L1336:
	cmp	r3, #0
	beq	.L801
.L800:
	ldr	r3, .L1335+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L802
	ldr	r3, .L1335+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L801
.L802:
	ldr	r3, .L1335+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L803
	ldr	r3, .L1335+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L801
.L803:
	ldr	r3, .L1335+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1335+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L801:
	ldr	r3, .L1335+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L804
	ldr	r3, .L1335+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L805
.L804:
	ldr	r3, .L1335+136
	ldr	r3, [r3]	@ float
	ldr	r1, .L1335+204
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
.L805:
	ldr	r3, .L1335+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1335+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L807
	ldr	r3, .L1335+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1335+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L807
	ldr	r3, .L1335+224
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1335+132
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1335+136
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L808
.L807:
	ldr	r3, .L1335+224
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1335+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L808
	ldr	r3, .L1335+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L808:
	ldr	r3, .L1335+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L810
	ldr	r3, .L1335+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L810
	ldr	r3, .L1335+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L810
	ldr	r3, .L1335+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L810
	ldr	r3, .L1335+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L811
.L810:
	ldr	r3, .L1335+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L811
	ldr	r3, .L1335+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L811
	ldr	r3, .L1335+224
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L811
	ldr	r3, .L1335+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1335+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L811:
	ldr	r3, .L1335+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L812
	ldr	r3, .L1335+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L812
	ldr	r3, .L1335+132
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L813
	mov	r3, #0
	mov	r4, r3
.L813:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L812
	ldr	r3, .L1335+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L812
	ldr	r3, .L1335+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L812
	ldr	r3, .L1335+132
	ldr	r3, [r3]	@ float
	ldr	r2, .L1335+136
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L814
.L812:
	ldr	r3, .L1335+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L814
	ldr	r3, .L1335+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L814
	ldr	r3, .L1335+224
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L814
	ldr	r3, .L1335+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1335+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L814:
	ldr	r3, .L1335+132
	ldr	r3, [r3]	@ float
	ldr	r2, .L1335+136
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L815
	ldr	r3, .L1335+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L815
	ldr	r3, .L1335+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L815
	ldr	r3, .L1335+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L815
	ldr	r3, .L1335+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L817
.L815:
	ldr	r3, .L1335+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L817
	ldr	r3, .L1335+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L817
	ldr	r3, .L1335+224
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L817
	ldr	r3, .L1335+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1335+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L817:
	ldr	r3, .L1335+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L818
	ldr	r3, .L1335+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L818
	ldr	r3, .L1335+132
	ldr	r3, [r3]	@ float
	ldr	r1, .L1335+204
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L818
	ldr	r3, .L1335+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L818
	ldr	r3, .L1335+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L818
	ldr	r3, .L1335+132
	ldr	r3, [r3]	@ float
	ldr	r2, .L1335+136
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L820
.L818:
	ldr	r3, .L1335+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L820
	ldr	r3, .L1335+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L820
	ldr	r3, .L1335+224
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L820
	ldr	r3, .L1335+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1335+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L820:
	ldr	r3, .L1335+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L821
	ldr	r3, .L1335+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L822
.L821:
	ldr	r3, .L1335+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L823
	ldr	r3, .L1335+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L822
.L823:
	ldr	r3, .L1335+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L824
	ldr	r3, .L1335+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L822
.L824:
	ldr	r3, .L1335+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1335+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L822:
	ldr	r3, .L1335+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L825
	ldr	r3, .L1335+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L826
.L825:
	ldr	r3, .L1335+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L827
	ldr	r3, .L1335+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L826
.L827:
	ldr	r3, .L1335+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L828
	ldr	r3, .L1335+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L826
.L828:
	ldr	r3, .L1335+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1335+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L826:
	ldr	r3, .L1335+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L829
	ldr	r3, .L1335+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L830
.L829:
	ldr	r3, .L1335+176
	ldr	r3, [r3]	@ float
	ldr	r1, .L1335+204
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
.L830:
	ldr	r3, .L1335+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1335+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L832
	ldr	r3, .L1335+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1335+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L832
	ldr	r3, .L1335+224
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1335+172
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1335+176
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L833
.L832:
	ldr	r3, .L1335+224
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1335+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L833
	ldr	r3, .L1335+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L833:
	ldr	r3, .L1335+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L835
	ldr	r3, .L1335+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L835
	ldr	r3, .L1335+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L835
	ldr	r3, .L1335+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L835
	ldr	r3, .L1335+176
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L836
.L835:
	ldr	r3, .L1335+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L836
	ldr	r3, .L1335+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L836
	ldr	r3, .L1335+224
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L836
	ldr	r3, .L1335+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1335+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L836:
	ldr	r3, .L1335+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L837
	ldr	r3, .L1335+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L837
	ldr	r3, .L1335+172
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L838
	mov	r3, #0
	mov	r4, r3
.L838:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L837
	ldr	r3, .L1335+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L837
	ldr	r3, .L1335+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L837
	ldr	r3, .L1335+172
	ldr	r3, [r3]	@ float
	ldr	r2, .L1335+176
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L839
.L837:
	ldr	r3, .L1335+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L839
	ldr	r3, .L1335+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L839
	ldr	r3, .L1335+224
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L839
	ldr	r3, .L1335+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1335+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L839:
	ldr	r3, .L1335+172
	ldr	r3, [r3]	@ float
	ldr	r2, .L1335+176
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L840
	ldr	r3, .L1335+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L840
	ldr	r3, .L1335+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L840
	ldr	r3, .L1335+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L840
	ldr	r3, .L1335+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L842
.L840:
	ldr	r3, .L1335+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L842
	ldr	r3, .L1335+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L842
	ldr	r3, .L1335+224
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L842
	ldr	r3, .L1335+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1335+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L842:
	ldr	r3, .L1335+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L843
	ldr	r3, .L1335+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L843
	ldr	r3, .L1335+172
	ldr	r3, [r3]	@ float
	ldr	r1, .L1335+204
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L843
	ldr	r3, .L1335+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L843
	ldr	r3, .L1335+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L843
	ldr	r3, .L1335+172
	ldr	r3, [r3]	@ float
	ldr	r2, .L1335+176
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L845
.L843:
	ldr	r3, .L1335+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L845
	ldr	r3, .L1335+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L845
	ldr	r3, .L1335+224
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L845
	ldr	r3, .L1335+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1335+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L845:
	ldr	r3, .L1335+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L846
	ldr	r3, .L1335+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L847
.L846:
	ldr	r3, .L1335+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L848
	ldr	r3, .L1335+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L847
.L848:
	ldr	r3, .L1335+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L849
	ldr	r3, .L1335+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L847
.L849:
	ldr	r3, .L1335+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1335+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L847:
	ldr	r3, .L1335+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L850
	ldr	r3, .L1335+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L851
.L850:
	ldr	r3, .L1335+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L852
	ldr	r3, .L1335+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L851
.L852:
	ldr	r3, .L1335+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L853
	ldr	r3, .L1335+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L851
.L853:
	ldr	r3, .L1335+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1335+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L851:
	ldr	r3, .L1335+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L854
	ldr	r3, .L1335+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L855
.L854:
	ldr	r3, .L1335+240
	ldr	r3, [r3]	@ float
	ldr	r1, .L1335+204
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
.L855:
	ldr	r3, .L1335+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1335+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L857
	ldr	r3, .L1335+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1335+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L857
	ldr	r3, .L1335+224
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1335+236
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1335+240
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L858
.L857:
	ldr	r3, .L1335+224
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1335+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L858
	ldr	r3, .L1335+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L858:
	ldr	r3, .L1335+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L860
	ldr	r3, .L1335+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L860
	ldr	r3, .L1335+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L860
	ldr	r3, .L1335+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L860
	ldr	r3, .L1335+240
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L861
.L860:
	ldr	r3, .L1335+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L861
	ldr	r3, .L1335+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L861
	ldr	r3, .L1335+224
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L861
	ldr	r3, .L1335+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1335+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L861:
	ldr	r3, .L1335+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L862
	ldr	r3, .L1335+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L862
	ldr	r3, .L1335+236
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L863
	mov	r3, #0
	mov	r4, r3
.L863:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L862
	ldr	r3, .L1335+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L862
	ldr	r3, .L1335+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L862
	ldr	r3, .L1335+236
	ldr	r3, [r3]	@ float
	ldr	r2, .L1335+240
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L864
.L862:
	ldr	r3, .L1335+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L864
	ldr	r3, .L1335+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L864
	ldr	r3, .L1335+224
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L864
	ldr	r3, .L1335+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1335+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L864:
	ldr	r3, .L1335+236
	ldr	r3, [r3]	@ float
	ldr	r2, .L1335+240
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L865
	ldr	r3, .L1338
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L865
	ldr	r3, .L1338+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L865
	ldr	r3, .L1338+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L865
	ldr	r3, .L1338+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L867
.L865:
	ldr	r3, .L1338+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L867
	ldr	r3, .L1338+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L867
	ldr	r3, .L1338+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L867
	ldr	r3, .L1338+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1338+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L867:
	ldr	r3, .L1338
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L868
	ldr	r3, .L1338+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L868
	ldr	r3, .L1338+28
	ldr	r3, [r3]	@ float
	ldr	r1, .L1338+164
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L868
	ldr	r3, .L1338+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L868
	ldr	r3, .L1338+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L868
	ldr	r3, .L1338+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L1338+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L870
.L868:
	ldr	r3, .L1338+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L870
	ldr	r3, .L1338+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L870
	ldr	r3, .L1338+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L870
	ldr	r3, .L1338+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1338+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L870:
	ldr	r3, .L1338+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L871
	ldr	r3, .L1338+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L872
.L871:
	ldr	r3, .L1338+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L873
	ldr	r3, .L1338+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L872
.L873:
	ldr	r3, .L1338+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L874
	ldr	r3, .L1338+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L872
.L874:
	ldr	r3, .L1338+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1338+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L872:
	ldr	r3, .L1338+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L875
	ldr	r3, .L1338+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L876
.L875:
	ldr	r3, .L1338+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L877
	ldr	r3, .L1338+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L876
.L877:
	ldr	r3, .L1338+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L878
	ldr	r3, .L1338+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L876
.L878:
	ldr	r3, .L1338+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1338+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L876:
	ldr	r3, .L1338+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L879
	ldr	r3, .L1338+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L880
.L879:
	ldr	r3, .L1338+52
	ldr	r3, [r3]	@ float
	ldr	r1, .L1338+164
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
.L880:
	ldr	r3, .L1338+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1338+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L882
	ldr	r3, .L1338+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1338+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L882
	ldr	r3, .L1338+24
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1338+64
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1338+52
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L883
.L882:
	ldr	r3, .L1338+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1338+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L883
	ldr	r3, .L1338+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L883:
	ldr	r3, .L1338+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L885
	ldr	r3, .L1338+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L885
	ldr	r3, .L1338+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L885
	ldr	r3, .L1338+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L885
	ldr	r3, .L1338+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L886
.L885:
	ldr	r3, .L1338+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L886
	ldr	r3, .L1338+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L886
	ldr	r3, .L1338+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L886
	ldr	r3, .L1338+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1338+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L886:
	ldr	r3, .L1338+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L887
	ldr	r3, .L1338+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L887
	ldr	r3, .L1338+64
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L888
	mov	r3, #0
	mov	r4, r3
.L888:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L887
	ldr	r3, .L1338+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L887
	ldr	r3, .L1338+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L887
	ldr	r3, .L1338+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L1338+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L889
.L887:
	ldr	r3, .L1338+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L889
	ldr	r3, .L1338+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L889
	ldr	r3, .L1338+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L889
	ldr	r3, .L1338+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1338+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L889:
	ldr	r3, .L1338+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L1338+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L890
	ldr	r3, .L1338+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L890
	ldr	r3, .L1338+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L890
	ldr	r3, .L1338+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L890
	ldr	r3, .L1338+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L892
.L890:
	ldr	r3, .L1338+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L892
	ldr	r3, .L1338+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L892
	ldr	r3, .L1338+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L892
	ldr	r3, .L1338+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1338+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L892:
	ldr	r3, .L1338+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L893
	ldr	r3, .L1338+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L893
	ldr	r3, .L1338+64
	ldr	r3, [r3]	@ float
	ldr	r1, .L1338+164
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L893
	ldr	r3, .L1338+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L893
	ldr	r3, .L1338+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L893
	ldr	r3, .L1338+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L1338+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L895
.L893:
	ldr	r3, .L1338+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L895
	ldr	r3, .L1338+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L895
	ldr	r3, .L1338+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L895
	ldr	r3, .L1338+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1338+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L895:
	ldr	r3, .L1338+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L896
	ldr	r3, .L1338+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L897
.L896:
	ldr	r3, .L1338+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L898
	ldr	r3, .L1338+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L897
.L898:
	ldr	r3, .L1338+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L899
	ldr	r3, .L1338+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L897
.L899:
	ldr	r3, .L1338+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1338+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L897:
	ldr	r3, .L1338+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L900
	ldr	r3, .L1338+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L901
.L900:
	ldr	r3, .L1338+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L902
	ldr	r3, .L1338+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L901
.L902:
	ldr	r3, .L1338+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L903
	ldr	r3, .L1338+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L901
.L903:
	ldr	r3, .L1338+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1338+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L901:
	ldr	r3, .L1338+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L904
	ldr	r3, .L1338+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L905
.L904:
	ldr	r3, .L1338+92
	ldr	r3, [r3]	@ float
	ldr	r1, .L1338+164
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
.L905:
	ldr	r3, .L1338+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1338+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L907
	ldr	r3, .L1338+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1338+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L907
	ldr	r3, .L1338+24
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1338+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1338+92
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L908
.L907:
	ldr	r3, .L1338+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1338+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L908
	ldr	r3, .L1338+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L908:
	ldr	r3, .L1338+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L910
	ldr	r3, .L1338+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L910
	ldr	r3, .L1338+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L910
	ldr	r3, .L1338+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L910
	ldr	r3, .L1338+92
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L911
.L910:
	ldr	r3, .L1338+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L911
	ldr	r3, .L1338+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L911
	ldr	r3, .L1338+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L911
	ldr	r3, .L1338+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1338+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L911:
	ldr	r3, .L1338+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L912
	ldr	r3, .L1338+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L912
	ldr	r3, .L1338+104
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L913
	mov	r3, #0
	mov	r4, r3
.L913:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L912
	ldr	r3, .L1338+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L912
	ldr	r3, .L1338+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L912
	ldr	r3, .L1338+104
	ldr	r3, [r3]	@ float
	ldr	r2, .L1338+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L914
.L912:
	ldr	r3, .L1338+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L914
	ldr	r3, .L1338+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L914
	ldr	r3, .L1338+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L914
	ldr	r3, .L1338+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1338+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L914:
	ldr	r3, .L1338+104
	ldr	r3, [r3]	@ float
	ldr	r2, .L1338+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L915
	ldr	r3, .L1338+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L915
	ldr	r3, .L1338+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L915
	ldr	r3, .L1338+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L915
	ldr	r3, .L1338+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L917
.L915:
	ldr	r3, .L1338+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L917
	ldr	r3, .L1338+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L917
	ldr	r3, .L1338+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L917
	ldr	r3, .L1338+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1338+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L917:
	ldr	r3, .L1338+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L918
	ldr	r3, .L1338+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L918
	ldr	r3, .L1338+104
	ldr	r3, [r3]	@ float
	ldr	r1, .L1338+164
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L918
	ldr	r3, .L1338+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L918
	ldr	r3, .L1338+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L918
	ldr	r3, .L1338+104
	ldr	r3, [r3]	@ float
	ldr	r2, .L1338+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L920
.L918:
	ldr	r3, .L1338+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L920
	ldr	r3, .L1338+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L920
	ldr	r3, .L1338+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L920
	ldr	r3, .L1338+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1338+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L920:
	ldr	r3, .L1338+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L921
	ldr	r3, .L1338+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L922
.L921:
	ldr	r3, .L1338+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L923
	ldr	r3, .L1338+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L922
.L923:
	ldr	r3, .L1338+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L924
	ldr	r3, .L1338+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L922
.L924:
	ldr	r3, .L1338+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1338+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L922:
	ldr	r3, .L1338+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L925
	ldr	r3, .L1338+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L926
.L925:
	ldr	r3, .L1338+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L927
	ldr	r3, .L1338+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L926
.L927:
	ldr	r3, .L1338+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L928
	ldr	r3, .L1338+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L926
.L928:
	ldr	r3, .L1338+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1338+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L926:
	ldr	r3, .L1338+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L929
	ldr	r3, .L1338+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L930
.L929:
	ldr	r3, .L1338+136
	ldr	r3, [r3]	@ float
	ldr	r1, .L1338+164
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
.L930:
	ldr	r3, .L1338+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1338+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L932
	ldr	r3, .L1338+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1338+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L932
	ldr	r3, .L1338+24
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1338+132
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1338+136
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L933
.L932:
	ldr	r3, .L1338+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	b	.L1339
.L1340:
	.align	2
.L1338:
	.word	_x_t5_l0
	.word	_x_t5_l1
	.word	t5_evt0
	.word	t5_evt1
	.word	t5_l1
	.word	t5_l0
	.word	delta
	.word	t5_x
	.word	_x_t5_x
	.word	_x_t4_l0
	.word	_x_t4_l1
	.word	_x_t4_evt0
	.word	_x_t4_evt1
	.word	_x_t4_x
	.word	t4_l0
	.word	t4_l1
	.word	t4_x
	.word	t4_evt0
	.word	t4_evt1
	.word	_x_t3_l0
	.word	_x_t3_l1
	.word	_x_t3_evt0
	.word	_x_t3_evt1
	.word	_x_t3_x
	.word	t3_l0
	.word	t3_l1
	.word	t3_x
	.word	t3_evt0
	.word	t3_evt1
	.word	_x_t2_evt0
	.word	_x_t2_evt1
	.word	_x_t2_l0
	.word	_x_t2_l1
	.word	t2_x
	.word	_x_t2_x
	.word	t2_l0
	.word	t2_l1
	.word	t2_evt0
	.word	t2_evt1
	.word	_x_t1_evt0
	.word	_x_t1_evt1
	.word	1084227584
	.word	_x_t1_l0
	.word	_x_t1_l1
	.word	t1_x
	.word	_x_t1_x
	.word	t1_l0
	.word	t1_l1
	.word	t1_evt0
	.word	t1_evt1
	.word	_x_t0_evt0
	.word	_x_t0_evt1
	.word	_x_t0_l0
	.word	_x_t0_l1
	.word	1084227584
	.word	t0_x
	.word	_x_t0_x
	.word	t0_l0
	.word	t0_l1
	.word	delta
	.word	t0_evt0
	.word	t0_evt1
	.word	_x_controller_l1
	.word	_x_controller_l0
.L1339:
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1338+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L933
	ldr	r3, .L1338+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L933:
	ldr	r3, .L1338+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L935
	ldr	r3, .L1338+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L935
	ldr	r3, .L1338+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L935
	ldr	r3, .L1338+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L935
	ldr	r3, .L1338+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L936
.L935:
	ldr	r3, .L1338+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L936
	ldr	r3, .L1338+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L936
	ldr	r3, .L1338+236
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L936
	ldr	r3, .L1338+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1338+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L936:
	ldr	r3, .L1338+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L937
	ldr	r3, .L1338+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L937
	ldr	r3, .L1338+132
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L938
	mov	r3, #0
	mov	r4, r3
.L938:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L937
	ldr	r3, .L1338+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L937
	ldr	r3, .L1338+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L937
	ldr	r3, .L1338+132
	ldr	r3, [r3]	@ float
	ldr	r2, .L1338+136
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L939
.L937:
	ldr	r3, .L1338+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L939
	ldr	r3, .L1338+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L939
	ldr	r3, .L1338+236
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L939
	ldr	r3, .L1338+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1338+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L939:
	ldr	r3, .L1338+132
	ldr	r3, [r3]	@ float
	ldr	r2, .L1338+136
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L940
	ldr	r3, .L1338+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L940
	ldr	r3, .L1338+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L940
	ldr	r3, .L1338+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L940
	ldr	r3, .L1338+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L942
.L940:
	ldr	r3, .L1338+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L942
	ldr	r3, .L1338+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L942
	ldr	r3, .L1338+236
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L942
	ldr	r3, .L1338+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1338+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L942:
	ldr	r3, .L1338+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L943
	ldr	r3, .L1338+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L943
	ldr	r3, .L1338+132
	ldr	r3, [r3]	@ float
	ldr	r1, .L1338+164
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L943
	ldr	r3, .L1338+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L943
	ldr	r3, .L1338+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L943
	ldr	r3, .L1338+132
	ldr	r3, [r3]	@ float
	ldr	r2, .L1338+136
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L945
.L943:
	ldr	r3, .L1338+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L945
	ldr	r3, .L1338+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L945
	ldr	r3, .L1338+236
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L945
	ldr	r3, .L1338+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1338+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L945:
	ldr	r3, .L1338+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L946
	ldr	r3, .L1338+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L947
.L946:
	ldr	r3, .L1338+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L948
	ldr	r3, .L1338+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L947
.L948:
	ldr	r3, .L1338+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L949
	ldr	r3, .L1338+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L947
.L949:
	ldr	r3, .L1338+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1338+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L947:
	ldr	r3, .L1338+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L950
	ldr	r3, .L1338+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L951
.L950:
	ldr	r3, .L1338+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L952
	ldr	r3, .L1338+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L951
.L952:
	ldr	r3, .L1338+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L953
	ldr	r3, .L1338+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L951
.L953:
	ldr	r3, .L1338+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1338+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L951:
	ldr	r3, .L1338+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L954
	ldr	r3, .L1338+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L955
.L954:
	ldr	r3, .L1338+180
	ldr	r3, [r3]	@ float
	ldr	r1, .L1338+164
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
.L955:
	ldr	r3, .L1338+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1338+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L957
	ldr	r3, .L1338+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1338+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L957
	ldr	r3, .L1338+236
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1338+176
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1338+180
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L958
.L957:
	ldr	r3, .L1338+236
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1338+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L958
	ldr	r3, .L1338+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L958:
	ldr	r3, .L1338+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L960
	ldr	r3, .L1338+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L960
	ldr	r3, .L1338+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L960
	ldr	r3, .L1338+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L960
	ldr	r3, .L1338+180
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L961
.L960:
	ldr	r3, .L1338+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L961
	ldr	r3, .L1338+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L961
	ldr	r3, .L1338+236
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L961
	ldr	r3, .L1338+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1338+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L961:
	ldr	r3, .L1338+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L962
	ldr	r3, .L1338+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L962
	ldr	r3, .L1338+176
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L963
	mov	r3, #0
	mov	r4, r3
.L963:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L962
	ldr	r3, .L1338+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L962
	ldr	r3, .L1338+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L962
	ldr	r3, .L1338+176
	ldr	r3, [r3]	@ float
	ldr	r2, .L1338+180
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L964
.L962:
	ldr	r3, .L1338+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L964
	ldr	r3, .L1338+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L964
	ldr	r3, .L1338+236
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L964
	ldr	r3, .L1338+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1338+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L964:
	ldr	r3, .L1338+176
	ldr	r3, [r3]	@ float
	ldr	r2, .L1338+180
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L965
	ldr	r3, .L1338+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L965
	ldr	r3, .L1338+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L965
	ldr	r3, .L1338+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L965
	ldr	r3, .L1338+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L967
.L965:
	ldr	r3, .L1338+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L967
	ldr	r3, .L1338+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L967
	ldr	r3, .L1338+236
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L967
	ldr	r3, .L1338+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1338+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L967:
	ldr	r3, .L1338+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L968
	ldr	r3, .L1338+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L968
	ldr	r3, .L1338+176
	ldr	r3, [r3]	@ float
	ldr	r1, .L1338+216
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L968
	ldr	r3, .L1338+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L968
	ldr	r3, .L1338+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L968
	ldr	r3, .L1338+176
	ldr	r3, [r3]	@ float
	ldr	r2, .L1338+180
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L970
.L968:
	ldr	r3, .L1338+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L970
	ldr	r3, .L1338+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L970
	ldr	r3, .L1338+236
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L970
	ldr	r3, .L1338+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1338+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L970:
	ldr	r3, .L1338+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L971
	ldr	r3, .L1338+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L972
.L971:
	ldr	r3, .L1338+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L973
	ldr	r3, .L1338+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L972
.L973:
	ldr	r3, .L1338+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L974
	ldr	r3, .L1338+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L972
.L974:
	ldr	r3, .L1338+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1338+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L972:
	ldr	r3, .L1338+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L975
	ldr	r3, .L1338+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L976
.L975:
	ldr	r3, .L1338+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L977
	ldr	r3, .L1338+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L976
.L977:
	ldr	r3, .L1338+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L978
	ldr	r3, .L1338+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L976
.L978:
	ldr	r3, .L1338+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1338+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L976:
	ldr	r3, .L1338+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L979
	ldr	r3, .L1338+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L980
.L979:
	ldr	r3, .L1338+224
	ldr	r3, [r3]	@ float
	ldr	r1, .L1338+216
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
.L980:
	ldr	r3, .L1338+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1338+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L982
	ldr	r3, .L1338+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1338+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L982
	ldr	r3, .L1338+236
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1338+220
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1338+224
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L983
.L982:
	ldr	r3, .L1338+236
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1338+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L983
	ldr	r3, .L1338+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L983:
	ldr	r3, .L1338+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L985
	ldr	r3, .L1338+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L985
	ldr	r3, .L1338+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L985
	ldr	r3, .L1338+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L985
	ldr	r3, .L1338+224
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L986
.L985:
	ldr	r3, .L1338+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L986
	ldr	r3, .L1338+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L986
	ldr	r3, .L1338+236
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L986
	ldr	r3, .L1338+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1338+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L986:
	ldr	r3, .L1338+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L987
	ldr	r3, .L1338+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L987
	ldr	r3, .L1338+220
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L988
	mov	r3, #0
	mov	r4, r3
.L988:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L987
	ldr	r3, .L1338+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L987
	ldr	r3, .L1338+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L987
	ldr	r3, .L1338+220
	ldr	r3, [r3]	@ float
	ldr	r2, .L1338+224
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L989
.L987:
	ldr	r3, .L1338+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L989
	ldr	r3, .L1338+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L989
	ldr	r3, .L1338+236
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L989
	ldr	r3, .L1338+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1338+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L989:
	ldr	r3, .L1338+220
	ldr	r3, [r3]	@ float
	ldr	r2, .L1338+224
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L990
	ldr	r3, .L1338+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L990
	ldr	r3, .L1338+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L990
	ldr	r3, .L1338+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L990
	ldr	r3, .L1338+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L992
.L990:
	ldr	r3, .L1338+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L992
	ldr	r3, .L1338+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L992
	ldr	r3, .L1338+236
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L992
	ldr	r3, .L1338+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1338+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L992:
	ldr	r3, .L1338+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L993
	ldr	r3, .L1338+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L993
	ldr	r3, .L1338+220
	ldr	r3, [r3]	@ float
	ldr	r1, .L1338+216
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L993
	ldr	r3, .L1338+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L993
	ldr	r3, .L1338+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L993
	ldr	r3, .L1338+220
	ldr	r3, [r3]	@ float
	ldr	r2, .L1338+224
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L995
.L993:
	ldr	r3, .L1338+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L995
	ldr	r3, .L1338+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L995
	ldr	r3, .L1338+236
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L995
	ldr	r3, .L1338+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1338+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L995:
	ldr	r3, .L1338+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L996
	ldr	r3, .L1338+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L997
.L996:
	ldr	r3, .L1338+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L998
	ldr	r3, .L1341
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L997
.L998:
	ldr	r3, .L1341
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L999
	ldr	r3, .L1341+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L997
.L999:
	ldr	r3, .L1341+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1341
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L997:
	ldr	r3, .L1341+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1000
	ldr	r3, .L1341+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1000
	ldr	r3, .L1341+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1001
.L1000:
	ldr	r3, .L1341+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1341+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1002
	ldr	r3, .L1341+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1001
.L1002:
	ldr	r3, .L1341+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1003
	ldr	r3, .L1341+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1003
	ldr	r3, .L1341+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1001
.L1003:
	ldr	r3, .L1341+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1004
	ldr	r3, .L1341+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1004
	ldr	r3, .L1341+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1001
.L1004:
	ldr	r3, .L1341+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1341+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1001:
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L1005
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L1005
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L1005
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L1005
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L1005
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L1005
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L1005
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L1005
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L1005
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L1005
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L1005
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L1005
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L1005
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L1005
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L1005
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L1005
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r3, #16
	beq	.L1005
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r3, #17
	beq	.L1005
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r3, #18
	beq	.L1005
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r3, #19
	beq	.L1005
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r3, #20
	beq	.L1005
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r3, #21
	beq	.L1005
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r3, #22
	beq	.L1005
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r3, #23
	beq	.L1005
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r3, #24
	beq	.L1005
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r3, #25
	beq	.L1005
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r3, #26
	beq	.L1005
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r3, #27
	bne	.L349
.L1005:
	ldr	r3, .L1341+24
	ldr	r3, [r3]	@ float
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1006
	ldr	r3, .L1341+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1007
	ldr	r3, .L1341
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L1007:
	ldr	r3, .L1341+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1006
	ldr	r3, .L1341
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1006:
	ldr	r3, .L1341+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1341+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1008
	ldr	r3, .L1341+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1341
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1008
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1341+36
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1341+24
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1008
	ldr	r3, .L1341+40
	ldr	r2, [r3]
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L1010
.L1008:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1341+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1010
	ldr	r3, .L1341+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1010
	ldr	r3, .L1341+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L1010:
	ldr	r3, .L1341+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1012
	ldr	r3, .L1341
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1012
	ldr	r3, .L1341+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1012
	ldr	r3, .L1341+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1012
	ldr	r3, .L1341+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1012
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L1012
	ldr	r3, .L1341+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1013
.L1012:
	ldr	r3, .L1341+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1013
	ldr	r3, .L1341+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1013
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1013
	ldr	r3, .L1341+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1013:
	ldr	r3, .L1341+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L1341+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1014
	ldr	r3, .L1341+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1016
	ldr	r3, .L1341
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1017
.L1016:
	ldr	r3, .L1341
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1014
	ldr	r3, .L1341+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1017
.L1014:
	ldr	r3, .L1341+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1017
	ldr	r3, .L1341+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1017
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1017
	ldr	r3, .L1341+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1017:
	ldr	r3, .L1341+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1018
	ldr	r3, .L1341+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1018
	ldr	r3, .L1341+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1018
	ldr	r3, .L1341+40
	ldr	r2, [r3]
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	sub	r3, r2, r3
	cmn	r3, #1
	beq	.L1019
.L1018:
	ldr	r3, .L1341+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1020
	ldr	r3, .L1341+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1020
	ldr	r3, .L1341+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1020
	ldr	r3, .L1341+40
	ldr	r2, [r3]
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	sub	r3, r2, r3
	cmp	r3, #1
	beq	.L1019
.L1020:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1019
	ldr	r3, .L1341+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1021
	ldr	r3, .L1341+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1021
	ldr	r3, .L1341+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1019
.L1021:
	ldr	r3, .L1341+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1019
	ldr	r3, .L1341+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1019
	ldr	r3, .L1341+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1019
	ldr	r3, .L1341
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L1019:
	ldr	r3, .L1341+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1022
	ldr	r3, .L1341+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1022
	ldr	r3, .L1341+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1022
	ldr	r3, .L1341+40
	ldr	r2, [r3]
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1022
	ldr	r3, .L1341+36
	ldr	r3, [r3]	@ float
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1023
.L1022:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1023
	ldr	r3, .L1341+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1024
	ldr	r3, .L1341+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1024
	ldr	r3, .L1341+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1023
.L1024:
	ldr	r3, .L1341+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1023
	ldr	r3, .L1341+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1023
	ldr	r3, .L1341
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1023
	ldr	r3, .L1341+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L1023:
	ldr	r3, .L1341
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1025
	ldr	r3, .L1341+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1026
.L1025:
	ldr	r3, .L1341+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1027
	ldr	r3, .L1341
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1026
.L1027:
	ldr	r3, .L1341+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1026
	ldr	r3, .L1341+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1026
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1026
	ldr	r3, .L1341+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1026:
	ldr	r3, .L1341+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L1341+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1028
	ldr	r3, .L1341+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1030
	ldr	r3, .L1341+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1030
	ldr	r3, .L1341+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1030
	ldr	r3, .L1341+40
	ldr	r2, [r3]
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	sub	r3, r2, r3
	cmn	r3, #1
	beq	.L1031
.L1030:
	ldr	r3, .L1341+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1028
	ldr	r3, .L1341+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1028
	ldr	r3, .L1341+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1028
	ldr	r3, .L1341+40
	ldr	r2, [r3]
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	sub	r3, r2, r3
	cmp	r3, #1
	bne	.L1028
	ldr	r3, .L1341+40
	ldr	r3, [r3]
	cmp	r3, #1
	bgt	.L1031
.L1028:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1031
	ldr	r3, .L1341+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1032
	ldr	r3, .L1341+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1032
	ldr	r3, .L1341+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1031
.L1032:
	ldr	r3, .L1341+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1031
	ldr	r3, .L1341+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1031
	ldr	r3, .L1341
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1031
	ldr	r3, .L1341+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L1031:
	ldr	r3, .L1341+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1033
	ldr	r3, .L1341+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1033
	ldr	r3, .L1341+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1033
	ldr	r3, .L1341+40
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L1033
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1033
	ldr	r3, .L1341+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1034
.L1033:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1034
	ldr	r3, .L1341+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1035
	ldr	r3, .L1341+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1035
	ldr	r3, .L1341+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1034
.L1035:
	ldr	r3, .L1341+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1034
	ldr	r3, .L1341+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1034
	ldr	r3, .L1341+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1034
	ldr	r3, .L1341
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1034:
	ldr	r3, .L1341+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L1341+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1036
	ldr	r3, .L1341+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1038
	ldr	r3, .L1341
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1039
.L1038:
	ldr	r3, .L1341
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1036
	ldr	r3, .L1341+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1039
.L1036:
	ldr	r3, .L1341+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1039
	ldr	r3, .L1341+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1039
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1039
	ldr	r3, .L1341+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1039:
	ldr	r3, .L1341+40
	ldr	r2, [r3]
	ldr	r3, .L1341+20
	ldr	r3, [r3]
	sub	r3, r2, r3
	cmn	r3, #1
	bne	.L1040
	ldr	r3, .L1341+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1040
	ldr	r3, .L1341+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1040
	ldr	r3, .L1341+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1040
	ldr	r3, .L1341+36
	ldr	r3, [r3]	@ float
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1041
.L1040:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1041
	ldr	r3, .L1341+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1042
	ldr	r3, .L1341+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1042
	ldr	r3, .L1341+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1041
.L1042:
	ldr	r3, .L1341
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1041
	ldr	r3, .L1341+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1041
	ldr	r3, .L1341+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1041
	ldr	r3, .L1341+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1041:
	ldr	r3, .L1341+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1043
	ldr	r3, .L1341+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1044
.L1043:
	ldr	r3, .L1341+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1045
	ldr	r3, .L1341+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1044
.L1045:
	ldr	r3, .L1341+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1046
	ldr	r3, .L1341+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1044
.L1046:
	ldr	r3, .L1341+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1341+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L1044:
	ldr	r3, .L1341+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1047
	ldr	r3, .L1341+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1048
.L1047:
	ldr	r3, .L1341+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1049
	ldr	r3, .L1341+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1048
.L1049:
	ldr	r3, .L1341+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1050
	ldr	r3, .L1341+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1048
.L1050:
	ldr	r3, .L1341+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1341+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L1048:
	ldr	r3, .L1341+52
	ldr	r3, [r3]	@ float
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1051
	ldr	r3, .L1341+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1051
	ldr	r3, .L1341+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L1051:
	ldr	r3, .L1341+52
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1052
	ldr	r3, .L1341+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1052
	ldr	r3, .L1341+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1052:
	ldr	r3, .L1341+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1341+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1053
	ldr	r3, .L1341+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1341+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1053
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1341+64
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1341+52
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	b	.L1342
.L1343:
	.align	2
.L1341:
	.word	_x_controller_l1
	.word	_x_controller_l0
	.word	_x_controller_evt2
	.word	_x_controller_evt0
	.word	_x_controller_evt1
	.word	_x_controller_cnt
	.word	_x_controller_z
	.word	controller_l0
	.word	controller_l1
	.word	controller_z
	.word	controller_cnt
	.word	_x_gate_evt0
	.word	_x_gate_evt1
	.word	_x_gate_y
	.word	_x_gate_l0
	.word	_x_gate_l1
	.word	gate_y
	.word	gate_l0
	.word	gate_l1
	.word	_x_delta
	.word	t0_evt0
	.word	t0_evt1
	.word	t1_evt0
	.word	t1_evt1
	.word	t2_evt0
	.word	t2_evt1
	.word	t3_evt0
	.word	t3_evt1
	.word	t4_evt0
	.word	t4_evt1
	.word	t5_evt0
	.word	t5_evt1
	.word	t6_evt0
	.word	t6_evt1
	.word	t7_evt0
	.word	t7_evt1
	.word	t8_evt0
	.word	t8_evt1
	.word	t9_evt0
	.word	t9_evt1
	.word	t10_evt0
	.word	t10_evt1
	.word	t11_evt0
	.word	t11_evt1
	.word	t12_evt0
	.word	t12_evt1
	.word	t13_evt0
	.word	t13_evt1
	.word	t14_evt0
	.word	t14_evt1
	.word	t15_evt0
	.word	t15_evt1
	.word	t16_evt0
	.word	t16_evt1
	.word	t17_evt0
	.word	t17_evt1
	.word	t18_evt0
	.word	t18_evt1
	.word	t19_evt0
	.word	t19_evt1
	.word	t20_evt0
	.word	t20_evt1
	.word	t21_evt0
	.word	t21_evt1
	.word	t22_evt0
	.word	t22_evt1
	.word	gate_evt1
	.word	gate_evt0
	.word	delta
	.word	controller_evt2
	.word	controller_evt0
	.word	controller_evt1
	.word	t25_evt0
	.word	t25_evt1
	.word	t24_evt0
	.word	t24_evt1
	.word	t23_evt0
	.word	t23_evt1
.L1342:
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1054
.L1053:
	ldr	r3, .L1341+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1055
	ldr	r3, .L1341+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L1055:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
.L1054:
	ldr	r3, .L1341+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1057
	ldr	r3, .L1341+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1057
	ldr	r3, .L1341+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1057
	ldr	r3, .L1341+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1057
	ldr	r3, .L1341+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1058
.L1057:
	ldr	r3, .L1341+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1058
	ldr	r3, .L1341+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1058
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1058
	ldr	r3, .L1341+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1058:
	ldr	r3, .L1341+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1059
	ldr	r3, .L1341+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1059
	ldr	r3, .L1341+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1059
	ldr	r3, .L1341+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1059
	ldr	r3, .L1341+64
	ldr	r3, [r3]	@ float
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L1059
	ldr	r3, .L1341+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L1341+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1061
.L1059:
	ldr	r3, .L1341+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1061
	ldr	r3, .L1341+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1061
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1061
	ldr	r3, .L1341+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1061:
	ldr	r3, .L1341+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1062
	ldr	r3, .L1341+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1062
	ldr	r3, .L1341+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1062
	ldr	r3, .L1341+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1062
	ldr	r3, .L1341+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1064
.L1062:
	ldr	r3, .L1341+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1064
	ldr	r3, .L1341+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1064
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1064
	ldr	r3, .L1341+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1064:
	ldr	r3, .L1341+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L1341+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1065
	ldr	r3, .L1341+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1065
	ldr	r3, .L1341+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1065
	ldr	r3, .L1341+64
	ldr	r3, [r3]	@ float
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L1065
	ldr	r3, .L1341+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1065
	ldr	r3, .L1341+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1065
	ldr	r3, .L1341+64
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1068
.L1065:
	ldr	r3, .L1341+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1068
	ldr	r3, .L1341+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1068
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1068
	ldr	r3, .L1341+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1068:
	ldr	r3, .L1341+76
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1341+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1070
	ldr	r3, .L1341+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1071
.L1070:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1071
	ldr	r3, .L1341+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1071:
	ldr	r3, .L1341+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1072
	ldr	r3, .L1341+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1073
.L1072:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1073
	ldr	r3, .L1341+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1073:
	ldr	r3, .L1341+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1074
	ldr	r3, .L1341+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1075
.L1074:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1075
	ldr	r3, .L1341+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1075:
	ldr	r3, .L1341+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1076
	ldr	r3, .L1341+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1077
.L1076:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1077
	ldr	r3, .L1341+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1077:
	ldr	r3, .L1341+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1078
	ldr	r3, .L1341+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1079
.L1078:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1079
	ldr	r3, .L1341+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1079:
	ldr	r3, .L1341+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1080
	ldr	r3, .L1341+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1081
.L1080:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1081
	ldr	r3, .L1341+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1081:
	ldr	r3, .L1341+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1082
	ldr	r3, .L1341+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1083
.L1082:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1083
	ldr	r3, .L1341+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1083:
	ldr	r3, .L1341+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1084
	ldr	r3, .L1341+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1085
.L1084:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1085
	ldr	r3, .L1341+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1085:
	ldr	r3, .L1341+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1086
	ldr	r3, .L1341+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1087
.L1086:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1087
	ldr	r3, .L1341+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1087:
	ldr	r3, .L1341+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1088
	ldr	r3, .L1341+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1089
.L1088:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1089
	ldr	r3, .L1341+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1089:
	ldr	r3, .L1341+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1090
	ldr	r3, .L1341+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1091
.L1090:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1091
	ldr	r3, .L1341+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1091:
	ldr	r3, .L1341+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1092
	ldr	r3, .L1341+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1093
.L1092:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1093
	ldr	r3, .L1341+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1093:
	ldr	r3, .L1341+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1094
	ldr	r3, .L1341+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1095
.L1094:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1095
	ldr	r3, .L1341+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1095:
	ldr	r3, .L1341+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1096
	ldr	r3, .L1341+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1097
.L1096:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1097
	ldr	r3, .L1341+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1097:
	ldr	r3, .L1341+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1098
	ldr	r3, .L1341+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1099
.L1098:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1099
	ldr	r3, .L1341+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1099:
	ldr	r3, .L1341+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1100
	ldr	r3, .L1341+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1101
.L1100:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1101
	ldr	r3, .L1341+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1101:
	ldr	r3, .L1341+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1102
	ldr	r3, .L1341+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1103
.L1102:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1103
	ldr	r3, .L1341+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1103:
	ldr	r3, .L1341+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1104
	ldr	r3, .L1341+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1105
.L1104:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1105
	ldr	r3, .L1341+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1105:
	ldr	r3, .L1341+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1106
	ldr	r3, .L1341+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1107
.L1106:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1107
	ldr	r3, .L1341+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1107:
	ldr	r3, .L1341+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1108
	ldr	r3, .L1341+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1109
.L1108:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1109
	ldr	r3, .L1341+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1109:
	ldr	r3, .L1341+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1110
	ldr	r3, .L1341+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1111
.L1110:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1111
	ldr	r3, .L1341+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1111:
	ldr	r3, .L1341+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1112
	ldr	r3, .L1341+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1113
.L1112:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1113
	ldr	r3, .L1341+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1113:
	ldr	r3, .L1341+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1114
	ldr	r3, .L1341+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1115
.L1114:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1115
	ldr	r3, .L1341+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1115:
	ldr	r3, .L1341+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1116
	ldr	r3, .L1341+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1117
.L1116:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1117
	ldr	r3, .L1341+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1117:
	ldr	r3, .L1341+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1118
	ldr	r3, .L1341+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1119
.L1118:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1119
	ldr	r3, .L1341+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1119:
	ldr	r3, .L1341+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1120
	ldr	r3, .L1341+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1121
.L1120:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1121
	ldr	r3, .L1341+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1341+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
.L1121:
	ldr	r3, .L1341+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1122
	ldr	r3, .L1341+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1122
	mov	r3, #1
	b	.L1123
.L1122:
	mov	r3, #0
.L1123:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1341+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1124
	ldr	r3, .L1341+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1124
	ldr	r3, .L1341+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1124
	mov	r3, #1
	b	.L1125
.L1124:
	mov	r3, #0
.L1125:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L1126
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L349
.L1126:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1128
	ldr	r3, .L1341+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1129
	ldr	r3, .L1341+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1129
	mov	r3, #1
	b	.L1130
.L1129:
	mov	r3, #0
.L1130:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1341+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1131
	ldr	r3, .L1341+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1131
	ldr	r3, .L1341+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1131
	mov	r3, #1
	b	.L1132
.L1131:
	mov	r3, #0
.L1132:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L349
.L1128:
	ldr	r3, .L1341+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1133
	ldr	r3, .L1341+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1134
	ldr	r3, .L1341+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1134
	ldr	r3, .L1341+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1134
	mov	r3, #1
	b	.L1135
.L1134:
	mov	r3, #0
.L1135:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1341+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1136
	ldr	r3, .L1341+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
.L1136:
	ldr	r3, .L1341+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1138
	ldr	r3, .L1341+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
.L1138:
	ldr	r3, .L1341+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1139
	ldr	r3, .L1341+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
.L1139:
	ldr	r3, .L1344+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1140
	ldr	r3, .L1344+1148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
.L1140:
	ldr	r3, .L1344+1100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1141
	ldr	r3, .L1344+1108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
.L1141:
	ldr	r3, .L1344+1052
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1142
	ldr	r3, .L1344+1060
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
.L1142:
	ldr	r3, .L1344+1020
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1143
	ldr	r3, .L1344+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
.L1143:
	ldr	r3, .L1344+964
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1144
	ldr	r3, .L1344+980
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
.L1144:
	ldr	r3, .L1344+900
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1145
	ldr	r3, .L1344+908
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
.L1145:
	ldr	r3, .L1344+852
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1146
	ldr	r3, .L1344+860
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
.L1146:
	ldr	r3, .L1344+804
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1147
	ldr	r3, .L1344+812
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
.L1147:
	ldr	r3, .L1344+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1148
	ldr	r3, .L1344+772
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
.L1148:
	ldr	r3, .L1344+740
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1149
	ldr	r3, .L1344+748
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
.L1149:
	ldr	r3, .L1344+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1150
	ldr	r3, .L1344+700
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
.L1150:
	ldr	r3, .L1344+652
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1151
	ldr	r3, .L1344+660
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
.L1151:
	ldr	r3, .L1344+604
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1152
	ldr	r3, .L1344+620
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
.L1152:
	ldr	r3, .L1344+556
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1153
	ldr	r3, .L1344+572
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
.L1153:
	ldr	r3, .L1344+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1154
	ldr	r3, .L1344+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
.L1154:
	ldr	r3, .L1344+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1155
	ldr	r3, .L1344+452
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
.L1155:
	ldr	r3, .L1344+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1156
	ldr	r3, .L1344+1116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
.L1156:
	ldr	r3, .L1344+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1157
	ldr	r3, .L1344+1068
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
.L1157:
	ldr	r3, .L1344+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1158
	ldr	r3, .L1344+1028
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
.L1158:
	ldr	r3, .L1344+524
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1159
	ldr	r3, .L1344+988
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
.L1159:
	ldr	r3, .L1344+516
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1160
	ldr	r3, .L1344+924
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
.L1160:
	ldr	r3, .L1344+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1161
	ldr	r3, .L1344+820
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
.L1161:
	ldr	r3, .L1344+468
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1162
	ldr	r3, .L1344+868
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1162
.L1137:
	mov	r3, #1
	b	.L1163
.L1162:
	mov	r3, #0
.L1163:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L349
.L1133:
	ldr	r3, .L1344+380
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1164
	ldr	r3, .L1344+916
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1165
	ldr	r3, .L1344+508
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1165
	ldr	r3, .L1344+716
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1165
	mov	r3, #1
	b	.L1166
.L1165:
	mov	r3, #0
.L1166:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1344+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1167
	ldr	r3, .L1344+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1168
.L1167:
	ldr	r3, .L1344+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1169
	ldr	r3, .L1344+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1168
.L1169:
	ldr	r3, .L1344+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1170
	ldr	r3, .L1344+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1168
.L1170:
	ldr	r3, .L1344+1148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1171
	ldr	r3, .L1344+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1168
.L1171:
	ldr	r3, .L1344+1108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1172
	ldr	r3, .L1344+1100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1168
.L1172:
	ldr	r3, .L1344+1060
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1173
	ldr	r3, .L1344+1052
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1168
.L1173:
	ldr	r3, .L1344+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1174
	ldr	r3, .L1344+1020
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1168
.L1174:
	ldr	r3, .L1344+980
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1175
	ldr	r3, .L1344+964
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1168
.L1175:
	ldr	r3, .L1344+908
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1176
	ldr	r3, .L1344+900
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1168
.L1176:
	ldr	r3, .L1344+860
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1177
	ldr	r3, .L1344+852
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1168
.L1177:
	ldr	r3, .L1344+812
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1178
	ldr	r3, .L1344+804
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1168
.L1178:
	ldr	r3, .L1344+772
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1179
	ldr	r3, .L1344+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1168
.L1179:
	ldr	r3, .L1344+748
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1180
	ldr	r3, .L1344+740
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1168
.L1180:
	ldr	r3, .L1344+700
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1181
	ldr	r3, .L1344+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1168
.L1181:
	ldr	r3, .L1344+660
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1182
	ldr	r3, .L1344+652
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1168
.L1182:
	ldr	r3, .L1344+620
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1183
	ldr	r3, .L1344+604
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1168
.L1183:
	ldr	r3, .L1344+572
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1184
	ldr	r3, .L1344+556
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1168
.L1184:
	ldr	r3, .L1344+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1185
	ldr	r3, .L1344+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1168
.L1185:
	ldr	r3, .L1344+452
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1186
	ldr	r3, .L1344+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1168
.L1186:
	ldr	r3, .L1344+1116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1187
	ldr	r3, .L1344+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1168
.L1187:
	ldr	r3, .L1344+1068
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1188
	ldr	r3, .L1344+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1168
.L1188:
	ldr	r3, .L1344+1028
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1189
	ldr	r3, .L1344+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1168
.L1189:
	ldr	r3, .L1344+988
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1190
	ldr	r3, .L1344+524
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1168
.L1190:
	ldr	r3, .L1344+924
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1191
	ldr	r3, .L1344+516
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1168
.L1191:
	ldr	r3, .L1344+820
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1192
	ldr	r3, .L1344+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1168
.L1192:
	ldr	r3, .L1344+868
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1193
	ldr	r3, .L1344+468
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1193
.L1168:
	mov	r3, #1
	b	.L1194
.L1193:
	mov	r3, #0
.L1194:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L349
.L1164:
	ldr	r3, .L1344+380
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+536
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1195
	ldr	r3, .L1344+540
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L1196
	mov	r3, #0
	mov	r4, r3
.L1196:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L349
.L1195:
	ldr	r3, .L1344+540
	ldr	r3, [r3]	@ float
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L1197
	ldr	r3, .L1344+380
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1344+540
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1344+536
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
.L1197:
	mov	r3, #1
	b	.L1199
.L1345:
	.align	2
.L1344:
	.word	_x_t25_evt1
	.word	t25_evt1
	.word	_x_t25_evt0
	.word	t25_evt0
	.word	_x_t25_x
	.word	t25_x
	.word	_x_t24_l1
	.word	t24_l1
	.word	_x_t24_evt1
	.word	t24_evt1
	.word	_x_t24_evt0
	.word	t24_evt0
	.word	_x_t24_x
	.word	t24_x
	.word	_x_t23_l1
	.word	t23_l1
	.word	_x_t23_evt1
	.word	t23_evt1
	.word	_x_t23_evt0
	.word	t23_evt0
	.word	_x_t23_x
	.word	t23_x
	.word	_x_t22_l1
	.word	t22_l1
	.word	_x_t8_l1
	.word	t8_l1
	.word	_x_t9_x
	.word	t9_x
	.word	_x_t23_l0
	.word	t23_l0
	.word	_x_t8_evt1
	.word	t8_evt1
	.word	_x_t8_evt0
	.word	t8_evt0
	.word	_x_t7_l1
	.word	t7_l1
	.word	_x_t8_x
	.word	t8_x
	.word	_x_t7_evt0
	.word	t7_evt0
	.word	_x_t6_l1
	.word	t6_l1
	.word	_x_t6_l0
	.word	t6_l0
	.word	_x_t7_x
	.word	t7_x
	.word	_x_t6_evt0
	.word	t6_evt0
	.word	_x_t5_l1
	.word	t5_l1
	.word	_x_t5_x
	.word	t5_x
	.word	_x_t4_evt0
	.word	t4_evt0
	.word	_x_t3_l1
	.word	t3_l1
	.word	_x_t3_l0
	.word	t3_l0
	.word	_x_t4_x
	.word	t4_x
	.word	_x_controller_cnt
	.word	controller_cnt
	.word	_x_t12_evt0
	.word	t12_evt0
	.word	_x_t6_x
	.word	t6_x
	.word	_x_t7_l0
	.word	t7_l0
	.word	_x_t8_l0
	.word	t8_l0
	.word	_x_gate_evt1
	.word	gate_evt1
	.word	_x_t5_evt0
	.word	t5_evt0
	.word	_x_t4_l1
	.word	t4_l1
	.word	_x_t14_x
	.word	t14_x
	.word	_x_t0_l0
	.word	t0_l0
	.word	_x_t4_l0
	.word	t4_l0
	.word	_x_t19_evt1
	.word	t19_evt1
	.word	_x_t5_l0
	.word	t5_l0
	.word	_x_t14_evt0
	.word	t14_evt0
	.word	_x_gate_y
	.word	gate_y
	.word	_x_controller_l0
	.word	controller_l0
	.word	_x_t19_l1
	.word	t19_l1
	.word	_x_delta
	.word	delta
	.word	_x_controller_l1
	.word	controller_l1
	.word	_x_t2_l0
	.word	t2_l0
	.word	_x_t25_l1
	.word	t25_l1
	.word	_x_t0_x
	.word	t0_x
	.word	_x_t0_evt0
	.word	t0_evt0
	.word	_x_t22_evt0
	.word	t22_evt0
	.word	_x_t1_x
	.word	t1_x
	.word	_x_t0_l1
	.word	t0_l1
	.word	_x_t7_evt1
	.word	t7_evt1
	.word	_x_t22_l0
	.word	t22_l0
	.word	_x_t1_evt0
	.word	t1_evt0
	.word	_x_t1_l0
	.word	t1_l0
	.word	_x_t2_x
	.word	t2_x
	.word	_x_t2_l1
	.word	t2_l1
	.word	_x_t1_l1
	.word	t1_l1
	.word	_x_controller_evt1
	.word	controller_evt1
	.word	_x_t2_evt0
	.word	t2_evt0
	.word	_x_t3_evt0
	.word	t3_evt0
	.word	_x_t17_l1
	.word	t17_l1
	.word	_x__diverge_delta
	.word	_diverge_delta
	.word	_x_t3_x
	.word	t3_x
	.word	_x_t9_evt0
	.word	t9_evt0
	.word	_x_t24_l0
	.word	t24_l0
	.word	_x_t9_evt1
	.word	t9_evt1
	.word	_x_t9_l0
	.word	t9_l0
	.word	_x_t9_l1
	.word	t9_l1
	.word	_x_t10_x
	.word	t10_x
	.word	_x_t10_evt0
	.word	t10_evt0
	.word	_x_t25_l0
	.word	t25_l0
	.word	_x_t10_evt1
	.word	t10_evt1
	.word	_x_t10_l0
	.word	t10_l0
	.word	_x_t10_l1
	.word	t10_l1
	.word	_x_t11_x
	.word	t11_x
	.word	_x_t11_evt0
	.word	t11_evt0
	.word	_x_t11_evt1
	.word	t11_evt1
	.word	_x_t11_l0
	.word	t11_l0
	.word	_x_t11_l1
	.word	t11_l1
	.word	_x_controller_z
	.word	controller_z
	.word	_x_t12_x
	.word	t12_x
	.word	_x_t12_evt1
	.word	t12_evt1
	.word	_x_t12_l0
	.word	t12_l0
	.word	_x_controller_evt0
	.word	controller_evt0
	.word	_x_t12_l1
	.word	t12_l1
	.word	_x_t13_x
	.word	t13_x
	.word	_x_t13_evt0
	.word	t13_evt0
	.word	_x_t13_evt1
	.word	t13_evt1
	.word	_x_t13_l0
	.word	t13_l0
	.word	_x_t13_l1
	.word	t13_l1
	.word	_x_t14_evt1
	.word	t14_evt1
	.word	_x_t14_l0
	.word	t14_l0
	.word	_x_t14_l1
	.word	t14_l1
	.word	_x_t15_x
	.word	t15_x
	.word	_x_t15_evt0
	.word	t15_evt0
	.word	_x_t15_evt1
	.word	t15_evt1
	.word	_x_t0_evt1
	.word	t0_evt1
	.word	_x_t15_l0
	.word	t15_l0
	.word	_x_t15_l1
	.word	t15_l1
	.word	_x_t16_x
	.word	t16_x
	.word	_x_t16_evt0
	.word	t16_evt0
	.word	_x_t16_evt1
	.word	t16_evt1
	.word	_x_t1_evt1
	.word	t1_evt1
	.word	_x_t16_l0
	.word	t16_l0
	.word	_x_t16_l1
	.word	t16_l1
	.word	_x_t17_x
	.word	t17_x
	.word	_x_t17_evt0
	.word	t17_evt0
	.word	_x_t17_evt1
	.word	t17_evt1
	.word	_x_controller_evt2
	.word	controller_evt2
	.word	_x_t2_evt1
	.word	t2_evt1
	.word	_x_t17_l0
	.word	t17_l0
	.word	_x_gate_evt0
	.word	gate_evt0
	.word	_x_t18_x
	.word	t18_x
	.word	_x_gate_l0
	.word	gate_l0
	.word	_x_t18_evt0
	.word	t18_evt0
	.word	_x_gate_l1
	.word	gate_l1
	.word	_x_t18_evt1
	.word	t18_evt1
	.word	_x_t3_evt1
	.word	t3_evt1
	.word	_x_t18_l0
	.word	t18_l0
	.word	_x_t18_l1
	.word	t18_l1
	.word	_x_t19_x
	.word	t19_x
	.word	_x_t19_evt0
	.word	t19_evt0
	.word	_x_t4_evt1
	.word	t4_evt1
	.word	_x_t19_l0
	.word	t19_l0
	.word	_x_t20_x
	.word	t20_x
	.word	_x_t20_evt0
	.word	t20_evt0
	.word	_x_t20_evt1
	.word	t20_evt1
	.word	_x_t5_evt1
	.word	t5_evt1
	.word	_x_t20_l0
	.word	t20_l0
	.word	_x_t20_l1
	.word	t20_l1
	.word	_x_t21_x
	.word	t21_x
	.word	_x_t21_evt0
	.word	t21_evt0
	.word	_x_t21_evt1
	.word	t21_evt1
	.word	_x_t6_evt1
	.word	t6_evt1
	.word	_x_t21_l0
	.word	t21_l0
	.word	_x_t21_l1
	.word	t21_l1
	.word	_x_t22_x
	.word	t22_x
	.word	_x_t22_evt1
	.word	t22_evt1
.L349:
	mov	r3, #0
.L1199:
	str	r3, [fp, #-24]
	ldr	r3, .L1344
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+4
	strb	r2, [r3]
	ldr	r3, .L1344+8
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+12
	strb	r2, [r3]
	ldr	r3, .L1344+16
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+20
	str	r3, [r2]	@ float
	ldr	r3, .L1344+24
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+28
	strb	r2, [r3]
	ldr	r3, .L1344+32
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+36
	strb	r2, [r3]
	ldr	r3, .L1344+40
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+44
	strb	r2, [r3]
	ldr	r3, .L1344+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+52
	str	r3, [r2]	@ float
	ldr	r3, .L1344+56
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+60
	strb	r2, [r3]
	ldr	r3, .L1344+64
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+68
	strb	r2, [r3]
	ldr	r3, .L1344+72
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+76
	strb	r2, [r3]
	ldr	r3, .L1344+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+84
	str	r3, [r2]	@ float
	ldr	r3, .L1344+88
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+92
	strb	r2, [r3]
	ldr	r3, .L1344+96
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+100
	strb	r2, [r3]
	ldr	r3, .L1344+104
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+108
	str	r3, [r2]	@ float
	ldr	r3, .L1344+112
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+116
	strb	r2, [r3]
	ldr	r3, .L1344+120
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+124
	strb	r2, [r3]
	ldr	r3, .L1344+128
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+132
	strb	r2, [r3]
	ldr	r3, .L1344+136
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+140
	strb	r2, [r3]
	ldr	r3, .L1344+144
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+148
	str	r3, [r2]	@ float
	ldr	r3, .L1344+152
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+156
	strb	r2, [r3]
	ldr	r3, .L1344+160
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+164
	strb	r2, [r3]
	ldr	r3, .L1344+168
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+172
	strb	r2, [r3]
	ldr	r3, .L1344+176
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+180
	str	r3, [r2]	@ float
	ldr	r3, .L1344+184
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+188
	strb	r2, [r3]
	ldr	r3, .L1344+192
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+196
	strb	r2, [r3]
	ldr	r3, .L1344+200
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+204
	str	r3, [r2]	@ float
	ldr	r3, .L1344+208
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+212
	strb	r2, [r3]
	ldr	r3, .L1344+216
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+220
	strb	r2, [r3]
	ldr	r3, .L1344+224
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+228
	strb	r2, [r3]
	ldr	r3, .L1344+232
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+236
	str	r3, [r2]	@ float
	ldr	r3, .L1344+240
	ldr	r3, [r3]
	ldr	r2, .L1344+244
	str	r3, [r2]
	ldr	r3, .L1344+248
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+252
	strb	r2, [r3]
	ldr	r3, .L1344+256
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+260
	str	r3, [r2]	@ float
	ldr	r3, .L1344+264
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+268
	strb	r2, [r3]
	ldr	r3, .L1344+272
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+276
	strb	r2, [r3]
	ldr	r3, .L1344+280
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+284
	strb	r2, [r3]
	ldr	r3, .L1344+288
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+292
	strb	r2, [r3]
	ldr	r3, .L1344+296
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+300
	strb	r2, [r3]
	ldr	r3, .L1344+304
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+308
	str	r3, [r2]	@ float
	ldr	r3, .L1344+312
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+316
	strb	r2, [r3]
	ldr	r3, .L1344+320
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+324
	strb	r2, [r3]
	ldr	r3, .L1344+328
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+332
	strb	r2, [r3]
	ldr	r3, .L1344+336
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+340
	strb	r2, [r3]
	ldr	r3, .L1344+344
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+348
	strb	r2, [r3]
	ldr	r3, .L1344+352
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+356
	str	r3, [r2]	@ float
	ldr	r3, .L1344+360
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+364
	strb	r2, [r3]
	ldr	r3, .L1344+368
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+372
	strb	r2, [r3]
	ldr	r3, .L1344+376
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+380
	str	r3, [r2]	@ float
	ldr	r3, .L1344+384
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+388
	strb	r2, [r3]
	ldr	r3, .L1344+392
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+396
	strb	r2, [r3]
	ldr	r3, .L1344+400
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+404
	strb	r2, [r3]
	ldr	r3, .L1344+408
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+412
	str	r3, [r2]	@ float
	ldr	r3, .L1344+416
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+420
	strb	r2, [r3]
	ldr	r3, .L1344+424
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+428
	strb	r2, [r3]
	ldr	r3, .L1344+432
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+436
	str	r3, [r2]	@ float
	ldr	r3, .L1344+440
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+444
	strb	r2, [r3]
	ldr	r3, .L1344+448
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+452
	strb	r2, [r3]
	ldr	r3, .L1344+456
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+460
	strb	r2, [r3]
	ldr	r3, .L1344+464
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+468
	strb	r2, [r3]
	ldr	r3, .L1344+472
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+476
	strb	r2, [r3]
	ldr	r3, .L1344+480
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+484
	str	r3, [r2]	@ float
	ldr	r3, .L1344+488
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+492
	strb	r2, [r3]
	ldr	r3, .L1344+496
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+500
	strb	r2, [r3]
	ldr	r3, .L1344+504
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+508
	strb	r2, [r3]
	ldr	r3, .L1344+512
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+516
	strb	r2, [r3]
	ldr	r3, .L1344+520
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+524
	strb	r2, [r3]
	ldr	r3, .L1344+528
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+532
	strb	r2, [r3]
	ldr	r3, .L1344+536
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+540
	str	r3, [r2]	@ float
	ldr	r3, .L1344+544
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+548
	str	r3, [r2]	@ float
	ldr	r3, .L1344+552
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+556
	strb	r2, [r3]
	ldr	r3, .L1344+560
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+564
	strb	r2, [r3]
	ldr	r3, .L1344+568
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+572
	strb	r2, [r3]
	ldr	r3, .L1344+576
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+580
	strb	r2, [r3]
	ldr	r3, .L1344+584
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+588
	strb	r2, [r3]
	ldr	r3, .L1344+592
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+596
	str	r3, [r2]	@ float
	ldr	r3, .L1344+600
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+604
	strb	r2, [r3]
	ldr	r3, .L1344+608
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+612
	strb	r2, [r3]
	ldr	r3, .L1344+616
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+620
	strb	r2, [r3]
	ldr	r3, .L1344+624
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+628
	strb	r2, [r3]
	ldr	r3, .L1344+632
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+636
	strb	r2, [r3]
	ldr	r3, .L1344+640
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+644
	str	r3, [r2]	@ float
	ldr	r3, .L1344+648
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+652
	strb	r2, [r3]
	ldr	r3, .L1344+656
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+660
	strb	r2, [r3]
	ldr	r3, .L1344+664
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+668
	strb	r2, [r3]
	ldr	r3, .L1344+672
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+676
	strb	r2, [r3]
	ldr	r3, .L1344+680
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+684
	str	r3, [r2]	@ float
	ldr	r3, .L1344+688
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+692
	str	r3, [r2]	@ float
	ldr	r3, .L1344+696
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+700
	strb	r2, [r3]
	ldr	r3, .L1344+704
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+708
	strb	r2, [r3]
	ldr	r3, .L1344+712
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+716
	strb	r2, [r3]
	ldr	r3, .L1344+720
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+724
	strb	r2, [r3]
	ldr	r3, .L1344+728
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+732
	str	r3, [r2]	@ float
	ldr	r3, .L1344+736
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+740
	strb	r2, [r3]
	ldr	r3, .L1344+744
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+748
	strb	r2, [r3]
	ldr	r3, .L1344+752
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+756
	strb	r2, [r3]
	ldr	r3, .L1344+760
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+764
	strb	r2, [r3]
	ldr	r3, .L1344+768
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+772
	strb	r2, [r3]
	ldr	r3, .L1344+776
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+780
	strb	r2, [r3]
	ldr	r3, .L1344+784
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+788
	strb	r2, [r3]
	ldr	r3, .L1344+792
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+796
	str	r3, [r2]	@ float
	ldr	r3, .L1344+800
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+804
	strb	r2, [r3]
	ldr	r3, .L1344+808
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+812
	strb	r2, [r3]
	ldr	r3, .L1344+816
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+820
	strb	r2, [r3]
	ldr	r3, .L1344+824
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+828
	strb	r2, [r3]
	ldr	r3, .L1344+832
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+836
	strb	r2, [r3]
	ldr	r3, .L1344+840
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+844
	str	r3, [r2]	@ float
	ldr	r3, .L1344+848
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+852
	strb	r2, [r3]
	ldr	r3, .L1344+856
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+860
	strb	r2, [r3]
	ldr	r3, .L1344+864
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+868
	strb	r2, [r3]
	ldr	r3, .L1344+872
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+876
	strb	r2, [r3]
	ldr	r3, .L1344+880
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+884
	strb	r2, [r3]
	ldr	r3, .L1344+888
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+892
	str	r3, [r2]	@ float
	ldr	r3, .L1344+896
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+900
	strb	r2, [r3]
	ldr	r3, .L1344+904
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+908
	strb	r2, [r3]
	ldr	r3, .L1344+912
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+916
	strb	r2, [r3]
	ldr	r3, .L1344+920
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+924
	strb	r2, [r3]
	ldr	r3, .L1344+928
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+932
	strb	r2, [r3]
	ldr	r3, .L1344+936
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+940
	strb	r2, [r3]
	ldr	r3, .L1344+944
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+948
	str	r3, [r2]	@ float
	ldr	r3, .L1344+952
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+956
	strb	r2, [r3]
	ldr	r3, .L1344+960
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+964
	strb	r2, [r3]
	ldr	r3, .L1344+968
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+972
	strb	r2, [r3]
	ldr	r3, .L1344+976
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+980
	strb	r2, [r3]
	ldr	r3, .L1344+984
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+988
	strb	r2, [r3]
	ldr	r3, .L1344+992
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+996
	strb	r2, [r3]
	ldr	r3, .L1344+1000
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+1004
	strb	r2, [r3]
	ldr	r3, .L1344+1008
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+1012
	str	r3, [r2]	@ float
	ldr	r3, .L1344+1016
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+1020
	strb	r2, [r3]
	ldr	r3, .L1344+1024
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+1028
	strb	r2, [r3]
	ldr	r3, .L1344+1032
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+1036
	strb	r2, [r3]
	ldr	r3, .L1344+1040
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+1044
	str	r3, [r2]	@ float
	ldr	r3, .L1344+1048
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+1052
	strb	r2, [r3]
	ldr	r3, .L1344+1056
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+1060
	strb	r2, [r3]
	ldr	r3, .L1344+1064
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+1068
	strb	r2, [r3]
	ldr	r3, .L1344+1072
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+1076
	strb	r2, [r3]
	ldr	r3, .L1344+1080
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+1084
	strb	r2, [r3]
	ldr	r3, .L1344+1088
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+1092
	str	r3, [r2]	@ float
	ldr	r3, .L1344+1096
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+1100
	strb	r2, [r3]
	ldr	r3, .L1344+1104
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+1108
	strb	r2, [r3]
	ldr	r3, .L1344+1112
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+1116
	strb	r2, [r3]
	ldr	r3, .L1344+1120
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+1124
	strb	r2, [r3]
	ldr	r3, .L1344+1128
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+1132
	strb	r2, [r3]
	ldr	r3, .L1344+1136
	ldr	r3, [r3]	@ float
	ldr	r2, .L1344+1140
	str	r3, [r2]	@ float
	ldr	r3, .L1344+1144
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1344+1148
	strb	r2, [r3]
.L344:
	ldr	r3, [fp, #-24]
	cmp	r3, #0
	bne	.L1200
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
