	.file	"45451088.c"
	.intel_syntax noprefix
	.text
	.globl	bitXor
	.type	bitXor, @function
bitXor:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -4[rbp]
	xor	eax, DWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	bitXor, .-bitXor
	.globl	tmin
	.type	tmin, @function
tmin:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, -2147483648
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	tmin, .-tmin
	.globl	isTmax
	.type	isTmax, @function
isTmax:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	add	eax, 1
	xor	eax, DWORD PTR -4[rbp]
	not	eax
	mov	edx, eax
	cmp	DWORD PTR -4[rbp], -1
	sete	al
	movzx	eax, al
	or	eax, edx
	test	eax, eax
	sete	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	isTmax, .-isTmax
	.globl	allOddBits
	.type	allOddBits, @function
allOddBits:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -4[rbp], 43690
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 16
	or	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	and	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	cmp	eax, DWORD PTR -20[rbp]
	sete	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	allOddBits, .-allOddBits
	.globl	negate
	.type	negate, @function
negate:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	neg	eax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	negate, .-negate
	.globl	isAsciiDigit
	.type	isAsciiDigit, @function
isAsciiDigit:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	sar	eax, 4
	cmp	eax, 3
	setne	al
	movzx	edx, al
	mov	eax, DWORD PTR -4[rbp]
	sar	eax, 3
	mov	ecx, eax
	mov	eax, DWORD PTR -4[rbp]
	sar	eax
	and	eax, ecx
	or	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sar	eax, 3
	mov	ecx, eax
	mov	eax, DWORD PTR -4[rbp]
	sar	eax, 2
	and	eax, ecx
	or	eax, edx
	and	eax, 1
	test	eax, eax
	sete	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	isAsciiDigit, .-isAsciiDigit
	.globl	conditional
	.type	conditional, @function
conditional:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	DWORD PTR -12[rbp], edx
	cmp	DWORD PTR -4[rbp], 0
	je	.L14
	mov	eax, -1
	jmp	.L15
.L14:
	mov	eax, 0
.L15:
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -8[rbp]
	and	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	not	eax
	and	eax, DWORD PTR -12[rbp]
	or	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	conditional, .-conditional
	.globl	isLessOrEqual
	.type	isLessOrEqual, @function
isLessOrEqual:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	and	eax, DWORD PTR -20[rbp]
	shr	eax, 31
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	xor	eax, DWORD PTR -24[rbp]
	sar	eax, 31
	not	eax
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	cmp	eax, DWORD PTR -24[rbp]
	sete	al
	movzx	eax, al
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	mov	edx, eax
	mov	eax, DWORD PTR -20[rbp]
	add	eax, edx
	add	eax, 1
	sar	eax, 31
	and	eax, DWORD PTR -8[rbp]
	or	eax, DWORD PTR -4[rbp]
	and	eax, 1
	or	eax, DWORD PTR -12[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	isLessOrEqual, .-isLessOrEqual
	.globl	logicalNeg
	.type	logicalNeg, @function
logicalNeg:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	neg	eax
	or	eax, DWORD PTR -4[rbp]
	not	eax
	shr	eax, 31
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	logicalNeg, .-logicalNeg
	.globl	howManyBits
	.type	howManyBits, @function
howManyBits:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -4[rbp], 0
	mov	eax, DWORD PTR -20[rbp]
	add	eax, eax
	xor	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	add	eax, 16
	mov	edx, -1
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -20[rbp]
	test	eax, eax
	je	.L22
	mov	eax, 16
	jmp	.L23
.L22:
	mov	eax, 0
.L23:
	add	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	add	eax, 8
	mov	edx, -1
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -20[rbp]
	test	eax, eax
	je	.L24
	mov	eax, 8
	jmp	.L25
.L24:
	mov	eax, 0
.L25:
	add	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	add	eax, 4
	mov	edx, -1
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -20[rbp]
	test	eax, eax
	je	.L26
	mov	eax, 4
	jmp	.L27
.L26:
	mov	eax, 0
.L27:
	add	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	add	eax, 2
	mov	edx, -1
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -20[rbp]
	test	eax, eax
	je	.L28
	mov	eax, 2
	jmp	.L29
.L28:
	mov	eax, 0
.L29:
	add	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	add	eax, 1
	mov	edx, -1
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -20[rbp]
	test	eax, eax
	setne	al
	movzx	eax, al
	add	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	add	eax, 1
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	howManyBits, .-howManyBits
	.globl	floatScale2
	.type	floatScale2, @function
floatScale2:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	eax, DWORD PTR -20[rbp]
	shr	eax, 23
	and	eax, 255
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, -2147483648
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -8[rbp], 0
	jne	.L32
	mov	eax, DWORD PTR -20[rbp]
	lea	edx, [rax+rax]
	mov	eax, DWORD PTR -4[rbp]
	or	eax, edx
	jmp	.L33
.L32:
	cmp	DWORD PTR -8[rbp], 255
	jne	.L34
	mov	eax, DWORD PTR -20[rbp]
	jmp	.L33
.L34:
	add	DWORD PTR -8[rbp], 1
	cmp	DWORD PTR -8[rbp], 255
	jne	.L35
	mov	eax, DWORD PTR -4[rbp]
	or	eax, 2139095040
	jmp	.L33
.L35:
	mov	eax, DWORD PTR -20[rbp]
	and	eax, -2139095041
	mov	edx, eax
	mov	eax, DWORD PTR -8[rbp]
	sal	eax, 23
	or	eax, edx
.L33:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	floatScale2, .-floatScale2
	.globl	floatFloat2Int
	.type	floatFloat2Int, @function
floatFloat2Int:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	eax, DWORD PTR -20[rbp]
	shr	eax, 31
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	shr	eax, 23
	movzx	eax, al
	sub	eax, 127
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, 8388607
	or	eax, 8388608
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, 2147483647
	test	eax, eax
	jne	.L37
	mov	eax, 0
	jmp	.L38
.L37:
	cmp	DWORD PTR -4[rbp], 31
	jle	.L39
	mov	eax, -2147483648
	jmp	.L38
.L39:
	cmp	DWORD PTR -4[rbp], 0
	jns	.L40
	mov	eax, 0
	jmp	.L38
.L40:
	cmp	DWORD PTR -4[rbp], 23
	jle	.L41
	mov	eax, DWORD PTR -4[rbp]
	sub	eax, 23
	mov	ecx, eax
	sal	DWORD PTR -12[rbp], cl
	jmp	.L42
.L41:
	mov	eax, 23
	sub	eax, DWORD PTR -4[rbp]
	mov	ecx, eax
	sar	DWORD PTR -12[rbp], cl
.L42:
	mov	eax, DWORD PTR -12[rbp]
	sar	eax, 31
	cmp	DWORD PTR -8[rbp], eax
	jne	.L43
	mov	eax, DWORD PTR -12[rbp]
	jmp	.L38
.L43:
	cmp	DWORD PTR -12[rbp], 0
	jns	.L44
	mov	eax, -2147483648
	jmp	.L38
.L44:
	mov	eax, DWORD PTR -12[rbp]
	neg	eax
.L38:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	floatFloat2Int, .-floatFloat2Int
	.globl	floatPower2
	.type	floatPower2, @function
floatPower2:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -8[rbp], 2139095040
	mov	eax, DWORD PTR -20[rbp]
	add	eax, 127
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -20[rbp], 0
	jns	.L46
	mov	eax, 0
	jmp	.L47
.L46:
	cmp	DWORD PTR -4[rbp], 254
	jle	.L48
	mov	eax, DWORD PTR -8[rbp]
	jmp	.L47
.L48:
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 23
.L47:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	floatPower2, .-floatPower2
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"45451088.c"
	.text
	.align	2
	.global	bitXor
	.syntax unified
	.arm
	.fpu softvfp
	.type	bitXor, %function
bitXor:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	eor	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	bitXor, .-bitXor
	.align	2
	.global	tmin
	.syntax unified
	.arm
	.fpu softvfp
	.type	tmin, %function
tmin:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	mov	r3, #-2147483648
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	tmin, .-tmin
	.align	2
	.global	isTmax
	.syntax unified
	.arm
	.fpu softvfp
	.type	isTmax, %function
isTmax:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	add	r2, r3, #1
	ldr	r3, [fp, #-8]
	eor	r3, r3, r2
	mvn	r3, r3
	ldr	r2, [fp, #-8]
	cmn	r2, #1
	moveq	r2, #1
	movne	r2, #0
	and	r2, r2, #255
	orr	r3, r3, r2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	isTmax, .-isTmax
	.align	2
	.global	allOddBits
	.syntax unified
	.arm
	.fpu softvfp
	.type	allOddBits, %function
allOddBits:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	ldr	r3, .L9
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #16
	ldr	r2, [fp, #-8]
	orr	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-8]
	and	r3, r3, r2
	str	r3, [fp, #-16]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-16]
	cmp	r2, r3
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L10:
	.align	2
.L9:
	.word	43690
	.size	allOddBits, .-allOddBits
	.align	2
	.global	negate
	.syntax unified
	.arm
	.fpu softvfp
	.type	negate, %function
negate:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	rsb	r3, r3, #0
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	negate, .-negate
	.align	2
	.global	isAsciiDigit
	.syntax unified
	.arm
	.fpu softvfp
	.type	isAsciiDigit, %function
isAsciiDigit:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	asr	r3, r3, #4
	cmp	r3, #3
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r1, r3
	ldr	r3, [fp, #-8]
	asr	r2, r3, #3
	ldr	r3, [fp, #-8]
	asr	r3, r3, #1
	and	r3, r3, r2
	orr	r2, r1, r3
	ldr	r3, [fp, #-8]
	asr	r1, r3, #3
	ldr	r3, [fp, #-8]
	asr	r3, r3, #2
	and	r3, r3, r1
	orr	r3, r2, r3
	and	r3, r3, #1
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	isAsciiDigit, .-isAsciiDigit
	.align	2
	.global	conditional
	.syntax unified
	.arm
	.fpu softvfp
	.type	conditional, %function
conditional:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	str	r2, [fp, #-16]
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	beq	.L16
	mvn	r3, #0
	b	.L17
.L16:
	mov	r3, #0
.L17:
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-12]
	ldr	r3, [fp, #-8]
	and	r2, r2, r3
	ldr	r3, [fp, #-8]
	mvn	r1, r3
	ldr	r3, [fp, #-16]
	and	r3, r3, r1
	orr	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	conditional, .-conditional
	.align	2
	.global	isLessOrEqual
	.syntax unified
	.arm
	.fpu softvfp
	.type	isLessOrEqual, %function
isLessOrEqual:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #28
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	and	r3, r3, r2
	lsr	r3, r3, #31
	str	r3, [fp, #-16]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	eor	r3, r3, r2
	asr	r3, r3, #31
	mvn	r3, r3
	str	r3, [fp, #-12]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	cmp	r2, r3
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	add	r3, r3, #1
	asr	r2, r3, #31
	ldr	r3, [fp, #-12]
	and	r2, r2, r3
	ldr	r3, [fp, #-8]
	orr	r3, r2, r3
	and	r2, r3, #1
	ldr	r3, [fp, #-16]
	orr	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	isLessOrEqual, .-isLessOrEqual
	.align	2
	.global	logicalNeg
	.syntax unified
	.arm
	.fpu softvfp
	.type	logicalNeg, %function
logicalNeg:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	rsb	r2, r3, #0
	ldr	r3, [fp, #-8]
	orr	r3, r2, r3
	mvn	r3, r3
	lsr	r3, r3, #31
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	logicalNeg, .-logicalNeg
	.align	2
	.global	howManyBits
	.syntax unified
	.arm
	.fpu softvfp
	.type	howManyBits, %function
howManyBits:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	mov	r3, #0
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #1
	ldr	r2, [fp, #-16]
	eor	r3, r3, r2
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-8]
	add	r3, r3, #16
	mvn	r2, #0
	lsl	r2, r2, r3
	ldr	r3, [fp, #-16]
	and	r3, r3, r2
	cmp	r3, #0
	beq	.L24
	mov	r3, #16
	b	.L25
.L24:
	mov	r3, #0
.L25:
	ldr	r2, [fp, #-8]
	add	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	add	r3, r3, #8
	mvn	r2, #0
	lsl	r2, r2, r3
	ldr	r3, [fp, #-16]
	and	r3, r3, r2
	cmp	r3, #0
	beq	.L26
	mov	r3, #8
	b	.L27
.L26:
	mov	r3, #0
.L27:
	ldr	r2, [fp, #-8]
	add	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	add	r3, r3, #4
	mvn	r2, #0
	lsl	r2, r2, r3
	ldr	r3, [fp, #-16]
	and	r3, r3, r2
	cmp	r3, #0
	beq	.L28
	mov	r3, #4
	b	.L29
.L28:
	mov	r3, #0
.L29:
	ldr	r2, [fp, #-8]
	add	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	add	r3, r3, #2
	mvn	r2, #0
	lsl	r2, r2, r3
	ldr	r3, [fp, #-16]
	and	r3, r3, r2
	cmp	r3, #0
	beq	.L30
	mov	r3, #2
	b	.L31
.L30:
	mov	r3, #0
.L31:
	ldr	r2, [fp, #-8]
	add	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	mvn	r2, #0
	lsl	r2, r2, r3
	ldr	r3, [fp, #-16]
	and	r3, r3, r2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, [fp, #-8]
	add	r3, r3, r2
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	howManyBits, .-howManyBits
	.align	2
	.global	floatScale2
	.syntax unified
	.arm
	.fpu softvfp
	.type	floatScale2, %function
floatScale2:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	lsr	r3, r3, #23
	and	r3, r3, #255
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-16]
	and	r3, r3, #-2147483648
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-12]
	cmp	r3, #0
	bne	.L34
	ldr	r3, [fp, #-16]
	lsl	r2, r3, #1
	ldr	r3, [fp, #-8]
	orr	r3, r2, r3
	b	.L35
.L34:
	ldr	r3, [fp, #-12]
	cmp	r3, #255
	bne	.L36
	ldr	r3, [fp, #-16]
	b	.L35
.L36:
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-12]
	cmp	r3, #255
	bne	.L37
	ldr	r3, [fp, #-8]
	orr	r3, r3, #2130706432
	orr	r3, r3, #8388608
	b	.L35
.L37:
	ldr	r3, [fp, #-16]
	bic	r3, r3, #2130706432
	bic	r3, r3, #8388608
	ldr	r2, [fp, #-12]
	lsl	r2, r2, #23
	orr	r3, r3, r2
.L35:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	floatScale2, .-floatScale2
	.align	2
	.global	floatFloat2Int
	.syntax unified
	.arm
	.fpu softvfp
	.type	floatFloat2Int, %function
floatFloat2Int:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #28
	str	r0, [fp, #-24]
	ldr	r3, [fp, #-24]
	lsr	r3, r3, #31
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-24]
	lsr	r3, r3, #23
	and	r3, r3, #255
	sub	r3, r3, #127
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-24]
	bic	r3, r3, #-16777216
	bic	r3, r3, #8388608
	orr	r3, r3, #8388608
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-24]
	bic	r3, r3, #-2147483648
	cmp	r3, #0
	bne	.L39
	mov	r3, #0
	b	.L40
.L39:
	ldr	r3, [fp, #-8]
	cmp	r3, #31
	ble	.L41
	mov	r3, #-2147483648
	b	.L40
.L41:
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	bge	.L42
	mov	r3, #0
	b	.L40
.L42:
	ldr	r3, [fp, #-8]
	cmp	r3, #23
	ble	.L43
	ldr	r3, [fp, #-8]
	sub	r3, r3, #23
	ldr	r2, [fp, #-16]
	lsl	r3, r2, r3
	str	r3, [fp, #-16]
	b	.L44
.L43:
	ldr	r3, [fp, #-8]
	rsb	r3, r3, #23
	ldr	r2, [fp, #-16]
	asr	r3, r2, r3
	str	r3, [fp, #-16]
.L44:
	ldr	r3, [fp, #-16]
	asr	r3, r3, #31
	ldr	r2, [fp, #-12]
	cmp	r2, r3
	bne	.L45
	ldr	r3, [fp, #-16]
	b	.L40
.L45:
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bge	.L46
	mov	r3, #-2147483648
	b	.L40
.L46:
	ldr	r3, [fp, #-16]
	rsb	r3, r3, #0
.L40:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	floatFloat2Int, .-floatFloat2Int
	.align	2
	.global	floatPower2
	.syntax unified
	.arm
	.fpu softvfp
	.type	floatPower2, %function
floatPower2:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	ldr	r3, .L51
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-16]
	add	r3, r3, #127
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bge	.L48
	mov	r3, #0
	b	.L49
.L48:
	ldr	r3, [fp, #-8]
	cmp	r3, #254
	ble	.L50
	ldr	r3, [fp, #-12]
	b	.L49
.L50:
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #23
.L49:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L52:
	.align	2
.L51:
	.word	2139095040
	.size	floatPower2, .-floatPower2
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
