	.file	"242329972.c"
	.intel_syntax noprefix
	.text
	.section	.rodata
.LC1:
	.string	"Enter the no.of processes:"
.LC2:
	.string	"%d"
.LC3:
	.string	"Enter the processes-->"
.LC4:
	.string	"Enter process id: "
.LC5:
	.string	"Enter arrival time: "
.LC6:
	.string	"Enter burst time: "
.LC7:
	.string	"Enter priority:"
.LC8:
	.string	"\nPId\tAT\tBT\tP\tTT\tWT"
.LC9:
	.string	"P%d\t%d\t%d\t%d\t%d\t%d\n"
.LC10:
	.string	"\nGantt chart:"
.LC11:
	.string	"----------------"
.LC12:
	.string	"|\tP%d\t"
.LC13:
	.string	"|"
.LC14:
	.string	"%d\t\t"
.LC15:
	.string	"%d\n\n"
	.align 8
.LC16:
	.string	"Average turnaround time: %.2f\n"
.LC17:
	.string	"Average waiting time: %.2f\n"
	.text
	.globl	main
	.type	main, @function
main:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	lea	r11, -40960[rsp]
.LPSRL0:
	sub	rsp, 4096
	or	DWORD PTR [rsp], 0
	cmp	rsp, r11
	jne	.LPSRL0
	sub	rsp, 704
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -41640[rbp], 0
	mov	DWORD PTR -41628[rbp], 1
	pxor	xmm0, xmm0
	movss	DWORD PTR -41624[rbp], xmm0
	pxor	xmm0, xmm0
	movss	DWORD PTR -41620[rbp], xmm0
	lea	rdi, .LC1[rip]
	call	puts@PLT
	lea	rax, -41652[rbp]
	mov	rsi, rax
	lea	rdi, .LC2[rip]
	mov	eax, 0
	call	__isoc99_scanf@PLT
	lea	rdi, .LC3[rip]
	call	puts@PLT
	mov	DWORD PTR -41648[rbp], 0
	jmp	.L2
.L3:
	lea	rdi, .LC4[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdx, -41616[rbp]
	mov	eax, DWORD PTR -41648[rbp]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	rsi, rax
	lea	rdi, .LC2[rip]
	mov	eax, 0
	call	__isoc99_scanf@PLT
	lea	rdi, .LC5[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdx, -40816[rbp]
	mov	eax, DWORD PTR -41648[rbp]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	rsi, rax
	lea	rdi, .LC2[rip]
	mov	eax, 0
	call	__isoc99_scanf@PLT
	lea	rdi, .LC6[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdx, -41216[rbp]
	mov	eax, DWORD PTR -41648[rbp]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	rsi, rax
	lea	rdi, .LC2[rip]
	mov	eax, 0
	call	__isoc99_scanf@PLT
	lea	rdi, .LC7[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdx, -40416[rbp]
	mov	eax, DWORD PTR -41648[rbp]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	rsi, rax
	lea	rdi, .LC2[rip]
	mov	eax, 0
	call	__isoc99_scanf@PLT
	add	DWORD PTR -41648[rbp], 1
.L2:
	mov	eax, DWORD PTR -41652[rbp]
	cmp	DWORD PTR -41648[rbp], eax
	jl	.L3
	mov	DWORD PTR -41648[rbp], 0
	jmp	.L4
.L8:
	mov	DWORD PTR -41644[rbp], 0
	jmp	.L5
.L7:
	mov	eax, DWORD PTR -41644[rbp]
	cdqe
	mov	edx, DWORD PTR -40816[rbp+rax*4]
	mov	eax, DWORD PTR -41644[rbp]
	add	eax, 1
	cdqe
	mov	eax, DWORD PTR -40816[rbp+rax*4]
	cmp	edx, eax
	jle	.L6
	mov	eax, DWORD PTR -41644[rbp]
	add	eax, 1
	lea	rdx, -40816[rbp]
	cdqe
	sal	rax, 2
	add	rdx, rax
	lea	rcx, -40816[rbp]
	mov	eax, DWORD PTR -41644[rbp]
	cdqe
	sal	rax, 2
	add	rax, rcx
	mov	rsi, rdx
	mov	rdi, rax
	mov	eax, 0
	call	swap
	mov	eax, DWORD PTR -41644[rbp]
	add	eax, 1
	lea	rdx, -41616[rbp]
	cdqe
	sal	rax, 2
	add	rdx, rax
	lea	rcx, -41616[rbp]
	mov	eax, DWORD PTR -41644[rbp]
	cdqe
	sal	rax, 2
	add	rax, rcx
	mov	rsi, rdx
	mov	rdi, rax
	mov	eax, 0
	call	swap
	mov	eax, DWORD PTR -41644[rbp]
	add	eax, 1
	lea	rdx, -41216[rbp]
	cdqe
	sal	rax, 2
	add	rdx, rax
	lea	rcx, -41216[rbp]
	mov	eax, DWORD PTR -41644[rbp]
	cdqe
	sal	rax, 2
	add	rax, rcx
	mov	rsi, rdx
	mov	rdi, rax
	mov	eax, 0
	call	swap
	mov	eax, DWORD PTR -41644[rbp]
	add	eax, 1
	lea	rdx, -40416[rbp]
	cdqe
	sal	rax, 2
	add	rdx, rax
	lea	rcx, -40416[rbp]
	mov	eax, DWORD PTR -41644[rbp]
	cdqe
	sal	rax, 2
	add	rax, rcx
	mov	rsi, rdx
	mov	rdi, rax
	mov	eax, 0
	call	swap
.L6:
	add	DWORD PTR -41644[rbp], 1
.L5:
	mov	eax, DWORD PTR -41652[rbp]
	sub	eax, DWORD PTR -41648[rbp]
	sub	eax, 1
	cmp	DWORD PTR -41644[rbp], eax
	jl	.L7
	add	DWORD PTR -41648[rbp], 1
.L4:
	mov	eax, DWORD PTR -41652[rbp]
	sub	eax, 1
	cmp	DWORD PTR -41648[rbp], eax
	jl	.L8
	mov	edx, DWORD PTR -41616[rbp]
	mov	eax, DWORD PTR -41640[rbp]
	cdqe
	mov	DWORD PTR -40016[rbp+rax*4], edx
	mov	eax, DWORD PTR -40816[rbp]
	mov	edx, DWORD PTR -41640[rbp]
	movsx	rdx, edx
	add	rdx, 100
	mov	DWORD PTR -40016[rbp+rdx*4], eax
	mov	eax, DWORD PTR -41216[rbp]
	mov	edx, DWORD PTR -41640[rbp]
	movsx	rdx, edx
	add	rdx, 200
	mov	DWORD PTR -40016[rbp+rdx*4], eax
	mov	eax, DWORD PTR -40416[rbp]
	mov	edx, DWORD PTR -41640[rbp]
	movsx	rdx, edx
	add	rdx, 300
	mov	DWORD PTR -40016[rbp+rdx*4], eax
	mov	eax, DWORD PTR -41640[rbp]
	cdqe
	add	rax, 400
	mov	DWORD PTR -40016[rbp+rax*4], 0
	mov	eax, DWORD PTR -41216[rbp]
	mov	DWORD PTR -41636[rbp], eax
	mov	eax, DWORD PTR -41640[rbp]
	lea	edx, 1[rax]
	mov	DWORD PTR -41640[rbp], edx
	cdqe
	lea	rdx, 500[rax]
	mov	eax, DWORD PTR -41636[rbp]
	mov	DWORD PTR -40016[rbp+rdx*4], eax
	mov	DWORD PTR -41648[rbp], 1
	mov	eax, DWORD PTR -41648[rbp]
	mov	DWORD PTR -41644[rbp], eax
	jmp	.L9
.L12:
	mov	eax, DWORD PTR -41644[rbp]
	cdqe
	mov	eax, DWORD PTR -40816[rbp+rax*4]
	cmp	DWORD PTR -41636[rbp], eax
	jl	.L11
	mov	eax, DWORD PTR -41652[rbp]
	cmp	DWORD PTR -41640[rbp], eax
	jge	.L11
	mov	eax, DWORD PTR -41644[rbp]
	cdqe
	mov	edx, DWORD PTR -41616[rbp+rax*4]
	mov	eax, DWORD PTR -41640[rbp]
	cdqe
	mov	DWORD PTR -40016[rbp+rax*4], edx
	mov	eax, DWORD PTR -41644[rbp]
	cdqe
	mov	eax, DWORD PTR -40816[rbp+rax*4]
	mov	edx, DWORD PTR -41640[rbp]
	movsx	rdx, edx
	add	rdx, 100
	mov	DWORD PTR -40016[rbp+rdx*4], eax
	mov	eax, DWORD PTR -41644[rbp]
	cdqe
	mov	eax, DWORD PTR -41216[rbp+rax*4]
	mov	edx, DWORD PTR -41640[rbp]
	movsx	rdx, edx
	add	rdx, 200
	mov	DWORD PTR -40016[rbp+rdx*4], eax
	mov	eax, DWORD PTR -41640[rbp]
	lea	edx, 1[rax]
	mov	DWORD PTR -41640[rbp], edx
	mov	edx, DWORD PTR -41644[rbp]
	movsx	rdx, edx
	mov	edx, DWORD PTR -40416[rbp+rdx*4]
	cdqe
	add	rax, 300
	mov	DWORD PTR -40016[rbp+rax*4], edx
	add	DWORD PTR -41644[rbp], 1
.L10:
	mov	eax, DWORD PTR -41652[rbp]
	cmp	DWORD PTR -41644[rbp], eax
	jl	.L12
.L11:
	mov	eax, DWORD PTR -41628[rbp]
	mov	DWORD PTR -41632[rbp], eax
	jmp	.L13
.L17:
	mov	eax, DWORD PTR -41628[rbp]
	mov	DWORD PTR -41644[rbp], eax
	jmp	.L14
.L16:
	mov	eax, DWORD PTR -41644[rbp]
	cdqe
	add	rax, 300
	mov	edx, DWORD PTR -40016[rbp+rax*4]
	mov	eax, DWORD PTR -41644[rbp]
	add	eax, 1
	cdqe
	add	rax, 300
	mov	eax, DWORD PTR -40016[rbp+rax*4]
	cmp	edx, eax
	jle	.L15
	mov	eax, DWORD PTR -41644[rbp]
	add	eax, 1
	lea	rdx, -40016[rbp]
	cdqe
	sal	rax, 2
	add	rdx, rax
	lea	rcx, -40016[rbp]
	mov	eax, DWORD PTR -41644[rbp]
	cdqe
	sal	rax, 2
	add	rax, rcx
	mov	rsi, rdx
	mov	rdi, rax
	mov	eax, 0
	call	swap
	mov	eax, DWORD PTR -41644[rbp]
	add	eax, 1
	lea	rdx, -40016[rbp]
	cdqe
	add	rax, 100
	sal	rax, 2
	add	rdx, rax
	lea	rcx, -40016[rbp]
	mov	eax, DWORD PTR -41644[rbp]
	cdqe
	add	rax, 100
	sal	rax, 2
	add	rax, rcx
	mov	rsi, rdx
	mov	rdi, rax
	mov	eax, 0
	call	swap
	mov	eax, DWORD PTR -41644[rbp]
	add	eax, 1
	lea	rdx, -40016[rbp]
	cdqe
	add	rax, 200
	sal	rax, 2
	add	rdx, rax
	lea	rcx, -40016[rbp]
	mov	eax, DWORD PTR -41644[rbp]
	cdqe
	add	rax, 200
	sal	rax, 2
	add	rax, rcx
	mov	rsi, rdx
	mov	rdi, rax
	mov	eax, 0
	call	swap
	mov	eax, DWORD PTR -41644[rbp]
	add	eax, 1
	lea	rdx, -40016[rbp]
	cdqe
	add	rax, 300
	sal	rax, 2
	add	rdx, rax
	lea	rcx, -40016[rbp]
	mov	eax, DWORD PTR -41644[rbp]
	cdqe
	add	rax, 300
	sal	rax, 2
	add	rax, rcx
	mov	rsi, rdx
	mov	rdi, rax
	mov	eax, 0
	call	swap
.L15:
	add	DWORD PTR -41644[rbp], 1
.L14:
	mov	eax, DWORD PTR -41640[rbp]
	sub	eax, DWORD PTR -41632[rbp]
	lea	edx, -1[rax]
	mov	eax, DWORD PTR -41628[rbp]
	add	eax, edx
	cmp	DWORD PTR -41644[rbp], eax
	jl	.L16
	add	DWORD PTR -41632[rbp], 1
.L13:
	mov	eax, DWORD PTR -41640[rbp]
	lea	edx, -1[rax]
	mov	eax, DWORD PTR -41628[rbp]
	add	eax, edx
	cmp	DWORD PTR -41632[rbp], eax
	jl	.L17
	mov	eax, DWORD PTR -41648[rbp]
	cdqe
	lea	rdx, 400[rax]
	mov	eax, DWORD PTR -41636[rbp]
	mov	DWORD PTR -40016[rbp+rdx*4], eax
	mov	eax, DWORD PTR -41648[rbp]
	cdqe
	add	rax, 200
	mov	eax, DWORD PTR -40016[rbp+rax*4]
	add	DWORD PTR -41636[rbp], eax
	mov	eax, DWORD PTR -41648[rbp]
	cdqe
	lea	rdx, 500[rax]
	mov	eax, DWORD PTR -41636[rbp]
	mov	DWORD PTR -40016[rbp+rdx*4], eax
	mov	eax, DWORD PTR -41648[rbp]
	add	eax, 1
	mov	DWORD PTR -41628[rbp], eax
	mov	eax, DWORD PTR -41640[rbp]
	mov	DWORD PTR -41644[rbp], eax
	add	DWORD PTR -41648[rbp], 1
.L9:
	mov	eax, DWORD PTR -41652[rbp]
	cmp	DWORD PTR -41648[rbp], eax
	jl	.L10
	mov	DWORD PTR -41648[rbp], 0
	jmp	.L19
.L20:
	mov	eax, DWORD PTR -41648[rbp]
	cdqe
	add	rax, 400
	mov	eax, DWORD PTR -40016[rbp+rax*4]
	mov	edx, DWORD PTR -41648[rbp]
	movsx	rdx, edx
	add	rdx, 100
	mov	ecx, DWORD PTR -40016[rbp+rdx*4]
	sub	eax, ecx
	mov	edx, eax
	mov	eax, DWORD PTR -41648[rbp]
	cdqe
	add	rax, 700
	mov	DWORD PTR -40016[rbp+rax*4], edx
	mov	eax, DWORD PTR -41648[rbp]
	cdqe
	add	rax, 200
	mov	edx, DWORD PTR -40016[rbp+rax*4]
	mov	eax, DWORD PTR -41648[rbp]
	cdqe
	add	rax, 700
	mov	eax, DWORD PTR -40016[rbp+rax*4]
	add	edx, eax
	mov	eax, DWORD PTR -41648[rbp]
	cdqe
	add	rax, 600
	mov	DWORD PTR -40016[rbp+rax*4], edx
	add	DWORD PTR -41648[rbp], 1
.L19:
	mov	eax, DWORD PTR -41652[rbp]
	cmp	DWORD PTR -41648[rbp], eax
	jl	.L20
	lea	rdi, .LC8[rip]
	call	puts@PLT
	mov	DWORD PTR -41648[rbp], 0
	jmp	.L21
.L22:
	mov	eax, DWORD PTR -41648[rbp]
	cdqe
	add	rax, 700
	mov	esi, DWORD PTR -40016[rbp+rax*4]
	mov	eax, DWORD PTR -41648[rbp]
	cdqe
	add	rax, 600
	mov	r8d, DWORD PTR -40016[rbp+rax*4]
	mov	eax, DWORD PTR -41648[rbp]
	cdqe
	add	rax, 300
	mov	edi, DWORD PTR -40016[rbp+rax*4]
	mov	eax, DWORD PTR -41648[rbp]
	cdqe
	add	rax, 200
	mov	ecx, DWORD PTR -40016[rbp+rax*4]
	mov	eax, DWORD PTR -41648[rbp]
	cdqe
	add	rax, 100
	mov	edx, DWORD PTR -40016[rbp+rax*4]
	mov	eax, DWORD PTR -41648[rbp]
	cdqe
	mov	eax, DWORD PTR -40016[rbp+rax*4]
	sub	rsp, 8
	push	rsi
	mov	r9d, r8d
	mov	r8d, edi
	mov	esi, eax
	lea	rdi, .LC9[rip]
	mov	eax, 0
	call	printf@PLT
	add	rsp, 16
	add	DWORD PTR -41648[rbp], 1
.L21:
	mov	eax, DWORD PTR -41652[rbp]
	cmp	DWORD PTR -41648[rbp], eax
	jl	.L22
	lea	rdi, .LC10[rip]
	call	puts@PLT
	mov	DWORD PTR -41648[rbp], 0
	jmp	.L23
.L24:
	lea	rdi, .LC11[rip]
	mov	eax, 0
	call	printf@PLT
	add	DWORD PTR -41648[rbp], 1
.L23:
	mov	eax, DWORD PTR -41648[rbp]
	cmp	eax, DWORD PTR -41640[rbp]
	jl	.L24
	mov	edi, 10
	call	putchar@PLT
	mov	DWORD PTR -41648[rbp], 0
	jmp	.L25
.L26:
	mov	eax, DWORD PTR -41648[rbp]
	cdqe
	mov	eax, DWORD PTR -40016[rbp+rax*4]
	mov	esi, eax
	lea	rdi, .LC12[rip]
	mov	eax, 0
	call	printf@PLT
	add	DWORD PTR -41648[rbp], 1
.L25:
	mov	eax, DWORD PTR -41652[rbp]
	cmp	DWORD PTR -41648[rbp], eax
	jl	.L26
	lea	rdi, .LC13[rip]
	call	puts@PLT
	mov	DWORD PTR -41648[rbp], 0
	jmp	.L27
.L28:
	lea	rdi, .LC11[rip]
	mov	eax, 0
	call	printf@PLT
	add	DWORD PTR -41648[rbp], 1
.L27:
	mov	eax, DWORD PTR -41648[rbp]
	cmp	eax, DWORD PTR -41640[rbp]
	jl	.L28
	mov	edi, 10
	call	putchar@PLT
	mov	DWORD PTR -41648[rbp], 0
	jmp	.L29
.L30:
	mov	eax, DWORD PTR -41648[rbp]
	cdqe
	add	rax, 400
	mov	eax, DWORD PTR -40016[rbp+rax*4]
	mov	esi, eax
	lea	rdi, .LC14[rip]
	mov	eax, 0
	call	printf@PLT
	add	DWORD PTR -41648[rbp], 1
.L29:
	mov	eax, DWORD PTR -41648[rbp]
	cmp	eax, DWORD PTR -41640[rbp]
	jl	.L30
	mov	eax, DWORD PTR -41652[rbp]
	sub	eax, 1
	cdqe
	add	rax, 500
	mov	eax, DWORD PTR -40016[rbp+rax*4]
	mov	esi, eax
	lea	rdi, .LC15[rip]
	mov	eax, 0
	call	printf@PLT
	mov	DWORD PTR -41648[rbp], 0
	jmp	.L31
.L32:
	mov	eax, DWORD PTR -41648[rbp]
	cdqe
	add	rax, 700
	mov	eax, DWORD PTR -40016[rbp+rax*4]
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, eax
	movss	xmm1, DWORD PTR -41624[rbp]
	addss	xmm0, xmm1
	movss	DWORD PTR -41624[rbp], xmm0
	mov	eax, DWORD PTR -41648[rbp]
	cdqe
	add	rax, 600
	mov	eax, DWORD PTR -40016[rbp+rax*4]
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, eax
	movss	xmm1, DWORD PTR -41620[rbp]
	addss	xmm0, xmm1
	movss	DWORD PTR -41620[rbp], xmm0
	add	DWORD PTR -41648[rbp], 1
.L31:
	mov	eax, DWORD PTR -41652[rbp]
	cmp	DWORD PTR -41648[rbp], eax
	jl	.L32
	mov	eax, DWORD PTR -41652[rbp]
	pxor	xmm1, xmm1
	cvtsi2ss	xmm1, eax
	movss	xmm0, DWORD PTR -41624[rbp]
	divss	xmm0, xmm1
	movss	DWORD PTR -41624[rbp], xmm0
	mov	eax, DWORD PTR -41652[rbp]
	pxor	xmm1, xmm1
	cvtsi2ss	xmm1, eax
	movss	xmm0, DWORD PTR -41620[rbp]
	divss	xmm0, xmm1
	movss	DWORD PTR -41620[rbp], xmm0
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -41620[rbp]
	movq	rax, xmm2
	movq	xmm0, rax
	lea	rdi, .LC16[rip]
	mov	eax, 1
	call	printf@PLT
	pxor	xmm3, xmm3
	cvtss2sd	xmm3, DWORD PTR -41624[rbp]
	movq	rax, xmm3
	movq	xmm0, rax
	lea	rdi, .LC17[rip]
	mov	eax, 1
	call	printf@PLT
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L33
	call	__stack_chk_fail@PLT
.L33:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	main, .-main
	.globl	swap
	.type	swap, @function
swap:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	QWORD PTR -32[rbp], rsi
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -4[rbp], eax
	mov	rax, QWORD PTR -32[rbp]
	mov	edx, DWORD PTR [rax]
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	edx, DWORD PTR -4[rbp]
	mov	DWORD PTR [rax], edx
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	swap, .-swap
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"242329972.c"
	.text
	.section	.rodata
	.align	2
.LC0:
	.ascii	"Enter the no.of processes:\000"
	.align	2
.LC1:
	.ascii	"%d\000"
	.align	2
.LC2:
	.ascii	"Enter the processes-->\000"
	.align	2
.LC3:
	.ascii	"Enter process id: \000"
	.align	2
.LC4:
	.ascii	"Enter arrival time: \000"
	.align	2
.LC5:
	.ascii	"Enter burst time: \000"
	.align	2
.LC6:
	.ascii	"Enter priority:\000"
	.align	2
.LC7:
	.ascii	"\012PId\011AT\011BT\011P\011TT\011WT\000"
	.align	2
.LC8:
	.ascii	"P%d\011%d\011%d\011%d\011%d\011%d\012\000"
	.align	2
.LC9:
	.ascii	"\012Gantt chart:\000"
	.align	2
.LC10:
	.ascii	"----------------\000"
	.align	2
.LC11:
	.ascii	"|\011P%d\011\000"
	.align	2
.LC12:
	.ascii	"|\000"
	.align	2
.LC13:
	.ascii	"%d\011\011\000"
	.align	2
.LC14:
	.ascii	"%d\012\012\000"
	.global	__aeabi_i2f
	.global	__aeabi_fadd
	.global	__aeabi_fdiv
	.global	__aeabi_f2d
	.align	2
.LC15:
	.ascii	"Average turnaround time: %.2f\012\000"
	.align	2
.LC16:
	.ascii	"Average waiting time: %.2f\012\000"
	.align	2
.LC17:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 41640
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #41472
	sub	sp, sp, #188
	ldr	r3, .L34+68
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	mov	r3,#0
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-668]
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #1
	str	r3, [r2, #-656]
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-652]	@ float
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-648]	@ float
	ldr	r0, .L34
	bl	puts
	sub	r3, fp, #41472
	sub	r3, r3, #12
	sub	r3, r3, #168
	mov	r1, r3
	ldr	r0, .L34+4
	bl	__isoc99_scanf
	ldr	r0, .L34+8
	bl	puts
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-676]
	b	.L2
.L3:
	ldr	r0, .L34+12
	bl	printf
	sub	r3, fp, #41472
	sub	r3, r3, #12
	sub	r3, r3, #132
	sub	r2, fp, #40960
	sub	r2, r2, #12
	ldr	r2, [r2, #-676]
	lsl	r2, r2, #2
	add	r3, r3, r2
	mov	r1, r3
	ldr	r0, .L34+4
	bl	__isoc99_scanf
	ldr	r0, .L34+16
	bl	printf
	sub	r3, fp, #40704
	sub	r3, r3, #12
	sub	r3, r3, #100
	sub	r2, fp, #40960
	sub	r2, r2, #12
	ldr	r2, [r2, #-676]
	lsl	r2, r2, #2
	add	r3, r3, r2
	mov	r1, r3
	ldr	r0, .L34+4
	bl	__isoc99_scanf
	ldr	r0, .L34+20
	bl	printf
	sub	r3, fp, #40960
	sub	r3, r3, #12
	sub	r3, r3, #244
	sub	r2, fp, #40960
	sub	r2, r2, #12
	ldr	r2, [r2, #-676]
	lsl	r2, r2, #2
	add	r3, r3, r2
	mov	r1, r3
	ldr	r0, .L34+4
	bl	__isoc99_scanf
	ldr	r0, .L34+24
	bl	printf
	sub	r3, fp, #40192
	sub	r3, r3, #12
	sub	r3, r3, #212
	sub	r2, fp, #40960
	sub	r2, r2, #12
	ldr	r2, [r2, #-676]
	lsl	r2, r2, #2
	add	r3, r3, r2
	mov	r1, r3
	ldr	r0, .L34+4
	bl	__isoc99_scanf
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	add	r3, r3, #1
	str	r3, [r2, #-676]
.L2:
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-680]
	sub	r2, fp, #40960
	sub	r2, r2, #12
	ldr	r2, [r2, #-676]
	cmp	r2, r3
	blt	.L3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-676]
	b	.L4
.L8:
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-672]
	b	.L5
.L7:
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-672]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r2, [r3, #-3940]
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-672]
	add	r3, r3, #1
	sub	r1, fp, #36864
	sub	r1, r1, #12
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3, #-3940]
	cmp	r2, r3
	ble	.L6
	sub	r3, fp, #40704
	sub	r3, r3, #12
	sub	r3, r3, #100
	sub	r2, fp, #40960
	sub	r2, r2, #12
	ldr	r2, [r2, #-672]
	lsl	r2, r2, #2
	add	r0, r3, r2
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-672]
	add	r2, r3, #1
	sub	r3, fp, #40704
	sub	r3, r3, #12
	sub	r3, r3, #100
	lsl	r2, r2, #2
	add	r3, r3, r2
	mov	r1, r3
	bl	swap
	sub	r3, fp, #41472
	sub	r3, r3, #12
	sub	r3, r3, #132
	sub	r2, fp, #40960
	sub	r2, r2, #12
	ldr	r2, [r2, #-672]
	lsl	r2, r2, #2
	add	r0, r3, r2
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-672]
	add	r2, r3, #1
	sub	r3, fp, #41472
	sub	r3, r3, #12
	sub	r3, r3, #132
	lsl	r2, r2, #2
	add	r3, r3, r2
	mov	r1, r3
	bl	swap
	sub	r3, fp, #40960
	sub	r3, r3, #12
	sub	r3, r3, #244
	sub	r2, fp, #40960
	sub	r2, r2, #12
	ldr	r2, [r2, #-672]
	lsl	r2, r2, #2
	add	r0, r3, r2
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-672]
	add	r2, r3, #1
	sub	r3, fp, #40960
	sub	r3, r3, #12
	sub	r3, r3, #244
	lsl	r2, r2, #2
	add	r3, r3, r2
	mov	r1, r3
	bl	swap
	sub	r3, fp, #40192
	sub	r3, r3, #12
	sub	r3, r3, #212
	sub	r2, fp, #40960
	sub	r2, r2, #12
	ldr	r2, [r2, #-672]
	lsl	r2, r2, #2
	add	r0, r3, r2
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-672]
	add	r2, r3, #1
	sub	r3, fp, #40192
	sub	r3, r3, #12
	sub	r3, r3, #212
	lsl	r2, r2, #2
	add	r3, r3, r2
	mov	r1, r3
	bl	swap
.L6:
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-672]
	add	r3, r3, #1
	str	r3, [r2, #-672]
.L5:
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r2, [r3, #-680]
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	sub	r3, r2, r3
	sub	r3, r3, #1
	sub	r2, fp, #40960
	sub	r2, r2, #12
	ldr	r2, [r2, #-672]
	cmp	r2, r3
	blt	.L7
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	add	r3, r3, #1
	str	r3, [r2, #-676]
.L4:
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-680]
	sub	r3, r3, #1
	sub	r2, fp, #40960
	sub	r2, r2, #12
	ldr	r2, [r2, #-676]
	cmp	r2, r3
	blt	.L8
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r2, [r3, #-644]
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r1, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-668]
	lsl	r3, r3, #2
	add	r3, r1, r3
	str	r2, [r3, #-3140]
	sub	r3, fp, #36864
	sub	r3, r3, #12
	ldr	r2, [r3, #-3940]
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r1, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-668]
	add	r3, r3, #100
	lsl	r3, r3, #2
	add	r3, r1, r3
	str	r2, [r3, #-3140]
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r2, [r3, #-244]
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r1, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-668]
	add	r3, r3, #200
	lsl	r3, r3, #2
	add	r3, r1, r3
	str	r2, [r3, #-3140]
	sub	r3, fp, #36864
	sub	r3, r3, #12
	ldr	r2, [r3, #-3540]
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r1, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-668]
	add	r3, r3, #300
	lsl	r3, r3, #2
	add	r3, r1, r3
	str	r2, [r3, #-3140]
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-668]
	add	r3, r3, #400
	lsl	r3, r3, #2
	add	r3, r2, r3
	mov	r2, #0
	str	r2, [r3, #-3140]
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-244]
	str	r3, [r2, #-664]
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-668]
	sub	r2, fp, #40960
	sub	r2, r2, #12
	mov	r1, r2
	add	r2, r3, #1
	str	r2, [r1, #-668]
	sub	r2, fp, #36864
	sub	r2, r2, #12
	add	r3, r3, #500
	lsl	r3, r3, #2
	add	r3, r2, r3
	sub	r2, fp, #40960
	sub	r2, r2, #12
	ldr	r2, [r2, #-664]
	str	r2, [r3, #-3140]
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #1
	str	r3, [r2, #-676]
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	str	r3, [r2, #-672]
	b	.L9
.L12:
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-672]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3, #-3940]
	sub	r2, fp, #40960
	sub	r2, r2, #12
	ldr	r2, [r2, #-664]
	cmp	r2, r3
	blt	.L11
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-680]
	sub	r2, fp, #40960
	sub	r2, r2, #12
	ldr	r2, [r2, #-668]
	cmp	r2, r3
	bge	.L11
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-672]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r2, [r3, #-644]
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r1, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-668]
	lsl	r3, r3, #2
	add	r3, r1, r3
	str	r2, [r3, #-3140]
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-672]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r2, [r3, #-3940]
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r1, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-668]
	add	r3, r3, #100
	lsl	r3, r3, #2
	add	r3, r1, r3
	str	r2, [r3, #-3140]
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-672]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r2, [r3, #-244]
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r1, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-668]
	add	r3, r3, #200
	lsl	r3, r3, #2
	add	r3, r1, r3
	str	r2, [r3, #-3140]
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r2, [r3, #-668]
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r1, r3
	add	r3, r2, #1
	str	r3, [r1, #-668]
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r1, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-672]
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r1, [r3, #-3540]
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r0, r3
	add	r3, r2, #300
	lsl	r3, r3, #2
	add	r3, r0, r3
	str	r1, [r3, #-3140]
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-672]
	add	r3, r3, #1
	str	r3, [r2, #-672]
.L10:
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-680]
	sub	r2, fp, #40960
	sub	r2, r2, #12
	ldr	r2, [r2, #-672]
	cmp	r2, r3
	blt	.L12
.L11:
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-656]
	str	r3, [r2, #-660]
	b	.L13
.L17:
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-656]
	str	r3, [r2, #-672]
	b	.L14
.L16:
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-672]
	add	r3, r3, #300
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r2, [r3, #-3140]
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-672]
	add	r3, r3, #1
	sub	r1, fp, #36864
	sub	r1, r1, #12
	add	r3, r3, #300
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3, #-3140]
	cmp	r2, r3
	ble	.L15
	sub	r3, fp, #39936
	sub	r3, r3, #12
	sub	r3, r3, #68
	sub	r2, fp, #40960
	sub	r2, r2, #12
	ldr	r2, [r2, #-672]
	lsl	r2, r2, #2
	add	r0, r3, r2
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-672]
	add	r2, r3, #1
	sub	r3, fp, #39936
	sub	r3, r3, #12
	sub	r3, r3, #68
	lsl	r2, r2, #2
	add	r3, r3, r2
	mov	r1, r3
	bl	swap
	sub	r3, fp, #39936
	sub	r3, r3, #12
	sub	r3, r3, #68
	sub	r2, fp, #40960
	sub	r2, r2, #12
	ldr	r2, [r2, #-672]
	add	r2, r2, #100
	lsl	r2, r2, #2
	add	r0, r3, r2
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-672]
	add	r2, r3, #1
	sub	r3, fp, #39936
	sub	r3, r3, #12
	sub	r3, r3, #68
	add	r2, r2, #100
	lsl	r2, r2, #2
	add	r3, r3, r2
	mov	r1, r3
	bl	swap
	sub	r3, fp, #39936
	sub	r3, r3, #12
	sub	r3, r3, #68
	sub	r2, fp, #40960
	sub	r2, r2, #12
	ldr	r2, [r2, #-672]
	add	r2, r2, #200
	lsl	r2, r2, #2
	add	r0, r3, r2
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-672]
	add	r2, r3, #1
	sub	r3, fp, #39936
	sub	r3, r3, #12
	sub	r3, r3, #68
	add	r2, r2, #200
	lsl	r2, r2, #2
	add	r3, r3, r2
	mov	r1, r3
	bl	swap
	sub	r3, fp, #39936
	sub	r3, r3, #12
	sub	r3, r3, #68
	sub	r2, fp, #40960
	sub	r2, r2, #12
	ldr	r2, [r2, #-672]
	add	r2, r2, #300
	lsl	r2, r2, #2
	add	r0, r3, r2
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-672]
	add	r2, r3, #1
	sub	r3, fp, #39936
	sub	r3, r3, #12
	sub	r3, r3, #68
	add	r2, r2, #300
	lsl	r2, r2, #2
	add	r3, r3, r2
	mov	r1, r3
	bl	swap
.L15:
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-672]
	add	r3, r3, #1
	str	r3, [r2, #-672]
.L14:
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r2, [r2, #-668]
	ldr	r3, [r3, #-660]
	sub	r3, r2, r3
	sub	r2, r3, #1
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-656]
	add	r3, r2, r3
	sub	r2, fp, #40960
	sub	r2, r2, #12
	ldr	r2, [r2, #-672]
	cmp	r2, r3
	blt	.L16
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-660]
	add	r3, r3, #1
	str	r3, [r2, #-660]
.L13:
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-668]
	sub	r2, r3, #1
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-656]
	add	r3, r2, r3
	sub	r2, fp, #40960
	sub	r2, r2, #12
	ldr	r2, [r2, #-660]
	cmp	r2, r3
	blt	.L17
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	add	r3, r3, #400
	lsl	r3, r3, #2
	add	r3, r2, r3
	sub	r2, fp, #40960
	sub	r2, r2, #12
	ldr	r2, [r2, #-664]
	str	r2, [r3, #-3140]
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	add	r3, r3, #200
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3, #-3140]
	sub	r2, fp, #40960
	sub	r2, r2, #12
	mov	r1, r2
	sub	r2, fp, #40960
	sub	r2, r2, #12
	ldr	r2, [r2, #-664]
	add	r3, r2, r3
	str	r3, [r1, #-664]
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	add	r3, r3, #500
	lsl	r3, r3, #2
	add	r3, r2, r3
	sub	r2, fp, #40960
	sub	r2, r2, #12
	ldr	r2, [r2, #-664]
	str	r2, [r3, #-3140]
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	add	r3, r3, #1
	str	r3, [r2, #-656]
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-668]
	str	r3, [r2, #-672]
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	add	r3, r3, #1
	str	r3, [r2, #-676]
.L9:
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-680]
	sub	r2, fp, #40960
	sub	r2, r2, #12
	ldr	r2, [r2, #-676]
	cmp	r2, r3
	blt	.L10
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-676]
	b	.L19
.L20:
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	add	r3, r3, #400
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r2, [r3, #-3140]
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r1, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	add	r3, r3, #100
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3, #-3140]
	sub	r2, r2, r3
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r1, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	add	r3, r3, #700
	lsl	r3, r3, #2
	add	r3, r1, r3
	str	r2, [r3, #-3140]
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	add	r3, r3, #200
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r2, [r3, #-3140]
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r1, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	add	r3, r3, #700
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3, #-3140]
	add	r2, r2, r3
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r1, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	add	r3, r3, #600
	lsl	r3, r3, #2
	add	r3, r1, r3
	str	r2, [r3, #-3140]
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	add	r3, r3, #1
	str	r3, [r2, #-676]
.L19:
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-680]
	sub	r2, fp, #40960
	sub	r2, r2, #12
	ldr	r2, [r2, #-676]
	cmp	r2, r3
	blt	.L20
	ldr	r0, .L34+28
	bl	puts
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-676]
	b	.L21
.L22:
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r0, [r3, #-3140]
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	add	r3, r3, #100
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	ip, [r3, #-3140]
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	add	r3, r3, #200
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	lr, [r3, #-3140]
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	add	r3, r3, #300
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r2, [r3, #-3140]
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r1, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	add	r3, r3, #600
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r1, [r3, #-3140]
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r4, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	add	r3, r3, #700
	lsl	r3, r3, #2
	add	r3, r4, r3
	ldr	r3, [r3, #-3140]
	str	r3, [sp, #8]
	str	r1, [sp, #4]
	str	r2, [sp]
	mov	r3, lr
	mov	r2, ip
	mov	r1, r0
	ldr	r0, .L34+32
	bl	printf
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	add	r3, r3, #1
	str	r3, [r2, #-676]
.L21:
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-680]
	sub	r2, fp, #40960
	sub	r2, r2, #12
	ldr	r2, [r2, #-676]
	cmp	r2, r3
	blt	.L22
	ldr	r0, .L34+36
	bl	puts
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-676]
	b	.L23
.L24:
	ldr	r0, .L34+40
	bl	printf
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	add	r3, r3, #1
	str	r3, [r2, #-676]
.L23:
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r2, [r2, #-676]
	ldr	r3, [r3, #-668]
	cmp	r2, r3
	blt	.L24
	mov	r0, #10
	bl	putchar
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-676]
	b	.L25
.L26:
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3, #-3140]
	mov	r1, r3
	ldr	r0, .L34+44
	bl	printf
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	add	r3, r3, #1
	str	r3, [r2, #-676]
.L25:
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-680]
	sub	r2, fp, #40960
	sub	r2, r2, #12
	ldr	r2, [r2, #-676]
	cmp	r2, r3
	blt	.L26
	ldr	r0, .L34+48
	bl	puts
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-676]
	b	.L27
.L28:
	ldr	r0, .L34+40
	bl	printf
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	add	r3, r3, #1
	str	r3, [r2, #-676]
.L27:
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r2, [r2, #-676]
	ldr	r3, [r3, #-668]
	cmp	r2, r3
	blt	.L28
	mov	r0, #10
	bl	putchar
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-676]
	b	.L29
.L35:
	.align	2
.L34:
	.word	.LC0
	.word	.LC1
	.word	.LC2
	.word	.LC3
	.word	.LC4
	.word	.LC5
	.word	.LC6
	.word	.LC7
	.word	.LC8
	.word	.LC9
	.word	.LC10
	.word	.LC11
	.word	.LC12
	.word	.LC13
	.word	.LC14
	.word	.LC15
	.word	.LC16
	.word	.LC17
.L30:
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	add	r3, r3, #400
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3, #-3140]
	mov	r1, r3
	ldr	r0, .L34+52
	bl	printf
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	add	r3, r3, #1
	str	r3, [r2, #-676]
.L29:
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r2, [r2, #-676]
	ldr	r3, [r3, #-668]
	cmp	r2, r3
	blt	.L30
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-680]
	sub	r3, r3, #1
	sub	r2, fp, #36864
	sub	r2, r2, #12
	add	r3, r3, #500
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3, #-3140]
	mov	r1, r3
	ldr	r0, .L34+56
	bl	printf
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-676]
	b	.L31
.L32:
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	add	r3, r3, #700
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3, #-3140]
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r3, r0
	sub	r2, fp, #40960
	sub	r2, r2, #12
	mov	r4, r2
	sub	r2, fp, #40960
	sub	r2, r2, #12
	mov	r1, r3
	ldr	r0, [r2, #-652]	@ float
	bl	__aeabi_fadd
	mov	r3, r0
	str	r3, [r4, #-652]	@ float
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	add	r3, r3, #600
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3, #-3140]
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r3, r0
	sub	r2, fp, #40960
	sub	r2, r2, #12
	mov	r4, r2
	sub	r2, fp, #40960
	sub	r2, r2, #12
	mov	r1, r3
	ldr	r0, [r2, #-648]	@ float
	bl	__aeabi_fadd
	mov	r3, r0
	str	r3, [r4, #-648]	@ float
	sub	r3, fp, #40960
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-676]
	add	r3, r3, #1
	str	r3, [r2, #-676]
.L31:
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-680]
	sub	r2, fp, #40960
	sub	r2, r2, #12
	ldr	r2, [r2, #-676]
	cmp	r2, r3
	blt	.L32
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-680]
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r3, r0
	sub	r2, fp, #40960
	sub	r2, r2, #12
	mov	r4, r2
	sub	r2, fp, #40960
	sub	r2, r2, #12
	mov	r1, r3
	ldr	r0, [r2, #-652]	@ float
	bl	__aeabi_fdiv
	mov	r3, r0
	str	r3, [r4, #-652]	@ float
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r3, [r3, #-680]
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r3, r0
	sub	r2, fp, #40960
	sub	r2, r2, #12
	mov	r4, r2
	sub	r2, fp, #40960
	sub	r2, r2, #12
	mov	r1, r3
	ldr	r0, [r2, #-648]	@ float
	bl	__aeabi_fdiv
	mov	r3, r0
	str	r3, [r4, #-648]	@ float
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r0, [r3, #-648]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L34+60
	bl	printf
	sub	r3, fp, #40960
	sub	r3, r3, #12
	ldr	r0, [r3, #-652]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L34+64
	bl	printf
	nop
	ldr	r3, .L34+68
	ldr	r2, [r3]
	ldr	r3, [fp, #-16]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L33
	bl	__stack_chk_fail
.L33:
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
	.size	main, .-main
	.align	2
	.global	swap
	.syntax unified
	.arm
	.fpu softvfp
	.type	swap, %function
swap:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	ldr	r3, [fp, #-16]
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-20]
	ldr	r2, [r3]
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	ldr	r2, [fp, #-8]
	str	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	swap, .-swap
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
