	.file	"96948.c"
	.intel_syntax noprefix
	.text
	.globl	int8_to_float32
	.type	int8_to_float32, @function
int8_to_float32:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	BYTE PTR -4[rbp], al
	movsx	eax, BYTE PTR -4[rbp]
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, eax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	int8_to_float32, .-int8_to_float32
	.globl	int8_to_float64
	.type	int8_to_float64, @function
int8_to_float64:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	BYTE PTR -4[rbp], al
	movsx	eax, BYTE PTR -4[rbp]
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, eax
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	int8_to_float64, .-int8_to_float64
	.globl	int16_to_float32
	.type	int16_to_float32, @function
int16_to_float32:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	WORD PTR -4[rbp], ax
	movsx	eax, WORD PTR -4[rbp]
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, eax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	int16_to_float32, .-int16_to_float32
	.globl	int16_to_float64
	.type	int16_to_float64, @function
int16_to_float64:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	WORD PTR -4[rbp], ax
	movsx	eax, WORD PTR -4[rbp]
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, eax
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	int16_to_float64, .-int16_to_float64
	.globl	int32_to_float32
	.type	int32_to_float32, @function
int32_to_float32:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	int32_to_float32, .-int32_to_float32
	.globl	int32_to_float64
	.type	int32_to_float64, @function
int32_to_float64:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, DWORD PTR -4[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	int32_to_float64, .-int32_to_float64
	.globl	int64_to_float32
	.type	int64_to_float32, @function
int64_to_float32:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	int64_to_float32, .-int64_to_float32
	.globl	int64_to_float64
	.type	int64_to_float64, @function
int64_to_float64:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, QWORD PTR -8[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	int64_to_float64, .-int64_to_float64
	.globl	uint8_to_float32
	.type	uint8_to_float32, @function
uint8_to_float32:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	BYTE PTR -4[rbp], al
	movzx	eax, BYTE PTR -4[rbp]
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, eax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	uint8_to_float32, .-uint8_to_float32
	.globl	uint8_to_float64
	.type	uint8_to_float64, @function
uint8_to_float64:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	BYTE PTR -4[rbp], al
	movzx	eax, BYTE PTR -4[rbp]
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, eax
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	uint8_to_float64, .-uint8_to_float64
	.globl	uint16_to_float32
	.type	uint16_to_float32, @function
uint16_to_float32:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	WORD PTR -4[rbp], ax
	movzx	eax, WORD PTR -4[rbp]
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, eax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	uint16_to_float32, .-uint16_to_float32
	.globl	uint16_to_float64
	.type	uint16_to_float64, @function
uint16_to_float64:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	WORD PTR -4[rbp], ax
	movzx	eax, WORD PTR -4[rbp]
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, eax
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	uint16_to_float64, .-uint16_to_float64
	.globl	uint32_to_float32
	.type	uint32_to_float32, @function
uint32_to_float32:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	test	rax, rax
	js	.L26
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, rax
	jmp	.L28
.L26:
	mov	rdx, rax
	shr	rdx
	and	eax, 1
	or	rdx, rax
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, rdx
	addss	xmm0, xmm0
.L28:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	uint32_to_float32, .-uint32_to_float32
	.globl	uint32_to_float64
	.type	uint32_to_float64, @function
uint32_to_float64:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	test	rax, rax
	js	.L30
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rax
	jmp	.L32
.L30:
	mov	rdx, rax
	shr	rdx
	and	eax, 1
	or	rdx, rax
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rdx
	addsd	xmm0, xmm0
.L32:
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	uint32_to_float64, .-uint32_to_float64
	.globl	uint64_to_float32
	.type	uint64_to_float32, @function
uint64_to_float32:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	test	rax, rax
	js	.L34
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, rax
	jmp	.L36
.L34:
	mov	rdx, rax
	shr	rdx
	and	eax, 1
	or	rdx, rax
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, rdx
	addss	xmm0, xmm0
.L36:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	uint64_to_float32, .-uint64_to_float32
	.globl	uint64_to_float64
	.type	uint64_to_float64, @function
uint64_to_float64:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	test	rax, rax
	js	.L38
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rax
	jmp	.L40
.L38:
	mov	rdx, rax
	shr	rdx
	and	eax, 1
	or	rdx, rax
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rdx
	addsd	xmm0, xmm0
.L40:
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	uint64_to_float64, .-uint64_to_float64
	.globl	float32_to_int8
	.type	float32_to_int8, @function
float32_to_int8:
.LFB16:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	xmm0, DWORD PTR -4[rbp]
	cvttss2si	eax, xmm0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE16:
	.size	float32_to_int8, .-float32_to_int8
	.globl	float32_to_int16
	.type	float32_to_int16, @function
float32_to_int16:
.LFB17:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	xmm0, DWORD PTR -4[rbp]
	cvttss2si	eax, xmm0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE17:
	.size	float32_to_int16, .-float32_to_int16
	.globl	float32_to_int32
	.type	float32_to_int32, @function
float32_to_int32:
.LFB18:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	xmm0, DWORD PTR -4[rbp]
	cvttss2si	eax, xmm0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE18:
	.size	float32_to_int32, .-float32_to_int32
	.globl	float32_to_int64
	.type	float32_to_int64, @function
float32_to_int64:
.LFB19:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	xmm0, DWORD PTR -4[rbp]
	cvttss2si	rax, xmm0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE19:
	.size	float32_to_int64, .-float32_to_int64
	.globl	float32_to_uint8
	.type	float32_to_uint8, @function
float32_to_uint8:
.LFB20:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	cvttss2si	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE20:
	.size	float32_to_uint8, .-float32_to_uint8
	.globl	float32_to_uint16
	.type	float32_to_uint16, @function
float32_to_uint16:
.LFB21:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	cvttss2si	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE21:
	.size	float32_to_uint16, .-float32_to_uint16
	.globl	float32_to_uint32
	.type	float32_to_uint32, @function
float32_to_uint32:
.LFB22:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	xmm0, DWORD PTR -4[rbp]
	cvttss2si	rax, xmm0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE22:
	.size	float32_to_uint32, .-float32_to_uint32
	.globl	float32_to_uint64
	.type	float32_to_uint64, @function
float32_to_uint64:
.LFB23:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	xmm0, DWORD PTR -4[rbp]
	comiss	xmm0, DWORD PTR .LC0[rip]
	jnb	.L56
	movss	xmm0, DWORD PTR -4[rbp]
	cvttss2si	rax, xmm0
	jmp	.L57
.L56:
	movss	xmm0, DWORD PTR -4[rbp]
	movss	xmm1, DWORD PTR .LC0[rip]
	subss	xmm0, xmm1
	cvttss2si	rax, xmm0
	movabs	rdx, -9223372036854775808
	xor	rax, rdx
.L57:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE23:
	.size	float32_to_uint64, .-float32_to_uint64
	.globl	float64_to_int8
	.type	float64_to_int8, @function
float64_to_int8:
.LFB24:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	xmm0, QWORD PTR -8[rbp]
	cvttsd2si	eax, xmm0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE24:
	.size	float64_to_int8, .-float64_to_int8
	.globl	float64_to_int16
	.type	float64_to_int16, @function
float64_to_int16:
.LFB25:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	xmm0, QWORD PTR -8[rbp]
	cvttsd2si	eax, xmm0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE25:
	.size	float64_to_int16, .-float64_to_int16
	.globl	float64_to_int32
	.type	float64_to_int32, @function
float64_to_int32:
.LFB26:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	xmm0, QWORD PTR -8[rbp]
	cvttsd2si	eax, xmm0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE26:
	.size	float64_to_int32, .-float64_to_int32
	.globl	float64_to_int64
	.type	float64_to_int64, @function
float64_to_int64:
.LFB27:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	xmm0, QWORD PTR -8[rbp]
	cvttsd2si	rax, xmm0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE27:
	.size	float64_to_int64, .-float64_to_int64
	.globl	float64_to_uint8
	.type	float64_to_uint8, @function
float64_to_uint8:
.LFB28:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	cvttsd2si	eax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE28:
	.size	float64_to_uint8, .-float64_to_uint8
	.globl	float64_to_uint16
	.type	float64_to_uint16, @function
float64_to_uint16:
.LFB29:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	cvttsd2si	eax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE29:
	.size	float64_to_uint16, .-float64_to_uint16
	.globl	float64_to_uint32
	.type	float64_to_uint32, @function
float64_to_uint32:
.LFB30:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	xmm0, QWORD PTR -8[rbp]
	cvttsd2si	rax, xmm0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE30:
	.size	float64_to_uint32, .-float64_to_uint32
	.globl	float64_to_uint64
	.type	float64_to_uint64, @function
float64_to_uint64:
.LFB31:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	xmm0, QWORD PTR -8[rbp]
	comisd	xmm0, QWORD PTR .LC1[rip]
	jnb	.L74
	movsd	xmm0, QWORD PTR -8[rbp]
	cvttsd2si	rax, xmm0
	jmp	.L75
.L74:
	movsd	xmm0, QWORD PTR -8[rbp]
	movsd	xmm1, QWORD PTR .LC1[rip]
	subsd	xmm0, xmm1
	cvttsd2si	rax, xmm0
	movabs	rdx, -9223372036854775808
	xor	rax, rdx
.L75:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE31:
	.size	float64_to_uint64, .-float64_to_uint64
	.section	.rodata
	.align 4
.LC0:
	.long	1593835520
	.align 8
.LC1:
	.long	0
	.long	1138753536
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"96948.c"
	.text
	.global	__aeabi_i2f
	.align	2
	.global	int8_to_float32
	.syntax unified
	.arm
	.fpu softvfp
	.type	int8_to_float32, %function
int8_to_float32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrsb	r3, [fp, #-5]
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	int8_to_float32, .-int8_to_float32
	.global	__aeabi_i2d
	.align	2
	.global	int8_to_float64
	.syntax unified
	.arm
	.fpu softvfp
	.type	int8_to_float64, %function
int8_to_float64:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrsb	r3, [fp, #-5]
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	int8_to_float64, .-int8_to_float64
	.align	2
	.global	int16_to_float32
	.syntax unified
	.arm
	.fpu softvfp
	.type	int16_to_float32, %function
int16_to_float32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	strh	r3, [fp, #-6]	@ movhi
	ldrsh	r3, [fp, #-6]
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	int16_to_float32, .-int16_to_float32
	.align	2
	.global	int16_to_float64
	.syntax unified
	.arm
	.fpu softvfp
	.type	int16_to_float64, %function
int16_to_float64:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	strh	r3, [fp, #-6]	@ movhi
	ldrsh	r3, [fp, #-6]
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	int16_to_float64, .-int16_to_float64
	.align	2
	.global	int32_to_float32
	.syntax unified
	.arm
	.fpu softvfp
	.type	int32_to_float32, %function
int32_to_float32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r0, [fp, #-8]
	bl	__aeabi_i2f
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	int32_to_float32, .-int32_to_float32
	.align	2
	.global	int32_to_float64
	.syntax unified
	.arm
	.fpu softvfp
	.type	int32_to_float64, %function
int32_to_float64:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r0, [fp, #-8]
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	int32_to_float64, .-int32_to_float64
	.global	__aeabi_l2f
	.align	2
	.global	int64_to_float32
	.syntax unified
	.arm
	.fpu softvfp
	.type	int64_to_float32, %function
int64_to_float32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_l2f
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	int64_to_float32, .-int64_to_float32
	.global	__aeabi_l2d
	.align	2
	.global	int64_to_float64
	.syntax unified
	.arm
	.fpu softvfp
	.type	int64_to_float64, %function
int64_to_float64:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_l2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	int64_to_float64, .-int64_to_float64
	.global	__aeabi_ui2f
	.align	2
	.global	uint8_to_float32
	.syntax unified
	.arm
	.fpu softvfp
	.type	uint8_to_float32, %function
uint8_to_float32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	bl	__aeabi_ui2f
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	uint8_to_float32, .-uint8_to_float32
	.global	__aeabi_ui2d
	.align	2
	.global	uint8_to_float64
	.syntax unified
	.arm
	.fpu softvfp
	.type	uint8_to_float64, %function
uint8_to_float64:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	bl	__aeabi_ui2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	uint8_to_float64, .-uint8_to_float64
	.align	2
	.global	uint16_to_float32
	.syntax unified
	.arm
	.fpu softvfp
	.type	uint16_to_float32, %function
uint16_to_float32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	strh	r3, [fp, #-6]	@ movhi
	ldrh	r3, [fp, #-6]
	mov	r0, r3
	bl	__aeabi_ui2f
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	uint16_to_float32, .-uint16_to_float32
	.align	2
	.global	uint16_to_float64
	.syntax unified
	.arm
	.fpu softvfp
	.type	uint16_to_float64, %function
uint16_to_float64:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	strh	r3, [fp, #-6]	@ movhi
	ldrh	r3, [fp, #-6]
	mov	r0, r3
	bl	__aeabi_ui2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	uint16_to_float64, .-uint16_to_float64
	.align	2
	.global	uint32_to_float32
	.syntax unified
	.arm
	.fpu softvfp
	.type	uint32_to_float32, %function
uint32_to_float32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r0, [fp, #-8]
	bl	__aeabi_ui2f
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	uint32_to_float32, .-uint32_to_float32
	.align	2
	.global	uint32_to_float64
	.syntax unified
	.arm
	.fpu softvfp
	.type	uint32_to_float64, %function
uint32_to_float64:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r0, [fp, #-8]
	bl	__aeabi_ui2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	uint32_to_float64, .-uint32_to_float64
	.global	__aeabi_ul2f
	.align	2
	.global	uint64_to_float32
	.syntax unified
	.arm
	.fpu softvfp
	.type	uint64_to_float32, %function
uint64_to_float32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_ul2f
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	uint64_to_float32, .-uint64_to_float32
	.global	__aeabi_ul2d
	.align	2
	.global	uint64_to_float64
	.syntax unified
	.arm
	.fpu softvfp
	.type	uint64_to_float64, %function
uint64_to_float64:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_ul2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	uint64_to_float64, .-uint64_to_float64
	.global	__aeabi_f2iz
	.align	2
	.global	float32_to_int8
	.syntax unified
	.arm
	.fpu softvfp
	.type	float32_to_int8, %function
float32_to_int8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]	@ float
	ldr	r0, [fp, #-8]	@ float
	bl	__aeabi_f2iz
	mov	r3, r0
	lsl	r3, r3, #24
	asr	r3, r3, #24
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	float32_to_int8, .-float32_to_int8
	.align	2
	.global	float32_to_int16
	.syntax unified
	.arm
	.fpu softvfp
	.type	float32_to_int16, %function
float32_to_int16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]	@ float
	ldr	r0, [fp, #-8]	@ float
	bl	__aeabi_f2iz
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	float32_to_int16, .-float32_to_int16
	.align	2
	.global	float32_to_int32
	.syntax unified
	.arm
	.fpu softvfp
	.type	float32_to_int32, %function
float32_to_int32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]	@ float
	ldr	r0, [fp, #-8]	@ float
	bl	__aeabi_f2iz
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	float32_to_int32, .-float32_to_int32
	.global	__aeabi_f2lz
	.align	2
	.global	float32_to_int64
	.syntax unified
	.arm
	.fpu softvfp
	.type	float32_to_int64, %function
float32_to_int64:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]	@ float
	ldr	r0, [fp, #-8]	@ float
	bl	__aeabi_f2lz
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	float32_to_int64, .-float32_to_int64
	.global	__aeabi_f2uiz
	.align	2
	.global	float32_to_uint8
	.syntax unified
	.arm
	.fpu softvfp
	.type	float32_to_uint8, %function
float32_to_uint8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]	@ float
	ldr	r0, [fp, #-8]	@ float
	bl	__aeabi_f2uiz
	mov	r3, r0
	and	r3, r3, #255
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	float32_to_uint8, .-float32_to_uint8
	.align	2
	.global	float32_to_uint16
	.syntax unified
	.arm
	.fpu softvfp
	.type	float32_to_uint16, %function
float32_to_uint16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]	@ float
	ldr	r0, [fp, #-8]	@ float
	bl	__aeabi_f2uiz
	mov	r3, r0
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	float32_to_uint16, .-float32_to_uint16
	.align	2
	.global	float32_to_uint32
	.syntax unified
	.arm
	.fpu softvfp
	.type	float32_to_uint32, %function
float32_to_uint32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]	@ float
	ldr	r0, [fp, #-8]	@ float
	bl	__aeabi_f2uiz
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	float32_to_uint32, .-float32_to_uint32
	.global	__aeabi_f2ulz
	.align	2
	.global	float32_to_uint64
	.syntax unified
	.arm
	.fpu softvfp
	.type	float32_to_uint64, %function
float32_to_uint64:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]	@ float
	ldr	r0, [fp, #-8]	@ float
	bl	__aeabi_f2ulz
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	float32_to_uint64, .-float32_to_uint64
	.global	__aeabi_d2iz
	.align	2
	.global	float64_to_int8
	.syntax unified
	.arm
	.fpu softvfp
	.type	float64_to_int8, %function
float64_to_int8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_d2iz
	mov	r3, r0
	lsl	r3, r3, #24
	asr	r3, r3, #24
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	float64_to_int8, .-float64_to_int8
	.align	2
	.global	float64_to_int16
	.syntax unified
	.arm
	.fpu softvfp
	.type	float64_to_int16, %function
float64_to_int16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_d2iz
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	float64_to_int16, .-float64_to_int16
	.align	2
	.global	float64_to_int32
	.syntax unified
	.arm
	.fpu softvfp
	.type	float64_to_int32, %function
float64_to_int32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_d2iz
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	float64_to_int32, .-float64_to_int32
	.global	__aeabi_d2lz
	.align	2
	.global	float64_to_int64
	.syntax unified
	.arm
	.fpu softvfp
	.type	float64_to_int64, %function
float64_to_int64:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_d2lz
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	float64_to_int64, .-float64_to_int64
	.global	__aeabi_d2uiz
	.align	2
	.global	float64_to_uint8
	.syntax unified
	.arm
	.fpu softvfp
	.type	float64_to_uint8, %function
float64_to_uint8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_d2uiz
	mov	r3, r0
	and	r3, r3, #255
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	float64_to_uint8, .-float64_to_uint8
	.align	2
	.global	float64_to_uint16
	.syntax unified
	.arm
	.fpu softvfp
	.type	float64_to_uint16, %function
float64_to_uint16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_d2uiz
	mov	r3, r0
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	float64_to_uint16, .-float64_to_uint16
	.align	2
	.global	float64_to_uint32
	.syntax unified
	.arm
	.fpu softvfp
	.type	float64_to_uint32, %function
float64_to_uint32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_d2uiz
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	float64_to_uint32, .-float64_to_uint32
	.global	__aeabi_d2ulz
	.align	2
	.global	float64_to_uint64
	.syntax unified
	.arm
	.fpu softvfp
	.type	float64_to_uint64, %function
float64_to_uint64:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_d2ulz
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	float64_to_uint64, .-float64_to_uint64
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
