	.file	"93887724.c"
	.intel_syntax noprefix
	.text
	.globl	init
	.type	init, @function
init:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	init, .-init
	.globl	inbuffer
	.type	inbuffer, @function
inbuffer:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r15
	push	r14
	push	r13
	push	r12
	push	rbx
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	mov	r12d, 0
	mov	ebx, 0
	mov	r14d, 0
	mov	r13d, 0
	mov	r15d, 0
	jmp	.L3
.L14:
	mov	eax, DWORD PTR isinbit[rip]
	cmp	eax, 1
	jne	.L4
	lea	eax, 1[rbx]
	cdq
	shr	edx, 24
	add	eax, edx
	movzx	eax, al
	sub	eax, edx
	cmp	r14d, eax
	je	.L4
	mov	eax, DWORD PTR inbit[rip]
	mov	ecx, eax
	lea	eax, 1[rbx]
	cdq
	shr	edx, 24
	add	eax, edx
	movzx	eax, al
	sub	eax, edx
	mov	ebx, eax
.L4:
	lea	eax, 1[rbx]
	cdq
	shr	edx, 24
	add	eax, edx
	movzx	eax, al
	sub	eax, edx
	cmp	r14d, eax
	jne	.L5
	mov	DWORD PTR isfull[rip], 1
	jmp	.L6
.L5:
	mov	DWORD PTR isfull[rip], 0
.L6:
	test	r12d, r12d
	jne	.L7
	mov	eax, DWORD PTR getbits[rip]
	test	eax, eax
	jle	.L8
	mov	eax, DWORD PTR getbits[rip]
	mov	DWORD PTR to_receive[rip], eax
	mov	r13d, r14d
	mov	r12d, 1
	jmp	.L8
.L7:
	cmp	r12d, 1
	jne	.L9
	jmp	.L10
.L12:
	mov	eax, ecx
	mov	DWORD PTR getinbuffer[rip], eax
	lea	eax, 1[r13]
	cdq
	shr	edx, 24
	add	eax, edx
	movzx	eax, al
	sub	eax, edx
	mov	r13d, eax
	mov	eax, DWORD PTR to_receive[rip]
	sub	eax, 1
	mov	DWORD PTR to_receive[rip], eax
.L10:
	mov	eax, DWORD PTR to_receive[rip]
	test	eax, eax
	je	.L11
	cmp	r13d, ebx
	jne	.L12
.L11:
	mov	eax, DWORD PTR to_receive[rip]
	test	eax, eax
	jne	.L8
	mov	r12d, 2
	jmp	.L8
.L9:
	cmp	r12d, 2
	jne	.L8
	mov	eax, DWORD PTR look_only[rip]
	test	eax, eax
	jne	.L13
	mov	r14d, r13d
.L13:
	mov	eax, DWORD PTR getbits[rip]
	test	eax, eax
	jne	.L8
	mov	DWORD PTR to_receive[rip], -1
	mov	r12d, 0
.L8:
	add	r15d, 1
.L3:
	cmp	r15d, 4
	jle	.L14
	nop
	nop
	pop	rbx
	pop	r12
	pop	r13
	pop	r14
	pop	r15
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	inbuffer, .-inbuffer
	.globl	read_bits
	.type	read_bits, @function
read_bits:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L16
	mov	DWORD PTR read_done[rip], 0
	mov	DWORD PTR look_only[rip], 0
	mov	eax, DWORD PTR -4[rbp]
	mov	DWORD PTR getbits[rip], eax
	jmp	.L18
.L16:
	mov	eax, DWORD PTR read_done[rip]
	test	eax, eax
	jne	.L18
	mov	eax, DWORD PTR to_receive[rip]
	test	eax, eax
	jne	.L18
	mov	eax, DWORD PTR getinbuffer[rip]
	mov	DWORD PTR read_int[rip], eax
	mov	DWORD PTR getbits[rip], 0
	mov	DWORD PTR read_done[rip], 1
.L18:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	read_bits, .-read_bits
	.globl	look_bits
	.type	look_bits, @function
look_bits:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L20
	mov	DWORD PTR read_done[rip], 0
	mov	DWORD PTR look_only[rip], 1
	mov	eax, DWORD PTR -4[rbp]
	mov	DWORD PTR getbits[rip], eax
	jmp	.L22
.L20:
	mov	eax, DWORD PTR read_done[rip]
	test	eax, eax
	jne	.L22
	mov	eax, DWORD PTR to_receive[rip]
	test	eax, eax
	jne	.L22
	mov	eax, DWORD PTR getinbuffer[rip]
	mov	DWORD PTR read_int[rip], eax
	mov	DWORD PTR getbits[rip], 0
	mov	DWORD PTR read_done[rip], 1
.L22:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	look_bits, .-look_bits
	.globl	next_vld
	.type	next_vld, @function
next_vld:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r12
	push	rbx
	.cfi_offset 12, -24
	.cfi_offset 3, -32
	mov	edx, edi
	mov	eax, esi
	mov	ecx, DWORD PTR vld_found[rip]
	test	ecx, ecx
	js	.L24
	mov	DWORD PTR vld_found[rip], -1
	sub	edx, 1
	mov	DWORD PTR vld_size[rip], edx
.L24:
	mov	edx, DWORD PTR vld_size[rip]
	cmp	eax, edx
	je	.L33
	mov	eax, DWORD PTR vld_size[rip]
	add	eax, 1
	mov	edi, eax
	call	look_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L23
	mov	eax, DWORD PTR vld_size[rip]
	add	eax, 1
	mov	DWORD PTR vld_size[rip], eax
	mov	ebx, 0
	jmp	.L27
.L28:
	mov	r12d, DWORD PTR getinbuffer[rip]
	add	ebx, 1
.L27:
	mov	eax, DWORD PTR vld_size[rip]
	cmp	ebx, eax
	jl	.L28
	mov	ebx, 0
	jmp	.L29
.L32:
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, vld_length[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR vld_size[rip]
	cmp	edx, eax
	jne	.L30
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, vld_bits[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	r12d, eax
	jne	.L31
	mov	DWORD PTR vld_found[rip], ebx
	mov	ebx, 49
	jmp	.L31
.L30:
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, vld_length[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR vld_size[rip]
	cmp	edx, eax
	jle	.L31
	mov	ebx, 49
.L31:
	add	ebx, 1
.L29:
	cmp	ebx, 49
	jle	.L32
	jmp	.L23
.L33:
	nop
.L23:
	pop	rbx
	pop	r12
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	next_vld, .-next_vld
	.globl	vldcontrol
	.type	vldcontrol, @function
vldcontrol:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r15
	push	r14
	push	r13
	push	r12
	push	rbx
	sub	rsp, 32
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	mov	r14d, 0
	mov	ebx, 0
	mov	DWORD PTR read_done[rip], 1
	mov	DWORD PTR vld_found[rip], 0
	cmp	r14d, 7
	jne	.L36
	mov	r14d, 6
	jmp	.L36
.L158:
	mov	eax, DWORD PTR clock[rip]
	cmp	eax, 1
	jne	.L36
	test	r14d, r14d
	jne	.L37
	mov	edi, 32
	call	read_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L160
	mov	ebx, 0
	mov	eax, DWORD PTR read_int[rip]
	cmp	eax, 435
	je	.L39
	cmp	eax, 440
	je	.L40
	jmp	.L159
.L39:
	mov	r14d, 1
	jmp	.L36
.L40:
	mov	r14d, 2
	jmp	.L36
.L159:
	mov	eax, DWORD PTR read_int[rip]
	cmp	eax, 256
	jne	.L42
	mov	r14d, 3
	jmp	.L36
.L42:
	mov	r14d, 4
	jmp	.L36
.L160:
	nop
	jmp	.L36
.L37:
	cmp	r14d, 1
	jne	.L44
	test	ebx, ebx
	jne	.L45
	mov	edi, 1
	call	read_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L36
	mov	eax, DWORD PTR getinbuffer[rip]
	cmp	eax, 1
	jne	.L46
	mov	ebx, 1
	mov	r13d, 64
	jmp	.L36
.L46:
	mov	ebx, 2
	jmp	.L36
.L45:
	cmp	ebx, 1
	jne	.L47
	mov	edi, 8
	call	read_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L36
	mov	eax, 64
	sub	eax, r13d
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, scan[rip]
	mov	r15d, DWORD PTR [rdx+rax]
	mov	edx, DWORD PTR read_int[rip]
	movsx	rax, r15d
	lea	rcx, 0[0+rax*4]
	lea	rax, intra_quant[rip]
	mov	DWORD PTR [rcx+rax], edx
	sub	r13d, 1
	test	r13d, r13d
	jne	.L36
	mov	ebx, 2
	jmp	.L36
.L47:
	cmp	ebx, 2
	jne	.L48
	mov	edi, 1
	call	read_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L36
	mov	eax, DWORD PTR getinbuffer[rip]
	cmp	eax, 1
	jne	.L49
	mov	ebx, 3
	mov	r13d, 64
	jmp	.L36
.L49:
	mov	r14d, 0
	jmp	.L36
.L48:
	cmp	ebx, 3
	jne	.L36
	mov	edi, 8
	call	read_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L36
	mov	eax, 64
	sub	eax, r13d
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, scan[rip]
	mov	r15d, DWORD PTR [rdx+rax]
	mov	edx, DWORD PTR read_int[rip]
	movsx	rax, r15d
	lea	rcx, 0[0+rax*4]
	lea	rax, non_intra_quant[rip]
	mov	DWORD PTR [rcx+rax], edx
	sub	r13d, 1
	test	r13d, r13d
	jne	.L36
	mov	r14d, 0
	jmp	.L36
.L44:
	cmp	r14d, 2
	jne	.L50
	mov	r14d, 0
	jmp	.L36
.L50:
	cmp	r14d, 3
	jne	.L51
	test	ebx, ebx
	jne	.L52
	mov	eax, DWORD PTR picture_type[rip]
	cmp	eax, 1
	jg	.L53
	mov	r15d, DWORD PTR previous_picture[rip]
	mov	eax, DWORD PTR future_picture[rip]
	mov	DWORD PTR previous_picture[rip], eax
	mov	DWORD PTR future_picture[rip], r15d
.L53:
	mov	DWORD PTR macroblock_address[rip], 0
	mov	ebx, 1
	jmp	.L36
.L52:
	cmp	ebx, 1
	jne	.L36
	mov	edi, 3
	call	read_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L54
	mov	r15d, DWORD PTR getinbuffer[rip]
.L54:
	mov	eax, r15d
	sub	eax, 1
	cmp	eax, 2
	ja	.L55
	lea	eax, -1[r15]
	mov	DWORD PTR picture_type[rip], eax
	nop
.L55:
	mov	eax, DWORD PTR picture_type[rip]
	test	eax, eax
	jle	.L56
	mov	ebx, 2
	jmp	.L36
.L56:
	mov	r14d, 0
	jmp	.L36
.L51:
	cmp	ebx, 2
	jne	.L57
	mov	edi, 4
	call	read_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L36
	mov	eax, DWORD PTR getinbuffer[rip]
	mov	DWORD PTR full_pel_forward_vector[rip], eax
	mov	r12d, DWORD PTR getinbuffer[rip]
	lea	eax, -1[r12]
	mov	DWORD PTR -64[rbp], eax
	mov	r12d, 1
	imul	r12d, eax
	mov	DWORD PTR forward_f[rip], r12d
	mov	eax, DWORD PTR picture_type[rip]
	cmp	eax, 2
	jne	.L58
	mov	ebx, 3
	jmp	.L36
.L58:
	mov	r14d, 0
	jmp	.L36
.L57:
	cmp	ebx, 3
	jne	.L59
	mov	edi, 4
	call	read_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L36
	mov	eax, DWORD PTR getinbuffer[rip]
	mov	DWORD PTR full_pel_backward_vector[rip], eax
	mov	r12d, DWORD PTR getinbuffer[rip]
	lea	eax, -1[r12]
	mov	DWORD PTR -68[rbp], eax
	mov	r12d, 1
	imul	r12d, eax
	mov	DWORD PTR backward_f[rip], r12d
	mov	r14d, 0
	jmp	.L36
.L59:
	cmp	r14d, 4
	jne	.L60
	mov	edi, 5
	call	read_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L36
	mov	eax, DWORD PTR read_int[rip]
	mov	DWORD PTR quantizer_scale[rip], eax
	mov	r13d, 0
	mov	r14d, 5
	mov	ebx, 0
	jmp	.L36
.L60:
	cmp	r14d, 5
	jne	.L61
	test	ebx, ebx
	jne	.L62
	mov	edi, 11
	call	look_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L36
	mov	eax, DWORD PTR read_int[rip]
	cmp	eax, 8
	jne	.L63
	mov	ebx, 1
	jmp	.L36
.L63:
	mov	ebx, 2
	jmp	.L36
.L62:
	cmp	ebx, 1
	jne	.L64
	mov	edi, 11
	call	read_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L36
	add	r13d, 1
	mov	ebx, 0
	jmp	.L36
.L64:
	cmp	ebx, 2
	jne	.L65
	mov	esi, 11
	mov	edi, 1
	call	next_vld
	mov	eax, DWORD PTR vld_found[rip]
	test	eax, eax
	js	.L36
	mov	ebx, 3
	jmp	.L36
.L65:
	cmp	ebx, 3
	jne	.L66
	mov	eax, DWORD PTR vld_found[rip]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, mb_inc[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, -1
	jne	.L67
	mov	DWORD PTR vld_found[rip], -1
	mov	ebx, 2
	jmp	.L36
.L67:
	mov	eax, DWORD PTR mb_type[rip]
	test	eax, eax
	jne	.L68
	mov	eax, DWORD PTR macroblock_address[rip]
	mov	DWORD PTR past_intra_address[rip], eax
.L68:
	mov	eax, DWORD PTR vld_size[rip]
	mov	edi, eax
	call	read_bits
	mov	eax, r13d
	sal	eax, 5
	lea	edx, [rax+r13]
	mov	eax, DWORD PTR macroblock_address[rip]
	lea	ecx, [rdx+rax]
	mov	eax, DWORD PTR vld_found[rip]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, mb_inc[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	eax, ecx
	mov	DWORD PTR macroblock_address[rip], eax
	mov	ebx, 4
	jmp	.L36
.L66:
	cmp	ebx, 4
	jne	.L69
	mov	esi, 6
	mov	edi, 1
	call	next_vld
	mov	eax, DWORD PTR vld_found[rip]
	test	eax, eax
	js	.L36
	mov	ebx, 5
	jmp	.L36
.L69:
	cmp	ebx, 5
	jne	.L70
	mov	eax, DWORD PTR picture_type[rip]
	cmp	eax, 2
	je	.L71
	cmp	eax, 2
	jg	.L72
	test	eax, eax
	je	.L73
	cmp	eax, 1
	je	.L74
	jmp	.L72
.L73:
	mov	eax, DWORD PTR vld_found[rip]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, table2b2aq[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR -52[rbp], eax
	mov	eax, DWORD PTR vld_found[rip]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, table2b2af[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR is_for_info[rip], eax
	mov	eax, DWORD PTR vld_found[rip]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, table2b2ab[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR is_back_info[rip], eax
	mov	eax, DWORD PTR vld_found[rip]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, table2b2ai[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR -56[rbp], eax
	jmp	.L72
.L74:
	mov	eax, DWORD PTR vld_found[rip]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, table2b2bq[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR -52[rbp], eax
	mov	eax, DWORD PTR vld_found[rip]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, table2b2bf[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR is_for_info[rip], eax
	mov	eax, DWORD PTR vld_found[rip]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, table2b2bb[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR is_back_info[rip], eax
	mov	eax, DWORD PTR vld_found[rip]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, table2b2bi[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR -56[rbp], eax
	jmp	.L72
.L71:
	mov	eax, DWORD PTR vld_found[rip]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, table2b2cq[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR -52[rbp], eax
	mov	eax, DWORD PTR vld_found[rip]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, table2b2cf[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR is_for_info[rip], eax
	mov	eax, DWORD PTR vld_found[rip]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, table2b2cb[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR is_back_info[rip], eax
	mov	eax, DWORD PTR vld_found[rip]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, table2b2bi[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR -56[rbp], eax
	nop
.L72:
	cmp	DWORD PTR -52[rbp], -1
	je	.L75
	mov	eax, DWORD PTR is_for_info[rip]
	cmp	eax, -1
	je	.L75
	mov	eax, DWORD PTR is_back_info[rip]
	cmp	eax, -1
	je	.L75
	cmp	DWORD PTR -56[rbp], -1
	jne	.L76
.L75:
	mov	DWORD PTR vld_found[rip], -1
	mov	ebx, 4
	jmp	.L36
.L76:
	cmp	DWORD PTR -56[rbp], 1
	jne	.L78
	mov	DWORD PTR mb_type[rip], 0
	jmp	.L79
.L78:
	mov	eax, DWORD PTR picture_type[rip]
	mov	DWORD PTR mb_type[rip], eax
.L79:
	mov	eax, DWORD PTR vld_size[rip]
	mov	edi, eax
	call	read_bits
	cmp	DWORD PTR -52[rbp], 1
	jne	.L80
	mov	ebx, 6
	jmp	.L36
.L80:
	mov	ebx, 7
	jmp	.L36
.L70:
	cmp	ebx, 6
	jne	.L81
	mov	edi, 5
	call	read_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L36
	mov	eax, DWORD PTR read_int[rip]
	mov	DWORD PTR quantizer_scale[rip], eax
	mov	ebx, 7
	jmp	.L36
.L81:
	cmp	ebx, 7
	jne	.L82
	mov	eax, DWORD PTR is_for_info[rip]
	cmp	eax, 1
	jne	.L83
	mov	ebx, 8
	jmp	.L36
.L83:
	mov	ebx, 14
	jmp	.L36
.L82:
	cmp	ebx, 8
	jne	.L84
	mov	esi, 11
	mov	edi, 1
	call	next_vld
	mov	eax, DWORD PTR vld_found[rip]
	test	eax, eax
	js	.L36
	mov	ebx, 9
	jmp	.L36
.L84:
	cmp	ebx, 9
	jne	.L85
	mov	eax, DWORD PTR vld_found[rip]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, table2b4[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR motion_horizontal_forward_code[rip], eax
	mov	eax, DWORD PTR motion_horizontal_forward_code[rip]
	cmp	eax, 99
	jne	.L86
	mov	DWORD PTR vld_found[rip], -1
	mov	ebx, 8
	jmp	.L36
.L86:
	mov	eax, DWORD PTR vld_size[rip]
	mov	edi, eax
	call	read_bits
	mov	eax, DWORD PTR forward_f[rip]
	cmp	eax, 1
	je	.L88
	mov	eax, DWORD PTR motion_horizontal_forward_code[rip]
	test	eax, eax
	jne	.L89
.L88:
	mov	DWORD PTR complement_horizontal_forward_r[rip], 0
	mov	ebx, 11
	jmp	.L36
.L89:
	mov	ebx, 10
	jmp	.L36
.L85:
	cmp	ebx, 10
	jne	.L90
	mov	edi, DWORD PTR -64[rbp]
	call	read_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L36
	mov	ebx, DWORD PTR read_int[rip]
	mov	eax, DWORD PTR forward_f[rip]
	sub	eax, 1
	sub	eax, ebx
	mov	DWORD PTR complement_horizontal_forward_r[rip], eax
	mov	ebx, 11
	jmp	.L36
.L90:
	cmp	ebx, 11
	jne	.L91
	mov	esi, 11
	mov	edi, 1
	call	next_vld
	mov	eax, DWORD PTR vld_found[rip]
	test	eax, eax
	js	.L36
	mov	ebx, 12
	jmp	.L36
.L91:
	cmp	ebx, 12
	jne	.L92
	mov	eax, DWORD PTR vld_found[rip]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, table2b4[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR motion_vertical_forward_code[rip], eax
	mov	eax, DWORD PTR motion_vertical_forward_code[rip]
	cmp	eax, 99
	jne	.L93
	mov	DWORD PTR vld_found[rip], -1
	mov	ebx, 11
	jmp	.L36
.L93:
	mov	eax, DWORD PTR vld_size[rip]
	mov	edi, eax
	call	read_bits
	mov	eax, DWORD PTR forward_f[rip]
	cmp	eax, 1
	je	.L95
	mov	eax, DWORD PTR motion_vertical_forward_code[rip]
	test	eax, eax
	jne	.L96
.L95:
	mov	DWORD PTR complement_vertical_forward_r[rip], 0
	mov	ebx, 14
	jmp	.L36
.L96:
	mov	ebx, 13
	jmp	.L36
.L92:
	cmp	ebx, 13
	jne	.L97
	mov	edi, DWORD PTR -64[rbp]
	call	read_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L36
	mov	ebx, DWORD PTR read_int[rip]
	mov	eax, DWORD PTR forward_f[rip]
	sub	eax, 1
	sub	eax, ebx
	mov	DWORD PTR complement_vertical_forward_r[rip], eax
	mov	ebx, 14
	jmp	.L36
.L97:
	cmp	ebx, 14
	jne	.L98
	mov	eax, DWORD PTR is_back_info[rip]
	cmp	eax, 1
	jne	.L99
	mov	ebx, 15
	jmp	.L36
.L99:
	mov	DWORD PTR b_num[rip], 0
	mov	r14d, 6
	mov	ebx, 0
	jmp	.L36
.L98:
	cmp	ebx, 15
	jne	.L100
	mov	esi, 11
	mov	edi, 1
	call	next_vld
	mov	eax, DWORD PTR vld_found[rip]
	test	eax, eax
	js	.L36
	mov	ebx, 16
	jmp	.L36
.L100:
	cmp	ebx, 16
	jne	.L101
	mov	eax, DWORD PTR vld_found[rip]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, table2b4[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR motion_horizontal_backward_code[rip], eax
	mov	eax, DWORD PTR motion_horizontal_backward_code[rip]
	cmp	eax, 99
	jne	.L102
	mov	DWORD PTR vld_found[rip], -1
	mov	ebx, 15
	jmp	.L36
.L102:
	mov	eax, DWORD PTR vld_size[rip]
	mov	edi, eax
	call	read_bits
	mov	eax, DWORD PTR forward_f[rip]
	cmp	eax, 1
	je	.L104
	mov	eax, DWORD PTR motion_horizontal_backward_code[rip]
	test	eax, eax
	jne	.L105
.L104:
	mov	DWORD PTR complement_horizontal_backward_r[rip], 0
	mov	ebx, 18
	jmp	.L36
.L105:
	mov	ebx, 17
	jmp	.L36
.L101:
	cmp	ebx, 17
	jne	.L106
	mov	edi, DWORD PTR -68[rbp]
	call	read_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L36
	mov	ebx, DWORD PTR read_int[rip]
	mov	eax, DWORD PTR backward_f[rip]
	sub	eax, 1
	sub	eax, ebx
	mov	DWORD PTR complement_horizontal_backward_r[rip], eax
	mov	ebx, 18
	jmp	.L36
.L106:
	cmp	ebx, 18
	jne	.L107
	mov	esi, 11
	mov	edi, 1
	call	next_vld
	mov	eax, DWORD PTR vld_found[rip]
	test	eax, eax
	js	.L36
	mov	ebx, 19
	jmp	.L36
.L107:
	cmp	ebx, 19
	jne	.L108
	mov	eax, DWORD PTR vld_found[rip]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, table2b4[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR motion_vertical_backward_code[rip], eax
	mov	eax, DWORD PTR motion_vertical_backward_code[rip]
	cmp	eax, 99
	jne	.L109
	mov	DWORD PTR vld_found[rip], -1
	mov	ebx, 18
	jmp	.L36
.L109:
	mov	eax, DWORD PTR vld_size[rip]
	mov	edi, eax
	call	read_bits
	mov	eax, DWORD PTR forward_f[rip]
	cmp	eax, 1
	je	.L111
	mov	eax, DWORD PTR motion_vertical_backward_code[rip]
	test	eax, eax
	jne	.L112
.L111:
	mov	DWORD PTR complement_vertical_backward_r[rip], 0
	mov	DWORD PTR b_num[rip], 0
	mov	r14d, 6
	mov	ebx, 0
	jmp	.L36
.L112:
	mov	ebx, 20
	jmp	.L36
.L108:
	cmp	ebx, 20
	jne	.L36
	mov	edi, DWORD PTR -68[rbp]
	call	read_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L36
	mov	ebx, DWORD PTR read_int[rip]
	mov	eax, DWORD PTR backward_f[rip]
	sub	eax, 1
	sub	eax, ebx
	mov	DWORD PTR complement_vertical_backward_r[rip], eax
	mov	DWORD PTR b_num[rip], 0
	mov	r14d, 6
	mov	ebx, 0
	jmp	.L36
.L61:
	cmp	r14d, 6
	jne	.L36
	test	ebx, ebx
	jne	.L113
	mov	DWORD PTR -48[rbp], 1
	mov	eax, DWORD PTR mb_type[rip]
	test	eax, eax
	jne	.L114
	mov	ebx, 1
	jmp	.L36
.L114:
	mov	ebx, 7
	jmp	.L36
.L113:
	cmp	ebx, 1
	jne	.L115
	mov	eax, DWORD PTR b_num[rip]
	cmp	eax, 3
	jg	.L116
	mov	ebx, 4
	jmp	.L36
.L116:
	mov	ebx, 2
	jmp	.L36
.L115:
	cmp	ebx, 2
	jne	.L117
	mov	esi, 8
	mov	edi, 2
	call	next_vld
	mov	eax, DWORD PTR vld_found[rip]
	test	eax, eax
	js	.L36
	mov	ebx, 3
	jmp	.L36
.L117:
	cmp	ebx, 3
	jne	.L118
	mov	eax, DWORD PTR vld_found[rip]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, table2b5b[rip]
	mov	r13d, DWORD PTR [rdx+rax]
	cmp	r13d, -1
	jne	.L119
	mov	DWORD PTR vld_found[rip], -1
	mov	ebx, 2
	jmp	.L36
.L119:
	mov	eax, DWORD PTR vld_size[rip]
	mov	edi, eax
	call	read_bits
	mov	ebx, 6
	jmp	.L36
.L118:
	cmp	ebx, 4
	jne	.L120
	mov	esi, 7
	mov	edi, 2
	call	next_vld
	mov	eax, DWORD PTR vld_found[rip]
	test	eax, eax
	js	.L36
	mov	ebx, 5
	jmp	.L36
.L120:
	cmp	ebx, 5
	jne	.L121
	mov	eax, DWORD PTR vld_found[rip]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, table2b5a[rip]
	mov	r13d, DWORD PTR [rdx+rax]
	cmp	r13d, -1
	jne	.L122
	mov	DWORD PTR vld_found[rip], -1
	mov	ebx, 4
	jmp	.L36
.L122:
	mov	eax, DWORD PTR vld_size[rip]
	mov	edi, eax
	call	read_bits
	mov	ebx, 6
	jmp	.L36
.L121:
	cmp	ebx, 6
	jne	.L123
	test	r13d, r13d
	jne	.L124
	mov	DWORD PTR -72[rbp], 0
	mov	DWORD PTR dct_zz[rip], 0
	mov	ebx, 9
	jmp	.L36
.L124:
	mov	edi, r13d
	call	read_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L36
	mov	eax, DWORD PTR getinbuffer[rip]
	cmp	eax, 1
	jne	.L125
	mov	eax, DWORD PTR read_int[rip]
	mov	DWORD PTR dct_zz[rip], eax
	jmp	.L126
.L125:
	mov	r12d, -1
	imul	r12d, r13d
	mov	eax, DWORD PTR -72[rbp]
	add	eax, 1
	or	r12d, eax
	mov	DWORD PTR dct_zz[rip], r12d
.L126:
	mov	ebx, 9
	jmp	.L36
.L123:
	cmp	ebx, 7
	jne	.L127
	mov	edi, 6
	call	look_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L36
	mov	eax, DWORD PTR read_int[rip]
	cmp	eax, 1
	jne	.L128
	mov	edi, 6
	call	read_bits
	mov	r13d, 0
	mov	ebx, 8
	jmp	.L36
.L128:
	mov	ebx, 11
	jmp	.L36
.L127:
	cmp	ebx, 8
	jne	.L129
	test	r13d, r13d
	jne	.L130
	mov	edi, 6
	call	read_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L130
	mov	eax, DWORD PTR read_int[rip]
	mov	DWORD PTR -60[rbp], eax
	mov	r13d, 1
.L130:
	cmp	r13d, 1
	jne	.L131
	mov	edi, 8
	call	read_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L131
	mov	eax, DWORD PTR read_int[rip]
	test	eax, eax
	jne	.L132
	mov	r13d, 2
	jmp	.L131
.L132:
	mov	eax, DWORD PTR read_int[rip]
	cmp	eax, 128
	jne	.L133
	mov	r13d, 3
	jmp	.L131
.L133:
	mov	eax, DWORD PTR read_int[rip]
	cmp	eax, 127
	jg	.L134
	mov	eax, DWORD PTR read_int[rip]
	mov	DWORD PTR -44[rbp], eax
	jmp	.L135
.L134:
	mov	eax, DWORD PTR read_int[rip]
	sub	eax, 256
	mov	DWORD PTR -44[rbp], eax
.L135:
	mov	r13d, 4
.L131:
	cmp	r13d, 2
	jne	.L136
	mov	edi, 8
	call	read_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L136
	mov	eax, DWORD PTR read_int[rip]
	mov	DWORD PTR -44[rbp], eax
	mov	r13d, 4
.L136:
	cmp	r13d, 3
	jne	.L137
	mov	edi, 8
	call	read_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L137
	mov	eax, DWORD PTR read_int[rip]
	sub	eax, 256
	mov	DWORD PTR -44[rbp], eax
	mov	r13d, 4
.L137:
	cmp	r13d, 4
	jne	.L36
	mov	ebx, 0
	jmp	.L138
.L139:
	mov	ecx, DWORD PTR -48[rbp]
	movsx	rax, ecx
	lea	rdx, 0[0+rax*4]
	lea	rax, scan[rip]
	mov	r15d, DWORD PTR [rdx+rax]
	movsx	rax, r15d
	lea	rdx, 0[0+rax*4]
	lea	rax, dct_zz[rip]
	mov	esi, DWORD PTR -44[rbp]
	mov	DWORD PTR [rdx+rax], esi
	add	ecx, 1
	mov	DWORD PTR -48[rbp], ecx
	add	ebx, 1
.L138:
	cmp	ebx, DWORD PTR -60[rbp]
	jle	.L139
	mov	ebx, 9
	jmp	.L36
.L129:
	cmp	ebx, 9
	jne	.L140
	mov	edi, 6
	call	look_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L36
	mov	eax, DWORD PTR read_int[rip]
	cmp	eax, 1
	jne	.L141
	mov	edi, 6
	call	read_bits
	mov	r13d, 0
	mov	ebx, 10
	jmp	.L36
.L141:
	mov	ebx, 11
	jmp	.L36
.L140:
	cmp	ebx, 10
	jne	.L142
	test	r13d, r13d
	jne	.L143
	mov	edi, 6
	call	read_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L143
	mov	eax, DWORD PTR read_int[rip]
	mov	DWORD PTR -60[rbp], eax
	mov	r13d, 1
.L143:
	cmp	r13d, 1
	jne	.L144
	mov	edi, 8
	call	read_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L144
	mov	eax, DWORD PTR read_int[rip]
	test	eax, eax
	jne	.L145
	mov	r13d, 2
	jmp	.L144
.L145:
	mov	eax, DWORD PTR read_int[rip]
	cmp	eax, 128
	jne	.L146
	mov	r13d, 3
	jmp	.L144
.L146:
	mov	eax, DWORD PTR read_int[rip]
	cmp	eax, 127
	jg	.L147
	mov	eax, DWORD PTR read_int[rip]
	mov	DWORD PTR -44[rbp], eax
	jmp	.L148
.L147:
	mov	eax, DWORD PTR read_int[rip]
	sub	eax, 256
	mov	DWORD PTR -44[rbp], eax
.L148:
	mov	r13d, 4
.L144:
	cmp	r13d, 2
	jne	.L149
	mov	edi, 8
	call	read_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L149
	mov	eax, DWORD PTR read_int[rip]
	mov	DWORD PTR -44[rbp], eax
	mov	r13d, 4
.L149:
	cmp	r13d, 3
	jne	.L150
	mov	edi, 8
	call	read_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L150
	mov	eax, DWORD PTR read_int[rip]
	sub	eax, 256
	mov	DWORD PTR -44[rbp], eax
	mov	r13d, 4
.L150:
	cmp	r13d, 4
	jne	.L36
	mov	ebx, 0
	jmp	.L151
.L152:
	mov	esi, DWORD PTR -48[rbp]
	movsx	rax, esi
	lea	rdx, 0[0+rax*4]
	lea	rax, scan[rip]
	mov	r15d, DWORD PTR [rdx+rax]
	movsx	rax, r15d
	lea	rdx, 0[0+rax*4]
	lea	rax, dct_zz[rip]
	mov	ecx, DWORD PTR -44[rbp]
	mov	DWORD PTR [rdx+rax], ecx
	add	esi, 1
	mov	DWORD PTR -48[rbp], esi
	add	ebx, 1
.L151:
	cmp	ebx, DWORD PTR -60[rbp]
	jle	.L152
	mov	ebx, 9
	jmp	.L36
.L142:
	cmp	ebx, 11
	jne	.L153
	mov	edi, 2
	call	look_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L36
	mov	eax, DWORD PTR read_int[rip]
	cmp	eax, 2
	jne	.L154
	mov	ebx, 10
	jmp	.L36
.L154:
	mov	ebx, 12
	jmp	.L36
.L153:
	cmp	ebx, 12
	jne	.L155
	mov	edi, 2
	call	read_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L36
	mov	eax, DWORD PTR b_num[rip]
	cmp	eax, 5
	jne	.L156
	mov	ebx, 13
	jmp	.L36
.L156:
	mov	eax, DWORD PTR b_num[rip]
	add	eax, 1
	mov	DWORD PTR b_num[rip], eax
	mov	ebx, 0
	jmp	.L36
.L155:
	cmp	ebx, 13
	jne	.L36
	mov	edi, 23
	call	look_bits
	mov	eax, DWORD PTR read_done[rip]
	cmp	eax, 1
	jne	.L36
	mov	eax, DWORD PTR read_int[rip]
	test	eax, eax
	jne	.L157
	mov	r14d, 0
	jmp	.L36
.L157:
	mov	r13d, 0
	mov	r14d, 5
	mov	ebx, 0
.L36:
	cmp	r14d, 6
	jle	.L158
	nop
	nop
	add	rsp, 32
	pop	rbx
	pop	r12
	pop	r13
	pop	r14
	pop	r15
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	vldcontrol, .-vldcontrol
	.globl	sign
	.type	sign, @function
sign:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	test	eax, eax
	jns	.L162
	mov	eax, -1
	jmp	.L163
.L162:
	test	eax, eax
	jle	.L164
	mov	eax, 1
	jmp	.L163
.L164:
	mov	eax, 0
.L163:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	sign, .-sign
	.globl	dequant
	.type	dequant, @function
dequant:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r13
	push	r12
	push	rbx
	.cfi_offset 13, -24
	.cfi_offset 12, -32
	.cfi_offset 3, -40
	mov	eax, DWORD PTR mb_type[rip]
	test	eax, eax
	jne	.L166
	mov	ebx, 0
	jmp	.L167
.L171:
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, scan[rip]
	mov	r12d, DWORD PTR [rdx+rax]
	movsx	rax, r12d
	lea	rdx, 0[0+rax*4]
	lea	rax, dct_zz[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR quantizer_scale[rip]
	imul	edx, eax
	movsx	rax, ebx
	lea	rcx, 0[0+rax*4]
	lea	rax, intra_quant[rip]
	mov	eax, DWORD PTR [rcx+rax]
	imul	eax, edx
	lea	edx, 7[rax]
	test	eax, eax
	cmovs	eax, edx
	sar	eax, 3
	mov	ecx, eax
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	DWORD PTR [rdx+rax], ecx
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	r13d, DWORD PTR [rdx+rax]
	test	r13d, r13d
	jne	.L168
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	r12d, DWORD PTR [rdx+rax]
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	edi, eax
	call	sign
	mov	ecx, r12d
	sub	ecx, eax
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	DWORD PTR [rdx+rax], ecx
.L168:
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 2047
	jle	.L169
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	DWORD PTR [rdx+rax], 2047
.L169:
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, -2047
	jge	.L170
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	DWORD PTR [rdx+rax], -2047
.L170:
	add	ebx, 1
.L167:
	cmp	ebx, 63
	jle	.L171
	mov	eax, DWORD PTR b_num[rip]
	test	eax, eax
	jne	.L172
	mov	eax, DWORD PTR dct_zz[rip]
	sal	eax, 3
	mov	DWORD PTR curr_block[rip], eax
	mov	eax, DWORD PTR macroblock_address[rip]
	mov	edx, DWORD PTR past_intra_address[rip]
	sub	eax, edx
	cmp	eax, 1
	jle	.L173
	mov	eax, DWORD PTR curr_block[rip]
	add	eax, 1024
	mov	DWORD PTR curr_block[rip], eax
	jmp	.L174
.L173:
	mov	edx, DWORD PTR curr_block[rip]
	mov	eax, DWORD PTR dct_dc_y_past[rip]
	add	eax, edx
	mov	DWORD PTR curr_block[rip], eax
.L174:
	mov	eax, DWORD PTR curr_block[rip]
	mov	DWORD PTR dct_dc_y_past[rip], eax
	jmp	.L188
.L172:
	mov	eax, DWORD PTR b_num[rip]
	cmp	eax, 3
	jg	.L176
	mov	eax, DWORD PTR dct_zz[rip]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR dct_dc_y_past[rip]
	add	eax, edx
	mov	DWORD PTR curr_block[rip], eax
	mov	eax, DWORD PTR curr_block[rip]
	mov	DWORD PTR dct_dc_y_past[rip], eax
	jmp	.L188
.L176:
	mov	eax, DWORD PTR b_num[rip]
	cmp	eax, 4
	jne	.L177
	mov	eax, DWORD PTR dct_zz[rip]
	sal	eax, 3
	mov	DWORD PTR curr_block[rip], eax
	mov	eax, DWORD PTR macroblock_address[rip]
	mov	edx, DWORD PTR past_intra_address[rip]
	sub	eax, edx
	cmp	eax, 1
	jle	.L178
	mov	eax, DWORD PTR curr_block[rip]
	add	eax, 1024
	mov	DWORD PTR curr_block[rip], eax
	jmp	.L179
.L178:
	mov	edx, DWORD PTR curr_block[rip]
	mov	eax, DWORD PTR dct_dc_cb_past[rip]
	add	eax, edx
	mov	DWORD PTR curr_block[rip], eax
.L179:
	mov	eax, DWORD PTR curr_block[rip]
	mov	DWORD PTR dct_dc_cb_past[rip], eax
	jmp	.L188
.L177:
	mov	eax, DWORD PTR b_num[rip]
	cmp	eax, 5
	jne	.L188
	mov	eax, DWORD PTR dct_zz[rip]
	sal	eax, 3
	mov	DWORD PTR curr_block[rip], eax
	mov	eax, DWORD PTR macroblock_address[rip]
	mov	edx, DWORD PTR past_intra_address[rip]
	sub	eax, edx
	cmp	eax, 1
	jle	.L180
	mov	eax, DWORD PTR curr_block[rip]
	add	eax, 1024
	mov	DWORD PTR curr_block[rip], eax
	jmp	.L181
.L180:
	mov	edx, DWORD PTR curr_block[rip]
	mov	eax, DWORD PTR dct_dc_cr_past[rip]
	add	eax, edx
	mov	DWORD PTR curr_block[rip], eax
.L181:
	mov	eax, DWORD PTR curr_block[rip]
	mov	DWORD PTR dct_dc_cr_past[rip], eax
	mov	eax, DWORD PTR macroblock_address[rip]
	mov	DWORD PTR past_intra_address[rip], eax
	jmp	.L188
.L166:
	mov	ebx, 0
	jmp	.L182
.L187:
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, scan[rip]
	mov	r12d, DWORD PTR [rdx+rax]
	movsx	rax, r12d
	lea	rdx, 0[0+rax*4]
	lea	rax, dct_zz[rip]
	mov	eax, DWORD PTR [rdx+rax]
	lea	r13d, [rax+rax]
	movsx	rax, r12d
	lea	rdx, 0[0+rax*4]
	lea	rax, dct_zz[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	edi, eax
	call	sign
	lea	edx, 0[r13+rax]
	mov	eax, DWORD PTR quantizer_scale[rip]
	imul	edx, eax
	movsx	rax, ebx
	lea	rcx, 0[0+rax*4]
	lea	rax, non_intra_quant[rip]
	mov	eax, DWORD PTR [rcx+rax]
	imul	eax, edx
	lea	edx, 15[rax]
	test	eax, eax
	cmovs	eax, edx
	sar	eax, 4
	mov	ecx, eax
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	DWORD PTR [rdx+rax], ecx
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	r13d, DWORD PTR [rdx+rax]
	test	r13d, r13d
	jne	.L183
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	r13d, DWORD PTR [rdx+rax]
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	edi, eax
	call	sign
	mov	ecx, r13d
	sub	ecx, eax
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	DWORD PTR [rdx+rax], ecx
.L183:
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 2047
	jle	.L184
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	DWORD PTR [rdx+rax], 2047
.L184:
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, -2047
	jge	.L185
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	DWORD PTR [rdx+rax], -2047
.L185:
	movsx	rax, r12d
	lea	rdx, 0[0+rax*4]
	lea	rax, dct_zz[rip]
	mov	DWORD PTR [rdx+rax], 0
	movsx	rax, r12d
	lea	rdx, 0[0+rax*4]
	lea	rax, dct_zz[rip]
	mov	eax, DWORD PTR [rdx+rax]
	test	eax, eax
	je	.L186
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	DWORD PTR [rdx+rax], 0
.L186:
	add	ebx, 1
.L182:
	cmp	ebx, 63
	jle	.L187
.L188:
	nop
	pop	rbx
	pop	r12
	pop	r13
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	dequant, .-dequant
	.globl	idct
	.type	idct, @function
idct:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r13
	push	r12
	push	rbx
	.cfi_offset 13, -24
	.cfi_offset 12, -32
	.cfi_offset 3, -40
	mov	ebx, 0
	jmp	.L190
.L191:
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, temp_block[rip]
	mov	DWORD PTR [rdx+rax], 0
	add	ebx, 1
.L190:
	cmp	ebx, 63
	jle	.L191
	mov	ebx, 0
	jmp	.L192
.L197:
	mov	r12d, 0
	jmp	.L193
.L196:
	mov	r13d, 0
	jmp	.L194
.L195:
	lea	eax, 0[0+rbx*8]
	add	eax, r12d
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, temp_block[rip]
	mov	esi, DWORD PTR [rdx+rax]
	lea	eax, 0[0+rbx*8]
	add	eax, r13d
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, idct_coeff[rip]
	mov	edx, DWORD PTR [rdx+rax]
	lea	eax, 0[0+r13*8]
	add	eax, r12d
	cdqe
	lea	rcx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	eax, DWORD PTR [rcx+rax]
	imul	edx, eax
	lea	eax, 0[0+rbx*8]
	add	eax, r12d
	lea	ecx, [rsi+rdx]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, temp_block[rip]
	mov	DWORD PTR [rdx+rax], ecx
	add	r13d, 1
.L194:
	cmp	r13d, 7
	jle	.L195
	lea	eax, 0[0+rbx*8]
	add	eax, r12d
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, temp_block[rip]
	mov	eax, DWORD PTR [rdx+rax]
	lea	edx, 0[0+rbx*8]
	lea	ecx, [r12+rdx]
	lea	edx, 8191[rax]
	test	eax, eax
	cmovs	eax, edx
	sar	eax, 13
	mov	esi, eax
	movsx	rax, ecx
	lea	rdx, 0[0+rax*4]
	lea	rax, temp_block[rip]
	mov	DWORD PTR [rdx+rax], esi
	add	r12d, 1
.L193:
	cmp	r12d, 7
	jle	.L196
	add	ebx, 1
.L192:
	cmp	ebx, 7
	jle	.L197
	mov	ebx, 0
	jmp	.L198
.L199:
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	DWORD PTR [rdx+rax], 0
	add	ebx, 1
.L198:
	cmp	ebx, 63
	jle	.L199
	mov	ebx, 0
	jmp	.L200
.L205:
	mov	r12d, 0
	jmp	.L201
.L204:
	mov	r13d, 0
	jmp	.L202
.L203:
	lea	eax, 0[0+rbx*8]
	add	eax, r12d
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	esi, DWORD PTR [rdx+rax]
	lea	eax, 0[0+rbx*8]
	add	eax, r13d
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, temp_block[rip]
	mov	edx, DWORD PTR [rdx+rax]
	lea	eax, 0[0+r12*8]
	add	eax, r13d
	cdqe
	lea	rcx, 0[0+rax*4]
	lea	rax, idct_coeff[rip]
	mov	eax, DWORD PTR [rcx+rax]
	imul	edx, eax
	lea	eax, 0[0+rbx*8]
	add	eax, r12d
	lea	ecx, [rsi+rdx]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	DWORD PTR [rdx+rax], ecx
	add	r13d, 1
.L202:
	cmp	r13d, 7
	jle	.L203
	lea	eax, 0[0+rbx*8]
	add	eax, r12d
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	eax, DWORD PTR [rdx+rax]
	lea	edx, 0[0+rbx*8]
	lea	ecx, [r12+rdx]
	lea	edx, 8191[rax]
	test	eax, eax
	cmovs	eax, edx
	sar	eax, 13
	mov	esi, eax
	movsx	rax, ecx
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	DWORD PTR [rdx+rax], esi
	add	r12d, 1
.L201:
	cmp	r12d, 7
	jle	.L204
	add	ebx, 1
.L200:
	cmp	ebx, 7
	jle	.L205
	nop
	nop
	pop	rbx
	pop	r12
	pop	r13
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	idct, .-idct
	.globl	calculate_forward_motion
	.type	calculate_forward_motion, @function
calculate_forward_motion:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edx, edi
	mov	ecx, DWORD PTR motion_horizontal_forward_code[rip]
	mov	eax, DWORD PTR forward_f[rip]
	imul	eax, ecx
	mov	DWORD PTR right_little[rip], eax
	mov	eax, DWORD PTR right_little[rip]
	test	eax, eax
	jne	.L207
	mov	DWORD PTR right_big[rip], 0
	jmp	.L208
.L207:
	mov	eax, DWORD PTR right_little[rip]
	test	eax, eax
	jle	.L209
	mov	eax, DWORD PTR right_little[rip]
	mov	ecx, DWORD PTR complement_horizontal_forward_r[rip]
	sub	eax, ecx
	mov	DWORD PTR right_little[rip], eax
	mov	eax, DWORD PTR right_little[rip]
	mov	ecx, DWORD PTR forward_f[rip]
	sal	ecx, 5
	sub	eax, ecx
	mov	DWORD PTR right_big[rip], eax
	jmp	.L208
.L209:
	mov	ecx, DWORD PTR right_little[rip]
	mov	eax, DWORD PTR complement_horizontal_forward_r[rip]
	add	eax, ecx
	mov	DWORD PTR right_little[rip], eax
	mov	eax, DWORD PTR forward_f[rip]
	sal	eax, 5
	mov	ecx, eax
	mov	eax, DWORD PTR right_little[rip]
	add	eax, ecx
	mov	DWORD PTR right_big[rip], eax
.L208:
	mov	ecx, DWORD PTR motion_vertical_forward_code[rip]
	mov	eax, DWORD PTR forward_f[rip]
	imul	eax, ecx
	mov	DWORD PTR down_little[rip], eax
	mov	eax, DWORD PTR down_little[rip]
	test	eax, eax
	jne	.L210
	mov	DWORD PTR down_big[rip], 0
	jmp	.L211
.L210:
	mov	eax, DWORD PTR down_little[rip]
	test	eax, eax
	jle	.L212
	mov	eax, DWORD PTR down_little[rip]
	mov	ecx, DWORD PTR complement_vertical_forward_r[rip]
	sub	eax, ecx
	mov	DWORD PTR down_little[rip], eax
	mov	eax, DWORD PTR down_little[rip]
	mov	ecx, DWORD PTR forward_f[rip]
	sal	ecx, 5
	sub	eax, ecx
	mov	DWORD PTR down_big[rip], eax
	jmp	.L211
.L212:
	mov	ecx, DWORD PTR down_little[rip]
	mov	eax, DWORD PTR complement_vertical_forward_r[rip]
	add	eax, ecx
	mov	DWORD PTR down_little[rip], eax
	mov	eax, DWORD PTR forward_f[rip]
	sal	eax, 5
	mov	ecx, eax
	mov	eax, DWORD PTR down_little[rip]
	add	eax, ecx
	mov	DWORD PTR down_big[rip], eax
.L211:
	mov	eax, DWORD PTR forward_f[rip]
	sal	eax, 4
	sub	eax, 1
	mov	DWORD PTR max[rip], eax
	mov	ecx, DWORD PTR forward_f[rip]
	mov	eax, 0
	sub	eax, ecx
	sal	eax, 4
	mov	DWORD PTR min[rip], eax
	mov	ecx, DWORD PTR recon_right_for_prev[rip]
	mov	eax, DWORD PTR right_little[rip]
	add	eax, ecx
	mov	DWORD PTR new_vector[rip], eax
	mov	ecx, DWORD PTR new_vector[rip]
	mov	eax, DWORD PTR max[rip]
	cmp	ecx, eax
	jg	.L213
	mov	ecx, DWORD PTR new_vector[rip]
	mov	eax, DWORD PTR min[rip]
	cmp	ecx, eax
	jl	.L213
	mov	ecx, DWORD PTR recon_right_for_prev[rip]
	mov	eax, DWORD PTR right_little[rip]
	add	eax, ecx
	mov	DWORD PTR recon_right_for[rip], eax
	jmp	.L214
.L213:
	mov	ecx, DWORD PTR recon_right_for_prev[rip]
	mov	eax, DWORD PTR right_big[rip]
	add	eax, ecx
	mov	DWORD PTR recon_right_for[rip], eax
.L214:
	cmp	edx, 1
	jne	.L215
	mov	eax, DWORD PTR recon_right_for[rip]
	mov	DWORD PTR recon_right_for_prev[rip], eax
.L215:
	mov	eax, DWORD PTR full_pel_forward_vector[rip]
	cmp	eax, 1
	jne	.L216
	mov	eax, DWORD PTR recon_right_for[rip]
	mov	DWORD PTR pred_temp_bit_vector[rip], eax
	mov	eax, DWORD PTR pred_temp_bit_vector[rip]
	add	eax, eax
	mov	DWORD PTR pred_temp_bit_vector[rip], eax
	mov	eax, DWORD PTR pred_temp_bit_vector[rip]
	mov	DWORD PTR recon_right_for[rip], eax
.L216:
	mov	ecx, DWORD PTR recon_down_for_prev[rip]
	mov	eax, DWORD PTR down_little[rip]
	add	eax, ecx
	mov	DWORD PTR new_vector[rip], eax
	mov	ecx, DWORD PTR new_vector[rip]
	mov	eax, DWORD PTR max[rip]
	cmp	ecx, eax
	jg	.L217
	mov	ecx, DWORD PTR new_vector[rip]
	mov	eax, DWORD PTR min[rip]
	cmp	ecx, eax
	jl	.L217
	mov	ecx, DWORD PTR recon_down_for_prev[rip]
	mov	eax, DWORD PTR down_little[rip]
	add	eax, ecx
	mov	DWORD PTR recon_down_for[rip], eax
	jmp	.L218
.L217:
	mov	ecx, DWORD PTR recon_down_for_prev[rip]
	mov	eax, DWORD PTR down_big[rip]
	add	eax, ecx
	mov	DWORD PTR recon_down_for[rip], eax
.L218:
	cmp	edx, 1
	jne	.L219
	mov	eax, DWORD PTR recon_down_for[rip]
	mov	DWORD PTR recon_down_for_prev[rip], eax
.L219:
	mov	eax, DWORD PTR full_pel_forward_vector[rip]
	cmp	eax, 1
	jne	.L220
	mov	eax, DWORD PTR recon_down_for[rip]
	mov	DWORD PTR pred_temp_bit_vector[rip], eax
	mov	eax, DWORD PTR pred_temp_bit_vector[rip]
	test	eax, eax
	jg	.L221
	mov	DWORD PTR pred_temp_bit_vector[rip], 1
	jmp	.L222
.L221:
	mov	DWORD PTR pred_temp_bit_vector[rip], 0
.L222:
	mov	eax, DWORD PTR pred_temp_bit_vector[rip]
	mov	DWORD PTR recon_down_for[rip], eax
.L220:
	mov	eax, DWORD PTR b_num[rip]
	cmp	eax, 3
	jle	.L223
	mov	eax, DWORD PTR recon_right_for[rip]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	mov	DWORD PTR recon_right_for[rip], eax
	mov	eax, DWORD PTR recon_down_for[rip]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	mov	DWORD PTR recon_down_for[rip], eax
.L223:
	mov	eax, DWORD PTR recon_right_for[rip]
	mov	DWORD PTR pred_temp_bit_vector[rip], eax
	mov	edx, DWORD PTR pred_temp_bit_vector[rip]
	mov	eax, edx
	sal	eax, 2
	add	eax, edx
	sal	eax, 2
	add	eax, edx
	mov	DWORD PTR pred_temp_bit_vector[rip], eax
	mov	eax, DWORD PTR pred_temp_bit_vector[rip]
	mov	DWORD PTR right_for[rip], eax
	mov	eax, DWORD PTR recon_down_for[rip]
	mov	DWORD PTR pred_temp_bit_vector[rip], eax
	mov	eax, DWORD PTR pred_temp_bit_vector[rip]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	mov	DWORD PTR pred_temp_bit_vector[rip], eax
	mov	eax, DWORD PTR pred_temp_bit_vector[rip]
	mov	DWORD PTR down_for[rip], eax
	mov	eax, DWORD PTR recon_right_for[rip]
	mov	edx, DWORD PTR right_for[rip]
	add	edx, edx
	sub	eax, edx
	mov	DWORD PTR right_half_for[rip], eax
	mov	eax, DWORD PTR recon_down_for[rip]
	mov	edx, DWORD PTR down_for[rip]
	add	edx, edx
	sub	eax, edx
	mov	DWORD PTR down_half_for[rip], eax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	calculate_forward_motion, .-calculate_forward_motion
	.globl	calculate_backward_motion
	.type	calculate_backward_motion, @function
calculate_backward_motion:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edx, edi
	mov	ecx, DWORD PTR motion_horizontal_backward_code[rip]
	mov	eax, DWORD PTR backward_f[rip]
	imul	eax, ecx
	mov	DWORD PTR right_little[rip], eax
	mov	eax, DWORD PTR right_little[rip]
	test	eax, eax
	jne	.L225
	mov	DWORD PTR right_big[rip], 0
	jmp	.L226
.L225:
	mov	eax, DWORD PTR right_little[rip]
	test	eax, eax
	jle	.L227
	mov	eax, DWORD PTR right_little[rip]
	mov	ecx, DWORD PTR complement_horizontal_backward_r[rip]
	sub	eax, ecx
	mov	DWORD PTR right_little[rip], eax
	mov	eax, DWORD PTR right_little[rip]
	mov	ecx, DWORD PTR backward_f[rip]
	sal	ecx, 5
	sub	eax, ecx
	mov	DWORD PTR right_big[rip], eax
	jmp	.L226
.L227:
	mov	ecx, DWORD PTR right_little[rip]
	mov	eax, DWORD PTR complement_horizontal_backward_r[rip]
	add	eax, ecx
	mov	DWORD PTR right_little[rip], eax
	mov	eax, DWORD PTR backward_f[rip]
	sal	eax, 5
	mov	ecx, eax
	mov	eax, DWORD PTR right_little[rip]
	add	eax, ecx
	mov	DWORD PTR right_big[rip], eax
.L226:
	mov	ecx, DWORD PTR motion_vertical_backward_code[rip]
	mov	eax, DWORD PTR backward_f[rip]
	imul	eax, ecx
	mov	DWORD PTR down_little[rip], eax
	mov	eax, DWORD PTR down_little[rip]
	test	eax, eax
	jne	.L228
	mov	DWORD PTR down_big[rip], 0
	jmp	.L229
.L228:
	mov	eax, DWORD PTR down_little[rip]
	test	eax, eax
	jle	.L230
	mov	eax, DWORD PTR down_little[rip]
	mov	ecx, DWORD PTR complement_vertical_backward_r[rip]
	sub	eax, ecx
	mov	DWORD PTR down_little[rip], eax
	mov	eax, DWORD PTR down_little[rip]
	mov	ecx, DWORD PTR backward_f[rip]
	sal	ecx, 5
	sub	eax, ecx
	mov	DWORD PTR down_big[rip], eax
	jmp	.L229
.L230:
	mov	ecx, DWORD PTR down_little[rip]
	mov	eax, DWORD PTR complement_vertical_backward_r[rip]
	add	eax, ecx
	mov	DWORD PTR down_little[rip], eax
	mov	eax, DWORD PTR backward_f[rip]
	sal	eax, 5
	mov	ecx, eax
	mov	eax, DWORD PTR down_little[rip]
	add	eax, ecx
	mov	DWORD PTR down_big[rip], eax
.L229:
	mov	eax, DWORD PTR backward_f[rip]
	sal	eax, 4
	sub	eax, 1
	mov	DWORD PTR max[rip], eax
	mov	ecx, DWORD PTR backward_f[rip]
	mov	eax, 0
	sub	eax, ecx
	sal	eax, 4
	mov	DWORD PTR min[rip], eax
	mov	ecx, DWORD PTR recon_right_back_prev[rip]
	mov	eax, DWORD PTR right_little[rip]
	add	eax, ecx
	mov	DWORD PTR new_vector[rip], eax
	mov	ecx, DWORD PTR new_vector[rip]
	mov	eax, DWORD PTR max[rip]
	cmp	ecx, eax
	jg	.L231
	mov	ecx, DWORD PTR new_vector[rip]
	mov	eax, DWORD PTR min[rip]
	cmp	ecx, eax
	jl	.L231
	mov	ecx, DWORD PTR recon_right_back_prev[rip]
	mov	eax, DWORD PTR right_little[rip]
	add	eax, ecx
	mov	DWORD PTR recon_right_back[rip], eax
	jmp	.L232
.L231:
	mov	ecx, DWORD PTR recon_right_back_prev[rip]
	mov	eax, DWORD PTR right_big[rip]
	add	eax, ecx
	mov	DWORD PTR recon_right_back[rip], eax
.L232:
	cmp	edx, 1
	jne	.L233
	mov	eax, DWORD PTR recon_right_back[rip]
	mov	DWORD PTR recon_right_back_prev[rip], eax
.L233:
	mov	eax, DWORD PTR full_pel_backward_vector[rip]
	cmp	eax, 1
	jne	.L234
	mov	eax, DWORD PTR recon_right_back[rip]
	mov	DWORD PTR pred_temp_bit_vector[rip], eax
	mov	eax, DWORD PTR pred_temp_bit_vector[rip]
	add	eax, eax
	mov	DWORD PTR pred_temp_bit_vector[rip], eax
	mov	eax, DWORD PTR pred_temp_bit_vector[rip]
	mov	DWORD PTR recon_right_back[rip], eax
.L234:
	mov	ecx, DWORD PTR recon_down_back_prev[rip]
	mov	eax, DWORD PTR down_little[rip]
	add	eax, ecx
	mov	DWORD PTR new_vector[rip], eax
	mov	ecx, DWORD PTR new_vector[rip]
	mov	eax, DWORD PTR max[rip]
	cmp	ecx, eax
	jg	.L235
	mov	ecx, DWORD PTR new_vector[rip]
	mov	eax, DWORD PTR min[rip]
	cmp	ecx, eax
	jl	.L235
	mov	ecx, DWORD PTR recon_down_back_prev[rip]
	mov	eax, DWORD PTR down_little[rip]
	add	eax, ecx
	mov	DWORD PTR recon_down_back[rip], eax
	jmp	.L236
.L235:
	mov	ecx, DWORD PTR recon_down_back_prev[rip]
	mov	eax, DWORD PTR down_big[rip]
	add	eax, ecx
	mov	DWORD PTR recon_down_back[rip], eax
.L236:
	cmp	edx, 1
	jne	.L237
	mov	eax, DWORD PTR recon_down_back[rip]
	mov	DWORD PTR recon_down_back_prev[rip], eax
.L237:
	mov	eax, DWORD PTR full_pel_backward_vector[rip]
	cmp	eax, 1
	jne	.L238
	mov	eax, DWORD PTR recon_down_back[rip]
	mov	DWORD PTR pred_temp_bit_vector[rip], eax
	mov	eax, DWORD PTR pred_temp_bit_vector[rip]
	add	eax, eax
	mov	DWORD PTR pred_temp_bit_vector[rip], eax
	mov	eax, DWORD PTR pred_temp_bit_vector[rip]
	mov	DWORD PTR recon_down_back[rip], eax
.L238:
	mov	eax, DWORD PTR b_num[rip]
	cmp	eax, 3
	jle	.L239
	mov	eax, DWORD PTR recon_right_back[rip]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	mov	DWORD PTR recon_right_back[rip], eax
	mov	eax, DWORD PTR recon_down_back[rip]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	mov	DWORD PTR recon_down_back[rip], eax
.L239:
	mov	eax, DWORD PTR recon_right_back[rip]
	mov	DWORD PTR pred_temp_bit_vector[rip], eax
	mov	eax, DWORD PTR pred_temp_bit_vector[rip]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	mov	DWORD PTR pred_temp_bit_vector[rip], eax
	mov	eax, DWORD PTR pred_temp_bit_vector[rip]
	mov	DWORD PTR right_back[rip], eax
	mov	eax, DWORD PTR recon_down_back[rip]
	mov	DWORD PTR pred_temp_bit_vector[rip], eax
	mov	eax, DWORD PTR pred_temp_bit_vector[rip]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	mov	DWORD PTR pred_temp_bit_vector[rip], eax
	mov	eax, DWORD PTR pred_temp_bit_vector[rip]
	mov	DWORD PTR down_back[rip], eax
	mov	eax, DWORD PTR right_back[rip]
	test	eax, eax
	jg	.L240
	mov	eax, DWORD PTR recon_right_back[rip]
	sub	eax, 1
	mov	DWORD PTR right_half_back[rip], eax
	jmp	.L241
.L240:
	mov	eax, DWORD PTR recon_right_back[rip]
	mov	DWORD PTR right_half_back[rip], eax
.L241:
	mov	eax, DWORD PTR down_back[rip]
	test	eax, eax
	jg	.L242
	mov	eax, DWORD PTR recon_down_back[rip]
	sub	eax, 1
	mov	DWORD PTR down_half_back[rip], eax
	jmp	.L244
.L242:
	mov	eax, DWORD PTR recon_down_back[rip]
	mov	DWORD PTR down_half_back[rip], eax
.L244:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	calculate_backward_motion, .-calculate_backward_motion
	.globl	calcid
	.type	calcid, @function
calcid:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	r11d, edi
	mov	r10d, esi
	mov	esi, edx
	mov	edx, ecx
	mov	edi, r8d
	mov	ecx, r9d
	lea	r9d, [r11+r10]
	lea	eax, [rsi+rdx]
	lea	r8d, 7[rax]
	test	eax, eax
	cmovs	eax, r8d
	sar	eax, 3
	add	eax, eax
	add	r9d, eax
	lea	eax, [rdi+rcx]
	lea	r8d, 7[rax]
	test	eax, eax
	cmovs	eax, r8d
	sar	eax, 3
	add	eax, r9d
	mov	DWORD PTR b_00[rip], eax
	lea	r9d, [r11+r10]
	lea	eax, [rsi+rdx]
	add	eax, 1
	lea	r8d, 7[rax]
	test	eax, eax
	cmovs	eax, r8d
	sar	eax, 3
	add	eax, eax
	add	r9d, eax
	lea	eax, [rdi+rcx]
	lea	r8d, 7[rax]
	test	eax, eax
	cmovs	eax, r8d
	sar	eax, 3
	add	eax, r9d
	mov	DWORD PTR b_10[rip], eax
	lea	r9d, [r11+r10]
	lea	eax, [rsi+rdx]
	lea	r8d, 7[rax]
	test	eax, eax
	cmovs	eax, r8d
	sar	eax, 3
	add	eax, eax
	add	r9d, eax
	lea	eax, [rdi+rcx]
	add	eax, 1
	lea	r8d, 7[rax]
	test	eax, eax
	cmovs	eax, r8d
	sar	eax, 3
	add	eax, r9d
	mov	DWORD PTR b_01[rip], eax
	lea	eax, [rsi+rdx]
	mov	r8d, eax
	sar	r8d, 31
	shr	r8d, 29
	add	eax, r8d
	and	eax, 7
	sub	eax, r8d
	mov	DWORD PTR p_i0[rip], eax
	lea	eax, [rsi+rdx]
	add	eax, 1
	cdq
	shr	edx, 29
	add	eax, edx
	and	eax, 7
	sub	eax, edx
	mov	DWORD PTR p_i1[rip], eax
	lea	eax, [rdi+rcx]
	cdq
	shr	edx, 29
	add	eax, edx
	and	eax, 7
	sub	eax, edx
	mov	DWORD PTR p_j0[rip], eax
	lea	eax, [rdi+rcx]
	add	eax, 1
	cdq
	shr	edx, 29
	add	eax, edx
	and	eax, 7
	sub	eax, edx
	mov	DWORD PTR p_j1[rip], eax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	calcid, .-calcid
	.globl	pred
	.type	pred, @function
pred:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -8[rbp], 0
	jmp	.L247
.L248:
	mov	eax, DWORD PTR -8[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, pred_block[rip]
	mov	DWORD PTR [rdx+rax], 0
	add	DWORD PTR -8[rbp], 1
.L247:
	cmp	DWORD PTR -8[rbp], 63
	jle	.L248
	mov	eax, DWORD PTR mb_type[rip]
	cmp	eax, 2
	je	.L249
	cmp	eax, 2
	jg	.L287
	test	eax, eax
	je	.L251
	cmp	eax, 1
	je	.L252
	jmp	.L287
.L251:
	mov	DWORD PTR set_prev_values[rip], 1
	jmp	.L250
.L252:
	mov	DWORD PTR -8[rbp], 0
	jmp	.L253
.L260:
	mov	DWORD PTR -4[rbp], 0
	jmp	.L254
.L259:
	mov	r8d, DWORD PTR right_for[rip]
	mov	ecx, DWORD PTR down_for[rip]
	mov	esi, DWORD PTR macroblock_address[rip]
	mov	eax, DWORD PTR previous_picture[rip]
	mov	edi, DWORD PTR -4[rbp]
	mov	edx, DWORD PTR -8[rbp]
	mov	r9d, r8d
	mov	r8d, edi
	mov	edi, eax
	call	calcid
	mov	eax, DWORD PTR right_half_for[rip]
	test	eax, eax
	jne	.L255
	mov	eax, DWORD PTR down_half_for[rip]
	test	eax, eax
	jne	.L255
	mov	eax, DWORD PTR b_00[rip]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_i0[rip]
	add	eax, edx
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_j0[rip]
	add	edx, eax
	mov	eax, DWORD PTR -8[rbp]
	lea	ecx, 0[0+rax*8]
	mov	eax, DWORD PTR -4[rbp]
	add	ecx, eax
	movsx	rax, edx
	lea	rdx, 0[0+rax*4]
	lea	rax, storage[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movsx	rdx, ecx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, pred_block[rip]
	mov	DWORD PTR [rcx+rdx], eax
.L255:
	mov	eax, DWORD PTR right_half_for[rip]
	test	eax, eax
	jne	.L256
	mov	eax, DWORD PTR down_half_for[rip]
	cmp	eax, 1
	jne	.L256
	mov	eax, DWORD PTR b_00[rip]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_i0[rip]
	add	eax, edx
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_j0[rip]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, storage[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR b_10[rip]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_i1[rip]
	add	eax, edx
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_j0[rip]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, storage[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	eax, ecx
	mov	edx, DWORD PTR -8[rbp]
	lea	ecx, 0[0+rdx*8]
	mov	edx, DWORD PTR -4[rbp]
	add	edx, ecx
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	mov	ecx, eax
	movsx	rax, edx
	lea	rdx, 0[0+rax*4]
	lea	rax, pred_block[rip]
	mov	DWORD PTR [rdx+rax], ecx
.L256:
	mov	eax, DWORD PTR right_half_for[rip]
	cmp	eax, 1
	jne	.L257
	mov	eax, DWORD PTR down_half_for[rip]
	test	eax, eax
	jne	.L257
	mov	eax, DWORD PTR b_00[rip]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_i0[rip]
	add	eax, edx
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_j0[rip]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, storage[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR b_01[rip]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_i0[rip]
	add	eax, edx
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_j1[rip]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, storage[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	eax, ecx
	mov	edx, DWORD PTR -8[rbp]
	lea	ecx, 0[0+rdx*8]
	mov	edx, DWORD PTR -4[rbp]
	add	edx, ecx
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	mov	ecx, eax
	movsx	rax, edx
	lea	rdx, 0[0+rax*4]
	lea	rax, pred_block[rip]
	mov	DWORD PTR [rdx+rax], ecx
.L257:
	mov	eax, DWORD PTR right_half_for[rip]
	cmp	eax, 1
	jne	.L258
	mov	eax, DWORD PTR down_half_for[rip]
	cmp	eax, 1
	jne	.L258
	mov	eax, DWORD PTR b_00[rip]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_i0[rip]
	add	eax, edx
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_j0[rip]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, storage[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR b_10[rip]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_i1[rip]
	add	eax, edx
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_j0[rip]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, storage[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	ecx, eax
	mov	eax, DWORD PTR b_00[rip]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_i0[rip]
	add	eax, edx
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_j0[rip]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, storage[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	ecx, eax
	mov	eax, DWORD PTR b_01[rip]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_i0[rip]
	add	eax, edx
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_j1[rip]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, storage[rip]
	mov	eax, DWORD PTR [rdx+rax]
	lea	edx, [rcx+rax]
	mov	eax, DWORD PTR -8[rbp]
	lea	ecx, 0[0+rax*8]
	mov	eax, DWORD PTR -4[rbp]
	add	ecx, eax
	mov	eax, edx
	lea	edx, 3[rax]
	test	eax, eax
	cmovs	eax, edx
	sar	eax, 2
	mov	esi, eax
	movsx	rax, ecx
	lea	rdx, 0[0+rax*4]
	lea	rax, pred_block[rip]
	mov	DWORD PTR [rdx+rax], esi
.L258:
	add	DWORD PTR -4[rbp], 1
.L254:
	cmp	DWORD PTR -4[rbp], 7
	jle	.L259
	add	DWORD PTR -8[rbp], 1
.L253:
	cmp	DWORD PTR -8[rbp], 7
	jle	.L260
	jmp	.L250
.L249:
	mov	eax, DWORD PTR is_for_info[rip]
	cmp	eax, 1
	jne	.L261
	mov	DWORD PTR -8[rbp], 0
	jmp	.L262
.L270:
	mov	DWORD PTR -4[rbp], 0
	jmp	.L263
.L269:
	mov	r8d, DWORD PTR right_for[rip]
	mov	ecx, DWORD PTR down_for[rip]
	mov	esi, DWORD PTR macroblock_address[rip]
	mov	eax, DWORD PTR previous_picture[rip]
	mov	edi, DWORD PTR -4[rbp]
	mov	edx, DWORD PTR -8[rbp]
	mov	r9d, r8d
	mov	r8d, edi
	mov	edi, eax
	call	calcid
	mov	eax, DWORD PTR right_half_for[rip]
	test	eax, eax
	jne	.L264
	mov	eax, DWORD PTR down_half_for[rip]
	test	eax, eax
	jne	.L264
	mov	eax, DWORD PTR b_00[rip]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_i0[rip]
	add	eax, edx
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_j0[rip]
	add	edx, eax
	mov	eax, DWORD PTR -8[rbp]
	lea	ecx, 0[0+rax*8]
	mov	eax, DWORD PTR -4[rbp]
	add	ecx, eax
	movsx	rax, edx
	lea	rdx, 0[0+rax*4]
	lea	rax, storage[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movsx	rdx, ecx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, pred_block[rip]
	mov	DWORD PTR [rcx+rdx], eax
.L264:
	mov	eax, DWORD PTR right_half_for[rip]
	test	eax, eax
	jne	.L265
	mov	eax, DWORD PTR down_half_for[rip]
	cmp	eax, 1
	jne	.L265
	mov	eax, DWORD PTR b_00[rip]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_i0[rip]
	add	eax, edx
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_j0[rip]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, storage[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR b_10[rip]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_i1[rip]
	add	eax, edx
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_j0[rip]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, storage[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	eax, ecx
	mov	edx, DWORD PTR -8[rbp]
	lea	ecx, 0[0+rdx*8]
	mov	edx, DWORD PTR -4[rbp]
	add	edx, ecx
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	mov	ecx, eax
	movsx	rax, edx
	lea	rdx, 0[0+rax*4]
	lea	rax, pred_block[rip]
	mov	DWORD PTR [rdx+rax], ecx
.L265:
	mov	eax, DWORD PTR right_half_for[rip]
	cmp	eax, 1
	jne	.L266
	mov	eax, DWORD PTR down_half_for[rip]
	test	eax, eax
	jne	.L266
	mov	eax, DWORD PTR b_00[rip]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_i0[rip]
	add	eax, edx
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_j0[rip]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, storage[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR b_01[rip]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_i0[rip]
	add	eax, edx
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_j1[rip]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, storage[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	eax, ecx
	cmp	eax, 1
	jle	.L267
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR -4[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, pred_block[rip]
	mov	DWORD PTR [rdx+rax], 1
	jmp	.L266
.L267:
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR -4[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, pred_block[rip]
	mov	DWORD PTR [rdx+rax], 0
.L266:
	mov	eax, DWORD PTR right_half_for[rip]
	cmp	eax, 1
	jne	.L268
	mov	eax, DWORD PTR down_half_for[rip]
	cmp	eax, 1
	jne	.L268
	mov	eax, DWORD PTR b_00[rip]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_i0[rip]
	add	eax, edx
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_j0[rip]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, storage[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR b_10[rip]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_i1[rip]
	add	eax, edx
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_j0[rip]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, storage[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	ecx, eax
	mov	eax, DWORD PTR b_00[rip]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_i0[rip]
	add	eax, edx
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_j0[rip]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, storage[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	ecx, eax
	mov	eax, DWORD PTR b_01[rip]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_i0[rip]
	add	eax, edx
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_j1[rip]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, storage[rip]
	mov	eax, DWORD PTR [rdx+rax]
	lea	edx, [rcx+rax]
	mov	eax, DWORD PTR -8[rbp]
	lea	ecx, 0[0+rax*8]
	mov	eax, DWORD PTR -4[rbp]
	add	ecx, eax
	mov	eax, edx
	lea	edx, 3[rax]
	test	eax, eax
	cmovs	eax, edx
	sar	eax, 2
	mov	esi, eax
	movsx	rax, ecx
	lea	rdx, 0[0+rax*4]
	lea	rax, pred_block[rip]
	mov	DWORD PTR [rdx+rax], esi
.L268:
	add	DWORD PTR -4[rbp], 1
.L263:
	cmp	DWORD PTR -4[rbp], 7
	jle	.L269
	add	DWORD PTR -8[rbp], 1
.L262:
	cmp	DWORD PTR -8[rbp], 7
	jle	.L270
	jmp	.L271
.L261:
	mov	eax, DWORD PTR recon_right_for_prev[rip]
	mov	DWORD PTR recon_right_for[rip], eax
	mov	eax, DWORD PTR recon_down_for_prev[rip]
	mov	DWORD PTR recon_down_for[rip], eax
.L271:
	mov	eax, DWORD PTR is_back_info[rip]
	cmp	eax, 1
	jne	.L272
	mov	DWORD PTR -8[rbp], 0
	jmp	.L273
.L280:
	mov	DWORD PTR -4[rbp], 0
	jmp	.L274
.L279:
	mov	r8d, DWORD PTR right_for[rip]
	mov	ecx, DWORD PTR down_for[rip]
	mov	esi, DWORD PTR macroblock_address[rip]
	mov	eax, DWORD PTR future_picture[rip]
	mov	edi, DWORD PTR -4[rbp]
	mov	edx, DWORD PTR -8[rbp]
	mov	r9d, r8d
	mov	r8d, edi
	mov	edi, eax
	call	calcid
	mov	eax, DWORD PTR right_half_for[rip]
	test	eax, eax
	jne	.L275
	mov	eax, DWORD PTR down_half_for[rip]
	test	eax, eax
	jne	.L275
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR -4[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, pred_block[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR b_00[rip]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_i0[rip]
	add	eax, edx
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_j0[rip]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, storage[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	lea	esi, 0[0+rax*8]
	mov	eax, DWORD PTR -4[rbp]
	add	eax, esi
	add	ecx, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, pred_block[rip]
	mov	DWORD PTR [rdx+rax], ecx
.L275:
	mov	eax, DWORD PTR right_half_for[rip]
	test	eax, eax
	jne	.L276
	mov	eax, DWORD PTR down_half_for[rip]
	cmp	eax, 1
	jne	.L276
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR -4[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, pred_block[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR b_00[rip]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_i0[rip]
	add	eax, edx
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_j0[rip]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, storage[rip]
	mov	esi, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR b_10[rip]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_i1[rip]
	add	eax, edx
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_j0[rip]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, storage[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	eax, esi
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	mov	esi, eax
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR -4[rbp]
	add	eax, edx
	add	ecx, esi
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, pred_block[rip]
	mov	DWORD PTR [rdx+rax], ecx
.L276:
	mov	eax, DWORD PTR right_half_for[rip]
	cmp	eax, 1
	jne	.L277
	mov	eax, DWORD PTR down_half_for[rip]
	test	eax, eax
	jne	.L277
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR -4[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, pred_block[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR b_00[rip]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_i0[rip]
	add	eax, edx
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_j0[rip]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, storage[rip]
	mov	esi, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR b_01[rip]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_i0[rip]
	add	eax, edx
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_j1[rip]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, storage[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	eax, esi
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	mov	esi, eax
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR -4[rbp]
	add	eax, edx
	add	ecx, esi
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, pred_block[rip]
	mov	DWORD PTR [rdx+rax], ecx
.L277:
	mov	eax, DWORD PTR right_half_for[rip]
	cmp	eax, 1
	jne	.L278
	mov	eax, DWORD PTR down_half_for[rip]
	cmp	eax, 1
	jne	.L278
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR -4[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, pred_block[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR b_00[rip]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_i0[rip]
	add	eax, edx
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_j0[rip]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, storage[rip]
	mov	esi, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR b_10[rip]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_i1[rip]
	add	eax, edx
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_j0[rip]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, storage[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	esi, eax
	mov	eax, DWORD PTR b_00[rip]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_i0[rip]
	add	eax, edx
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_j0[rip]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, storage[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	esi, eax
	mov	eax, DWORD PTR b_01[rip]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_i0[rip]
	add	eax, edx
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR p_j1[rip]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, storage[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	eax, esi
	lea	edx, 3[rax]
	test	eax, eax
	cmovs	eax, edx
	sar	eax, 2
	mov	esi, eax
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR -4[rbp]
	add	eax, edx
	add	ecx, esi
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, pred_block[rip]
	mov	DWORD PTR [rdx+rax], ecx
.L278:
	add	DWORD PTR -4[rbp], 1
.L274:
	cmp	DWORD PTR -4[rbp], 7
	jle	.L279
	add	DWORD PTR -8[rbp], 1
.L273:
	cmp	DWORD PTR -8[rbp], 7
	jle	.L280
	jmp	.L281
.L272:
	mov	eax, DWORD PTR recon_right_back_prev[rip]
	mov	DWORD PTR recon_right_back[rip], eax
	mov	eax, DWORD PTR recon_down_back_prev[rip]
	mov	DWORD PTR recon_down_back[rip], eax
.L281:
	mov	eax, DWORD PTR is_for_info[rip]
	cmp	eax, 1
	jne	.L288
	mov	eax, DWORD PTR is_back_info[rip]
	cmp	eax, 1
	jne	.L288
	mov	DWORD PTR -8[rbp], 0
	jmp	.L283
.L286:
	mov	DWORD PTR -4[rbp], 0
	jmp	.L284
.L285:
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR -4[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, pred_block[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	edx, DWORD PTR -8[rbp]
	lea	ecx, 0[0+rdx*8]
	mov	edx, DWORD PTR -4[rbp]
	add	edx, ecx
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	mov	ecx, eax
	movsx	rax, edx
	lea	rdx, 0[0+rax*4]
	lea	rax, pred_block[rip]
	mov	DWORD PTR [rdx+rax], ecx
	add	DWORD PTR -4[rbp], 1
.L284:
	cmp	DWORD PTR -4[rbp], 7
	jle	.L285
	add	DWORD PTR -8[rbp], 1
.L283:
	cmp	DWORD PTR -8[rbp], 7
	jle	.L286
.L288:
	nop
.L250:
.L287:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	pred, .-pred
	.globl	plus
	.type	plus, @function
plus:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	.cfi_offset 3, -24
	mov	ebx, 0
	jmp	.L290
.L293:
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, pred_block[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	ecx, eax
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	DWORD PTR [rdx+rax], ecx
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 255
	jle	.L291
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	DWORD PTR [rdx+rax], 255
.L291:
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	eax, DWORD PTR [rdx+rax]
	test	eax, eax
	jns	.L292
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	DWORD PTR [rdx+rax], 0
.L292:
	add	ebx, 1
.L290:
	cmp	ebx, 63
	jle	.L293
	nop
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	plus, .-plus
	.globl	store
	.type	store, @function
store:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r12
	push	rbx
	.cfi_offset 12, -24
	.cfi_offset 3, -32
	mov	eax, DWORD PTR picture_type[rip]
	cmp	eax, 1
	jg	.L298
	mov	ebx, 0
	jmp	.L296
.L297:
	mov	edx, DWORD PTR macroblock_address[rip]
	mov	eax, edx
	add	eax, eax
	add	eax, edx
	add	eax, eax
	mov	edx, eax
	mov	eax, DWORD PTR previous_picture[rip]
	add	edx, eax
	mov	eax, DWORD PTR b_num[rip]
	lea	r12d, [rdx+rax]
	mov	eax, r12d
	sal	eax, 6
	lea	r12d, [rbx+rax]
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movsx	rdx, r12d
	lea	rcx, 0[0+rdx*4]
	lea	rdx, storage[rip]
	mov	DWORD PTR [rcx+rdx], eax
	add	ebx, 1
.L296:
	cmp	ebx, 63
	jle	.L297
.L298:
	nop
	pop	rbx
	pop	r12
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	store, .-store
	.globl	display
	.type	display, @function
display:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r12
	push	rbx
	.cfi_offset 12, -24
	.cfi_offset 3, -32
	mov	r12d, 0
	mov	ebx, 0
	jmp	.L300
.L306:
	mov	eax, DWORD PTR clock[rip]
	cmp	eax, 1
	jne	.L300
	test	ebx, ebx
	jne	.L301
	mov	eax, DWORD PTR picture_type[rip]
	cmp	eax, 1
	jg	.L302
	mov	edx, DWORD PTR macroblock_address[rip]
	mov	eax, edx
	add	eax, eax
	add	eax, edx
	add	eax, eax
	mov	edx, eax
	mov	eax, DWORD PTR future_picture[rip]
	add	edx, eax
	mov	eax, DWORD PTR b_num[rip]
	add	eax, edx
	sal	eax, 6
	mov	ebx, eax
	add	ebx, r12d
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, storage[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR setoutbuffer[rip], eax
	mov	DWORD PTR putbits[rip], 8
	jmp	.L303
.L302:
	movsx	rax, r12d
	lea	rdx, 0[0+rax*4]
	lea	rax, curr_block[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR setoutbuffer[rip], eax
	mov	DWORD PTR putbits[rip], 8
.L303:
	mov	ebx, 1
	jmp	.L300
.L301:
	cmp	ebx, 1
	jne	.L304
	mov	eax, DWORD PTR to_transmit[rip]
	test	eax, eax
	jne	.L300
	mov	DWORD PTR putbits[rip], 0
	mov	ebx, 2
	jmp	.L300
.L304:
	cmp	ebx, 2
	jne	.L300
	add	r12d, 1
	cmp	r12d, 63
	jle	.L305
	mov	ebx, 3
	jmp	.L300
.L305:
	mov	ebx, 0
.L300:
	cmp	ebx, 3
	jne	.L306
	nop
	nop
	pop	rbx
	pop	r12
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	display, .-display
	.globl	outbuffer
	.type	outbuffer, @function
outbuffer:
.LFB16:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r12
	push	rbx
	.cfi_offset 12, -24
	.cfi_offset 3, -32
	mov	ebx, 0
	mov	r12d, 0
	jmp	.L308
.L312:
	mov	eax, DWORD PTR clock[rip]
	test	eax, eax
	jne	.L309
	test	ebx, ebx
	jne	.L310
	mov	eax, DWORD PTR putbits[rip]
	test	eax, eax
	jle	.L309
	mov	eax, DWORD PTR putbits[rip]
	mov	DWORD PTR to_transmit[rip], eax
	mov	ebx, 1
	jmp	.L309
.L310:
	cmp	ebx, 1
	jne	.L311
	mov	DWORD PTR isoutbit[rip], 1
	mov	eax, DWORD PTR setoutbuffer[rip]
	mov	DWORD PTR outbit[rip], eax
	mov	eax, DWORD PTR to_transmit[rip]
	sub	eax, 1
	mov	DWORD PTR to_transmit[rip], eax
	mov	eax, DWORD PTR to_transmit[rip]
	test	eax, eax
	jne	.L309
	mov	ebx, 2
	jmp	.L309
.L311:
	cmp	ebx, 2
	jne	.L309
	mov	DWORD PTR isoutbit[rip], 0
	mov	eax, DWORD PTR putbits[rip]
	test	eax, eax
	jne	.L309
	mov	DWORD PTR to_transmit[rip], -1
	mov	ebx, 0
.L309:
	add	r12d, 1
.L308:
	cmp	r12d, 4
	jle	.L312
	nop
	nop
	pop	rbx
	pop	r12
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE16:
	.size	outbuffer, .-outbuffer
	.globl	execute
	.type	execute, @function
execute:
.LFB17:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	inbuffer
	mov	eax, 0
	call	vldcontrol
	mov	eax, 0
	call	dequant
	mov	eax, 0
	call	idct
	mov	eax, 0
	call	pred
	mov	eax, 0
	call	plus
	mov	eax, 0
	call	store
	mov	eax, 0
	call	display
	mov	eax, 0
	call	outbuffer
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE17:
	.size	execute, .-execute
	.globl	main
	.type	main, @function
main:
.LFB18:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	.cfi_offset 3, -24
	mov	eax, 0
	call	init
	mov	ebx, 0
	jmp	.L315
.L316:
	mov	eax, 0
	call	execute
	add	ebx, 1
.L315:
	cmp	ebx, 4
	jle	.L316
	mov	eax, 0
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE18:
	.size	main, .-main
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"93887724.c"
	.text
	.align	2
	.global	init
	.syntax unified
	.arm
	.fpu softvfp
	.type	init, %function
init:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	init, .-init
	.align	2
	.global	inbuffer
	.syntax unified
	.arm
	.fpu softvfp
	.type	inbuffer, %function
inbuffer:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	mov	r6, #0
	mov	r4, #0
	mov	r8, #0
	mov	r5, #0
	mov	r7, #0
	b	.L3
.L14:
	ldr	r3, .L15
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L4
	add	r3, r4, #1
	rsbs	r2, r3, #0
	and	r3, r3, #255
	and	r2, r2, #255
	rsbpl	r3, r2, #0
	cmp	r8, r3
	beq	.L4
	ldr	r3, .L15+4
	ldr	r9, [r3]
	add	r3, r4, #1
	rsbs	r2, r3, #0
	and	r4, r3, #255
	and	r3, r2, #255
	rsbpl	r4, r3, #0
.L4:
	add	r3, r4, #1
	rsbs	r2, r3, #0
	and	r3, r3, #255
	and	r2, r2, #255
	rsbpl	r3, r2, #0
	cmp	r8, r3
	bne	.L5
	ldr	r3, .L15+8
	mov	r2, #1
	str	r2, [r3]
	b	.L6
.L5:
	ldr	r3, .L15+8
	mov	r2, #0
	str	r2, [r3]
.L6:
	cmp	r6, #0
	bne	.L7
	ldr	r3, .L15+12
	ldr	r3, [r3]
	cmp	r3, #0
	ble	.L8
	ldr	r3, .L15+12
	ldr	r3, [r3]
	ldr	r2, .L15+16
	str	r3, [r2]
	mov	r5, r8
	mov	r6, #1
	b	.L8
.L7:
	cmp	r6, #1
	bne	.L9
	b	.L10
.L12:
	ldr	r3, .L15+20
	str	r9, [r3]
	add	r3, r5, #1
	rsbs	r2, r3, #0
	and	r5, r3, #255
	and	r3, r2, #255
	rsbpl	r5, r3, #0
	ldr	r3, .L15+16
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r2, .L15+16
	str	r3, [r2]
.L10:
	ldr	r3, .L15+16
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L11
	cmp	r5, r4
	bne	.L12
.L11:
	ldr	r3, .L15+16
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L8
	mov	r6, #2
	b	.L8
.L9:
	cmp	r6, #2
	bne	.L8
	ldr	r3, .L15+24
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L13
	mov	r8, r5
.L13:
	ldr	r3, .L15+12
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L15+16
	mvn	r2, #0
	str	r2, [r3]
	mov	r6, #0
.L8:
	add	r7, r7, #1
.L3:
	cmp	r7, #4
	ble	.L14
	nop
	nop
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
.L16:
	.align	2
.L15:
	.word	isinbit
	.word	inbit
	.word	isfull
	.word	getbits
	.word	to_receive
	.word	getinbuffer
	.word	look_only
	.size	inbuffer, .-inbuffer
	.align	2
	.global	read_bits
	.syntax unified
	.arm
	.fpu softvfp
	.type	read_bits, %function
read_bits:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, .L21
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L18
	ldr	r3, .L21
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L21+4
	mov	r2, #0
	str	r2, [r3]
	ldr	r2, .L21+8
	ldr	r3, [fp, #-8]
	str	r3, [r2]
	b	.L20
.L18:
	ldr	r3, .L21
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L20
	ldr	r3, .L21+12
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L20
	ldr	r3, .L21+16
	ldr	r3, [r3]
	ldr	r2, .L21+20
	str	r3, [r2]
	ldr	r3, .L21+8
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L21
	mov	r2, #1
	str	r2, [r3]
.L20:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L22:
	.align	2
.L21:
	.word	read_done
	.word	look_only
	.word	getbits
	.word	to_receive
	.word	getinbuffer
	.word	read_int
	.size	read_bits, .-read_bits
	.align	2
	.global	look_bits
	.syntax unified
	.arm
	.fpu softvfp
	.type	look_bits, %function
look_bits:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, .L27
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L24
	ldr	r3, .L27
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L27+4
	mov	r2, #1
	str	r2, [r3]
	ldr	r2, .L27+8
	ldr	r3, [fp, #-8]
	str	r3, [r2]
	b	.L26
.L24:
	ldr	r3, .L27
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L26
	ldr	r3, .L27+12
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L26
	ldr	r3, .L27+16
	ldr	r3, [r3]
	ldr	r2, .L27+20
	str	r3, [r2]
	ldr	r3, .L27+8
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L27
	mov	r2, #1
	str	r2, [r3]
.L26:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L28:
	.align	2
.L27:
	.word	read_done
	.word	look_only
	.word	getbits
	.word	to_receive
	.word	getinbuffer
	.word	read_int
	.size	look_bits, .-look_bits
	.align	2
	.global	next_vld
	.syntax unified
	.arm
	.fpu softvfp
	.type	next_vld, %function
next_vld:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	mov	r2, r1
	ldr	r3, .L41
	ldr	r3, [r3]
	cmp	r3, #0
	blt	.L30
	ldr	r3, .L41
	mvn	r1, #0
	str	r1, [r3]
	sub	r3, r0, #1
	ldr	r1, .L41+4
	str	r3, [r1]
.L30:
	ldr	r3, .L41+4
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L39
	ldr	r3, .L41+4
	ldr	r3, [r3]
	add	r3, r3, #1
	mov	r0, r3
	bl	look_bits
	ldr	r3, .L41+8
	ldr	r3, [r3]
	cmp	r3, #1
	popne	{r4, r5, fp, pc}
	ldr	r3, .L41+4
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L41+4
	str	r3, [r2]
	mov	r4, #0
	b	.L33
.L34:
	ldr	r3, .L41+12
	ldr	r5, [r3]
	add	r4, r4, #1
.L33:
	ldr	r3, .L41+4
	ldr	r3, [r3]
	cmp	r4, r3
	blt	.L34
	mov	r4, #0
	b	.L35
.L38:
	ldr	r3, .L41+16
	ldr	r2, [r3, r4, lsl #2]
	ldr	r3, .L41+4
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L36
	ldr	r3, .L41+20
	ldr	r3, [r3, r4, lsl #2]
	cmp	r5, r3
	bne	.L37
	ldr	r3, .L41
	str	r4, [r3]
	mov	r4, #49
	b	.L37
.L36:
	ldr	r3, .L41+16
	ldr	r2, [r3, r4, lsl #2]
	ldr	r3, .L41+4
	ldr	r3, [r3]
	cmp	r2, r3
	ble	.L37
	mov	r4, #49
.L37:
	add	r4, r4, #1
.L35:
	cmp	r4, #49
	popgt	{r4, r5, fp, pc}
	b	.L38
.L39:
	nop
	pop	{r4, r5, fp, pc}
.L42:
	.align	2
.L41:
	.word	vld_found
	.word	vld_size
	.word	read_done
	.word	getinbuffer
	.word	vld_length
	.word	vld_bits
	.size	next_vld, .-next_vld
	.align	2
	.global	vldcontrol
	.syntax unified
	.arm
	.fpu softvfp
	.type	vldcontrol, %function
vldcontrol:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	add	fp, sp, #32
	sub	sp, sp, #28
	mov	r7, #0
	mov	r5, #0
	ldr	r3, .L170
	mov	r2, #1
	str	r2, [r3]
	ldr	r3, .L170+4
	mov	r2, #0
	str	r2, [r3]
	cmp	r7, #7
	bne	.L45
	mov	r7, #6
	b	.L45
.L167:
	ldr	r3, .L170+8
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L45
	cmp	r7, #0
	bne	.L46
	mov	r0, #32
	bl	read_bits
	ldr	r3, .L170
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L169
	mov	r5, #0
	ldr	r3, .L170+12
	ldr	r3, [r3]
	ldr	r2, .L170+16
	cmp	r3, r2
	beq	.L48
	cmp	r3, #440
	beq	.L49
	b	.L168
.L48:
	mov	r7, #1
	b	.L45
.L49:
	mov	r7, #2
	b	.L45
.L168:
	ldr	r3, .L170+12
	ldr	r3, [r3]
	cmp	r3, #256
	bne	.L51
	mov	r7, #3
	b	.L45
.L51:
	mov	r7, #4
	b	.L45
.L169:
	nop
	b	.L45
.L46:
	cmp	r7, #1
	bne	.L53
	cmp	r5, #0
	bne	.L54
	mov	r0, #1
	bl	read_bits
	ldr	r3, .L170
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L45
	ldr	r3, .L170+20
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L55
	mov	r5, #1
	mov	r6, #64
	b	.L45
.L55:
	mov	r5, #2
	b	.L45
.L54:
	cmp	r5, #1
	bne	.L56
	mov	r0, #8
	bl	read_bits
	ldr	r3, .L170
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L45
	rsb	r3, r6, #64
	ldr	r2, .L170+180
	ldr	r8, [r2, r3, lsl #2]
	ldr	r3, .L170+12
	ldr	r3, [r3]
	ldr	r2, .L170+24
	str	r3, [r2, r8, lsl #2]
	sub	r6, r6, #1
	cmp	r6, #0
	bne	.L45
	mov	r5, #2
	b	.L45
.L56:
	cmp	r5, #2
	bne	.L57
	mov	r0, #1
	bl	read_bits
	ldr	r3, .L170
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L45
	ldr	r3, .L170+20
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L58
	mov	r5, #3
	mov	r6, #64
	b	.L45
.L58:
	mov	r7, #0
	b	.L45
.L57:
	cmp	r5, #3
	bne	.L45
	mov	r0, #8
	bl	read_bits
	ldr	r3, .L170
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L45
	rsb	r3, r6, #64
	ldr	r2, .L170+180
	ldr	r8, [r2, r3, lsl #2]
	ldr	r3, .L170+12
	ldr	r3, [r3]
	ldr	r2, .L170+28
	str	r3, [r2, r8, lsl #2]
	sub	r6, r6, #1
	cmp	r6, #0
	bne	.L45
	mov	r7, #0
	b	.L45
.L53:
	cmp	r7, #2
	bne	.L59
	mov	r7, #0
	b	.L45
.L59:
	cmp	r7, #3
	bne	.L60
	cmp	r5, #0
	bne	.L61
	ldr	r3, .L170+32
	ldr	r3, [r3]
	cmp	r3, #1
	bgt	.L62
	ldr	r3, .L170+36
	ldr	r8, [r3]
	ldr	r3, .L170+40
	ldr	r3, [r3]
	ldr	r2, .L170+36
	str	r3, [r2]
	ldr	r3, .L170+40
	str	r8, [r3]
.L62:
	ldr	r3, .L170+44
	mov	r2, #0
	str	r2, [r3]
	mov	r5, #1
	b	.L45
.L61:
	cmp	r5, #1
	bne	.L45
	mov	r0, #3
	bl	read_bits
	ldr	r3, .L170
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L63
	ldr	r3, .L170+20
	ldr	r8, [r3]
.L63:
	mov	r3, r8
	sub	r3, r3, #1
	cmp	r3, #2
	bhi	.L64
	sub	r3, r8, #1
	ldr	r2, .L170+32
	str	r3, [r2]
	nop
.L64:
	ldr	r3, .L170+32
	ldr	r3, [r3]
	cmp	r3, #0
	ble	.L65
	mov	r5, #2
	b	.L45
.L65:
	mov	r7, #0
	b	.L45
.L60:
	cmp	r5, #2
	bne	.L66
	mov	r0, #4
	bl	read_bits
	ldr	r3, .L170
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L45
	ldr	r3, .L170+20
	ldr	r3, [r3]
	ldr	r2, .L170+48
	str	r3, [r2]
	ldr	r3, .L170+20
	ldr	r4, [r3]
	sub	r3, r4, #1
	str	r3, [fp, #-52]
	mov	r4, #1
	mul	r3, r4, r3
	mov	r4, r3
	ldr	r3, .L170+52
	str	r4, [r3]
	ldr	r3, .L170+32
	ldr	r3, [r3]
	cmp	r3, #2
	bne	.L67
	mov	r5, #3
	b	.L45
.L67:
	mov	r7, #0
	b	.L45
.L66:
	cmp	r5, #3
	bne	.L68
	mov	r0, #4
	bl	read_bits
	ldr	r3, .L170
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L45
	ldr	r3, .L170+20
	ldr	r3, [r3]
	ldr	r2, .L170+56
	str	r3, [r2]
	ldr	r3, .L170+20
	ldr	r4, [r3]
	sub	r3, r4, #1
	str	r3, [fp, #-56]
	mov	r4, #1
	mul	r3, r4, r3
	mov	r4, r3
	ldr	r3, .L170+60
	str	r4, [r3]
	mov	r7, #0
	b	.L45
.L68:
	cmp	r7, #4
	bne	.L69
	mov	r0, #5
	bl	read_bits
	ldr	r3, .L170
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L45
	ldr	r3, .L170+12
	ldr	r3, [r3]
	ldr	r2, .L170+64
	str	r3, [r2]
	mov	r6, #0
	mov	r7, #5
	mov	r5, #0
	b	.L45
.L69:
	cmp	r7, #5
	bne	.L70
	cmp	r5, #0
	bne	.L71
	mov	r0, #11
	bl	look_bits
	ldr	r3, .L170
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L45
	ldr	r3, .L170+12
	ldr	r3, [r3]
	cmp	r3, #8
	bne	.L72
	mov	r5, #1
	b	.L45
.L72:
	mov	r5, #2
	b	.L45
.L71:
	cmp	r5, #1
	bne	.L73
	mov	r0, #11
	bl	read_bits
	ldr	r3, .L170
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L45
	add	r6, r6, #1
	mov	r5, #0
	b	.L45
.L73:
	cmp	r5, #2
	bne	.L74
	mov	r1, #11
	mov	r0, #1
	bl	next_vld
	ldr	r3, .L170+4
	ldr	r3, [r3]
	cmp	r3, #0
	blt	.L45
	mov	r5, #3
	b	.L45
.L74:
	cmp	r5, #3
	bne	.L75
	ldr	r3, .L170+4
	ldr	r3, [r3]
	ldr	r2, .L170+68
	ldr	r3, [r2, r3, lsl #2]
	cmn	r3, #1
	bne	.L76
	ldr	r3, .L170+4
	mvn	r2, #0
	str	r2, [r3]
	mov	r5, #2
	b	.L45
.L76:
	ldr	r3, .L170+72
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L77
	ldr	r3, .L170+44
	ldr	r3, [r3]
	ldr	r2, .L170+76
	str	r3, [r2]
.L77:
	ldr	r3, .L170+80
	ldr	r3, [r3]
	mov	r0, r3
	bl	read_bits
	mov	r3, r6
	lsl	r3, r3, #5
	add	r2, r3, r6
	ldr	r3, .L170+44
	ldr	r3, [r3]
	add	r2, r2, r3
	ldr	r3, .L170+4
	ldr	r3, [r3]
	ldr	r1, .L170+68
	ldr	r3, [r1, r3, lsl #2]
	add	r3, r2, r3
	ldr	r2, .L170+44
	str	r3, [r2]
	mov	r5, #4
	b	.L45
.L75:
	cmp	r5, #4
	bne	.L78
	mov	r1, #6
	mov	r0, #1
	bl	next_vld
	ldr	r3, .L170+4
	ldr	r3, [r3]
	cmp	r3, #0
	blt	.L45
	mov	r5, #5
	b	.L45
.L78:
	cmp	r5, #5
	bne	.L79
	ldr	r3, .L170+32
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L80
	cmp	r3, #2
	bgt	.L81
	cmp	r3, #0
	beq	.L82
	cmp	r3, #1
	beq	.L83
	b	.L81
.L82:
	ldr	r3, .L170+4
	ldr	r3, [r3]
	ldr	r2, .L170+84
	ldr	r3, [r2, r3, lsl #2]
	str	r3, [fp, #-40]
	ldr	r3, .L170+4
	ldr	r3, [r3]
	ldr	r2, .L170+88
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L170+92
	str	r3, [r2]
	ldr	r3, .L170+4
	ldr	r3, [r3]
	ldr	r2, .L170+96
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L170+100
	str	r3, [r2]
	ldr	r3, .L170+4
	ldr	r3, [r3]
	ldr	r2, .L170+104
	ldr	r3, [r2, r3, lsl #2]
	str	r3, [fp, #-44]
	b	.L81
.L83:
	ldr	r3, .L170+4
	ldr	r3, [r3]
	ldr	r2, .L170+108
	ldr	r3, [r2, r3, lsl #2]
	str	r3, [fp, #-40]
	ldr	r3, .L170+4
	ldr	r3, [r3]
	ldr	r2, .L170+112
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L170+92
	str	r3, [r2]
	ldr	r3, .L170+4
	ldr	r3, [r3]
	ldr	r2, .L170+116
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L170+100
	str	r3, [r2]
	ldr	r3, .L170+4
	ldr	r3, [r3]
	ldr	r2, .L170+120
	ldr	r3, [r2, r3, lsl #2]
	str	r3, [fp, #-44]
	b	.L81
.L80:
	ldr	r3, .L170+4
	ldr	r3, [r3]
	ldr	r2, .L170+124
	ldr	r3, [r2, r3, lsl #2]
	str	r3, [fp, #-40]
	ldr	r3, .L170+4
	ldr	r3, [r3]
	ldr	r2, .L170+128
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L170+92
	str	r3, [r2]
	ldr	r3, .L170+4
	ldr	r3, [r3]
	ldr	r2, .L170+132
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L170+100
	str	r3, [r2]
	ldr	r3, .L170+4
	ldr	r3, [r3]
	ldr	r2, .L170+120
	ldr	r3, [r2, r3, lsl #2]
	str	r3, [fp, #-44]
	nop
.L81:
	ldr	r3, [fp, #-40]
	cmn	r3, #1
	beq	.L84
	ldr	r3, .L170+92
	ldr	r3, [r3]
	cmn	r3, #1
	beq	.L84
	ldr	r3, .L170+100
	ldr	r3, [r3]
	cmn	r3, #1
	beq	.L84
	ldr	r3, [fp, #-44]
	cmn	r3, #1
	bne	.L85
.L84:
	ldr	r3, .L170+4
	mvn	r2, #0
	str	r2, [r3]
	mov	r5, #4
	b	.L45
.L85:
	ldr	r3, [fp, #-44]
	cmp	r3, #1
	bne	.L87
	ldr	r3, .L170+72
	mov	r2, #0
	str	r2, [r3]
	b	.L88
.L87:
	ldr	r3, .L170+32
	ldr	r3, [r3]
	ldr	r2, .L170+72
	str	r3, [r2]
.L88:
	ldr	r3, .L170+80
	ldr	r3, [r3]
	mov	r0, r3
	bl	read_bits
	ldr	r3, [fp, #-40]
	cmp	r3, #1
	bne	.L89
	mov	r5, #6
	b	.L45
.L89:
	mov	r5, #7
	b	.L45
.L79:
	cmp	r5, #6
	bne	.L90
	mov	r0, #5
	bl	read_bits
	ldr	r3, .L170
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L45
	ldr	r3, .L170+12
	ldr	r3, [r3]
	ldr	r2, .L170+64
	str	r3, [r2]
	mov	r5, #7
	b	.L45
.L90:
	cmp	r5, #7
	bne	.L91
	ldr	r3, .L170+92
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L92
	mov	r5, #8
	b	.L45
.L92:
	mov	r5, #14
	b	.L45
.L91:
	cmp	r5, #8
	bne	.L93
	mov	r1, #11
	mov	r0, #1
	bl	next_vld
	ldr	r3, .L170+4
	ldr	r3, [r3]
	cmp	r3, #0
	blt	.L45
	mov	r5, #9
	b	.L45
.L93:
	cmp	r5, #9
	bne	.L94
	ldr	r3, .L170+4
	ldr	r3, [r3]
	ldr	r2, .L170+136
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L170+140
	str	r3, [r2]
	ldr	r3, .L170+140
	ldr	r3, [r3]
	cmp	r3, #99
	bne	.L95
	ldr	r3, .L170+4
	mvn	r2, #0
	str	r2, [r3]
	mov	r5, #8
	b	.L45
.L95:
	ldr	r3, .L170+80
	ldr	r3, [r3]
	mov	r0, r3
	bl	read_bits
	ldr	r3, .L170+52
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L97
	ldr	r3, .L170+140
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L98
.L97:
	ldr	r3, .L170+144
	mov	r2, #0
	str	r2, [r3]
	mov	r5, #11
	b	.L45
.L98:
	mov	r5, #10
	b	.L45
.L94:
	cmp	r5, #10
	bne	.L99
	ldr	r0, [fp, #-52]
	bl	read_bits
	ldr	r3, .L170
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L45
	ldr	r3, .L170+12
	ldr	r4, [r3]
	ldr	r3, .L170+52
	ldr	r3, [r3]
	sub	r3, r3, #1
	sub	r3, r3, r4
	ldr	r2, .L170+144
	str	r3, [r2]
	mov	r5, #11
	b	.L45
.L99:
	cmp	r5, #11
	bne	.L100
	mov	r1, #11
	mov	r0, #1
	bl	next_vld
	ldr	r3, .L170+4
	ldr	r3, [r3]
	cmp	r3, #0
	blt	.L45
	mov	r5, #12
	b	.L45
.L100:
	cmp	r5, #12
	bne	.L101
	ldr	r3, .L170+4
	ldr	r3, [r3]
	ldr	r2, .L170+136
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L170+148
	str	r3, [r2]
	ldr	r3, .L170+148
	ldr	r3, [r3]
	cmp	r3, #99
	bne	.L102
	ldr	r3, .L170+4
	mvn	r2, #0
	str	r2, [r3]
	mov	r5, #11
	b	.L45
.L102:
	ldr	r3, .L170+80
	ldr	r3, [r3]
	mov	r0, r3
	bl	read_bits
	ldr	r3, .L170+52
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L104
	ldr	r3, .L170+148
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L105
.L104:
	ldr	r3, .L170+152
	mov	r2, #0
	str	r2, [r3]
	mov	r5, #14
	b	.L45
.L105:
	mov	r5, #13
	b	.L45
.L101:
	cmp	r5, #13
	bne	.L106
	ldr	r0, [fp, #-52]
	bl	read_bits
	ldr	r3, .L170
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L45
	ldr	r3, .L170+12
	ldr	r4, [r3]
	ldr	r3, .L170+52
	ldr	r3, [r3]
	sub	r3, r3, #1
	sub	r3, r3, r4
	ldr	r2, .L170+152
	str	r3, [r2]
	mov	r5, #14
	b	.L45
.L106:
	cmp	r5, #14
	bne	.L107
	ldr	r3, .L170+100
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L108
	mov	r5, #15
	b	.L45
.L108:
	ldr	r3, .L170+188
	mov	r2, #0
	str	r2, [r3]
	mov	r7, #6
	mov	r5, #0
	b	.L45
.L107:
	cmp	r5, #15
	bne	.L109
	mov	r1, #11
	mov	r0, #1
	bl	next_vld
	ldr	r3, .L170+4
	ldr	r3, [r3]
	cmp	r3, #0
	blt	.L45
	mov	r5, #16
	b	.L45
.L109:
	cmp	r5, #16
	bne	.L110
	ldr	r3, .L170+4
	ldr	r3, [r3]
	ldr	r2, .L170+136
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L170+156
	str	r3, [r2]
	ldr	r3, .L170+156
	ldr	r3, [r3]
	cmp	r3, #99
	bne	.L111
	ldr	r3, .L170+4
	mvn	r2, #0
	str	r2, [r3]
	mov	r5, #15
	b	.L45
.L111:
	ldr	r3, .L170+80
	ldr	r3, [r3]
	mov	r0, r3
	bl	read_bits
	ldr	r3, .L170+52
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L113
	ldr	r3, .L170+156
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L114
.L113:
	ldr	r3, .L170+160
	mov	r2, #0
	str	r2, [r3]
	mov	r5, #18
	b	.L45
.L114:
	mov	r5, #17
	b	.L45
.L110:
	cmp	r5, #17
	bne	.L115
	ldr	r0, [fp, #-56]
	bl	read_bits
	ldr	r3, .L170
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L45
	ldr	r3, .L170+12
	ldr	r4, [r3]
	ldr	r3, .L170+60
	ldr	r3, [r3]
	sub	r3, r3, #1
	sub	r3, r3, r4
	ldr	r2, .L170+160
	str	r3, [r2]
	mov	r5, #18
	b	.L45
.L115:
	cmp	r5, #18
	bne	.L116
	mov	r1, #11
	mov	r0, #1
	bl	next_vld
	ldr	r3, .L170+4
	ldr	r3, [r3]
	cmp	r3, #0
	blt	.L45
	mov	r5, #19
	b	.L45
.L116:
	cmp	r5, #19
	bne	.L117
	ldr	r3, .L170+4
	ldr	r3, [r3]
	ldr	r2, .L170+136
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L170+164
	str	r3, [r2]
	ldr	r3, .L170+164
	ldr	r3, [r3]
	cmp	r3, #99
	bne	.L118
	ldr	r3, .L170+4
	mvn	r2, #0
	str	r2, [r3]
	mov	r5, #18
	b	.L45
.L118:
	ldr	r3, .L170+80
	ldr	r3, [r3]
	mov	r0, r3
	bl	read_bits
	ldr	r3, .L170+52
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L120
	ldr	r3, .L170+164
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L121
.L120:
	ldr	r3, .L170+168
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L170+188
	mov	r2, #0
	str	r2, [r3]
	mov	r7, #6
	mov	r5, #0
	b	.L45
.L121:
	mov	r5, #20
	b	.L45
.L117:
	cmp	r5, #20
	bne	.L45
	ldr	r0, [fp, #-56]
	bl	read_bits
	ldr	r3, .L170
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L45
	ldr	r3, .L170+12
	ldr	r4, [r3]
	ldr	r3, .L170+60
	ldr	r3, [r3]
	sub	r3, r3, #1
	sub	r3, r3, r4
	ldr	r2, .L170+168
	str	r3, [r2]
	ldr	r3, .L170+188
	mov	r2, #0
	str	r2, [r3]
	mov	r7, #6
	mov	r5, #0
	b	.L45
.L70:
	cmp	r7, #6
	bne	.L45
	cmp	r5, #0
	bne	.L122
	mov	r10, #1
	ldr	r3, .L170+72
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L123
	mov	r5, #1
	b	.L45
.L123:
	mov	r5, #7
	b	.L45
.L122:
	cmp	r5, #1
	bne	.L124
	ldr	r3, .L170+188
	ldr	r3, [r3]
	cmp	r3, #3
	bgt	.L125
	mov	r5, #4
	b	.L45
.L125:
	mov	r5, #2
	b	.L45
.L124:
	cmp	r5, #2
	bne	.L126
	mov	r1, #8
	mov	r0, #2
	bl	next_vld
	ldr	r3, .L170+4
	ldr	r3, [r3]
	cmp	r3, #0
	blt	.L45
	mov	r5, #3
	b	.L45
.L126:
	cmp	r5, #3
	bne	.L127
	ldr	r3, .L170+4
	ldr	r3, [r3]
	ldr	r2, .L170+172
	ldr	r6, [r2, r3, lsl #2]
	cmn	r6, #1
	bne	.L128
	ldr	r3, .L170+4
	mvn	r2, #0
	str	r2, [r3]
	mov	r5, #2
	b	.L45
.L128:
	ldr	r3, .L170+80
	ldr	r3, [r3]
	mov	r0, r3
	bl	read_bits
	mov	r5, #6
	b	.L45
.L127:
	cmp	r5, #4
	bne	.L129
	mov	r1, #7
	mov	r0, #2
	bl	next_vld
	ldr	r3, .L170+4
	ldr	r3, [r3]
	cmp	r3, #0
	blt	.L45
	mov	r5, #5
	b	.L45
.L129:
	cmp	r5, #5
	bne	.L130
	ldr	r3, .L170+4
	ldr	r3, [r3]
	ldr	r2, .L170+176
	ldr	r6, [r2, r3, lsl #2]
	cmn	r6, #1
	bne	.L131
	ldr	r3, .L170+4
	mvn	r2, #0
	str	r2, [r3]
	mov	r5, #4
	b	.L45
.L131:
	ldr	r3, .L170+80
	ldr	r3, [r3]
	mov	r0, r3
	bl	read_bits
	mov	r5, #6
	b	.L45
.L130:
	cmp	r5, #6
	bne	.L132
	cmp	r6, #0
	bne	.L133
	mov	r3, #0
	str	r3, [fp, #-60]
	ldr	r3, .L170+184
	mov	r2, #0
	str	r2, [r3]
	mov	r5, #9
	b	.L45
.L133:
	mov	r0, r6
	bl	read_bits
	ldr	r3, .L170
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L45
	ldr	r3, .L170+20
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L134
	ldr	r3, .L170+12
	ldr	r3, [r3]
	ldr	r2, .L170+184
	str	r3, [r2]
	b	.L135
.L134:
	mvn	r4, #0
	mul	r4, r6, r4
	ldr	r3, [fp, #-60]
	add	r3, r3, #1
	orr	r4, r4, r3
	ldr	r3, .L170+184
	str	r4, [r3]
.L135:
	mov	r5, #9
	b	.L45
.L132:
	cmp	r5, #7
	bne	.L136
	mov	r0, #6
	bl	look_bits
	ldr	r3, .L170
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L45
	ldr	r3, .L170+12
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L137
	mov	r0, #6
	bl	read_bits
	mov	r6, #0
	mov	r5, #8
	b	.L45
.L137:
	mov	r5, #11
	b	.L45
.L136:
	cmp	r5, #8
	bne	.L138
	cmp	r6, #0
	bne	.L139
	mov	r0, #6
	bl	read_bits
	ldr	r3, .L170
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L139
	ldr	r3, .L170+12
	ldr	r3, [r3]
	str	r3, [fp, #-48]
	mov	r6, #1
.L139:
	cmp	r6, #1
	bne	.L140
	mov	r0, #8
	bl	read_bits
	ldr	r3, .L170
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L140
	ldr	r3, .L170+12
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L141
	mov	r6, #2
	b	.L140
.L141:
	ldr	r3, .L170+12
	ldr	r3, [r3]
	cmp	r3, #128
	bne	.L142
	mov	r6, #3
	b	.L140
.L142:
	ldr	r3, .L170+12
	ldr	r3, [r3]
	cmp	r3, #127
	bgt	.L143
	ldr	r3, .L170+12
	ldr	r9, [r3]
	b	.L144
.L143:
	ldr	r3, .L170+12
	ldr	r3, [r3]
	sub	r9, r3, #256
.L144:
	mov	r6, #4
.L140:
	cmp	r6, #2
	bne	.L145
	mov	r0, #8
	bl	read_bits
	ldr	r3, .L170
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L145
	ldr	r3, .L170+12
	ldr	r9, [r3]
	mov	r6, #4
.L145:
	cmp	r6, #3
	bne	.L146
	mov	r0, #8
	bl	read_bits
	ldr	r3, .L170
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L146
	ldr	r3, .L170+12
	ldr	r3, [r3]
	sub	r9, r3, #256
	mov	r6, #4
.L146:
	cmp	r6, #4
	bne	.L45
	mov	r4, #0
	b	.L147
.L148:
	ldr	r3, .L170+180
	ldr	r8, [r3, r10, lsl #2]
	ldr	r3, .L170+184
	str	r9, [r3, r8, lsl #2]
	add	r10, r10, #1
	add	r4, r4, #1
.L147:
	ldr	r3, [fp, #-48]
	cmp	r4, r3
	ble	.L148
	mov	r5, #9
	b	.L45
.L138:
	cmp	r5, #9
	bne	.L149
	mov	r0, #6
	bl	look_bits
	ldr	r3, .L170
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L45
	ldr	r3, .L170+12
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L150
	mov	r0, #6
	bl	read_bits
	mov	r6, #0
	mov	r5, #10
	b	.L45
.L150:
	mov	r5, #11
	b	.L45
.L171:
	.align	2
.L170:
	.word	read_done
	.word	vld_found
	.word	clock
	.word	read_int
	.word	435
	.word	getinbuffer
	.word	intra_quant
	.word	non_intra_quant
	.word	picture_type
	.word	previous_picture
	.word	future_picture
	.word	macroblock_address
	.word	full_pel_forward_vector
	.word	forward_f
	.word	full_pel_backward_vector
	.word	backward_f
	.word	quantizer_scale
	.word	mb_inc
	.word	mb_type
	.word	past_intra_address
	.word	vld_size
	.word	table2b2aq
	.word	table2b2af
	.word	is_for_info
	.word	table2b2ab
	.word	is_back_info
	.word	table2b2ai
	.word	table2b2bq
	.word	table2b2bf
	.word	table2b2bb
	.word	table2b2bi
	.word	table2b2cq
	.word	table2b2cf
	.word	table2b2cb
	.word	table2b4
	.word	motion_horizontal_forward_code
	.word	complement_horizontal_forward_r
	.word	motion_vertical_forward_code
	.word	complement_vertical_forward_r
	.word	motion_horizontal_backward_code
	.word	complement_horizontal_backward_r
	.word	motion_vertical_backward_code
	.word	complement_vertical_backward_r
	.word	table2b5b
	.word	table2b5a
	.word	scan
	.word	dct_zz
	.word	b_num
	.word	read_done
	.word	read_int
.L149:
	cmp	r5, #10
	bne	.L151
	cmp	r6, #0
	bne	.L152
	mov	r0, #6
	bl	read_bits
	ldr	r3, .L170+192
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L152
	ldr	r3, .L170+196
	ldr	r3, [r3]
	str	r3, [fp, #-48]
	mov	r6, #1
.L152:
	cmp	r6, #1
	bne	.L153
	mov	r0, #8
	bl	read_bits
	ldr	r3, .L170+192
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L153
	ldr	r3, .L170+196
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L154
	mov	r6, #2
	b	.L153
.L154:
	ldr	r3, .L170+196
	ldr	r3, [r3]
	cmp	r3, #128
	bne	.L155
	mov	r6, #3
	b	.L153
.L155:
	ldr	r3, .L170+196
	ldr	r3, [r3]
	cmp	r3, #127
	bgt	.L156
	ldr	r3, .L170+196
	ldr	r9, [r3]
	b	.L157
.L156:
	ldr	r3, .L170+196
	ldr	r3, [r3]
	sub	r9, r3, #256
.L157:
	mov	r6, #4
.L153:
	cmp	r6, #2
	bne	.L158
	mov	r0, #8
	bl	read_bits
	ldr	r3, .L170+192
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L158
	ldr	r3, .L170+196
	ldr	r9, [r3]
	mov	r6, #4
.L158:
	cmp	r6, #3
	bne	.L159
	mov	r0, #8
	bl	read_bits
	ldr	r3, .L170+192
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L159
	ldr	r3, .L170+196
	ldr	r3, [r3]
	sub	r9, r3, #256
	mov	r6, #4
.L159:
	cmp	r6, #4
	bne	.L45
	mov	r4, #0
	b	.L160
.L161:
	ldr	r3, .L170+180
	ldr	r8, [r3, r10, lsl #2]
	ldr	r3, .L170+184
	str	r9, [r3, r8, lsl #2]
	add	r10, r10, #1
	add	r4, r4, #1
.L160:
	ldr	r3, [fp, #-48]
	cmp	r4, r3
	ble	.L161
	mov	r5, #9
	b	.L45
.L151:
	cmp	r5, #11
	bne	.L162
	mov	r0, #2
	bl	look_bits
	ldr	r3, .L170+192
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L45
	ldr	r3, .L170+196
	ldr	r3, [r3]
	cmp	r3, #2
	bne	.L163
	mov	r5, #10
	b	.L45
.L163:
	mov	r5, #12
	b	.L45
.L162:
	cmp	r5, #12
	bne	.L164
	mov	r0, #2
	bl	read_bits
	ldr	r3, .L170+192
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L45
	ldr	r3, .L170+188
	ldr	r3, [r3]
	cmp	r3, #5
	bne	.L165
	mov	r5, #13
	b	.L45
.L165:
	ldr	r3, .L170+188
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L170+188
	str	r3, [r2]
	mov	r5, #0
	b	.L45
.L164:
	cmp	r5, #13
	bne	.L45
	mov	r0, #23
	bl	look_bits
	ldr	r3, .L170+192
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L45
	ldr	r3, .L170+196
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L166
	mov	r7, #0
	b	.L45
.L166:
	mov	r6, #0
	mov	r7, #5
	mov	r5, #0
.L45:
	cmp	r7, #6
	ble	.L167
	nop
	nop
	sub	sp, fp, #32
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
	.size	vldcontrol, .-vldcontrol
	.align	2
	.global	sign
	.syntax unified
	.arm
	.fpu softvfp
	.type	sign, %function
sign:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	mov	r3, r0
	cmp	r3, #0
	bge	.L173
	mvn	r3, #0
	b	.L174
.L173:
	cmp	r3, #0
	ble	.L175
	mov	r3, #1
	b	.L174
.L175:
	mov	r3, #0
.L174:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	sign, .-sign
	.align	2
	.global	dequant
	.syntax unified
	.arm
	.fpu softvfp
	.type	dequant, %function
dequant:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	ldr	r3, .L200
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L177
	mov	r4, #0
	b	.L178
.L182:
	ldr	r3, .L200+4
	ldr	r5, [r3, r4, lsl #2]
	ldr	r3, .L200+8
	ldr	r3, [r3, r5, lsl #2]
	ldr	r2, .L200+12
	ldr	r2, [r2]
	mul	r3, r2, r3
	ldr	r2, .L200+16
	ldr	r2, [r2, r4, lsl #2]
	mul	r3, r2, r3
	add	r2, r3, #7
	cmp	r3, #0
	movlt	r3, r2
	movge	r3, r3
	asr	r3, r3, #3
	mov	r2, r3
	ldr	r3, .L200+20
	str	r2, [r3, r4, lsl #2]
	ldr	r3, .L200+20
	ldr	r6, [r3, r4, lsl #2]
	cmp	r6, #0
	bne	.L179
	ldr	r3, .L200+20
	ldr	r5, [r3, r4, lsl #2]
	ldr	r3, .L200+20
	ldr	r3, [r3, r4, lsl #2]
	mov	r0, r3
	bl	sign
	mov	r3, r0
	sub	r3, r5, r3
	ldr	r2, .L200+20
	str	r3, [r2, r4, lsl #2]
.L179:
	ldr	r3, .L200+20
	ldr	r3, [r3, r4, lsl #2]
	cmp	r3, #2048
	blt	.L180
	ldr	r3, .L200+20
	ldr	r2, .L200+24
	str	r2, [r3, r4, lsl #2]
.L180:
	ldr	r3, .L200+20
	ldr	r3, [r3, r4, lsl #2]
	cmn	r3, #2048
	bgt	.L181
	ldr	r3, .L200+20
	ldr	r2, .L200+28
	str	r2, [r3, r4, lsl #2]
.L181:
	add	r4, r4, #1
.L178:
	cmp	r4, #63
	ble	.L182
	ldr	r3, .L200+32
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L183
	ldr	r3, .L200+8
	ldr	r3, [r3]
	lsl	r3, r3, #3
	ldr	r2, .L200+20
	str	r3, [r2]
	ldr	r3, .L200+36
	ldr	r2, [r3]
	ldr	r3, .L200+40
	ldr	r3, [r3]
	sub	r3, r2, r3
	cmp	r3, #1
	ble	.L184
	ldr	r3, .L200+20
	ldr	r3, [r3]
	add	r3, r3, #1024
	ldr	r2, .L200+20
	str	r3, [r2]
	b	.L185
.L184:
	ldr	r3, .L200+20
	ldr	r2, [r3]
	ldr	r3, .L200+44
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L200+20
	str	r3, [r2]
.L185:
	ldr	r3, .L200+20
	ldr	r3, [r3]
	ldr	r2, .L200+44
	str	r3, [r2]
	b	.L199
.L183:
	ldr	r3, .L200+32
	ldr	r3, [r3]
	cmp	r3, #3
	bgt	.L187
	ldr	r3, .L200+8
	ldr	r3, [r3]
	lsl	r2, r3, #3
	ldr	r3, .L200+44
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L200+20
	str	r3, [r2]
	ldr	r3, .L200+20
	ldr	r3, [r3]
	ldr	r2, .L200+44
	str	r3, [r2]
	b	.L199
.L187:
	ldr	r3, .L200+32
	ldr	r3, [r3]
	cmp	r3, #4
	bne	.L188
	ldr	r3, .L200+8
	ldr	r3, [r3]
	lsl	r3, r3, #3
	ldr	r2, .L200+20
	str	r3, [r2]
	ldr	r3, .L200+36
	ldr	r2, [r3]
	ldr	r3, .L200+40
	ldr	r3, [r3]
	sub	r3, r2, r3
	cmp	r3, #1
	ble	.L189
	ldr	r3, .L200+20
	ldr	r3, [r3]
	add	r3, r3, #1024
	ldr	r2, .L200+20
	str	r3, [r2]
	b	.L190
.L189:
	ldr	r3, .L200+20
	ldr	r2, [r3]
	ldr	r3, .L200+48
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L200+20
	str	r3, [r2]
.L190:
	ldr	r3, .L200+20
	ldr	r3, [r3]
	ldr	r2, .L200+48
	str	r3, [r2]
	b	.L199
.L188:
	ldr	r3, .L200+32
	ldr	r3, [r3]
	cmp	r3, #5
	bne	.L199
	ldr	r3, .L200+8
	ldr	r3, [r3]
	lsl	r3, r3, #3
	ldr	r2, .L200+20
	str	r3, [r2]
	ldr	r3, .L200+36
	ldr	r2, [r3]
	ldr	r3, .L200+40
	ldr	r3, [r3]
	sub	r3, r2, r3
	cmp	r3, #1
	ble	.L191
	ldr	r3, .L200+20
	ldr	r3, [r3]
	add	r3, r3, #1024
	ldr	r2, .L200+20
	str	r3, [r2]
	b	.L192
.L191:
	ldr	r3, .L200+20
	ldr	r2, [r3]
	ldr	r3, .L200+52
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L200+20
	str	r3, [r2]
.L192:
	ldr	r3, .L200+20
	ldr	r3, [r3]
	ldr	r2, .L200+52
	str	r3, [r2]
	ldr	r3, .L200+36
	ldr	r3, [r3]
	ldr	r2, .L200+40
	str	r3, [r2]
	b	.L199
.L177:
	mov	r4, #0
	b	.L193
.L198:
	ldr	r3, .L200+4
	ldr	r5, [r3, r4, lsl #2]
	ldr	r3, .L200+8
	ldr	r3, [r3, r5, lsl #2]
	lsl	r6, r3, #1
	ldr	r3, .L200+8
	ldr	r3, [r3, r5, lsl #2]
	mov	r0, r3
	bl	sign
	mov	r3, r0
	add	r3, r6, r3
	ldr	r2, .L200+12
	ldr	r2, [r2]
	mul	r3, r2, r3
	ldr	r2, .L200+56
	ldr	r2, [r2, r4, lsl #2]
	mul	r3, r2, r3
	add	r2, r3, #15
	cmp	r3, #0
	movlt	r3, r2
	movge	r3, r3
	asr	r3, r3, #4
	mov	r2, r3
	ldr	r3, .L200+20
	str	r2, [r3, r4, lsl #2]
	ldr	r3, .L200+20
	ldr	r6, [r3, r4, lsl #2]
	cmp	r6, #0
	bne	.L194
	ldr	r3, .L200+20
	ldr	r6, [r3, r4, lsl #2]
	ldr	r3, .L200+20
	ldr	r3, [r3, r4, lsl #2]
	mov	r0, r3
	bl	sign
	mov	r3, r0
	sub	r3, r6, r3
	ldr	r2, .L200+20
	str	r3, [r2, r4, lsl #2]
.L194:
	ldr	r3, .L200+20
	ldr	r3, [r3, r4, lsl #2]
	cmp	r3, #2048
	blt	.L195
	ldr	r3, .L200+20
	ldr	r2, .L200+24
	str	r2, [r3, r4, lsl #2]
.L195:
	ldr	r3, .L200+20
	ldr	r3, [r3, r4, lsl #2]
	cmn	r3, #2048
	bgt	.L196
	ldr	r3, .L200+20
	ldr	r2, .L200+28
	str	r2, [r3, r4, lsl #2]
.L196:
	ldr	r3, .L200+8
	mov	r2, #0
	str	r2, [r3, r5, lsl #2]
	ldr	r3, .L200+8
	ldr	r3, [r3, r5, lsl #2]
	cmp	r3, #0
	beq	.L197
	ldr	r3, .L200+20
	mov	r2, #0
	str	r2, [r3, r4, lsl #2]
.L197:
	add	r4, r4, #1
.L193:
	cmp	r4, #63
	ble	.L198
.L199:
	nop
	pop	{r4, r5, r6, r7, fp, pc}
.L201:
	.align	2
.L200:
	.word	mb_type
	.word	scan
	.word	dct_zz
	.word	quantizer_scale
	.word	intra_quant
	.word	curr_block
	.word	2047
	.word	-2047
	.word	b_num
	.word	macroblock_address
	.word	past_intra_address
	.word	dct_dc_y_past
	.word	dct_dc_cb_past
	.word	dct_dc_cr_past
	.word	non_intra_quant
	.size	dequant, .-dequant
	.align	2
	.global	idct
	.syntax unified
	.arm
	.fpu softvfp
	.type	idct, %function
idct:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, fp}
	add	fp, sp, #12
	mov	r4, #0
	b	.L203
.L204:
	ldr	r3, .L219
	mov	r2, #0
	str	r2, [r3, r4, lsl #2]
	add	r4, r4, #1
.L203:
	cmp	r4, #63
	ble	.L204
	mov	r4, #0
	b	.L205
.L210:
	mov	r5, #0
	b	.L206
.L209:
	mov	r6, #0
	b	.L207
.L208:
	lsl	r3, r4, #3
	add	r3, r5, r3
	ldr	r2, .L219
	ldr	r1, [r2, r3, lsl #2]
	lsl	r3, r4, #3
	add	r3, r6, r3
	ldr	r2, .L219+4
	ldr	r3, [r2, r3, lsl #2]
	lsl	r2, r6, #3
	add	r2, r5, r2
	ldr	r0, .L219+8
	ldr	r2, [r0, r2, lsl #2]
	mul	r2, r3, r2
	lsl	r3, r4, #3
	add	r3, r5, r3
	add	r2, r1, r2
	ldr	r1, .L219
	str	r2, [r1, r3, lsl #2]
	add	r6, r6, #1
.L207:
	cmp	r6, #7
	ble	.L208
	lsl	r3, r4, #3
	add	r3, r5, r3
	ldr	r2, .L219
	ldr	r2, [r2, r3, lsl #2]
	lsl	r3, r4, #3
	add	r1, r5, r3
	mov	r3, r2
	add	r2, r3, #8128
	add	r2, r2, #63
	cmp	r3, #0
	movlt	r3, r2
	movge	r3, r3
	asr	r3, r3, #13
	mov	r2, r3
	ldr	r3, .L219
	str	r2, [r3, r1, lsl #2]
	add	r5, r5, #1
.L206:
	cmp	r5, #7
	ble	.L209
	add	r4, r4, #1
.L205:
	cmp	r4, #7
	ble	.L210
	mov	r4, #0
	b	.L211
.L212:
	ldr	r3, .L219+8
	mov	r2, #0
	str	r2, [r3, r4, lsl #2]
	add	r4, r4, #1
.L211:
	cmp	r4, #63
	ble	.L212
	mov	r4, #0
	b	.L213
.L218:
	mov	r5, #0
	b	.L214
.L217:
	mov	r6, #0
	b	.L215
.L216:
	lsl	r3, r4, #3
	add	r3, r5, r3
	ldr	r2, .L219+8
	ldr	r1, [r2, r3, lsl #2]
	lsl	r3, r4, #3
	add	r3, r6, r3
	ldr	r2, .L219
	ldr	r3, [r2, r3, lsl #2]
	lsl	r2, r5, #3
	add	r2, r6, r2
	ldr	r0, .L219+4
	ldr	r2, [r0, r2, lsl #2]
	mul	r2, r3, r2
	lsl	r3, r4, #3
	add	r3, r5, r3
	add	r2, r1, r2
	ldr	r1, .L219+8
	str	r2, [r1, r3, lsl #2]
	add	r6, r6, #1
.L215:
	cmp	r6, #7
	ble	.L216
	lsl	r3, r4, #3
	add	r3, r5, r3
	ldr	r2, .L219+8
	ldr	r2, [r2, r3, lsl #2]
	lsl	r3, r4, #3
	add	r1, r5, r3
	mov	r3, r2
	add	r2, r3, #8128
	add	r2, r2, #63
	cmp	r3, #0
	movlt	r3, r2
	movge	r3, r3
	asr	r3, r3, #13
	mov	r2, r3
	ldr	r3, .L219+8
	str	r2, [r3, r1, lsl #2]
	add	r5, r5, #1
.L214:
	cmp	r5, #7
	ble	.L217
	add	r4, r4, #1
.L213:
	cmp	r4, #7
	ble	.L218
	nop
	nop
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, r6, fp}
	bx	lr
.L220:
	.align	2
.L219:
	.word	temp_block
	.word	idct_coeff
	.word	curr_block
	.size	idct, .-idct
	.align	2
	.global	calculate_forward_motion
	.syntax unified
	.arm
	.fpu softvfp
	.type	calculate_forward_motion, %function
calculate_forward_motion:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	mov	r2, r0
	ldr	r3, .L239
	ldr	r3, [r3]
	ldr	r1, .L239+4
	ldr	r1, [r1]
	mul	r3, r1, r3
	ldr	r1, .L239+8
	str	r3, [r1]
	ldr	r3, .L239+8
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L222
	ldr	r3, .L239+12
	mov	r1, #0
	str	r1, [r3]
	b	.L223
.L222:
	ldr	r3, .L239+8
	ldr	r3, [r3]
	cmp	r3, #0
	ble	.L224
	ldr	r3, .L239+8
	ldr	r1, [r3]
	ldr	r3, .L239+16
	ldr	r3, [r3]
	sub	r3, r1, r3
	ldr	r1, .L239+8
	str	r3, [r1]
	ldr	r3, .L239+8
	ldr	r1, [r3]
	ldr	r3, .L239+4
	ldr	r3, [r3]
	lsl	r3, r3, #5
	sub	r3, r1, r3
	ldr	r1, .L239+12
	str	r3, [r1]
	b	.L223
.L224:
	ldr	r3, .L239+8
	ldr	r1, [r3]
	ldr	r3, .L239+16
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L239+8
	str	r3, [r1]
	ldr	r3, .L239+4
	ldr	r3, [r3]
	lsl	r1, r3, #5
	ldr	r3, .L239+8
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L239+12
	str	r3, [r1]
.L223:
	ldr	r3, .L239+20
	ldr	r3, [r3]
	ldr	r1, .L239+4
	ldr	r1, [r1]
	mul	r3, r1, r3
	ldr	r1, .L239+24
	str	r3, [r1]
	ldr	r3, .L239+24
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L225
	ldr	r3, .L239+28
	mov	r1, #0
	str	r1, [r3]
	b	.L226
.L225:
	ldr	r3, .L239+24
	ldr	r3, [r3]
	cmp	r3, #0
	ble	.L227
	ldr	r3, .L239+24
	ldr	r1, [r3]
	ldr	r3, .L239+32
	ldr	r3, [r3]
	sub	r3, r1, r3
	ldr	r1, .L239+24
	str	r3, [r1]
	ldr	r3, .L239+24
	ldr	r1, [r3]
	ldr	r3, .L239+4
	ldr	r3, [r3]
	lsl	r3, r3, #5
	sub	r3, r1, r3
	ldr	r1, .L239+28
	str	r3, [r1]
	b	.L226
.L227:
	ldr	r3, .L239+24
	ldr	r1, [r3]
	ldr	r3, .L239+32
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L239+24
	str	r3, [r1]
	ldr	r3, .L239+4
	ldr	r3, [r3]
	lsl	r1, r3, #5
	ldr	r3, .L239+24
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L239+28
	str	r3, [r1]
.L226:
	ldr	r3, .L239+4
	ldr	r3, [r3]
	lsl	r3, r3, #4
	sub	r3, r3, #1
	ldr	r1, .L239+36
	str	r3, [r1]
	ldr	r3, .L239+4
	ldr	r1, [r3]
	mov	r3, r1
	lsl	r3, r3, #28
	sub	r3, r3, r1
	lsl	r3, r3, #4
	mov	r1, r3
	ldr	r3, .L239+40
	str	r1, [r3]
	ldr	r3, .L239+44
	ldr	r1, [r3]
	ldr	r3, .L239+8
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L239+48
	str	r3, [r1]
	ldr	r3, .L239+48
	ldr	r1, [r3]
	ldr	r3, .L239+36
	ldr	r3, [r3]
	cmp	r1, r3
	bgt	.L228
	ldr	r3, .L239+48
	ldr	r1, [r3]
	ldr	r3, .L239+40
	ldr	r3, [r3]
	cmp	r1, r3
	blt	.L228
	ldr	r3, .L239+44
	ldr	r1, [r3]
	ldr	r3, .L239+8
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L239+52
	str	r3, [r1]
	b	.L229
.L228:
	ldr	r3, .L239+44
	ldr	r1, [r3]
	ldr	r3, .L239+12
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L239+52
	str	r3, [r1]
.L229:
	cmp	r2, #1
	bne	.L230
	ldr	r3, .L239+52
	ldr	r3, [r3]
	ldr	r1, .L239+44
	str	r3, [r1]
.L230:
	ldr	r3, .L239+56
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L231
	ldr	r3, .L239+52
	ldr	r3, [r3]
	ldr	r1, .L239+60
	str	r3, [r1]
	ldr	r3, .L239+60
	ldr	r3, [r3]
	lsl	r3, r3, #1
	ldr	r1, .L239+60
	str	r3, [r1]
	ldr	r3, .L239+60
	ldr	r3, [r3]
	ldr	r1, .L239+52
	str	r3, [r1]
.L231:
	ldr	r3, .L239+64
	ldr	r1, [r3]
	ldr	r3, .L239+24
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L239+48
	str	r3, [r1]
	ldr	r3, .L239+48
	ldr	r1, [r3]
	ldr	r3, .L239+36
	ldr	r3, [r3]
	cmp	r1, r3
	bgt	.L232
	ldr	r3, .L239+48
	ldr	r1, [r3]
	ldr	r3, .L239+40
	ldr	r3, [r3]
	cmp	r1, r3
	blt	.L232
	ldr	r3, .L239+64
	ldr	r1, [r3]
	ldr	r3, .L239+24
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L239+68
	str	r3, [r1]
	b	.L233
.L232:
	ldr	r3, .L239+64
	ldr	r1, [r3]
	ldr	r3, .L239+28
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L239+68
	str	r3, [r1]
.L233:
	cmp	r2, #1
	bne	.L234
	ldr	r3, .L239+68
	ldr	r3, [r3]
	ldr	r2, .L239+64
	str	r3, [r2]
.L234:
	ldr	r3, .L239+56
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L235
	ldr	r3, .L239+68
	ldr	r3, [r3]
	ldr	r2, .L239+60
	str	r3, [r2]
	ldr	r3, .L239+60
	ldr	r3, [r3]
	cmp	r3, #0
	bgt	.L236
	ldr	r3, .L239+60
	mov	r2, #1
	str	r2, [r3]
	b	.L237
.L236:
	ldr	r3, .L239+60
	mov	r2, #0
	str	r2, [r3]
.L237:
	ldr	r3, .L239+60
	ldr	r3, [r3]
	ldr	r2, .L239+68
	str	r3, [r2]
.L235:
	ldr	r3, .L239+72
	ldr	r3, [r3]
	cmp	r3, #3
	ble	.L238
	ldr	r3, .L239+52
	ldr	r3, [r3]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L239+52
	str	r2, [r3]
	ldr	r3, .L239+68
	ldr	r3, [r3]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L239+68
	str	r2, [r3]
.L238:
	ldr	r3, .L239+52
	ldr	r3, [r3]
	ldr	r2, .L239+60
	str	r3, [r2]
	ldr	r3, .L239+60
	ldr	r2, [r3]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r2, r3, #3
	sub	r3, r2, r3
	ldr	r2, .L239+60
	str	r3, [r2]
	ldr	r3, .L239+60
	ldr	r3, [r3]
	ldr	r2, .L239+76
	str	r3, [r2]
	ldr	r3, .L239+68
	ldr	r3, [r3]
	ldr	r2, .L239+60
	str	r3, [r2]
	ldr	r3, .L239+60
	ldr	r3, [r3]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L239+60
	str	r2, [r3]
	ldr	r3, .L239+60
	ldr	r3, [r3]
	ldr	r2, .L239+80
	str	r3, [r2]
	ldr	r3, .L239+52
	ldr	r2, [r3]
	ldr	r3, .L239+76
	ldr	r3, [r3]
	lsl	r3, r3, #1
	sub	r3, r2, r3
	ldr	r2, .L239+84
	str	r3, [r2]
	ldr	r3, .L239+68
	ldr	r2, [r3]
	ldr	r3, .L239+80
	ldr	r3, [r3]
	lsl	r3, r3, #1
	sub	r3, r2, r3
	ldr	r2, .L239+88
	str	r3, [r2]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L240:
	.align	2
.L239:
	.word	motion_horizontal_forward_code
	.word	forward_f
	.word	right_little
	.word	right_big
	.word	complement_horizontal_forward_r
	.word	motion_vertical_forward_code
	.word	down_little
	.word	down_big
	.word	complement_vertical_forward_r
	.word	max
	.word	min
	.word	recon_right_for_prev
	.word	new_vector
	.word	recon_right_for
	.word	full_pel_forward_vector
	.word	pred_temp_bit_vector
	.word	recon_down_for_prev
	.word	recon_down_for
	.word	b_num
	.word	right_for
	.word	down_for
	.word	right_half_for
	.word	down_half_for
	.size	calculate_forward_motion, .-calculate_forward_motion
	.align	2
	.global	calculate_backward_motion
	.syntax unified
	.arm
	.fpu softvfp
	.type	calculate_backward_motion, %function
calculate_backward_motion:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	mov	r2, r0
	ldr	r3, .L262
	ldr	r3, [r3]
	ldr	r1, .L262+4
	ldr	r1, [r1]
	mul	r3, r1, r3
	ldr	r1, .L262+8
	str	r3, [r1]
	ldr	r3, .L262+8
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L242
	ldr	r3, .L262+12
	mov	r1, #0
	str	r1, [r3]
	b	.L243
.L242:
	ldr	r3, .L262+8
	ldr	r3, [r3]
	cmp	r3, #0
	ble	.L244
	ldr	r3, .L262+8
	ldr	r1, [r3]
	ldr	r3, .L262+16
	ldr	r3, [r3]
	sub	r3, r1, r3
	ldr	r1, .L262+8
	str	r3, [r1]
	ldr	r3, .L262+8
	ldr	r1, [r3]
	ldr	r3, .L262+4
	ldr	r3, [r3]
	lsl	r3, r3, #5
	sub	r3, r1, r3
	ldr	r1, .L262+12
	str	r3, [r1]
	b	.L243
.L244:
	ldr	r3, .L262+8
	ldr	r1, [r3]
	ldr	r3, .L262+16
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L262+8
	str	r3, [r1]
	ldr	r3, .L262+4
	ldr	r3, [r3]
	lsl	r1, r3, #5
	ldr	r3, .L262+8
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L262+12
	str	r3, [r1]
.L243:
	ldr	r3, .L262+20
	ldr	r3, [r3]
	ldr	r1, .L262+4
	ldr	r1, [r1]
	mul	r3, r1, r3
	ldr	r1, .L262+24
	str	r3, [r1]
	ldr	r3, .L262+24
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L245
	ldr	r3, .L262+28
	mov	r1, #0
	str	r1, [r3]
	b	.L246
.L245:
	ldr	r3, .L262+24
	ldr	r3, [r3]
	cmp	r3, #0
	ble	.L247
	ldr	r3, .L262+24
	ldr	r1, [r3]
	ldr	r3, .L262+32
	ldr	r3, [r3]
	sub	r3, r1, r3
	ldr	r1, .L262+24
	str	r3, [r1]
	ldr	r3, .L262+24
	ldr	r1, [r3]
	ldr	r3, .L262+4
	ldr	r3, [r3]
	lsl	r3, r3, #5
	sub	r3, r1, r3
	ldr	r1, .L262+28
	str	r3, [r1]
	b	.L246
.L247:
	ldr	r3, .L262+24
	ldr	r1, [r3]
	ldr	r3, .L262+32
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L262+24
	str	r3, [r1]
	ldr	r3, .L262+4
	ldr	r3, [r3]
	lsl	r1, r3, #5
	ldr	r3, .L262+24
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L262+28
	str	r3, [r1]
.L246:
	ldr	r3, .L262+4
	ldr	r3, [r3]
	lsl	r3, r3, #4
	sub	r3, r3, #1
	ldr	r1, .L262+36
	str	r3, [r1]
	ldr	r3, .L262+4
	ldr	r1, [r3]
	mov	r3, r1
	lsl	r3, r3, #28
	sub	r3, r3, r1
	lsl	r3, r3, #4
	mov	r1, r3
	ldr	r3, .L262+40
	str	r1, [r3]
	ldr	r3, .L262+44
	ldr	r1, [r3]
	ldr	r3, .L262+8
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L262+48
	str	r3, [r1]
	ldr	r3, .L262+48
	ldr	r1, [r3]
	ldr	r3, .L262+36
	ldr	r3, [r3]
	cmp	r1, r3
	bgt	.L248
	ldr	r3, .L262+48
	ldr	r1, [r3]
	ldr	r3, .L262+40
	ldr	r3, [r3]
	cmp	r1, r3
	blt	.L248
	ldr	r3, .L262+44
	ldr	r1, [r3]
	ldr	r3, .L262+8
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L262+52
	str	r3, [r1]
	b	.L249
.L248:
	ldr	r3, .L262+44
	ldr	r1, [r3]
	ldr	r3, .L262+12
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L262+52
	str	r3, [r1]
.L249:
	cmp	r2, #1
	bne	.L250
	ldr	r3, .L262+52
	ldr	r3, [r3]
	ldr	r1, .L262+44
	str	r3, [r1]
.L250:
	ldr	r3, .L262+56
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L251
	ldr	r3, .L262+52
	ldr	r3, [r3]
	ldr	r1, .L262+60
	str	r3, [r1]
	ldr	r3, .L262+60
	ldr	r3, [r3]
	lsl	r3, r3, #1
	ldr	r1, .L262+60
	str	r3, [r1]
	ldr	r3, .L262+60
	ldr	r3, [r3]
	ldr	r1, .L262+52
	str	r3, [r1]
.L251:
	ldr	r3, .L262+64
	ldr	r1, [r3]
	ldr	r3, .L262+24
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L262+48
	str	r3, [r1]
	ldr	r3, .L262+48
	ldr	r1, [r3]
	ldr	r3, .L262+36
	ldr	r3, [r3]
	cmp	r1, r3
	bgt	.L252
	ldr	r3, .L262+48
	ldr	r1, [r3]
	ldr	r3, .L262+40
	ldr	r3, [r3]
	cmp	r1, r3
	blt	.L252
	ldr	r3, .L262+64
	ldr	r1, [r3]
	ldr	r3, .L262+24
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L262+68
	str	r3, [r1]
	b	.L253
.L252:
	ldr	r3, .L262+64
	ldr	r1, [r3]
	ldr	r3, .L262+28
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L262+68
	str	r3, [r1]
.L253:
	cmp	r2, #1
	bne	.L254
	ldr	r3, .L262+68
	ldr	r3, [r3]
	ldr	r2, .L262+64
	str	r3, [r2]
.L254:
	ldr	r3, .L262+56
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L255
	ldr	r3, .L262+68
	ldr	r3, [r3]
	ldr	r2, .L262+60
	str	r3, [r2]
	ldr	r3, .L262+60
	ldr	r3, [r3]
	lsl	r3, r3, #1
	ldr	r2, .L262+60
	str	r3, [r2]
	ldr	r3, .L262+60
	ldr	r3, [r3]
	ldr	r2, .L262+68
	str	r3, [r2]
.L255:
	ldr	r3, .L262+72
	ldr	r3, [r3]
	cmp	r3, #3
	ble	.L256
	ldr	r3, .L262+52
	ldr	r3, [r3]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L262+52
	str	r2, [r3]
	ldr	r3, .L262+68
	ldr	r3, [r3]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L262+68
	str	r2, [r3]
.L256:
	ldr	r3, .L262+52
	ldr	r3, [r3]
	ldr	r2, .L262+60
	str	r3, [r2]
	ldr	r3, .L262+60
	ldr	r3, [r3]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L262+60
	str	r2, [r3]
	ldr	r3, .L262+60
	ldr	r3, [r3]
	ldr	r2, .L262+76
	str	r3, [r2]
	ldr	r3, .L262+68
	ldr	r3, [r3]
	ldr	r2, .L262+60
	str	r3, [r2]
	ldr	r3, .L262+60
	ldr	r3, [r3]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L262+60
	str	r2, [r3]
	ldr	r3, .L262+60
	ldr	r3, [r3]
	ldr	r2, .L262+80
	str	r3, [r2]
	ldr	r3, .L262+76
	ldr	r3, [r3]
	cmp	r3, #0
	bgt	.L257
	ldr	r3, .L262+52
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r2, .L262+84
	str	r3, [r2]
	b	.L258
.L257:
	ldr	r3, .L262+52
	ldr	r3, [r3]
	ldr	r2, .L262+84
	str	r3, [r2]
.L258:
	ldr	r3, .L262+80
	ldr	r3, [r3]
	cmp	r3, #0
	bgt	.L259
	ldr	r3, .L262+68
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r2, .L262+88
	str	r3, [r2]
	b	.L261
.L259:
	ldr	r3, .L262+68
	ldr	r3, [r3]
	ldr	r2, .L262+88
	str	r3, [r2]
.L261:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L263:
	.align	2
.L262:
	.word	motion_horizontal_backward_code
	.word	backward_f
	.word	right_little
	.word	right_big
	.word	complement_horizontal_backward_r
	.word	motion_vertical_backward_code
	.word	down_little
	.word	down_big
	.word	complement_vertical_backward_r
	.word	max
	.word	min
	.word	recon_right_back_prev
	.word	new_vector
	.word	recon_right_back
	.word	full_pel_backward_vector
	.word	pred_temp_bit_vector
	.word	recon_down_back_prev
	.word	recon_down_back
	.word	b_num
	.word	right_back
	.word	down_back
	.word	right_half_back
	.word	down_half_back
	.size	calculate_backward_motion, .-calculate_backward_motion
	.align	2
	.global	calcid
	.syntax unified
	.arm
	.fpu softvfp
	.type	calcid, %function
calcid:
	@ args = 8, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, fp, lr}
	add	fp, sp, #16
	mov	r4, r0
	mov	lr, r1
	ldr	ip, [fp, #4]
	ldr	r0, [fp, #8]
	add	r5, r4, lr
	add	r1, r2, r3
	add	r6, r1, #7
	cmp	r1, #0
	movlt	r1, r6
	movge	r1, r1
	asr	r1, r1, #3
	lsl	r1, r1, #1
	add	r5, r5, r1
	add	r1, ip, r0
	add	r6, r1, #7
	cmp	r1, #0
	movlt	r1, r6
	movge	r1, r1
	asr	r1, r1, #3
	add	r1, r5, r1
	ldr	r5, .L265
	str	r1, [r5]
	add	r5, r4, lr
	add	r1, r2, r3
	add	r1, r1, #1
	add	r6, r1, #7
	cmp	r1, #0
	movlt	r1, r6
	movge	r1, r1
	asr	r1, r1, #3
	lsl	r1, r1, #1
	add	r5, r5, r1
	add	r1, ip, r0
	add	r6, r1, #7
	cmp	r1, #0
	movlt	r1, r6
	movge	r1, r1
	asr	r1, r1, #3
	add	r1, r5, r1
	ldr	r5, .L265+4
	str	r1, [r5]
	add	lr, r4, lr
	add	r1, r2, r3
	add	r4, r1, #7
	cmp	r1, #0
	movlt	r1, r4
	movge	r1, r1
	asr	r1, r1, #3
	lsl	r1, r1, #1
	add	lr, lr, r1
	add	r1, ip, r0
	add	r1, r1, #1
	add	r4, r1, #7
	cmp	r1, #0
	movlt	r1, r4
	movge	r1, r1
	asr	r1, r1, #3
	add	r1, lr, r1
	ldr	lr, .L265+8
	str	r1, [lr]
	add	r1, r2, r3
	rsbs	lr, r1, #0
	and	r1, r1, #7
	and	lr, lr, #7
	rsbpl	r1, lr, #0
	ldr	lr, .L265+12
	str	r1, [lr]
	add	r3, r2, r3
	add	r3, r3, #1
	rsbs	r2, r3, #0
	and	r3, r3, #7
	and	r2, r2, #7
	rsbpl	r3, r2, #0
	ldr	r2, .L265+16
	str	r3, [r2]
	add	r3, ip, r0
	rsbs	r2, r3, #0
	and	r3, r3, #7
	and	r2, r2, #7
	rsbpl	r3, r2, #0
	ldr	r2, .L265+20
	str	r3, [r2]
	add	r3, ip, r0
	add	r3, r3, #1
	rsbs	r2, r3, #0
	and	r3, r3, #7
	and	r2, r2, #7
	rsbpl	r3, r2, #0
	ldr	r2, .L265+24
	str	r3, [r2]
	nop
	pop	{r4, r5, r6, fp, pc}
.L266:
	.align	2
.L265:
	.word	b_00
	.word	b_10
	.word	b_01
	.word	p_i0
	.word	p_i1
	.word	p_j0
	.word	p_j1
	.size	calcid, .-calcid
	.align	2
	.global	pred
	.syntax unified
	.arm
	.fpu softvfp
	.type	pred, %function
pred:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	mov	r3, #0
	str	r3, [fp, #-12]
	b	.L268
.L269:
	ldr	r2, .L310
	ldr	r3, [fp, #-12]
	mov	r1, #0
	str	r1, [r2, r3, lsl #2]
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	str	r3, [fp, #-12]
.L268:
	ldr	r3, [fp, #-12]
	cmp	r3, #63
	ble	.L269
	ldr	r3, .L310+4
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L270
	cmp	r3, #2
	bgt	.L308
	cmp	r3, #0
	beq	.L272
	cmp	r3, #1
	beq	.L273
	b	.L308
.L272:
	ldr	r3, .L310+8
	mov	r2, #1
	str	r2, [r3]
	b	.L271
.L273:
	mov	r3, #0
	str	r3, [fp, #-12]
	b	.L274
.L281:
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L275
.L280:
	ldr	r3, .L310+12
	ldr	r0, [r3]
	ldr	r3, .L310+16
	ldr	r1, [r3]
	ldr	r3, .L310+20
	ldr	r2, [r3]
	ldr	r3, .L310+24
	ldr	r3, [r3]
	str	r3, [sp, #4]
	ldr	r3, [fp, #-8]
	str	r3, [sp]
	mov	r3, r2
	ldr	r2, [fp, #-12]
	bl	calcid
	ldr	r3, .L310+28
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L276
	ldr	r3, .L310+32
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L276
	ldr	r3, .L310+36
	ldr	r3, [r3]
	lsl	r2, r3, #3
	ldr	r3, .L310+40
	ldr	r3, [r3]
	add	r3, r2, r3
	lsl	r2, r3, #3
	ldr	r3, .L310+44
	ldr	r3, [r3]
	add	r2, r2, r3
	ldr	r3, [fp, #-12]
	lsl	r1, r3, #3
	ldr	r3, [fp, #-8]
	add	r3, r1, r3
	ldr	r1, .L310+48
	ldr	r2, [r1, r2, lsl #2]
	ldr	r1, .L310
	str	r2, [r1, r3, lsl #2]
.L276:
	ldr	r3, .L310+28
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L277
	ldr	r3, .L310+32
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L277
	ldr	r3, .L310+36
	ldr	r3, [r3]
	lsl	r2, r3, #3
	ldr	r3, .L310+40
	ldr	r3, [r3]
	add	r3, r2, r3
	lsl	r2, r3, #3
	ldr	r3, .L310+44
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L310+48
	ldr	r2, [r2, r3, lsl #2]
	ldr	r3, .L310+52
	ldr	r3, [r3]
	lsl	r1, r3, #3
	ldr	r3, .L310+56
	ldr	r3, [r3]
	add	r3, r1, r3
	lsl	r1, r3, #3
	ldr	r3, .L310+44
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L310+48
	ldr	r3, [r1, r3, lsl #2]
	add	r3, r2, r3
	ldr	r2, [fp, #-12]
	lsl	r1, r2, #3
	ldr	r2, [fp, #-8]
	add	r2, r1, r2
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L310
	str	r1, [r3, r2, lsl #2]
.L277:
	ldr	r3, .L310+28
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L278
	ldr	r3, .L310+32
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L278
	ldr	r3, .L310+36
	ldr	r3, [r3]
	lsl	r2, r3, #3
	ldr	r3, .L310+40
	ldr	r3, [r3]
	add	r3, r2, r3
	lsl	r2, r3, #3
	ldr	r3, .L310+44
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L310+48
	ldr	r2, [r2, r3, lsl #2]
	ldr	r3, .L310+60
	ldr	r3, [r3]
	lsl	r1, r3, #3
	ldr	r3, .L310+40
	ldr	r3, [r3]
	add	r3, r1, r3
	lsl	r1, r3, #3
	ldr	r3, .L310+64
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L310+48
	ldr	r3, [r1, r3, lsl #2]
	add	r3, r2, r3
	ldr	r2, [fp, #-12]
	lsl	r1, r2, #3
	ldr	r2, [fp, #-8]
	add	r2, r1, r2
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L310
	str	r1, [r3, r2, lsl #2]
.L278:
	ldr	r3, .L310+28
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L279
	ldr	r3, .L310+32
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L279
	ldr	r3, .L310+36
	ldr	r3, [r3]
	lsl	r2, r3, #3
	ldr	r3, .L310+40
	ldr	r3, [r3]
	add	r3, r2, r3
	lsl	r2, r3, #3
	ldr	r3, .L310+44
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L310+48
	ldr	r2, [r2, r3, lsl #2]
	ldr	r3, .L310+52
	ldr	r3, [r3]
	lsl	r1, r3, #3
	ldr	r3, .L310+56
	ldr	r3, [r3]
	add	r3, r1, r3
	lsl	r1, r3, #3
	ldr	r3, .L310+44
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L310+48
	ldr	r3, [r1, r3, lsl #2]
	add	r2, r2, r3
	ldr	r3, .L310+36
	ldr	r3, [r3]
	lsl	r1, r3, #3
	ldr	r3, .L310+40
	ldr	r3, [r3]
	add	r3, r1, r3
	lsl	r1, r3, #3
	ldr	r3, .L310+44
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L310+48
	ldr	r3, [r1, r3, lsl #2]
	add	r2, r2, r3
	ldr	r3, .L310+60
	ldr	r3, [r3]
	lsl	r1, r3, #3
	ldr	r3, .L310+40
	ldr	r3, [r3]
	add	r3, r1, r3
	lsl	r1, r3, #3
	ldr	r3, .L310+64
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L310+48
	ldr	r3, [r1, r3, lsl #2]
	add	r1, r2, r3
	ldr	r3, [fp, #-12]
	lsl	r2, r3, #3
	ldr	r3, [fp, #-8]
	add	r2, r2, r3
	mov	r3, r1
	add	r1, r3, #3
	cmp	r3, #0
	movlt	r3, r1
	movge	r3, r3
	asr	r3, r3, #2
	mov	r1, r3
	ldr	r3, .L310
	str	r1, [r3, r2, lsl #2]
.L279:
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L275:
	ldr	r3, [fp, #-8]
	cmp	r3, #7
	ble	.L280
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	str	r3, [fp, #-12]
.L274:
	ldr	r3, [fp, #-12]
	cmp	r3, #7
	ble	.L281
	b	.L271
.L270:
	ldr	r3, .L310+68
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L282
	mov	r3, #0
	str	r3, [fp, #-12]
	b	.L283
.L291:
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L284
.L290:
	ldr	r3, .L310+12
	ldr	r0, [r3]
	ldr	r3, .L310+16
	ldr	r1, [r3]
	ldr	r3, .L310+20
	ldr	r2, [r3]
	ldr	r3, .L310+24
	ldr	r3, [r3]
	str	r3, [sp, #4]
	ldr	r3, [fp, #-8]
	str	r3, [sp]
	mov	r3, r2
	ldr	r2, [fp, #-12]
	bl	calcid
	ldr	r3, .L310+28
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L285
	ldr	r3, .L310+32
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L285
	ldr	r3, .L310+36
	ldr	r3, [r3]
	lsl	r2, r3, #3
	ldr	r3, .L310+40
	ldr	r3, [r3]
	add	r3, r2, r3
	lsl	r2, r3, #3
	ldr	r3, .L310+44
	ldr	r3, [r3]
	add	r2, r2, r3
	ldr	r3, [fp, #-12]
	lsl	r1, r3, #3
	ldr	r3, [fp, #-8]
	add	r3, r1, r3
	ldr	r1, .L310+48
	ldr	r2, [r1, r2, lsl #2]
	ldr	r1, .L310
	str	r2, [r1, r3, lsl #2]
.L285:
	ldr	r3, .L310+28
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L286
	ldr	r3, .L310+32
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L286
	ldr	r3, .L310+36
	ldr	r3, [r3]
	lsl	r2, r3, #3
	ldr	r3, .L310+40
	ldr	r3, [r3]
	add	r3, r2, r3
	lsl	r2, r3, #3
	ldr	r3, .L310+44
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L310+48
	ldr	r2, [r2, r3, lsl #2]
	ldr	r3, .L310+52
	ldr	r3, [r3]
	lsl	r1, r3, #3
	ldr	r3, .L310+56
	ldr	r3, [r3]
	add	r3, r1, r3
	lsl	r1, r3, #3
	ldr	r3, .L310+44
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L310+48
	ldr	r3, [r1, r3, lsl #2]
	add	r3, r2, r3
	ldr	r2, [fp, #-12]
	lsl	r1, r2, #3
	ldr	r2, [fp, #-8]
	add	r2, r1, r2
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L310
	str	r1, [r3, r2, lsl #2]
.L286:
	ldr	r3, .L310+28
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L287
	ldr	r3, .L310+32
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L287
	ldr	r3, .L310+36
	ldr	r3, [r3]
	lsl	r2, r3, #3
	ldr	r3, .L310+40
	ldr	r3, [r3]
	add	r3, r2, r3
	lsl	r2, r3, #3
	ldr	r3, .L310+44
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L310+48
	ldr	r2, [r2, r3, lsl #2]
	ldr	r3, .L310+60
	ldr	r3, [r3]
	lsl	r1, r3, #3
	ldr	r3, .L310+40
	ldr	r3, [r3]
	add	r3, r1, r3
	lsl	r1, r3, #3
	ldr	r3, .L310+64
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L310+48
	ldr	r3, [r1, r3, lsl #2]
	add	r3, r2, r3
	cmp	r3, #1
	ble	.L288
	ldr	r3, [fp, #-12]
	lsl	r2, r3, #3
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldr	r2, .L310
	mov	r1, #1
	str	r1, [r2, r3, lsl #2]
	b	.L287
.L288:
	ldr	r3, [fp, #-12]
	lsl	r2, r3, #3
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldr	r2, .L310
	mov	r1, #0
	str	r1, [r2, r3, lsl #2]
.L287:
	ldr	r3, .L310+28
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L289
	ldr	r3, .L310+32
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L289
	ldr	r3, .L310+36
	ldr	r3, [r3]
	lsl	r2, r3, #3
	ldr	r3, .L310+40
	ldr	r3, [r3]
	add	r3, r2, r3
	lsl	r2, r3, #3
	ldr	r3, .L310+44
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L310+48
	ldr	r2, [r2, r3, lsl #2]
	ldr	r3, .L310+52
	ldr	r3, [r3]
	lsl	r1, r3, #3
	ldr	r3, .L310+56
	ldr	r3, [r3]
	add	r3, r1, r3
	lsl	r1, r3, #3
	ldr	r3, .L310+44
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L310+48
	ldr	r3, [r1, r3, lsl #2]
	add	r2, r2, r3
	ldr	r3, .L310+36
	ldr	r3, [r3]
	lsl	r1, r3, #3
	ldr	r3, .L310+40
	ldr	r3, [r3]
	add	r3, r1, r3
	lsl	r1, r3, #3
	ldr	r3, .L310+44
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L310+48
	ldr	r3, [r1, r3, lsl #2]
	add	r2, r2, r3
	ldr	r3, .L310+60
	ldr	r3, [r3]
	lsl	r1, r3, #3
	ldr	r3, .L310+40
	ldr	r3, [r3]
	add	r3, r1, r3
	lsl	r1, r3, #3
	ldr	r3, .L310+64
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L310+48
	ldr	r3, [r1, r3, lsl #2]
	add	r1, r2, r3
	ldr	r3, [fp, #-12]
	lsl	r2, r3, #3
	ldr	r3, [fp, #-8]
	add	r2, r2, r3
	mov	r3, r1
	add	r1, r3, #3
	cmp	r3, #0
	movlt	r3, r1
	movge	r3, r3
	asr	r3, r3, #2
	mov	r1, r3
	ldr	r3, .L310
	str	r1, [r3, r2, lsl #2]
.L289:
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L284:
	ldr	r3, [fp, #-8]
	cmp	r3, #7
	ble	.L290
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	str	r3, [fp, #-12]
.L283:
	ldr	r3, [fp, #-12]
	cmp	r3, #7
	ble	.L291
	b	.L292
.L282:
	ldr	r3, .L310+72
	ldr	r3, [r3]
	ldr	r2, .L310+76
	str	r3, [r2]
	ldr	r3, .L310+80
	ldr	r3, [r3]
	ldr	r2, .L310+84
	str	r3, [r2]
.L292:
	ldr	r3, .L310+88
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L293
	mov	r3, #0
	str	r3, [fp, #-12]
	b	.L294
.L301:
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L295
.L300:
	ldr	r3, .L310+92
	ldr	r0, [r3]
	ldr	r3, .L310+16
	ldr	r1, [r3]
	ldr	r3, .L310+20
	ldr	r2, [r3]
	ldr	r3, .L310+24
	ldr	r3, [r3]
	str	r3, [sp, #4]
	ldr	r3, [fp, #-8]
	str	r3, [sp]
	mov	r3, r2
	ldr	r2, [fp, #-12]
	bl	calcid
	ldr	r3, .L310+28
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L296
	ldr	r3, .L310+32
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L296
	ldr	r3, [fp, #-12]
	lsl	r2, r3, #3
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldr	r2, .L310
	ldr	r1, [r2, r3, lsl #2]
	ldr	r3, .L310+36
	ldr	r3, [r3]
	lsl	r2, r3, #3
	ldr	r3, .L310+40
	ldr	r3, [r3]
	add	r3, r2, r3
	lsl	r2, r3, #3
	ldr	r3, .L310+44
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L310+48
	ldr	r2, [r2, r3, lsl #2]
	ldr	r3, [fp, #-12]
	lsl	r0, r3, #3
	ldr	r3, [fp, #-8]
	add	r3, r0, r3
	add	r2, r1, r2
	ldr	r1, .L310
	str	r2, [r1, r3, lsl #2]
.L296:
	ldr	r3, .L310+28
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L297
	ldr	r3, .L310+32
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L297
	ldr	r3, [fp, #-12]
	lsl	r2, r3, #3
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldr	r2, .L310
	ldr	r2, [r2, r3, lsl #2]
	ldr	r3, .L310+36
	ldr	r3, [r3]
	lsl	r1, r3, #3
	ldr	r3, .L310+40
	ldr	r3, [r3]
	add	r3, r1, r3
	lsl	r1, r3, #3
	ldr	r3, .L310+44
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L310+48
	ldr	r1, [r1, r3, lsl #2]
	ldr	r3, .L310+52
	ldr	r3, [r3]
	lsl	r0, r3, #3
	ldr	r3, .L310+56
	ldr	r3, [r3]
	add	r3, r0, r3
	lsl	r0, r3, #3
	ldr	r3, .L310+44
	ldr	r3, [r3]
	add	r3, r0, r3
	ldr	r0, .L310+48
	ldr	r3, [r0, r3, lsl #2]
	add	r3, r1, r3
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r0, r3
	ldr	r3, [fp, #-12]
	lsl	r1, r3, #3
	ldr	r3, [fp, #-8]
	add	r3, r1, r3
	add	r2, r2, r0
	ldr	r1, .L310
	str	r2, [r1, r3, lsl #2]
.L297:
	ldr	r3, .L310+28
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L298
	ldr	r3, .L310+32
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L298
	ldr	r3, [fp, #-12]
	lsl	r2, r3, #3
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldr	r2, .L310
	ldr	r2, [r2, r3, lsl #2]
	ldr	r3, .L310+36
	ldr	r3, [r3]
	lsl	r1, r3, #3
	ldr	r3, .L310+40
	ldr	r3, [r3]
	add	r3, r1, r3
	lsl	r1, r3, #3
	ldr	r3, .L310+44
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L310+48
	ldr	r1, [r1, r3, lsl #2]
	ldr	r3, .L310+60
	ldr	r3, [r3]
	lsl	r0, r3, #3
	ldr	r3, .L310+40
	ldr	r3, [r3]
	add	r3, r0, r3
	lsl	r0, r3, #3
	ldr	r3, .L310+64
	ldr	r3, [r3]
	add	r3, r0, r3
	ldr	r0, .L310+48
	ldr	r3, [r0, r3, lsl #2]
	add	r3, r1, r3
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r0, r3
	ldr	r3, [fp, #-12]
	lsl	r1, r3, #3
	ldr	r3, [fp, #-8]
	add	r3, r1, r3
	add	r2, r2, r0
	ldr	r1, .L310
	str	r2, [r1, r3, lsl #2]
.L298:
	ldr	r3, .L310+28
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L299
	ldr	r3, .L310+32
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L299
	ldr	r3, [fp, #-12]
	lsl	r2, r3, #3
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldr	r2, .L310
	ldr	r2, [r2, r3, lsl #2]
	ldr	r3, .L310+36
	ldr	r3, [r3]
	lsl	r1, r3, #3
	ldr	r3, .L310+40
	ldr	r3, [r3]
	add	r3, r1, r3
	lsl	r1, r3, #3
	ldr	r3, .L310+44
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L310+48
	ldr	r1, [r1, r3, lsl #2]
	ldr	r3, .L310+52
	ldr	r3, [r3]
	lsl	r0, r3, #3
	ldr	r3, .L310+56
	ldr	r3, [r3]
	add	r3, r0, r3
	lsl	r0, r3, #3
	ldr	r3, .L310+44
	ldr	r3, [r3]
	add	r3, r0, r3
	ldr	r0, .L310+48
	ldr	r3, [r0, r3, lsl #2]
	add	r1, r1, r3
	ldr	r3, .L310+36
	ldr	r3, [r3]
	lsl	r0, r3, #3
	ldr	r3, .L310+40
	ldr	r3, [r3]
	add	r3, r0, r3
	lsl	r0, r3, #3
	ldr	r3, .L310+44
	ldr	r3, [r3]
	add	r3, r0, r3
	ldr	r0, .L310+48
	ldr	r3, [r0, r3, lsl #2]
	add	r1, r1, r3
	ldr	r3, .L310+60
	ldr	r3, [r3]
	lsl	r0, r3, #3
	ldr	r3, .L310+40
	ldr	r3, [r3]
	add	r3, r0, r3
	lsl	r0, r3, #3
	ldr	r3, .L310+64
	ldr	r3, [r3]
	add	r3, r0, r3
	ldr	r0, .L310+48
	ldr	r3, [r0, r3, lsl #2]
	add	r3, r1, r3
	add	r1, r3, #3
	cmp	r3, #0
	movlt	r3, r1
	movge	r3, r3
	asr	r3, r3, #2
	mov	r0, r3
	ldr	r3, [fp, #-12]
	lsl	r1, r3, #3
	ldr	r3, [fp, #-8]
	add	r3, r1, r3
	add	r2, r2, r0
	ldr	r1, .L310
	str	r2, [r1, r3, lsl #2]
.L299:
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L295:
	ldr	r3, [fp, #-8]
	cmp	r3, #7
	ble	.L300
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	str	r3, [fp, #-12]
.L294:
	ldr	r3, [fp, #-12]
	cmp	r3, #7
	ble	.L301
	b	.L302
.L293:
	ldr	r3, .L310+96
	ldr	r3, [r3]
	ldr	r2, .L310+100
	str	r3, [r2]
	ldr	r3, .L310+104
	ldr	r3, [r3]
	ldr	r2, .L310+108
	str	r3, [r2]
.L302:
	ldr	r3, .L310+68
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L309
	ldr	r3, .L310+88
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L309
	mov	r3, #0
	str	r3, [fp, #-12]
	b	.L304
.L307:
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L305
.L306:
	ldr	r3, [fp, #-12]
	lsl	r2, r3, #3
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldr	r2, .L310
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, [fp, #-12]
	lsl	r1, r2, #3
	ldr	r2, [fp, #-8]
	add	r2, r1, r2
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L310
	str	r1, [r3, r2, lsl #2]
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L305:
	ldr	r3, [fp, #-8]
	cmp	r3, #7
	ble	.L306
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	str	r3, [fp, #-12]
.L304:
	ldr	r3, [fp, #-12]
	cmp	r3, #7
	ble	.L307
.L309:
	nop
.L271:
.L308:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L311:
	.align	2
.L310:
	.word	pred_block
	.word	mb_type
	.word	set_prev_values
	.word	previous_picture
	.word	macroblock_address
	.word	down_for
	.word	right_for
	.word	right_half_for
	.word	down_half_for
	.word	b_00
	.word	p_i0
	.word	p_j0
	.word	storage
	.word	b_10
	.word	p_i1
	.word	b_01
	.word	p_j1
	.word	is_for_info
	.word	recon_right_for_prev
	.word	recon_right_for
	.word	recon_down_for_prev
	.word	recon_down_for
	.word	is_back_info
	.word	future_picture
	.word	recon_right_back_prev
	.word	recon_right_back
	.word	recon_down_back_prev
	.word	recon_down_back
	.size	pred, .-pred
	.align	2
	.global	plus
	.syntax unified
	.arm
	.fpu softvfp
	.type	plus, %function
plus:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, fp}
	add	fp, sp, #4
	mov	r4, #0
	b	.L313
.L316:
	ldr	r3, .L317
	ldr	r2, [r3, r4, lsl #2]
	ldr	r3, .L317+4
	ldr	r3, [r3, r4, lsl #2]
	add	r3, r2, r3
	ldr	r2, .L317
	str	r3, [r2, r4, lsl #2]
	ldr	r3, .L317
	ldr	r3, [r3, r4, lsl #2]
	cmp	r3, #255
	ble	.L314
	ldr	r3, .L317
	mov	r2, #255
	str	r2, [r3, r4, lsl #2]
.L314:
	ldr	r3, .L317
	ldr	r3, [r3, r4, lsl #2]
	cmp	r3, #0
	bge	.L315
	ldr	r3, .L317
	mov	r2, #0
	str	r2, [r3, r4, lsl #2]
.L315:
	add	r4, r4, #1
.L313:
	cmp	r4, #63
	ble	.L316
	nop
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{r4, fp}
	bx	lr
.L318:
	.align	2
.L317:
	.word	curr_block
	.word	pred_block
	.size	plus, .-plus
	.align	2
	.global	store
	.syntax unified
	.arm
	.fpu softvfp
	.type	store, %function
store:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, fp}
	add	fp, sp, #8
	ldr	r3, .L324
	ldr	r3, [r3]
	cmp	r3, #1
	bgt	.L323
	mov	r4, #0
	b	.L321
.L322:
	ldr	r3, .L324+4
	ldr	r2, [r3]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L324+8
	ldr	r3, [r3]
	add	r2, r2, r3
	ldr	r3, .L324+12
	ldr	r3, [r3]
	add	r5, r2, r3
	lsl	r3, r5, #6
	add	r5, r4, r3
	ldr	r3, .L324+16
	ldr	r3, [r3, r4, lsl #2]
	ldr	r2, .L324+20
	str	r3, [r2, r5, lsl #2]
	add	r4, r4, #1
.L321:
	cmp	r4, #63
	ble	.L322
.L323:
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, r5, fp}
	bx	lr
.L325:
	.align	2
.L324:
	.word	picture_type
	.word	macroblock_address
	.word	previous_picture
	.word	b_num
	.word	curr_block
	.word	storage
	.size	store, .-store
	.align	2
	.global	display
	.syntax unified
	.arm
	.fpu softvfp
	.type	display, %function
display:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, fp}
	add	fp, sp, #8
	mov	r5, #0
	mov	r4, #0
	b	.L327
.L333:
	ldr	r3, .L334
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L327
	cmp	r4, #0
	bne	.L328
	ldr	r3, .L334+4
	ldr	r3, [r3]
	cmp	r3, #1
	bgt	.L329
	ldr	r3, .L334+8
	ldr	r2, [r3]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L334+12
	ldr	r3, [r3]
	add	r2, r2, r3
	ldr	r3, .L334+16
	ldr	r3, [r3]
	add	r3, r2, r3
	lsl	r4, r3, #6
	add	r4, r4, r5
	ldr	r3, .L334+20
	ldr	r3, [r3, r4, lsl #2]
	ldr	r2, .L334+24
	str	r3, [r2]
	ldr	r3, .L334+28
	mov	r2, #8
	str	r2, [r3]
	b	.L330
.L329:
	ldr	r3, .L334+32
	ldr	r3, [r3, r5, lsl #2]
	ldr	r2, .L334+24
	str	r3, [r2]
	ldr	r3, .L334+28
	mov	r2, #8
	str	r2, [r3]
.L330:
	mov	r4, #1
	b	.L327
.L328:
	cmp	r4, #1
	bne	.L331
	ldr	r3, .L334+36
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L327
	ldr	r3, .L334+28
	mov	r2, #0
	str	r2, [r3]
	mov	r4, #2
	b	.L327
.L331:
	cmp	r4, #2
	bne	.L327
	add	r5, r5, #1
	cmp	r5, #63
	ble	.L332
	mov	r4, #3
	b	.L327
.L332:
	mov	r4, #0
.L327:
	cmp	r4, #3
	bne	.L333
	nop
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, r5, fp}
	bx	lr
.L335:
	.align	2
.L334:
	.word	clock
	.word	picture_type
	.word	macroblock_address
	.word	future_picture
	.word	b_num
	.word	storage
	.word	setoutbuffer
	.word	putbits
	.word	curr_block
	.word	to_transmit
	.size	display, .-display
	.align	2
	.global	outbuffer
	.syntax unified
	.arm
	.fpu softvfp
	.type	outbuffer, %function
outbuffer:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, fp}
	add	fp, sp, #8
	mov	r4, #0
	mov	r5, #0
	b	.L337
.L341:
	ldr	r3, .L342
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L338
	cmp	r4, #0
	bne	.L339
	ldr	r3, .L342+4
	ldr	r3, [r3]
	cmp	r3, #0
	ble	.L338
	ldr	r3, .L342+4
	ldr	r3, [r3]
	ldr	r2, .L342+8
	str	r3, [r2]
	mov	r4, #1
	b	.L338
.L339:
	cmp	r4, #1
	bne	.L340
	ldr	r3, .L342+12
	mov	r2, #1
	str	r2, [r3]
	ldr	r3, .L342+16
	ldr	r3, [r3]
	ldr	r2, .L342+20
	str	r3, [r2]
	ldr	r3, .L342+8
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r2, .L342+8
	str	r3, [r2]
	ldr	r3, .L342+8
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L338
	mov	r4, #2
	b	.L338
.L340:
	cmp	r4, #2
	bne	.L338
	ldr	r3, .L342+12
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L342+4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L338
	ldr	r3, .L342+8
	mvn	r2, #0
	str	r2, [r3]
	mov	r4, #0
.L338:
	add	r5, r5, #1
.L337:
	cmp	r5, #4
	ble	.L341
	nop
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, r5, fp}
	bx	lr
.L343:
	.align	2
.L342:
	.word	clock
	.word	putbits
	.word	to_transmit
	.word	isoutbit
	.word	setoutbuffer
	.word	outbit
	.size	outbuffer, .-outbuffer
	.align	2
	.global	execute
	.syntax unified
	.arm
	.fpu softvfp
	.type	execute, %function
execute:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	inbuffer
	bl	vldcontrol
	bl	dequant
	bl	idct
	bl	pred
	bl	plus
	bl	store
	bl	display
	bl	outbuffer
	nop
	pop	{fp, pc}
	.size	execute, .-execute
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	bl	init
	mov	r4, #0
	b	.L346
.L347:
	bl	execute
	add	r4, r4, #1
.L346:
	cmp	r4, #4
	ble	.L347
	mov	r3, #0
	mov	r0, r3
	pop	{r4, r5, fp, pc}
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
