	.file	"225142471.c"
	.intel_syntax noprefix
	.text
	.globl	__VERIFIER_nondet_bool
	.type	__VERIFIER_nondet_bool, @function
__VERIFIER_nondet_bool:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	__VERIFIER_nondet_int@PLT
	test	eax, eax
	setne	al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	__VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
	.globl	t9_l1
	.bss
	.type	t9_l1, @object
	.size	t9_l1, 1
t9_l1:
	.zero	1
	.globl	_x_t9_l1
	.type	_x_t9_l1, @object
	.size	_x_t9_l1, 1
_x_t9_l1:
	.zero	1
	.globl	t9_l0
	.type	t9_l0, @object
	.size	t9_l0, 1
t9_l0:
	.zero	1
	.globl	_x_t9_l0
	.type	_x_t9_l0, @object
	.size	_x_t9_l0, 1
_x_t9_l0:
	.zero	1
	.globl	t9_evt1
	.type	t9_evt1, @object
	.size	t9_evt1, 1
t9_evt1:
	.zero	1
	.globl	_x_t9_evt1
	.type	_x_t9_evt1, @object
	.size	_x_t9_evt1, 1
_x_t9_evt1:
	.zero	1
	.globl	t9_evt0
	.type	t9_evt0, @object
	.size	t9_evt0, 1
t9_evt0:
	.zero	1
	.globl	_x_t9_evt0
	.type	_x_t9_evt0, @object
	.size	_x_t9_evt0, 1
_x_t9_evt0:
	.zero	1
	.globl	t3_x
	.align 4
	.type	t3_x, @object
	.size	t3_x, 4
t3_x:
	.zero	4
	.globl	_x_t3_x
	.align 4
	.type	_x_t3_x, @object
	.size	_x_t3_x, 4
_x_t3_x:
	.zero	4
	.globl	t2_evt1
	.type	t2_evt1, @object
	.size	t2_evt1, 1
t2_evt1:
	.zero	1
	.globl	_x_t2_evt1
	.type	_x_t2_evt1, @object
	.size	_x_t2_evt1, 1
_x_t2_evt1:
	.zero	1
	.globl	t2_l1
	.type	t2_l1, @object
	.size	t2_l1, 1
t2_l1:
	.zero	1
	.globl	_x_t2_l1
	.type	_x_t2_l1, @object
	.size	_x_t2_l1, 1
_x_t2_l1:
	.zero	1
	.globl	t2_x
	.align 4
	.type	t2_x, @object
	.size	t2_x, 4
t2_x:
	.zero	4
	.globl	_x_t2_x
	.align 4
	.type	_x_t2_x, @object
	.size	_x_t2_x, 4
_x_t2_x:
	.zero	4
	.globl	delta
	.align 4
	.type	delta, @object
	.size	delta, 4
delta:
	.zero	4
	.globl	_x_delta
	.align 4
	.type	_x_delta, @object
	.size	_x_delta, 4
_x_delta:
	.zero	4
	.globl	_diverge_delta
	.align 4
	.type	_diverge_delta, @object
	.size	_diverge_delta, 4
_diverge_delta:
	.zero	4
	.globl	_x__diverge_delta
	.align 4
	.type	_x__diverge_delta, @object
	.size	_x__diverge_delta, 4
_x__diverge_delta:
	.zero	4
	.globl	t1_evt1
	.type	t1_evt1, @object
	.size	t1_evt1, 1
t1_evt1:
	.zero	1
	.globl	_x_t1_evt1
	.type	_x_t1_evt1, @object
	.size	_x_t1_evt1, 1
_x_t1_evt1:
	.zero	1
	.globl	t1_l0
	.type	t1_l0, @object
	.size	t1_l0, 1
t1_l0:
	.zero	1
	.globl	_x_t1_l0
	.type	_x_t1_l0, @object
	.size	_x_t1_l0, 1
_x_t1_l0:
	.zero	1
	.globl	t0_l1
	.type	t0_l1, @object
	.size	t0_l1, 1
t0_l1:
	.zero	1
	.globl	_x_t0_l1
	.type	_x_t0_l1, @object
	.size	_x_t0_l1, 1
_x_t0_l1:
	.zero	1
	.globl	t1_evt0
	.type	t1_evt0, @object
	.size	t1_evt0, 1
t1_evt0:
	.zero	1
	.globl	_x_t1_evt0
	.type	_x_t1_evt0, @object
	.size	_x_t1_evt0, 1
_x_t1_evt0:
	.zero	1
	.globl	t0_l0
	.type	t0_l0, @object
	.size	t0_l0, 1
t0_l0:
	.zero	1
	.globl	_x_t0_l0
	.type	_x_t0_l0, @object
	.size	_x_t0_l0, 1
_x_t0_l0:
	.zero	1
	.globl	t0_evt1
	.type	t0_evt1, @object
	.size	t0_evt1, 1
t0_evt1:
	.zero	1
	.globl	_x_t0_evt1
	.type	_x_t0_evt1, @object
	.size	_x_t0_evt1, 1
_x_t0_evt1:
	.zero	1
	.globl	t1_x
	.align 4
	.type	t1_x, @object
	.size	t1_x, 4
t1_x:
	.zero	4
	.globl	_x_t1_x
	.align 4
	.type	_x_t1_x, @object
	.size	_x_t1_x, 4
_x_t1_x:
	.zero	4
	.globl	t0_evt0
	.type	t0_evt0, @object
	.size	t0_evt0, 1
t0_evt0:
	.zero	1
	.globl	_x_t0_evt0
	.type	_x_t0_evt0, @object
	.size	_x_t0_evt0, 1
_x_t0_evt0:
	.zero	1
	.globl	t0_x
	.align 4
	.type	t0_x, @object
	.size	t0_x, 4
t0_x:
	.zero	4
	.globl	_x_t0_x
	.align 4
	.type	_x_t0_x, @object
	.size	_x_t0_x, 4
_x_t0_x:
	.zero	4
	.globl	gate_l0
	.type	gate_l0, @object
	.size	gate_l0, 1
gate_l0:
	.zero	1
	.globl	_x_gate_l0
	.type	_x_gate_l0, @object
	.size	_x_gate_l0, 1
_x_gate_l0:
	.zero	1
	.globl	controller_l0
	.type	controller_l0, @object
	.size	controller_l0, 1
controller_l0:
	.zero	1
	.globl	_x_controller_l0
	.type	_x_controller_l0, @object
	.size	_x_controller_l0, 1
_x_controller_l0:
	.zero	1
	.globl	t2_l0
	.type	t2_l0, @object
	.size	t2_l0, 1
t2_l0:
	.zero	1
	.globl	_x_t2_l0
	.type	_x_t2_l0, @object
	.size	_x_t2_l0, 1
_x_t2_l0:
	.zero	1
	.globl	gate_l1
	.type	gate_l1, @object
	.size	gate_l1, 1
gate_l1:
	.zero	1
	.globl	_x_gate_l1
	.type	_x_gate_l1, @object
	.size	_x_gate_l1, 1
_x_gate_l1:
	.zero	1
	.globl	gate_y
	.align 4
	.type	gate_y, @object
	.size	gate_y, 4
gate_y:
	.zero	4
	.globl	_x_gate_y
	.align 4
	.type	_x_gate_y, @object
	.size	_x_gate_y, 4
_x_gate_y:
	.zero	4
	.globl	t1_l1
	.type	t1_l1, @object
	.size	t1_l1, 1
t1_l1:
	.zero	1
	.globl	_x_t1_l1
	.type	_x_t1_l1, @object
	.size	_x_t1_l1, 1
_x_t1_l1:
	.zero	1
	.globl	t2_evt0
	.type	t2_evt0, @object
	.size	t2_evt0, 1
t2_evt0:
	.zero	1
	.globl	_x_t2_evt0
	.type	_x_t2_evt0, @object
	.size	_x_t2_evt0, 1
_x_t2_evt0:
	.zero	1
	.globl	gate_evt0
	.type	gate_evt0, @object
	.size	gate_evt0, 1
gate_evt0:
	.zero	1
	.globl	_x_gate_evt0
	.type	_x_gate_evt0, @object
	.size	_x_gate_evt0, 1
_x_gate_evt0:
	.zero	1
	.globl	controller_evt0
	.type	controller_evt0, @object
	.size	controller_evt0, 1
controller_evt0:
	.zero	1
	.globl	_x_controller_evt0
	.type	_x_controller_evt0, @object
	.size	_x_controller_evt0, 1
_x_controller_evt0:
	.zero	1
	.globl	t8_evt1
	.type	t8_evt1, @object
	.size	t8_evt1, 1
t8_evt1:
	.zero	1
	.globl	_x_t8_evt1
	.type	_x_t8_evt1, @object
	.size	_x_t8_evt1, 1
_x_t8_evt1:
	.zero	1
	.globl	t9_x
	.align 4
	.type	t9_x, @object
	.size	t9_x, 4
t9_x:
	.zero	4
	.globl	_x_t9_x
	.align 4
	.type	_x_t9_x, @object
	.size	_x_t9_x, 4
_x_t9_x:
	.zero	4
	.globl	gate_evt1
	.type	gate_evt1, @object
	.size	gate_evt1, 1
gate_evt1:
	.zero	1
	.globl	_x_gate_evt1
	.type	_x_gate_evt1, @object
	.size	_x_gate_evt1, 1
_x_gate_evt1:
	.zero	1
	.globl	t8_l1
	.type	t8_l1, @object
	.size	t8_l1, 1
t8_l1:
	.zero	1
	.globl	_x_t8_l1
	.type	_x_t8_l1, @object
	.size	_x_t8_l1, 1
_x_t8_l1:
	.zero	1
	.globl	controller_z
	.align 4
	.type	controller_z, @object
	.size	controller_z, 4
controller_z:
	.zero	4
	.globl	_x_controller_z
	.align 4
	.type	_x_controller_z, @object
	.size	_x_controller_z, 4
_x_controller_z:
	.zero	4
	.globl	controller_evt2
	.type	controller_evt2, @object
	.size	controller_evt2, 1
controller_evt2:
	.zero	1
	.globl	_x_controller_evt2
	.type	_x_controller_evt2, @object
	.size	_x_controller_evt2, 1
_x_controller_evt2:
	.zero	1
	.globl	t3_evt0
	.type	t3_evt0, @object
	.size	t3_evt0, 1
t3_evt0:
	.zero	1
	.globl	_x_t3_evt0
	.type	_x_t3_evt0, @object
	.size	_x_t3_evt0, 1
_x_t3_evt0:
	.zero	1
	.globl	controller_cnt
	.align 4
	.type	controller_cnt, @object
	.size	controller_cnt, 4
controller_cnt:
	.zero	4
	.globl	_x_controller_cnt
	.align 4
	.type	_x_controller_cnt, @object
	.size	_x_controller_cnt, 4
_x_controller_cnt:
	.zero	4
	.globl	t3_evt1
	.type	t3_evt1, @object
	.size	t3_evt1, 1
t3_evt1:
	.zero	1
	.globl	_x_t3_evt1
	.type	_x_t3_evt1, @object
	.size	_x_t3_evt1, 1
_x_t3_evt1:
	.zero	1
	.globl	t4_x
	.align 4
	.type	t4_x, @object
	.size	t4_x, 4
t4_x:
	.zero	4
	.globl	_x_t4_x
	.align 4
	.type	_x_t4_x, @object
	.size	_x_t4_x, 4
_x_t4_x:
	.zero	4
	.globl	t3_l0
	.type	t3_l0, @object
	.size	t3_l0, 1
t3_l0:
	.zero	1
	.globl	_x_t3_l0
	.type	_x_t3_l0, @object
	.size	_x_t3_l0, 1
_x_t3_l0:
	.zero	1
	.globl	t3_l1
	.type	t3_l1, @object
	.size	t3_l1, 1
t3_l1:
	.zero	1
	.globl	_x_t3_l1
	.type	_x_t3_l1, @object
	.size	_x_t3_l1, 1
_x_t3_l1:
	.zero	1
	.globl	t4_evt0
	.type	t4_evt0, @object
	.size	t4_evt0, 1
t4_evt0:
	.zero	1
	.globl	_x_t4_evt0
	.type	_x_t4_evt0, @object
	.size	_x_t4_evt0, 1
_x_t4_evt0:
	.zero	1
	.globl	t4_evt1
	.type	t4_evt1, @object
	.size	t4_evt1, 1
t4_evt1:
	.zero	1
	.globl	_x_t4_evt1
	.type	_x_t4_evt1, @object
	.size	_x_t4_evt1, 1
_x_t4_evt1:
	.zero	1
	.globl	controller_evt1
	.type	controller_evt1, @object
	.size	controller_evt1, 1
controller_evt1:
	.zero	1
	.globl	_x_controller_evt1
	.type	_x_controller_evt1, @object
	.size	_x_controller_evt1, 1
_x_controller_evt1:
	.zero	1
	.globl	t5_x
	.align 4
	.type	t5_x, @object
	.size	t5_x, 4
t5_x:
	.zero	4
	.globl	_x_t5_x
	.align 4
	.type	_x_t5_x, @object
	.size	_x_t5_x, 4
_x_t5_x:
	.zero	4
	.globl	t4_l0
	.type	t4_l0, @object
	.size	t4_l0, 1
t4_l0:
	.zero	1
	.globl	_x_t4_l0
	.type	_x_t4_l0, @object
	.size	_x_t4_l0, 1
_x_t4_l0:
	.zero	1
	.globl	t4_l1
	.type	t4_l1, @object
	.size	t4_l1, 1
t4_l1:
	.zero	1
	.globl	_x_t4_l1
	.type	_x_t4_l1, @object
	.size	_x_t4_l1, 1
_x_t4_l1:
	.zero	1
	.globl	controller_l1
	.type	controller_l1, @object
	.size	controller_l1, 1
controller_l1:
	.zero	1
	.globl	_x_controller_l1
	.type	_x_controller_l1, @object
	.size	_x_controller_l1, 1
_x_controller_l1:
	.zero	1
	.globl	t5_evt0
	.type	t5_evt0, @object
	.size	t5_evt0, 1
t5_evt0:
	.zero	1
	.globl	_x_t5_evt0
	.type	_x_t5_evt0, @object
	.size	_x_t5_evt0, 1
_x_t5_evt0:
	.zero	1
	.globl	t5_evt1
	.type	t5_evt1, @object
	.size	t5_evt1, 1
t5_evt1:
	.zero	1
	.globl	_x_t5_evt1
	.type	_x_t5_evt1, @object
	.size	_x_t5_evt1, 1
_x_t5_evt1:
	.zero	1
	.globl	t6_x
	.align 4
	.type	t6_x, @object
	.size	t6_x, 4
t6_x:
	.zero	4
	.globl	_x_t6_x
	.align 4
	.type	_x_t6_x, @object
	.size	_x_t6_x, 4
_x_t6_x:
	.zero	4
	.globl	t5_l0
	.type	t5_l0, @object
	.size	t5_l0, 1
t5_l0:
	.zero	1
	.globl	_x_t5_l0
	.type	_x_t5_l0, @object
	.size	_x_t5_l0, 1
_x_t5_l0:
	.zero	1
	.globl	t5_l1
	.type	t5_l1, @object
	.size	t5_l1, 1
t5_l1:
	.zero	1
	.globl	_x_t5_l1
	.type	_x_t5_l1, @object
	.size	_x_t5_l1, 1
_x_t5_l1:
	.zero	1
	.globl	t6_evt0
	.type	t6_evt0, @object
	.size	t6_evt0, 1
t6_evt0:
	.zero	1
	.globl	_x_t6_evt0
	.type	_x_t6_evt0, @object
	.size	_x_t6_evt0, 1
_x_t6_evt0:
	.zero	1
	.globl	t6_evt1
	.type	t6_evt1, @object
	.size	t6_evt1, 1
t6_evt1:
	.zero	1
	.globl	_x_t6_evt1
	.type	_x_t6_evt1, @object
	.size	_x_t6_evt1, 1
_x_t6_evt1:
	.zero	1
	.globl	t7_x
	.align 4
	.type	t7_x, @object
	.size	t7_x, 4
t7_x:
	.zero	4
	.globl	_x_t7_x
	.align 4
	.type	_x_t7_x, @object
	.size	_x_t7_x, 4
_x_t7_x:
	.zero	4
	.globl	t6_l0
	.type	t6_l0, @object
	.size	t6_l0, 1
t6_l0:
	.zero	1
	.globl	_x_t6_l0
	.type	_x_t6_l0, @object
	.size	_x_t6_l0, 1
_x_t6_l0:
	.zero	1
	.globl	t6_l1
	.type	t6_l1, @object
	.size	t6_l1, 1
t6_l1:
	.zero	1
	.globl	_x_t6_l1
	.type	_x_t6_l1, @object
	.size	_x_t6_l1, 1
_x_t6_l1:
	.zero	1
	.globl	t7_evt0
	.type	t7_evt0, @object
	.size	t7_evt0, 1
t7_evt0:
	.zero	1
	.globl	_x_t7_evt0
	.type	_x_t7_evt0, @object
	.size	_x_t7_evt0, 1
_x_t7_evt0:
	.zero	1
	.globl	t7_evt1
	.type	t7_evt1, @object
	.size	t7_evt1, 1
t7_evt1:
	.zero	1
	.globl	_x_t7_evt1
	.type	_x_t7_evt1, @object
	.size	_x_t7_evt1, 1
_x_t7_evt1:
	.zero	1
	.globl	t8_x
	.align 4
	.type	t8_x, @object
	.size	t8_x, 4
t8_x:
	.zero	4
	.globl	_x_t8_x
	.align 4
	.type	_x_t8_x, @object
	.size	_x_t8_x, 4
_x_t8_x:
	.zero	4
	.globl	t7_l0
	.type	t7_l0, @object
	.size	t7_l0, 1
t7_l0:
	.zero	1
	.globl	_x_t7_l0
	.type	_x_t7_l0, @object
	.size	_x_t7_l0, 1
_x_t7_l0:
	.zero	1
	.globl	t7_l1
	.type	t7_l1, @object
	.size	t7_l1, 1
t7_l1:
	.zero	1
	.globl	_x_t7_l1
	.type	_x_t7_l1, @object
	.size	_x_t7_l1, 1
_x_t7_l1:
	.zero	1
	.globl	t8_evt0
	.type	t8_evt0, @object
	.size	t8_evt0, 1
t8_evt0:
	.zero	1
	.globl	_x_t8_evt0
	.type	_x_t8_evt0, @object
	.size	_x_t8_evt0, 1
_x_t8_evt0:
	.zero	1
	.globl	t8_l0
	.type	t8_l0, @object
	.size	t8_l0, 1
t8_l0:
	.zero	1
	.globl	_x_t8_l0
	.type	_x_t8_l0, @object
	.size	_x_t8_l0, 1
_x_t8_l0:
	.zero	1
	.text
	.globl	main
	.type	main, @function
main:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t9_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t9_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t9_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t9_evt0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t3_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t2_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t2_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t2_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR delta[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _diverge_delta[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t1_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t1_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t0_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t1_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t0_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t0_evt1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t1_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t0_evt0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t0_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR gate_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR controller_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t2_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR gate_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR gate_y[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t1_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t2_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR gate_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR controller_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t8_evt1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t9_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR gate_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t8_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR controller_z[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR controller_evt2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t3_evt0[rip], al
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR controller_cnt[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t3_evt1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t4_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t3_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t3_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t4_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t4_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR controller_evt1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t5_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t4_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t4_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR controller_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t5_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t5_evt1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t6_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t5_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t5_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t6_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t6_evt1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t7_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t6_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t6_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t7_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t7_evt1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR t8_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t7_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t7_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t8_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR t8_l0[rip], al
	movzx	eax, BYTE PTR t9_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t9_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t9_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t9_l0[rip]
	test	al, al
	jne	.L6
	movzx	eax, BYTE PTR t9_l1[rip]
	test	al, al
	je	.L7
.L6:
	movzx	eax, BYTE PTR t9_l0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR t9_l1[rip]
	test	al, al
	je	.L7
.L8:
	movzx	eax, BYTE PTR t9_l1[rip]
	test	al, al
	je	.L9
	movzx	eax, BYTE PTR t9_l0[rip]
	test	al, al
	je	.L7
.L9:
	movzx	eax, BYTE PTR t9_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t9_l1[rip]
	test	al, al
	je	.L4
.L7:
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	jne	.L10
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	je	.L11
.L10:
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	je	.L12
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	je	.L11
.L12:
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	je	.L13
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	je	.L11
.L13:
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	je	.L4
.L11:
	movzx	eax, BYTE PTR t9_l0[rip]
	test	al, al
	jne	.L14
	movzx	eax, BYTE PTR t9_l1[rip]
	test	al, al
	je	.L15
.L14:
	movss	xmm1, DWORD PTR t9_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L15:
	movzx	eax, BYTE PTR t8_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t8_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t8_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t8_l0[rip]
	test	al, al
	jne	.L18
	movzx	eax, BYTE PTR t8_l1[rip]
	test	al, al
	je	.L19
.L18:
	movzx	eax, BYTE PTR t8_l0[rip]
	test	al, al
	je	.L20
	movzx	eax, BYTE PTR t8_l1[rip]
	test	al, al
	je	.L19
.L20:
	movzx	eax, BYTE PTR t8_l1[rip]
	test	al, al
	je	.L21
	movzx	eax, BYTE PTR t8_l0[rip]
	test	al, al
	je	.L19
.L21:
	movzx	eax, BYTE PTR t8_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t8_l1[rip]
	test	al, al
	je	.L4
.L19:
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	jne	.L22
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	je	.L23
.L22:
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	je	.L24
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	je	.L23
.L24:
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	je	.L25
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	je	.L23
.L25:
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	je	.L4
.L23:
	movzx	eax, BYTE PTR t8_l0[rip]
	test	al, al
	jne	.L26
	movzx	eax, BYTE PTR t8_l1[rip]
	test	al, al
	je	.L27
.L26:
	movss	xmm1, DWORD PTR t8_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L27:
	movzx	eax, BYTE PTR t7_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t7_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t7_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t7_l0[rip]
	test	al, al
	jne	.L30
	movzx	eax, BYTE PTR t7_l1[rip]
	test	al, al
	je	.L31
.L30:
	movzx	eax, BYTE PTR t7_l0[rip]
	test	al, al
	je	.L32
	movzx	eax, BYTE PTR t7_l1[rip]
	test	al, al
	je	.L31
.L32:
	movzx	eax, BYTE PTR t7_l1[rip]
	test	al, al
	je	.L33
	movzx	eax, BYTE PTR t7_l0[rip]
	test	al, al
	je	.L31
.L33:
	movzx	eax, BYTE PTR t7_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t7_l1[rip]
	test	al, al
	je	.L4
.L31:
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	jne	.L34
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	je	.L35
.L34:
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	je	.L36
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	je	.L35
.L36:
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	je	.L37
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	je	.L35
.L37:
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	je	.L4
.L35:
	movzx	eax, BYTE PTR t7_l0[rip]
	test	al, al
	jne	.L38
	movzx	eax, BYTE PTR t7_l1[rip]
	test	al, al
	je	.L39
.L38:
	movss	xmm1, DWORD PTR t7_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L39:
	movzx	eax, BYTE PTR t6_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t6_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t6_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t6_l0[rip]
	test	al, al
	jne	.L42
	movzx	eax, BYTE PTR t6_l1[rip]
	test	al, al
	je	.L43
.L42:
	movzx	eax, BYTE PTR t6_l0[rip]
	test	al, al
	je	.L44
	movzx	eax, BYTE PTR t6_l1[rip]
	test	al, al
	je	.L43
.L44:
	movzx	eax, BYTE PTR t6_l1[rip]
	test	al, al
	je	.L45
	movzx	eax, BYTE PTR t6_l0[rip]
	test	al, al
	je	.L43
.L45:
	movzx	eax, BYTE PTR t6_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t6_l1[rip]
	test	al, al
	je	.L4
.L43:
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	jne	.L46
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	je	.L47
.L46:
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	je	.L48
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	je	.L47
.L48:
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	je	.L49
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	je	.L47
.L49:
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	je	.L4
.L47:
	movzx	eax, BYTE PTR t6_l0[rip]
	test	al, al
	jne	.L50
	movzx	eax, BYTE PTR t6_l1[rip]
	test	al, al
	je	.L51
.L50:
	movss	xmm1, DWORD PTR t6_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L51:
	movzx	eax, BYTE PTR t5_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t5_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t5_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t5_l0[rip]
	test	al, al
	jne	.L54
	movzx	eax, BYTE PTR t5_l1[rip]
	test	al, al
	je	.L55
.L54:
	movzx	eax, BYTE PTR t5_l0[rip]
	test	al, al
	je	.L56
	movzx	eax, BYTE PTR t5_l1[rip]
	test	al, al
	je	.L55
.L56:
	movzx	eax, BYTE PTR t5_l1[rip]
	test	al, al
	je	.L57
	movzx	eax, BYTE PTR t5_l0[rip]
	test	al, al
	je	.L55
.L57:
	movzx	eax, BYTE PTR t5_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t5_l1[rip]
	test	al, al
	je	.L4
.L55:
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	jne	.L58
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	je	.L59
.L58:
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	je	.L60
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	je	.L59
.L60:
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	je	.L61
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	je	.L59
.L61:
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	je	.L4
.L59:
	movzx	eax, BYTE PTR t5_l0[rip]
	test	al, al
	jne	.L62
	movzx	eax, BYTE PTR t5_l1[rip]
	test	al, al
	je	.L63
.L62:
	movss	xmm1, DWORD PTR t5_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L63:
	movzx	eax, BYTE PTR t4_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t4_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t4_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t4_l0[rip]
	test	al, al
	jne	.L66
	movzx	eax, BYTE PTR t4_l1[rip]
	test	al, al
	je	.L67
.L66:
	movzx	eax, BYTE PTR t4_l0[rip]
	test	al, al
	je	.L68
	movzx	eax, BYTE PTR t4_l1[rip]
	test	al, al
	je	.L67
.L68:
	movzx	eax, BYTE PTR t4_l1[rip]
	test	al, al
	je	.L69
	movzx	eax, BYTE PTR t4_l0[rip]
	test	al, al
	je	.L67
.L69:
	movzx	eax, BYTE PTR t4_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t4_l1[rip]
	test	al, al
	je	.L4
.L67:
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	jne	.L70
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	je	.L71
.L70:
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	je	.L72
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	je	.L71
.L72:
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	je	.L73
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	je	.L71
.L73:
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	je	.L4
.L71:
	movzx	eax, BYTE PTR t4_l0[rip]
	test	al, al
	jne	.L74
	movzx	eax, BYTE PTR t4_l1[rip]
	test	al, al
	je	.L75
.L74:
	movss	xmm1, DWORD PTR t4_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L75:
	movzx	eax, BYTE PTR t3_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t3_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t3_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t3_l0[rip]
	test	al, al
	jne	.L78
	movzx	eax, BYTE PTR t3_l1[rip]
	test	al, al
	je	.L79
.L78:
	movzx	eax, BYTE PTR t3_l0[rip]
	test	al, al
	je	.L80
	movzx	eax, BYTE PTR t3_l1[rip]
	test	al, al
	je	.L79
.L80:
	movzx	eax, BYTE PTR t3_l1[rip]
	test	al, al
	je	.L81
	movzx	eax, BYTE PTR t3_l0[rip]
	test	al, al
	je	.L79
.L81:
	movzx	eax, BYTE PTR t3_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t3_l1[rip]
	test	al, al
	je	.L4
.L79:
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	jne	.L82
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	je	.L83
.L82:
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	je	.L84
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	je	.L83
.L84:
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	je	.L85
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	je	.L83
.L85:
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	je	.L4
.L83:
	movzx	eax, BYTE PTR t3_l0[rip]
	test	al, al
	jne	.L86
	movzx	eax, BYTE PTR t3_l1[rip]
	test	al, al
	je	.L87
.L86:
	movss	xmm1, DWORD PTR t3_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L87:
	movzx	eax, BYTE PTR t2_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t2_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t2_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t2_l0[rip]
	test	al, al
	jne	.L90
	movzx	eax, BYTE PTR t2_l1[rip]
	test	al, al
	je	.L91
.L90:
	movzx	eax, BYTE PTR t2_l0[rip]
	test	al, al
	je	.L92
	movzx	eax, BYTE PTR t2_l1[rip]
	test	al, al
	je	.L91
.L92:
	movzx	eax, BYTE PTR t2_l1[rip]
	test	al, al
	je	.L93
	movzx	eax, BYTE PTR t2_l0[rip]
	test	al, al
	je	.L91
.L93:
	movzx	eax, BYTE PTR t2_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t2_l1[rip]
	test	al, al
	je	.L4
.L91:
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	jne	.L94
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	je	.L95
.L94:
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	je	.L96
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	je	.L95
.L96:
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	je	.L97
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	je	.L95
.L97:
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	je	.L4
.L95:
	movzx	eax, BYTE PTR t2_l0[rip]
	test	al, al
	jne	.L98
	movzx	eax, BYTE PTR t2_l1[rip]
	test	al, al
	je	.L99
.L98:
	movss	xmm1, DWORD PTR t2_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L99:
	movzx	eax, BYTE PTR t1_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t1_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t1_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t1_l0[rip]
	test	al, al
	jne	.L102
	movzx	eax, BYTE PTR t1_l1[rip]
	test	al, al
	je	.L103
.L102:
	movzx	eax, BYTE PTR t1_l0[rip]
	test	al, al
	je	.L104
	movzx	eax, BYTE PTR t1_l1[rip]
	test	al, al
	je	.L103
.L104:
	movzx	eax, BYTE PTR t1_l1[rip]
	test	al, al
	je	.L105
	movzx	eax, BYTE PTR t1_l0[rip]
	test	al, al
	je	.L103
.L105:
	movzx	eax, BYTE PTR t1_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t1_l1[rip]
	test	al, al
	je	.L4
.L103:
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	jne	.L106
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	je	.L107
.L106:
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	je	.L108
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	je	.L107
.L108:
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	je	.L109
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	je	.L107
.L109:
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	je	.L4
.L107:
	movzx	eax, BYTE PTR t1_l0[rip]
	test	al, al
	jne	.L110
	movzx	eax, BYTE PTR t1_l1[rip]
	test	al, al
	je	.L111
.L110:
	movss	xmm1, DWORD PTR t1_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L111:
	movzx	eax, BYTE PTR t0_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR t0_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR t0_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR t0_l0[rip]
	test	al, al
	jne	.L114
	movzx	eax, BYTE PTR t0_l1[rip]
	test	al, al
	je	.L115
.L114:
	movzx	eax, BYTE PTR t0_l0[rip]
	test	al, al
	je	.L116
	movzx	eax, BYTE PTR t0_l1[rip]
	test	al, al
	je	.L115
.L116:
	movzx	eax, BYTE PTR t0_l1[rip]
	test	al, al
	je	.L117
	movzx	eax, BYTE PTR t0_l0[rip]
	test	al, al
	je	.L115
.L117:
	movzx	eax, BYTE PTR t0_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t0_l1[rip]
	test	al, al
	je	.L4
.L115:
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	jne	.L118
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	je	.L119
.L118:
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	je	.L120
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	je	.L119
.L120:
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	je	.L121
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	je	.L119
.L121:
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	je	.L4
.L119:
	movzx	eax, BYTE PTR t0_l0[rip]
	test	al, al
	jne	.L122
	movzx	eax, BYTE PTR t0_l1[rip]
	test	al, al
	je	.L123
.L122:
	movss	xmm1, DWORD PTR t0_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L4
.L123:
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR controller_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	jne	.L126
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	je	.L127
.L126:
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	je	.L128
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	je	.L127
.L128:
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	je	.L129
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	je	.L127
.L129:
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	je	.L4
.L127:
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L130
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L130
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	je	.L131
.L130:
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L132
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	je	.L132
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	je	.L131
.L132:
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L133
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	je	.L133
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	je	.L131
.L133:
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L134
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	je	.L134
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	jne	.L131
.L134:
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	jne	.L4
.L131:
	mov	eax, DWORD PTR controller_cnt[rip]
	test	eax, eax
	je	.L135
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 1
	je	.L135
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 2
	je	.L135
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 3
	je	.L135
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 4
	je	.L135
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 5
	je	.L135
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 6
	je	.L135
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 7
	je	.L135
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 8
	je	.L135
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 9
	je	.L135
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 10
	je	.L135
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 11
	jne	.L4
.L135:
	movss	xmm1, DWORD PTR controller_z[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L136
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	je	.L137
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	je	.L4
.L137:
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	je	.L136
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	jne	.L4
.L136:
	movzx	eax, BYTE PTR gate_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR gate_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR gate_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR gate_l0[rip]
	test	al, al
	jne	.L139
	movzx	eax, BYTE PTR gate_l1[rip]
	test	al, al
	je	.L140
.L139:
	movzx	eax, BYTE PTR gate_l0[rip]
	test	al, al
	je	.L141
	movzx	eax, BYTE PTR gate_l1[rip]
	test	al, al
	je	.L140
.L141:
	movzx	eax, BYTE PTR gate_l1[rip]
	test	al, al
	je	.L142
	movzx	eax, BYTE PTR gate_l0[rip]
	test	al, al
	je	.L140
.L142:
	movzx	eax, BYTE PTR gate_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR gate_l1[rip]
	test	al, al
	je	.L4
.L140:
	movzx	eax, BYTE PTR gate_evt0[rip]
	test	al, al
	jne	.L143
	movzx	eax, BYTE PTR gate_evt1[rip]
	test	al, al
	je	.L144
.L143:
	movzx	eax, BYTE PTR gate_evt0[rip]
	test	al, al
	je	.L145
	movzx	eax, BYTE PTR gate_evt1[rip]
	test	al, al
	je	.L144
.L145:
	movzx	eax, BYTE PTR gate_evt1[rip]
	test	al, al
	je	.L146
	movzx	eax, BYTE PTR gate_evt0[rip]
	test	al, al
	je	.L144
.L146:
	movzx	eax, BYTE PTR gate_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR gate_evt1[rip]
	test	al, al
	je	.L4
.L144:
	movss	xmm1, DWORD PTR gate_y[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L147
	movzx	eax, BYTE PTR gate_l0[rip]
	test	al, al
	je	.L147
	movzx	eax, BYTE PTR gate_l1[rip]
	test	al, al
	je	.L4
.L147:
	movss	xmm1, DWORD PTR gate_y[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	jnb	.L148
	movzx	eax, BYTE PTR gate_l0[rip]
	test	al, al
	je	.L148
	movzx	eax, BYTE PTR gate_l1[rip]
	test	al, al
	jne	.L4
.L148:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jb	.L4
	movss	xmm0, DWORD PTR delta[rip]
	movss	xmm1, DWORD PTR _diverge_delta[rip]
	ucomiss	xmm0, xmm1
	jp	.L4
	ucomiss	xmm0, xmm1
	jne	.L4
	mov	eax, 1
	jmp	.L151
.L4:
	mov	eax, 0
.L151:
	mov	DWORD PTR -4[rbp], eax
	jmp	.L152
.L580:
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t9_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t9_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t9_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t9_evt0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t3_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t2_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t2_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t2_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_delta[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x__diverge_delta[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t1_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t1_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t0_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t1_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t0_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t0_evt1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t1_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t0_evt0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t0_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_gate_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_controller_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t2_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_gate_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_gate_y[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t1_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t2_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_gate_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_controller_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t8_evt1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t9_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_gate_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t8_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_controller_z[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_controller_evt2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t3_evt0[rip], al
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR _x_controller_cnt[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t3_evt1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t4_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t3_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t3_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t4_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t4_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_controller_evt1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t5_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t4_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t4_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_controller_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t5_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t5_evt1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t6_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t5_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t5_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t6_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t6_evt1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t7_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t6_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t6_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t7_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t7_evt1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_t8_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t7_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t7_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t8_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_t8_l0[rip], al
	movzx	eax, BYTE PTR _x_t9_l0[rip]
	test	al, al
	jne	.L153
	movzx	eax, BYTE PTR _x_t9_l1[rip]
	test	al, al
	je	.L154
.L153:
	movzx	eax, BYTE PTR _x_t9_l0[rip]
	test	al, al
	je	.L155
	movzx	eax, BYTE PTR _x_t9_l1[rip]
	test	al, al
	je	.L154
.L155:
	movzx	eax, BYTE PTR _x_t9_l1[rip]
	test	al, al
	je	.L156
	movzx	eax, BYTE PTR _x_t9_l0[rip]
	test	al, al
	je	.L154
.L156:
	movzx	eax, BYTE PTR _x_t9_l0[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR _x_t9_l1[rip]
	test	al, al
	je	.L157
.L154:
	movzx	eax, BYTE PTR _x_t9_evt0[rip]
	test	al, al
	jne	.L158
	movzx	eax, BYTE PTR _x_t9_evt1[rip]
	test	al, al
	je	.L159
.L158:
	movzx	eax, BYTE PTR _x_t9_evt0[rip]
	test	al, al
	je	.L160
	movzx	eax, BYTE PTR _x_t9_evt1[rip]
	test	al, al
	je	.L159
.L160:
	movzx	eax, BYTE PTR _x_t9_evt1[rip]
	test	al, al
	je	.L161
	movzx	eax, BYTE PTR _x_t9_evt0[rip]
	test	al, al
	je	.L159
.L161:
	movzx	eax, BYTE PTR _x_t9_evt0[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR _x_t9_evt1[rip]
	test	al, al
	je	.L157
.L159:
	movzx	eax, BYTE PTR _x_t9_l0[rip]
	test	al, al
	jne	.L162
	movzx	eax, BYTE PTR _x_t9_l1[rip]
	test	al, al
	je	.L163
.L162:
	movss	xmm1, DWORD PTR _x_t9_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L157
.L163:
	movzx	eax, BYTE PTR t9_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t9_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L165
	movzx	eax, BYTE PTR t9_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t9_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L165
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t9_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t9_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L165
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L166
.L165:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L157
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	jne	.L166
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	je	.L157
.L166:
	movzx	eax, BYTE PTR _x_t9_l0[rip]
	test	al, al
	je	.L169
	movzx	eax, BYTE PTR _x_t9_l1[rip]
	test	al, al
	jne	.L169
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	je	.L169
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	jne	.L169
	movss	xmm0, DWORD PTR _x_t9_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L169
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L170
.L169:
	movzx	eax, BYTE PTR t9_l0[rip]
	test	al, al
	jne	.L170
	movzx	eax, BYTE PTR t9_l1[rip]
	test	al, al
	jne	.L170
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L170
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L170
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	jne	.L157
.L170:
	movzx	eax, BYTE PTR _x_t9_l1[rip]
	test	al, al
	je	.L172
	movzx	eax, BYTE PTR _x_t9_l0[rip]
	test	al, al
	jne	.L172
	movss	xmm1, DWORD PTR t9_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L172
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	je	.L172
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	je	.L172
	movss	xmm0, DWORD PTR t9_x[rip]
	movss	xmm1, DWORD PTR _x_t9_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L172
	ucomiss	xmm0, xmm1
	je	.L173
.L172:
	movzx	eax, BYTE PTR t9_l0[rip]
	test	al, al
	je	.L173
	movzx	eax, BYTE PTR t9_l1[rip]
	test	al, al
	jne	.L173
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L173
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L173
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	jne	.L157
.L173:
	movss	xmm0, DWORD PTR t9_x[rip]
	movss	xmm1, DWORD PTR _x_t9_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L175
	ucomiss	xmm0, xmm1
	jne	.L175
	movzx	eax, BYTE PTR _x_t9_l0[rip]
	test	al, al
	je	.L175
	movzx	eax, BYTE PTR _x_t9_l1[rip]
	test	al, al
	je	.L175
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	je	.L175
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	jne	.L177
.L175:
	movzx	eax, BYTE PTR t9_l1[rip]
	test	al, al
	je	.L177
	movzx	eax, BYTE PTR t9_l0[rip]
	test	al, al
	jne	.L177
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L177
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L177
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	jne	.L157
.L177:
	movzx	eax, BYTE PTR _x_t9_l0[rip]
	test	al, al
	jne	.L178
	movzx	eax, BYTE PTR _x_t9_l1[rip]
	test	al, al
	jne	.L178
	movss	xmm1, DWORD PTR t9_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L178
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	je	.L178
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	jne	.L178
	movss	xmm0, DWORD PTR t9_x[rip]
	movss	xmm1, DWORD PTR _x_t9_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L178
	ucomiss	xmm0, xmm1
	je	.L180
.L178:
	movzx	eax, BYTE PTR t9_l0[rip]
	test	al, al
	je	.L180
	movzx	eax, BYTE PTR t9_l1[rip]
	test	al, al
	je	.L180
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L180
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L180
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	jne	.L157
.L180:
	movzx	eax, BYTE PTR _x_t8_l0[rip]
	test	al, al
	jne	.L182
	movzx	eax, BYTE PTR _x_t8_l1[rip]
	test	al, al
	je	.L183
.L182:
	movzx	eax, BYTE PTR _x_t8_l0[rip]
	test	al, al
	je	.L184
	movzx	eax, BYTE PTR _x_t8_l1[rip]
	test	al, al
	je	.L183
.L184:
	movzx	eax, BYTE PTR _x_t8_l1[rip]
	test	al, al
	je	.L185
	movzx	eax, BYTE PTR _x_t8_l0[rip]
	test	al, al
	je	.L183
.L185:
	movzx	eax, BYTE PTR _x_t8_l0[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR _x_t8_l1[rip]
	test	al, al
	je	.L157
.L183:
	movzx	eax, BYTE PTR _x_t8_evt0[rip]
	test	al, al
	jne	.L186
	movzx	eax, BYTE PTR _x_t8_evt1[rip]
	test	al, al
	je	.L187
.L186:
	movzx	eax, BYTE PTR _x_t8_evt0[rip]
	test	al, al
	je	.L188
	movzx	eax, BYTE PTR _x_t8_evt1[rip]
	test	al, al
	je	.L187
.L188:
	movzx	eax, BYTE PTR _x_t8_evt1[rip]
	test	al, al
	je	.L189
	movzx	eax, BYTE PTR _x_t8_evt0[rip]
	test	al, al
	je	.L187
.L189:
	movzx	eax, BYTE PTR _x_t8_evt0[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR _x_t8_evt1[rip]
	test	al, al
	je	.L157
.L187:
	movzx	eax, BYTE PTR _x_t8_l0[rip]
	test	al, al
	jne	.L190
	movzx	eax, BYTE PTR _x_t8_l1[rip]
	test	al, al
	je	.L191
.L190:
	movss	xmm1, DWORD PTR _x_t8_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L157
.L191:
	movzx	eax, BYTE PTR t8_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t8_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L193
	movzx	eax, BYTE PTR t8_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t8_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L193
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t8_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t8_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L193
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L194
.L193:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L157
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	jne	.L194
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	je	.L157
.L194:
	movzx	eax, BYTE PTR _x_t8_l0[rip]
	test	al, al
	je	.L197
	movzx	eax, BYTE PTR _x_t8_l1[rip]
	test	al, al
	jne	.L197
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	je	.L197
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	jne	.L197
	movss	xmm0, DWORD PTR _x_t8_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L197
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L198
.L197:
	movzx	eax, BYTE PTR t8_l0[rip]
	test	al, al
	jne	.L198
	movzx	eax, BYTE PTR t8_l1[rip]
	test	al, al
	jne	.L198
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L198
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L198
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	jne	.L157
.L198:
	movzx	eax, BYTE PTR _x_t8_l1[rip]
	test	al, al
	je	.L200
	movzx	eax, BYTE PTR _x_t8_l0[rip]
	test	al, al
	jne	.L200
	movss	xmm1, DWORD PTR t8_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L200
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	je	.L200
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	je	.L200
	movss	xmm0, DWORD PTR t8_x[rip]
	movss	xmm1, DWORD PTR _x_t8_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L200
	ucomiss	xmm0, xmm1
	je	.L201
.L200:
	movzx	eax, BYTE PTR t8_l0[rip]
	test	al, al
	je	.L201
	movzx	eax, BYTE PTR t8_l1[rip]
	test	al, al
	jne	.L201
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L201
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L201
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	jne	.L157
.L201:
	movss	xmm0, DWORD PTR t8_x[rip]
	movss	xmm1, DWORD PTR _x_t8_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L203
	ucomiss	xmm0, xmm1
	jne	.L203
	movzx	eax, BYTE PTR _x_t8_l0[rip]
	test	al, al
	je	.L203
	movzx	eax, BYTE PTR _x_t8_l1[rip]
	test	al, al
	je	.L203
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	je	.L203
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	jne	.L205
.L203:
	movzx	eax, BYTE PTR t8_l1[rip]
	test	al, al
	je	.L205
	movzx	eax, BYTE PTR t8_l0[rip]
	test	al, al
	jne	.L205
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L205
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L205
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	jne	.L157
.L205:
	movzx	eax, BYTE PTR _x_t8_l0[rip]
	test	al, al
	jne	.L206
	movzx	eax, BYTE PTR _x_t8_l1[rip]
	test	al, al
	jne	.L206
	movss	xmm1, DWORD PTR t8_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L206
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	je	.L206
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	jne	.L206
	movss	xmm0, DWORD PTR t8_x[rip]
	movss	xmm1, DWORD PTR _x_t8_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L206
	ucomiss	xmm0, xmm1
	je	.L208
.L206:
	movzx	eax, BYTE PTR t8_l0[rip]
	test	al, al
	je	.L208
	movzx	eax, BYTE PTR t8_l1[rip]
	test	al, al
	je	.L208
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L208
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L208
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	jne	.L157
.L208:
	movzx	eax, BYTE PTR _x_t7_l0[rip]
	test	al, al
	jne	.L210
	movzx	eax, BYTE PTR _x_t7_l1[rip]
	test	al, al
	je	.L211
.L210:
	movzx	eax, BYTE PTR _x_t7_l0[rip]
	test	al, al
	je	.L212
	movzx	eax, BYTE PTR _x_t7_l1[rip]
	test	al, al
	je	.L211
.L212:
	movzx	eax, BYTE PTR _x_t7_l1[rip]
	test	al, al
	je	.L213
	movzx	eax, BYTE PTR _x_t7_l0[rip]
	test	al, al
	je	.L211
.L213:
	movzx	eax, BYTE PTR _x_t7_l0[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR _x_t7_l1[rip]
	test	al, al
	je	.L157
.L211:
	movzx	eax, BYTE PTR _x_t7_evt0[rip]
	test	al, al
	jne	.L214
	movzx	eax, BYTE PTR _x_t7_evt1[rip]
	test	al, al
	je	.L215
.L214:
	movzx	eax, BYTE PTR _x_t7_evt0[rip]
	test	al, al
	je	.L216
	movzx	eax, BYTE PTR _x_t7_evt1[rip]
	test	al, al
	je	.L215
.L216:
	movzx	eax, BYTE PTR _x_t7_evt1[rip]
	test	al, al
	je	.L217
	movzx	eax, BYTE PTR _x_t7_evt0[rip]
	test	al, al
	je	.L215
.L217:
	movzx	eax, BYTE PTR _x_t7_evt0[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR _x_t7_evt1[rip]
	test	al, al
	je	.L157
.L215:
	movzx	eax, BYTE PTR _x_t7_l0[rip]
	test	al, al
	jne	.L218
	movzx	eax, BYTE PTR _x_t7_l1[rip]
	test	al, al
	je	.L219
.L218:
	movss	xmm1, DWORD PTR _x_t7_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L157
.L219:
	movzx	eax, BYTE PTR t7_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t7_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L221
	movzx	eax, BYTE PTR t7_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t7_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L221
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t7_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t7_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L221
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L222
.L221:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L157
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	jne	.L222
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	je	.L157
.L222:
	movzx	eax, BYTE PTR _x_t7_l0[rip]
	test	al, al
	je	.L225
	movzx	eax, BYTE PTR _x_t7_l1[rip]
	test	al, al
	jne	.L225
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	je	.L225
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	jne	.L225
	movss	xmm0, DWORD PTR _x_t7_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L225
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L226
.L225:
	movzx	eax, BYTE PTR t7_l0[rip]
	test	al, al
	jne	.L226
	movzx	eax, BYTE PTR t7_l1[rip]
	test	al, al
	jne	.L226
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L226
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L226
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	jne	.L157
.L226:
	movzx	eax, BYTE PTR _x_t7_l1[rip]
	test	al, al
	je	.L228
	movzx	eax, BYTE PTR _x_t7_l0[rip]
	test	al, al
	jne	.L228
	movss	xmm1, DWORD PTR t7_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L228
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	je	.L228
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	je	.L228
	movss	xmm0, DWORD PTR t7_x[rip]
	movss	xmm1, DWORD PTR _x_t7_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L228
	ucomiss	xmm0, xmm1
	je	.L229
.L228:
	movzx	eax, BYTE PTR t7_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR t7_l1[rip]
	test	al, al
	jne	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L229
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	jne	.L157
.L229:
	movss	xmm0, DWORD PTR t7_x[rip]
	movss	xmm1, DWORD PTR _x_t7_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L231
	ucomiss	xmm0, xmm1
	jne	.L231
	movzx	eax, BYTE PTR _x_t7_l0[rip]
	test	al, al
	je	.L231
	movzx	eax, BYTE PTR _x_t7_l1[rip]
	test	al, al
	je	.L231
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	je	.L231
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	jne	.L233
.L231:
	movzx	eax, BYTE PTR t7_l1[rip]
	test	al, al
	je	.L233
	movzx	eax, BYTE PTR t7_l0[rip]
	test	al, al
	jne	.L233
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L233
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L233
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	jne	.L157
.L233:
	movzx	eax, BYTE PTR _x_t7_l0[rip]
	test	al, al
	jne	.L234
	movzx	eax, BYTE PTR _x_t7_l1[rip]
	test	al, al
	jne	.L234
	movss	xmm1, DWORD PTR t7_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L234
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	je	.L234
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	jne	.L234
	movss	xmm0, DWORD PTR t7_x[rip]
	movss	xmm1, DWORD PTR _x_t7_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L234
	ucomiss	xmm0, xmm1
	je	.L236
.L234:
	movzx	eax, BYTE PTR t7_l0[rip]
	test	al, al
	je	.L236
	movzx	eax, BYTE PTR t7_l1[rip]
	test	al, al
	je	.L236
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L236
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L236
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	jne	.L157
.L236:
	movzx	eax, BYTE PTR _x_t6_l0[rip]
	test	al, al
	jne	.L238
	movzx	eax, BYTE PTR _x_t6_l1[rip]
	test	al, al
	je	.L239
.L238:
	movzx	eax, BYTE PTR _x_t6_l0[rip]
	test	al, al
	je	.L240
	movzx	eax, BYTE PTR _x_t6_l1[rip]
	test	al, al
	je	.L239
.L240:
	movzx	eax, BYTE PTR _x_t6_l1[rip]
	test	al, al
	je	.L241
	movzx	eax, BYTE PTR _x_t6_l0[rip]
	test	al, al
	je	.L239
.L241:
	movzx	eax, BYTE PTR _x_t6_l0[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR _x_t6_l1[rip]
	test	al, al
	je	.L157
.L239:
	movzx	eax, BYTE PTR _x_t6_evt0[rip]
	test	al, al
	jne	.L242
	movzx	eax, BYTE PTR _x_t6_evt1[rip]
	test	al, al
	je	.L243
.L242:
	movzx	eax, BYTE PTR _x_t6_evt0[rip]
	test	al, al
	je	.L244
	movzx	eax, BYTE PTR _x_t6_evt1[rip]
	test	al, al
	je	.L243
.L244:
	movzx	eax, BYTE PTR _x_t6_evt1[rip]
	test	al, al
	je	.L245
	movzx	eax, BYTE PTR _x_t6_evt0[rip]
	test	al, al
	je	.L243
.L245:
	movzx	eax, BYTE PTR _x_t6_evt0[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR _x_t6_evt1[rip]
	test	al, al
	je	.L157
.L243:
	movzx	eax, BYTE PTR _x_t6_l0[rip]
	test	al, al
	jne	.L246
	movzx	eax, BYTE PTR _x_t6_l1[rip]
	test	al, al
	je	.L247
.L246:
	movss	xmm1, DWORD PTR _x_t6_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L157
.L247:
	movzx	eax, BYTE PTR t6_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t6_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L249
	movzx	eax, BYTE PTR t6_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t6_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L249
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t6_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t6_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L249
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L250
.L249:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L157
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	jne	.L250
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	je	.L157
.L250:
	movzx	eax, BYTE PTR _x_t6_l0[rip]
	test	al, al
	je	.L253
	movzx	eax, BYTE PTR _x_t6_l1[rip]
	test	al, al
	jne	.L253
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	je	.L253
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	jne	.L253
	movss	xmm0, DWORD PTR _x_t6_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L253
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L254
.L253:
	movzx	eax, BYTE PTR t6_l0[rip]
	test	al, al
	jne	.L254
	movzx	eax, BYTE PTR t6_l1[rip]
	test	al, al
	jne	.L254
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L254
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L254
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	jne	.L157
.L254:
	movzx	eax, BYTE PTR _x_t6_l1[rip]
	test	al, al
	je	.L256
	movzx	eax, BYTE PTR _x_t6_l0[rip]
	test	al, al
	jne	.L256
	movss	xmm1, DWORD PTR t6_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L256
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	je	.L256
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	je	.L256
	movss	xmm0, DWORD PTR t6_x[rip]
	movss	xmm1, DWORD PTR _x_t6_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L256
	ucomiss	xmm0, xmm1
	je	.L257
.L256:
	movzx	eax, BYTE PTR t6_l0[rip]
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR t6_l1[rip]
	test	al, al
	jne	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L257
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	jne	.L157
.L257:
	movss	xmm0, DWORD PTR t6_x[rip]
	movss	xmm1, DWORD PTR _x_t6_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L259
	ucomiss	xmm0, xmm1
	jne	.L259
	movzx	eax, BYTE PTR _x_t6_l0[rip]
	test	al, al
	je	.L259
	movzx	eax, BYTE PTR _x_t6_l1[rip]
	test	al, al
	je	.L259
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	je	.L259
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	jne	.L261
.L259:
	movzx	eax, BYTE PTR t6_l1[rip]
	test	al, al
	je	.L261
	movzx	eax, BYTE PTR t6_l0[rip]
	test	al, al
	jne	.L261
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L261
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L261
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	jne	.L157
.L261:
	movzx	eax, BYTE PTR _x_t6_l0[rip]
	test	al, al
	jne	.L262
	movzx	eax, BYTE PTR _x_t6_l1[rip]
	test	al, al
	jne	.L262
	movss	xmm1, DWORD PTR t6_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L262
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	je	.L262
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	jne	.L262
	movss	xmm0, DWORD PTR t6_x[rip]
	movss	xmm1, DWORD PTR _x_t6_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L262
	ucomiss	xmm0, xmm1
	je	.L264
.L262:
	movzx	eax, BYTE PTR t6_l0[rip]
	test	al, al
	je	.L264
	movzx	eax, BYTE PTR t6_l1[rip]
	test	al, al
	je	.L264
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L264
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L264
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	jne	.L157
.L264:
	movzx	eax, BYTE PTR _x_t5_l0[rip]
	test	al, al
	jne	.L266
	movzx	eax, BYTE PTR _x_t5_l1[rip]
	test	al, al
	je	.L267
.L266:
	movzx	eax, BYTE PTR _x_t5_l0[rip]
	test	al, al
	je	.L268
	movzx	eax, BYTE PTR _x_t5_l1[rip]
	test	al, al
	je	.L267
.L268:
	movzx	eax, BYTE PTR _x_t5_l1[rip]
	test	al, al
	je	.L269
	movzx	eax, BYTE PTR _x_t5_l0[rip]
	test	al, al
	je	.L267
.L269:
	movzx	eax, BYTE PTR _x_t5_l0[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR _x_t5_l1[rip]
	test	al, al
	je	.L157
.L267:
	movzx	eax, BYTE PTR _x_t5_evt0[rip]
	test	al, al
	jne	.L270
	movzx	eax, BYTE PTR _x_t5_evt1[rip]
	test	al, al
	je	.L271
.L270:
	movzx	eax, BYTE PTR _x_t5_evt0[rip]
	test	al, al
	je	.L272
	movzx	eax, BYTE PTR _x_t5_evt1[rip]
	test	al, al
	je	.L271
.L272:
	movzx	eax, BYTE PTR _x_t5_evt1[rip]
	test	al, al
	je	.L273
	movzx	eax, BYTE PTR _x_t5_evt0[rip]
	test	al, al
	je	.L271
.L273:
	movzx	eax, BYTE PTR _x_t5_evt0[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR _x_t5_evt1[rip]
	test	al, al
	je	.L157
.L271:
	movzx	eax, BYTE PTR _x_t5_l0[rip]
	test	al, al
	jne	.L274
	movzx	eax, BYTE PTR _x_t5_l1[rip]
	test	al, al
	je	.L275
.L274:
	movss	xmm1, DWORD PTR _x_t5_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L157
.L275:
	movzx	eax, BYTE PTR t5_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t5_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L277
	movzx	eax, BYTE PTR t5_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t5_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L277
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t5_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t5_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L277
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L278
.L277:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L157
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	jne	.L278
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	je	.L157
.L278:
	movzx	eax, BYTE PTR _x_t5_l0[rip]
	test	al, al
	je	.L281
	movzx	eax, BYTE PTR _x_t5_l1[rip]
	test	al, al
	jne	.L281
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	je	.L281
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	jne	.L281
	movss	xmm0, DWORD PTR _x_t5_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L281
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L282
.L281:
	movzx	eax, BYTE PTR t5_l0[rip]
	test	al, al
	jne	.L282
	movzx	eax, BYTE PTR t5_l1[rip]
	test	al, al
	jne	.L282
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L282
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L282
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	jne	.L157
.L282:
	movzx	eax, BYTE PTR _x_t5_l1[rip]
	test	al, al
	je	.L284
	movzx	eax, BYTE PTR _x_t5_l0[rip]
	test	al, al
	jne	.L284
	movss	xmm1, DWORD PTR t5_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L284
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	je	.L284
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	je	.L284
	movss	xmm0, DWORD PTR t5_x[rip]
	movss	xmm1, DWORD PTR _x_t5_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L284
	ucomiss	xmm0, xmm1
	je	.L285
.L284:
	movzx	eax, BYTE PTR t5_l0[rip]
	test	al, al
	je	.L285
	movzx	eax, BYTE PTR t5_l1[rip]
	test	al, al
	jne	.L285
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L285
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L285
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	jne	.L157
.L285:
	movss	xmm0, DWORD PTR t5_x[rip]
	movss	xmm1, DWORD PTR _x_t5_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L287
	ucomiss	xmm0, xmm1
	jne	.L287
	movzx	eax, BYTE PTR _x_t5_l0[rip]
	test	al, al
	je	.L287
	movzx	eax, BYTE PTR _x_t5_l1[rip]
	test	al, al
	je	.L287
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	je	.L287
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	jne	.L289
.L287:
	movzx	eax, BYTE PTR t5_l1[rip]
	test	al, al
	je	.L289
	movzx	eax, BYTE PTR t5_l0[rip]
	test	al, al
	jne	.L289
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L289
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L289
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	jne	.L157
.L289:
	movzx	eax, BYTE PTR _x_t5_l0[rip]
	test	al, al
	jne	.L290
	movzx	eax, BYTE PTR _x_t5_l1[rip]
	test	al, al
	jne	.L290
	movss	xmm1, DWORD PTR t5_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L290
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	je	.L290
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	jne	.L290
	movss	xmm0, DWORD PTR t5_x[rip]
	movss	xmm1, DWORD PTR _x_t5_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L290
	ucomiss	xmm0, xmm1
	je	.L292
.L290:
	movzx	eax, BYTE PTR t5_l0[rip]
	test	al, al
	je	.L292
	movzx	eax, BYTE PTR t5_l1[rip]
	test	al, al
	je	.L292
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L292
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L292
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	jne	.L157
.L292:
	movzx	eax, BYTE PTR _x_t4_l0[rip]
	test	al, al
	jne	.L294
	movzx	eax, BYTE PTR _x_t4_l1[rip]
	test	al, al
	je	.L295
.L294:
	movzx	eax, BYTE PTR _x_t4_l0[rip]
	test	al, al
	je	.L296
	movzx	eax, BYTE PTR _x_t4_l1[rip]
	test	al, al
	je	.L295
.L296:
	movzx	eax, BYTE PTR _x_t4_l1[rip]
	test	al, al
	je	.L297
	movzx	eax, BYTE PTR _x_t4_l0[rip]
	test	al, al
	je	.L295
.L297:
	movzx	eax, BYTE PTR _x_t4_l0[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR _x_t4_l1[rip]
	test	al, al
	je	.L157
.L295:
	movzx	eax, BYTE PTR _x_t4_evt0[rip]
	test	al, al
	jne	.L298
	movzx	eax, BYTE PTR _x_t4_evt1[rip]
	test	al, al
	je	.L299
.L298:
	movzx	eax, BYTE PTR _x_t4_evt0[rip]
	test	al, al
	je	.L300
	movzx	eax, BYTE PTR _x_t4_evt1[rip]
	test	al, al
	je	.L299
.L300:
	movzx	eax, BYTE PTR _x_t4_evt1[rip]
	test	al, al
	je	.L301
	movzx	eax, BYTE PTR _x_t4_evt0[rip]
	test	al, al
	je	.L299
.L301:
	movzx	eax, BYTE PTR _x_t4_evt0[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR _x_t4_evt1[rip]
	test	al, al
	je	.L157
.L299:
	movzx	eax, BYTE PTR _x_t4_l0[rip]
	test	al, al
	jne	.L302
	movzx	eax, BYTE PTR _x_t4_l1[rip]
	test	al, al
	je	.L303
.L302:
	movss	xmm1, DWORD PTR _x_t4_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L157
.L303:
	movzx	eax, BYTE PTR t4_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t4_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L305
	movzx	eax, BYTE PTR t4_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t4_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L305
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t4_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t4_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L305
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L306
.L305:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L157
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	jne	.L306
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	je	.L157
.L306:
	movzx	eax, BYTE PTR _x_t4_l0[rip]
	test	al, al
	je	.L309
	movzx	eax, BYTE PTR _x_t4_l1[rip]
	test	al, al
	jne	.L309
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	je	.L309
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	jne	.L309
	movss	xmm0, DWORD PTR _x_t4_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L309
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L310
.L309:
	movzx	eax, BYTE PTR t4_l0[rip]
	test	al, al
	jne	.L310
	movzx	eax, BYTE PTR t4_l1[rip]
	test	al, al
	jne	.L310
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L310
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L310
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	jne	.L157
.L310:
	movzx	eax, BYTE PTR _x_t4_l1[rip]
	test	al, al
	je	.L312
	movzx	eax, BYTE PTR _x_t4_l0[rip]
	test	al, al
	jne	.L312
	movss	xmm1, DWORD PTR t4_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L312
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	je	.L312
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	je	.L312
	movss	xmm0, DWORD PTR t4_x[rip]
	movss	xmm1, DWORD PTR _x_t4_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L312
	ucomiss	xmm0, xmm1
	je	.L313
.L312:
	movzx	eax, BYTE PTR t4_l0[rip]
	test	al, al
	je	.L313
	movzx	eax, BYTE PTR t4_l1[rip]
	test	al, al
	jne	.L313
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L313
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L313
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	jne	.L157
.L313:
	movss	xmm0, DWORD PTR t4_x[rip]
	movss	xmm1, DWORD PTR _x_t4_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L315
	ucomiss	xmm0, xmm1
	jne	.L315
	movzx	eax, BYTE PTR _x_t4_l0[rip]
	test	al, al
	je	.L315
	movzx	eax, BYTE PTR _x_t4_l1[rip]
	test	al, al
	je	.L315
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	je	.L315
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	jne	.L317
.L315:
	movzx	eax, BYTE PTR t4_l1[rip]
	test	al, al
	je	.L317
	movzx	eax, BYTE PTR t4_l0[rip]
	test	al, al
	jne	.L317
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L317
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L317
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	jne	.L157
.L317:
	movzx	eax, BYTE PTR _x_t4_l0[rip]
	test	al, al
	jne	.L318
	movzx	eax, BYTE PTR _x_t4_l1[rip]
	test	al, al
	jne	.L318
	movss	xmm1, DWORD PTR t4_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L318
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	je	.L318
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	jne	.L318
	movss	xmm0, DWORD PTR t4_x[rip]
	movss	xmm1, DWORD PTR _x_t4_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L318
	ucomiss	xmm0, xmm1
	je	.L320
.L318:
	movzx	eax, BYTE PTR t4_l0[rip]
	test	al, al
	je	.L320
	movzx	eax, BYTE PTR t4_l1[rip]
	test	al, al
	je	.L320
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L320
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L320
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	jne	.L157
.L320:
	movzx	eax, BYTE PTR _x_t3_l0[rip]
	test	al, al
	jne	.L322
	movzx	eax, BYTE PTR _x_t3_l1[rip]
	test	al, al
	je	.L323
.L322:
	movzx	eax, BYTE PTR _x_t3_l0[rip]
	test	al, al
	je	.L324
	movzx	eax, BYTE PTR _x_t3_l1[rip]
	test	al, al
	je	.L323
.L324:
	movzx	eax, BYTE PTR _x_t3_l1[rip]
	test	al, al
	je	.L325
	movzx	eax, BYTE PTR _x_t3_l0[rip]
	test	al, al
	je	.L323
.L325:
	movzx	eax, BYTE PTR _x_t3_l0[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR _x_t3_l1[rip]
	test	al, al
	je	.L157
.L323:
	movzx	eax, BYTE PTR _x_t3_evt0[rip]
	test	al, al
	jne	.L326
	movzx	eax, BYTE PTR _x_t3_evt1[rip]
	test	al, al
	je	.L327
.L326:
	movzx	eax, BYTE PTR _x_t3_evt0[rip]
	test	al, al
	je	.L328
	movzx	eax, BYTE PTR _x_t3_evt1[rip]
	test	al, al
	je	.L327
.L328:
	movzx	eax, BYTE PTR _x_t3_evt1[rip]
	test	al, al
	je	.L329
	movzx	eax, BYTE PTR _x_t3_evt0[rip]
	test	al, al
	je	.L327
.L329:
	movzx	eax, BYTE PTR _x_t3_evt0[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR _x_t3_evt1[rip]
	test	al, al
	je	.L157
.L327:
	movzx	eax, BYTE PTR _x_t3_l0[rip]
	test	al, al
	jne	.L330
	movzx	eax, BYTE PTR _x_t3_l1[rip]
	test	al, al
	je	.L331
.L330:
	movss	xmm1, DWORD PTR _x_t3_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L157
.L331:
	movzx	eax, BYTE PTR t3_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t3_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L333
	movzx	eax, BYTE PTR t3_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t3_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L333
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t3_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t3_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L333
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L334
.L333:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L157
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	jne	.L334
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	je	.L157
.L334:
	movzx	eax, BYTE PTR _x_t3_l0[rip]
	test	al, al
	je	.L337
	movzx	eax, BYTE PTR _x_t3_l1[rip]
	test	al, al
	jne	.L337
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	je	.L337
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	jne	.L337
	movss	xmm0, DWORD PTR _x_t3_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L337
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L338
.L337:
	movzx	eax, BYTE PTR t3_l0[rip]
	test	al, al
	jne	.L338
	movzx	eax, BYTE PTR t3_l1[rip]
	test	al, al
	jne	.L338
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L338
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L338
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	jne	.L157
.L338:
	movzx	eax, BYTE PTR _x_t3_l1[rip]
	test	al, al
	je	.L340
	movzx	eax, BYTE PTR _x_t3_l0[rip]
	test	al, al
	jne	.L340
	movss	xmm1, DWORD PTR t3_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L340
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	je	.L340
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	je	.L340
	movss	xmm0, DWORD PTR t3_x[rip]
	movss	xmm1, DWORD PTR _x_t3_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L340
	ucomiss	xmm0, xmm1
	je	.L341
.L340:
	movzx	eax, BYTE PTR t3_l0[rip]
	test	al, al
	je	.L341
	movzx	eax, BYTE PTR t3_l1[rip]
	test	al, al
	jne	.L341
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L341
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L341
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	jne	.L157
.L341:
	movss	xmm0, DWORD PTR t3_x[rip]
	movss	xmm1, DWORD PTR _x_t3_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L343
	ucomiss	xmm0, xmm1
	jne	.L343
	movzx	eax, BYTE PTR _x_t3_l0[rip]
	test	al, al
	je	.L343
	movzx	eax, BYTE PTR _x_t3_l1[rip]
	test	al, al
	je	.L343
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	je	.L343
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	jne	.L345
.L343:
	movzx	eax, BYTE PTR t3_l1[rip]
	test	al, al
	je	.L345
	movzx	eax, BYTE PTR t3_l0[rip]
	test	al, al
	jne	.L345
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L345
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L345
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	jne	.L157
.L345:
	movzx	eax, BYTE PTR _x_t3_l0[rip]
	test	al, al
	jne	.L346
	movzx	eax, BYTE PTR _x_t3_l1[rip]
	test	al, al
	jne	.L346
	movss	xmm1, DWORD PTR t3_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L346
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	je	.L346
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	jne	.L346
	movss	xmm0, DWORD PTR t3_x[rip]
	movss	xmm1, DWORD PTR _x_t3_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L346
	ucomiss	xmm0, xmm1
	je	.L348
.L346:
	movzx	eax, BYTE PTR t3_l0[rip]
	test	al, al
	je	.L348
	movzx	eax, BYTE PTR t3_l1[rip]
	test	al, al
	je	.L348
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L348
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L348
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	jne	.L157
.L348:
	movzx	eax, BYTE PTR _x_t2_l0[rip]
	test	al, al
	jne	.L350
	movzx	eax, BYTE PTR _x_t2_l1[rip]
	test	al, al
	je	.L351
.L350:
	movzx	eax, BYTE PTR _x_t2_l0[rip]
	test	al, al
	je	.L352
	movzx	eax, BYTE PTR _x_t2_l1[rip]
	test	al, al
	je	.L351
.L352:
	movzx	eax, BYTE PTR _x_t2_l1[rip]
	test	al, al
	je	.L353
	movzx	eax, BYTE PTR _x_t2_l0[rip]
	test	al, al
	je	.L351
.L353:
	movzx	eax, BYTE PTR _x_t2_l0[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR _x_t2_l1[rip]
	test	al, al
	je	.L157
.L351:
	movzx	eax, BYTE PTR _x_t2_evt0[rip]
	test	al, al
	jne	.L354
	movzx	eax, BYTE PTR _x_t2_evt1[rip]
	test	al, al
	je	.L355
.L354:
	movzx	eax, BYTE PTR _x_t2_evt0[rip]
	test	al, al
	je	.L356
	movzx	eax, BYTE PTR _x_t2_evt1[rip]
	test	al, al
	je	.L355
.L356:
	movzx	eax, BYTE PTR _x_t2_evt1[rip]
	test	al, al
	je	.L357
	movzx	eax, BYTE PTR _x_t2_evt0[rip]
	test	al, al
	je	.L355
.L357:
	movzx	eax, BYTE PTR _x_t2_evt0[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR _x_t2_evt1[rip]
	test	al, al
	je	.L157
.L355:
	movzx	eax, BYTE PTR _x_t2_l0[rip]
	test	al, al
	jne	.L358
	movzx	eax, BYTE PTR _x_t2_l1[rip]
	test	al, al
	je	.L359
.L358:
	movss	xmm1, DWORD PTR _x_t2_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L157
.L359:
	movzx	eax, BYTE PTR t2_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t2_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L361
	movzx	eax, BYTE PTR t2_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t2_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L361
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t2_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t2_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L361
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L362
.L361:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L157
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	jne	.L362
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	je	.L157
.L362:
	movzx	eax, BYTE PTR _x_t2_l0[rip]
	test	al, al
	je	.L365
	movzx	eax, BYTE PTR _x_t2_l1[rip]
	test	al, al
	jne	.L365
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	je	.L365
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	jne	.L365
	movss	xmm0, DWORD PTR _x_t2_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L365
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L366
.L365:
	movzx	eax, BYTE PTR t2_l0[rip]
	test	al, al
	jne	.L366
	movzx	eax, BYTE PTR t2_l1[rip]
	test	al, al
	jne	.L366
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L366
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L366
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	jne	.L157
.L366:
	movzx	eax, BYTE PTR _x_t2_l1[rip]
	test	al, al
	je	.L368
	movzx	eax, BYTE PTR _x_t2_l0[rip]
	test	al, al
	jne	.L368
	movss	xmm1, DWORD PTR t2_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L368
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	je	.L368
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	je	.L368
	movss	xmm0, DWORD PTR t2_x[rip]
	movss	xmm1, DWORD PTR _x_t2_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L368
	ucomiss	xmm0, xmm1
	je	.L369
.L368:
	movzx	eax, BYTE PTR t2_l0[rip]
	test	al, al
	je	.L369
	movzx	eax, BYTE PTR t2_l1[rip]
	test	al, al
	jne	.L369
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L369
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L369
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	jne	.L157
.L369:
	movss	xmm0, DWORD PTR t2_x[rip]
	movss	xmm1, DWORD PTR _x_t2_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L371
	ucomiss	xmm0, xmm1
	jne	.L371
	movzx	eax, BYTE PTR _x_t2_l0[rip]
	test	al, al
	je	.L371
	movzx	eax, BYTE PTR _x_t2_l1[rip]
	test	al, al
	je	.L371
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	je	.L371
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	jne	.L373
.L371:
	movzx	eax, BYTE PTR t2_l1[rip]
	test	al, al
	je	.L373
	movzx	eax, BYTE PTR t2_l0[rip]
	test	al, al
	jne	.L373
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L373
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L373
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	jne	.L157
.L373:
	movzx	eax, BYTE PTR _x_t2_l0[rip]
	test	al, al
	jne	.L374
	movzx	eax, BYTE PTR _x_t2_l1[rip]
	test	al, al
	jne	.L374
	movss	xmm1, DWORD PTR t2_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L374
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	je	.L374
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	jne	.L374
	movss	xmm0, DWORD PTR t2_x[rip]
	movss	xmm1, DWORD PTR _x_t2_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L374
	ucomiss	xmm0, xmm1
	je	.L376
.L374:
	movzx	eax, BYTE PTR t2_l0[rip]
	test	al, al
	je	.L376
	movzx	eax, BYTE PTR t2_l1[rip]
	test	al, al
	je	.L376
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L376
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L376
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	jne	.L157
.L376:
	movzx	eax, BYTE PTR _x_t1_l0[rip]
	test	al, al
	jne	.L378
	movzx	eax, BYTE PTR _x_t1_l1[rip]
	test	al, al
	je	.L379
.L378:
	movzx	eax, BYTE PTR _x_t1_l0[rip]
	test	al, al
	je	.L380
	movzx	eax, BYTE PTR _x_t1_l1[rip]
	test	al, al
	je	.L379
.L380:
	movzx	eax, BYTE PTR _x_t1_l1[rip]
	test	al, al
	je	.L381
	movzx	eax, BYTE PTR _x_t1_l0[rip]
	test	al, al
	je	.L379
.L381:
	movzx	eax, BYTE PTR _x_t1_l0[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR _x_t1_l1[rip]
	test	al, al
	je	.L157
.L379:
	movzx	eax, BYTE PTR _x_t1_evt0[rip]
	test	al, al
	jne	.L382
	movzx	eax, BYTE PTR _x_t1_evt1[rip]
	test	al, al
	je	.L383
.L382:
	movzx	eax, BYTE PTR _x_t1_evt0[rip]
	test	al, al
	je	.L384
	movzx	eax, BYTE PTR _x_t1_evt1[rip]
	test	al, al
	je	.L383
.L384:
	movzx	eax, BYTE PTR _x_t1_evt1[rip]
	test	al, al
	je	.L385
	movzx	eax, BYTE PTR _x_t1_evt0[rip]
	test	al, al
	je	.L383
.L385:
	movzx	eax, BYTE PTR _x_t1_evt0[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR _x_t1_evt1[rip]
	test	al, al
	je	.L157
.L383:
	movzx	eax, BYTE PTR _x_t1_l0[rip]
	test	al, al
	jne	.L386
	movzx	eax, BYTE PTR _x_t1_l1[rip]
	test	al, al
	je	.L387
.L386:
	movss	xmm1, DWORD PTR _x_t1_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L157
.L387:
	movzx	eax, BYTE PTR t1_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t1_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L389
	movzx	eax, BYTE PTR t1_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t1_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L389
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t1_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t1_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L389
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L390
.L389:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L157
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	jne	.L390
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	je	.L157
.L390:
	movzx	eax, BYTE PTR _x_t1_l0[rip]
	test	al, al
	je	.L393
	movzx	eax, BYTE PTR _x_t1_l1[rip]
	test	al, al
	jne	.L393
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	je	.L393
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	jne	.L393
	movss	xmm0, DWORD PTR _x_t1_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L393
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L394
.L393:
	movzx	eax, BYTE PTR t1_l0[rip]
	test	al, al
	jne	.L394
	movzx	eax, BYTE PTR t1_l1[rip]
	test	al, al
	jne	.L394
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L394
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L394
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	jne	.L157
.L394:
	movzx	eax, BYTE PTR _x_t1_l1[rip]
	test	al, al
	je	.L396
	movzx	eax, BYTE PTR _x_t1_l0[rip]
	test	al, al
	jne	.L396
	movss	xmm1, DWORD PTR t1_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L396
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	je	.L396
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	je	.L396
	movss	xmm0, DWORD PTR t1_x[rip]
	movss	xmm1, DWORD PTR _x_t1_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L396
	ucomiss	xmm0, xmm1
	je	.L397
.L396:
	movzx	eax, BYTE PTR t1_l0[rip]
	test	al, al
	je	.L397
	movzx	eax, BYTE PTR t1_l1[rip]
	test	al, al
	jne	.L397
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L397
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L397
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	jne	.L157
.L397:
	movss	xmm0, DWORD PTR t1_x[rip]
	movss	xmm1, DWORD PTR _x_t1_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L399
	ucomiss	xmm0, xmm1
	jne	.L399
	movzx	eax, BYTE PTR _x_t1_l0[rip]
	test	al, al
	je	.L399
	movzx	eax, BYTE PTR _x_t1_l1[rip]
	test	al, al
	je	.L399
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	je	.L399
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	jne	.L401
.L399:
	movzx	eax, BYTE PTR t1_l1[rip]
	test	al, al
	je	.L401
	movzx	eax, BYTE PTR t1_l0[rip]
	test	al, al
	jne	.L401
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L401
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L401
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	jne	.L157
.L401:
	movzx	eax, BYTE PTR _x_t1_l0[rip]
	test	al, al
	jne	.L402
	movzx	eax, BYTE PTR _x_t1_l1[rip]
	test	al, al
	jne	.L402
	movss	xmm1, DWORD PTR t1_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L402
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	je	.L402
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	jne	.L402
	movss	xmm0, DWORD PTR t1_x[rip]
	movss	xmm1, DWORD PTR _x_t1_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L402
	ucomiss	xmm0, xmm1
	je	.L404
.L402:
	movzx	eax, BYTE PTR t1_l0[rip]
	test	al, al
	je	.L404
	movzx	eax, BYTE PTR t1_l1[rip]
	test	al, al
	je	.L404
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L404
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L404
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	jne	.L157
.L404:
	movzx	eax, BYTE PTR _x_t0_l0[rip]
	test	al, al
	jne	.L406
	movzx	eax, BYTE PTR _x_t0_l1[rip]
	test	al, al
	je	.L407
.L406:
	movzx	eax, BYTE PTR _x_t0_l0[rip]
	test	al, al
	je	.L408
	movzx	eax, BYTE PTR _x_t0_l1[rip]
	test	al, al
	je	.L407
.L408:
	movzx	eax, BYTE PTR _x_t0_l1[rip]
	test	al, al
	je	.L409
	movzx	eax, BYTE PTR _x_t0_l0[rip]
	test	al, al
	je	.L407
.L409:
	movzx	eax, BYTE PTR _x_t0_l0[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR _x_t0_l1[rip]
	test	al, al
	je	.L157
.L407:
	movzx	eax, BYTE PTR _x_t0_evt0[rip]
	test	al, al
	jne	.L410
	movzx	eax, BYTE PTR _x_t0_evt1[rip]
	test	al, al
	je	.L411
.L410:
	movzx	eax, BYTE PTR _x_t0_evt0[rip]
	test	al, al
	je	.L412
	movzx	eax, BYTE PTR _x_t0_evt1[rip]
	test	al, al
	je	.L411
.L412:
	movzx	eax, BYTE PTR _x_t0_evt1[rip]
	test	al, al
	je	.L413
	movzx	eax, BYTE PTR _x_t0_evt0[rip]
	test	al, al
	je	.L411
.L413:
	movzx	eax, BYTE PTR _x_t0_evt0[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR _x_t0_evt1[rip]
	test	al, al
	je	.L157
.L411:
	movzx	eax, BYTE PTR _x_t0_l0[rip]
	test	al, al
	jne	.L414
	movzx	eax, BYTE PTR _x_t0_l1[rip]
	test	al, al
	je	.L415
.L414:
	movss	xmm1, DWORD PTR _x_t0_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L157
.L415:
	movzx	eax, BYTE PTR t0_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t0_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L417
	movzx	eax, BYTE PTR t0_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_t0_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L417
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR t0_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_t0_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L417
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L418
.L417:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L157
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	jne	.L418
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	je	.L157
.L418:
	movzx	eax, BYTE PTR _x_t0_l0[rip]
	test	al, al
	je	.L421
	movzx	eax, BYTE PTR _x_t0_l1[rip]
	test	al, al
	jne	.L421
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	je	.L421
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	jne	.L421
	movss	xmm0, DWORD PTR _x_t0_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L421
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L422
.L421:
	movzx	eax, BYTE PTR t0_l0[rip]
	test	al, al
	jne	.L422
	movzx	eax, BYTE PTR t0_l1[rip]
	test	al, al
	jne	.L422
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L422
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L422
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	jne	.L157
.L422:
	movzx	eax, BYTE PTR _x_t0_l1[rip]
	test	al, al
	je	.L424
	movzx	eax, BYTE PTR _x_t0_l0[rip]
	test	al, al
	jne	.L424
	movss	xmm1, DWORD PTR t0_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L424
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	je	.L424
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	je	.L424
	movss	xmm0, DWORD PTR t0_x[rip]
	movss	xmm1, DWORD PTR _x_t0_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L424
	ucomiss	xmm0, xmm1
	je	.L425
.L424:
	movzx	eax, BYTE PTR t0_l0[rip]
	test	al, al
	je	.L425
	movzx	eax, BYTE PTR t0_l1[rip]
	test	al, al
	jne	.L425
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L425
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L425
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	jne	.L157
.L425:
	movss	xmm0, DWORD PTR t0_x[rip]
	movss	xmm1, DWORD PTR _x_t0_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L427
	ucomiss	xmm0, xmm1
	jne	.L427
	movzx	eax, BYTE PTR _x_t0_l0[rip]
	test	al, al
	je	.L427
	movzx	eax, BYTE PTR _x_t0_l1[rip]
	test	al, al
	je	.L427
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	je	.L427
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	jne	.L429
.L427:
	movzx	eax, BYTE PTR t0_l1[rip]
	test	al, al
	je	.L429
	movzx	eax, BYTE PTR t0_l0[rip]
	test	al, al
	jne	.L429
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L429
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L429
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	jne	.L157
.L429:
	movzx	eax, BYTE PTR _x_t0_l0[rip]
	test	al, al
	jne	.L430
	movzx	eax, BYTE PTR _x_t0_l1[rip]
	test	al, al
	jne	.L430
	movss	xmm1, DWORD PTR t0_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L430
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	je	.L430
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	jne	.L430
	movss	xmm0, DWORD PTR t0_x[rip]
	movss	xmm1, DWORD PTR _x_t0_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L430
	ucomiss	xmm0, xmm1
	je	.L432
.L430:
	movzx	eax, BYTE PTR t0_l0[rip]
	test	al, al
	je	.L432
	movzx	eax, BYTE PTR t0_l1[rip]
	test	al, al
	je	.L432
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L432
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L432
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	jne	.L157
.L432:
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	jne	.L434
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	je	.L435
.L434:
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	je	.L436
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	je	.L435
.L436:
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	je	.L437
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	je	.L435
.L437:
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	je	.L157
.L435:
	movzx	eax, BYTE PTR _x_controller_evt2[rip]
	test	al, al
	jne	.L438
	movzx	eax, BYTE PTR _x_controller_evt0[rip]
	test	al, al
	jne	.L438
	movzx	eax, BYTE PTR _x_controller_evt1[rip]
	test	al, al
	je	.L439
.L438:
	movzx	eax, BYTE PTR _x_controller_evt2[rip]
	test	al, al
	jne	.L440
	movzx	eax, BYTE PTR _x_controller_evt0[rip]
	test	al, al
	je	.L440
	movzx	eax, BYTE PTR _x_controller_evt1[rip]
	test	al, al
	je	.L439
.L440:
	movzx	eax, BYTE PTR _x_controller_evt2[rip]
	test	al, al
	jne	.L441
	movzx	eax, BYTE PTR _x_controller_evt1[rip]
	test	al, al
	je	.L441
	movzx	eax, BYTE PTR _x_controller_evt0[rip]
	test	al, al
	je	.L439
.L441:
	movzx	eax, BYTE PTR _x_controller_evt2[rip]
	test	al, al
	jne	.L442
	movzx	eax, BYTE PTR _x_controller_evt0[rip]
	test	al, al
	je	.L442
	movzx	eax, BYTE PTR _x_controller_evt1[rip]
	test	al, al
	jne	.L439
.L442:
	movzx	eax, BYTE PTR _x_controller_evt2[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR _x_controller_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR _x_controller_evt1[rip]
	test	al, al
	jne	.L157
.L439:
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	test	eax, eax
	je	.L443
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 1
	je	.L443
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 2
	je	.L443
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 3
	je	.L443
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 4
	je	.L443
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 5
	je	.L443
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 6
	je	.L443
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 7
	je	.L443
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 8
	je	.L443
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 9
	je	.L443
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 10
	je	.L443
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 11
	jne	.L157
.L443:
	movss	xmm1, DWORD PTR _x_controller_z[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L444
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	je	.L445
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	je	.L157
.L445:
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	je	.L444
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	jne	.L157
.L444:
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L446
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L446
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR controller_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_controller_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L446
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L446
	mov	edx, DWORD PTR controller_cnt[rip]
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	edx, eax
	je	.L448
.L446:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L157
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L448
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L448
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	je	.L157
.L448:
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	je	.L450
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	jne	.L450
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L450
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	je	.L450
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	jne	.L450
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	eax, 1
	jne	.L450
	movss	xmm0, DWORD PTR _x_controller_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L450
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L451
.L450:
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	jne	.L451
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	jne	.L451
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L451
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L451
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	jne	.L157
.L451:
	movss	xmm0, DWORD PTR controller_z[rip]
	movss	xmm1, DWORD PTR _x_controller_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L453
	ucomiss	xmm0, xmm1
	jne	.L453
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	je	.L455
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	je	.L456
.L455:
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	je	.L453
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	je	.L456
.L453:
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	je	.L456
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	jne	.L456
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L456
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L456
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	jne	.L157
.L456:
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L457
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	je	.L457
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	jne	.L457
	mov	eax, DWORD PTR controller_cnt[rip]
	mov	edx, DWORD PTR _x_controller_cnt[rip]
	sub	eax, edx
	cmp	eax, -1
	je	.L458
.L457:
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L459
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	je	.L459
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L459
	mov	eax, DWORD PTR controller_cnt[rip]
	mov	edx, DWORD PTR _x_controller_cnt[rip]
	sub	eax, edx
	cmp	eax, 1
	je	.L458
.L459:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L458
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L458
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L460
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L460
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	je	.L458
.L460:
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	je	.L458
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	jne	.L458
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	je	.L458
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	je	.L157
.L458:
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L461
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	je	.L461
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	je	.L461
	mov	edx, DWORD PTR controller_cnt[rip]
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	cmp	edx, eax
	jne	.L461
	movss	xmm0, DWORD PTR controller_z[rip]
	movss	xmm1, DWORD PTR .LC2[rip]
	ucomiss	xmm0, xmm1
	jp	.L461
	movss	xmm1, DWORD PTR .LC2[rip]
	ucomiss	xmm0, xmm1
	je	.L462
.L461:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L462
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L462
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L464
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L464
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	je	.L462
.L464:
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	je	.L462
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	jne	.L462
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	je	.L462
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	je	.L157
.L462:
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	je	.L465
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	je	.L466
.L465:
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	je	.L467
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	jne	.L466
.L467:
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	je	.L466
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	jne	.L466
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L466
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L466
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	jne	.L157
.L466:
	movss	xmm0, DWORD PTR controller_z[rip]
	movss	xmm1, DWORD PTR _x_controller_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L468
	ucomiss	xmm0, xmm1
	jne	.L468
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L470
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	je	.L470
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	jne	.L470
	mov	eax, DWORD PTR controller_cnt[rip]
	mov	edx, DWORD PTR _x_controller_cnt[rip]
	sub	eax, edx
	cmp	eax, -1
	je	.L471
.L470:
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L468
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	je	.L468
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L468
	mov	eax, DWORD PTR controller_cnt[rip]
	mov	edx, DWORD PTR _x_controller_cnt[rip]
	sub	eax, edx
	cmp	eax, 1
	jne	.L468
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 1
	jg	.L471
.L468:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L471
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L471
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L472
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L472
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	je	.L471
.L472:
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	je	.L471
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	jne	.L471
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	je	.L471
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	je	.L157
.L471:
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L473
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	je	.L473
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L473
	mov	eax, DWORD PTR controller_cnt[rip]
	cmp	eax, 1
	jne	.L473
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	test	eax, eax
	jne	.L473
	movss	xmm0, DWORD PTR _x_controller_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L473
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L474
.L473:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L474
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L474
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L476
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L476
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	je	.L474
.L476:
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	je	.L474
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	jne	.L474
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	je	.L474
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	jne	.L157
.L474:
	movss	xmm0, DWORD PTR controller_z[rip]
	movss	xmm1, DWORD PTR _x_controller_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L477
	ucomiss	xmm0, xmm1
	jne	.L477
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	jne	.L479
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	je	.L480
.L479:
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	je	.L477
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	je	.L480
.L477:
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	je	.L480
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	je	.L480
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L480
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L480
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	jne	.L157
.L480:
	mov	eax, DWORD PTR controller_cnt[rip]
	mov	edx, DWORD PTR _x_controller_cnt[rip]
	sub	eax, edx
	cmp	eax, -1
	jne	.L481
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L481
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	je	.L481
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	jne	.L481
	movss	xmm1, DWORD PTR controller_z[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L482
.L481:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L482
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L482
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L483
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L483
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	je	.L482
.L483:
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	test	al, al
	je	.L482
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	test	al, al
	jne	.L482
	movzx	eax, BYTE PTR controller_l0[rip]
	test	al, al
	je	.L482
	movzx	eax, BYTE PTR controller_l1[rip]
	test	al, al
	jne	.L157
.L482:
	movzx	eax, BYTE PTR _x_gate_l0[rip]
	test	al, al
	jne	.L484
	movzx	eax, BYTE PTR _x_gate_l1[rip]
	test	al, al
	je	.L485
.L484:
	movzx	eax, BYTE PTR _x_gate_l0[rip]
	test	al, al
	je	.L486
	movzx	eax, BYTE PTR _x_gate_l1[rip]
	test	al, al
	je	.L485
.L486:
	movzx	eax, BYTE PTR _x_gate_l1[rip]
	test	al, al
	je	.L487
	movzx	eax, BYTE PTR _x_gate_l0[rip]
	test	al, al
	je	.L485
.L487:
	movzx	eax, BYTE PTR _x_gate_l0[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR _x_gate_l1[rip]
	test	al, al
	je	.L157
.L485:
	movzx	eax, BYTE PTR _x_gate_evt0[rip]
	test	al, al
	jne	.L488
	movzx	eax, BYTE PTR _x_gate_evt1[rip]
	test	al, al
	je	.L489
.L488:
	movzx	eax, BYTE PTR _x_gate_evt0[rip]
	test	al, al
	je	.L490
	movzx	eax, BYTE PTR _x_gate_evt1[rip]
	test	al, al
	je	.L489
.L490:
	movzx	eax, BYTE PTR _x_gate_evt1[rip]
	test	al, al
	je	.L491
	movzx	eax, BYTE PTR _x_gate_evt0[rip]
	test	al, al
	je	.L489
.L491:
	movzx	eax, BYTE PTR _x_gate_evt0[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR _x_gate_evt1[rip]
	test	al, al
	je	.L157
.L489:
	movss	xmm1, DWORD PTR _x_gate_y[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L492
	movzx	eax, BYTE PTR _x_gate_l0[rip]
	test	al, al
	je	.L492
	movzx	eax, BYTE PTR _x_gate_l1[rip]
	test	al, al
	je	.L157
.L492:
	movss	xmm1, DWORD PTR _x_gate_y[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	jnb	.L493
	movzx	eax, BYTE PTR _x_gate_l0[rip]
	test	al, al
	je	.L493
	movzx	eax, BYTE PTR _x_gate_l1[rip]
	test	al, al
	jne	.L157
.L493:
	movzx	eax, BYTE PTR gate_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_gate_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L494
	movzx	eax, BYTE PTR gate_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_gate_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L494
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR gate_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_gate_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L494
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L495
.L494:
	movzx	eax, BYTE PTR gate_evt0[rip]
	test	al, al
	jne	.L497
	movzx	eax, BYTE PTR gate_evt1[rip]
	test	al, al
	je	.L157
.L497:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L157
.L495:
	movzx	eax, BYTE PTR _x_gate_l0[rip]
	test	al, al
	je	.L499
	movzx	eax, BYTE PTR _x_gate_l1[rip]
	test	al, al
	jne	.L499
	movzx	eax, BYTE PTR gate_evt0[rip]
	test	al, al
	je	.L499
	movzx	eax, BYTE PTR gate_evt1[rip]
	test	al, al
	jne	.L499
	movss	xmm0, DWORD PTR _x_gate_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L499
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L500
.L499:
	movzx	eax, BYTE PTR gate_l0[rip]
	test	al, al
	jne	.L500
	movzx	eax, BYTE PTR gate_l1[rip]
	test	al, al
	jne	.L500
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L500
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L500
	movzx	eax, BYTE PTR gate_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR gate_evt1[rip]
	test	al, al
	jne	.L157
.L500:
	movzx	eax, BYTE PTR _x_gate_l1[rip]
	test	al, al
	je	.L502
	movzx	eax, BYTE PTR _x_gate_l0[rip]
	test	al, al
	jne	.L502
	movzx	eax, BYTE PTR gate_evt0[rip]
	test	al, al
	je	.L502
	movzx	eax, BYTE PTR gate_evt1[rip]
	test	al, al
	je	.L502
	movss	xmm1, DWORD PTR gate_y[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jb	.L502
	movss	xmm0, DWORD PTR gate_y[rip]
	movss	xmm1, DWORD PTR _x_gate_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L502
	ucomiss	xmm0, xmm1
	je	.L504
.L502:
	movzx	eax, BYTE PTR gate_l0[rip]
	test	al, al
	je	.L504
	movzx	eax, BYTE PTR gate_l1[rip]
	test	al, al
	jne	.L504
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L504
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L504
	movzx	eax, BYTE PTR gate_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR gate_evt1[rip]
	test	al, al
	jne	.L157
.L504:
	movss	xmm0, DWORD PTR _x_gate_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L506
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L506
	movzx	eax, BYTE PTR _x_gate_l0[rip]
	test	al, al
	je	.L506
	movzx	eax, BYTE PTR _x_gate_l1[rip]
	test	al, al
	je	.L506
	movzx	eax, BYTE PTR gate_evt1[rip]
	test	al, al
	je	.L506
	movzx	eax, BYTE PTR gate_evt0[rip]
	test	al, al
	je	.L508
.L506:
	movzx	eax, BYTE PTR gate_l1[rip]
	test	al, al
	je	.L508
	movzx	eax, BYTE PTR gate_l0[rip]
	test	al, al
	jne	.L508
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L508
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L508
	movzx	eax, BYTE PTR gate_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR gate_evt1[rip]
	test	al, al
	jne	.L157
.L508:
	movss	xmm0, DWORD PTR gate_y[rip]
	movss	xmm1, DWORD PTR _x_gate_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L509
	ucomiss	xmm0, xmm1
	jne	.L509
	movzx	eax, BYTE PTR _x_gate_l0[rip]
	test	al, al
	jne	.L509
	movzx	eax, BYTE PTR _x_gate_l1[rip]
	test	al, al
	jne	.L509
	movss	xmm0, DWORD PTR gate_y[rip]
	movss	xmm1, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jb	.L509
	movzx	eax, BYTE PTR gate_evt0[rip]
	test	al, al
	je	.L509
	movzx	eax, BYTE PTR gate_evt1[rip]
	test	al, al
	je	.L509
	movss	xmm1, DWORD PTR gate_y[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	jnb	.L512
.L509:
	movzx	eax, BYTE PTR gate_l0[rip]
	test	al, al
	je	.L512
	movzx	eax, BYTE PTR gate_l1[rip]
	test	al, al
	je	.L512
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L512
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L512
	movzx	eax, BYTE PTR gate_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR gate_evt1[rip]
	test	al, al
	jne	.L157
.L512:
	movss	xmm0, DWORD PTR _x_delta[rip]
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jb	.L157
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	jne	.L514
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	je	.L515
.L514:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L515
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L515
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	jne	.L157
.L515:
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	jne	.L516
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	je	.L517
.L516:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L517
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L517
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	jne	.L157
.L517:
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	jne	.L518
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	je	.L519
.L518:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L519
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L519
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	jne	.L157
.L519:
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	jne	.L520
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	je	.L521
.L520:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L521
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L521
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	jne	.L157
.L521:
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	jne	.L522
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	je	.L523
.L522:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L523
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L523
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	jne	.L157
.L523:
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	jne	.L524
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	je	.L525
.L524:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L525
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L525
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	jne	.L157
.L525:
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	jne	.L526
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	je	.L527
.L526:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L527
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L527
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	jne	.L157
.L527:
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	jne	.L528
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	je	.L529
.L528:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L529
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L529
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	jne	.L157
.L529:
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	jne	.L530
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	je	.L531
.L530:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L531
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L531
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	jne	.L157
.L531:
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	jne	.L532
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	je	.L533
.L532:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L533
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L533
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	jne	.L157
.L533:
	movzx	eax, BYTE PTR gate_evt0[rip]
	test	al, al
	je	.L534
	movzx	eax, BYTE PTR gate_evt1[rip]
	test	al, al
	jne	.L534
	mov	eax, 1
	jmp	.L535
.L534:
	mov	eax, 0
.L535:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L536
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	je	.L536
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	je	.L536
	mov	eax, 1
	jmp	.L537
.L536:
	mov	eax, 0
.L537:
	and	eax, 1
	xor	eax, edx
	test	al, al
	jne	.L538
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L538
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L157
.L538:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L540
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L540
	movzx	eax, BYTE PTR gate_evt1[rip]
	test	al, al
	je	.L541
	movzx	eax, BYTE PTR gate_evt0[rip]
	test	al, al
	jne	.L541
	mov	eax, 1
	jmp	.L542
.L541:
	mov	eax, 0
.L542:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	je	.L543
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L543
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	jne	.L543
	mov	eax, 1
	jmp	.L544
.L543:
	mov	eax, 0
.L544:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L157
.L540:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L545
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L545
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L546
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	je	.L546
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	jne	.L546
	mov	eax, 1
	jmp	.L547
.L546:
	mov	eax, 0
.L547:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	je	.L548
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	je	.L549
.L548:
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	je	.L550
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	je	.L549
.L550:
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	je	.L551
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	je	.L549
.L551:
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	je	.L552
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	je	.L549
.L552:
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	je	.L553
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	je	.L549
.L553:
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	je	.L554
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	je	.L549
.L554:
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	je	.L555
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	je	.L549
.L555:
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	je	.L556
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	je	.L549
.L556:
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	je	.L557
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	je	.L549
.L557:
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	je	.L558
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	jne	.L558
.L549:
	mov	eax, 1
	jmp	.L559
.L558:
	mov	eax, 0
.L559:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L157
.L545:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L560
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L560
	movzx	eax, BYTE PTR controller_evt2[rip]
	test	al, al
	jne	.L561
	movzx	eax, BYTE PTR controller_evt1[rip]
	test	al, al
	je	.L561
	movzx	eax, BYTE PTR controller_evt0[rip]
	test	al, al
	jne	.L561
	mov	eax, 1
	jmp	.L562
.L561:
	mov	eax, 0
.L562:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR t9_evt1[rip]
	test	al, al
	je	.L563
	movzx	eax, BYTE PTR t9_evt0[rip]
	test	al, al
	je	.L564
.L563:
	movzx	eax, BYTE PTR t8_evt1[rip]
	test	al, al
	je	.L565
	movzx	eax, BYTE PTR t8_evt0[rip]
	test	al, al
	je	.L564
.L565:
	movzx	eax, BYTE PTR t7_evt1[rip]
	test	al, al
	je	.L566
	movzx	eax, BYTE PTR t7_evt0[rip]
	test	al, al
	je	.L564
.L566:
	movzx	eax, BYTE PTR t6_evt1[rip]
	test	al, al
	je	.L567
	movzx	eax, BYTE PTR t6_evt0[rip]
	test	al, al
	je	.L564
.L567:
	movzx	eax, BYTE PTR t5_evt1[rip]
	test	al, al
	je	.L568
	movzx	eax, BYTE PTR t5_evt0[rip]
	test	al, al
	je	.L564
.L568:
	movzx	eax, BYTE PTR t4_evt1[rip]
	test	al, al
	je	.L569
	movzx	eax, BYTE PTR t4_evt0[rip]
	test	al, al
	je	.L564
.L569:
	movzx	eax, BYTE PTR t3_evt1[rip]
	test	al, al
	je	.L570
	movzx	eax, BYTE PTR t3_evt0[rip]
	test	al, al
	je	.L564
.L570:
	movzx	eax, BYTE PTR t2_evt1[rip]
	test	al, al
	je	.L571
	movzx	eax, BYTE PTR t2_evt0[rip]
	test	al, al
	je	.L564
.L571:
	movzx	eax, BYTE PTR t0_evt1[rip]
	test	al, al
	je	.L572
	movzx	eax, BYTE PTR t0_evt0[rip]
	test	al, al
	je	.L564
.L572:
	movzx	eax, BYTE PTR t1_evt1[rip]
	test	al, al
	je	.L573
	movzx	eax, BYTE PTR t1_evt0[rip]
	test	al, al
	jne	.L573
.L564:
	mov	eax, 1
	jmp	.L574
.L573:
	mov	eax, 0
.L574:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L157
.L560:
	movss	xmm0, DWORD PTR delta[rip]
	movss	xmm1, DWORD PTR _x__diverge_delta[rip]
	ucomiss	xmm0, xmm1
	jp	.L636
	ucomiss	xmm0, xmm1
	je	.L575
.L636:
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	movss	xmm1, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L157
.L575:
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	movss	xmm1, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L577
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x__diverge_delta[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L157
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L157
.L577:
	mov	eax, 1
	jmp	.L579
.L157:
	mov	eax, 0
.L579:
	mov	DWORD PTR -4[rbp], eax
	movzx	eax, BYTE PTR _x_t9_l1[rip]
	mov	BYTE PTR t9_l1[rip], al
	movzx	eax, BYTE PTR _x_t9_l0[rip]
	mov	BYTE PTR t9_l0[rip], al
	movzx	eax, BYTE PTR _x_t9_evt1[rip]
	mov	BYTE PTR t9_evt1[rip], al
	movzx	eax, BYTE PTR _x_t9_evt0[rip]
	mov	BYTE PTR t9_evt0[rip], al
	movss	xmm0, DWORD PTR _x_t3_x[rip]
	movss	DWORD PTR t3_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t2_evt1[rip]
	mov	BYTE PTR t2_evt1[rip], al
	movzx	eax, BYTE PTR _x_t2_l1[rip]
	mov	BYTE PTR t2_l1[rip], al
	movss	xmm0, DWORD PTR _x_t2_x[rip]
	movss	DWORD PTR t2_x[rip], xmm0
	movss	xmm0, DWORD PTR _x_delta[rip]
	movss	DWORD PTR delta[rip], xmm0
	movss	xmm0, DWORD PTR _x__diverge_delta[rip]
	movss	DWORD PTR _diverge_delta[rip], xmm0
	movzx	eax, BYTE PTR _x_t1_evt1[rip]
	mov	BYTE PTR t1_evt1[rip], al
	movzx	eax, BYTE PTR _x_t1_l0[rip]
	mov	BYTE PTR t1_l0[rip], al
	movzx	eax, BYTE PTR _x_t0_l1[rip]
	mov	BYTE PTR t0_l1[rip], al
	movzx	eax, BYTE PTR _x_t1_evt0[rip]
	mov	BYTE PTR t1_evt0[rip], al
	movzx	eax, BYTE PTR _x_t0_l0[rip]
	mov	BYTE PTR t0_l0[rip], al
	movzx	eax, BYTE PTR _x_t0_evt1[rip]
	mov	BYTE PTR t0_evt1[rip], al
	movss	xmm0, DWORD PTR _x_t1_x[rip]
	movss	DWORD PTR t1_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t0_evt0[rip]
	mov	BYTE PTR t0_evt0[rip], al
	movss	xmm0, DWORD PTR _x_t0_x[rip]
	movss	DWORD PTR t0_x[rip], xmm0
	movzx	eax, BYTE PTR _x_gate_l0[rip]
	mov	BYTE PTR gate_l0[rip], al
	movzx	eax, BYTE PTR _x_controller_l0[rip]
	mov	BYTE PTR controller_l0[rip], al
	movzx	eax, BYTE PTR _x_t2_l0[rip]
	mov	BYTE PTR t2_l0[rip], al
	movzx	eax, BYTE PTR _x_gate_l1[rip]
	mov	BYTE PTR gate_l1[rip], al
	movss	xmm0, DWORD PTR _x_gate_y[rip]
	movss	DWORD PTR gate_y[rip], xmm0
	movzx	eax, BYTE PTR _x_t1_l1[rip]
	mov	BYTE PTR t1_l1[rip], al
	movzx	eax, BYTE PTR _x_t2_evt0[rip]
	mov	BYTE PTR t2_evt0[rip], al
	movzx	eax, BYTE PTR _x_gate_evt0[rip]
	mov	BYTE PTR gate_evt0[rip], al
	movzx	eax, BYTE PTR _x_controller_evt0[rip]
	mov	BYTE PTR controller_evt0[rip], al
	movzx	eax, BYTE PTR _x_t8_evt1[rip]
	mov	BYTE PTR t8_evt1[rip], al
	movss	xmm0, DWORD PTR _x_t9_x[rip]
	movss	DWORD PTR t9_x[rip], xmm0
	movzx	eax, BYTE PTR _x_gate_evt1[rip]
	mov	BYTE PTR gate_evt1[rip], al
	movzx	eax, BYTE PTR _x_t8_l1[rip]
	mov	BYTE PTR t8_l1[rip], al
	movss	xmm0, DWORD PTR _x_controller_z[rip]
	movss	DWORD PTR controller_z[rip], xmm0
	movzx	eax, BYTE PTR _x_controller_evt2[rip]
	mov	BYTE PTR controller_evt2[rip], al
	movzx	eax, BYTE PTR _x_t3_evt0[rip]
	mov	BYTE PTR t3_evt0[rip], al
	mov	eax, DWORD PTR _x_controller_cnt[rip]
	mov	DWORD PTR controller_cnt[rip], eax
	movzx	eax, BYTE PTR _x_t3_evt1[rip]
	mov	BYTE PTR t3_evt1[rip], al
	movss	xmm0, DWORD PTR _x_t4_x[rip]
	movss	DWORD PTR t4_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t3_l0[rip]
	mov	BYTE PTR t3_l0[rip], al
	movzx	eax, BYTE PTR _x_t3_l1[rip]
	mov	BYTE PTR t3_l1[rip], al
	movzx	eax, BYTE PTR _x_t4_evt0[rip]
	mov	BYTE PTR t4_evt0[rip], al
	movzx	eax, BYTE PTR _x_t4_evt1[rip]
	mov	BYTE PTR t4_evt1[rip], al
	movzx	eax, BYTE PTR _x_controller_evt1[rip]
	mov	BYTE PTR controller_evt1[rip], al
	movss	xmm0, DWORD PTR _x_t5_x[rip]
	movss	DWORD PTR t5_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t4_l0[rip]
	mov	BYTE PTR t4_l0[rip], al
	movzx	eax, BYTE PTR _x_t4_l1[rip]
	mov	BYTE PTR t4_l1[rip], al
	movzx	eax, BYTE PTR _x_controller_l1[rip]
	mov	BYTE PTR controller_l1[rip], al
	movzx	eax, BYTE PTR _x_t5_evt0[rip]
	mov	BYTE PTR t5_evt0[rip], al
	movzx	eax, BYTE PTR _x_t5_evt1[rip]
	mov	BYTE PTR t5_evt1[rip], al
	movss	xmm0, DWORD PTR _x_t6_x[rip]
	movss	DWORD PTR t6_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t5_l0[rip]
	mov	BYTE PTR t5_l0[rip], al
	movzx	eax, BYTE PTR _x_t5_l1[rip]
	mov	BYTE PTR t5_l1[rip], al
	movzx	eax, BYTE PTR _x_t6_evt0[rip]
	mov	BYTE PTR t6_evt0[rip], al
	movzx	eax, BYTE PTR _x_t6_evt1[rip]
	mov	BYTE PTR t6_evt1[rip], al
	movss	xmm0, DWORD PTR _x_t7_x[rip]
	movss	DWORD PTR t7_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t6_l0[rip]
	mov	BYTE PTR t6_l0[rip], al
	movzx	eax, BYTE PTR _x_t6_l1[rip]
	mov	BYTE PTR t6_l1[rip], al
	movzx	eax, BYTE PTR _x_t7_evt0[rip]
	mov	BYTE PTR t7_evt0[rip], al
	movzx	eax, BYTE PTR _x_t7_evt1[rip]
	mov	BYTE PTR t7_evt1[rip], al
	movss	xmm0, DWORD PTR _x_t8_x[rip]
	movss	DWORD PTR t8_x[rip], xmm0
	movzx	eax, BYTE PTR _x_t7_l0[rip]
	mov	BYTE PTR t7_l0[rip], al
	movzx	eax, BYTE PTR _x_t7_l1[rip]
	mov	BYTE PTR t7_l1[rip], al
	movzx	eax, BYTE PTR _x_t8_evt0[rip]
	mov	BYTE PTR t8_evt0[rip], al
	movzx	eax, BYTE PTR _x_t8_l0[rip]
	mov	BYTE PTR t8_l0[rip], al
.L152:
	cmp	DWORD PTR -4[rbp], 0
	jne	.L580
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	main, .-main
	.section	.rodata
	.align 4
.LC1:
	.long	1084227584
	.align 4
.LC2:
	.long	1065353216
	.align 4
.LC3:
	.long	1073741824
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"225142471.c"
	.text
	.align	2
	.global	__VERIFIER_nondet_bool
	.syntax unified
	.arm
	.fpu softvfp
	.type	__VERIFIER_nondet_bool, %function
__VERIFIER_nondet_bool:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	pop	{fp, pc}
	.size	__VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
	.comm	t9_l1,1,1
	.comm	_x_t9_l1,1,1
	.comm	t9_l0,1,1
	.comm	_x_t9_l0,1,1
	.comm	t9_evt1,1,1
	.comm	_x_t9_evt1,1,1
	.comm	t9_evt0,1,1
	.comm	_x_t9_evt0,1,1
	.comm	t3_x,4,4
	.comm	_x_t3_x,4,4
	.comm	t2_evt1,1,1
	.comm	_x_t2_evt1,1,1
	.comm	t2_l1,1,1
	.comm	_x_t2_l1,1,1
	.comm	t2_x,4,4
	.comm	_x_t2_x,4,4
	.comm	delta,4,4
	.comm	_x_delta,4,4
	.comm	_diverge_delta,4,4
	.comm	_x__diverge_delta,4,4
	.comm	t1_evt1,1,1
	.comm	_x_t1_evt1,1,1
	.comm	t1_l0,1,1
	.comm	_x_t1_l0,1,1
	.comm	t0_l1,1,1
	.comm	_x_t0_l1,1,1
	.comm	t1_evt0,1,1
	.comm	_x_t1_evt0,1,1
	.comm	t0_l0,1,1
	.comm	_x_t0_l0,1,1
	.comm	t0_evt1,1,1
	.comm	_x_t0_evt1,1,1
	.comm	t1_x,4,4
	.comm	_x_t1_x,4,4
	.comm	t0_evt0,1,1
	.comm	_x_t0_evt0,1,1
	.comm	t0_x,4,4
	.comm	_x_t0_x,4,4
	.comm	gate_l0,1,1
	.comm	_x_gate_l0,1,1
	.comm	controller_l0,1,1
	.comm	_x_controller_l0,1,1
	.comm	t2_l0,1,1
	.comm	_x_t2_l0,1,1
	.comm	gate_l1,1,1
	.comm	_x_gate_l1,1,1
	.comm	gate_y,4,4
	.comm	_x_gate_y,4,4
	.comm	t1_l1,1,1
	.comm	_x_t1_l1,1,1
	.comm	t2_evt0,1,1
	.comm	_x_t2_evt0,1,1
	.comm	gate_evt0,1,1
	.comm	_x_gate_evt0,1,1
	.comm	controller_evt0,1,1
	.comm	_x_controller_evt0,1,1
	.comm	t8_evt1,1,1
	.comm	_x_t8_evt1,1,1
	.comm	t9_x,4,4
	.comm	_x_t9_x,4,4
	.comm	gate_evt1,1,1
	.comm	_x_gate_evt1,1,1
	.comm	t8_l1,1,1
	.comm	_x_t8_l1,1,1
	.comm	controller_z,4,4
	.comm	_x_controller_z,4,4
	.comm	controller_evt2,1,1
	.comm	_x_controller_evt2,1,1
	.comm	t3_evt0,1,1
	.comm	_x_t3_evt0,1,1
	.comm	controller_cnt,4,4
	.comm	_x_controller_cnt,4,4
	.comm	t3_evt1,1,1
	.comm	_x_t3_evt1,1,1
	.comm	t4_x,4,4
	.comm	_x_t4_x,4,4
	.comm	t3_l0,1,1
	.comm	_x_t3_l0,1,1
	.comm	t3_l1,1,1
	.comm	_x_t3_l1,1,1
	.comm	t4_evt0,1,1
	.comm	_x_t4_evt0,1,1
	.comm	t4_evt1,1,1
	.comm	_x_t4_evt1,1,1
	.comm	controller_evt1,1,1
	.comm	_x_controller_evt1,1,1
	.comm	t5_x,4,4
	.comm	_x_t5_x,4,4
	.comm	t4_l0,1,1
	.comm	_x_t4_l0,1,1
	.comm	t4_l1,1,1
	.comm	_x_t4_l1,1,1
	.comm	controller_l1,1,1
	.comm	_x_controller_l1,1,1
	.comm	t5_evt0,1,1
	.comm	_x_t5_evt0,1,1
	.comm	t5_evt1,1,1
	.comm	_x_t5_evt1,1,1
	.comm	t6_x,4,4
	.comm	_x_t6_x,4,4
	.comm	t5_l0,1,1
	.comm	_x_t5_l0,1,1
	.comm	t5_l1,1,1
	.comm	_x_t5_l1,1,1
	.comm	t6_evt0,1,1
	.comm	_x_t6_evt0,1,1
	.comm	t6_evt1,1,1
	.comm	_x_t6_evt1,1,1
	.comm	t7_x,4,4
	.comm	_x_t7_x,4,4
	.comm	t6_l0,1,1
	.comm	_x_t6_l0,1,1
	.comm	t6_l1,1,1
	.comm	_x_t6_l1,1,1
	.comm	t7_evt0,1,1
	.comm	_x_t7_evt0,1,1
	.comm	t7_evt1,1,1
	.comm	_x_t7_evt1,1,1
	.comm	t8_x,4,4
	.comm	_x_t8_x,4,4
	.comm	t7_l0,1,1
	.comm	_x_t7_l0,1,1
	.comm	t7_l1,1,1
	.comm	_x_t7_l1,1,1
	.comm	t8_evt0,1,1
	.comm	_x_t8_evt0,1,1
	.comm	t8_l0,1,1
	.comm	_x_t8_l0,1,1
	.global	__aeabi_fcmpeq
	.global	__aeabi_fcmple
	.global	__aeabi_fcmpge
	.global	__aeabi_f2d
	.global	__aeabi_dsub
	.global	__aeabi_dadd
	.global	__aeabi_dcmpeq
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #8
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+4
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+8
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+12
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L600+16
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+20
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+24
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L600+28
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L600+32
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L600+36
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+40
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+44
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+48
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+52
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+56
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+60
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L600+220
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+224
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L600+240
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+284
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+264
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+192
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+288
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L600+280
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+216
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+184
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+272
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+248
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+64
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L600+68
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+276
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+72
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L600+260
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+244
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+76
	strb	r2, [r3]
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L600+256
	str	r3, [r2]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+80
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L600+84
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+88
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+92
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+96
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+100
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+252
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L600+104
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+108
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+112
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+268
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+116
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+120
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L600+124
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+128
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+132
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+136
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+140
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L600+144
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+148
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+152
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+156
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+160
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L600+164
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+168
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+172
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+176
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+180
	strb	r2, [r3]
	ldr	r3, .L600+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L600
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L600+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L6
	ldr	r3, .L600
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L6:
	ldr	r3, .L600+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L600
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L8:
	ldr	r3, .L600
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L9
	ldr	r3, .L600+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L9:
	ldr	r3, .L600+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L7:
	ldr	r3, .L600+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L10
	ldr	r3, .L600+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L11
.L10:
	ldr	r3, .L600+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L12
	ldr	r3, .L600+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L11
.L12:
	ldr	r3, .L600+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L600+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L11
.L13:
	ldr	r3, .L600+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L11:
	ldr	r3, .L600+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L14
	ldr	r3, .L600
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L15
.L14:
	ldr	r3, .L600+68
	ldr	r3, [r3]	@ float
	ldr	r1, .L600+540
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L15:
	ldr	r3, .L600+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L600+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L600+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L18
	ldr	r3, .L600+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L19
.L18:
	ldr	r3, .L600+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L20
	ldr	r3, .L600+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L19
.L20:
	ldr	r3, .L600+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L21
	ldr	r3, .L600+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L19
.L21:
	ldr	r3, .L600+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L19:
	ldr	r3, .L600+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L22
	ldr	r3, .L600+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L23
.L22:
	ldr	r3, .L600+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L24
	ldr	r3, .L600+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L23
.L24:
	ldr	r3, .L600+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L25
	ldr	r3, .L600+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L23
.L25:
	ldr	r3, .L600+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L23:
	ldr	r3, .L600+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L26
	ldr	r3, .L600+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L27
.L26:
	ldr	r3, .L600+164
	ldr	r3, [r3]	@ float
	ldr	r1, .L600+540
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L27:
	ldr	r3, .L600+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L600+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L600+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L30
	ldr	r3, .L600+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L31
.L30:
	ldr	r3, .L600+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L32
	ldr	r3, .L600+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L31
.L32:
	ldr	r3, .L600+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L33
	ldr	r3, .L600+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L31
.L33:
	ldr	r3, .L600+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L31:
	ldr	r3, .L600+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L34
	ldr	r3, .L600+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L35
.L34:
	ldr	r3, .L600+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L36
	ldr	r3, .L600+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L35
.L36:
	ldr	r3, .L600+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L37
	ldr	r3, .L600+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L35
.L37:
	ldr	r3, .L600+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L35:
	ldr	r3, .L600+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L38
	ldr	r3, .L600+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L39
.L38:
	ldr	r3, .L600+144
	ldr	r3, [r3]	@ float
	ldr	r1, .L600+540
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L39:
	ldr	r3, .L600+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L600+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L600+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L42
	ldr	r3, .L600+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L43
.L42:
	ldr	r3, .L600+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L44
	ldr	r3, .L600+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L43
.L44:
	ldr	r3, .L600+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L45
	ldr	r3, .L600+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L43
.L45:
	ldr	r3, .L600+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L43:
	ldr	r3, .L600+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L46
	ldr	r3, .L600+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L47
.L46:
	ldr	r3, .L600+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L48
	ldr	r3, .L600+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L47
.L48:
	ldr	r3, .L600+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L49
	ldr	r3, .L600+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L47
.L49:
	ldr	r3, .L600+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L47:
	ldr	r3, .L600+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L50
	ldr	r3, .L600+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L51
.L50:
	ldr	r3, .L600+124
	ldr	r3, [r3]	@ float
	ldr	r1, .L600+540
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L51:
	ldr	r3, .L600+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L600+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L600+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L54
	ldr	r3, .L600+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L55
.L54:
	ldr	r3, .L600+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L56
	ldr	r3, .L600+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L55
.L56:
	ldr	r3, .L600+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L57
	ldr	r3, .L600+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L55
.L57:
	ldr	r3, .L600+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L55:
	ldr	r3, .L600+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L58
	ldr	r3, .L600+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L59
.L58:
	ldr	r3, .L600+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L60
	ldr	r3, .L600+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L59
.L60:
	ldr	r3, .L600+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L61
	ldr	r3, .L600+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L59
.L61:
	ldr	r3, .L600+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L59:
	ldr	r3, .L600+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L62
	ldr	r3, .L600+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L63
.L62:
	ldr	r3, .L600+104
	ldr	r3, [r3]	@ float
	ldr	r1, .L600+540
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L63:
	ldr	r3, .L600+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L600+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L600+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L66
	ldr	r3, .L600+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L67
.L66:
	ldr	r3, .L600+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L68
	ldr	r3, .L600+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L67
.L68:
	ldr	r3, .L600+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L69
	ldr	r3, .L600+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L67
.L69:
	ldr	r3, .L600+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L67:
	ldr	r3, .L600+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L70
	ldr	r3, .L600+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L71
.L70:
	ldr	r3, .L600+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L72
	ldr	r3, .L600+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L71
.L72:
	ldr	r3, .L600+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L73
	ldr	r3, .L600+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L71
.L73:
	ldr	r3, .L600+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L71:
	ldr	r3, .L600+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L74
	ldr	r3, .L600+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L75
.L74:
	ldr	r3, .L600+84
	ldr	r3, [r3]	@ float
	ldr	r1, .L600+540
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L75:
	ldr	r3, .L600+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L600+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L600+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L78
	ldr	r3, .L600+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L79
.L78:
	ldr	r3, .L600+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L80
	ldr	r3, .L600+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L79
.L80:
	ldr	r3, .L600+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L81
	ldr	r3, .L600+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L79
.L81:
	ldr	r3, .L600+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L79:
	ldr	r3, .L600+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L82
	ldr	r3, .L600+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L83
.L82:
	ldr	r3, .L600+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L84
	ldr	r3, .L600+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L83
.L84:
	ldr	r3, .L600+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L85
	ldr	r3, .L600+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L83
.L85:
	ldr	r3, .L600+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L83:
	ldr	r3, .L600+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L86
	ldr	r3, .L600+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L87
.L86:
	ldr	r3, .L600+16
	ldr	r3, [r3]	@ float
	ldr	r1, .L600+540
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L87:
	ldr	r3, .L600+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L600+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L600+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L90
	ldr	r3, .L600+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L90:
	ldr	r3, .L600+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L92
	ldr	r3, .L600+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L92:
	ldr	r3, .L600+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L93
	ldr	r3, .L600+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L93:
	ldr	r3, .L600+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	b	.L601
.L602:
	.align	2
.L600:
	.word	t9_l1
	.word	t9_l0
	.word	t9_evt1
	.word	t9_evt0
	.word	t3_x
	.word	t2_evt1
	.word	t2_l1
	.word	t2_x
	.word	delta
	.word	_diverge_delta
	.word	t1_evt1
	.word	t1_l0
	.word	t0_l1
	.word	t1_evt0
	.word	t0_l0
	.word	t0_evt1
	.word	t8_evt1
	.word	t9_x
	.word	t8_l1
	.word	t3_evt0
	.word	t3_evt1
	.word	t4_x
	.word	t3_l0
	.word	t3_l1
	.word	t4_evt0
	.word	t4_evt1
	.word	t5_x
	.word	t4_l0
	.word	t4_l1
	.word	t5_evt0
	.word	t5_evt1
	.word	t6_x
	.word	t5_l0
	.word	t5_l1
	.word	t6_evt0
	.word	t6_evt1
	.word	t7_x
	.word	t6_l0
	.word	t6_l1
	.word	t7_evt0
	.word	t7_evt1
	.word	t8_x
	.word	t7_l0
	.word	t7_l1
	.word	t8_evt0
	.word	t8_l0
	.word	t2_evt0
	.word	t2_evt1
	.word	t2_l0
	.word	t2_l1
	.word	t2_x
	.word	t1_evt0
	.word	t1_evt1
	.word	t1_l0
	.word	t1_l1
	.word	t1_x
	.word	t0_evt0
	.word	t0_evt1
	.word	t0_l0
	.word	t0_l1
	.word	t0_x
	.word	controller_evt2
	.word	controller_evt0
	.word	controller_evt1
	.word	controller_cnt
	.word	controller_z
	.word	controller_l0
	.word	controller_l1
	.word	gate_evt0
	.word	gate_evt1
	.word	gate_y
	.word	gate_l0
	.word	gate_l1
	.word	_diverge_delta
	.word	_x_t3_x
	.word	_x_t2_evt1
	.word	_x_t2_l1
	.word	_x_t2_x
	.word	_x_delta
	.word	_x__diverge_delta
	.word	_x_t1_evt1
	.word	_x_t1_l0
	.word	_x_t0_l1
	.word	_x_t1_evt0
	.word	_x_t0_l0
	.word	_x_t0_evt1
	.word	_x_t1_x
	.word	_x_t0_evt0
	.word	_x_t0_x
	.word	_x_gate_l0
	.word	_x_controller_l0
	.word	_x_t2_l0
	.word	_x_gate_l1
	.word	_x_gate_y
	.word	_x_t1_l1
	.word	_x_t2_evt0
	.word	_x_gate_evt0
	.word	_x_controller_evt0
	.word	_x_t8_evt1
	.word	_x_gate_evt1
	.word	_x_t8_l1
	.word	_x_controller_z
	.word	_x_controller_evt2
	.word	_x_t3_evt0
	.word	_x_controller_cnt
	.word	_x_t3_evt1
	.word	_x_t4_x
	.word	_x_t3_l0
	.word	_x_t3_l1
	.word	_x_t4_evt0
	.word	_x_t4_evt1
	.word	_x_controller_evt1
	.word	_x_t5_x
	.word	_x_t4_l0
	.word	_x_t4_l1
	.word	_x_controller_l1
	.word	_x_t5_evt0
	.word	_x_t5_evt1
	.word	_x_t6_x
	.word	_x_t5_l0
	.word	_x_t5_l1
	.word	_x_t6_evt0
	.word	_x_t6_evt1
	.word	_x_t7_x
	.word	_x_t6_l0
	.word	_x_t6_l1
	.word	_x_t7_evt0
	.word	_x_t7_evt1
	.word	_x_t8_x
	.word	_x_t7_l0
	.word	_x_t7_l1
	.word	_x_t8_evt0
	.word	_x_t8_l0
	.word	_x_t9_evt0
	.word	_x_t9_evt1
	.word	1084227584
	.word	t9_l0
	.word	_x_t9_l0
	.word	t9_l1
	.word	_x_t9_l1
	.word	t9_x
	.word	_x_t9_x
	.word	delta
	.word	t9_evt0
	.word	t9_evt1
.L601:
.L91:
	ldr	r3, .L600+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L94
	ldr	r3, .L600+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L95
.L94:
	ldr	r3, .L600+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L96
	ldr	r3, .L600+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L95
.L96:
	ldr	r3, .L600+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L97
	ldr	r3, .L600+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L95
.L97:
	ldr	r3, .L600+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L95:
	ldr	r3, .L600+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L98
	ldr	r3, .L600+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L99
.L98:
	ldr	r3, .L600+200
	ldr	r3, [r3]	@ float
	ldr	r1, .L600+540
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L99:
	ldr	r3, .L600+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L600+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L600+220
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L102
	ldr	r3, .L600+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L103
.L102:
	ldr	r3, .L600+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L104
	ldr	r3, .L600+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L103
.L104:
	ldr	r3, .L600+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L105
	ldr	r3, .L600+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L103
.L105:
	ldr	r3, .L600+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L103:
	ldr	r3, .L600+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L106
	ldr	r3, .L600+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L107
.L106:
	ldr	r3, .L600+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L108
	ldr	r3, .L600+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L107
.L108:
	ldr	r3, .L600+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L109
	ldr	r3, .L600+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L107
.L109:
	ldr	r3, .L600+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L107:
	ldr	r3, .L600+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L110
	ldr	r3, .L600+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L111
.L110:
	ldr	r3, .L600+220
	ldr	r3, [r3]	@ float
	ldr	r1, .L600+540
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L111:
	ldr	r3, .L600+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L600+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L600+240
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L114
	ldr	r3, .L600+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L115
.L114:
	ldr	r3, .L600+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L116
	ldr	r3, .L600+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L115
.L116:
	ldr	r3, .L600+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L600+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L115
.L117:
	ldr	r3, .L600+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L115:
	ldr	r3, .L600+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L118
	ldr	r3, .L600+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L119
.L118:
	ldr	r3, .L600+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L120
	ldr	r3, .L600+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L119
.L120:
	ldr	r3, .L600+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L121
	ldr	r3, .L600+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L119
.L121:
	ldr	r3, .L600+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L119:
	ldr	r3, .L600+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L122
	ldr	r3, .L600+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L123
.L122:
	ldr	r3, .L600+240
	ldr	r3, [r3]	@ float
	ldr	r1, .L600+540
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
.L123:
	ldr	r3, .L600+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L600+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L600+260
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L126
	ldr	r3, .L600+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L127
.L126:
	ldr	r3, .L600+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L128
	ldr	r3, .L600+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L127
.L128:
	ldr	r3, .L600+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L129
	ldr	r3, .L600+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L127
.L129:
	ldr	r3, .L600+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L127:
	ldr	r3, .L600+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L130
	ldr	r3, .L600+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L130
	ldr	r3, .L600+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L131
.L130:
	ldr	r3, .L600+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L132
	ldr	r3, .L600+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L132
	ldr	r3, .L600+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L131
.L132:
	ldr	r3, .L600+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L133
	ldr	r3, .L600+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L133
	ldr	r3, .L600+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L131
.L133:
	ldr	r3, .L600+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L134
	ldr	r3, .L600+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L134
	ldr	r3, .L600+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L131
.L134:
	ldr	r3, .L600+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L600+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L131:
	ldr	r3, .L600+256
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L135
	ldr	r3, .L600+256
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L135
	ldr	r3, .L600+256
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L135
	ldr	r3, .L600+256
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L135
	ldr	r3, .L600+256
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L135
	ldr	r3, .L600+256
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L135
	ldr	r3, .L600+256
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L135
	ldr	r3, .L600+256
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L135
	ldr	r3, .L600+256
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L135
	ldr	r3, .L600+256
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L135
	ldr	r3, .L600+256
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L135
	ldr	r3, .L600+256
	ldr	r3, [r3]
	cmp	r3, #11
	bne	.L4
.L135:
	ldr	r3, .L600+260
	ldr	r3, [r3]	@ float
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L136
	ldr	r3, .L600+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L137
	ldr	r3, .L600+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L137:
	ldr	r3, .L600+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L136
	ldr	r3, .L600+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L136:
	ldr	r3, .L600+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L600+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L600+280
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L139
	ldr	r3, .L600+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L140
.L139:
	ldr	r3, .L600+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L141
	ldr	r3, .L600+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L140
.L141:
	ldr	r3, .L600+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L142
	ldr	r3, .L600+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L140
.L142:
	ldr	r3, .L600+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L140:
	ldr	r3, .L600+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L143
	ldr	r3, .L600+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L144
.L143:
	ldr	r3, .L600+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L145
	ldr	r3, .L600+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L144
.L145:
	ldr	r3, .L600+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L146
	ldr	r3, .L600+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L144
.L146:
	ldr	r3, .L600+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L144:
	ldr	r3, .L600+280
	ldr	r3, [r3]	@ float
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L147
	ldr	r3, .L600+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L147
	ldr	r3, .L600+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L147:
	ldr	r3, .L600+280
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L148
	ldr	r3, .L600+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L148
	ldr	r3, .L600+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L148:
	ldr	r3, .L600+568
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L600+568
	ldr	r3, [r3]	@ float
	ldr	r2, .L600+292
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	mov	r3, #1
	b	.L151
.L4:
	mov	r3, #0
.L151:
	str	r3, [fp, #-24]
	b	.L152
.L544:
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+556
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+548
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+536
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+532
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L600+296
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+300
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+304
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L600+308
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L600+312
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L600+316
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+320
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+324
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+328
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+332
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+336
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+340
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L600+344
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+348
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L600+352
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+356
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+360
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+364
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+368
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L600+372
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+376
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+380
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+384
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+388
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+392
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L600+564
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+396
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+400
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L600+404
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+408
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+412
	strb	r2, [r3]
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L600+416
	str	r3, [r2]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+420
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L600+424
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+428
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+432
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+436
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+440
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+444
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L600+448
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+452
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+456
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+460
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+464
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+468
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L600+472
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+476
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+480
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+484
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+488
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L600+492
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+496
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+500
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+504
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+508
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L600+512
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+516
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+520
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+524
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L600+528
	strb	r2, [r3]
	ldr	r3, .L600+548
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L153
	ldr	r3, .L600+556
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L154
.L153:
	ldr	r3, .L600+548
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L155
	ldr	r3, .L600+556
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L154
.L155:
	ldr	r3, .L600+556
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L156
	ldr	r3, .L600+548
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L154
.L156:
	ldr	r3, .L600+548
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L600+556
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L154:
	ldr	r3, .L600+532
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L158
	ldr	r3, .L600+536
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L158:
	ldr	r3, .L600+532
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L160
	ldr	r3, .L600+536
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L160:
	ldr	r3, .L600+536
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L161
	ldr	r3, .L600+532
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L161:
	ldr	r3, .L600+532
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L600+536
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L159:
	ldr	r3, .L600+548
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L162
	ldr	r3, .L600+556
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L163
.L162:
	ldr	r3, .L600+564
	ldr	r3, [r3]	@ float
	ldr	r1, .L600+540
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L157
.L163:
	ldr	r3, .L600+544
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L600+548
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L165
	ldr	r3, .L600+552
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L600+556
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L165
	ldr	r3, .L600+568
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L600+560
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L600+564
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L166
.L165:
	ldr	r3, .L600+568
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L600+572
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L166
	ldr	r3, .L600+576
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L166:
	ldr	r3, .L603
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L168
	ldr	r3, .L603+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L168
	ldr	r3, .L603+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L168
	ldr	r3, .L603+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L168
	ldr	r3, .L603+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L169
.L168:
	ldr	r3, .L603+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L169
	ldr	r3, .L603+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L169
	ldr	r3, .L603+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L169
	ldr	r3, .L603+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L603+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L169:
	ldr	r3, .L603+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L170
	ldr	r3, .L603
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L170
	ldr	r3, .L603+32
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L171
	mov	r3, #0
	mov	r4, r3
.L171:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L170
	ldr	r3, .L603+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L170
	ldr	r3, .L603+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L170
	ldr	r3, .L603+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L603+16
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L172
.L170:
	ldr	r3, .L603+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L172
	ldr	r3, .L603+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L172
	ldr	r3, .L603+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L172
	ldr	r3, .L603+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L603+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L172:
	ldr	r3, .L603+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L603+16
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L173
	ldr	r3, .L603
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L173
	ldr	r3, .L603+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L173
	ldr	r3, .L603+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L173
	ldr	r3, .L603+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L175
.L173:
	ldr	r3, .L603+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L175
	ldr	r3, .L603+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L175
	ldr	r3, .L603+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L175
	ldr	r3, .L603+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L603+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L175:
	ldr	r3, .L603
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L176
	ldr	r3, .L603+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L176
	ldr	r3, .L603+32
	ldr	r3, [r3]	@ float
	ldr	r1, .L603+204
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L176
	ldr	r3, .L603+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L176
	ldr	r3, .L603+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L176
	ldr	r3, .L603+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L603+16
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L178
.L176:
	ldr	r3, .L603+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L178
	ldr	r3, .L603+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L178
	ldr	r3, .L603+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L178
	ldr	r3, .L603+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L603+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L178:
	ldr	r3, .L603+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L179
	ldr	r3, .L603+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L180
.L179:
	ldr	r3, .L603+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L181
	ldr	r3, .L603+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L180
.L181:
	ldr	r3, .L603+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L182
	ldr	r3, .L603+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L180
.L182:
	ldr	r3, .L603+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L603+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L180:
	ldr	r3, .L603+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L183
	ldr	r3, .L603+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L184
.L183:
	ldr	r3, .L603+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L185
	ldr	r3, .L603+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L184
.L185:
	ldr	r3, .L603+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L186
	ldr	r3, .L603+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L184
.L186:
	ldr	r3, .L603+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L603+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L184:
	ldr	r3, .L603+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L187
	ldr	r3, .L603+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L188
.L187:
	ldr	r3, .L603+52
	ldr	r3, [r3]	@ float
	ldr	r1, .L603+204
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L157
.L188:
	ldr	r3, .L603+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L603+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L190
	ldr	r3, .L603+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L603+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L190
	ldr	r3, .L603+28
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L603+64
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L603+52
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L191
.L190:
	ldr	r3, .L603+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L603+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L191
	ldr	r3, .L603+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L191:
	ldr	r3, .L603+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L193
	ldr	r3, .L603+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L193
	ldr	r3, .L603+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L193
	ldr	r3, .L603+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L193
	ldr	r3, .L603+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L194
.L193:
	ldr	r3, .L603+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L194
	ldr	r3, .L603+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L194
	ldr	r3, .L603+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L194
	ldr	r3, .L603+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L603+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L194:
	ldr	r3, .L603+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L195
	ldr	r3, .L603+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L195
	ldr	r3, .L603+64
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L196
	mov	r3, #0
	mov	r4, r3
.L196:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L195
	ldr	r3, .L603+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L195
	ldr	r3, .L603+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L195
	ldr	r3, .L603+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L603+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L197
.L195:
	ldr	r3, .L603+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L197
	ldr	r3, .L603+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L197
	ldr	r3, .L603+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L197
	ldr	r3, .L603+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L603+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L197:
	ldr	r3, .L603+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L603+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L198
	ldr	r3, .L603+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L198
	ldr	r3, .L603+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L198
	ldr	r3, .L603+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L198
	ldr	r3, .L603+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L200
.L198:
	ldr	r3, .L603+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L200
	ldr	r3, .L603+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L200
	ldr	r3, .L603+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L200
	ldr	r3, .L603+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L603+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L200:
	ldr	r3, .L603+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L201
	ldr	r3, .L603+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L201
	ldr	r3, .L603+64
	ldr	r3, [r3]	@ float
	ldr	r1, .L603+204
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L201
	ldr	r3, .L603+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L201
	ldr	r3, .L603+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L201
	ldr	r3, .L603+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L603+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L203
.L201:
	ldr	r3, .L603+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L203
	ldr	r3, .L603+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L203
	ldr	r3, .L603+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L203
	ldr	r3, .L603+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L603+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L203:
	ldr	r3, .L603+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L204
	ldr	r3, .L603+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L205
.L204:
	ldr	r3, .L603+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L206
	ldr	r3, .L603+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L205
.L206:
	ldr	r3, .L603+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L603+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L205
.L207:
	ldr	r3, .L603+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L603+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L205:
	ldr	r3, .L603+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L208
	ldr	r3, .L603+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L209
.L208:
	ldr	r3, .L603+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L210
	ldr	r3, .L603+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L209
.L210:
	ldr	r3, .L603+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L211
	ldr	r3, .L603+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L209
.L211:
	ldr	r3, .L603+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L603+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L209:
	ldr	r3, .L603+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L212
	ldr	r3, .L603+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L213
.L212:
	ldr	r3, .L603+92
	ldr	r3, [r3]	@ float
	ldr	r1, .L603+204
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L157
.L213:
	ldr	r3, .L603+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L603+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L215
	ldr	r3, .L603+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L603+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L215
	ldr	r3, .L603+28
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L603+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L603+92
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L216
.L215:
	ldr	r3, .L603+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L603+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L216
	ldr	r3, .L603+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L216:
	ldr	r3, .L603+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L218
	ldr	r3, .L603+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L218
	ldr	r3, .L603+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L218
	ldr	r3, .L603+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L218
	ldr	r3, .L603+92
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L219
.L218:
	ldr	r3, .L603+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L219
	ldr	r3, .L603+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L219
	ldr	r3, .L603+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L219
	ldr	r3, .L603+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L603+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L219:
	ldr	r3, .L603+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L220
	ldr	r3, .L603+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L220
	ldr	r3, .L603+104
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L221
	mov	r3, #0
	mov	r4, r3
.L221:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L220
	ldr	r3, .L603+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L220
	ldr	r3, .L603+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L220
	ldr	r3, .L603+104
	ldr	r3, [r3]	@ float
	ldr	r2, .L603+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L222
.L220:
	ldr	r3, .L603+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L222
	ldr	r3, .L603+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L222
	ldr	r3, .L603+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L222
	ldr	r3, .L603+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L603+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L222:
	ldr	r3, .L603+104
	ldr	r3, [r3]	@ float
	ldr	r2, .L603+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L223
	ldr	r3, .L603+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L223
	ldr	r3, .L603+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L223
	ldr	r3, .L603+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L223
	ldr	r3, .L603+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L225
.L223:
	ldr	r3, .L603+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L225
	ldr	r3, .L603+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L225
	ldr	r3, .L603+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L225
	ldr	r3, .L603+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L603+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L225:
	ldr	r3, .L603+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L226
	ldr	r3, .L603+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L226
	ldr	r3, .L603+104
	ldr	r3, [r3]	@ float
	ldr	r1, .L603+204
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L226
	ldr	r3, .L603+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L226
	ldr	r3, .L603+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L226
	ldr	r3, .L603+104
	ldr	r3, [r3]	@ float
	ldr	r2, .L603+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L228
.L226:
	ldr	r3, .L603+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L228
	ldr	r3, .L603+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L228
	ldr	r3, .L603+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L228
	ldr	r3, .L603+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L603+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L228:
	ldr	r3, .L603+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L603+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L230
.L229:
	ldr	r3, .L603+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L231
	ldr	r3, .L603+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L230
.L231:
	ldr	r3, .L603+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L232
	ldr	r3, .L603+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L230
.L232:
	ldr	r3, .L603+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	b	.L604
.L605:
	.align	2
.L603:
	.word	_x_t9_l0
	.word	_x_t9_l1
	.word	t9_evt0
	.word	t9_evt1
	.word	_x_t9_x
	.word	t9_l0
	.word	t9_l1
	.word	delta
	.word	t9_x
	.word	_x_t8_l0
	.word	_x_t8_l1
	.word	_x_t8_evt0
	.word	_x_t8_evt1
	.word	_x_t8_x
	.word	t8_l0
	.word	t8_l1
	.word	t8_x
	.word	t8_evt0
	.word	t8_evt1
	.word	_x_t7_l0
	.word	_x_t7_l1
	.word	_x_t7_evt0
	.word	_x_t7_evt1
	.word	_x_t7_x
	.word	t7_l0
	.word	t7_l1
	.word	t7_x
	.word	t7_evt0
	.word	t7_evt1
	.word	_x_t6_evt0
	.word	_x_t6_evt1
	.word	_x_t6_l0
	.word	_x_t6_l1
	.word	t6_x
	.word	_x_t6_x
	.word	t6_l0
	.word	t6_l1
	.word	t6_evt0
	.word	t6_evt1
	.word	_x_t5_evt0
	.word	_x_t5_evt1
	.word	_x_t5_l0
	.word	_x_t5_l1
	.word	t5_x
	.word	_x_t5_x
	.word	t5_l0
	.word	t5_l1
	.word	t5_evt0
	.word	t5_evt1
	.word	_x_t4_evt0
	.word	_x_t4_evt1
	.word	1084227584
	.word	_x_t4_l1
	.word	_x_t4_l0
	.word	t4_evt1
	.word	t4_x
	.word	_x_t4_x
	.word	t4_l0
	.word	t4_l1
	.word	delta
	.word	t4_evt0
.L604:
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L603+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L230:
	ldr	r3, .L603+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L233
	ldr	r3, .L603+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L234
.L233:
	ldr	r3, .L603+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L235
	ldr	r3, .L603+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L234
.L235:
	ldr	r3, .L603+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L236
	ldr	r3, .L603+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L234
.L236:
	ldr	r3, .L603+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L603+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L234:
	ldr	r3, .L603+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L237
	ldr	r3, .L603+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L238
.L237:
	ldr	r3, .L603+136
	ldr	r3, [r3]	@ float
	ldr	r1, .L603+204
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L157
.L238:
	ldr	r3, .L603+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L603+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L240
	ldr	r3, .L603+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L603+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L240
	ldr	r3, .L603+236
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L603+132
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L603+136
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L241
.L240:
	ldr	r3, .L603+236
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L603+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L241
	ldr	r3, .L603+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L241:
	ldr	r3, .L603+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L243
	ldr	r3, .L603+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L243
	ldr	r3, .L603+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L243
	ldr	r3, .L603+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L243
	ldr	r3, .L603+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L244
.L243:
	ldr	r3, .L603+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L244
	ldr	r3, .L603+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L244
	ldr	r3, .L603+236
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L244
	ldr	r3, .L603+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L603+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L244:
	ldr	r3, .L603+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L245
	ldr	r3, .L603+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L245
	ldr	r3, .L603+132
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L246
	mov	r3, #0
	mov	r4, r3
.L246:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L245
	ldr	r3, .L603+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L245
	ldr	r3, .L603+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L245
	ldr	r3, .L603+132
	ldr	r3, [r3]	@ float
	ldr	r2, .L603+136
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L247
.L245:
	ldr	r3, .L603+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L247
	ldr	r3, .L603+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L247
	ldr	r3, .L603+236
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L247
	ldr	r3, .L603+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L603+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L247:
	ldr	r3, .L603+132
	ldr	r3, [r3]	@ float
	ldr	r2, .L603+136
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L248
	ldr	r3, .L603+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L248
	ldr	r3, .L603+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L248
	ldr	r3, .L603+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L248
	ldr	r3, .L603+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L250
.L248:
	ldr	r3, .L603+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L250
	ldr	r3, .L603+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L250
	ldr	r3, .L603+236
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L250
	ldr	r3, .L603+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L603+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L250:
	ldr	r3, .L603+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L251
	ldr	r3, .L603+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L251
	ldr	r3, .L603+132
	ldr	r3, [r3]	@ float
	ldr	r1, .L603+204
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L251
	ldr	r3, .L603+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L251
	ldr	r3, .L603+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L251
	ldr	r3, .L603+132
	ldr	r3, [r3]	@ float
	ldr	r2, .L603+136
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L253
.L251:
	ldr	r3, .L603+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L253
	ldr	r3, .L603+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L253
	ldr	r3, .L603+236
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L253
	ldr	r3, .L603+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L603+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L253:
	ldr	r3, .L603+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L254
	ldr	r3, .L603+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L255
.L254:
	ldr	r3, .L603+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L256
	ldr	r3, .L603+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L255
.L256:
	ldr	r3, .L603+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L603+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L255
.L257:
	ldr	r3, .L603+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L603+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L255:
	ldr	r3, .L603+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L258
	ldr	r3, .L603+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L259
.L258:
	ldr	r3, .L603+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L260
	ldr	r3, .L603+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L259
.L260:
	ldr	r3, .L603+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L261
	ldr	r3, .L603+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L259
.L261:
	ldr	r3, .L603+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L603+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L259:
	ldr	r3, .L603+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L262
	ldr	r3, .L603+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L263
.L262:
	ldr	r3, .L603+176
	ldr	r3, [r3]	@ float
	ldr	r1, .L603+204
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L157
.L263:
	ldr	r3, .L603+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L603+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L265
	ldr	r3, .L603+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L603+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L265
	ldr	r3, .L603+236
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L603+172
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L603+176
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L266
.L265:
	ldr	r3, .L603+236
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L603+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L266
	ldr	r3, .L603+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L266:
	ldr	r3, .L603+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L268
	ldr	r3, .L603+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L268
	ldr	r3, .L603+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L268
	ldr	r3, .L603+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L268
	ldr	r3, .L603+176
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L269
.L268:
	ldr	r3, .L603+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L269
	ldr	r3, .L603+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L269
	ldr	r3, .L603+236
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L269
	ldr	r3, .L603+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L603+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L269:
	ldr	r3, .L603+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L270
	ldr	r3, .L603+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L270
	ldr	r3, .L603+172
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L271
	mov	r3, #0
	mov	r4, r3
.L271:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L270
	ldr	r3, .L603+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L270
	ldr	r3, .L603+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L270
	ldr	r3, .L603+172
	ldr	r3, [r3]	@ float
	ldr	r2, .L603+176
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L272
.L270:
	ldr	r3, .L603+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L272
	ldr	r3, .L603+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L272
	ldr	r3, .L603+236
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L272
	ldr	r3, .L603+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L603+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L272:
	ldr	r3, .L603+172
	ldr	r3, [r3]	@ float
	ldr	r2, .L603+176
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L273
	ldr	r3, .L603+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L273
	ldr	r3, .L603+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L273
	ldr	r3, .L603+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L273
	ldr	r3, .L603+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L275
.L273:
	ldr	r3, .L603+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L275
	ldr	r3, .L603+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L275
	ldr	r3, .L603+236
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L275
	ldr	r3, .L603+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L603+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L275:
	ldr	r3, .L603+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L276
	ldr	r3, .L603+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L276
	ldr	r3, .L603+172
	ldr	r3, [r3]	@ float
	ldr	r1, .L603+204
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L276
	ldr	r3, .L603+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L276
	ldr	r3, .L603+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L276
	ldr	r3, .L603+172
	ldr	r3, [r3]	@ float
	ldr	r2, .L603+176
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L278
.L276:
	ldr	r3, .L603+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L278
	ldr	r3, .L603+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L278
	ldr	r3, .L603+236
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L278
	ldr	r3, .L603+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L603+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L278:
	ldr	r3, .L603+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L279
	ldr	r3, .L603+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L280
.L279:
	ldr	r3, .L603+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L281
	ldr	r3, .L603+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L280
.L281:
	ldr	r3, .L603+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L282
	ldr	r3, .L603+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L280
.L282:
	ldr	r3, .L603+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L603+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L280:
	ldr	r3, .L603+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L283
	ldr	r3, .L603+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L284
.L283:
	ldr	r3, .L603+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L285
	ldr	r3, .L603+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L284
.L285:
	ldr	r3, .L603+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L286
	ldr	r3, .L603+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L284
.L286:
	ldr	r3, .L603+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L603+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L284:
	ldr	r3, .L603+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L287
	ldr	r3, .L603+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L288
.L287:
	ldr	r3, .L603+224
	ldr	r3, [r3]	@ float
	ldr	r1, .L603+204
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L157
.L288:
	ldr	r3, .L603+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L603+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L290
	ldr	r3, .L603+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L603+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L290
	ldr	r3, .L603+236
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L603+220
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L603+224
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L291
.L290:
	ldr	r3, .L603+236
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L603+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L291
	ldr	r3, .L603+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L291:
	ldr	r3, .L603+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L293
	ldr	r3, .L603+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L293
	ldr	r3, .L603+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L293
	ldr	r3, .L603+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L293
	ldr	r3, .L603+224
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L294
.L293:
	ldr	r3, .L603+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L294
	ldr	r3, .L603+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L294
	ldr	r3, .L603+236
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L294
	ldr	r3, .L603+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L603+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L294:
	ldr	r3, .L603+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L295
	ldr	r3, .L603+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L295
	ldr	r3, .L603+220
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L296
	mov	r3, #0
	mov	r4, r3
.L296:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L295
	ldr	r3, .L603+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L295
	ldr	r3, .L603+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L295
	ldr	r3, .L603+220
	ldr	r3, [r3]	@ float
	ldr	r2, .L603+224
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L297
.L295:
	ldr	r3, .L603+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L297
	ldr	r3, .L603+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L297
	ldr	r3, .L603+236
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L297
	ldr	r3, .L603+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L606
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L297:
	ldr	r3, .L606+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L606+8
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L298
	ldr	r3, .L606+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L298
	ldr	r3, .L606+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L298
	ldr	r3, .L606+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L298
	ldr	r3, .L606
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L300
.L298:
	ldr	r3, .L606+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L300
	ldr	r3, .L606+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L300
	ldr	r3, .L606+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L300
	ldr	r3, .L606+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L606
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L300:
	ldr	r3, .L606+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L301
	ldr	r3, .L606+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L301
	ldr	r3, .L606+4
	ldr	r3, [r3]	@ float
	ldr	r1, .L606+172
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L301
	ldr	r3, .L606
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L301
	ldr	r3, .L606+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L301
	ldr	r3, .L606+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L606+8
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L303
.L301:
	ldr	r3, .L606+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L303
	ldr	r3, .L606+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L303
	ldr	r3, .L606+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L303
	ldr	r3, .L606+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L606
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L303:
	ldr	r3, .L606+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L304
	ldr	r3, .L606+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L305
.L304:
	ldr	r3, .L606+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L306
	ldr	r3, .L606+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L305
.L306:
	ldr	r3, .L606+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L307
	ldr	r3, .L606+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L305
.L307:
	ldr	r3, .L606+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L606+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L305:
	ldr	r3, .L606+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L308
	ldr	r3, .L606+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L309
.L308:
	ldr	r3, .L606+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L310
	ldr	r3, .L606+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L309
.L310:
	ldr	r3, .L606+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L311
	ldr	r3, .L606+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L309
.L311:
	ldr	r3, .L606+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L606+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L309:
	ldr	r3, .L606+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L312
	ldr	r3, .L606+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L313
.L312:
	ldr	r3, .L606+48
	ldr	r3, [r3]	@ float
	ldr	r1, .L606+172
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L157
.L313:
	ldr	r3, .L606+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L606+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L315
	ldr	r3, .L606+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L606+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L315
	ldr	r3, .L606+120
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L606+60
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L606+48
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L316
.L315:
	ldr	r3, .L606+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L606+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L316
	ldr	r3, .L606+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L316:
	ldr	r3, .L606+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L318
	ldr	r3, .L606+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L318
	ldr	r3, .L606+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L318
	ldr	r3, .L606+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L318
	ldr	r3, .L606+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L319
.L318:
	ldr	r3, .L606+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L319
	ldr	r3, .L606+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L319
	ldr	r3, .L606+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L319
	ldr	r3, .L606+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L606+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L319:
	ldr	r3, .L606+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L320
	ldr	r3, .L606+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L320
	ldr	r3, .L606+60
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L321
	mov	r3, #0
	mov	r4, r3
.L321:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L320
	ldr	r3, .L606+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L320
	ldr	r3, .L606+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L320
	ldr	r3, .L606+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L606+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L322
.L320:
	ldr	r3, .L606+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L322
	ldr	r3, .L606+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L322
	ldr	r3, .L606+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L322
	ldr	r3, .L606+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L606+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L322:
	ldr	r3, .L606+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L606+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L323
	ldr	r3, .L606+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L323
	ldr	r3, .L606+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L323
	ldr	r3, .L606+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L323
	ldr	r3, .L606+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L325
.L323:
	ldr	r3, .L606+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L325
	ldr	r3, .L606+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L325
	ldr	r3, .L606+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L325
	ldr	r3, .L606+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L606+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L325:
	ldr	r3, .L606+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L326
	ldr	r3, .L606+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L326
	ldr	r3, .L606+60
	ldr	r3, [r3]	@ float
	ldr	r1, .L606+172
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L326
	ldr	r3, .L606+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L326
	ldr	r3, .L606+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L326
	ldr	r3, .L606+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L606+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L328
.L326:
	ldr	r3, .L606+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L328
	ldr	r3, .L606+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L328
	ldr	r3, .L606+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L328
	ldr	r3, .L606+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L606+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L328:
	ldr	r3, .L606+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L329
	ldr	r3, .L606+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L330
.L329:
	ldr	r3, .L606+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L331
	ldr	r3, .L606+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L330
.L331:
	ldr	r3, .L606+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L332
	ldr	r3, .L606+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L330
.L332:
	ldr	r3, .L606+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L606+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L330:
	ldr	r3, .L606+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L333
	ldr	r3, .L606+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L334
.L333:
	ldr	r3, .L606+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L335
	ldr	r3, .L606+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L334
.L335:
	ldr	r3, .L606+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L336
	ldr	r3, .L606+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L334
.L336:
	ldr	r3, .L606+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L606+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L334:
	ldr	r3, .L606+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L337
	ldr	r3, .L606+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L338
.L337:
	ldr	r3, .L606+88
	ldr	r3, [r3]	@ float
	ldr	r1, .L606+172
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L157
.L338:
	ldr	r3, .L606+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L606+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L340
	ldr	r3, .L606+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L606+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L340
	ldr	r3, .L606+120
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L606+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L606+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L341
.L340:
	ldr	r3, .L606+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L606+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L341
	ldr	r3, .L606+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L341:
	ldr	r3, .L606+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L343
	ldr	r3, .L606+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L343
	ldr	r3, .L606+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L343
	ldr	r3, .L606+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L343
	ldr	r3, .L606+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L344
.L343:
	ldr	r3, .L606+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L344
	ldr	r3, .L606+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L344
	ldr	r3, .L606+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L344
	ldr	r3, .L606+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L606+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L344:
	ldr	r3, .L606+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L345
	ldr	r3, .L606+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L345
	ldr	r3, .L606+100
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L346
	mov	r3, #0
	mov	r4, r3
.L346:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L345
	ldr	r3, .L606+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L345
	ldr	r3, .L606+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L345
	ldr	r3, .L606+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L606+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L347
.L345:
	ldr	r3, .L606+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L347
	ldr	r3, .L606+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L347
	ldr	r3, .L606+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L347
	ldr	r3, .L606+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L606+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L347:
	ldr	r3, .L606+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L606+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L348
	ldr	r3, .L606+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L348
	ldr	r3, .L606+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L348
	ldr	r3, .L606+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L348
	ldr	r3, .L606+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L350
.L348:
	ldr	r3, .L606+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L350
	ldr	r3, .L606+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L350
	ldr	r3, .L606+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L350
	ldr	r3, .L606+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L606+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L350:
	ldr	r3, .L606+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L351
	ldr	r3, .L606+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L351
	ldr	r3, .L606+100
	ldr	r3, [r3]	@ float
	ldr	r1, .L606+172
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L351
	ldr	r3, .L606+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L351
	ldr	r3, .L606+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L351
	ldr	r3, .L606+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L606+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L353
.L351:
	ldr	r3, .L606+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L353
	ldr	r3, .L606+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L353
	ldr	r3, .L606+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L353
	ldr	r3, .L606+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L606+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L353:
	ldr	r3, .L606+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L354
	ldr	r3, .L606+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L355
.L354:
	ldr	r3, .L606+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L356
	ldr	r3, .L606+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L355
.L356:
	ldr	r3, .L606+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L357
	ldr	r3, .L606+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L355
.L357:
	ldr	r3, .L606+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L606+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L355:
	ldr	r3, .L606+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L358
	ldr	r3, .L606+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L359
.L358:
	ldr	r3, .L606+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L360
	ldr	r3, .L606+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L359
.L360:
	ldr	r3, .L606+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L361
	ldr	r3, .L606+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L359
.L361:
	ldr	r3, .L606+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L606+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L359:
	ldr	r3, .L606+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L362
	ldr	r3, .L606+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L363
.L362:
	ldr	r3, .L606+136
	ldr	r3, [r3]	@ float
	ldr	r1, .L606+172
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L157
.L363:
	ldr	r3, .L606+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L606+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L365
	ldr	r3, .L606+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L606+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L365
	ldr	r3, .L606+120
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L606+132
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L606+136
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	b	.L607
.L608:
	.align	2
.L606:
	.word	t4_evt1
	.word	t4_x
	.word	_x_t4_x
	.word	_x_t4_l0
	.word	_x_t4_l1
	.word	t4_evt0
	.word	t4_l1
	.word	t4_l0
	.word	_x_t3_l0
	.word	_x_t3_l1
	.word	_x_t3_evt0
	.word	_x_t3_evt1
	.word	_x_t3_x
	.word	t3_l0
	.word	t3_l1
	.word	t3_x
	.word	t3_evt0
	.word	t3_evt1
	.word	_x_t2_l0
	.word	_x_t2_l1
	.word	_x_t2_evt0
	.word	_x_t2_evt1
	.word	_x_t2_x
	.word	t2_l0
	.word	t2_l1
	.word	t2_x
	.word	t2_evt0
	.word	t2_evt1
	.word	_x_t1_evt0
	.word	_x_t1_evt1
	.word	delta
	.word	_x_t1_l0
	.word	_x_t1_l1
	.word	t1_x
	.word	_x_t1_x
	.word	t1_l0
	.word	t1_l1
	.word	t1_evt0
	.word	t1_evt1
	.word	_x_t0_evt0
	.word	_x_t0_evt1
	.word	_x_t0_l0
	.word	_x_t0_l1
	.word	1084227584
	.word	t0_x
	.word	_x_t0_x
	.word	t0_l0
	.word	t0_l1
	.word	t0_evt0
	.word	t0_evt1
	.word	_x_controller_evt2
	.word	_x_controller_evt0
	.word	_x_controller_evt1
	.word	controller_cnt
	.word	_x_controller_cnt
	.word	controller_z
	.word	_x_controller_z
	.word	_x_controller_l1
	.word	_x_controller_l0
	.word	controller_l0
	.word	controller_l1
	.word	delta
	.word	controller_evt2
	.word	controller_evt0
	.word	controller_evt1
.L607:
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L366
.L365:
	ldr	r3, .L606+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L606+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L366
	ldr	r3, .L606+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L366:
	ldr	r3, .L606+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L368
	ldr	r3, .L606+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L368
	ldr	r3, .L606+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L368
	ldr	r3, .L606+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L368
	ldr	r3, .L606+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L369
.L368:
	ldr	r3, .L606+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L369
	ldr	r3, .L606+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L369
	ldr	r3, .L606+244
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L369
	ldr	r3, .L606+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L606+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L369:
	ldr	r3, .L606+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L370
	ldr	r3, .L606+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L370
	ldr	r3, .L606+132
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L371
	mov	r3, #0
	mov	r4, r3
.L371:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L370
	ldr	r3, .L606+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L370
	ldr	r3, .L606+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L370
	ldr	r3, .L606+132
	ldr	r3, [r3]	@ float
	ldr	r2, .L606+136
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L372
.L370:
	ldr	r3, .L606+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L372
	ldr	r3, .L606+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L372
	ldr	r3, .L606+244
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L372
	ldr	r3, .L606+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L606+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L372:
	ldr	r3, .L606+132
	ldr	r3, [r3]	@ float
	ldr	r2, .L606+136
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L373
	ldr	r3, .L606+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L373
	ldr	r3, .L606+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L373
	ldr	r3, .L606+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L373
	ldr	r3, .L606+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L375
.L373:
	ldr	r3, .L606+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L375
	ldr	r3, .L606+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L375
	ldr	r3, .L606+244
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L375
	ldr	r3, .L606+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L606+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L375:
	ldr	r3, .L606+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L376
	ldr	r3, .L606+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L376
	ldr	r3, .L606+132
	ldr	r3, [r3]	@ float
	ldr	r1, .L606+172
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L376
	ldr	r3, .L606+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L376
	ldr	r3, .L606+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L376
	ldr	r3, .L606+132
	ldr	r3, [r3]	@ float
	ldr	r2, .L606+136
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L378
.L376:
	ldr	r3, .L606+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L606+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L606+244
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L606+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L606+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L378:
	ldr	r3, .L606+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L379
	ldr	r3, .L606+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L380
.L379:
	ldr	r3, .L606+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L381
	ldr	r3, .L606+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L380
.L381:
	ldr	r3, .L606+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L382
	ldr	r3, .L606+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L380
.L382:
	ldr	r3, .L606+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L606+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L380:
	ldr	r3, .L606+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L383
	ldr	r3, .L606+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L384
.L383:
	ldr	r3, .L606+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L385
	ldr	r3, .L606+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L384
.L385:
	ldr	r3, .L606+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L386
	ldr	r3, .L606+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L384
.L386:
	ldr	r3, .L606+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L606+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L384:
	ldr	r3, .L606+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L387
	ldr	r3, .L606+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L388
.L387:
	ldr	r3, .L606+180
	ldr	r3, [r3]	@ float
	ldr	r1, .L606+172
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L157
.L388:
	ldr	r3, .L606+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L606+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L390
	ldr	r3, .L606+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L606+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L390
	ldr	r3, .L606+244
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L606+176
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L606+180
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L391
.L390:
	ldr	r3, .L606+244
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L606+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L391
	ldr	r3, .L606+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L391:
	ldr	r3, .L606+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L393
	ldr	r3, .L606+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L393
	ldr	r3, .L606+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L393
	ldr	r3, .L606+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L393
	ldr	r3, .L606+180
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L394
.L393:
	ldr	r3, .L606+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L394
	ldr	r3, .L606+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L394
	ldr	r3, .L606+244
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L394
	ldr	r3, .L606+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L606+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L394:
	ldr	r3, .L606+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L395
	ldr	r3, .L606+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L395
	ldr	r3, .L606+176
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L396
	mov	r3, #0
	mov	r4, r3
.L396:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L395
	ldr	r3, .L606+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L395
	ldr	r3, .L606+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L395
	ldr	r3, .L606+176
	ldr	r3, [r3]	@ float
	ldr	r2, .L606+180
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L397
.L395:
	ldr	r3, .L606+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L397
	ldr	r3, .L606+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L397
	ldr	r3, .L606+244
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L397
	ldr	r3, .L606+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L606+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L397:
	ldr	r3, .L606+176
	ldr	r3, [r3]	@ float
	ldr	r2, .L606+180
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L398
	ldr	r3, .L606+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L398
	ldr	r3, .L606+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L398
	ldr	r3, .L606+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L398
	ldr	r3, .L606+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L400
.L398:
	ldr	r3, .L606+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L400
	ldr	r3, .L606+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L400
	ldr	r3, .L606+244
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L400
	ldr	r3, .L606+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L606+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L400:
	ldr	r3, .L606+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L401
	ldr	r3, .L606+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L401
	ldr	r3, .L606+176
	ldr	r3, [r3]	@ float
	ldr	r1, .L606+172
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L401
	ldr	r3, .L606+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L401
	ldr	r3, .L606+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L401
	ldr	r3, .L606+176
	ldr	r3, [r3]	@ float
	ldr	r2, .L606+180
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L403
.L401:
	ldr	r3, .L606+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L403
	ldr	r3, .L606+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L403
	ldr	r3, .L606+244
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L403
	ldr	r3, .L606+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L606+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L403:
	ldr	r3, .L606+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L404
	ldr	r3, .L606+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L405
.L404:
	ldr	r3, .L606+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L406
	ldr	r3, .L606+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L405
.L406:
	ldr	r3, .L606+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L407
	ldr	r3, .L606+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L405
.L407:
	ldr	r3, .L606+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L606+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L405:
	ldr	r3, .L606+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L408
	ldr	r3, .L606+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L408
	ldr	r3, .L606+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L409
.L408:
	ldr	r3, .L606+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L410
	ldr	r3, .L606+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L410
	ldr	r3, .L606+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L409
.L410:
	ldr	r3, .L606+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L411
	ldr	r3, .L606+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L411
	ldr	r3, .L606+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L409
.L411:
	ldr	r3, .L606+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L412
	ldr	r3, .L606+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L412
	ldr	r3, .L606+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L409
.L412:
	ldr	r3, .L606+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L606+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L606+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L409:
	ldr	r3, .L606+216
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L413
	ldr	r3, .L606+216
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L413
	ldr	r3, .L606+216
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L413
	ldr	r3, .L606+216
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L413
	ldr	r3, .L606+216
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L413
	ldr	r3, .L606+216
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L413
	ldr	r3, .L606+216
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L413
	ldr	r3, .L606+216
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L413
	ldr	r3, .L606+216
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L413
	ldr	r3, .L606+216
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L413
	ldr	r3, .L606+216
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L413
	ldr	r3, .L606+216
	ldr	r3, [r3]
	cmp	r3, #11
	bne	.L157
.L413:
	ldr	r3, .L606+224
	ldr	r3, [r3]	@ float
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L414
	ldr	r3, .L606+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L415
	ldr	r3, .L606+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L415:
	ldr	r3, .L606+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L414
	ldr	r3, .L606+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L414:
	ldr	r3, .L606+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L606+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L416
	ldr	r3, .L606+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L606+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L416
	ldr	r3, .L606+244
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L606+220
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L606+224
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L416
	ldr	r3, .L606+212
	ldr	r2, [r3]
	ldr	r3, .L606+216
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L418
.L416:
	ldr	r3, .L606+244
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L606+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L418
	ldr	r3, .L606+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L418
	ldr	r3, .L606+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L418:
	ldr	r3, .L606+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L420
	ldr	r3, .L606+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L420
	ldr	r3, .L606+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L420
	ldr	r3, .L606+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L420
	ldr	r3, .L606+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L420
	ldr	r3, .L606+216
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L420
	ldr	r3, .L606+224
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L421
.L420:
	ldr	r3, .L606+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L421
	ldr	r3, .L606+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L421
	ldr	r3, .L606+244
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L421
	ldr	r3, .L606+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L606+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L606+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L421:
	ldr	r3, .L606+220
	ldr	r3, [r3]	@ float
	ldr	r2, .L606+224
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L422
	ldr	r3, .L606+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L424
	ldr	r3, .L606+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L425
.L424:
	ldr	r3, .L606+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L422
	ldr	r3, .L606+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L425
.L422:
	ldr	r3, .L606+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L425
	ldr	r3, .L606+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L425
	ldr	r3, .L606+244
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L425
	ldr	r3, .L606+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L606+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L606+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L425:
	ldr	r3, .L606+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L426
	ldr	r3, .L606+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L426
	ldr	r3, .L606+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L426
	ldr	r3, .L609
	ldr	r2, [r3]
	ldr	r3, .L609+4
	ldr	r3, [r3]
	sub	r3, r2, r3
	cmn	r3, #1
	beq	.L427
.L426:
	ldr	r3, .L609+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L428
	ldr	r3, .L609+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L428
	ldr	r3, .L609+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L428
	ldr	r3, .L609
	ldr	r2, [r3]
	ldr	r3, .L609+4
	ldr	r3, [r3]
	sub	r3, r2, r3
	cmp	r3, #1
	beq	.L427
.L428:
	ldr	r3, .L609+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L427
	ldr	r3, .L609+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L429
	ldr	r3, .L609+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L429
	ldr	r3, .L609+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L427
.L429:
	ldr	r3, .L609+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L427
	ldr	r3, .L609+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L427
	ldr	r3, .L609+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L427
	ldr	r3, .L609+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L427:
	ldr	r3, .L609+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L430
	ldr	r3, .L609+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L430
	ldr	r3, .L609+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L430
	ldr	r3, .L609
	ldr	r2, [r3]
	ldr	r3, .L609+4
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L430
	ldr	r3, .L609+40
	ldr	r3, [r3]	@ float
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L431
.L430:
	ldr	r3, .L609+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L431
	ldr	r3, .L609+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L432
	ldr	r3, .L609+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L432
	ldr	r3, .L609+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L431
.L432:
	ldr	r3, .L609+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L431
	ldr	r3, .L609+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L431
	ldr	r3, .L609+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L431
	ldr	r3, .L609+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L431:
	ldr	r3, .L609+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L433
	ldr	r3, .L609+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L434
.L433:
	ldr	r3, .L609+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L435
	ldr	r3, .L609+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L434
.L435:
	ldr	r3, .L609+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L434
	ldr	r3, .L609+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L434
	ldr	r3, .L609+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L434
	ldr	r3, .L609+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L609+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L609+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L434:
	ldr	r3, .L609+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L609+300
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L436
	ldr	r3, .L609+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L438
	ldr	r3, .L609+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L438
	ldr	r3, .L609+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L438
	ldr	r3, .L609
	ldr	r2, [r3]
	ldr	r3, .L609+4
	ldr	r3, [r3]
	sub	r3, r2, r3
	cmn	r3, #1
	beq	.L439
.L438:
	ldr	r3, .L609+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L436
	ldr	r3, .L609+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L436
	ldr	r3, .L609+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L436
	ldr	r3, .L609
	ldr	r2, [r3]
	ldr	r3, .L609+4
	ldr	r3, [r3]
	sub	r3, r2, r3
	cmp	r3, #1
	bne	.L436
	ldr	r3, .L609
	ldr	r3, [r3]
	cmp	r3, #1
	bgt	.L439
.L436:
	ldr	r3, .L609+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L439
	ldr	r3, .L609+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L440
	ldr	r3, .L609+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L440
	ldr	r3, .L609+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L439
.L440:
	ldr	r3, .L609+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L439
	ldr	r3, .L609+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L439
	ldr	r3, .L609+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L439
	ldr	r3, .L609+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L439:
	ldr	r3, .L609+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L441
	ldr	r3, .L609+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L441
	ldr	r3, .L609+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L441
	ldr	r3, .L609
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L441
	ldr	r3, .L609+4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L441
	ldr	r3, .L609+300
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L442
.L441:
	ldr	r3, .L609+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L442
	ldr	r3, .L609+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L443
	ldr	r3, .L609+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L443
	ldr	r3, .L609+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L442
.L443:
	ldr	r3, .L609+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L442
	ldr	r3, .L609+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L442
	ldr	r3, .L609+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L442
	ldr	r3, .L609+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L442:
	ldr	r3, .L609+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L609+300
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L444
	ldr	r3, .L609+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L446
	ldr	r3, .L609+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L447
.L446:
	ldr	r3, .L609+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L444
	ldr	r3, .L609+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L447
.L444:
	ldr	r3, .L609+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L447
	ldr	r3, .L609+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L447
	ldr	r3, .L609+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L447
	ldr	r3, .L609+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L609+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L609+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L447:
	ldr	r3, .L609
	ldr	r2, [r3]
	ldr	r3, .L609+4
	ldr	r3, [r3]
	sub	r3, r2, r3
	cmn	r3, #1
	bne	.L448
	ldr	r3, .L609+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L448
	ldr	r3, .L609+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L448
	ldr	r3, .L609+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L448
	ldr	r3, .L609+40
	ldr	r3, [r3]	@ float
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L449
.L448:
	ldr	r3, .L609+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L449
	ldr	r3, .L609+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L450
	ldr	r3, .L609+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L450
	ldr	r3, .L609+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L449
.L450:
	ldr	r3, .L609+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L449
	ldr	r3, .L609+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L449
	ldr	r3, .L609+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L449
	ldr	r3, .L609+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L449:
	ldr	r3, .L609+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L451
	ldr	r3, .L609+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L452
.L451:
	ldr	r3, .L609+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L453
	ldr	r3, .L609+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L452
.L453:
	ldr	r3, .L609+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L454
	ldr	r3, .L609+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L452
.L454:
	ldr	r3, .L609+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L609+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L452:
	ldr	r3, .L609+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L455
	ldr	r3, .L609+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L456
.L455:
	ldr	r3, .L609+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L457
	ldr	r3, .L609+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L456
.L457:
	ldr	r3, .L609+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L458
	ldr	r3, .L609+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L456
.L458:
	ldr	r3, .L609+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L609+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L456:
	ldr	r3, .L609+228
	ldr	r3, [r3]	@ float
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L459
	ldr	r3, .L609+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L459
	ldr	r3, .L609+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L459:
	ldr	r3, .L609+228
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L460
	ldr	r3, .L609+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L460
	ldr	r3, .L609+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L460:
	ldr	r3, .L609+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L609+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L461
	ldr	r3, .L609+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L609+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L461
	ldr	r3, .L609+20
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L609+232
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L609+228
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L462
.L461:
	ldr	r3, .L609+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L463
	ldr	r3, .L609+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
.L463:
	ldr	r3, .L609+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L157
.L462:
	ldr	r3, .L609+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L465
	ldr	r3, .L609+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L465
	ldr	r3, .L609+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L465
	ldr	r3, .L609+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L465
	ldr	r3, .L609+228
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L466
.L465:
	ldr	r3, .L609+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L466
	ldr	r3, .L609+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L466
	ldr	r3, .L609+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L466
	ldr	r3, .L609+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L609+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L466:
	ldr	r3, .L609+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L467
	ldr	r3, .L609+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L467
	ldr	r3, .L609+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L467
	ldr	r3, .L609+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L467
	ldr	r3, .L609+232
	ldr	r3, [r3]	@ float
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L467
	ldr	r3, .L609+232
	ldr	r3, [r3]	@ float
	ldr	r2, .L609+228
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L469
.L467:
	ldr	r3, .L609+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L469
	ldr	r3, .L609+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L469
	ldr	r3, .L609+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L469
	ldr	r3, .L609+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L609+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L469:
	ldr	r3, .L609+228
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L470
	ldr	r3, .L609+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L470
	ldr	r3, .L609+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L470
	ldr	r3, .L609+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L470
	ldr	r3, .L609+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L472
.L470:
	ldr	r3, .L609+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L472
	ldr	r3, .L609+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L472
	ldr	r3, .L609+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L472
	ldr	r3, .L609+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L609+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L472:
	ldr	r3, .L609+232
	ldr	r3, [r3]	@ float
	ldr	r2, .L609+228
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L473
	ldr	r3, .L609+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L473
	ldr	r3, .L609+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L473
	ldr	r3, .L609+232
	ldr	r3, [r3]	@ float
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L473
	ldr	r3, .L609+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L473
	ldr	r3, .L609+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L473
	ldr	r3, .L609+232
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L476
.L473:
	ldr	r3, .L609+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L476
	ldr	r3, .L609+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L476
	ldr	r3, .L609+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L476
	ldr	r3, .L609+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L609+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L476:
	ldr	r3, .L609+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L609+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L478
	ldr	r3, .L609+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L479
.L478:
	ldr	r3, .L609+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L479
	ldr	r3, .L609+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L609+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L479:
	ldr	r3, .L609+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L480
	ldr	r3, .L609+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L481
.L480:
	ldr	r3, .L609+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L481
	ldr	r3, .L609+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L609+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L481:
	ldr	r3, .L609+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L482
	ldr	r3, .L609+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L483
.L482:
	ldr	r3, .L609+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L483
	ldr	r3, .L609+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L609+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L483:
	ldr	r3, .L609+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L484
	ldr	r3, .L609+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L485
.L484:
	ldr	r3, .L609+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L485
	ldr	r3, .L609+320
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L609+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L485:
	ldr	r3, .L609+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L486
	ldr	r3, .L609+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L487
.L486:
	ldr	r3, .L609+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L487
	ldr	r3, .L609+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L609+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L487:
	ldr	r3, .L609+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L488
	ldr	r3, .L609+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L489
.L488:
	ldr	r3, .L609+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L489
	ldr	r3, .L609+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L609+432
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L489:
	ldr	r3, .L609+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L490
	ldr	r3, .L609+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L491
.L490:
	ldr	r3, .L609+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L491
	ldr	r3, .L609+464
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L609+472
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L491:
	ldr	r3, .L609+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L492
	ldr	r3, .L609+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L493
.L492:
	ldr	r3, .L609+20
	ldr	r3, [r3]	@ float
	b	.L610
.L611:
	.align	2
.L609:
	.word	controller_cnt
	.word	_x_controller_cnt
	.word	controller_evt2
	.word	controller_evt1
	.word	controller_evt0
	.word	delta
	.word	controller_l0
	.word	controller_l1
	.word	_x_controller_l0
	.word	_x_controller_l1
	.word	controller_z
	.word	_x_t9_l1
	.word	t9_l1
	.word	_x_t9_l0
	.word	t9_l0
	.word	_x_t9_evt1
	.word	t9_evt1
	.word	_x_t9_evt0
	.word	t9_evt0
	.word	_x_t3_x
	.word	t3_x
	.word	_x_t2_evt1
	.word	t2_evt1
	.word	_x_t2_l1
	.word	t2_l1
	.word	_x_t2_x
	.word	t2_x
	.word	_x_delta
	.word	delta
	.word	_x__diverge_delta
	.word	_diverge_delta
	.word	_x_t1_evt1
	.word	t1_evt1
	.word	_x_t1_l0
	.word	t1_l0
	.word	_x_t0_l1
	.word	t0_l1
	.word	_x_t1_evt0
	.word	t1_evt0
	.word	_x_t0_l0
	.word	t0_l0
	.word	_x_t0_evt1
	.word	t0_evt1
	.word	_x_t1_x
	.word	t1_x
	.word	_x_t0_evt0
	.word	t0_evt0
	.word	_x_t0_x
	.word	t0_x
	.word	_x_gate_l0
	.word	gate_l0
	.word	_x_controller_l0
	.word	controller_l0
	.word	_x_t2_l0
	.word	t2_l0
	.word	_x_gate_l1
	.word	gate_l1
	.word	_x_gate_y
	.word	gate_y
	.word	_x_t1_l1
	.word	t1_l1
	.word	_x_t2_evt0
	.word	t2_evt0
	.word	_x_gate_evt0
	.word	gate_evt0
	.word	_x_controller_evt0
	.word	controller_evt0
	.word	_x_t8_evt1
	.word	t8_evt1
	.word	_x_t9_x
	.word	t9_x
	.word	_x_gate_evt1
	.word	gate_evt1
	.word	_x_t8_l1
	.word	t8_l1
	.word	_x_controller_z
	.word	controller_z
	.word	_x_controller_evt2
	.word	controller_evt2
	.word	_x_t3_evt0
	.word	t3_evt0
	.word	_x_controller_cnt
	.word	controller_cnt
	.word	_x_t3_evt1
	.word	t3_evt1
	.word	_x_t4_x
	.word	t4_x
	.word	_x_t3_l0
	.word	t3_l0
	.word	_x_t3_l1
	.word	t3_l1
	.word	_x_t4_evt0
	.word	t4_evt0
	.word	_x_t4_evt1
	.word	t4_evt1
	.word	_x_controller_evt1
	.word	controller_evt1
	.word	_x_t5_x
	.word	t5_x
	.word	_x_t4_l0
	.word	t4_l0
	.word	_x_t4_l1
	.word	t4_l1
	.word	_x_controller_l1
	.word	controller_l1
	.word	_x_t5_evt0
	.word	t5_evt0
	.word	_x_t5_evt1
	.word	t5_evt1
	.word	_x_t6_x
	.word	t6_x
	.word	_x_t5_l0
	.word	t5_l0
	.word	_x_t5_l1
	.word	t5_l1
	.word	_x_t6_evt0
	.word	t6_evt0
	.word	_x_t6_evt1
	.word	t6_evt1
	.word	_x_t7_x
	.word	t7_x
	.word	_x_t6_l0
	.word	t6_l0
	.word	_x_t6_l1
	.word	t6_l1
	.word	_x_t7_evt0
	.word	t7_evt0
	.word	_x_t7_evt1
	.word	t7_evt1
	.word	_x_t8_x
	.word	t8_x
	.word	_x_t7_l0
	.word	t7_l0
	.word	_x_t7_l1
	.word	t7_l1
	.word	_x_t8_evt0
	.word	t8_evt0
	.word	_x_t8_l0
	.word	t8_l0
.L610:
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L493
	ldr	r3, .L609+504
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L609+512
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L493:
	ldr	r3, .L609+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L494
	ldr	r3, .L609+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L495
.L494:
	ldr	r3, .L609+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L495
	ldr	r3, .L609+544
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L609+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L495:
	ldr	r3, .L609+544
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L496
	ldr	r3, .L609+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L497
.L496:
	ldr	r3, .L609+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L497
	ldr	r3, .L609+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L609+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L497:
	ldr	r3, .L609+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L498
	ldr	r3, .L609+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L498
	mov	r3, #1
	b	.L499
.L498:
	mov	r3, #0
.L499:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L609+312
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L500
	ldr	r3, .L609+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L500
	ldr	r3, .L609+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L500
	mov	r3, #1
	b	.L501
.L500:
	mov	r3, #0
.L501:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L502
	ldr	r3, .L609+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L157
.L502:
	ldr	r3, .L609+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L504
	ldr	r3, .L609+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L505
	ldr	r3, .L609+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L505
	mov	r3, #1
	b	.L506
.L505:
	mov	r3, #0
.L506:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L609+312
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L507
	ldr	r3, .L609+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L507
	ldr	r3, .L609+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L507
	mov	r3, #1
	b	.L508
.L507:
	mov	r3, #0
.L508:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L157
.L504:
	ldr	r3, .L609+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L509
	ldr	r3, .L609+312
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L510
	ldr	r3, .L609+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L510
	ldr	r3, .L609+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L510
	mov	r3, #1
	b	.L511
.L510:
	mov	r3, #0
.L511:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L609+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L512
	ldr	r3, .L609+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L513
.L512:
	ldr	r3, .L609+544
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L514
	ldr	r3, .L609+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L513
.L514:
	ldr	r3, .L609+504
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L515
	ldr	r3, .L609+512
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L513
.L515:
	ldr	r3, .L609+464
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L516
	ldr	r3, .L609+472
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L513
.L516:
	ldr	r3, .L609+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L517
	ldr	r3, .L609+432
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L513
.L517:
	ldr	r3, .L609+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L518
	ldr	r3, .L609+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L513
.L518:
	ldr	r3, .L609+320
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L519
	ldr	r3, .L609+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L513
.L519:
	ldr	r3, .L609+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L520
	ldr	r3, .L609+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L513
.L520:
	ldr	r3, .L609+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L521
	ldr	r3, .L609+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L513
.L521:
	ldr	r3, .L609+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L522
	ldr	r3, .L609+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L522
.L513:
	mov	r3, #1
	b	.L523
.L522:
	mov	r3, #0
.L523:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L157
.L509:
	ldr	r3, .L609+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L524
	ldr	r3, .L609+312
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L525
	ldr	r3, .L609+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L525
	ldr	r3, .L609+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L525
	mov	r3, #1
	b	.L526
.L525:
	mov	r3, #0
.L526:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L609+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L527
	ldr	r3, .L609+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L528
.L527:
	ldr	r3, .L609+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L529
	ldr	r3, .L609+544
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L528
.L529:
	ldr	r3, .L609+512
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L530
	ldr	r3, .L609+504
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L528
.L530:
	ldr	r3, .L609+472
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L531
	ldr	r3, .L609+464
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L528
.L531:
	ldr	r3, .L609+432
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L532
	ldr	r3, .L609+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L528
.L532:
	ldr	r3, .L609+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L533
	ldr	r3, .L609+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L528
.L533:
	ldr	r3, .L609+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L534
	ldr	r3, .L609+320
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L528
.L534:
	ldr	r3, .L609+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L535
	ldr	r3, .L609+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L528
.L535:
	ldr	r3, .L609+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L536
	ldr	r3, .L609+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L528
.L536:
	ldr	r3, .L609+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L537
	ldr	r3, .L609+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L537
.L528:
	mov	r3, #1
	b	.L538
.L537:
	mov	r3, #0
.L538:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L157
.L524:
	ldr	r3, .L609+112
	ldr	r3, [r3]	@ float
	ldr	r2, .L609+116
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L539
	ldr	r3, .L609+120
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L540
	mov	r3, #0
	mov	r4, r3
.L540:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L157
.L539:
	ldr	r3, .L609+120
	ldr	r3, [r3]	@ float
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L541
	ldr	r3, .L609+112
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L609+120
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L609+116
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L157
.L541:
	mov	r3, #1
	b	.L543
.L157:
	mov	r3, #0
.L543:
	str	r3, [fp, #-24]
	ldr	r3, .L609+44
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+48
	strb	r2, [r3]
	ldr	r3, .L609+52
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+56
	strb	r2, [r3]
	ldr	r3, .L609+60
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+64
	strb	r2, [r3]
	ldr	r3, .L609+68
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+72
	strb	r2, [r3]
	ldr	r3, .L609+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L609+80
	str	r3, [r2]	@ float
	ldr	r3, .L609+84
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+88
	strb	r2, [r3]
	ldr	r3, .L609+92
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+96
	strb	r2, [r3]
	ldr	r3, .L609+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L609+104
	str	r3, [r2]	@ float
	ldr	r3, .L609+108
	ldr	r3, [r3]	@ float
	ldr	r2, .L609+112
	str	r3, [r2]	@ float
	ldr	r3, .L609+116
	ldr	r3, [r3]	@ float
	ldr	r2, .L609+120
	str	r3, [r2]	@ float
	ldr	r3, .L609+124
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+128
	strb	r2, [r3]
	ldr	r3, .L609+132
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+136
	strb	r2, [r3]
	ldr	r3, .L609+140
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+144
	strb	r2, [r3]
	ldr	r3, .L609+148
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+152
	strb	r2, [r3]
	ldr	r3, .L609+156
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+160
	strb	r2, [r3]
	ldr	r3, .L609+164
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+168
	strb	r2, [r3]
	ldr	r3, .L609+172
	ldr	r3, [r3]	@ float
	ldr	r2, .L609+176
	str	r3, [r2]	@ float
	ldr	r3, .L609+180
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+184
	strb	r2, [r3]
	ldr	r3, .L609+188
	ldr	r3, [r3]	@ float
	ldr	r2, .L609+192
	str	r3, [r2]	@ float
	ldr	r3, .L609+196
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+200
	strb	r2, [r3]
	ldr	r3, .L609+204
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+208
	strb	r2, [r3]
	ldr	r3, .L609+212
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+216
	strb	r2, [r3]
	ldr	r3, .L609+220
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+224
	strb	r2, [r3]
	ldr	r3, .L609+228
	ldr	r3, [r3]	@ float
	ldr	r2, .L609+232
	str	r3, [r2]	@ float
	ldr	r3, .L609+236
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+240
	strb	r2, [r3]
	ldr	r3, .L609+244
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+248
	strb	r2, [r3]
	ldr	r3, .L609+252
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+256
	strb	r2, [r3]
	ldr	r3, .L609+260
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+264
	strb	r2, [r3]
	ldr	r3, .L609+268
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+272
	strb	r2, [r3]
	ldr	r3, .L609+276
	ldr	r3, [r3]	@ float
	ldr	r2, .L609+280
	str	r3, [r2]	@ float
	ldr	r3, .L609+284
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+288
	strb	r2, [r3]
	ldr	r3, .L609+292
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+296
	strb	r2, [r3]
	ldr	r3, .L609+300
	ldr	r3, [r3]	@ float
	ldr	r2, .L609+304
	str	r3, [r2]	@ float
	ldr	r3, .L609+308
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+312
	strb	r2, [r3]
	ldr	r3, .L609+316
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+320
	strb	r2, [r3]
	ldr	r3, .L609+324
	ldr	r3, [r3]
	ldr	r2, .L609+328
	str	r3, [r2]
	ldr	r3, .L609+332
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+336
	strb	r2, [r3]
	ldr	r3, .L609+340
	ldr	r3, [r3]	@ float
	ldr	r2, .L609+344
	str	r3, [r2]	@ float
	ldr	r3, .L609+348
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+352
	strb	r2, [r3]
	ldr	r3, .L609+356
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+360
	strb	r2, [r3]
	ldr	r3, .L609+364
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+368
	strb	r2, [r3]
	ldr	r3, .L609+372
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+376
	strb	r2, [r3]
	ldr	r3, .L609+380
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+384
	strb	r2, [r3]
	ldr	r3, .L609+388
	ldr	r3, [r3]	@ float
	ldr	r2, .L609+392
	str	r3, [r2]	@ float
	ldr	r3, .L609+396
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+400
	strb	r2, [r3]
	ldr	r3, .L609+404
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+408
	strb	r2, [r3]
	ldr	r3, .L609+412
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+416
	strb	r2, [r3]
	ldr	r3, .L609+420
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+424
	strb	r2, [r3]
	ldr	r3, .L609+428
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+432
	strb	r2, [r3]
	ldr	r3, .L609+436
	ldr	r3, [r3]	@ float
	ldr	r2, .L609+440
	str	r3, [r2]	@ float
	ldr	r3, .L609+444
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+448
	strb	r2, [r3]
	ldr	r3, .L609+452
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+456
	strb	r2, [r3]
	ldr	r3, .L609+460
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+464
	strb	r2, [r3]
	ldr	r3, .L609+468
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+472
	strb	r2, [r3]
	ldr	r3, .L609+476
	ldr	r3, [r3]	@ float
	ldr	r2, .L609+480
	str	r3, [r2]	@ float
	ldr	r3, .L609+484
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+488
	strb	r2, [r3]
	ldr	r3, .L609+492
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+496
	strb	r2, [r3]
	ldr	r3, .L609+500
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+504
	strb	r2, [r3]
	ldr	r3, .L609+508
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+512
	strb	r2, [r3]
	ldr	r3, .L609+516
	ldr	r3, [r3]	@ float
	ldr	r2, .L609+520
	str	r3, [r2]	@ float
	ldr	r3, .L609+524
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+528
	strb	r2, [r3]
	ldr	r3, .L609+532
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+536
	strb	r2, [r3]
	ldr	r3, .L609+540
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+544
	strb	r2, [r3]
	ldr	r3, .L609+548
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L609+552
	strb	r2, [r3]
.L152:
	ldr	r3, [fp, #-24]
	cmp	r3, #0
	bne	.L544
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
