	.file	"103266096.c"
	.intel_syntax noprefix
	.text
	.globl	buffer1
	.bss
	.align 32
	.type	buffer1, @object
	.size	buffer1, 1416
buffer1:
	.zero	1416
	.globl	buffer2
	.align 32
	.type	buffer2, @object
	.size	buffer2, 1416
buffer2:
	.zero	1416
	.globl	buffer3
	.align 32
	.type	buffer3, @object
	.size	buffer3, 1416
buffer3:
	.zero	1416
	.globl	current_y
	.align 32
	.type	current_y, @object
	.size	current_y, 405504
current_y:
	.zero	405504
	.globl	i
	.align 4
	.type	i, @object
	.size	i, 4
i:
	.zero	4
	.globl	j
	.align 4
	.type	j, @object
	.size	j, 4
j:
	.zero	4
	.globl	k
	.align 4
	.type	k, @object
	.size	k, 4
k:
	.zero	4
	.globl	gauss
	.align 32
	.type	gauss, @object
	.size	gauss, 410640
gauss:
	.zero	410640
	.globl	newgauss
	.align 32
	.type	newgauss, @object
	.size	newgauss, 410640
newgauss:
	.zero	410640
	.globl	nonmaximum
	.align 32
	.type	nonmaximum, @object
	.size	nonmaximum, 410640
nonmaximum:
	.zero	410640
	.globl	threshold
	.align 32
	.type	threshold, @object
	.size	threshold, 410640
threshold:
	.zero	410640
	.globl	sobel
	.align 32
	.type	sobel, @object
	.size	sobel, 405504
sobel:
	.zero	405504
	.globl	newsobelx
	.align 32
	.type	newsobelx, @object
	.size	newsobelx, 405504
newsobelx:
	.zero	405504
	.globl	newsobely
	.align 32
	.type	newsobely, @object
	.size	newsobely, 405504
newsobely:
	.zero	405504
	.globl	es
	.align 32
	.type	es, @object
	.size	es, 811008
es:
	.zero	811008
	.globl	eo
	.align 32
	.type	eo, @object
	.size	eo, 405504
eo:
	.zero	405504
	.globl	z
	.align 8
	.type	z, @object
	.size	z, 8
z:
	.zero	8
	.globl	l
	.align 4
	.type	l, @object
	.size	l, 4
l:
	.zero	4
	.globl	q
	.align 4
	.type	q, @object
	.size	q, 4
q:
	.zero	4
	.globl	r
	.align 4
	.type	r, @object
	.size	r, 4
r:
	.zero	4
	.globl	t1
	.data
	.align 4
	.type	t1, @object
	.size	t1, 4
t1:
	.long	70
	.globl	t2
	.align 4
	.type	t2, @object
	.size	t2, 4
t2:
	.long	60
	.text
	.globl	canny
	.type	canny, @function
canny:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r12
	push	rbx
	.cfi_offset 12, -24
	.cfi_offset 3, -32
	mov	DWORD PTR i[rip], 0
	jmp	.L2
.L5:
	mov	DWORD PTR j[rip], 0
	jmp	.L3
.L4:
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rdx, edx
	cdqe
	imul	rax, rax, 354
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	lea	rax, gauss[rip]
	mov	DWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR j[rip]
	add	eax, 1
	mov	DWORD PTR j[rip], eax
.L3:
	mov	eax, DWORD PTR j[rip]
	cmp	eax, 353
	jle	.L4
	mov	eax, DWORD PTR i[rip]
	add	eax, 1
	mov	DWORD PTR i[rip], eax
.L2:
	mov	eax, DWORD PTR i[rip]
	cmp	eax, 289
	jle	.L5
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, sobel[rip]
	mov	DWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rdx, edx
	cdqe
	imul	rax, rax, 354
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	lea	rax, nonmaximum[rip]
	mov	DWORD PTR [rdx+rax], 0
	mov	DWORD PTR threshold[rip+409216], 0
	mov	DWORD PTR i[rip], 1
	jmp	.L6
.L9:
	mov	DWORD PTR j[rip], 1
	jmp	.L7
.L8:
	mov	eax, DWORD PTR i[rip]
	lea	edx, -1[rax]
	mov	eax, DWORD PTR j[rip]
	sub	eax, 1
	mov	ecx, DWORD PTR i[rip]
	mov	esi, DWORD PTR j[rip]
	movsx	rdi, eax
	movsx	rdx, edx
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rdi
	lea	rdx, 0[0+rax*4]
	lea	rax, current_y[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movsx	rsi, esi
	movsx	rdx, ecx
	imul	rdx, rdx, 354
	add	rdx, rsi
	lea	rcx, 0[0+rdx*4]
	lea	rdx, gauss[rip]
	mov	DWORD PTR [rcx+rdx], eax
	mov	eax, DWORD PTR j[rip]
	add	eax, 1
	mov	DWORD PTR j[rip], eax
.L7:
	mov	eax, DWORD PTR j[rip]
	cmp	eax, 352
	jle	.L8
	mov	eax, DWORD PTR i[rip]
	add	eax, 1
	mov	DWORD PTR i[rip], eax
.L6:
	mov	eax, DWORD PTR i[rip]
	cmp	eax, 288
	jle	.L9
	mov	DWORD PTR i[rip], 1
	jmp	.L10
.L19:
	mov	eax, DWORD PTR i[rip]
	cmp	eax, 1
	jne	.L11
	mov	DWORD PTR k[rip], 0
	jmp	.L12
.L13:
	mov	eax, DWORD PTR k[rip]
	mov	edx, DWORD PTR k[rip]
	cdqe
	lea	rcx, 0[0+rax*4]
	lea	rax, gauss[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, buffer1[rip]
	mov	DWORD PTR [rcx+rdx], eax
	mov	eax, DWORD PTR k[rip]
	mov	edx, DWORD PTR k[rip]
	cdqe
	add	rax, 354
	lea	rcx, 0[0+rax*4]
	lea	rax, gauss[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, buffer2[rip]
	mov	DWORD PTR [rcx+rdx], eax
	mov	eax, DWORD PTR k[rip]
	mov	edx, DWORD PTR k[rip]
	cdqe
	add	rax, 708
	lea	rcx, 0[0+rax*4]
	lea	rax, gauss[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, buffer3[rip]
	mov	DWORD PTR [rcx+rdx], eax
	mov	eax, DWORD PTR k[rip]
	add	eax, 1
	mov	DWORD PTR k[rip], eax
.L12:
	mov	eax, DWORD PTR k[rip]
	cmp	eax, 353
	jle	.L13
	jmp	.L14
.L11:
	mov	DWORD PTR k[rip], 0
	jmp	.L15
.L16:
	mov	eax, DWORD PTR k[rip]
	mov	edx, DWORD PTR k[rip]
	cdqe
	lea	rcx, 0[0+rax*4]
	lea	rax, buffer2[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, buffer1[rip]
	mov	DWORD PTR [rcx+rdx], eax
	mov	eax, DWORD PTR k[rip]
	mov	edx, DWORD PTR k[rip]
	cdqe
	lea	rcx, 0[0+rax*4]
	lea	rax, buffer3[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, buffer2[rip]
	mov	DWORD PTR [rcx+rdx], eax
	mov	eax, DWORD PTR i[rip]
	lea	ecx, 1[rax]
	mov	eax, DWORD PTR k[rip]
	mov	edx, DWORD PTR k[rip]
	movsx	rsi, eax
	movsx	rax, ecx
	imul	rax, rax, 354
	add	rax, rsi
	lea	rcx, 0[0+rax*4]
	lea	rax, gauss[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, buffer3[rip]
	mov	DWORD PTR [rcx+rdx], eax
	mov	eax, DWORD PTR k[rip]
	add	eax, 1
	mov	DWORD PTR k[rip], eax
.L15:
	mov	eax, DWORD PTR k[rip]
	cmp	eax, 353
	jle	.L16
.L14:
	mov	DWORD PTR j[rip], 1
	jmp	.L17
.L18:
	mov	eax, DWORD PTR j[rip]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, buffer2[rip]
	mov	eax, DWORD PTR [rdx+rax]
	lea	ecx, 0[0+rax*4]
	mov	eax, DWORD PTR j[rip]
	sub	eax, 1
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, buffer1[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	ecx, eax
	mov	eax, DWORD PTR j[rip]
	sub	eax, 1
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, buffer2[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	eax, eax
	add	ecx, eax
	mov	eax, DWORD PTR j[rip]
	sub	eax, 1
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, buffer3[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	ecx, eax
	mov	eax, DWORD PTR j[rip]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, buffer1[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	eax, eax
	add	ecx, eax
	mov	eax, DWORD PTR j[rip]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, buffer3[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	eax, eax
	add	ecx, eax
	mov	eax, DWORD PTR j[rip]
	add	eax, 1
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, buffer1[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	ecx, eax
	mov	eax, DWORD PTR j[rip]
	add	eax, 1
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, buffer2[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	eax, eax
	lea	esi, [rcx+rax]
	mov	eax, DWORD PTR j[rip]
	add	eax, 1
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, buffer3[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	add	ecx, esi
	movsx	rdx, edx
	cdqe
	imul	rax, rax, 354
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	lea	rax, newgauss[rip]
	mov	DWORD PTR [rdx+rax], ecx
	mov	eax, DWORD PTR j[rip]
	add	eax, 1
	mov	DWORD PTR j[rip], eax
.L17:
	mov	eax, DWORD PTR j[rip]
	cmp	eax, 352
	jle	.L18
	mov	eax, DWORD PTR i[rip]
	add	eax, 1
	mov	DWORD PTR i[rip], eax
.L10:
	mov	eax, DWORD PTR i[rip]
	cmp	eax, 288
	jle	.L19
	mov	DWORD PTR i[rip], 1
	jmp	.L20
.L23:
	mov	DWORD PTR j[rip], 1
	jmp	.L21
.L22:
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rdx, edx
	cdqe
	imul	rax, rax, 354
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	lea	rax, newgauss[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	edx, DWORD PTR i[rip]
	lea	ecx, -1[rdx]
	mov	edx, DWORD PTR j[rip]
	lea	esi, -1[rdx]
	lea	edx, 15[rax]
	test	eax, eax
	cmovs	eax, edx
	sar	eax, 4
	mov	edi, eax
	movsx	rsi, esi
	movsx	rdx, ecx
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rsi
	lea	rdx, 0[0+rax*4]
	lea	rax, current_y[rip]
	mov	DWORD PTR [rdx+rax], edi
	mov	eax, DWORD PTR i[rip]
	lea	edx, -1[rax]
	mov	eax, DWORD PTR j[rip]
	lea	ecx, -1[rax]
	mov	eax, DWORD PTR i[rip]
	lea	esi, -1[rax]
	mov	eax, DWORD PTR j[rip]
	lea	edi, -1[rax]
	movsx	rcx, ecx
	movsx	rdx, edx
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, current_y[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	movsx	rdi, edi
	movsx	rdx, esi
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rdi
	lea	rdx, 0[0+rax*4]
	lea	rax, sobel[rip]
	mov	DWORD PTR [rdx+rax], ecx
	mov	eax, DWORD PTR j[rip]
	add	eax, 1
	mov	DWORD PTR j[rip], eax
.L21:
	mov	eax, DWORD PTR j[rip]
	cmp	eax, 352
	jle	.L22
	mov	eax, DWORD PTR i[rip]
	add	eax, 1
	mov	DWORD PTR i[rip], eax
.L20:
	mov	eax, DWORD PTR i[rip]
	cmp	eax, 288
	jle	.L23
	mov	DWORD PTR i[rip], 1
	jmp	.L24
.L38:
	mov	eax, DWORD PTR i[rip]
	cmp	eax, 1
	jne	.L25
	mov	DWORD PTR k[rip], 0
	jmp	.L26
.L27:
	mov	eax, DWORD PTR k[rip]
	mov	edx, DWORD PTR k[rip]
	cdqe
	lea	rcx, 0[0+rax*4]
	lea	rax, sobel[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, buffer1[rip]
	mov	DWORD PTR [rcx+rdx], eax
	mov	eax, DWORD PTR k[rip]
	mov	edx, DWORD PTR k[rip]
	cdqe
	add	rax, 352
	lea	rcx, 0[0+rax*4]
	lea	rax, sobel[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, buffer2[rip]
	mov	DWORD PTR [rcx+rdx], eax
	mov	eax, DWORD PTR k[rip]
	mov	edx, DWORD PTR k[rip]
	cdqe
	add	rax, 704
	lea	rcx, 0[0+rax*4]
	lea	rax, sobel[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, buffer3[rip]
	mov	DWORD PTR [rcx+rdx], eax
	mov	eax, DWORD PTR k[rip]
	add	eax, 1
	mov	DWORD PTR k[rip], eax
.L26:
	mov	eax, DWORD PTR k[rip]
	cmp	eax, 353
	jle	.L27
	jmp	.L28
.L25:
	mov	DWORD PTR k[rip], 0
	jmp	.L29
.L30:
	mov	eax, DWORD PTR k[rip]
	mov	edx, DWORD PTR k[rip]
	cdqe
	lea	rcx, 0[0+rax*4]
	lea	rax, buffer2[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, buffer1[rip]
	mov	DWORD PTR [rcx+rdx], eax
	mov	eax, DWORD PTR k[rip]
	mov	edx, DWORD PTR k[rip]
	cdqe
	lea	rcx, 0[0+rax*4]
	lea	rax, buffer3[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, buffer2[rip]
	mov	DWORD PTR [rcx+rdx], eax
	mov	eax, DWORD PTR i[rip]
	lea	edx, 1[rax]
	mov	eax, DWORD PTR k[rip]
	mov	ecx, DWORD PTR k[rip]
	movsx	rsi, eax
	movsx	rdx, edx
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rsi
	lea	rdx, 0[0+rax*4]
	lea	rax, sobel[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movsx	rdx, ecx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, buffer3[rip]
	mov	DWORD PTR [rcx+rdx], eax
	mov	eax, DWORD PTR k[rip]
	add	eax, 1
	mov	DWORD PTR k[rip], eax
.L29:
	mov	eax, DWORD PTR k[rip]
	cmp	eax, 353
	jle	.L30
.L28:
	mov	DWORD PTR j[rip], 1
	jmp	.L31
.L32:
	mov	eax, DWORD PTR j[rip]
	sub	eax, 1
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, buffer2[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, 0
	sub	eax, edx
	add	eax, eax
	mov	ecx, eax
	mov	eax, DWORD PTR j[rip]
	sub	eax, 1
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, buffer1[rip]
	mov	eax, DWORD PTR [rdx+rax]
	sub	ecx, eax
	mov	eax, DWORD PTR j[rip]
	sub	eax, 1
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, buffer3[rip]
	mov	eax, DWORD PTR [rdx+rax]
	sub	ecx, eax
	mov	eax, DWORD PTR j[rip]
	add	eax, 1
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, buffer1[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	ecx, eax
	mov	eax, DWORD PTR j[rip]
	add	eax, 1
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, buffer2[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	eax, eax
	lea	esi, [rcx+rax]
	mov	eax, DWORD PTR j[rip]
	add	eax, 1
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, buffer3[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	add	ecx, esi
	movsx	rsi, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rsi
	lea	rdx, 0[0+rax*4]
	lea	rax, newsobelx[rip]
	mov	DWORD PTR [rdx+rax], ecx
	mov	eax, DWORD PTR j[rip]
	add	eax, 1
	mov	DWORD PTR j[rip], eax
.L31:
	mov	eax, DWORD PTR j[rip]
	cmp	eax, 352
	jle	.L32
	mov	eax, DWORD PTR i[rip]
	cmp	eax, 1
	jne	.L33
	mov	DWORD PTR j[rip], 1
	jmp	.L34
.L37:
	mov	DWORD PTR i[rip], 1
	jmp	.L35
.L36:
	mov	eax, DWORD PTR i[rip]
	lea	edx, -1[rax]
	mov	eax, DWORD PTR j[rip]
	sub	eax, 1
	movsx	rcx, eax
	movsx	rdx, edx
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, sobel[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR i[rip]
	lea	edx, 1[rax]
	mov	eax, DWORD PTR j[rip]
	sub	eax, 1
	movsx	rsi, eax
	movsx	rdx, edx
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rsi
	lea	rdx, 0[0+rax*4]
	lea	rax, sobel[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	esi, ecx
	sub	esi, eax
	mov	eax, DWORD PTR i[rip]
	lea	edx, -1[rax]
	mov	eax, DWORD PTR j[rip]
	movsx	rcx, eax
	movsx	rdx, edx
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, sobel[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	eax, eax
	add	esi, eax
	mov	eax, DWORD PTR i[rip]
	lea	edx, 1[rax]
	mov	eax, DWORD PTR j[rip]
	movsx	rcx, eax
	movsx	rdx, edx
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, sobel[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, 0
	sub	eax, edx
	add	eax, eax
	add	esi, eax
	mov	eax, DWORD PTR i[rip]
	lea	edx, -1[rax]
	mov	eax, DWORD PTR j[rip]
	add	eax, 1
	movsx	rcx, eax
	movsx	rdx, edx
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, sobel[rip]
	mov	eax, DWORD PTR [rdx+rax]
	lea	ecx, [rsi+rax]
	mov	eax, DWORD PTR i[rip]
	lea	edx, 1[rax]
	mov	eax, DWORD PTR j[rip]
	add	eax, 1
	movsx	rsi, eax
	movsx	rdx, edx
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rsi
	lea	rdx, 0[0+rax*4]
	lea	rax, sobel[rip]
	mov	esi, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	sub	ecx, esi
	movsx	rsi, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rsi
	lea	rdx, 0[0+rax*4]
	lea	rax, newsobely[rip]
	mov	DWORD PTR [rdx+rax], ecx
	mov	eax, DWORD PTR i[rip]
	add	eax, 1
	mov	DWORD PTR i[rip], eax
.L35:
	mov	eax, DWORD PTR i[rip]
	cmp	eax, 288
	jle	.L36
	mov	eax, DWORD PTR j[rip]
	add	eax, 1
	mov	DWORD PTR j[rip], eax
.L34:
	mov	eax, DWORD PTR j[rip]
	cmp	eax, 352
	jle	.L37
.L33:
	mov	eax, DWORD PTR i[rip]
	add	eax, 1
	mov	DWORD PTR i[rip], eax
.L24:
	mov	eax, DWORD PTR i[rip]
	cmp	eax, 288
	jle	.L38
	mov	DWORD PTR i[rip], 0
	jmp	.L39
.L43:
	mov	DWORD PTR j[rip], 0
	jmp	.L40
.L42:
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, newsobely[rip]
	mov	eax, DWORD PTR [rdx+rax]
	test	eax, eax
	jne	.L41
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, newsobely[rip]
	mov	DWORD PTR [rdx+rax], 1
.L41:
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, newsobelx[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rsi, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rsi
	lea	rdx, 0[0+rax*4]
	lea	rax, newsobelx[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	esi, ecx
	imul	esi, eax
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, newsobely[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rdi, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rdi
	lea	rdx, 0[0+rax*4]
	lea	rax, newsobely[rip]
	mov	eax, DWORD PTR [rdx+rax]
	imul	eax, ecx
	add	eax, esi
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, eax
	movsd	QWORD PTR z[rip], xmm0
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, newsobelx[rip]
	mov	eax, DWORD PTR [rdx+rax]
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, eax
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, newsobely[rip]
	mov	eax, DWORD PTR [rdx+rax]
	pxor	xmm1, xmm1
	cvtsi2ss	xmm1, eax
	divss	xmm0, xmm1
	movss	DWORD PTR l[rip], xmm0
	mov	rax, QWORD PTR z[rip]
	mov	ebx, DWORD PTR i[rip]
	mov	r12d, DWORD PTR j[rip]
	movq	xmm0, rax
	call	sqrt@PLT
	movq	rcx, xmm0
	movsx	rsi, r12d
	movsx	rdx, ebx
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rsi
	lea	rdx, 0[0+rax*8]
	lea	rax, es[rip]
	mov	QWORD PTR [rdx+rax], rcx
	movss	xmm0, DWORD PTR l[rip]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, xmm0
	movq	rax, xmm2
	movq	xmm0, rax
	call	atan@PLT
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	cvtsd2ss	xmm0, xmm0
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, eo[rip]
	movss	DWORD PTR [rdx+rax], xmm0
	mov	eax, DWORD PTR j[rip]
	add	eax, 1
	mov	DWORD PTR j[rip], eax
.L40:
	mov	eax, DWORD PTR j[rip]
	cmp	eax, 351
	jle	.L42
	mov	eax, DWORD PTR i[rip]
	add	eax, 1
	mov	DWORD PTR i[rip], eax
.L39:
	mov	eax, DWORD PTR i[rip]
	cmp	eax, 287
	jle	.L43
	mov	DWORD PTR i[rip], 1
	jmp	.L44
.L47:
	mov	DWORD PTR j[rip], 1
	jmp	.L45
.L46:
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*8]
	lea	rax, es[rip]
	movsd	xmm0, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR i[rip]
	lea	edx, -1[rax]
	mov	eax, DWORD PTR j[rip]
	sub	eax, 1
	cvttsd2si	ecx, xmm0
	movsx	rsi, eax
	movsx	rdx, edx
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rsi
	lea	rdx, 0[0+rax*4]
	lea	rax, current_y[rip]
	mov	DWORD PTR [rdx+rax], ecx
	mov	eax, DWORD PTR j[rip]
	add	eax, 1
	mov	DWORD PTR j[rip], eax
.L45:
	mov	eax, DWORD PTR j[rip]
	cmp	eax, 352
	jle	.L46
	mov	eax, DWORD PTR i[rip]
	add	eax, 1
	mov	DWORD PTR i[rip], eax
.L44:
	mov	eax, DWORD PTR i[rip]
	cmp	eax, 288
	jle	.L47
	mov	DWORD PTR i[rip], 0
	jmp	.L48
.L53:
	mov	DWORD PTR j[rip], 0
	jmp	.L49
.L52:
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, eo[rip]
	movss	xmm1, DWORD PTR [rdx+rax]
	movss	xmm0, DWORD PTR .LC0[rip]
	mulss	xmm0, xmm1
	cvtss2sd	xmm0, xmm0
	movsd	xmm1, QWORD PTR .LC1[rip]
	divsd	xmm0, xmm1
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	cvtsd2ss	xmm0, xmm0
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, eo[rip]
	movss	DWORD PTR [rdx+rax], xmm0
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, eo[rip]
	movss	xmm1, DWORD PTR [rdx+rax]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jbe	.L50
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, eo[rip]
	movss	xmm1, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movss	xmm0, DWORD PTR .LC0[rip]
	addss	xmm0, xmm1
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, eo[rip]
	movss	DWORD PTR [rdx+rax], xmm0
.L50:
	mov	eax, DWORD PTR j[rip]
	add	eax, 1
	mov	DWORD PTR j[rip], eax
.L49:
	mov	eax, DWORD PTR j[rip]
	cmp	eax, 351
	jle	.L52
	mov	eax, DWORD PTR i[rip]
	add	eax, 1
	mov	DWORD PTR i[rip], eax
.L48:
	mov	eax, DWORD PTR i[rip]
	cmp	eax, 287
	jle	.L53
	mov	DWORD PTR i[rip], 1
	jmp	.L54
.L75:
	mov	DWORD PTR j[rip], 1
	jmp	.L55
.L74:
	mov	DWORD PTR q[rip], 0
	mov	DWORD PTR r[rip], 0
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, eo[rip]
	movss	xmm0, DWORD PTR [rdx+rax]
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jb	.L56
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, eo[rip]
	movss	xmm1, DWORD PTR [rdx+rax]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	ja	.L58
.L56:
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, eo[rip]
	movss	xmm0, DWORD PTR [rdx+rax]
	comiss	xmm0, DWORD PTR .LC4[rip]
	jb	.L59
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, eo[rip]
	movss	xmm1, DWORD PTR [rdx+rax]
	movss	xmm0, DWORD PTR .LC0[rip]
	comiss	xmm0, xmm1
	jb	.L59
.L58:
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	add	edx, 1
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, current_y[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR q[rip], eax
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	sub	edx, 1
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, current_y[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR r[rip], eax
	jmp	.L62
.L59:
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, eo[rip]
	movss	xmm0, DWORD PTR [rdx+rax]
	comiss	xmm0, DWORD PTR .LC3[rip]
	jb	.L63
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, eo[rip]
	movss	xmm1, DWORD PTR [rdx+rax]
	movss	xmm0, DWORD PTR .LC5[rip]
	comiss	xmm0, xmm1
	jbe	.L63
	mov	eax, DWORD PTR i[rip]
	lea	edx, 1[rax]
	mov	eax, DWORD PTR j[rip]
	sub	eax, 1
	movsx	rcx, eax
	movsx	rdx, edx
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, eo[rip]
	movss	xmm0, DWORD PTR [rdx+rax]
	cvttss2si	eax, xmm0
	mov	DWORD PTR q[rip], eax
	mov	eax, DWORD PTR i[rip]
	lea	edx, -1[rax]
	mov	eax, DWORD PTR j[rip]
	add	eax, 1
	movsx	rcx, eax
	movsx	rdx, edx
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, eo[rip]
	movss	xmm0, DWORD PTR [rdx+rax]
	cvttss2si	eax, xmm0
	mov	DWORD PTR r[rip], eax
	jmp	.L62
.L63:
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, eo[rip]
	movss	xmm0, DWORD PTR [rdx+rax]
	comiss	xmm0, DWORD PTR .LC5[rip]
	jb	.L66
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, eo[rip]
	movss	xmm1, DWORD PTR [rdx+rax]
	movss	xmm0, DWORD PTR .LC6[rip]
	comiss	xmm0, xmm1
	jbe	.L66
	mov	eax, DWORD PTR i[rip]
	lea	edx, 1[rax]
	mov	eax, DWORD PTR j[rip]
	movsx	rcx, eax
	movsx	rdx, edx
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, current_y[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR q[rip], eax
	mov	eax, DWORD PTR i[rip]
	lea	edx, -1[rax]
	mov	eax, DWORD PTR j[rip]
	movsx	rcx, eax
	movsx	rdx, edx
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, current_y[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR r[rip], eax
	jmp	.L62
.L66:
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, eo[rip]
	movss	xmm0, DWORD PTR [rdx+rax]
	comiss	xmm0, DWORD PTR .LC6[rip]
	jb	.L62
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, eo[rip]
	movss	xmm1, DWORD PTR [rdx+rax]
	movss	xmm0, DWORD PTR .LC4[rip]
	comiss	xmm0, xmm1
	jbe	.L62
	mov	eax, DWORD PTR i[rip]
	lea	edx, -1[rax]
	mov	eax, DWORD PTR j[rip]
	sub	eax, 1
	movsx	rcx, eax
	movsx	rdx, edx
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, current_y[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR q[rip], eax
	mov	eax, DWORD PTR i[rip]
	lea	edx, 1[rax]
	mov	eax, DWORD PTR j[rip]
	add	eax, 1
	movsx	rcx, eax
	movsx	rdx, edx
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, current_y[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR r[rip], eax
.L62:
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, current_y[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR q[rip]
	cmp	edx, eax
	jge	.L71
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, current_y[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR r[rip]
	cmp	edx, eax
	jl	.L72
.L71:
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	mov	ecx, DWORD PTR i[rip]
	mov	esi, DWORD PTR j[rip]
	movsx	rdi, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rdi
	lea	rdx, 0[0+rax*4]
	lea	rax, current_y[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movsx	rsi, esi
	movsx	rdx, ecx
	imul	rdx, rdx, 354
	add	rdx, rsi
	lea	rcx, 0[0+rdx*4]
	lea	rdx, nonmaximum[rip]
	mov	DWORD PTR [rcx+rdx], eax
	jmp	.L73
.L72:
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rdx, edx
	cdqe
	imul	rax, rax, 354
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	lea	rax, nonmaximum[rip]
	mov	DWORD PTR [rdx+rax], 0
.L73:
	mov	eax, DWORD PTR j[rip]
	add	eax, 1
	mov	DWORD PTR j[rip], eax
.L55:
	mov	eax, DWORD PTR j[rip]
	cmp	eax, 350
	jle	.L74
	mov	eax, DWORD PTR i[rip]
	add	eax, 1
	mov	DWORD PTR i[rip], eax
.L54:
	mov	eax, DWORD PTR i[rip]
	cmp	eax, 286
	jle	.L75
	mov	DWORD PTR i[rip], 1
	jmp	.L76
.L79:
	mov	DWORD PTR j[rip], 1
	jmp	.L77
.L78:
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	mov	ecx, DWORD PTR i[rip]
	lea	esi, -1[rcx]
	mov	ecx, DWORD PTR j[rip]
	lea	edi, -1[rcx]
	movsx	rdx, edx
	cdqe
	imul	rax, rax, 354
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	lea	rax, nonmaximum[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	movsx	rdi, edi
	movsx	rdx, esi
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rdi
	lea	rdx, 0[0+rax*4]
	lea	rax, current_y[rip]
	mov	DWORD PTR [rdx+rax], ecx
	mov	eax, DWORD PTR j[rip]
	add	eax, 1
	mov	DWORD PTR j[rip], eax
.L77:
	mov	eax, DWORD PTR j[rip]
	cmp	eax, 352
	jle	.L78
	mov	eax, DWORD PTR i[rip]
	add	eax, 1
	mov	DWORD PTR i[rip], eax
.L76:
	mov	eax, DWORD PTR i[rip]
	cmp	eax, 288
	jle	.L79
	mov	DWORD PTR i[rip], 0
	jmp	.L80
.L86:
	mov	DWORD PTR j[rip], 0
	jmp	.L81
.L85:
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, current_y[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR t1[rip]
	cmp	edx, eax
	jg	.L82
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, current_y[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR t2[rip]
	cmp	edx, eax
	jl	.L82
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rdx, edx
	cdqe
	imul	rax, rax, 354
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	lea	rax, threshold[rip]
	mov	DWORD PTR [rdx+rax], 100
	jmp	.L83
.L82:
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, current_y[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR t1[rip]
	cmp	edx, eax
	jle	.L84
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rdx, edx
	cdqe
	imul	rax, rax, 354
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	lea	rax, threshold[rip]
	mov	DWORD PTR [rdx+rax], 255
	jmp	.L83
.L84:
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, current_y[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR t2[rip]
	cmp	edx, eax
	jge	.L83
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rdx, edx
	cdqe
	imul	rax, rax, 354
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	lea	rax, threshold[rip]
	mov	DWORD PTR [rdx+rax], 0
.L83:
	mov	eax, DWORD PTR j[rip]
	add	eax, 1
	mov	DWORD PTR j[rip], eax
.L81:
	mov	eax, DWORD PTR j[rip]
	cmp	eax, 351
	jle	.L85
	mov	eax, DWORD PTR i[rip]
	add	eax, 1
	mov	DWORD PTR i[rip], eax
.L80:
	mov	eax, DWORD PTR i[rip]
	cmp	eax, 287
	jle	.L86
	mov	DWORD PTR i[rip], 1
	jmp	.L87
.L99:
	mov	eax, DWORD PTR i[rip]
	cmp	eax, 1
	jne	.L88
	mov	DWORD PTR k[rip], 0
	jmp	.L89
.L90:
	mov	eax, DWORD PTR k[rip]
	mov	edx, DWORD PTR k[rip]
	cdqe
	lea	rcx, 0[0+rax*4]
	lea	rax, threshold[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, buffer1[rip]
	mov	DWORD PTR [rcx+rdx], eax
	mov	eax, DWORD PTR k[rip]
	mov	edx, DWORD PTR k[rip]
	cdqe
	add	rax, 354
	lea	rcx, 0[0+rax*4]
	lea	rax, threshold[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, buffer2[rip]
	mov	DWORD PTR [rcx+rdx], eax
	mov	eax, DWORD PTR k[rip]
	mov	edx, DWORD PTR k[rip]
	cdqe
	add	rax, 708
	lea	rcx, 0[0+rax*4]
	lea	rax, threshold[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, buffer3[rip]
	mov	DWORD PTR [rcx+rdx], eax
	mov	eax, DWORD PTR k[rip]
	add	eax, 1
	mov	DWORD PTR k[rip], eax
.L89:
	mov	eax, DWORD PTR k[rip]
	cmp	eax, 353
	jle	.L90
	jmp	.L91
.L88:
	mov	DWORD PTR k[rip], 0
	jmp	.L92
.L93:
	mov	eax, DWORD PTR k[rip]
	mov	edx, DWORD PTR k[rip]
	cdqe
	lea	rcx, 0[0+rax*4]
	lea	rax, buffer2[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, buffer1[rip]
	mov	DWORD PTR [rcx+rdx], eax
	mov	eax, DWORD PTR k[rip]
	mov	edx, DWORD PTR k[rip]
	cdqe
	lea	rcx, 0[0+rax*4]
	lea	rax, buffer3[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, buffer2[rip]
	mov	DWORD PTR [rcx+rdx], eax
	mov	eax, DWORD PTR i[rip]
	lea	ecx, 1[rax]
	mov	eax, DWORD PTR k[rip]
	mov	edx, DWORD PTR k[rip]
	movsx	rsi, eax
	movsx	rax, ecx
	imul	rax, rax, 354
	add	rax, rsi
	lea	rcx, 0[0+rax*4]
	lea	rax, threshold[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, buffer3[rip]
	mov	DWORD PTR [rcx+rdx], eax
	mov	eax, DWORD PTR k[rip]
	add	eax, 1
	mov	DWORD PTR k[rip], eax
.L92:
	mov	eax, DWORD PTR k[rip]
	cmp	eax, 353
	jle	.L93
.L91:
	mov	DWORD PTR j[rip], 1
	jmp	.L94
.L98:
	mov	eax, DWORD PTR j[rip]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, buffer2[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 100
	jne	.L95
	mov	eax, DWORD PTR j[rip]
	sub	eax, 1
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, buffer3[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 255
	je	.L96
	mov	eax, DWORD PTR j[rip]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, buffer3[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 255
	je	.L96
	mov	eax, DWORD PTR j[rip]
	add	eax, 1
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, buffer3[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 255
	je	.L96
	mov	eax, DWORD PTR j[rip]
	sub	eax, 1
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, buffer2[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 255
	je	.L96
	mov	eax, DWORD PTR j[rip]
	add	eax, 1
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, buffer2[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 255
	je	.L96
	mov	eax, DWORD PTR j[rip]
	sub	eax, 1
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, buffer1[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 255
	je	.L96
	mov	eax, DWORD PTR j[rip]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, buffer1[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 255
	je	.L96
	mov	eax, DWORD PTR j[rip]
	add	eax, 1
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, buffer1[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 255
	jne	.L97
.L96:
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rdx, edx
	cdqe
	imul	rax, rax, 354
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	lea	rax, threshold[rip]
	mov	DWORD PTR [rdx+rax], 255
	jmp	.L95
.L97:
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rdx, edx
	cdqe
	imul	rax, rax, 354
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	lea	rax, threshold[rip]
	mov	DWORD PTR [rdx+rax], 0
.L95:
	mov	eax, DWORD PTR j[rip]
	add	eax, 1
	mov	DWORD PTR j[rip], eax
.L94:
	mov	eax, DWORD PTR j[rip]
	cmp	eax, 350
	jle	.L98
	mov	eax, DWORD PTR i[rip]
	add	eax, 1
	mov	DWORD PTR i[rip], eax
.L87:
	mov	eax, DWORD PTR i[rip]
	cmp	eax, 288
	jle	.L99
	mov	DWORD PTR i[rip], 1
	jmp	.L100
.L103:
	mov	DWORD PTR j[rip], 1
	jmp	.L101
.L102:
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	mov	ecx, DWORD PTR i[rip]
	lea	esi, -1[rcx]
	mov	ecx, DWORD PTR j[rip]
	lea	edi, -1[rcx]
	movsx	rdx, edx
	cdqe
	imul	rax, rax, 354
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	lea	rax, threshold[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	movsx	rdi, edi
	movsx	rdx, esi
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rdi
	lea	rdx, 0[0+rax*4]
	lea	rax, current_y[rip]
	mov	DWORD PTR [rdx+rax], ecx
	mov	eax, DWORD PTR j[rip]
	add	eax, 1
	mov	DWORD PTR j[rip], eax
.L101:
	mov	eax, DWORD PTR j[rip]
	cmp	eax, 352
	jle	.L102
	mov	eax, DWORD PTR i[rip]
	add	eax, 1
	mov	DWORD PTR i[rip], eax
.L100:
	mov	eax, DWORD PTR i[rip]
	cmp	eax, 288
	jle	.L103
	nop
	nop
	pop	rbx
	pop	r12
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	canny, .-canny
	.section	.rodata
.LC7:
	.string	"rb"
.LC8:
	.string	"akiyo_cif_0_yuv444.yuv"
.LC9:
	.string	"current frame doesn't exist"
	.text
	.globl	read
	.type	read, @function
read:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r12
	push	rbx
	sub	rsp, 16
	.cfi_offset 12, -24
	.cfi_offset 3, -32
	lea	rsi, .LC7[rip]
	lea	rdi, .LC8[rip]
	call	fopen@PLT
	mov	QWORD PTR -24[rbp], rax
	cmp	QWORD PTR -24[rbp], 0
	jne	.L114
	lea	rdi, .LC9[rip]
	call	puts@PLT
	call	getchar@PLT
	mov	edi, -1
	call	exit@PLT
.L114:
	mov	DWORD PTR i[rip], 0
	jmp	.L115
.L118:
	mov	DWORD PTR j[rip], 0
	jmp	.L116
.L117:
	mov	ebx, DWORD PTR i[rip]
	mov	r12d, DWORD PTR j[rip]
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	fgetc@PLT
	mov	ecx, eax
	movsx	rsi, r12d
	movsx	rdx, ebx
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rsi
	lea	rdx, 0[0+rax*4]
	lea	rax, current_y[rip]
	mov	DWORD PTR [rdx+rax], ecx
	mov	eax, DWORD PTR j[rip]
	add	eax, 1
	mov	DWORD PTR j[rip], eax
.L116:
	mov	eax, DWORD PTR j[rip]
	cmp	eax, 351
	jle	.L117
	mov	eax, DWORD PTR i[rip]
	add	eax, 1
	mov	DWORD PTR i[rip], eax
.L115:
	mov	eax, DWORD PTR i[rip]
	cmp	eax, 287
	jle	.L118
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	fclose@PLT
	nop
	add	rsp, 16
	pop	rbx
	pop	r12
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	read, .-read
	.section	.rodata
.LC10:
	.string	"wb"
.LC11:
	.string	"akiyo2y.yuv"
	.text
	.globl	write
	.type	write, @function
write:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	lea	rsi, .LC10[rip]
	lea	rdi, .LC11[rip]
	call	fopen@PLT
	mov	QWORD PTR -8[rbp], rax
	mov	DWORD PTR i[rip], 0
	jmp	.L120
.L123:
	mov	DWORD PTR j[rip], 0
	jmp	.L121
.L122:
	mov	eax, DWORD PTR i[rip]
	mov	edx, DWORD PTR j[rip]
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 5
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, current_y[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	rdx, QWORD PTR -8[rbp]
	mov	rsi, rdx
	mov	edi, eax
	call	fputc@PLT
	mov	eax, DWORD PTR j[rip]
	add	eax, 1
	mov	DWORD PTR j[rip], eax
.L121:
	mov	eax, DWORD PTR j[rip]
	cmp	eax, 351
	jle	.L122
	mov	eax, DWORD PTR i[rip]
	add	eax, 1
	mov	DWORD PTR i[rip], eax
.L120:
	mov	eax, DWORD PTR i[rip]
	cmp	eax, 287
	jle	.L123
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	fclose@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	write, .-write
	.globl	main
	.type	main, @function
main:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	read
	mov	eax, 0
	call	canny
	mov	eax, 0
	call	write
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	main, .-main
	.section	.rodata
	.align 4
.LC0:
	.long	1127481344
	.align 8
.LC1:
	.long	1374389535
	.long	1074339512
	.align 4
.LC3:
	.long	1102315520
	.align 4
.LC4:
	.long	1126006784
	.align 4
.LC5:
	.long	1116143616
	.align 4
.LC6:
	.long	1122041856
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"103266096.c"
	.text
	.comm	buffer1,1416,4
	.comm	buffer2,1416,4
	.comm	buffer3,1416,4
	.comm	current_y,405504,4
	.comm	i,4,4
	.comm	j,4,4
	.comm	k,4,4
	.comm	gauss,410640,4
	.comm	newgauss,410640,4
	.comm	nonmaximum,410640,4
	.comm	threshold,410640,4
	.comm	sobel,405504,4
	.comm	newsobelx,405504,4
	.comm	newsobely,405504,4
	.comm	es,811008,8
	.comm	eo,405504,4
	.global	z
	.bss
	.align	3
	.type	z, %object
	.size	z, 8
z:
	.space	8
	.global	l
	.align	2
	.type	l, %object
	.size	l, 4
l:
	.space	4
	.global	q
	.align	2
	.type	q, %object
	.size	q, 4
q:
	.space	4
	.global	r
	.align	2
	.type	r, %object
	.size	r, 4
r:
	.space	4
	.global	t1
	.data
	.align	2
	.type	t1, %object
	.size	t1, 4
t1:
	.word	70
	.global	t2
	.align	2
	.type	t2, %object
	.size	t2, 4
t2:
	.word	60
	.global	__aeabi_i2d
	.global	__aeabi_i2f
	.global	__aeabi_fdiv
	.global	__aeabi_f2d
	.global	__aeabi_d2f
	.global	__aeabi_d2iz
	.global	__aeabi_fmul
	.global	__aeabi_ddiv
	.global	__aeabi_fcmplt
	.global	__aeabi_fadd
	.global	__aeabi_fcmpge
	.global	__aeabi_fcmple
	.global	__aeabi_f2iz
	.text
	.align	2
	.global	canny
	.syntax unified
	.arm
	.fpu softvfp
	.type	canny, %function
canny:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	ldr	r3, .L113
	mov	r2, #0
	str	r2, [r3]
	b	.L2
.L5:
	ldr	r3, .L113+4
	mov	r2, #0
	str	r2, [r3]
	b	.L3
.L4:
	ldr	r3, .L113
	ldr	r2, [r3]
	ldr	r3, .L113+4
	ldr	r1, [r3]
	ldr	r0, .L113+8
	mov	r3, r2
	lsl	r3, r3, #4
	sub	r3, r3, r2
	lsl	r3, r3, #2
	sub	r3, r3, r2
	lsl	r2, r3, #2
	sub	r2, r2, r3
	lsl	r3, r2, #1
	mov	r2, r3
	add	r3, r2, r1
	mov	r2, #0
	str	r2, [r0, r3, lsl #2]
	ldr	r3, .L113+4
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113+4
	str	r3, [r2]
.L3:
	ldr	r3, .L113+4
	ldr	r3, [r3]
	ldr	r2, .L113+104
	cmp	r3, r2
	ble	.L4
	ldr	r3, .L113
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113
	str	r3, [r2]
.L2:
	ldr	r3, .L113
	ldr	r3, [r3]
	ldr	r2, .L113+12
	cmp	r3, r2
	ble	.L5
	ldr	r3, .L113
	ldr	r2, [r3]
	ldr	r3, .L113+4
	ldr	r1, [r3]
	ldr	r0, .L113+16
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	mov	r2, #0
	str	r2, [r0, r3, lsl #2]
	ldr	r3, .L113
	ldr	r2, [r3]
	ldr	r3, .L113+4
	ldr	r1, [r3]
	ldr	r0, .L113+88
	mov	r3, r2
	lsl	r3, r3, #4
	sub	r3, r3, r2
	lsl	r3, r3, #2
	sub	r3, r3, r2
	lsl	r2, r3, #2
	sub	r2, r2, r3
	lsl	r3, r2, #1
	mov	r2, r3
	add	r3, r2, r1
	mov	r2, #0
	str	r2, [r0, r3, lsl #2]
	ldr	r3, .L113+128
	add	r3, r3, #405504
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #3712]
	ldr	r3, .L113
	mov	r2, #1
	str	r2, [r3]
	b	.L6
.L9:
	ldr	r3, .L113+4
	mov	r2, #1
	str	r2, [r3]
	b	.L7
.L8:
	ldr	r3, .L113
	ldr	r3, [r3]
	sub	r1, r3, #1
	ldr	r3, .L113+4
	ldr	r3, [r3]
	sub	ip, r3, #1
	ldr	r3, .L113
	ldr	r2, [r3]
	ldr	r3, .L113+4
	ldr	r0, [r3]
	ldr	lr, .L113+132
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r3, r3, #1
	add	r3, r3, r1
	lsl	r3, r3, #5
	add	r3, r3, ip
	ldr	r1, [lr, r3, lsl #2]
	ldr	ip, .L113+8
	mov	r3, r2
	lsl	r3, r3, #4
	sub	r3, r3, r2
	lsl	r3, r3, #2
	sub	r3, r3, r2
	lsl	r2, r3, #2
	sub	r2, r2, r3
	lsl	r3, r2, #1
	mov	r2, r3
	add	r3, r2, r0
	str	r1, [ip, r3, lsl #2]
	ldr	r3, .L113+4
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113+4
	str	r3, [r2]
.L7:
	ldr	r3, .L113+4
	ldr	r3, [r3]
	cmp	r3, #352
	ble	.L8
	ldr	r3, .L113
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113
	str	r3, [r2]
.L6:
	ldr	r3, .L113
	ldr	r3, [r3]
	cmp	r3, #288
	ble	.L9
	ldr	r3, .L113
	mov	r2, #1
	str	r2, [r3]
	b	.L10
.L19:
	ldr	r3, .L113
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L11
	ldr	r3, .L113+100
	mov	r2, #0
	str	r2, [r3]
	b	.L12
.L13:
	ldr	r3, .L113+100
	ldr	r2, [r3]
	ldr	r3, .L113+100
	ldr	r3, [r3]
	ldr	r1, .L113+8
	ldr	r2, [r1, r2, lsl #2]
	ldr	r1, .L113+116
	str	r2, [r1, r3, lsl #2]
	ldr	r3, .L113+100
	ldr	r3, [r3]
	ldr	r2, .L113+100
	ldr	r2, [r2]
	ldr	r1, .L113+8
	add	r3, r3, #352
	add	r3, r3, #2
	ldr	r3, [r1, r3, lsl #2]
	ldr	r1, .L113+112
	str	r3, [r1, r2, lsl #2]
	ldr	r3, .L113+100
	ldr	r2, [r3]
	ldr	r3, .L113+100
	ldr	r3, [r3]
	ldr	r1, .L113+8
	add	r2, r2, #708
	ldr	r2, [r1, r2, lsl #2]
	ldr	r1, .L113+108
	str	r2, [r1, r3, lsl #2]
	ldr	r3, .L113+100
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113+100
	str	r3, [r2]
.L12:
	ldr	r3, .L113+100
	ldr	r3, [r3]
	ldr	r2, .L113+104
	cmp	r3, r2
	ble	.L13
	b	.L14
.L11:
	ldr	r3, .L113+100
	mov	r2, #0
	str	r2, [r3]
	b	.L15
.L16:
	ldr	r3, .L113+100
	ldr	r2, [r3]
	ldr	r3, .L113+100
	ldr	r3, [r3]
	ldr	r1, .L113+112
	ldr	r2, [r1, r2, lsl #2]
	ldr	r1, .L113+116
	str	r2, [r1, r3, lsl #2]
	ldr	r3, .L113+100
	ldr	r2, [r3]
	ldr	r3, .L113+100
	ldr	r3, [r3]
	ldr	r1, .L113+108
	ldr	r2, [r1, r2, lsl #2]
	ldr	r1, .L113+112
	str	r2, [r1, r3, lsl #2]
	ldr	r3, .L113
	ldr	r3, [r3]
	add	r2, r3, #1
	ldr	r3, .L113+100
	ldr	r0, [r3]
	ldr	r3, .L113+100
	ldr	r1, [r3]
	ldr	ip, .L113+8
	mov	r3, r2
	lsl	r3, r3, #4
	sub	r3, r3, r2
	lsl	r3, r3, #2
	sub	r3, r3, r2
	lsl	r2, r3, #2
	sub	r2, r2, r3
	lsl	r3, r2, #1
	mov	r2, r3
	add	r3, r2, r0
	ldr	r3, [ip, r3, lsl #2]
	ldr	r2, .L113+108
	str	r3, [r2, r1, lsl #2]
	ldr	r3, .L113+100
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113+100
	str	r3, [r2]
.L15:
	ldr	r3, .L113+100
	ldr	r3, [r3]
	ldr	r2, .L113+104
	cmp	r3, r2
	ble	.L16
.L14:
	ldr	r3, .L113+4
	mov	r2, #1
	str	r2, [r3]
	b	.L17
.L18:
	ldr	r3, .L113+4
	ldr	r3, [r3]
	ldr	r2, .L113+112
	ldr	r3, [r2, r3, lsl #2]
	lsl	r2, r3, #2
	ldr	r3, .L113+4
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r1, .L113+116
	ldr	r3, [r1, r3, lsl #2]
	add	r2, r2, r3
	ldr	r3, .L113+4
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r1, .L113+112
	ldr	r3, [r1, r3, lsl #2]
	lsl	r3, r3, #1
	add	r2, r2, r3
	ldr	r3, .L113+4
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r1, .L113+108
	ldr	r3, [r1, r3, lsl #2]
	add	r2, r2, r3
	ldr	r3, .L113+4
	ldr	r3, [r3]
	ldr	r1, .L113+116
	ldr	r3, [r1, r3, lsl #2]
	lsl	r3, r3, #1
	add	r2, r2, r3
	ldr	r3, .L113+4
	ldr	r3, [r3]
	ldr	r1, .L113+108
	ldr	r3, [r1, r3, lsl #2]
	lsl	r3, r3, #1
	add	r2, r2, r3
	ldr	r3, .L113+4
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r1, .L113+116
	ldr	r3, [r1, r3, lsl #2]
	add	r2, r2, r3
	ldr	r3, .L113+4
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r1, .L113+112
	ldr	r3, [r1, r3, lsl #2]
	lsl	r3, r3, #1
	add	r1, r2, r3
	ldr	r3, .L113+4
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113+108
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L113
	ldr	r2, [r2]
	ldr	r0, .L113+4
	ldr	r0, [r0]
	add	r1, r1, r3
	ldr	ip, .L113+20
	mov	r3, r2
	lsl	r3, r3, #4
	sub	r3, r3, r2
	lsl	r3, r3, #2
	sub	r3, r3, r2
	lsl	r2, r3, #2
	sub	r2, r2, r3
	lsl	r3, r2, #1
	mov	r2, r3
	add	r3, r2, r0
	str	r1, [ip, r3, lsl #2]
	ldr	r3, .L113+4
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113+4
	str	r3, [r2]
.L17:
	ldr	r3, .L113+4
	ldr	r3, [r3]
	cmp	r3, #352
	ble	.L18
	ldr	r3, .L113
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113
	str	r3, [r2]
.L10:
	ldr	r3, .L113
	ldr	r3, [r3]
	cmp	r3, #288
	ble	.L19
	ldr	r3, .L113
	mov	r2, #1
	str	r2, [r3]
	b	.L20
.L23:
	ldr	r3, .L113+4
	mov	r2, #1
	str	r2, [r3]
	b	.L21
.L22:
	ldr	r3, .L113
	ldr	r2, [r3]
	ldr	r3, .L113+4
	ldr	r1, [r3]
	ldr	r0, .L113+20
	mov	r3, r2
	lsl	r3, r3, #4
	sub	r3, r3, r2
	lsl	r3, r3, #2
	sub	r3, r3, r2
	lsl	r2, r3, #2
	sub	r2, r2, r3
	lsl	r3, r2, #1
	mov	r2, r3
	add	r3, r2, r1
	ldr	r0, [r0, r3, lsl #2]
	ldr	r3, .L113
	ldr	r3, [r3]
	sub	r2, r3, #1
	ldr	r3, .L113+4
	ldr	r3, [r3]
	sub	r1, r3, #1
	mov	r3, r0
	add	r0, r3, #15
	cmp	r3, #0
	movlt	r3, r0
	movge	r3, r3
	asr	r3, r3, #4
	mov	ip, r3
	ldr	r0, .L113+132
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	str	ip, [r0, r3, lsl #2]
	ldr	r3, .L113
	ldr	r3, [r3]
	sub	r1, r3, #1
	ldr	r3, .L113+4
	ldr	r3, [r3]
	sub	ip, r3, #1
	ldr	r3, .L113
	ldr	r3, [r3]
	sub	r2, r3, #1
	ldr	r3, .L113+4
	ldr	r3, [r3]
	sub	r0, r3, #1
	ldr	lr, .L113+132
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r3, r3, #1
	add	r3, r3, r1
	lsl	r3, r3, #5
	add	r3, r3, ip
	ldr	r1, [lr, r3, lsl #2]
	ldr	ip, .L113+16
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r0
	str	r1, [ip, r3, lsl #2]
	ldr	r3, .L113+4
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113+4
	str	r3, [r2]
.L21:
	ldr	r3, .L113+4
	ldr	r3, [r3]
	cmp	r3, #352
	ble	.L22
	ldr	r3, .L113
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113
	str	r3, [r2]
.L20:
	ldr	r3, .L113
	ldr	r3, [r3]
	cmp	r3, #288
	ble	.L23
	ldr	r3, .L113
	mov	r2, #1
	str	r2, [r3]
	b	.L24
.L38:
	ldr	r3, .L113
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L25
	ldr	r3, .L113+100
	mov	r2, #0
	str	r2, [r3]
	b	.L26
.L27:
	ldr	r3, .L113+100
	ldr	r2, [r3]
	ldr	r3, .L113+100
	ldr	r3, [r3]
	ldr	r1, .L113+16
	ldr	r2, [r1, r2, lsl #2]
	ldr	r1, .L113+116
	str	r2, [r1, r3, lsl #2]
	ldr	r3, .L113+100
	ldr	r2, [r3]
	ldr	r3, .L113+100
	ldr	r3, [r3]
	ldr	r1, .L113+16
	add	r2, r2, #352
	ldr	r2, [r1, r2, lsl #2]
	ldr	r1, .L113+112
	str	r2, [r1, r3, lsl #2]
	ldr	r3, .L113+100
	ldr	r2, [r3]
	ldr	r3, .L113+100
	ldr	r3, [r3]
	ldr	r1, .L113+16
	add	r2, r2, #704
	ldr	r2, [r1, r2, lsl #2]
	ldr	r1, .L113+108
	str	r2, [r1, r3, lsl #2]
	ldr	r3, .L113+100
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113+100
	str	r3, [r2]
.L26:
	ldr	r3, .L113+100
	ldr	r3, [r3]
	ldr	r2, .L113+104
	cmp	r3, r2
	ble	.L27
	b	.L28
.L25:
	ldr	r3, .L113+100
	mov	r2, #0
	str	r2, [r3]
	b	.L29
.L30:
	ldr	r3, .L113+100
	ldr	r2, [r3]
	ldr	r3, .L113+100
	ldr	r3, [r3]
	ldr	r1, .L113+112
	ldr	r2, [r1, r2, lsl #2]
	ldr	r1, .L113+116
	str	r2, [r1, r3, lsl #2]
	ldr	r3, .L113+100
	ldr	r2, [r3]
	ldr	r3, .L113+100
	ldr	r3, [r3]
	ldr	r1, .L113+108
	ldr	r2, [r1, r2, lsl #2]
	ldr	r1, .L113+112
	str	r2, [r1, r3, lsl #2]
	ldr	r3, .L113
	ldr	r3, [r3]
	add	r2, r3, #1
	ldr	r3, .L113+100
	ldr	r0, [r3]
	ldr	r3, .L113+100
	ldr	r1, [r3]
	ldr	ip, .L113+16
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r0
	ldr	r3, [ip, r3, lsl #2]
	ldr	r2, .L113+108
	str	r3, [r2, r1, lsl #2]
	ldr	r3, .L113+100
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113+100
	str	r3, [r2]
.L29:
	ldr	r3, .L113+100
	ldr	r3, [r3]
	ldr	r2, .L113+104
	cmp	r3, r2
	ble	.L30
.L28:
	ldr	r3, .L113+4
	mov	r2, #1
	str	r2, [r3]
	b	.L31
.L32:
	ldr	r3, .L113+4
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r2, .L113+112
	ldr	r2, [r2, r3, lsl #2]
	mov	r3, r2
	lsl	r3, r3, #31
	sub	r3, r3, r2
	lsl	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L113+4
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r2, .L113+116
	ldr	r3, [r2, r3, lsl #2]
	sub	r2, r1, r3
	ldr	r3, .L113+4
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r1, .L113+108
	ldr	r3, [r1, r3, lsl #2]
	sub	r2, r2, r3
	ldr	r3, .L113+4
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r1, .L113+116
	ldr	r3, [r1, r3, lsl #2]
	add	r2, r2, r3
	ldr	r3, .L113+4
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r1, .L113+112
	ldr	r3, [r1, r3, lsl #2]
	lsl	r3, r3, #1
	add	r1, r2, r3
	ldr	r3, .L113+4
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113+108
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L113
	ldr	r2, [r2]
	ldr	r0, .L113+4
	ldr	r0, [r0]
	add	r1, r1, r3
	ldr	ip, .L113+24
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r0
	str	r1, [ip, r3, lsl #2]
	ldr	r3, .L113+4
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113+4
	str	r3, [r2]
.L31:
	ldr	r3, .L113+4
	ldr	r3, [r3]
	cmp	r3, #352
	ble	.L32
	ldr	r3, .L113
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L33
	ldr	r3, .L113+4
	mov	r2, #1
	str	r2, [r3]
	b	.L34
.L37:
	ldr	r3, .L113
	mov	r2, #1
	str	r2, [r3]
	b	.L35
.L36:
	ldr	r3, .L113
	ldr	r3, [r3]
	sub	r2, r3, #1
	ldr	r3, .L113+4
	ldr	r3, [r3]
	sub	r1, r3, #1
	ldr	r0, .L113+16
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r1, [r0, r3, lsl #2]
	ldr	r3, .L113
	ldr	r3, [r3]
	add	r2, r3, #1
	ldr	r3, .L113+4
	ldr	r3, [r3]
	sub	r0, r3, #1
	ldr	ip, .L113+16
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r0
	ldr	r3, [ip, r3, lsl #2]
	sub	r1, r1, r3
	ldr	r3, .L113
	ldr	r3, [r3]
	sub	r2, r3, #1
	ldr	r3, .L113+4
	ldr	r0, [r3]
	ldr	ip, .L113+16
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r0
	ldr	r3, [ip, r3, lsl #2]
	lsl	r3, r3, #1
	add	r1, r1, r3
	ldr	r3, .L113
	ldr	r3, [r3]
	add	r2, r3, #1
	ldr	r3, .L113+4
	ldr	r0, [r3]
	ldr	ip, .L113+16
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r0
	ldr	r2, [ip, r3, lsl #2]
	mov	r3, r2
	lsl	r3, r3, #31
	sub	r3, r3, r2
	lsl	r3, r3, #1
	add	r1, r1, r3
	ldr	r3, .L113
	ldr	r3, [r3]
	sub	r2, r3, #1
	ldr	r3, .L113+4
	ldr	r3, [r3]
	add	r0, r3, #1
	ldr	ip, .L113+16
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r0
	ldr	r3, [ip, r3, lsl #2]
	add	r1, r1, r3
	ldr	r3, .L113
	ldr	r3, [r3]
	add	r2, r3, #1
	ldr	r3, .L113+4
	ldr	r3, [r3]
	add	r0, r3, #1
	ldr	ip, .L113+16
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r0
	ldr	r3, [ip, r3, lsl #2]
	ldr	r2, .L113
	ldr	r2, [r2]
	ldr	r0, .L113+4
	ldr	r0, [r0]
	sub	r1, r1, r3
	ldr	ip, .L113+28
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r0
	str	r1, [ip, r3, lsl #2]
	ldr	r3, .L113
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113
	str	r3, [r2]
.L35:
	ldr	r3, .L113
	ldr	r3, [r3]
	cmp	r3, #288
	ble	.L36
	ldr	r3, .L113+4
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113+4
	str	r3, [r2]
.L34:
	ldr	r3, .L113+4
	ldr	r3, [r3]
	cmp	r3, #352
	ble	.L37
.L33:
	ldr	r3, .L113
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113
	str	r3, [r2]
.L24:
	ldr	r3, .L113
	ldr	r3, [r3]
	cmp	r3, #288
	ble	.L38
	ldr	r3, .L113
	mov	r2, #0
	str	r2, [r3]
	b	.L39
.L43:
	ldr	r3, .L113+4
	mov	r2, #0
	str	r2, [r3]
	b	.L40
.L42:
	ldr	r3, .L113
	ldr	r2, [r3]
	ldr	r3, .L113+4
	ldr	r1, [r3]
	ldr	r0, .L113+28
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r3, [r0, r3, lsl #2]
	cmp	r3, #0
	bne	.L41
	ldr	r3, .L113
	ldr	r2, [r3]
	ldr	r3, .L113+4
	ldr	r1, [r3]
	ldr	r0, .L113+28
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	mov	r2, #1
	str	r2, [r0, r3, lsl #2]
.L41:
	ldr	r3, .L113
	ldr	r2, [r3]
	ldr	r3, .L113+4
	ldr	r1, [r3]
	ldr	r0, .L113+24
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r1, [r0, r3, lsl #2]
	ldr	r3, .L113
	ldr	r2, [r3]
	ldr	r3, .L113+4
	ldr	r0, [r3]
	ldr	ip, .L113+24
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r0
	ldr	r3, [ip, r3, lsl #2]
	mul	r1, r3, r1
	ldr	r3, .L113
	ldr	r2, [r3]
	ldr	r3, .L113+4
	ldr	r0, [r3]
	ldr	ip, .L113+28
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r0
	ldr	r0, [ip, r3, lsl #2]
	ldr	r3, .L113
	ldr	r2, [r3]
	ldr	r3, .L113+4
	ldr	ip, [r3]
	ldr	lr, .L113+28
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, ip
	ldr	r3, [lr, r3, lsl #2]
	mul	r3, r0, r3
	add	r3, r1, r3
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L113+32
	stm	r1, {r2-r3}
	ldr	r3, .L113
	ldr	r2, [r3]
	ldr	r3, .L113+4
	ldr	r1, [r3]
	ldr	r0, .L113+24
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r3, [r0, r3, lsl #2]
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r4, r0
	ldr	r3, .L113
	ldr	r2, [r3]
	ldr	r3, .L113+4
	ldr	r1, [r3]
	ldr	r0, .L113+28
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r3, [r0, r3, lsl #2]
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r3, r0
	mov	r1, r3
	mov	r0, r4
	bl	__aeabi_fdiv
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L113+36
	str	r2, [r3]	@ float
	ldr	r3, .L113+32
	ldmia	r3, {r2-r3}
	ldr	r1, .L113
	ldr	r4, [r1]
	ldr	r1, .L113+4
	ldr	r5, [r1]
	mov	r0, r2
	mov	r1, r3
	bl	sqrt
	ldr	r2, .L113+40
	mov	r3, r4
	lsl	r3, r3, #2
	add	r3, r3, r4
	lsl	r3, r3, #1
	add	r3, r3, r4
	lsl	r3, r3, #5
	add	r3, r3, r5
	lsl	r3, r3, #3
	add	r3, r2, r3
	stm	r3, {r0-r1}
	ldr	r3, .L113+36
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	atan
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L113
	ldr	r4, [r1]
	ldr	r1, .L113+4
	ldr	r5, [r1]
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2f
	mov	r2, r0
	ldr	r1, .L113+68
	mov	r3, r4
	lsl	r3, r3, #2
	add	r3, r3, r4
	lsl	r3, r3, #1
	add	r3, r3, r4
	lsl	r3, r3, #5
	add	r3, r3, r5
	str	r2, [r1, r3, lsl #2]	@ float
	ldr	r3, .L113+4
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113+4
	str	r3, [r2]
.L40:
	ldr	r3, .L113+4
	ldr	r3, [r3]
	cmp	r3, #352
	blt	.L42
	ldr	r3, .L113
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113
	str	r3, [r2]
.L39:
	ldr	r3, .L113
	ldr	r3, [r3]
	cmp	r3, #288
	blt	.L43
	ldr	r3, .L113
	mov	r2, #1
	str	r2, [r3]
	b	.L44
.L47:
	ldr	r3, .L113+4
	mov	r2, #1
	str	r2, [r3]
	b	.L45
.L46:
	ldr	r3, .L113
	ldr	r2, [r3]
	ldr	r3, .L113+4
	ldr	r1, [r3]
	ldr	r0, .L113+40
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	lsl	r3, r3, #3
	add	r3, r0, r3
	ldmia	r3, {r2-r3}
	ldr	r1, .L113
	ldr	r1, [r1]
	sub	r4, r1, #1
	ldr	r1, .L113+4
	ldr	r1, [r1]
	sub	r5, r1, #1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2iz
	mov	r2, r0
	ldr	r1, .L113+132
	mov	r3, r4
	lsl	r3, r3, #2
	add	r3, r3, r4
	lsl	r3, r3, #1
	add	r3, r3, r4
	lsl	r3, r3, #5
	add	r3, r3, r5
	str	r2, [r1, r3, lsl #2]
	ldr	r3, .L113+4
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113+4
	str	r3, [r2]
.L45:
	ldr	r3, .L113+4
	ldr	r3, [r3]
	cmp	r3, #352
	ble	.L46
	ldr	r3, .L113
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113
	str	r3, [r2]
.L44:
	ldr	r3, .L113
	ldr	r3, [r3]
	cmp	r3, #288
	ble	.L47
	ldr	r3, .L113
	mov	r2, #0
	str	r2, [r3]
	b	.L48
.L53:
	ldr	r3, .L113+4
	mov	r2, #0
	str	r2, [r3]
	b	.L49
.L114:
	.align	2
.L113:
	.word	i
	.word	j
	.word	gauss
	.word	289
	.word	sobel
	.word	newgauss
	.word	newsobelx
	.word	newsobely
	.word	z
	.word	l
	.word	es
	.word	1374389535
	.word	1074339512
	.word	1127481344
	.word	1102315520
	.word	1116143616
	.word	1122041856
	.word	eo
	.word	1126006784
	.word	q
	.word	r
	.word	286
	.word	nonmaximum
	.word	t1
	.word	t2
	.word	k
	.word	353
	.word	buffer3
	.word	buffer2
	.word	buffer1
	.word	350
	.word	i
	.word	threshold
	.word	current_y
	.word	j
.L52:
	ldr	r3, .L113+124
	ldr	r2, [r3]
	ldr	r3, .L113+136
	ldr	r1, [r3]
	ldr	r0, .L113+68
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r3, [r0, r3, lsl #2]	@ float
	ldr	r1, .L113+52
	mov	r0, r3
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r0, r3
	bl	__aeabi_f2d
	ldr	r2, .L113+44
	ldr	r3, .L113+48
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L113+124
	ldr	r4, [r1]
	ldr	r1, .L113+136
	ldr	r5, [r1]
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2f
	mov	r2, r0
	ldr	r1, .L113+68
	mov	r3, r4
	lsl	r3, r3, #2
	add	r3, r3, r4
	lsl	r3, r3, #1
	add	r3, r3, r4
	lsl	r3, r3, #5
	add	r3, r3, r5
	str	r2, [r1, r3, lsl #2]	@ float
	ldr	r3, .L113+124
	ldr	r2, [r3]
	ldr	r3, .L113+136
	ldr	r1, [r3]
	ldr	r0, .L113+68
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r3, [r0, r3, lsl #2]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmplt
	mov	r3, r0
	cmp	r3, #0
	beq	.L50
	ldr	r3, .L113+124
	ldr	r2, [r3]
	ldr	r3, .L113+136
	ldr	r1, [r3]
	ldr	r0, .L113+68
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r3, [r0, r3, lsl #2]	@ float
	ldr	r2, .L113+124
	ldr	r4, [r2]
	ldr	r2, .L113+136
	ldr	r5, [r2]
	ldr	r1, .L113+52
	mov	r0, r3
	bl	__aeabi_fadd
	mov	r3, r0
	mov	r1, r3
	ldr	r2, .L113+68
	mov	r3, r4
	lsl	r3, r3, #2
	add	r3, r3, r4
	lsl	r3, r3, #1
	add	r3, r3, r4
	lsl	r3, r3, #5
	add	r3, r3, r5
	str	r1, [r2, r3, lsl #2]	@ float
.L50:
	ldr	r3, .L113+136
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113+136
	str	r3, [r2]
.L49:
	ldr	r3, .L113+136
	ldr	r3, [r3]
	cmp	r3, #352
	blt	.L52
	ldr	r3, .L113+124
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113+124
	str	r3, [r2]
.L48:
	ldr	r3, .L113+124
	ldr	r3, [r3]
	cmp	r3, #288
	blt	.L53
	ldr	r3, .L113+124
	mov	r2, #1
	str	r2, [r3]
	b	.L54
.L75:
	ldr	r3, .L113+136
	mov	r2, #1
	str	r2, [r3]
	b	.L55
.L74:
	ldr	r3, .L113+76
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L113+80
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L113+124
	ldr	r2, [r3]
	ldr	r3, .L113+136
	ldr	r1, [r3]
	ldr	r0, .L113+68
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r3, [r0, r3, lsl #2]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L56
	ldr	r3, .L113+124
	ldr	r2, [r3]
	ldr	r3, .L113+136
	ldr	r1, [r3]
	ldr	r0, .L113+68
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r3, [r0, r3, lsl #2]	@ float
	ldr	r1, .L113+56
	mov	r0, r3
	bl	__aeabi_fcmplt
	mov	r3, r0
	cmp	r3, #0
	bne	.L58
.L56:
	ldr	r3, .L113+124
	ldr	r2, [r3]
	ldr	r3, .L113+136
	ldr	r1, [r3]
	ldr	r0, .L113+68
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r3, [r0, r3, lsl #2]	@ float
	ldr	r1, .L113+72
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L59
	ldr	r3, .L113+124
	ldr	r2, [r3]
	ldr	r3, .L113+136
	ldr	r1, [r3]
	ldr	r0, .L113+68
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r3, [r0, r3, lsl #2]	@ float
	ldr	r1, .L113+52
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L59
.L58:
	ldr	r3, .L113+124
	ldr	r2, [r3]
	ldr	r3, .L113+136
	ldr	r3, [r3]
	add	r1, r3, #1
	ldr	r0, .L113+132
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r3, [r0, r3, lsl #2]
	ldr	r2, .L113+76
	str	r3, [r2]
	ldr	r3, .L113+124
	ldr	r2, [r3]
	ldr	r3, .L113+136
	ldr	r3, [r3]
	sub	r1, r3, #1
	ldr	r0, .L113+132
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r3, [r0, r3, lsl #2]
	ldr	r2, .L113+80
	str	r3, [r2]
	b	.L62
.L59:
	ldr	r3, .L113+124
	ldr	r2, [r3]
	ldr	r3, .L113+136
	ldr	r1, [r3]
	ldr	r0, .L113+68
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r3, [r0, r3, lsl #2]	@ float
	ldr	r1, .L113+56
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L63
	ldr	r3, .L113+124
	ldr	r2, [r3]
	ldr	r3, .L113+136
	ldr	r1, [r3]
	ldr	r0, .L113+68
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r3, [r0, r3, lsl #2]	@ float
	ldr	r1, .L113+60
	mov	r0, r3
	bl	__aeabi_fcmplt
	mov	r3, r0
	cmp	r3, #0
	beq	.L63
	ldr	r3, .L113+124
	ldr	r3, [r3]
	add	r2, r3, #1
	ldr	r3, .L113+136
	ldr	r3, [r3]
	sub	r1, r3, #1
	ldr	r0, .L113+68
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r3, [r0, r3, lsl #2]	@ float
	mov	r0, r3
	bl	__aeabi_f2iz
	mov	r3, r0
	ldr	r2, .L113+76
	str	r3, [r2]
	ldr	r3, .L113+124
	ldr	r3, [r3]
	sub	r2, r3, #1
	ldr	r3, .L113+136
	ldr	r3, [r3]
	add	r1, r3, #1
	ldr	r0, .L113+68
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r3, [r0, r3, lsl #2]	@ float
	mov	r0, r3
	bl	__aeabi_f2iz
	mov	r3, r0
	ldr	r2, .L113+80
	str	r3, [r2]
	b	.L62
.L63:
	ldr	r3, .L113+124
	ldr	r2, [r3]
	ldr	r3, .L113+136
	ldr	r1, [r3]
	ldr	r0, .L113+68
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r3, [r0, r3, lsl #2]	@ float
	ldr	r1, .L113+60
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L66
	ldr	r3, .L113+124
	ldr	r2, [r3]
	ldr	r3, .L113+136
	ldr	r1, [r3]
	ldr	r0, .L113+68
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r3, [r0, r3, lsl #2]	@ float
	ldr	r1, .L113+64
	mov	r0, r3
	bl	__aeabi_fcmplt
	mov	r3, r0
	cmp	r3, #0
	beq	.L66
	ldr	r3, .L113+124
	ldr	r3, [r3]
	add	r2, r3, #1
	ldr	r3, .L113+136
	ldr	r1, [r3]
	ldr	r0, .L113+132
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r3, [r0, r3, lsl #2]
	ldr	r2, .L113+76
	str	r3, [r2]
	ldr	r3, .L113+124
	ldr	r3, [r3]
	sub	r2, r3, #1
	ldr	r3, .L113+136
	ldr	r1, [r3]
	ldr	r0, .L113+132
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r3, [r0, r3, lsl #2]
	ldr	r2, .L113+80
	str	r3, [r2]
	b	.L62
.L66:
	ldr	r3, .L113+124
	ldr	r2, [r3]
	ldr	r3, .L113+136
	ldr	r1, [r3]
	ldr	r0, .L113+68
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r3, [r0, r3, lsl #2]	@ float
	ldr	r1, .L113+64
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L62
	ldr	r3, .L113+124
	ldr	r2, [r3]
	ldr	r3, .L113+136
	ldr	r1, [r3]
	ldr	r0, .L113+68
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r3, [r0, r3, lsl #2]	@ float
	ldr	r1, .L113+72
	mov	r0, r3
	bl	__aeabi_fcmplt
	mov	r3, r0
	cmp	r3, #0
	beq	.L62
	ldr	r3, .L113+124
	ldr	r3, [r3]
	sub	r2, r3, #1
	ldr	r3, .L113+136
	ldr	r3, [r3]
	sub	r1, r3, #1
	ldr	r0, .L113+132
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r3, [r0, r3, lsl #2]
	ldr	r2, .L113+76
	str	r3, [r2]
	ldr	r3, .L113+124
	ldr	r3, [r3]
	add	r2, r3, #1
	ldr	r3, .L113+136
	ldr	r3, [r3]
	add	r1, r3, #1
	ldr	r0, .L113+132
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r3, [r0, r3, lsl #2]
	ldr	r2, .L113+80
	str	r3, [r2]
.L62:
	ldr	r3, .L113+124
	ldr	r2, [r3]
	ldr	r3, .L113+136
	ldr	r1, [r3]
	ldr	r0, .L113+132
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r2, [r0, r3, lsl #2]
	ldr	r3, .L113+76
	ldr	r3, [r3]
	cmp	r2, r3
	bge	.L71
	ldr	r3, .L113+124
	ldr	r2, [r3]
	ldr	r3, .L113+136
	ldr	r1, [r3]
	ldr	r0, .L113+132
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r2, [r0, r3, lsl #2]
	ldr	r3, .L113+80
	ldr	r3, [r3]
	cmp	r2, r3
	blt	.L72
.L71:
	ldr	r3, .L113+124
	ldr	r1, [r3]
	ldr	r3, .L113+136
	ldr	ip, [r3]
	ldr	r3, .L113+124
	ldr	r2, [r3]
	ldr	r3, .L113+136
	ldr	r0, [r3]
	ldr	lr, .L113+132
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r3, r3, #1
	add	r3, r3, r1
	lsl	r3, r3, #5
	add	r3, r3, ip
	ldr	r1, [lr, r3, lsl #2]
	ldr	ip, .L113+88
	mov	r3, r2
	lsl	r3, r3, #4
	sub	r3, r3, r2
	lsl	r3, r3, #2
	sub	r3, r3, r2
	lsl	r2, r3, #2
	sub	r2, r2, r3
	lsl	r3, r2, #1
	mov	r2, r3
	add	r3, r2, r0
	str	r1, [ip, r3, lsl #2]
	b	.L73
.L72:
	ldr	r3, .L113+124
	ldr	r2, [r3]
	ldr	r3, .L113+136
	ldr	r1, [r3]
	ldr	r0, .L113+88
	mov	r3, r2
	lsl	r3, r3, #4
	sub	r3, r3, r2
	lsl	r3, r3, #2
	sub	r3, r3, r2
	lsl	r2, r3, #2
	sub	r2, r2, r3
	lsl	r3, r2, #1
	mov	r2, r3
	add	r3, r2, r1
	mov	r2, #0
	str	r2, [r0, r3, lsl #2]
.L73:
	ldr	r3, .L113+136
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113+136
	str	r3, [r2]
.L55:
	ldr	r3, .L113+136
	ldr	r3, [r3]
	ldr	r2, .L113+120
	cmp	r3, r2
	ble	.L74
	ldr	r3, .L113+124
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113+124
	str	r3, [r2]
.L54:
	ldr	r3, .L113+124
	ldr	r3, [r3]
	ldr	r2, .L113+84
	cmp	r3, r2
	ble	.L75
	ldr	r3, .L113+124
	mov	r2, #1
	str	r2, [r3]
	b	.L76
.L79:
	ldr	r3, .L113+136
	mov	r2, #1
	str	r2, [r3]
	b	.L77
.L78:
	ldr	r3, .L113+124
	ldr	r2, [r3]
	ldr	r3, .L113+136
	ldr	ip, [r3]
	ldr	r3, .L113+124
	ldr	r3, [r3]
	sub	r1, r3, #1
	ldr	r3, .L113+136
	ldr	r3, [r3]
	sub	r0, r3, #1
	ldr	lr, .L113+88
	mov	r3, r2
	lsl	r3, r3, #4
	sub	r3, r3, r2
	lsl	r3, r3, #2
	sub	r3, r3, r2
	lsl	r2, r3, #2
	sub	r2, r2, r3
	lsl	r3, r2, #1
	mov	r2, r3
	add	r3, r2, ip
	ldr	r2, [lr, r3, lsl #2]
	ldr	ip, .L113+132
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r3, r3, #1
	add	r3, r3, r1
	lsl	r3, r3, #5
	add	r3, r3, r0
	str	r2, [ip, r3, lsl #2]
	ldr	r3, .L113+136
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113+136
	str	r3, [r2]
.L77:
	ldr	r3, .L113+136
	ldr	r3, [r3]
	cmp	r3, #352
	ble	.L78
	ldr	r3, .L113+124
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113+124
	str	r3, [r2]
.L76:
	ldr	r3, .L113+124
	ldr	r3, [r3]
	cmp	r3, #288
	ble	.L79
	ldr	r3, .L113+124
	mov	r2, #0
	str	r2, [r3]
	b	.L80
.L86:
	ldr	r3, .L113+136
	mov	r2, #0
	str	r2, [r3]
	b	.L81
.L85:
	ldr	r3, .L113+124
	ldr	r2, [r3]
	ldr	r3, .L113+136
	ldr	r1, [r3]
	ldr	r0, .L113+132
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r2, [r0, r3, lsl #2]
	ldr	r3, .L113+92
	ldr	r3, [r3]
	cmp	r2, r3
	bgt	.L82
	ldr	r3, .L113+124
	ldr	r2, [r3]
	ldr	r3, .L113+136
	ldr	r1, [r3]
	ldr	r0, .L113+132
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r2, [r0, r3, lsl #2]
	ldr	r3, .L113+96
	ldr	r3, [r3]
	cmp	r2, r3
	blt	.L82
	ldr	r3, .L113+124
	ldr	r2, [r3]
	ldr	r3, .L113+136
	ldr	r1, [r3]
	ldr	r0, .L113+128
	mov	r3, r2
	lsl	r3, r3, #4
	sub	r3, r3, r2
	lsl	r3, r3, #2
	sub	r3, r3, r2
	lsl	r2, r3, #2
	sub	r2, r2, r3
	lsl	r3, r2, #1
	mov	r2, r3
	add	r3, r2, r1
	mov	r2, #100
	str	r2, [r0, r3, lsl #2]
	b	.L83
.L82:
	ldr	r3, .L113+124
	ldr	r2, [r3]
	ldr	r3, .L113+136
	ldr	r1, [r3]
	ldr	r0, .L113+132
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r2, [r0, r3, lsl #2]
	ldr	r3, .L113+92
	ldr	r3, [r3]
	cmp	r2, r3
	ble	.L84
	ldr	r3, .L113+124
	ldr	r2, [r3]
	ldr	r3, .L113+136
	ldr	r1, [r3]
	ldr	r0, .L113+128
	mov	r3, r2
	lsl	r3, r3, #4
	sub	r3, r3, r2
	lsl	r3, r3, #2
	sub	r3, r3, r2
	lsl	r2, r3, #2
	sub	r2, r2, r3
	lsl	r3, r2, #1
	mov	r2, r3
	add	r3, r2, r1
	mov	r2, #255
	str	r2, [r0, r3, lsl #2]
	b	.L83
.L84:
	ldr	r3, .L113+124
	ldr	r2, [r3]
	ldr	r3, .L113+136
	ldr	r1, [r3]
	ldr	r0, .L113+132
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r2, [r0, r3, lsl #2]
	ldr	r3, .L113+96
	ldr	r3, [r3]
	cmp	r2, r3
	bge	.L83
	ldr	r3, .L113+124
	ldr	r2, [r3]
	ldr	r3, .L113+136
	ldr	r1, [r3]
	ldr	r0, .L113+128
	mov	r3, r2
	lsl	r3, r3, #4
	sub	r3, r3, r2
	lsl	r3, r3, #2
	sub	r3, r3, r2
	lsl	r2, r3, #2
	sub	r2, r2, r3
	lsl	r3, r2, #1
	mov	r2, r3
	add	r3, r2, r1
	mov	r2, #0
	str	r2, [r0, r3, lsl #2]
.L83:
	ldr	r3, .L113+136
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113+136
	str	r3, [r2]
.L81:
	ldr	r3, .L113+136
	ldr	r3, [r3]
	cmp	r3, #352
	blt	.L85
	ldr	r3, .L113+124
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113+124
	str	r3, [r2]
.L80:
	ldr	r3, .L113+124
	ldr	r3, [r3]
	cmp	r3, #288
	blt	.L86
	ldr	r3, .L113+124
	mov	r2, #1
	str	r2, [r3]
	b	.L87
.L99:
	ldr	r3, .L113+124
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L88
	ldr	r3, .L113+100
	mov	r2, #0
	str	r2, [r3]
	b	.L89
.L90:
	ldr	r3, .L113+100
	ldr	r2, [r3]
	ldr	r3, .L113+100
	ldr	r3, [r3]
	ldr	r1, .L113+128
	ldr	r2, [r1, r2, lsl #2]
	ldr	r1, .L113+116
	str	r2, [r1, r3, lsl #2]
	ldr	r3, .L113+100
	ldr	r3, [r3]
	ldr	r2, .L113+100
	ldr	r2, [r2]
	ldr	r1, .L113+128
	add	r3, r3, #352
	add	r3, r3, #2
	ldr	r3, [r1, r3, lsl #2]
	ldr	r1, .L113+112
	str	r3, [r1, r2, lsl #2]
	ldr	r3, .L113+100
	ldr	r2, [r3]
	ldr	r3, .L113+100
	ldr	r3, [r3]
	ldr	r1, .L113+128
	add	r2, r2, #708
	ldr	r2, [r1, r2, lsl #2]
	ldr	r1, .L113+108
	str	r2, [r1, r3, lsl #2]
	ldr	r3, .L113+100
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113+100
	str	r3, [r2]
.L89:
	ldr	r3, .L113+100
	ldr	r3, [r3]
	ldr	r2, .L113+104
	cmp	r3, r2
	ble	.L90
	b	.L91
.L88:
	ldr	r3, .L113+100
	mov	r2, #0
	str	r2, [r3]
	b	.L92
.L93:
	ldr	r3, .L113+100
	ldr	r2, [r3]
	ldr	r3, .L113+100
	ldr	r3, [r3]
	ldr	r1, .L113+112
	ldr	r2, [r1, r2, lsl #2]
	ldr	r1, .L113+116
	str	r2, [r1, r3, lsl #2]
	ldr	r3, .L113+100
	ldr	r2, [r3]
	ldr	r3, .L113+100
	ldr	r3, [r3]
	ldr	r1, .L113+108
	ldr	r2, [r1, r2, lsl #2]
	ldr	r1, .L113+112
	str	r2, [r1, r3, lsl #2]
	ldr	r3, .L113+124
	ldr	r3, [r3]
	add	r2, r3, #1
	ldr	r3, .L113+100
	ldr	r0, [r3]
	ldr	r3, .L113+100
	ldr	r1, [r3]
	ldr	ip, .L113+128
	mov	r3, r2
	lsl	r3, r3, #4
	sub	r3, r3, r2
	lsl	r3, r3, #2
	sub	r3, r3, r2
	lsl	r2, r3, #2
	sub	r2, r2, r3
	lsl	r3, r2, #1
	mov	r2, r3
	add	r3, r2, r0
	ldr	r3, [ip, r3, lsl #2]
	ldr	r2, .L113+108
	str	r3, [r2, r1, lsl #2]
	ldr	r3, .L113+100
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113+100
	str	r3, [r2]
.L92:
	ldr	r3, .L113+100
	ldr	r3, [r3]
	ldr	r2, .L113+104
	cmp	r3, r2
	ble	.L93
.L91:
	ldr	r3, .L113+136
	mov	r2, #1
	str	r2, [r3]
	b	.L94
.L98:
	ldr	r3, .L113+136
	ldr	r3, [r3]
	ldr	r2, .L113+112
	ldr	r3, [r2, r3, lsl #2]
	cmp	r3, #100
	bne	.L95
	ldr	r3, .L113+136
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r2, .L113+108
	ldr	r3, [r2, r3, lsl #2]
	cmp	r3, #255
	beq	.L96
	ldr	r3, .L113+136
	ldr	r3, [r3]
	ldr	r2, .L113+108
	ldr	r3, [r2, r3, lsl #2]
	cmp	r3, #255
	beq	.L96
	ldr	r3, .L113+136
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113+108
	ldr	r3, [r2, r3, lsl #2]
	cmp	r3, #255
	beq	.L96
	ldr	r3, .L113+136
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r2, .L113+112
	ldr	r3, [r2, r3, lsl #2]
	cmp	r3, #255
	beq	.L96
	ldr	r3, .L113+136
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113+112
	ldr	r3, [r2, r3, lsl #2]
	cmp	r3, #255
	beq	.L96
	ldr	r3, .L113+136
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r2, .L113+116
	ldr	r3, [r2, r3, lsl #2]
	cmp	r3, #255
	beq	.L96
	ldr	r3, .L113+136
	ldr	r3, [r3]
	ldr	r2, .L113+116
	ldr	r3, [r2, r3, lsl #2]
	cmp	r3, #255
	beq	.L96
	ldr	r3, .L113+136
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113+116
	ldr	r3, [r2, r3, lsl #2]
	cmp	r3, #255
	bne	.L97
.L96:
	ldr	r3, .L113+124
	ldr	r2, [r3]
	ldr	r3, .L113+136
	ldr	r1, [r3]
	ldr	r0, .L113+128
	mov	r3, r2
	lsl	r3, r3, #4
	sub	r3, r3, r2
	lsl	r3, r3, #2
	sub	r3, r3, r2
	lsl	r2, r3, #2
	sub	r2, r2, r3
	lsl	r3, r2, #1
	mov	r2, r3
	add	r3, r2, r1
	mov	r2, #255
	str	r2, [r0, r3, lsl #2]
	b	.L95
.L97:
	ldr	r3, .L113+124
	ldr	r2, [r3]
	ldr	r3, .L113+136
	ldr	r1, [r3]
	ldr	r0, .L113+128
	mov	r3, r2
	lsl	r3, r3, #4
	sub	r3, r3, r2
	lsl	r3, r3, #2
	sub	r3, r3, r2
	lsl	r2, r3, #2
	sub	r2, r2, r3
	lsl	r3, r2, #1
	mov	r2, r3
	add	r3, r2, r1
	mov	r2, #0
	str	r2, [r0, r3, lsl #2]
.L95:
	ldr	r3, .L113+136
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113+136
	str	r3, [r2]
.L94:
	ldr	r3, .L113+136
	ldr	r3, [r3]
	ldr	r2, .L113+120
	cmp	r3, r2
	ble	.L98
	ldr	r3, .L113+124
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113+124
	str	r3, [r2]
.L87:
	ldr	r3, .L113+124
	ldr	r3, [r3]
	cmp	r3, #288
	ble	.L99
	ldr	r3, .L113+124
	mov	r2, #1
	str	r2, [r3]
	b	.L100
.L103:
	ldr	r3, .L113+136
	mov	r2, #1
	str	r2, [r3]
	b	.L101
.L102:
	ldr	r3, .L113+124
	ldr	r2, [r3]
	ldr	r3, .L113+136
	ldr	ip, [r3]
	ldr	r3, .L113+124
	ldr	r3, [r3]
	sub	r1, r3, #1
	ldr	r3, .L113+136
	ldr	r3, [r3]
	sub	r0, r3, #1
	ldr	lr, .L113+128
	mov	r3, r2
	lsl	r3, r3, #4
	sub	r3, r3, r2
	lsl	r3, r3, #2
	sub	r3, r3, r2
	lsl	r2, r3, #2
	sub	r2, r2, r3
	lsl	r3, r2, #1
	mov	r2, r3
	add	r3, r2, ip
	ldr	r2, [lr, r3, lsl #2]
	ldr	ip, .L113+132
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r3, r3, #1
	add	r3, r3, r1
	lsl	r3, r3, #5
	add	r3, r3, r0
	str	r2, [ip, r3, lsl #2]
	ldr	r3, .L113+136
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L113+136
	str	r3, [r2]
.L101:
	ldr	r3, .L115
	ldr	r3, [r3]
	cmp	r3, #352
	ble	.L102
	ldr	r3, .L115+4
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L115+4
	str	r3, [r2]
.L100:
	ldr	r3, .L115+4
	ldr	r3, [r3]
	cmp	r3, #288
	ble	.L103
	nop
	nop
	pop	{r4, r5, fp, pc}
.L116:
	.align	2
.L115:
	.word	j
	.word	i
	.size	canny, .-canny
	.section	.rodata
	.align	2
.LC0:
	.ascii	"rb\000"
	.align	2
.LC1:
	.ascii	"akiyo_cif_0_yuv444.yuv\000"
	.align	2
.LC2:
	.ascii	"current frame doesn't exist\000"
	.text
	.align	2
	.global	read
	.syntax unified
	.arm
	.fpu softvfp
	.type	read, %function
read:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #8
	ldr	r1, .L123
	ldr	r0, .L123+4
	bl	fopen
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L118
	ldr	r0, .L123+8
	bl	puts
	bl	getchar
	mvn	r0, #0
	bl	exit
.L118:
	ldr	r3, .L123+12
	mov	r2, #0
	str	r2, [r3]
	b	.L119
.L122:
	ldr	r3, .L123+16
	mov	r2, #0
	str	r2, [r3]
	b	.L120
.L121:
	ldr	r3, .L123+12
	ldr	r4, [r3]
	ldr	r3, .L123+16
	ldr	r5, [r3]
	ldr	r0, [fp, #-16]
	bl	fgetc
	mov	r2, r0
	ldr	r1, .L123+20
	mov	r3, r4
	lsl	r3, r3, #2
	add	r3, r3, r4
	lsl	r3, r3, #1
	add	r3, r3, r4
	lsl	r3, r3, #5
	add	r3, r3, r5
	str	r2, [r1, r3, lsl #2]
	ldr	r3, .L123+16
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L123+16
	str	r3, [r2]
.L120:
	ldr	r3, .L123+16
	ldr	r3, [r3]
	cmp	r3, #352
	blt	.L121
	ldr	r3, .L123+12
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L123+12
	str	r3, [r2]
.L119:
	ldr	r3, .L123+12
	ldr	r3, [r3]
	cmp	r3, #288
	blt	.L122
	ldr	r0, [fp, #-16]
	bl	fclose
	nop
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L124:
	.align	2
.L123:
	.word	.LC0
	.word	.LC1
	.word	.LC2
	.word	i
	.word	j
	.word	current_y
	.size	read, .-read
	.section	.rodata
	.align	2
.LC3:
	.ascii	"wb\000"
	.align	2
.LC4:
	.ascii	"akiyo2y.yuv\000"
	.text
	.align	2
	.global	write
	.syntax unified
	.arm
	.fpu softvfp
	.type	write, %function
write:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	ldr	r1, .L130
	ldr	r0, .L130+4
	bl	fopen
	str	r0, [fp, #-8]
	ldr	r3, .L130+8
	mov	r2, #0
	str	r2, [r3]
	b	.L126
.L129:
	ldr	r3, .L130+12
	mov	r2, #0
	str	r2, [r3]
	b	.L127
.L128:
	ldr	r3, .L130+8
	ldr	r2, [r3]
	ldr	r3, .L130+12
	ldr	r1, [r3]
	ldr	r0, .L130+16
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, r1
	ldr	r3, [r0, r3, lsl #2]
	ldr	r1, [fp, #-8]
	mov	r0, r3
	bl	fputc
	ldr	r3, .L130+12
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L130+12
	str	r3, [r2]
.L127:
	ldr	r3, .L130+12
	ldr	r3, [r3]
	cmp	r3, #352
	blt	.L128
	ldr	r3, .L130+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L130+8
	str	r3, [r2]
.L126:
	ldr	r3, .L130+8
	ldr	r3, [r3]
	cmp	r3, #288
	blt	.L129
	ldr	r0, [fp, #-8]
	bl	fclose
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L131:
	.align	2
.L130:
	.word	.LC3
	.word	.LC4
	.word	i
	.word	j
	.word	current_y
	.size	write, .-write
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	read
	bl	canny
	bl	write
	mov	r3, #0
	mov	r0, r3
	pop	{fp, pc}
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
