	.file	"850182.c"
	.intel_syntax noprefix
	.text
	.globl	flag0
	.bss
	.align 4
	.type	flag0, @object
	.size	flag0, 4
flag0:
	.zero	4
	.globl	flag1
	.align 4
	.type	flag1, @object
	.size	flag1, 4
flag1:
	.zero	4
	.globl	flag2
	.align 4
	.type	flag2, @object
	.size	flag2, 4
flag2:
	.zero	4
	.globl	flag3
	.align 4
	.type	flag3, @object
	.size	flag3, 4
flag3:
	.zero	4
	.globl	flag4
	.align 4
	.type	flag4, @object
	.size	flag4, 4
flag4:
	.zero	4
	.globl	flag5
	.align 4
	.type	flag5, @object
	.size	flag5, 4
flag5:
	.zero	4
	.globl	flag6
	.align 4
	.type	flag6, @object
	.size	flag6, 4
flag6:
	.zero	4
	.globl	_cc_x
	.align 4
	.type	_cc_x, @object
	.size	_cc_x, 4
_cc_x:
	.zero	4
	.text
	.globl	t0
	.type	t0, @function
t0:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
.L11:
	mov	eax, DWORD PTR flag0[rip]
	mov	esi, 1
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, 0
	call	sc_fence@PLT
	mov	eax, DWORD PTR flag1[rip]
	mov	edx, DWORD PTR -28[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag2[rip]
	mov	edx, DWORD PTR -24[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag3[rip]
	mov	edx, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag4[rip]
	mov	edx, DWORD PTR -16[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag5[rip]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag6[rip]
	mov	edx, DWORD PTR -8[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -28[rbp], 2
	jg	.L2
	cmp	DWORD PTR -24[rbp], 2
	jg	.L2
	cmp	DWORD PTR -20[rbp], 2
	jg	.L2
	cmp	DWORD PTR -16[rbp], 2
	jg	.L2
	cmp	DWORD PTR -12[rbp], 2
	jg	.L2
	cmp	DWORD PTR -8[rbp], 2
	jg	.L2
	mov	eax, 1
	jmp	.L3
.L2:
	mov	eax, 0
.L3:
	mov	edi, eax
	mov	eax, 0
	call	assume@PLT
	mov	eax, DWORD PTR flag0[rip]
	mov	esi, 3
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, 0
	call	sc_fence@PLT
	mov	eax, DWORD PTR flag1[rip]
	mov	edx, DWORD PTR -28[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag2[rip]
	mov	edx, DWORD PTR -24[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag3[rip]
	mov	edx, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag4[rip]
	mov	edx, DWORD PTR -16[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag5[rip]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag6[rip]
	mov	edx, DWORD PTR -8[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -28[rbp], 1
	je	.L4
	cmp	DWORD PTR -24[rbp], 1
	je	.L4
	cmp	DWORD PTR -20[rbp], 1
	je	.L4
	cmp	DWORD PTR -16[rbp], 1
	je	.L4
	cmp	DWORD PTR -12[rbp], 1
	je	.L4
	cmp	DWORD PTR -8[rbp], 1
	jne	.L5
.L4:
	mov	eax, DWORD PTR flag0[rip]
	mov	esi, 2
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, 0
	call	sc_fence@PLT
	mov	eax, DWORD PTR flag1[rip]
	mov	edx, DWORD PTR -28[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag2[rip]
	mov	edx, DWORD PTR -24[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag3[rip]
	mov	edx, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag4[rip]
	mov	edx, DWORD PTR -16[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag5[rip]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag6[rip]
	mov	edx, DWORD PTR -8[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -28[rbp], 4
	je	.L6
	cmp	DWORD PTR -24[rbp], 4
	je	.L6
	cmp	DWORD PTR -20[rbp], 4
	je	.L6
	cmp	DWORD PTR -16[rbp], 4
	je	.L6
	cmp	DWORD PTR -12[rbp], 4
	je	.L6
	cmp	DWORD PTR -8[rbp], 4
	jne	.L7
.L6:
	mov	eax, 1
	jmp	.L8
.L7:
	mov	eax, 0
.L8:
	mov	edi, eax
	mov	eax, 0
	call	assume@PLT
.L5:
	mov	eax, DWORD PTR flag0[rip]
	mov	esi, 4
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, 0
	call	sc_fence@PLT
	mov	eax, DWORD PTR _cc_x[rip]
	mov	esi, 0
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, DWORD PTR _cc_x[rip]
	mov	edx, DWORD PTR -4[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -4[rbp], 0
	sete	al
	movzx	eax, al
	mov	edi, eax
	mov	eax, 0
	call	assert@PLT
	mov	eax, DWORD PTR flag1[rip]
	mov	edx, DWORD PTR -28[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag2[rip]
	mov	edx, DWORD PTR -24[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag3[rip]
	mov	edx, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag4[rip]
	mov	edx, DWORD PTR -16[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag5[rip]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag6[rip]
	mov	edx, DWORD PTR -8[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -28[rbp], 2
	je	.L9
	cmp	DWORD PTR -28[rbp], 3
	je	.L9
	cmp	DWORD PTR -24[rbp], 2
	je	.L9
	cmp	DWORD PTR -24[rbp], 3
	je	.L9
	cmp	DWORD PTR -20[rbp], 2
	je	.L9
	cmp	DWORD PTR -20[rbp], 3
	je	.L9
	cmp	DWORD PTR -16[rbp], 2
	je	.L9
	cmp	DWORD PTR -16[rbp], 3
	je	.L9
	cmp	DWORD PTR -12[rbp], 2
	je	.L9
	cmp	DWORD PTR -12[rbp], 3
	je	.L9
	cmp	DWORD PTR -8[rbp], 2
	je	.L9
	cmp	DWORD PTR -8[rbp], 3
	je	.L9
	mov	eax, 1
	jmp	.L10
.L9:
	mov	eax, 0
.L10:
	mov	edi, eax
	mov	eax, 0
	call	assume@PLT
	mov	eax, DWORD PTR flag0[rip]
	mov	esi, 0
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	jmp	.L11
	.cfi_endproc
.LFE0:
	.size	t0, .-t0
	.globl	t1
	.type	t1, @function
t1:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
.L22:
	mov	eax, DWORD PTR flag1[rip]
	mov	esi, 1
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, 0
	call	sc_fence@PLT
	mov	eax, DWORD PTR flag0[rip]
	mov	edx, DWORD PTR -28[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag2[rip]
	mov	edx, DWORD PTR -24[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag3[rip]
	mov	edx, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag4[rip]
	mov	edx, DWORD PTR -16[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag5[rip]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag6[rip]
	mov	edx, DWORD PTR -8[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -28[rbp], 2
	jg	.L13
	cmp	DWORD PTR -24[rbp], 2
	jg	.L13
	cmp	DWORD PTR -20[rbp], 2
	jg	.L13
	cmp	DWORD PTR -16[rbp], 2
	jg	.L13
	cmp	DWORD PTR -12[rbp], 2
	jg	.L13
	cmp	DWORD PTR -8[rbp], 2
	jg	.L13
	mov	eax, 1
	jmp	.L14
.L13:
	mov	eax, 0
.L14:
	mov	edi, eax
	mov	eax, 0
	call	assume@PLT
	mov	eax, DWORD PTR flag1[rip]
	mov	esi, 3
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, 0
	call	sc_fence@PLT
	mov	eax, DWORD PTR flag0[rip]
	mov	edx, DWORD PTR -28[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag2[rip]
	mov	edx, DWORD PTR -24[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag3[rip]
	mov	edx, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag4[rip]
	mov	edx, DWORD PTR -16[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag5[rip]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag6[rip]
	mov	edx, DWORD PTR -8[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -28[rbp], 1
	je	.L15
	cmp	DWORD PTR -24[rbp], 1
	je	.L15
	cmp	DWORD PTR -20[rbp], 1
	je	.L15
	cmp	DWORD PTR -16[rbp], 1
	je	.L15
	cmp	DWORD PTR -12[rbp], 1
	je	.L15
	cmp	DWORD PTR -8[rbp], 1
	jne	.L16
.L15:
	mov	eax, DWORD PTR flag1[rip]
	mov	esi, 2
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, 0
	call	sc_fence@PLT
	mov	eax, DWORD PTR flag0[rip]
	mov	edx, DWORD PTR -28[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag2[rip]
	mov	edx, DWORD PTR -24[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag3[rip]
	mov	edx, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag4[rip]
	mov	edx, DWORD PTR -16[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag5[rip]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag6[rip]
	mov	edx, DWORD PTR -8[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -28[rbp], 4
	je	.L17
	cmp	DWORD PTR -24[rbp], 4
	je	.L17
	cmp	DWORD PTR -20[rbp], 4
	je	.L17
	cmp	DWORD PTR -16[rbp], 4
	je	.L17
	cmp	DWORD PTR -12[rbp], 4
	je	.L17
	cmp	DWORD PTR -8[rbp], 4
	jne	.L18
.L17:
	mov	eax, 1
	jmp	.L19
.L18:
	mov	eax, 0
.L19:
	mov	edi, eax
	mov	eax, 0
	call	assume@PLT
.L16:
	mov	eax, DWORD PTR flag1[rip]
	mov	esi, 4
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, 0
	call	sc_fence@PLT
	mov	eax, DWORD PTR flag0[rip]
	mov	edx, DWORD PTR -28[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -28[rbp], 1
	setle	al
	movzx	eax, al
	mov	edi, eax
	mov	eax, 0
	call	assume@PLT
	mov	eax, DWORD PTR _cc_x[rip]
	mov	esi, 1
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, DWORD PTR _cc_x[rip]
	mov	edx, DWORD PTR -4[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -4[rbp], 1
	sete	al
	movzx	eax, al
	mov	edi, eax
	mov	eax, 0
	call	assert@PLT
	mov	eax, DWORD PTR flag2[rip]
	mov	edx, DWORD PTR -24[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag3[rip]
	mov	edx, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag4[rip]
	mov	edx, DWORD PTR -16[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag5[rip]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag6[rip]
	mov	edx, DWORD PTR -8[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -24[rbp], 2
	je	.L20
	cmp	DWORD PTR -24[rbp], 3
	je	.L20
	cmp	DWORD PTR -20[rbp], 2
	je	.L20
	cmp	DWORD PTR -20[rbp], 3
	je	.L20
	cmp	DWORD PTR -16[rbp], 2
	je	.L20
	cmp	DWORD PTR -16[rbp], 3
	je	.L20
	cmp	DWORD PTR -12[rbp], 2
	je	.L20
	cmp	DWORD PTR -12[rbp], 3
	je	.L20
	cmp	DWORD PTR -8[rbp], 2
	je	.L20
	cmp	DWORD PTR -8[rbp], 3
	je	.L20
	mov	eax, 1
	jmp	.L21
.L20:
	mov	eax, 0
.L21:
	mov	edi, eax
	mov	eax, 0
	call	assume@PLT
	mov	eax, DWORD PTR flag1[rip]
	mov	esi, 0
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	jmp	.L22
	.cfi_endproc
.LFE1:
	.size	t1, .-t1
	.globl	t2
	.type	t2, @function
t2:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
.L35:
	mov	eax, DWORD PTR flag2[rip]
	mov	esi, 1
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, DWORD PTR flag0[rip]
	mov	edx, DWORD PTR -28[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag1[rip]
	mov	edx, DWORD PTR -24[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag3[rip]
	mov	edx, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag4[rip]
	mov	edx, DWORD PTR -16[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag5[rip]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag6[rip]
	mov	edx, DWORD PTR -8[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -28[rbp], 2
	jg	.L24
	cmp	DWORD PTR -24[rbp], 2
	jg	.L24
	cmp	DWORD PTR -20[rbp], 2
	jg	.L24
	cmp	DWORD PTR -16[rbp], 2
	jg	.L24
	cmp	DWORD PTR -12[rbp], 2
	jg	.L24
	cmp	DWORD PTR -8[rbp], 2
	jg	.L24
	mov	eax, 1
	jmp	.L25
.L24:
	mov	eax, 0
.L25:
	mov	edi, eax
	mov	eax, 0
	call	assume@PLT
	mov	eax, DWORD PTR flag2[rip]
	mov	esi, 3
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, DWORD PTR flag0[rip]
	mov	edx, DWORD PTR -28[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag1[rip]
	mov	edx, DWORD PTR -24[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag3[rip]
	mov	edx, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag4[rip]
	mov	edx, DWORD PTR -16[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag5[rip]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag6[rip]
	mov	edx, DWORD PTR -8[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -28[rbp], 1
	je	.L26
	cmp	DWORD PTR -24[rbp], 1
	je	.L26
	cmp	DWORD PTR -20[rbp], 1
	je	.L26
	cmp	DWORD PTR -16[rbp], 1
	je	.L26
	cmp	DWORD PTR -12[rbp], 1
	je	.L26
	cmp	DWORD PTR -8[rbp], 1
	jne	.L27
.L26:
	mov	eax, DWORD PTR flag2[rip]
	mov	esi, 2
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, 0
	call	sc_fence@PLT
	mov	eax, DWORD PTR flag0[rip]
	mov	edx, DWORD PTR -28[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag1[rip]
	mov	edx, DWORD PTR -24[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag3[rip]
	mov	edx, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag4[rip]
	mov	edx, DWORD PTR -16[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag5[rip]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag6[rip]
	mov	edx, DWORD PTR -8[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -28[rbp], 4
	je	.L28
	cmp	DWORD PTR -24[rbp], 4
	je	.L28
	cmp	DWORD PTR -20[rbp], 4
	je	.L28
	cmp	DWORD PTR -16[rbp], 4
	je	.L28
	cmp	DWORD PTR -12[rbp], 4
	je	.L28
	cmp	DWORD PTR -8[rbp], 4
	jne	.L29
.L28:
	mov	eax, 1
	jmp	.L30
.L29:
	mov	eax, 0
.L30:
	mov	edi, eax
	mov	eax, 0
	call	assume@PLT
.L27:
	mov	eax, DWORD PTR flag2[rip]
	mov	esi, 4
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, DWORD PTR flag0[rip]
	mov	edx, DWORD PTR -28[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag1[rip]
	mov	edx, DWORD PTR -24[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -28[rbp], 1
	jg	.L31
	cmp	DWORD PTR -24[rbp], 1
	jg	.L31
	mov	eax, 1
	jmp	.L32
.L31:
	mov	eax, 0
.L32:
	mov	edi, eax
	mov	eax, 0
	call	assume@PLT
	mov	eax, DWORD PTR _cc_x[rip]
	mov	esi, 1
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, DWORD PTR _cc_x[rip]
	mov	edx, DWORD PTR -4[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -4[rbp], 2
	sete	al
	movzx	eax, al
	mov	edi, eax
	mov	eax, 0
	call	assert@PLT
	mov	eax, DWORD PTR flag3[rip]
	mov	edx, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag4[rip]
	mov	edx, DWORD PTR -16[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag5[rip]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag6[rip]
	mov	edx, DWORD PTR -8[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -20[rbp], 2
	je	.L33
	cmp	DWORD PTR -20[rbp], 3
	je	.L33
	cmp	DWORD PTR -16[rbp], 2
	je	.L33
	cmp	DWORD PTR -16[rbp], 3
	je	.L33
	cmp	DWORD PTR -12[rbp], 2
	je	.L33
	cmp	DWORD PTR -12[rbp], 3
	je	.L33
	cmp	DWORD PTR -8[rbp], 2
	je	.L33
	cmp	DWORD PTR -8[rbp], 3
	je	.L33
	mov	eax, 1
	jmp	.L34
.L33:
	mov	eax, 0
.L34:
	mov	edi, eax
	mov	eax, 0
	call	assume@PLT
	mov	eax, DWORD PTR flag2[rip]
	mov	esi, 0
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	jmp	.L35
	.cfi_endproc
.LFE2:
	.size	t2, .-t2
	.globl	t3
	.type	t3, @function
t3:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
.L48:
	mov	eax, DWORD PTR flag3[rip]
	mov	esi, 1
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, 0
	call	sc_fence@PLT
	mov	eax, DWORD PTR flag0[rip]
	mov	edx, DWORD PTR -28[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag1[rip]
	mov	edx, DWORD PTR -24[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag2[rip]
	mov	edx, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag4[rip]
	mov	edx, DWORD PTR -16[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag5[rip]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag6[rip]
	mov	edx, DWORD PTR -8[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -28[rbp], 2
	jg	.L37
	cmp	DWORD PTR -24[rbp], 2
	jg	.L37
	cmp	DWORD PTR -20[rbp], 2
	jg	.L37
	cmp	DWORD PTR -16[rbp], 2
	jg	.L37
	cmp	DWORD PTR -12[rbp], 2
	jg	.L37
	cmp	DWORD PTR -8[rbp], 2
	jg	.L37
	mov	eax, 1
	jmp	.L38
.L37:
	mov	eax, 0
.L38:
	mov	edi, eax
	mov	eax, 0
	call	assume@PLT
	mov	eax, DWORD PTR flag3[rip]
	mov	esi, 3
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, 0
	call	sc_fence@PLT
	mov	eax, DWORD PTR flag0[rip]
	mov	edx, DWORD PTR -28[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag1[rip]
	mov	edx, DWORD PTR -24[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag2[rip]
	mov	edx, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag4[rip]
	mov	edx, DWORD PTR -16[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag5[rip]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag6[rip]
	mov	edx, DWORD PTR -8[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -28[rbp], 1
	je	.L39
	cmp	DWORD PTR -24[rbp], 1
	je	.L39
	cmp	DWORD PTR -20[rbp], 1
	je	.L39
	cmp	DWORD PTR -16[rbp], 1
	je	.L39
	cmp	DWORD PTR -12[rbp], 1
	je	.L39
	cmp	DWORD PTR -8[rbp], 1
	jne	.L40
.L39:
	mov	eax, DWORD PTR flag3[rip]
	mov	esi, 2
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, 0
	call	sc_fence@PLT
	mov	eax, DWORD PTR flag0[rip]
	mov	edx, DWORD PTR -28[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag1[rip]
	mov	edx, DWORD PTR -24[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag2[rip]
	mov	edx, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag4[rip]
	mov	edx, DWORD PTR -16[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag5[rip]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag6[rip]
	mov	edx, DWORD PTR -8[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -28[rbp], 4
	je	.L41
	cmp	DWORD PTR -24[rbp], 4
	je	.L41
	cmp	DWORD PTR -20[rbp], 4
	je	.L41
	cmp	DWORD PTR -16[rbp], 4
	je	.L41
	cmp	DWORD PTR -12[rbp], 4
	je	.L41
	cmp	DWORD PTR -8[rbp], 4
	jne	.L42
.L41:
	mov	eax, 1
	jmp	.L43
.L42:
	mov	eax, 0
.L43:
	mov	edi, eax
	mov	eax, 0
	call	assume@PLT
.L40:
	mov	eax, DWORD PTR flag3[rip]
	mov	esi, 4
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, 0
	call	sc_fence@PLT
	mov	eax, DWORD PTR flag0[rip]
	mov	edx, DWORD PTR -28[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag1[rip]
	mov	edx, DWORD PTR -24[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag2[rip]
	mov	edx, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -28[rbp], 1
	jg	.L44
	cmp	DWORD PTR -24[rbp], 1
	jg	.L44
	cmp	DWORD PTR -20[rbp], 1
	jg	.L44
	mov	eax, 1
	jmp	.L45
.L44:
	mov	eax, 0
.L45:
	mov	edi, eax
	mov	eax, 0
	call	assume@PLT
	mov	eax, DWORD PTR _cc_x[rip]
	mov	esi, 3
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, DWORD PTR _cc_x[rip]
	mov	edx, DWORD PTR -4[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -4[rbp], 3
	sete	al
	movzx	eax, al
	mov	edi, eax
	mov	eax, 0
	call	assert@PLT
	mov	eax, DWORD PTR flag4[rip]
	mov	edx, DWORD PTR -16[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag5[rip]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag6[rip]
	mov	edx, DWORD PTR -8[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -16[rbp], 2
	je	.L46
	cmp	DWORD PTR -16[rbp], 3
	je	.L46
	cmp	DWORD PTR -12[rbp], 2
	je	.L46
	cmp	DWORD PTR -12[rbp], 3
	je	.L46
	cmp	DWORD PTR -8[rbp], 2
	je	.L46
	cmp	DWORD PTR -8[rbp], 3
	je	.L46
	mov	eax, 1
	jmp	.L47
.L46:
	mov	eax, 0
.L47:
	mov	edi, eax
	mov	eax, 0
	call	assume@PLT
	mov	eax, DWORD PTR flag3[rip]
	mov	esi, 0
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	jmp	.L48
	.cfi_endproc
.LFE3:
	.size	t3, .-t3
	.globl	t4
	.type	t4, @function
t4:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
.L61:
	mov	eax, DWORD PTR flag4[rip]
	mov	esi, 1
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, 0
	call	sc_fence@PLT
	mov	eax, DWORD PTR flag0[rip]
	mov	edx, DWORD PTR -28[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag1[rip]
	mov	edx, DWORD PTR -24[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag2[rip]
	mov	edx, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag3[rip]
	mov	edx, DWORD PTR -16[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag5[rip]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag6[rip]
	mov	edx, DWORD PTR -8[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -28[rbp], 2
	jg	.L50
	cmp	DWORD PTR -24[rbp], 2
	jg	.L50
	cmp	DWORD PTR -20[rbp], 2
	jg	.L50
	cmp	DWORD PTR -16[rbp], 2
	jg	.L50
	cmp	DWORD PTR -12[rbp], 2
	jg	.L50
	cmp	DWORD PTR -8[rbp], 2
	jg	.L50
	mov	eax, 1
	jmp	.L51
.L50:
	mov	eax, 0
.L51:
	mov	edi, eax
	mov	eax, 0
	call	assume@PLT
	mov	eax, DWORD PTR flag4[rip]
	mov	esi, 3
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, 0
	call	sc_fence@PLT
	mov	eax, DWORD PTR flag0[rip]
	mov	edx, DWORD PTR -28[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag1[rip]
	mov	edx, DWORD PTR -24[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag2[rip]
	mov	edx, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag3[rip]
	mov	edx, DWORD PTR -16[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag5[rip]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag6[rip]
	mov	edx, DWORD PTR -8[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -28[rbp], 1
	je	.L52
	cmp	DWORD PTR -24[rbp], 1
	je	.L52
	cmp	DWORD PTR -20[rbp], 1
	je	.L52
	cmp	DWORD PTR -16[rbp], 1
	je	.L52
	cmp	DWORD PTR -12[rbp], 1
	je	.L52
	cmp	DWORD PTR -8[rbp], 1
	jne	.L53
.L52:
	mov	eax, DWORD PTR flag4[rip]
	mov	esi, 2
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, 0
	call	sc_fence@PLT
	mov	eax, DWORD PTR flag0[rip]
	mov	edx, DWORD PTR -28[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag1[rip]
	mov	edx, DWORD PTR -24[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag2[rip]
	mov	edx, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag3[rip]
	mov	edx, DWORD PTR -16[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag5[rip]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag6[rip]
	mov	edx, DWORD PTR -8[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -28[rbp], 4
	je	.L54
	cmp	DWORD PTR -24[rbp], 4
	je	.L54
	cmp	DWORD PTR -20[rbp], 4
	je	.L54
	cmp	DWORD PTR -16[rbp], 4
	je	.L54
	cmp	DWORD PTR -12[rbp], 4
	je	.L54
	cmp	DWORD PTR -8[rbp], 4
	jne	.L55
.L54:
	mov	eax, 1
	jmp	.L56
.L55:
	mov	eax, 0
.L56:
	mov	edi, eax
	mov	eax, 0
	call	assume@PLT
.L53:
	mov	eax, DWORD PTR flag4[rip]
	mov	esi, 4
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, 0
	call	sc_fence@PLT
	mov	eax, DWORD PTR flag0[rip]
	mov	edx, DWORD PTR -28[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag1[rip]
	mov	edx, DWORD PTR -24[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag2[rip]
	mov	edx, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag3[rip]
	mov	edx, DWORD PTR -16[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -28[rbp], 1
	jg	.L57
	cmp	DWORD PTR -24[rbp], 1
	jg	.L57
	cmp	DWORD PTR -20[rbp], 1
	jg	.L57
	cmp	DWORD PTR -16[rbp], 1
	jg	.L57
	mov	eax, 1
	jmp	.L58
.L57:
	mov	eax, 0
.L58:
	mov	edi, eax
	mov	eax, 0
	call	assume@PLT
	mov	eax, DWORD PTR _cc_x[rip]
	mov	esi, 4
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, DWORD PTR _cc_x[rip]
	mov	edx, DWORD PTR -4[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -4[rbp], 4
	sete	al
	movzx	eax, al
	mov	edi, eax
	mov	eax, 0
	call	assert@PLT
	mov	eax, DWORD PTR flag5[rip]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag6[rip]
	mov	edx, DWORD PTR -8[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -12[rbp], 2
	je	.L59
	cmp	DWORD PTR -12[rbp], 3
	je	.L59
	cmp	DWORD PTR -8[rbp], 2
	je	.L59
	cmp	DWORD PTR -8[rbp], 3
	je	.L59
	mov	eax, 1
	jmp	.L60
.L59:
	mov	eax, 0
.L60:
	mov	edi, eax
	mov	eax, 0
	call	assume@PLT
	mov	eax, DWORD PTR flag4[rip]
	mov	esi, 0
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	jmp	.L61
	.cfi_endproc
.LFE4:
	.size	t4, .-t4
	.globl	t5
	.type	t5, @function
t5:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
.L74:
	mov	eax, DWORD PTR flag5[rip]
	mov	esi, 1
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, 0
	call	sc_fence@PLT
	mov	eax, DWORD PTR flag0[rip]
	mov	edx, DWORD PTR -28[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag1[rip]
	mov	edx, DWORD PTR -24[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag2[rip]
	mov	edx, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag3[rip]
	mov	edx, DWORD PTR -16[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag4[rip]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag6[rip]
	mov	edx, DWORD PTR -8[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -28[rbp], 2
	jg	.L63
	cmp	DWORD PTR -24[rbp], 2
	jg	.L63
	cmp	DWORD PTR -20[rbp], 2
	jg	.L63
	cmp	DWORD PTR -16[rbp], 2
	jg	.L63
	cmp	DWORD PTR -12[rbp], 2
	jg	.L63
	cmp	DWORD PTR -8[rbp], 2
	jg	.L63
	mov	eax, 1
	jmp	.L64
.L63:
	mov	eax, 0
.L64:
	mov	edi, eax
	mov	eax, 0
	call	assume@PLT
	mov	eax, DWORD PTR flag5[rip]
	mov	esi, 3
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, 0
	call	sc_fence@PLT
	mov	eax, DWORD PTR flag0[rip]
	mov	edx, DWORD PTR -28[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag1[rip]
	mov	edx, DWORD PTR -24[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag2[rip]
	mov	edx, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag3[rip]
	mov	edx, DWORD PTR -16[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag4[rip]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag6[rip]
	mov	edx, DWORD PTR -8[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -28[rbp], 1
	je	.L65
	cmp	DWORD PTR -24[rbp], 1
	je	.L65
	cmp	DWORD PTR -20[rbp], 1
	je	.L65
	cmp	DWORD PTR -16[rbp], 1
	je	.L65
	cmp	DWORD PTR -12[rbp], 1
	je	.L65
	cmp	DWORD PTR -8[rbp], 1
	jne	.L66
.L65:
	mov	eax, DWORD PTR flag5[rip]
	mov	esi, 2
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, 0
	call	sc_fence@PLT
	mov	eax, DWORD PTR flag0[rip]
	mov	edx, DWORD PTR -28[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag1[rip]
	mov	edx, DWORD PTR -24[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag2[rip]
	mov	edx, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag3[rip]
	mov	edx, DWORD PTR -16[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag4[rip]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag6[rip]
	mov	edx, DWORD PTR -8[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -28[rbp], 4
	je	.L67
	cmp	DWORD PTR -24[rbp], 4
	je	.L67
	cmp	DWORD PTR -20[rbp], 4
	je	.L67
	cmp	DWORD PTR -16[rbp], 4
	je	.L67
	cmp	DWORD PTR -12[rbp], 4
	je	.L67
	cmp	DWORD PTR -8[rbp], 4
	jne	.L68
.L67:
	mov	eax, 1
	jmp	.L69
.L68:
	mov	eax, 0
.L69:
	mov	edi, eax
	mov	eax, 0
	call	assume@PLT
.L66:
	mov	eax, DWORD PTR flag5[rip]
	mov	esi, 4
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, 0
	call	sc_fence@PLT
	mov	eax, DWORD PTR flag0[rip]
	mov	edx, DWORD PTR -28[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag1[rip]
	mov	edx, DWORD PTR -24[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag2[rip]
	mov	edx, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag3[rip]
	mov	edx, DWORD PTR -16[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag4[rip]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -28[rbp], 1
	jg	.L70
	cmp	DWORD PTR -24[rbp], 1
	jg	.L70
	cmp	DWORD PTR -20[rbp], 1
	jg	.L70
	cmp	DWORD PTR -16[rbp], 1
	jg	.L70
	cmp	DWORD PTR -12[rbp], 1
	jg	.L70
	mov	eax, 1
	jmp	.L71
.L70:
	mov	eax, 0
.L71:
	mov	edi, eax
	mov	eax, 0
	call	assume@PLT
	mov	eax, DWORD PTR _cc_x[rip]
	mov	esi, 5
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, DWORD PTR _cc_x[rip]
	mov	edx, DWORD PTR -4[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -4[rbp], 5
	sete	al
	movzx	eax, al
	mov	edi, eax
	mov	eax, 0
	call	assert@PLT
	mov	eax, DWORD PTR flag6[rip]
	mov	edx, DWORD PTR -8[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -8[rbp], 2
	je	.L72
	cmp	DWORD PTR -8[rbp], 3
	je	.L72
	mov	eax, 1
	jmp	.L73
.L72:
	mov	eax, 0
.L73:
	mov	edi, eax
	mov	eax, 0
	call	assume@PLT
	mov	eax, DWORD PTR flag5[rip]
	mov	esi, 0
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	jmp	.L74
	.cfi_endproc
.LFE5:
	.size	t5, .-t5
	.globl	t6
	.type	t6, @function
t6:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
.L85:
	mov	eax, DWORD PTR flag6[rip]
	mov	esi, 1
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, 0
	call	sc_fence@PLT
	mov	eax, DWORD PTR flag0[rip]
	mov	edx, DWORD PTR -28[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag1[rip]
	mov	edx, DWORD PTR -24[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag2[rip]
	mov	edx, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag3[rip]
	mov	edx, DWORD PTR -16[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag4[rip]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag5[rip]
	mov	edx, DWORD PTR -8[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -28[rbp], 2
	jg	.L76
	cmp	DWORD PTR -24[rbp], 2
	jg	.L76
	cmp	DWORD PTR -20[rbp], 2
	jg	.L76
	cmp	DWORD PTR -16[rbp], 2
	jg	.L76
	cmp	DWORD PTR -12[rbp], 2
	jg	.L76
	cmp	DWORD PTR -8[rbp], 2
	jg	.L76
	mov	eax, 1
	jmp	.L77
.L76:
	mov	eax, 0
.L77:
	mov	edi, eax
	mov	eax, 0
	call	assume@PLT
	mov	eax, DWORD PTR flag6[rip]
	mov	esi, 3
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, 0
	call	sc_fence@PLT
	mov	eax, DWORD PTR flag0[rip]
	mov	edx, DWORD PTR -28[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag1[rip]
	mov	edx, DWORD PTR -24[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag2[rip]
	mov	edx, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag3[rip]
	mov	edx, DWORD PTR -16[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag4[rip]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag5[rip]
	mov	edx, DWORD PTR -8[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -28[rbp], 1
	je	.L78
	cmp	DWORD PTR -24[rbp], 1
	je	.L78
	cmp	DWORD PTR -20[rbp], 1
	je	.L78
	cmp	DWORD PTR -16[rbp], 1
	je	.L78
	cmp	DWORD PTR -12[rbp], 1
	je	.L78
	cmp	DWORD PTR -8[rbp], 1
	jne	.L79
.L78:
	mov	eax, DWORD PTR flag6[rip]
	mov	esi, 2
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, 0
	call	sc_fence@PLT
	mov	eax, DWORD PTR flag0[rip]
	mov	edx, DWORD PTR -28[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag1[rip]
	mov	edx, DWORD PTR -24[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag2[rip]
	mov	edx, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag3[rip]
	mov	edx, DWORD PTR -16[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag4[rip]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag5[rip]
	mov	edx, DWORD PTR -8[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -28[rbp], 4
	je	.L80
	cmp	DWORD PTR -24[rbp], 4
	je	.L80
	cmp	DWORD PTR -20[rbp], 4
	je	.L80
	cmp	DWORD PTR -16[rbp], 4
	je	.L80
	cmp	DWORD PTR -12[rbp], 4
	je	.L80
	cmp	DWORD PTR -8[rbp], 4
	jne	.L81
.L80:
	mov	eax, 1
	jmp	.L82
.L81:
	mov	eax, 0
.L82:
	mov	edi, eax
	mov	eax, 0
	call	assume@PLT
.L79:
	mov	eax, DWORD PTR flag6[rip]
	mov	esi, 4
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, 0
	call	sc_fence@PLT
	mov	eax, DWORD PTR flag0[rip]
	mov	edx, DWORD PTR -28[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag1[rip]
	mov	edx, DWORD PTR -24[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag2[rip]
	mov	edx, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag3[rip]
	mov	edx, DWORD PTR -16[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag4[rip]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	mov	eax, DWORD PTR flag5[rip]
	mov	edx, DWORD PTR -8[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -28[rbp], 1
	jg	.L83
	cmp	DWORD PTR -24[rbp], 1
	jg	.L83
	cmp	DWORD PTR -20[rbp], 1
	jg	.L83
	cmp	DWORD PTR -16[rbp], 1
	jg	.L83
	cmp	DWORD PTR -12[rbp], 1
	jg	.L83
	cmp	DWORD PTR -8[rbp], 1
	jg	.L83
	mov	eax, 1
	jmp	.L84
.L83:
	mov	eax, 0
.L84:
	mov	edi, eax
	mov	eax, 0
	call	assume@PLT
	mov	eax, DWORD PTR _cc_x[rip]
	mov	esi, 6
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	mov	eax, DWORD PTR _cc_x[rip]
	mov	edx, DWORD PTR -4[rbp]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	rlx_read_ps@PLT
	cmp	DWORD PTR -4[rbp], 6
	sete	al
	movzx	eax, al
	mov	edi, eax
	mov	eax, 0
	call	assert@PLT
	mov	eax, DWORD PTR flag6[rip]
	mov	esi, 0
	mov	edi, eax
	mov	eax, 0
	call	rlx_write_ps@PLT
	jmp	.L85
	.cfi_endproc
.LFE6:
	.size	t6, .-t6
	.globl	main
	.type	main, @function
main:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 64
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	lea	rax, -64[rbp]
	mov	ecx, 0
	lea	rdx, t0[rip]
	mov	esi, 0
	mov	rdi, rax
	call	pthread_create@PLT
	lea	rax, -56[rbp]
	mov	ecx, 0
	lea	rdx, t1[rip]
	mov	esi, 0
	mov	rdi, rax
	call	pthread_create@PLT
	lea	rax, -48[rbp]
	mov	ecx, 0
	lea	rdx, t2[rip]
	mov	esi, 0
	mov	rdi, rax
	call	pthread_create@PLT
	lea	rax, -40[rbp]
	mov	ecx, 0
	lea	rdx, t3[rip]
	mov	esi, 0
	mov	rdi, rax
	call	pthread_create@PLT
	lea	rax, -32[rbp]
	mov	ecx, 0
	lea	rdx, t4[rip]
	mov	esi, 0
	mov	rdi, rax
	call	pthread_create@PLT
	lea	rax, -24[rbp]
	mov	ecx, 0
	lea	rdx, t5[rip]
	mov	esi, 0
	mov	rdi, rax
	call	pthread_create@PLT
	lea	rax, -16[rbp]
	mov	ecx, 0
	lea	rdx, t6[rip]
	mov	esi, 0
	mov	rdi, rax
	call	pthread_create@PLT
	mov	eax, 0
	mov	rdx, QWORD PTR -8[rbp]
	sub	rdx, QWORD PTR fs:40
	je	.L88
	call	__stack_chk_fail@PLT
.L88:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	main, .-main
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"850182.c"
	.text
	.comm	flag0,4,4
	.comm	flag1,4,4
	.comm	flag2,4,4
	.comm	flag3,4,4
	.comm	flag4,4,4
	.comm	flag5,4,4
	.comm	flag6,4,4
	.comm	_cc_x,4,4
	.align	2
	.global	t0
	.syntax unified
	.arm
	.fpu softvfp
	.type	t0, %function
t0:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #32
.L11:
	ldr	r3, .L12
	ldr	r3, [r3]
	mov	r1, #1
	mov	r0, r3
	bl	rlx_write_ps
	bl	sc_fence
	ldr	r3, .L12+4
	ldr	r3, [r3]
	ldr	r1, [fp, #-32]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L12+8
	ldr	r3, [r3]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L12+12
	ldr	r3, [r3]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L12+16
	ldr	r3, [r3]
	ldr	r1, [fp, #-20]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L12+20
	ldr	r3, [r3]
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L12+24
	ldr	r3, [r3]
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-32]
	cmp	r3, #2
	bgt	.L2
	ldr	r3, [fp, #-28]
	cmp	r3, #2
	bgt	.L2
	ldr	r3, [fp, #-24]
	cmp	r3, #2
	bgt	.L2
	ldr	r3, [fp, #-20]
	cmp	r3, #2
	bgt	.L2
	ldr	r3, [fp, #-16]
	cmp	r3, #2
	bgt	.L2
	ldr	r3, [fp, #-12]
	cmp	r3, #2
	bgt	.L2
	mov	r3, #1
	b	.L3
.L2:
	mov	r3, #0
.L3:
	mov	r0, r3
	bl	assume
	ldr	r3, .L12
	ldr	r3, [r3]
	mov	r1, #3
	mov	r0, r3
	bl	rlx_write_ps
	bl	sc_fence
	ldr	r3, .L12+4
	ldr	r3, [r3]
	ldr	r1, [fp, #-32]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L12+8
	ldr	r3, [r3]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L12+12
	ldr	r3, [r3]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L12+16
	ldr	r3, [r3]
	ldr	r1, [fp, #-20]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L12+20
	ldr	r3, [r3]
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L12+24
	ldr	r3, [r3]
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-32]
	cmp	r3, #1
	beq	.L4
	ldr	r3, [fp, #-28]
	cmp	r3, #1
	beq	.L4
	ldr	r3, [fp, #-24]
	cmp	r3, #1
	beq	.L4
	ldr	r3, [fp, #-20]
	cmp	r3, #1
	beq	.L4
	ldr	r3, [fp, #-16]
	cmp	r3, #1
	beq	.L4
	ldr	r3, [fp, #-12]
	cmp	r3, #1
	bne	.L5
.L4:
	ldr	r3, .L12
	ldr	r3, [r3]
	mov	r1, #2
	mov	r0, r3
	bl	rlx_write_ps
	bl	sc_fence
	ldr	r3, .L12+4
	ldr	r3, [r3]
	ldr	r1, [fp, #-32]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L12+8
	ldr	r3, [r3]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L12+12
	ldr	r3, [r3]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L12+16
	ldr	r3, [r3]
	ldr	r1, [fp, #-20]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L12+20
	ldr	r3, [r3]
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L12+24
	ldr	r3, [r3]
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-32]
	cmp	r3, #4
	beq	.L6
	ldr	r3, [fp, #-28]
	cmp	r3, #4
	beq	.L6
	ldr	r3, [fp, #-24]
	cmp	r3, #4
	beq	.L6
	ldr	r3, [fp, #-20]
	cmp	r3, #4
	beq	.L6
	ldr	r3, [fp, #-16]
	cmp	r3, #4
	beq	.L6
	ldr	r3, [fp, #-12]
	cmp	r3, #4
	bne	.L7
.L6:
	mov	r3, #1
	b	.L8
.L7:
	mov	r3, #0
.L8:
	mov	r0, r3
	bl	assume
.L5:
	ldr	r3, .L12
	ldr	r3, [r3]
	mov	r1, #4
	mov	r0, r3
	bl	rlx_write_ps
	bl	sc_fence
	ldr	r3, .L12+28
	ldr	r3, [r3]
	mov	r1, #0
	mov	r0, r3
	bl	rlx_write_ps
	ldr	r3, .L12+28
	ldr	r3, [r3]
	ldr	r1, [fp, #-8]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	assert
	ldr	r3, .L12+4
	ldr	r3, [r3]
	ldr	r1, [fp, #-32]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L12+8
	ldr	r3, [r3]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L12+12
	ldr	r3, [r3]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L12+16
	ldr	r3, [r3]
	ldr	r1, [fp, #-20]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L12+20
	ldr	r3, [r3]
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L12+24
	ldr	r3, [r3]
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-32]
	cmp	r3, #2
	beq	.L9
	ldr	r3, [fp, #-32]
	cmp	r3, #3
	beq	.L9
	ldr	r3, [fp, #-28]
	cmp	r3, #2
	beq	.L9
	ldr	r3, [fp, #-28]
	cmp	r3, #3
	beq	.L9
	ldr	r3, [fp, #-24]
	cmp	r3, #2
	beq	.L9
	ldr	r3, [fp, #-24]
	cmp	r3, #3
	beq	.L9
	ldr	r3, [fp, #-20]
	cmp	r3, #2
	beq	.L9
	ldr	r3, [fp, #-20]
	cmp	r3, #3
	beq	.L9
	ldr	r3, [fp, #-16]
	cmp	r3, #2
	beq	.L9
	ldr	r3, [fp, #-16]
	cmp	r3, #3
	beq	.L9
	ldr	r3, [fp, #-12]
	cmp	r3, #2
	beq	.L9
	ldr	r3, [fp, #-12]
	cmp	r3, #3
	beq	.L9
	mov	r3, #1
	b	.L10
.L9:
	mov	r3, #0
.L10:
	mov	r0, r3
	bl	assume
	ldr	r3, .L12
	ldr	r3, [r3]
	mov	r1, #0
	mov	r0, r3
	bl	rlx_write_ps
	b	.L11
.L13:
	.align	2
.L12:
	.word	flag0
	.word	flag1
	.word	flag2
	.word	flag3
	.word	flag4
	.word	flag5
	.word	flag6
	.word	_cc_x
	.size	t0, .-t0
	.align	2
	.global	t1
	.syntax unified
	.arm
	.fpu softvfp
	.type	t1, %function
t1:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #32
.L24:
	ldr	r3, .L25
	ldr	r3, [r3]
	mov	r1, #1
	mov	r0, r3
	bl	rlx_write_ps
	bl	sc_fence
	ldr	r3, .L25+4
	ldr	r3, [r3]
	ldr	r1, [fp, #-32]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L25+8
	ldr	r3, [r3]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L25+12
	ldr	r3, [r3]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L25+16
	ldr	r3, [r3]
	ldr	r1, [fp, #-20]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L25+20
	ldr	r3, [r3]
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L25+24
	ldr	r3, [r3]
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-32]
	cmp	r3, #2
	bgt	.L15
	ldr	r3, [fp, #-28]
	cmp	r3, #2
	bgt	.L15
	ldr	r3, [fp, #-24]
	cmp	r3, #2
	bgt	.L15
	ldr	r3, [fp, #-20]
	cmp	r3, #2
	bgt	.L15
	ldr	r3, [fp, #-16]
	cmp	r3, #2
	bgt	.L15
	ldr	r3, [fp, #-12]
	cmp	r3, #2
	bgt	.L15
	mov	r3, #1
	b	.L16
.L15:
	mov	r3, #0
.L16:
	mov	r0, r3
	bl	assume
	ldr	r3, .L25
	ldr	r3, [r3]
	mov	r1, #3
	mov	r0, r3
	bl	rlx_write_ps
	bl	sc_fence
	ldr	r3, .L25+4
	ldr	r3, [r3]
	ldr	r1, [fp, #-32]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L25+8
	ldr	r3, [r3]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L25+12
	ldr	r3, [r3]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L25+16
	ldr	r3, [r3]
	ldr	r1, [fp, #-20]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L25+20
	ldr	r3, [r3]
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L25+24
	ldr	r3, [r3]
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-32]
	cmp	r3, #1
	beq	.L17
	ldr	r3, [fp, #-28]
	cmp	r3, #1
	beq	.L17
	ldr	r3, [fp, #-24]
	cmp	r3, #1
	beq	.L17
	ldr	r3, [fp, #-20]
	cmp	r3, #1
	beq	.L17
	ldr	r3, [fp, #-16]
	cmp	r3, #1
	beq	.L17
	ldr	r3, [fp, #-12]
	cmp	r3, #1
	bne	.L18
.L17:
	ldr	r3, .L25
	ldr	r3, [r3]
	mov	r1, #2
	mov	r0, r3
	bl	rlx_write_ps
	bl	sc_fence
	ldr	r3, .L25+4
	ldr	r3, [r3]
	ldr	r1, [fp, #-32]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L25+8
	ldr	r3, [r3]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L25+12
	ldr	r3, [r3]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L25+16
	ldr	r3, [r3]
	ldr	r1, [fp, #-20]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L25+20
	ldr	r3, [r3]
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L25+24
	ldr	r3, [r3]
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-32]
	cmp	r3, #4
	beq	.L19
	ldr	r3, [fp, #-28]
	cmp	r3, #4
	beq	.L19
	ldr	r3, [fp, #-24]
	cmp	r3, #4
	beq	.L19
	ldr	r3, [fp, #-20]
	cmp	r3, #4
	beq	.L19
	ldr	r3, [fp, #-16]
	cmp	r3, #4
	beq	.L19
	ldr	r3, [fp, #-12]
	cmp	r3, #4
	bne	.L20
.L19:
	mov	r3, #1
	b	.L21
.L20:
	mov	r3, #0
.L21:
	mov	r0, r3
	bl	assume
.L18:
	ldr	r3, .L25
	ldr	r3, [r3]
	mov	r1, #4
	mov	r0, r3
	bl	rlx_write_ps
	bl	sc_fence
	ldr	r3, .L25+4
	ldr	r3, [r3]
	ldr	r1, [fp, #-32]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-32]
	cmp	r3, #1
	movle	r3, #1
	movgt	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	assume
	ldr	r3, .L25+28
	ldr	r3, [r3]
	mov	r1, #1
	mov	r0, r3
	bl	rlx_write_ps
	ldr	r3, .L25+28
	ldr	r3, [r3]
	ldr	r1, [fp, #-8]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-8]
	cmp	r3, #1
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	assert
	ldr	r3, .L25+8
	ldr	r3, [r3]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L25+12
	ldr	r3, [r3]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L25+16
	ldr	r3, [r3]
	ldr	r1, [fp, #-20]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L25+20
	ldr	r3, [r3]
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L25+24
	ldr	r3, [r3]
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-28]
	cmp	r3, #2
	beq	.L22
	ldr	r3, [fp, #-28]
	cmp	r3, #3
	beq	.L22
	ldr	r3, [fp, #-24]
	cmp	r3, #2
	beq	.L22
	ldr	r3, [fp, #-24]
	cmp	r3, #3
	beq	.L22
	ldr	r3, [fp, #-20]
	cmp	r3, #2
	beq	.L22
	ldr	r3, [fp, #-20]
	cmp	r3, #3
	beq	.L22
	ldr	r3, [fp, #-16]
	cmp	r3, #2
	beq	.L22
	ldr	r3, [fp, #-16]
	cmp	r3, #3
	beq	.L22
	ldr	r3, [fp, #-12]
	cmp	r3, #2
	beq	.L22
	ldr	r3, [fp, #-12]
	cmp	r3, #3
	beq	.L22
	mov	r3, #1
	b	.L23
.L22:
	mov	r3, #0
.L23:
	mov	r0, r3
	bl	assume
	ldr	r3, .L25
	ldr	r3, [r3]
	mov	r1, #0
	mov	r0, r3
	bl	rlx_write_ps
	b	.L24
.L26:
	.align	2
.L25:
	.word	flag1
	.word	flag0
	.word	flag2
	.word	flag3
	.word	flag4
	.word	flag5
	.word	flag6
	.word	_cc_x
	.size	t1, .-t1
	.align	2
	.global	t2
	.syntax unified
	.arm
	.fpu softvfp
	.type	t2, %function
t2:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #32
.L39:
	ldr	r3, .L40
	ldr	r3, [r3]
	mov	r1, #1
	mov	r0, r3
	bl	rlx_write_ps
	ldr	r3, .L40+4
	ldr	r3, [r3]
	ldr	r1, [fp, #-32]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L40+8
	ldr	r3, [r3]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L40+12
	ldr	r3, [r3]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L40+16
	ldr	r3, [r3]
	ldr	r1, [fp, #-20]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L40+20
	ldr	r3, [r3]
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L40+24
	ldr	r3, [r3]
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-32]
	cmp	r3, #2
	bgt	.L28
	ldr	r3, [fp, #-28]
	cmp	r3, #2
	bgt	.L28
	ldr	r3, [fp, #-24]
	cmp	r3, #2
	bgt	.L28
	ldr	r3, [fp, #-20]
	cmp	r3, #2
	bgt	.L28
	ldr	r3, [fp, #-16]
	cmp	r3, #2
	bgt	.L28
	ldr	r3, [fp, #-12]
	cmp	r3, #2
	bgt	.L28
	mov	r3, #1
	b	.L29
.L28:
	mov	r3, #0
.L29:
	mov	r0, r3
	bl	assume
	ldr	r3, .L40
	ldr	r3, [r3]
	mov	r1, #3
	mov	r0, r3
	bl	rlx_write_ps
	ldr	r3, .L40+4
	ldr	r3, [r3]
	ldr	r1, [fp, #-32]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L40+8
	ldr	r3, [r3]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L40+12
	ldr	r3, [r3]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L40+16
	ldr	r3, [r3]
	ldr	r1, [fp, #-20]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L40+20
	ldr	r3, [r3]
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L40+24
	ldr	r3, [r3]
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-32]
	cmp	r3, #1
	beq	.L30
	ldr	r3, [fp, #-28]
	cmp	r3, #1
	beq	.L30
	ldr	r3, [fp, #-24]
	cmp	r3, #1
	beq	.L30
	ldr	r3, [fp, #-20]
	cmp	r3, #1
	beq	.L30
	ldr	r3, [fp, #-16]
	cmp	r3, #1
	beq	.L30
	ldr	r3, [fp, #-12]
	cmp	r3, #1
	bne	.L31
.L30:
	ldr	r3, .L40
	ldr	r3, [r3]
	mov	r1, #2
	mov	r0, r3
	bl	rlx_write_ps
	bl	sc_fence
	ldr	r3, .L40+4
	ldr	r3, [r3]
	ldr	r1, [fp, #-32]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L40+8
	ldr	r3, [r3]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L40+12
	ldr	r3, [r3]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L40+16
	ldr	r3, [r3]
	ldr	r1, [fp, #-20]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L40+20
	ldr	r3, [r3]
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L40+24
	ldr	r3, [r3]
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-32]
	cmp	r3, #4
	beq	.L32
	ldr	r3, [fp, #-28]
	cmp	r3, #4
	beq	.L32
	ldr	r3, [fp, #-24]
	cmp	r3, #4
	beq	.L32
	ldr	r3, [fp, #-20]
	cmp	r3, #4
	beq	.L32
	ldr	r3, [fp, #-16]
	cmp	r3, #4
	beq	.L32
	ldr	r3, [fp, #-12]
	cmp	r3, #4
	bne	.L33
.L32:
	mov	r3, #1
	b	.L34
.L33:
	mov	r3, #0
.L34:
	mov	r0, r3
	bl	assume
.L31:
	ldr	r3, .L40
	ldr	r3, [r3]
	mov	r1, #4
	mov	r0, r3
	bl	rlx_write_ps
	ldr	r3, .L40+4
	ldr	r3, [r3]
	ldr	r1, [fp, #-32]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L40+8
	ldr	r3, [r3]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-32]
	cmp	r3, #1
	bgt	.L35
	ldr	r3, [fp, #-28]
	cmp	r3, #1
	bgt	.L35
	mov	r3, #1
	b	.L36
.L35:
	mov	r3, #0
.L36:
	mov	r0, r3
	bl	assume
	ldr	r3, .L40+28
	ldr	r3, [r3]
	mov	r1, #1
	mov	r0, r3
	bl	rlx_write_ps
	ldr	r3, .L40+28
	ldr	r3, [r3]
	ldr	r1, [fp, #-8]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-8]
	cmp	r3, #2
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	assert
	ldr	r3, .L40+12
	ldr	r3, [r3]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L40+16
	ldr	r3, [r3]
	ldr	r1, [fp, #-20]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L40+20
	ldr	r3, [r3]
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L40+24
	ldr	r3, [r3]
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-24]
	cmp	r3, #2
	beq	.L37
	ldr	r3, [fp, #-24]
	cmp	r3, #3
	beq	.L37
	ldr	r3, [fp, #-20]
	cmp	r3, #2
	beq	.L37
	ldr	r3, [fp, #-20]
	cmp	r3, #3
	beq	.L37
	ldr	r3, [fp, #-16]
	cmp	r3, #2
	beq	.L37
	ldr	r3, [fp, #-16]
	cmp	r3, #3
	beq	.L37
	ldr	r3, [fp, #-12]
	cmp	r3, #2
	beq	.L37
	ldr	r3, [fp, #-12]
	cmp	r3, #3
	beq	.L37
	mov	r3, #1
	b	.L38
.L37:
	mov	r3, #0
.L38:
	mov	r0, r3
	bl	assume
	ldr	r3, .L40
	ldr	r3, [r3]
	mov	r1, #0
	mov	r0, r3
	bl	rlx_write_ps
	b	.L39
.L41:
	.align	2
.L40:
	.word	flag2
	.word	flag0
	.word	flag1
	.word	flag3
	.word	flag4
	.word	flag5
	.word	flag6
	.word	_cc_x
	.size	t2, .-t2
	.align	2
	.global	t3
	.syntax unified
	.arm
	.fpu softvfp
	.type	t3, %function
t3:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #32
.L54:
	ldr	r3, .L55
	ldr	r3, [r3]
	mov	r1, #1
	mov	r0, r3
	bl	rlx_write_ps
	bl	sc_fence
	ldr	r3, .L55+4
	ldr	r3, [r3]
	ldr	r1, [fp, #-32]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L55+8
	ldr	r3, [r3]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L55+12
	ldr	r3, [r3]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L55+16
	ldr	r3, [r3]
	ldr	r1, [fp, #-20]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L55+20
	ldr	r3, [r3]
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L55+24
	ldr	r3, [r3]
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-32]
	cmp	r3, #2
	bgt	.L43
	ldr	r3, [fp, #-28]
	cmp	r3, #2
	bgt	.L43
	ldr	r3, [fp, #-24]
	cmp	r3, #2
	bgt	.L43
	ldr	r3, [fp, #-20]
	cmp	r3, #2
	bgt	.L43
	ldr	r3, [fp, #-16]
	cmp	r3, #2
	bgt	.L43
	ldr	r3, [fp, #-12]
	cmp	r3, #2
	bgt	.L43
	mov	r3, #1
	b	.L44
.L43:
	mov	r3, #0
.L44:
	mov	r0, r3
	bl	assume
	ldr	r3, .L55
	ldr	r3, [r3]
	mov	r1, #3
	mov	r0, r3
	bl	rlx_write_ps
	bl	sc_fence
	ldr	r3, .L55+4
	ldr	r3, [r3]
	ldr	r1, [fp, #-32]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L55+8
	ldr	r3, [r3]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L55+12
	ldr	r3, [r3]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L55+16
	ldr	r3, [r3]
	ldr	r1, [fp, #-20]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L55+20
	ldr	r3, [r3]
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L55+24
	ldr	r3, [r3]
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-32]
	cmp	r3, #1
	beq	.L45
	ldr	r3, [fp, #-28]
	cmp	r3, #1
	beq	.L45
	ldr	r3, [fp, #-24]
	cmp	r3, #1
	beq	.L45
	ldr	r3, [fp, #-20]
	cmp	r3, #1
	beq	.L45
	ldr	r3, [fp, #-16]
	cmp	r3, #1
	beq	.L45
	ldr	r3, [fp, #-12]
	cmp	r3, #1
	bne	.L46
.L45:
	ldr	r3, .L55
	ldr	r3, [r3]
	mov	r1, #2
	mov	r0, r3
	bl	rlx_write_ps
	bl	sc_fence
	ldr	r3, .L55+4
	ldr	r3, [r3]
	ldr	r1, [fp, #-32]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L55+8
	ldr	r3, [r3]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L55+12
	ldr	r3, [r3]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L55+16
	ldr	r3, [r3]
	ldr	r1, [fp, #-20]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L55+20
	ldr	r3, [r3]
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L55+24
	ldr	r3, [r3]
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-32]
	cmp	r3, #4
	beq	.L47
	ldr	r3, [fp, #-28]
	cmp	r3, #4
	beq	.L47
	ldr	r3, [fp, #-24]
	cmp	r3, #4
	beq	.L47
	ldr	r3, [fp, #-20]
	cmp	r3, #4
	beq	.L47
	ldr	r3, [fp, #-16]
	cmp	r3, #4
	beq	.L47
	ldr	r3, [fp, #-12]
	cmp	r3, #4
	bne	.L48
.L47:
	mov	r3, #1
	b	.L49
.L48:
	mov	r3, #0
.L49:
	mov	r0, r3
	bl	assume
.L46:
	ldr	r3, .L55
	ldr	r3, [r3]
	mov	r1, #4
	mov	r0, r3
	bl	rlx_write_ps
	bl	sc_fence
	ldr	r3, .L55+4
	ldr	r3, [r3]
	ldr	r1, [fp, #-32]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L55+8
	ldr	r3, [r3]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L55+12
	ldr	r3, [r3]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-32]
	cmp	r3, #1
	bgt	.L50
	ldr	r3, [fp, #-28]
	cmp	r3, #1
	bgt	.L50
	ldr	r3, [fp, #-24]
	cmp	r3, #1
	bgt	.L50
	mov	r3, #1
	b	.L51
.L50:
	mov	r3, #0
.L51:
	mov	r0, r3
	bl	assume
	ldr	r3, .L55+28
	ldr	r3, [r3]
	mov	r1, #3
	mov	r0, r3
	bl	rlx_write_ps
	ldr	r3, .L55+28
	ldr	r3, [r3]
	ldr	r1, [fp, #-8]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-8]
	cmp	r3, #3
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	assert
	ldr	r3, .L55+16
	ldr	r3, [r3]
	ldr	r1, [fp, #-20]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L55+20
	ldr	r3, [r3]
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L55+24
	ldr	r3, [r3]
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-20]
	cmp	r3, #2
	beq	.L52
	ldr	r3, [fp, #-20]
	cmp	r3, #3
	beq	.L52
	ldr	r3, [fp, #-16]
	cmp	r3, #2
	beq	.L52
	ldr	r3, [fp, #-16]
	cmp	r3, #3
	beq	.L52
	ldr	r3, [fp, #-12]
	cmp	r3, #2
	beq	.L52
	ldr	r3, [fp, #-12]
	cmp	r3, #3
	beq	.L52
	mov	r3, #1
	b	.L53
.L52:
	mov	r3, #0
.L53:
	mov	r0, r3
	bl	assume
	ldr	r3, .L55
	ldr	r3, [r3]
	mov	r1, #0
	mov	r0, r3
	bl	rlx_write_ps
	b	.L54
.L56:
	.align	2
.L55:
	.word	flag3
	.word	flag0
	.word	flag1
	.word	flag2
	.word	flag4
	.word	flag5
	.word	flag6
	.word	_cc_x
	.size	t3, .-t3
	.align	2
	.global	t4
	.syntax unified
	.arm
	.fpu softvfp
	.type	t4, %function
t4:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #32
.L69:
	ldr	r3, .L70
	ldr	r3, [r3]
	mov	r1, #1
	mov	r0, r3
	bl	rlx_write_ps
	bl	sc_fence
	ldr	r3, .L70+4
	ldr	r3, [r3]
	ldr	r1, [fp, #-32]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L70+8
	ldr	r3, [r3]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L70+12
	ldr	r3, [r3]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L70+16
	ldr	r3, [r3]
	ldr	r1, [fp, #-20]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L70+20
	ldr	r3, [r3]
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L70+24
	ldr	r3, [r3]
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-32]
	cmp	r3, #2
	bgt	.L58
	ldr	r3, [fp, #-28]
	cmp	r3, #2
	bgt	.L58
	ldr	r3, [fp, #-24]
	cmp	r3, #2
	bgt	.L58
	ldr	r3, [fp, #-20]
	cmp	r3, #2
	bgt	.L58
	ldr	r3, [fp, #-16]
	cmp	r3, #2
	bgt	.L58
	ldr	r3, [fp, #-12]
	cmp	r3, #2
	bgt	.L58
	mov	r3, #1
	b	.L59
.L58:
	mov	r3, #0
.L59:
	mov	r0, r3
	bl	assume
	ldr	r3, .L70
	ldr	r3, [r3]
	mov	r1, #3
	mov	r0, r3
	bl	rlx_write_ps
	bl	sc_fence
	ldr	r3, .L70+4
	ldr	r3, [r3]
	ldr	r1, [fp, #-32]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L70+8
	ldr	r3, [r3]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L70+12
	ldr	r3, [r3]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L70+16
	ldr	r3, [r3]
	ldr	r1, [fp, #-20]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L70+20
	ldr	r3, [r3]
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L70+24
	ldr	r3, [r3]
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-32]
	cmp	r3, #1
	beq	.L60
	ldr	r3, [fp, #-28]
	cmp	r3, #1
	beq	.L60
	ldr	r3, [fp, #-24]
	cmp	r3, #1
	beq	.L60
	ldr	r3, [fp, #-20]
	cmp	r3, #1
	beq	.L60
	ldr	r3, [fp, #-16]
	cmp	r3, #1
	beq	.L60
	ldr	r3, [fp, #-12]
	cmp	r3, #1
	bne	.L61
.L60:
	ldr	r3, .L70
	ldr	r3, [r3]
	mov	r1, #2
	mov	r0, r3
	bl	rlx_write_ps
	bl	sc_fence
	ldr	r3, .L70+4
	ldr	r3, [r3]
	ldr	r1, [fp, #-32]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L70+8
	ldr	r3, [r3]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L70+12
	ldr	r3, [r3]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L70+16
	ldr	r3, [r3]
	ldr	r1, [fp, #-20]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L70+20
	ldr	r3, [r3]
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L70+24
	ldr	r3, [r3]
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-32]
	cmp	r3, #4
	beq	.L62
	ldr	r3, [fp, #-28]
	cmp	r3, #4
	beq	.L62
	ldr	r3, [fp, #-24]
	cmp	r3, #4
	beq	.L62
	ldr	r3, [fp, #-20]
	cmp	r3, #4
	beq	.L62
	ldr	r3, [fp, #-16]
	cmp	r3, #4
	beq	.L62
	ldr	r3, [fp, #-12]
	cmp	r3, #4
	bne	.L63
.L62:
	mov	r3, #1
	b	.L64
.L63:
	mov	r3, #0
.L64:
	mov	r0, r3
	bl	assume
.L61:
	ldr	r3, .L70
	ldr	r3, [r3]
	mov	r1, #4
	mov	r0, r3
	bl	rlx_write_ps
	bl	sc_fence
	ldr	r3, .L70+4
	ldr	r3, [r3]
	ldr	r1, [fp, #-32]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L70+8
	ldr	r3, [r3]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L70+12
	ldr	r3, [r3]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L70+16
	ldr	r3, [r3]
	ldr	r1, [fp, #-20]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-32]
	cmp	r3, #1
	bgt	.L65
	ldr	r3, [fp, #-28]
	cmp	r3, #1
	bgt	.L65
	ldr	r3, [fp, #-24]
	cmp	r3, #1
	bgt	.L65
	ldr	r3, [fp, #-20]
	cmp	r3, #1
	bgt	.L65
	mov	r3, #1
	b	.L66
.L65:
	mov	r3, #0
.L66:
	mov	r0, r3
	bl	assume
	ldr	r3, .L70+28
	ldr	r3, [r3]
	mov	r1, #4
	mov	r0, r3
	bl	rlx_write_ps
	ldr	r3, .L70+28
	ldr	r3, [r3]
	ldr	r1, [fp, #-8]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-8]
	cmp	r3, #4
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	assert
	ldr	r3, .L70+20
	ldr	r3, [r3]
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L70+24
	ldr	r3, [r3]
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-16]
	cmp	r3, #2
	beq	.L67
	ldr	r3, [fp, #-16]
	cmp	r3, #3
	beq	.L67
	ldr	r3, [fp, #-12]
	cmp	r3, #2
	beq	.L67
	ldr	r3, [fp, #-12]
	cmp	r3, #3
	beq	.L67
	mov	r3, #1
	b	.L68
.L67:
	mov	r3, #0
.L68:
	mov	r0, r3
	bl	assume
	ldr	r3, .L70
	ldr	r3, [r3]
	mov	r1, #0
	mov	r0, r3
	bl	rlx_write_ps
	b	.L69
.L71:
	.align	2
.L70:
	.word	flag4
	.word	flag0
	.word	flag1
	.word	flag2
	.word	flag3
	.word	flag5
	.word	flag6
	.word	_cc_x
	.size	t4, .-t4
	.align	2
	.global	t5
	.syntax unified
	.arm
	.fpu softvfp
	.type	t5, %function
t5:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #32
.L84:
	ldr	r3, .L85
	ldr	r3, [r3]
	mov	r1, #1
	mov	r0, r3
	bl	rlx_write_ps
	bl	sc_fence
	ldr	r3, .L85+4
	ldr	r3, [r3]
	ldr	r1, [fp, #-32]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L85+8
	ldr	r3, [r3]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L85+12
	ldr	r3, [r3]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L85+16
	ldr	r3, [r3]
	ldr	r1, [fp, #-20]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L85+20
	ldr	r3, [r3]
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L85+24
	ldr	r3, [r3]
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-32]
	cmp	r3, #2
	bgt	.L73
	ldr	r3, [fp, #-28]
	cmp	r3, #2
	bgt	.L73
	ldr	r3, [fp, #-24]
	cmp	r3, #2
	bgt	.L73
	ldr	r3, [fp, #-20]
	cmp	r3, #2
	bgt	.L73
	ldr	r3, [fp, #-16]
	cmp	r3, #2
	bgt	.L73
	ldr	r3, [fp, #-12]
	cmp	r3, #2
	bgt	.L73
	mov	r3, #1
	b	.L74
.L73:
	mov	r3, #0
.L74:
	mov	r0, r3
	bl	assume
	ldr	r3, .L85
	ldr	r3, [r3]
	mov	r1, #3
	mov	r0, r3
	bl	rlx_write_ps
	bl	sc_fence
	ldr	r3, .L85+4
	ldr	r3, [r3]
	ldr	r1, [fp, #-32]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L85+8
	ldr	r3, [r3]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L85+12
	ldr	r3, [r3]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L85+16
	ldr	r3, [r3]
	ldr	r1, [fp, #-20]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L85+20
	ldr	r3, [r3]
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L85+24
	ldr	r3, [r3]
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-32]
	cmp	r3, #1
	beq	.L75
	ldr	r3, [fp, #-28]
	cmp	r3, #1
	beq	.L75
	ldr	r3, [fp, #-24]
	cmp	r3, #1
	beq	.L75
	ldr	r3, [fp, #-20]
	cmp	r3, #1
	beq	.L75
	ldr	r3, [fp, #-16]
	cmp	r3, #1
	beq	.L75
	ldr	r3, [fp, #-12]
	cmp	r3, #1
	bne	.L76
.L75:
	ldr	r3, .L85
	ldr	r3, [r3]
	mov	r1, #2
	mov	r0, r3
	bl	rlx_write_ps
	bl	sc_fence
	ldr	r3, .L85+4
	ldr	r3, [r3]
	ldr	r1, [fp, #-32]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L85+8
	ldr	r3, [r3]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L85+12
	ldr	r3, [r3]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L85+16
	ldr	r3, [r3]
	ldr	r1, [fp, #-20]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L85+20
	ldr	r3, [r3]
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L85+24
	ldr	r3, [r3]
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-32]
	cmp	r3, #4
	beq	.L77
	ldr	r3, [fp, #-28]
	cmp	r3, #4
	beq	.L77
	ldr	r3, [fp, #-24]
	cmp	r3, #4
	beq	.L77
	ldr	r3, [fp, #-20]
	cmp	r3, #4
	beq	.L77
	ldr	r3, [fp, #-16]
	cmp	r3, #4
	beq	.L77
	ldr	r3, [fp, #-12]
	cmp	r3, #4
	bne	.L78
.L77:
	mov	r3, #1
	b	.L79
.L78:
	mov	r3, #0
.L79:
	mov	r0, r3
	bl	assume
.L76:
	ldr	r3, .L85
	ldr	r3, [r3]
	mov	r1, #4
	mov	r0, r3
	bl	rlx_write_ps
	bl	sc_fence
	ldr	r3, .L85+4
	ldr	r3, [r3]
	ldr	r1, [fp, #-32]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L85+8
	ldr	r3, [r3]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L85+12
	ldr	r3, [r3]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L85+16
	ldr	r3, [r3]
	ldr	r1, [fp, #-20]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L85+20
	ldr	r3, [r3]
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-32]
	cmp	r3, #1
	bgt	.L80
	ldr	r3, [fp, #-28]
	cmp	r3, #1
	bgt	.L80
	ldr	r3, [fp, #-24]
	cmp	r3, #1
	bgt	.L80
	ldr	r3, [fp, #-20]
	cmp	r3, #1
	bgt	.L80
	ldr	r3, [fp, #-16]
	cmp	r3, #1
	bgt	.L80
	mov	r3, #1
	b	.L81
.L80:
	mov	r3, #0
.L81:
	mov	r0, r3
	bl	assume
	ldr	r3, .L85+28
	ldr	r3, [r3]
	mov	r1, #5
	mov	r0, r3
	bl	rlx_write_ps
	ldr	r3, .L85+28
	ldr	r3, [r3]
	ldr	r1, [fp, #-8]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-8]
	cmp	r3, #5
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	assert
	ldr	r3, .L85+24
	ldr	r3, [r3]
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-12]
	cmp	r3, #2
	beq	.L82
	ldr	r3, [fp, #-12]
	cmp	r3, #3
	beq	.L82
	mov	r3, #1
	b	.L83
.L82:
	mov	r3, #0
.L83:
	mov	r0, r3
	bl	assume
	ldr	r3, .L85
	ldr	r3, [r3]
	mov	r1, #0
	mov	r0, r3
	bl	rlx_write_ps
	b	.L84
.L86:
	.align	2
.L85:
	.word	flag5
	.word	flag0
	.word	flag1
	.word	flag2
	.word	flag3
	.word	flag4
	.word	flag6
	.word	_cc_x
	.size	t5, .-t5
	.align	2
	.global	t6
	.syntax unified
	.arm
	.fpu softvfp
	.type	t6, %function
t6:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #32
.L97:
	ldr	r3, .L98
	ldr	r3, [r3]
	mov	r1, #1
	mov	r0, r3
	bl	rlx_write_ps
	bl	sc_fence
	ldr	r3, .L98+4
	ldr	r3, [r3]
	ldr	r1, [fp, #-32]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L98+8
	ldr	r3, [r3]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L98+12
	ldr	r3, [r3]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L98+16
	ldr	r3, [r3]
	ldr	r1, [fp, #-20]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L98+20
	ldr	r3, [r3]
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L98+24
	ldr	r3, [r3]
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-32]
	cmp	r3, #2
	bgt	.L88
	ldr	r3, [fp, #-28]
	cmp	r3, #2
	bgt	.L88
	ldr	r3, [fp, #-24]
	cmp	r3, #2
	bgt	.L88
	ldr	r3, [fp, #-20]
	cmp	r3, #2
	bgt	.L88
	ldr	r3, [fp, #-16]
	cmp	r3, #2
	bgt	.L88
	ldr	r3, [fp, #-12]
	cmp	r3, #2
	bgt	.L88
	mov	r3, #1
	b	.L89
.L88:
	mov	r3, #0
.L89:
	mov	r0, r3
	bl	assume
	ldr	r3, .L98
	ldr	r3, [r3]
	mov	r1, #3
	mov	r0, r3
	bl	rlx_write_ps
	bl	sc_fence
	ldr	r3, .L98+4
	ldr	r3, [r3]
	ldr	r1, [fp, #-32]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L98+8
	ldr	r3, [r3]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L98+12
	ldr	r3, [r3]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L98+16
	ldr	r3, [r3]
	ldr	r1, [fp, #-20]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L98+20
	ldr	r3, [r3]
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L98+24
	ldr	r3, [r3]
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-32]
	cmp	r3, #1
	beq	.L90
	ldr	r3, [fp, #-28]
	cmp	r3, #1
	beq	.L90
	ldr	r3, [fp, #-24]
	cmp	r3, #1
	beq	.L90
	ldr	r3, [fp, #-20]
	cmp	r3, #1
	beq	.L90
	ldr	r3, [fp, #-16]
	cmp	r3, #1
	beq	.L90
	ldr	r3, [fp, #-12]
	cmp	r3, #1
	bne	.L91
.L90:
	ldr	r3, .L98
	ldr	r3, [r3]
	mov	r1, #2
	mov	r0, r3
	bl	rlx_write_ps
	bl	sc_fence
	ldr	r3, .L98+4
	ldr	r3, [r3]
	ldr	r1, [fp, #-32]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L98+8
	ldr	r3, [r3]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L98+12
	ldr	r3, [r3]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L98+16
	ldr	r3, [r3]
	ldr	r1, [fp, #-20]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L98+20
	ldr	r3, [r3]
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L98+24
	ldr	r3, [r3]
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-32]
	cmp	r3, #4
	beq	.L92
	ldr	r3, [fp, #-28]
	cmp	r3, #4
	beq	.L92
	ldr	r3, [fp, #-24]
	cmp	r3, #4
	beq	.L92
	ldr	r3, [fp, #-20]
	cmp	r3, #4
	beq	.L92
	ldr	r3, [fp, #-16]
	cmp	r3, #4
	beq	.L92
	ldr	r3, [fp, #-12]
	cmp	r3, #4
	bne	.L93
.L92:
	mov	r3, #1
	b	.L94
.L93:
	mov	r3, #0
.L94:
	mov	r0, r3
	bl	assume
.L91:
	ldr	r3, .L98
	ldr	r3, [r3]
	mov	r1, #4
	mov	r0, r3
	bl	rlx_write_ps
	bl	sc_fence
	ldr	r3, .L98+4
	ldr	r3, [r3]
	ldr	r1, [fp, #-32]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L98+8
	ldr	r3, [r3]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L98+12
	ldr	r3, [r3]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L98+16
	ldr	r3, [r3]
	ldr	r1, [fp, #-20]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L98+20
	ldr	r3, [r3]
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, .L98+24
	ldr	r3, [r3]
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-32]
	cmp	r3, #1
	bgt	.L95
	ldr	r3, [fp, #-28]
	cmp	r3, #1
	bgt	.L95
	ldr	r3, [fp, #-24]
	cmp	r3, #1
	bgt	.L95
	ldr	r3, [fp, #-20]
	cmp	r3, #1
	bgt	.L95
	ldr	r3, [fp, #-16]
	cmp	r3, #1
	bgt	.L95
	ldr	r3, [fp, #-12]
	cmp	r3, #1
	bgt	.L95
	mov	r3, #1
	b	.L96
.L95:
	mov	r3, #0
.L96:
	mov	r0, r3
	bl	assume
	ldr	r3, .L98+28
	ldr	r3, [r3]
	mov	r1, #6
	mov	r0, r3
	bl	rlx_write_ps
	ldr	r3, .L98+28
	ldr	r3, [r3]
	ldr	r1, [fp, #-8]
	mov	r0, r3
	bl	rlx_read_ps
	ldr	r3, [fp, #-8]
	cmp	r3, #6
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	assert
	ldr	r3, .L98
	ldr	r3, [r3]
	mov	r1, #0
	mov	r0, r3
	bl	rlx_write_ps
	b	.L97
.L99:
	.align	2
.L98:
	.word	flag6
	.word	flag0
	.word	flag1
	.word	flag2
	.word	flag3
	.word	flag4
	.word	flag5
	.word	_cc_x
	.size	t6, .-t6
	.section	.rodata
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #32
	ldr	r3, .L103
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	sub	r0, fp, #36
	mov	r3, #0
	ldr	r2, .L103+4
	mov	r1, #0
	bl	pthread_create
	sub	r0, fp, #32
	mov	r3, #0
	ldr	r2, .L103+8
	mov	r1, #0
	bl	pthread_create
	sub	r0, fp, #28
	mov	r3, #0
	ldr	r2, .L103+12
	mov	r1, #0
	bl	pthread_create
	sub	r0, fp, #24
	mov	r3, #0
	ldr	r2, .L103+16
	mov	r1, #0
	bl	pthread_create
	sub	r0, fp, #20
	mov	r3, #0
	ldr	r2, .L103+20
	mov	r1, #0
	bl	pthread_create
	sub	r0, fp, #16
	mov	r3, #0
	ldr	r2, .L103+24
	mov	r1, #0
	bl	pthread_create
	sub	r0, fp, #12
	mov	r3, #0
	ldr	r2, .L103+28
	mov	r1, #0
	bl	pthread_create
	mov	r3, #0
	ldr	r2, .L103
	ldr	r1, [r2]
	ldr	r2, [fp, #-8]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L102
	bl	__stack_chk_fail
.L102:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L104:
	.align	2
.L103:
	.word	.LC0
	.word	t0
	.word	t1
	.word	t2
	.word	t3
	.word	t4
	.word	t5
	.word	t6
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
