	.file	"23422.c"
	.intel_syntax noprefix
	.text
	.globl	read_u16_be
	.type	read_u16_be, @function
read_u16_be:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	eax, 8
	mov	ecx, eax
	mov	rax, QWORD PTR -16[rbp]
	lea	rdx, 1[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	or	eax, ecx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	read_u16_be, .-read_u16_be
	.globl	read_s16_be
	.type	read_s16_be, @function
read_s16_be:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	eax, 8
	mov	ecx, eax
	mov	rax, QWORD PTR -16[rbp]
	lea	rdx, 1[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	or	eax, ecx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	read_s16_be, .-read_s16_be
	.globl	read_u32_be
	.type	read_u32_be, @function
read_u32_be:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	eax, 24
	mov	edx, eax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 1[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	eax, 16
	or	edx, eax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 2[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	eax, 8
	or	edx, eax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 3[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	or	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	read_u32_be, .-read_u32_be
	.globl	read_s32_be
	.type	read_s32_be, @function
read_s32_be:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	eax, 24
	mov	edx, eax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 1[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	eax, 16
	or	edx, eax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 2[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	eax, 8
	or	edx, eax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 3[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	or	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	read_s32_be, .-read_s32_be
	.globl	read_u64_be
	.type	read_u64_be, @function
read_u64_be:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	rax, 56
	mov	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 1[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	rax, 48
	or	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 2[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	rax, 40
	or	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 3[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	rax, 32
	or	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 4[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	rax, 24
	or	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 5[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	rax, 16
	or	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 6[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	rax, 8
	or	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 7[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	or	rax, rdx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	read_u64_be, .-read_u64_be
	.globl	read_s64_be
	.type	read_s64_be, @function
read_s64_be:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	rax, 56
	mov	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 1[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	rax, 48
	or	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 2[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	rax, 40
	or	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 3[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	rax, 32
	or	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 4[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	rax, 24
	or	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 5[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	rax, 16
	or	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 6[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	rax, 8
	or	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 7[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	or	rax, rdx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	read_s64_be, .-read_s64_be
	.globl	read_u16_le
	.type	read_u16_le, @function
read_u16_le:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	edx, al
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 1[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	eax, 8
	or	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	read_u16_le, .-read_u16_le
	.globl	read_s16_le
	.type	read_s16_le, @function
read_s16_le:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	edx, al
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 1[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	eax, 8
	or	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	read_s16_le, .-read_s16_le
	.globl	read_u32_le
	.type	read_u32_le, @function
read_u32_le:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	edx, al
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 1[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	eax, 8
	or	edx, eax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 2[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	eax, 16
	or	edx, eax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 3[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	eax, 24
	or	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	read_u32_le, .-read_u32_le
	.globl	read_s32_le
	.type	read_s32_le, @function
read_s32_le:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	edx, al
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 1[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	eax, 8
	or	edx, eax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 2[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	eax, 16
	or	edx, eax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 3[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	eax, 24
	or	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	read_s32_le, .-read_s32_le
	.globl	read_u64_le
	.type	read_u64_le, @function
read_u64_le:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	edx, al
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 1[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	rax, 8
	or	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 2[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	rax, 16
	or	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 3[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	rax, 24
	or	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 4[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	rax, 32
	or	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 5[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	rax, 40
	or	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 6[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	rax, 48
	or	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 7[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	rax, 56
	or	rax, rdx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	read_u64_le, .-read_u64_le
	.globl	read_s64_le
	.type	read_s64_le, @function
read_s64_le:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	edx, al
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 1[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	rax, 8
	or	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 2[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	rax, 16
	or	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 3[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	rax, 24
	or	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 4[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	rax, 32
	or	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 5[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	rax, 40
	or	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 6[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	rax, 48
	or	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 7[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	rax, 56
	or	rax, rdx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	read_s64_le, .-read_s64_le
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"23422.c"
	.text
	.align	2
	.global	read_u16_be
	.syntax unified
	.arm
	.fpu softvfp
	.type	read_u16_be, %function
read_u16_be:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	ldr	r1, [fp, #-8]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	asr	r3, r3, #16
	orr	r3, r2, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	read_u16_be, .-read_u16_be
	.align	2
	.global	read_s16_be
	.syntax unified
	.arm
	.fpu softvfp
	.type	read_s16_be, %function
read_s16_be:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	ldr	r1, [fp, #-8]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	asr	r3, r3, #16
	orr	r3, r2, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	read_s16_be, .-read_s16_be
	.align	2
	.global	read_u32_be
	.syntax unified
	.arm
	.fpu softvfp
	.type	read_u32_be, %function
read_u32_be:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r2, r3, #24
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	ldr	r1, [fp, #-8]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	orr	r2, r2, r3
	ldr	r3, [fp, #-12]
	add	r3, r3, #2
	ldr	r1, [fp, #-8]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #8
	orr	r3, r2, r3
	ldr	r2, [fp, #-12]
	add	r2, r2, #3
	ldr	r1, [fp, #-8]
	add	r2, r1, r2
	ldrb	r2, [r2]	@ zero_extendqisi2
	orr	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	read_u32_be, .-read_u32_be
	.align	2
	.global	read_s32_be
	.syntax unified
	.arm
	.fpu softvfp
	.type	read_s32_be, %function
read_s32_be:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r2, r3, #24
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	ldr	r1, [fp, #-8]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	orr	r2, r2, r3
	ldr	r3, [fp, #-12]
	add	r3, r3, #2
	ldr	r1, [fp, #-8]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #8
	orr	r3, r2, r3
	ldr	r2, [fp, #-12]
	add	r2, r2, #3
	ldr	r1, [fp, #-8]
	add	r2, r1, r2
	ldrb	r2, [r2]	@ zero_extendqisi2
	orr	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	read_s32_be, .-read_s32_be
	.align	2
	.global	read_u64_be
	.syntax unified
	.arm
	.fpu softvfp
	.type	read_u64_be, %function
read_u64_be:
	@ args = 0, pretend = 0, frame = 56
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #60
	str	r0, [fp, #-32]
	str	r1, [fp, #-36]
	ldr	r2, [fp, #-32]
	ldr	r3, [fp, #-36]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r2, r3, #255
	mov	r3, #0
	mov	r4, #0
	mov	r5, #0
	lsl	r5, r2, #24
	mov	r4, #0
	ldr	r3, [fp, #-36]
	add	r2, r3, #1
	ldr	r3, [fp, #-32]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r2, r3, #255
	mov	r3, #0
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r2, #16
	mov	r0, #0
	orr	r6, r4, r0
	orr	r7, r5, r1
	ldr	r3, [fp, #-36]
	add	r2, r3, #2
	ldr	r3, [fp, #-32]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r2, r3, #255
	mov	r3, #0
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r2, #8
	mov	r0, #0
	orr	r8, r6, r0
	orr	r9, r7, r1
	ldr	r3, [fp, #-36]
	add	r2, r3, #3
	ldr	r3, [fp, #-32]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r2, r3, #255
	mov	r3, #0
	mov	r0, #0
	mov	r1, #0
	mov	r1, r2
	mov	r0, #0
	orr	r3, r8, r0
	str	r3, [fp, #-44]
	orr	r3, r9, r1
	str	r3, [fp, #-40]
	ldr	r3, [fp, #-36]
	add	r3, r3, #4
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r2, r3, #255
	mov	r3, #0
	lsr	r1, r2, #8
	str	r1, [fp, #-48]
	lsl	r3, r2, #24
	str	r3, [fp, #-52]
	sub	r2, fp, #44
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #52
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-60]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-36]
	add	r3, r3, #5
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r0, r3, #255
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #16
	orr	r3, r3, r0, lsr #16
	lsl	r2, r0, #16
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, ip, r2
	str	ip, [fp, #-68]
	orr	r3, r1, r3
	str	r3, [fp, #-64]
	ldr	r3, [fp, #-36]
	add	r3, r3, #6
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r0, r3, #255
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #8
	orr	r3, r3, r0, lsr #24
	lsl	r2, r0, #8
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, ip, r2
	str	ip, [fp, #-76]
	orr	r3, r1, r3
	str	r3, [fp, #-72]
	ldr	r3, [fp, #-36]
	add	r3, r3, #7
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r2, r3, #255
	mov	r3, #0
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, ip, r2
	str	ip, [fp, #-84]
	orr	r3, r1, r3
	str	r3, [fp, #-80]
	sub	r3, fp, #84
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
	.size	read_u64_be, .-read_u64_be
	.align	2
	.global	read_s64_be
	.syntax unified
	.arm
	.fpu softvfp
	.type	read_s64_be, %function
read_s64_be:
	@ args = 0, pretend = 0, frame = 56
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #60
	str	r0, [fp, #-32]
	str	r1, [fp, #-36]
	ldr	r2, [fp, #-32]
	ldr	r3, [fp, #-36]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r2, r3, #255
	mov	r3, #0
	mov	r4, #0
	mov	r5, #0
	lsl	r5, r2, #24
	mov	r4, #0
	ldr	r3, [fp, #-36]
	add	r2, r3, #1
	ldr	r3, [fp, #-32]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r2, r3, #255
	mov	r3, #0
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r2, #16
	mov	r0, #0
	orr	r6, r4, r0
	orr	r7, r5, r1
	ldr	r3, [fp, #-36]
	add	r2, r3, #2
	ldr	r3, [fp, #-32]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r2, r3, #255
	mov	r3, #0
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r2, #8
	mov	r0, #0
	orr	r8, r6, r0
	orr	r9, r7, r1
	ldr	r3, [fp, #-36]
	add	r2, r3, #3
	ldr	r3, [fp, #-32]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r2, r3, #255
	mov	r3, #0
	mov	r0, #0
	mov	r1, #0
	mov	r1, r2
	mov	r0, #0
	orr	r3, r8, r0
	str	r3, [fp, #-44]
	orr	r3, r9, r1
	str	r3, [fp, #-40]
	ldr	r3, [fp, #-36]
	add	r3, r3, #4
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r2, r3, #255
	mov	r3, #0
	lsr	r1, r2, #8
	str	r1, [fp, #-48]
	lsl	r3, r2, #24
	str	r3, [fp, #-52]
	sub	r2, fp, #44
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #52
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-60]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-36]
	add	r3, r3, #5
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r0, r3, #255
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #16
	orr	r3, r3, r0, lsr #16
	lsl	r2, r0, #16
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, ip, r2
	str	ip, [fp, #-68]
	orr	r3, r1, r3
	str	r3, [fp, #-64]
	ldr	r3, [fp, #-36]
	add	r3, r3, #6
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r0, r3, #255
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #8
	orr	r3, r3, r0, lsr #24
	lsl	r2, r0, #8
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, ip, r2
	str	ip, [fp, #-76]
	orr	r3, r1, r3
	str	r3, [fp, #-72]
	ldr	r3, [fp, #-36]
	add	r3, r3, #7
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r2, r3, #255
	mov	r3, #0
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, ip, r2
	str	ip, [fp, #-84]
	orr	r3, r1, r3
	str	r3, [fp, #-80]
	sub	r3, fp, #84
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
	.size	read_s64_be, .-read_s64_be
	.align	2
	.global	read_u16_le
	.syntax unified
	.arm
	.fpu softvfp
	.type	read_u16_le, %function
read_u16_le:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	ldr	r1, [fp, #-8]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	asr	r3, r3, #16
	orr	r3, r2, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	read_u16_le, .-read_u16_le
	.align	2
	.global	read_s16_le
	.syntax unified
	.arm
	.fpu softvfp
	.type	read_s16_le, %function
read_s16_le:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	ldr	r1, [fp, #-8]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	asr	r3, r3, #16
	orr	r3, r2, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	read_s16_le, .-read_s16_le
	.align	2
	.global	read_u32_le
	.syntax unified
	.arm
	.fpu softvfp
	.type	read_u32_le, %function
read_u32_le:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	ldr	r2, [fp, #-8]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #8
	orr	r2, r1, r3
	ldr	r3, [fp, #-12]
	add	r3, r3, #2
	ldr	r1, [fp, #-8]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	orr	r2, r2, r3
	ldr	r3, [fp, #-12]
	add	r3, r3, #3
	ldr	r1, [fp, #-8]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	orr	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	read_u32_le, .-read_u32_le
	.align	2
	.global	read_s32_le
	.syntax unified
	.arm
	.fpu softvfp
	.type	read_s32_le, %function
read_s32_le:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	ldr	r2, [fp, #-8]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #8
	orr	r2, r1, r3
	ldr	r3, [fp, #-12]
	add	r3, r3, #2
	ldr	r1, [fp, #-8]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	orr	r2, r2, r3
	ldr	r3, [fp, #-12]
	add	r3, r3, #3
	ldr	r1, [fp, #-8]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	orr	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	read_s32_le, .-read_s32_le
	.align	2
	.global	read_u64_le
	.syntax unified
	.arm
	.fpu softvfp
	.type	read_u64_le, %function
read_u64_le:
	@ args = 0, pretend = 0, frame = 56
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #60
	str	r0, [fp, #-32]
	str	r1, [fp, #-36]
	ldr	r2, [fp, #-32]
	ldr	r3, [fp, #-36]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r4, r3, #255
	mov	r5, #0
	ldr	r3, [fp, #-36]
	add	r2, r3, #1
	ldr	r3, [fp, #-32]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r2, r3, #255
	mov	r3, #0
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	orr	r3, r4, r0
	str	r3, [fp, #-44]
	orr	r3, r5, r1
	str	r3, [fp, #-40]
	ldr	r3, [fp, #-36]
	add	r2, r3, #2
	ldr	r3, [fp, #-32]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r2, r3, #255
	mov	r3, #0
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	sub	r4, fp, #44
	ldmia	r4, {r3-r4}
	mov	r2, r3
	orr	r2, r2, r0
	str	r2, [fp, #-52]
	mov	r3, r4
	orr	r3, r3, r1
	str	r3, [fp, #-48]
	ldr	r3, [fp, #-36]
	add	r2, r3, #3
	ldr	r3, [fp, #-32]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r2, r3, #255
	mov	r3, #0
	lsr	r1, r2, #8
	str	r1, [fp, #-56]
	lsl	r3, r2, #24
	str	r3, [fp, #-60]
	sub	r2, fp, #52
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #60
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-68]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-64]
	ldr	r3, [fp, #-36]
	add	r3, r3, #4
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r0, r3, #255
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	mov	r3, r0
	mov	r2, #0
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, ip, r2
	str	ip, [fp, #-76]
	orr	r3, r1, r3
	str	r3, [fp, #-72]
	ldr	r3, [fp, #-36]
	add	r3, r3, #5
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r0, r3, #255
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r0, #8
	mov	r2, #0
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	r8, ip, r2
	orr	r9, r1, r3
	ldr	r3, [fp, #-36]
	add	r3, r3, #6
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r0, r3, #255
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r0, #16
	mov	r2, #0
	orr	r6, r8, r2
	orr	r7, r9, r3
	ldr	r3, [fp, #-36]
	add	r3, r3, #7
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r0, r3, #255
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r0, #24
	mov	r2, #0
	orr	r1, r6, r2
	str	r1, [fp, #-84]
	orr	r3, r7, r3
	str	r3, [fp, #-80]
	sub	r3, fp, #84
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
	.size	read_u64_le, .-read_u64_le
	.align	2
	.global	read_s64_le
	.syntax unified
	.arm
	.fpu softvfp
	.type	read_s64_le, %function
read_s64_le:
	@ args = 0, pretend = 0, frame = 56
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #60
	str	r0, [fp, #-32]
	str	r1, [fp, #-36]
	ldr	r2, [fp, #-32]
	ldr	r3, [fp, #-36]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r4, r3, #255
	mov	r5, #0
	ldr	r3, [fp, #-36]
	add	r2, r3, #1
	ldr	r3, [fp, #-32]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r2, r3, #255
	mov	r3, #0
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	orr	r3, r4, r0
	str	r3, [fp, #-44]
	orr	r3, r5, r1
	str	r3, [fp, #-40]
	ldr	r3, [fp, #-36]
	add	r2, r3, #2
	ldr	r3, [fp, #-32]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r2, r3, #255
	mov	r3, #0
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	sub	r4, fp, #44
	ldmia	r4, {r3-r4}
	mov	r2, r3
	orr	r2, r2, r0
	str	r2, [fp, #-52]
	mov	r3, r4
	orr	r3, r3, r1
	str	r3, [fp, #-48]
	ldr	r3, [fp, #-36]
	add	r2, r3, #3
	ldr	r3, [fp, #-32]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r2, r3, #255
	mov	r3, #0
	lsr	r1, r2, #8
	str	r1, [fp, #-56]
	lsl	r3, r2, #24
	str	r3, [fp, #-60]
	sub	r2, fp, #52
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #60
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-68]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-64]
	ldr	r3, [fp, #-36]
	add	r3, r3, #4
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r0, r3, #255
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	mov	r3, r0
	mov	r2, #0
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, ip, r2
	str	ip, [fp, #-76]
	orr	r3, r1, r3
	str	r3, [fp, #-72]
	ldr	r3, [fp, #-36]
	add	r3, r3, #5
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r0, r3, #255
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r0, #8
	mov	r2, #0
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	r8, ip, r2
	orr	r9, r1, r3
	ldr	r3, [fp, #-36]
	add	r3, r3, #6
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r0, r3, #255
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r0, #16
	mov	r2, #0
	orr	r6, r8, r2
	orr	r7, r9, r3
	ldr	r3, [fp, #-36]
	add	r3, r3, #7
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r0, r3, #255
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r0, #24
	mov	r2, #0
	orr	r1, r6, r2
	str	r1, [fp, #-84]
	orr	r3, r7, r3
	str	r3, [fp, #-80]
	sub	r3, fp, #84
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
	.size	read_s64_le, .-read_s64_le
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
