	.file	"90763381.c"
	.intel_syntax noprefix
	.text
	.globl	align0
	.data
	.align 4
	.type	align0, @object
	.size	align0, 4
align0:
	.long	1
	.globl	align1
	.align 4
	.type	align1, @object
	.size	align1, 4
align1:
	.long	4
	.globl	align2
	.align 4
	.type	align2, @object
	.size	align2, 4
align2:
	.long	1
	.globl	align3
	.align 4
	.type	align3, @object
	.size	align3, 4
align3:
	.long	1
	.globl	align0_x
	.align 4
	.type	align0_x, @object
	.size	align0_x, 4
align0_x:
	.long	1
	.globl	align1_x
	.align 4
	.type	align1_x, @object
	.size	align1_x, 4
align1_x:
	.long	1
	.globl	align2_x
	.align 4
	.type	align2_x, @object
	.size	align2_x, 4
align2_x:
	.long	1
	.globl	align3_x
	.align 4
	.type	align3_x, @object
	.size	align3_x, 4
align3_x:
	.long	1
	.globl	align0_x0
	.align 4
	.type	align0_x0, @object
	.size	align0_x0, 4
align0_x0:
	.long	4
	.globl	align1_x0
	.align 4
	.type	align1_x0, @object
	.size	align1_x0, 4
align1_x0:
	.long	4
	.globl	align2_x0
	.align 4
	.type	align2_x0, @object
	.size	align2_x0, 4
align2_x0:
	.long	4
	.globl	align3_x0
	.align 4
	.type	align3_x0, @object
	.size	align3_x0, 4
align3_x0:
	.long	4
	.text
	.globl	f0_a
	.type	f0_a, @function
f0_a:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 4[rax]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	f0_a, .-f0_a
	.globl	f0_b
	.type	f0_b, @function
f0_b:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 4[rax]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	f0_b, .-f0_b
	.globl	f1_a
	.type	f1_a, @function
f1_a:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 4[rax]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	f1_a, .-f1_a
	.globl	f1_b
	.type	f1_b, @function
f1_b:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 4[rax]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	f1_b, .-f1_b
	.globl	f1_c
	.type	f1_c, @function
f1_c:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 8[rax]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	f1_c, .-f1_c
	.globl	f1_d
	.type	f1_d, @function
f1_d:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 12[rax]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	f1_d, .-f1_d
	.globl	f2_a
	.type	f2_a, @function
f2_a:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 4[rax]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	f2_a, .-f2_a
	.globl	f2_b
	.type	f2_b, @function
f2_b:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 4[rax]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	f2_b, .-f2_b
	.globl	f2_c
	.type	f2_c, @function
f2_c:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 8[rax]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	f2_c, .-f2_c
	.globl	f2_d
	.type	f2_d, @function
f2_d:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 12[rax]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	f2_d, .-f2_d
	.globl	f3_a
	.type	f3_a, @function
f3_a:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 4[rax]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	f3_a, .-f3_a
	.globl	f3_b
	.type	f3_b, @function
f3_b:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 4[rax]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	f3_b, .-f3_b
	.globl	f3_c
	.type	f3_c, @function
f3_c:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 8[rax]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	f3_c, .-f3_c
	.globl	f3_d
	.type	f3_d, @function
f3_d:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 12[rax]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	f3_d, .-f3_d
	.globl	f4
	.type	f4, @function
f4:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	xmm0, QWORD PTR g4[rip+8]
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	f4, .-f4
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"90763381.c"
	.text
	.global	align0
	.data
	.align	2
	.type	align0, %object
	.size	align0, 4
align0:
	.word	1
	.global	align1
	.align	2
	.type	align1, %object
	.size	align1, 4
align1:
	.word	4
	.global	align2
	.align	2
	.type	align2, %object
	.size	align2, 4
align2:
	.word	1
	.global	align3
	.align	2
	.type	align3, %object
	.size	align3, 4
align3:
	.word	1
	.global	align0_x
	.align	2
	.type	align0_x, %object
	.size	align0_x, 4
align0_x:
	.word	1
	.global	align1_x
	.align	2
	.type	align1_x, %object
	.size	align1_x, 4
align1_x:
	.word	1
	.global	align2_x
	.align	2
	.type	align2_x, %object
	.size	align2_x, 4
align2_x:
	.word	1
	.global	align3_x
	.align	2
	.type	align3_x, %object
	.size	align3_x, 4
align3_x:
	.word	1
	.global	align0_x0
	.align	2
	.type	align0_x0, %object
	.size	align0_x0, 4
align0_x0:
	.word	4
	.global	align1_x0
	.align	2
	.type	align1_x0, %object
	.size	align1_x0, 4
align1_x0:
	.word	4
	.global	align2_x0
	.align	2
	.type	align2_x0, %object
	.size	align2_x0, 4
align2_x0:
	.word	4
	.global	align3_x0
	.align	2
	.type	align3_x0, %object
	.size	align3_x0, 4
align3_x0:
	.word	4
	.text
	.align	2
	.global	f0_a
	.syntax unified
	.arm
	.fpu softvfp
	.type	f0_a, %function
f0_a:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldrb	r2, [r3, #4]	@ zero_extendqisi2
	ldrb	r1, [r3, #5]	@ zero_extendqisi2
	lsl	r1, r1, #8
	orr	r2, r1, r2
	ldrb	r1, [r3, #6]	@ zero_extendqisi2
	lsl	r1, r1, #16
	orr	r2, r1, r2
	ldrb	r3, [r3, #7]	@ zero_extendqisi2
	lsl	r3, r3, #24
	orr	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	f0_a, .-f0_a
	.align	2
	.global	f0_b
	.syntax unified
	.arm
	.fpu softvfp
	.type	f0_b, %function
f0_b:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldrb	r2, [r3, #4]	@ zero_extendqisi2
	ldrb	r1, [r3, #5]	@ zero_extendqisi2
	lsl	r1, r1, #8
	orr	r2, r1, r2
	ldrb	r1, [r3, #6]	@ zero_extendqisi2
	lsl	r1, r1, #16
	orr	r2, r1, r2
	ldrb	r3, [r3, #7]	@ zero_extendqisi2
	lsl	r3, r3, #24
	orr	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	f0_b, .-f0_b
	.align	2
	.global	f1_a
	.syntax unified
	.arm
	.fpu softvfp
	.type	f1_a, %function
f1_a:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldr	r3, [r3, #4]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	f1_a, .-f1_a
	.align	2
	.global	f1_b
	.syntax unified
	.arm
	.fpu softvfp
	.type	f1_b, %function
f1_b:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldr	r3, [r3, #4]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	f1_b, .-f1_b
	.align	2
	.global	f1_c
	.syntax unified
	.arm
	.fpu softvfp
	.type	f1_c, %function
f1_c:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldr	r3, [r3, #8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	f1_c, .-f1_c
	.align	2
	.global	f1_d
	.syntax unified
	.arm
	.fpu softvfp
	.type	f1_d, %function
f1_d:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldr	r3, [r3, #12]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	f1_d, .-f1_d
	.align	2
	.global	f2_a
	.syntax unified
	.arm
	.fpu softvfp
	.type	f2_a, %function
f2_a:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldrb	r2, [r3, #4]	@ zero_extendqisi2
	ldrb	r1, [r3, #5]	@ zero_extendqisi2
	lsl	r1, r1, #8
	orr	r2, r1, r2
	ldrb	r1, [r3, #6]	@ zero_extendqisi2
	lsl	r1, r1, #16
	orr	r2, r1, r2
	ldrb	r3, [r3, #7]	@ zero_extendqisi2
	lsl	r3, r3, #24
	orr	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	f2_a, .-f2_a
	.align	2
	.global	f2_b
	.syntax unified
	.arm
	.fpu softvfp
	.type	f2_b, %function
f2_b:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldrb	r2, [r3, #4]	@ zero_extendqisi2
	ldrb	r1, [r3, #5]	@ zero_extendqisi2
	lsl	r1, r1, #8
	orr	r2, r1, r2
	ldrb	r1, [r3, #6]	@ zero_extendqisi2
	lsl	r1, r1, #16
	orr	r2, r1, r2
	ldrb	r3, [r3, #7]	@ zero_extendqisi2
	lsl	r3, r3, #24
	orr	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	f2_b, .-f2_b
	.align	2
	.global	f2_c
	.syntax unified
	.arm
	.fpu softvfp
	.type	f2_c, %function
f2_c:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldrb	r2, [r3, #8]	@ zero_extendqisi2
	ldrb	r1, [r3, #9]	@ zero_extendqisi2
	lsl	r1, r1, #8
	orr	r2, r1, r2
	ldrb	r1, [r3, #10]	@ zero_extendqisi2
	lsl	r1, r1, #16
	orr	r2, r1, r2
	ldrb	r3, [r3, #11]	@ zero_extendqisi2
	lsl	r3, r3, #24
	orr	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	f2_c, .-f2_c
	.align	2
	.global	f2_d
	.syntax unified
	.arm
	.fpu softvfp
	.type	f2_d, %function
f2_d:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldrb	r2, [r3, #12]	@ zero_extendqisi2
	ldrb	r1, [r3, #13]	@ zero_extendqisi2
	lsl	r1, r1, #8
	orr	r2, r1, r2
	ldrb	r1, [r3, #14]	@ zero_extendqisi2
	lsl	r1, r1, #16
	orr	r2, r1, r2
	ldrb	r3, [r3, #15]	@ zero_extendqisi2
	lsl	r3, r3, #24
	orr	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	f2_d, .-f2_d
	.align	2
	.global	f3_a
	.syntax unified
	.arm
	.fpu softvfp
	.type	f3_a, %function
f3_a:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldrb	r2, [r3, #4]	@ zero_extendqisi2
	ldrb	r1, [r3, #5]	@ zero_extendqisi2
	lsl	r1, r1, #8
	orr	r2, r1, r2
	ldrb	r1, [r3, #6]	@ zero_extendqisi2
	lsl	r1, r1, #16
	orr	r2, r1, r2
	ldrb	r3, [r3, #7]	@ zero_extendqisi2
	lsl	r3, r3, #24
	orr	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	f3_a, .-f3_a
	.align	2
	.global	f3_b
	.syntax unified
	.arm
	.fpu softvfp
	.type	f3_b, %function
f3_b:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldrb	r2, [r3, #4]	@ zero_extendqisi2
	ldrb	r1, [r3, #5]	@ zero_extendqisi2
	lsl	r1, r1, #8
	orr	r2, r1, r2
	ldrb	r1, [r3, #6]	@ zero_extendqisi2
	lsl	r1, r1, #16
	orr	r2, r1, r2
	ldrb	r3, [r3, #7]	@ zero_extendqisi2
	lsl	r3, r3, #24
	orr	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	f3_b, .-f3_b
	.align	2
	.global	f3_c
	.syntax unified
	.arm
	.fpu softvfp
	.type	f3_c, %function
f3_c:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldrb	r2, [r3, #8]	@ zero_extendqisi2
	ldrb	r1, [r3, #9]	@ zero_extendqisi2
	lsl	r1, r1, #8
	orr	r2, r1, r2
	ldrb	r1, [r3, #10]	@ zero_extendqisi2
	lsl	r1, r1, #16
	orr	r2, r1, r2
	ldrb	r3, [r3, #11]	@ zero_extendqisi2
	lsl	r3, r3, #24
	orr	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	f3_c, .-f3_c
	.align	2
	.global	f3_d
	.syntax unified
	.arm
	.fpu softvfp
	.type	f3_d, %function
f3_d:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldrb	r2, [r3, #12]	@ zero_extendqisi2
	ldrb	r1, [r3, #13]	@ zero_extendqisi2
	lsl	r1, r1, #8
	orr	r2, r1, r2
	ldrb	r1, [r3, #14]	@ zero_extendqisi2
	lsl	r1, r1, #16
	orr	r2, r1, r2
	ldrb	r3, [r3, #15]	@ zero_extendqisi2
	lsl	r3, r3, #24
	orr	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	f3_d, .-f3_d
	.align	2
	.global	f4
	.syntax unified
	.arm
	.fpu softvfp
	.type	f4, %function
f4:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L31
	add	r3, r3, #8
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L32:
	.align	2
.L31:
	.word	g4
	.size	f4, .-f4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
