	.file	"190768005.c"
	.intel_syntax noprefix
	.text
	.globl	read_tid
	.type	read_tid, @function
read_tid:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_tid_x@PLT
	mov	DWORD PTR -16[rbp], eax
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_tid_y@PLT
	mov	DWORD PTR -12[rbp], eax
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_tid_z@PLT
	mov	DWORD PTR -8[rbp], eax
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_tid_w@PLT
	mov	DWORD PTR -4[rbp], eax
	mov	edx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -12[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -8[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	add	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	read_tid, .-read_tid
	.globl	read_ntid
	.type	read_ntid, @function
read_ntid:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_ntid_x@PLT
	mov	DWORD PTR -16[rbp], eax
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_ntid_y@PLT
	mov	DWORD PTR -12[rbp], eax
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_ntid_z@PLT
	mov	DWORD PTR -8[rbp], eax
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_ntid_w@PLT
	mov	DWORD PTR -4[rbp], eax
	mov	edx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -12[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -8[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	add	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	read_ntid, .-read_ntid
	.globl	read_ctaid
	.type	read_ctaid, @function
read_ctaid:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_ctaid_x@PLT
	mov	DWORD PTR -16[rbp], eax
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_ctaid_y@PLT
	mov	DWORD PTR -12[rbp], eax
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_ctaid_z@PLT
	mov	DWORD PTR -8[rbp], eax
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_ctaid_w@PLT
	mov	DWORD PTR -4[rbp], eax
	mov	edx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -12[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -8[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	add	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	read_ctaid, .-read_ctaid
	.globl	read_nctaid
	.type	read_nctaid, @function
read_nctaid:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_nctaid_x@PLT
	mov	DWORD PTR -16[rbp], eax
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_nctaid_y@PLT
	mov	DWORD PTR -12[rbp], eax
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_nctaid_z@PLT
	mov	DWORD PTR -8[rbp], eax
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_nctaid_w@PLT
	mov	DWORD PTR -4[rbp], eax
	mov	edx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -12[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -8[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	add	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	read_nctaid, .-read_nctaid
	.globl	read_ids
	.type	read_ids, @function
read_ids:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_laneid@PLT
	mov	DWORD PTR -24[rbp], eax
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_warpid@PLT
	mov	DWORD PTR -20[rbp], eax
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_nwarpid@PLT
	mov	DWORD PTR -16[rbp], eax
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_smid@PLT
	mov	DWORD PTR -12[rbp], eax
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_nsmid@PLT
	mov	DWORD PTR -8[rbp], eax
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_gridid@PLT
	mov	DWORD PTR -4[rbp], eax
	mov	edx, DWORD PTR -24[rbp]
	mov	eax, DWORD PTR -20[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -16[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -12[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -8[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	add	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	read_ids, .-read_ids
	.globl	read_lanemasks
	.type	read_lanemasks, @function
read_lanemasks:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_lanemask_eq@PLT
	mov	DWORD PTR -20[rbp], eax
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_lanemask_le@PLT
	mov	DWORD PTR -16[rbp], eax
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_lanemask_lt@PLT
	mov	DWORD PTR -12[rbp], eax
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_lanemask_ge@PLT
	mov	DWORD PTR -8[rbp], eax
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_lanemask_gt@PLT
	mov	DWORD PTR -4[rbp], eax
	mov	edx, DWORD PTR -20[rbp]
	mov	eax, DWORD PTR -16[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -12[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -8[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	add	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	read_lanemasks, .-read_lanemasks
	.globl	read_clocks
	.type	read_clocks, @function
read_clocks:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_clock@PLT
	mov	DWORD PTR -12[rbp], eax
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_clock64@PLT
	cdqe
	mov	QWORD PTR -8[rbp], rax
	mov	eax, DWORD PTR -12[rbp]
	movsx	rdx, eax
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rdx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	read_clocks, .-read_clocks
	.globl	read_pms
	.type	read_pms, @function
read_pms:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_pm0@PLT
	mov	DWORD PTR -16[rbp], eax
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_pm1@PLT
	mov	DWORD PTR -12[rbp], eax
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_pm2@PLT
	mov	DWORD PTR -8[rbp], eax
	mov	eax, 0
	call	__nvvm_read_ptx_sreg_pm3@PLT
	mov	DWORD PTR -4[rbp], eax
	mov	edx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -12[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -8[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	add	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	read_pms, .-read_pms
	.globl	sync
	.type	sync, @function
sync:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edi, 0
	mov	eax, 0
	call	__nvvm_bar_sync@PLT
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	sync, .-sync
	.globl	nvvm_math
	.type	nvvm_math, @function
nvvm_math:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 96
	movss	DWORD PTR -68[rbp], xmm0
	movss	DWORD PTR -72[rbp], xmm1
	movsd	QWORD PTR -80[rbp], xmm2
	movsd	QWORD PTR -88[rbp], xmm3
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -72[rbp]
	pxor	xmm4, xmm4
	cvtss2sd	xmm4, DWORD PTR -68[rbp]
	movq	rax, xmm4
	movapd	xmm1, xmm0
	movq	xmm0, rax
	mov	eax, 2
	call	__nvvm_fmax_f@PLT
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, eax
	movss	DWORD PTR -52[rbp], xmm0
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -72[rbp]
	pxor	xmm5, xmm5
	cvtss2sd	xmm5, DWORD PTR -68[rbp]
	movq	rax, xmm5
	movapd	xmm1, xmm0
	movq	xmm0, rax
	mov	eax, 2
	call	__nvvm_fmin_f@PLT
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, eax
	movss	DWORD PTR -48[rbp], xmm0
	pxor	xmm6, xmm6
	cvtss2sd	xmm6, DWORD PTR -68[rbp]
	movq	rax, xmm6
	movq	xmm0, rax
	mov	eax, 1
	call	__nvvm_sqrt_rn_f@PLT
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, eax
	movss	DWORD PTR -44[rbp], xmm0
	pxor	xmm7, xmm7
	cvtss2sd	xmm7, DWORD PTR -72[rbp]
	movq	rax, xmm7
	movq	xmm0, rax
	mov	eax, 1
	call	__nvvm_rcp_rn_f@PLT
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, eax
	movss	DWORD PTR -40[rbp], xmm0
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -72[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movq	rax, xmm2
	movapd	xmm1, xmm0
	movq	xmm0, rax
	mov	eax, 2
	call	__nvvm_add_rn_f@PLT
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, eax
	movss	DWORD PTR -36[rbp], xmm0
	movsd	xmm0, QWORD PTR -88[rbp]
	mov	rax, QWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	movq	xmm0, rax
	mov	eax, 2
	call	__nvvm_fmax_d@PLT
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, eax
	movsd	QWORD PTR -32[rbp], xmm0
	movsd	xmm0, QWORD PTR -88[rbp]
	mov	rax, QWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	movq	xmm0, rax
	mov	eax, 2
	call	__nvvm_fmin_d@PLT
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, eax
	movsd	QWORD PTR -24[rbp], xmm0
	mov	rax, QWORD PTR -80[rbp]
	movq	xmm0, rax
	mov	eax, 1
	call	__nvvm_sqrt_rn_d@PLT
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, eax
	movsd	QWORD PTR -16[rbp], xmm0
	mov	rax, QWORD PTR -88[rbp]
	movq	xmm0, rax
	mov	eax, 1
	call	__nvvm_rcp_rn_d@PLT
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, eax
	movsd	QWORD PTR -8[rbp], xmm0
	mov	eax, 0
	call	__nvvm_membar_cta@PLT
	mov	eax, 0
	call	__nvvm_membar_gl@PLT
	mov	eax, 0
	call	__nvvm_membar_sys@PLT
	mov	eax, 0
	call	__syncthreads@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	nvvm_math, .-nvvm_math
	.globl	di
	.bss
	.align 4
	.type	di, @object
	.size	di, 4
di:
	.zero	4
	.globl	si
	.align 4
	.type	si, @object
	.size	si, 4
si:
	.zero	4
	.globl	dl
	.align 8
	.type	dl, @object
	.size	dl, 8
dl:
	.zero	8
	.globl	sl
	.align 8
	.type	sl, @object
	.size	sl, 8
sl:
	.zero	8
	.globl	dll
	.align 8
	.type	dll, @object
	.size	dll, 8
dll:
	.zero	8
	.globl	sll
	.align 8
	.type	sll, @object
	.size	sll, 8
sll:
	.zero	8
	.text
	.globl	nvvm_atom
	.type	nvvm_atom, @function
nvvm_atom:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 64
	mov	QWORD PTR -8[rbp], rdi
	movss	DWORD PTR -12[rbp], xmm0
	mov	QWORD PTR -24[rbp], rsi
	movsd	QWORD PTR -32[rbp], xmm1
	mov	QWORD PTR -40[rbp], rdx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -48[rbp], r8
	mov	DWORD PTR -52[rbp], r9d
	mov	edx, DWORD PTR -16[rbp]
	mov	rax, QWORD PTR -40[rbp]
	mov	esi, edx
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_atom_add_gen_i@PLT
	mov	rax, QWORD PTR 24[rbp]
	mov	rsi, rax
	lea	rdi, dl[rip]
	mov	eax, 0
	call	__nvvm_atom_add_gen_l@PLT
	mov	rax, QWORD PTR 40[rbp]
	mov	rsi, rax
	lea	rdi, sll[rip]
	mov	eax, 0
	call	__nvvm_atom_add_gen_ll@PLT
	mov	edx, DWORD PTR -16[rbp]
	mov	rax, QWORD PTR -40[rbp]
	mov	esi, edx
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_atom_sub_gen_i@PLT
	mov	rax, QWORD PTR 24[rbp]
	mov	rsi, rax
	lea	rdi, dl[rip]
	mov	eax, 0
	call	__nvvm_atom_sub_gen_l@PLT
	mov	rax, QWORD PTR 40[rbp]
	mov	rsi, rax
	lea	rdi, sll[rip]
	mov	eax, 0
	call	__nvvm_atom_sub_gen_ll@PLT
	mov	edx, DWORD PTR -16[rbp]
	mov	rax, QWORD PTR -40[rbp]
	mov	esi, edx
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_atom_and_gen_i@PLT
	mov	rax, QWORD PTR 24[rbp]
	mov	rsi, rax
	lea	rdi, dl[rip]
	mov	eax, 0
	call	__nvvm_atom_and_gen_l@PLT
	mov	rax, QWORD PTR 40[rbp]
	mov	rsi, rax
	lea	rdi, sll[rip]
	mov	eax, 0
	call	__nvvm_atom_and_gen_ll@PLT
	mov	edx, DWORD PTR -16[rbp]
	mov	rax, QWORD PTR -40[rbp]
	mov	esi, edx
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_atom_or_gen_i@PLT
	mov	rax, QWORD PTR 24[rbp]
	mov	rsi, rax
	lea	rdi, dl[rip]
	mov	eax, 0
	call	__nvvm_atom_or_gen_l@PLT
	mov	rax, QWORD PTR 40[rbp]
	mov	rsi, rax
	lea	rdi, sll[rip]
	mov	eax, 0
	call	__nvvm_atom_or_gen_ll@PLT
	mov	edx, DWORD PTR -16[rbp]
	mov	rax, QWORD PTR -40[rbp]
	mov	esi, edx
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_atom_xor_gen_i@PLT
	mov	rax, QWORD PTR 24[rbp]
	mov	rsi, rax
	lea	rdi, dl[rip]
	mov	eax, 0
	call	__nvvm_atom_xor_gen_l@PLT
	mov	rax, QWORD PTR 40[rbp]
	mov	rsi, rax
	lea	rdi, sll[rip]
	mov	eax, 0
	call	__nvvm_atom_xor_gen_ll@PLT
	mov	edx, DWORD PTR -16[rbp]
	mov	rax, QWORD PTR -40[rbp]
	mov	esi, edx
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_atom_xchg_gen_i@PLT
	mov	rax, QWORD PTR 24[rbp]
	mov	rsi, rax
	lea	rdi, dl[rip]
	mov	eax, 0
	call	__nvvm_atom_xchg_gen_l@PLT
	mov	rax, QWORD PTR 40[rbp]
	mov	rsi, rax
	lea	rdi, sll[rip]
	mov	eax, 0
	call	__nvvm_atom_xchg_gen_ll@PLT
	mov	edx, DWORD PTR -16[rbp]
	mov	rax, QWORD PTR -40[rbp]
	mov	esi, edx
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_atom_max_gen_i@PLT
	mov	edx, DWORD PTR -16[rbp]
	mov	rax, QWORD PTR -40[rbp]
	mov	esi, edx
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_atom_max_gen_ui@PLT
	mov	rax, QWORD PTR 24[rbp]
	mov	rsi, rax
	lea	rdi, dl[rip]
	mov	eax, 0
	call	__nvvm_atom_max_gen_l@PLT
	mov	rax, QWORD PTR 24[rbp]
	mov	rsi, rax
	lea	rdi, dl[rip]
	mov	eax, 0
	call	__nvvm_atom_max_gen_ul@PLT
	mov	rax, QWORD PTR 40[rbp]
	mov	rsi, rax
	lea	rdi, sll[rip]
	mov	eax, 0
	call	__nvvm_atom_max_gen_ll@PLT
	mov	rax, QWORD PTR 40[rbp]
	mov	rsi, rax
	lea	rdi, sll[rip]
	mov	eax, 0
	call	__nvvm_atom_max_gen_ull@PLT
	mov	edx, DWORD PTR -16[rbp]
	mov	rax, QWORD PTR -40[rbp]
	mov	esi, edx
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_atom_min_gen_i@PLT
	mov	edx, DWORD PTR -16[rbp]
	mov	rax, QWORD PTR -40[rbp]
	mov	esi, edx
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_atom_min_gen_ui@PLT
	mov	rax, QWORD PTR 24[rbp]
	mov	rsi, rax
	lea	rdi, dl[rip]
	mov	eax, 0
	call	__nvvm_atom_min_gen_l@PLT
	mov	rax, QWORD PTR 24[rbp]
	mov	rsi, rax
	lea	rdi, dl[rip]
	mov	eax, 0
	call	__nvvm_atom_min_gen_ul@PLT
	mov	rax, QWORD PTR 40[rbp]
	mov	rsi, rax
	lea	rdi, sll[rip]
	mov	eax, 0
	call	__nvvm_atom_min_gen_ll@PLT
	mov	rax, QWORD PTR 40[rbp]
	mov	rsi, rax
	lea	rdi, sll[rip]
	mov	eax, 0
	call	__nvvm_atom_min_gen_ull@PLT
	mov	edx, DWORD PTR -16[rbp]
	mov	rax, QWORD PTR -40[rbp]
	mov	esi, 0
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_atom_cas_gen_i@PLT
	mov	rax, QWORD PTR 24[rbp]
	mov	rdx, rax
	mov	esi, 0
	lea	rdi, dl[rip]
	mov	eax, 0
	call	__nvvm_atom_cas_gen_l@PLT
	mov	rax, QWORD PTR 40[rbp]
	mov	rdx, rax
	mov	esi, 0
	lea	rdi, sll[rip]
	mov	eax, 0
	call	__nvvm_atom_cas_gen_ll@PLT
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movq	rdx, xmm2
	mov	rax, QWORD PTR -8[rbp]
	movq	xmm0, rdx
	mov	rdi, rax
	mov	eax, 1
	call	__nvvm_atom_add_gen_f@PLT
	mov	edx, DWORD PTR -52[rbp]
	mov	rax, QWORD PTR -48[rbp]
	mov	esi, edx
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_atom_inc_gen_ui@PLT
	mov	edx, DWORD PTR -52[rbp]
	mov	rax, QWORD PTR -48[rbp]
	mov	esi, edx
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_atom_dec_gen_ui@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	nvvm_atom, .-nvvm_atom
	.globl	nvvm_ldg
	.type	nvvm_ldg, @function
nvvm_ldg:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_ldg_c@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_ldg_uc@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_ldg_s@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_ldg_us@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_ldg_i@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_ldg_ui@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_ldg_l@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_ldg_ul@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_ldg_f@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_ldg_d@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_ldg_c2@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_ldg_uc2@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_ldg_c4@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_ldg_uc4@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_ldg_s2@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_ldg_us2@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_ldg_s4@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_ldg_us4@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_ldg_i2@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_ldg_ui2@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_ldg_i4@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_ldg_ui4@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_ldg_ll2@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_ldg_ull2@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_ldg_f2@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_ldg_f4@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	mov	eax, 0
	call	__nvvm_ldg_d2@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	nvvm_ldg, .-nvvm_ldg
	.globl	nvvm_shfl
	.type	nvvm_shfl, @function
nvvm_shfl:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	movss	DWORD PTR -8[rbp], xmm0
	mov	DWORD PTR -12[rbp], esi
	mov	DWORD PTR -16[rbp], edx
	mov	edx, DWORD PTR -16[rbp]
	mov	ecx, DWORD PTR -12[rbp]
	mov	eax, DWORD PTR -4[rbp]
	mov	esi, ecx
	mov	edi, eax
	mov	eax, 0
	call	__nvvm_shfl_down_i32@PLT
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	movq	rax, xmm1
	mov	ecx, DWORD PTR -16[rbp]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, ecx
	mov	edi, edx
	movq	xmm0, rax
	mov	eax, 1
	call	__nvvm_shfl_down_f32@PLT
	mov	edx, DWORD PTR -16[rbp]
	mov	ecx, DWORD PTR -12[rbp]
	mov	eax, DWORD PTR -4[rbp]
	mov	esi, ecx
	mov	edi, eax
	mov	eax, 0
	call	__nvvm_shfl_up_i32@PLT
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movq	rax, xmm2
	mov	ecx, DWORD PTR -16[rbp]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, ecx
	mov	edi, edx
	movq	xmm0, rax
	mov	eax, 1
	call	__nvvm_shfl_up_f32@PLT
	mov	edx, DWORD PTR -16[rbp]
	mov	ecx, DWORD PTR -12[rbp]
	mov	eax, DWORD PTR -4[rbp]
	mov	esi, ecx
	mov	edi, eax
	mov	eax, 0
	call	__nvvm_shfl_bfly_i32@PLT
	pxor	xmm3, xmm3
	cvtss2sd	xmm3, DWORD PTR -8[rbp]
	movq	rax, xmm3
	mov	ecx, DWORD PTR -16[rbp]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, ecx
	mov	edi, edx
	movq	xmm0, rax
	mov	eax, 1
	call	__nvvm_shfl_bfly_f32@PLT
	mov	edx, DWORD PTR -16[rbp]
	mov	ecx, DWORD PTR -12[rbp]
	mov	eax, DWORD PTR -4[rbp]
	mov	esi, ecx
	mov	edi, eax
	mov	eax, 0
	call	__nvvm_shfl_idx_i32@PLT
	pxor	xmm4, xmm4
	cvtss2sd	xmm4, DWORD PTR -8[rbp]
	movq	rax, xmm4
	mov	ecx, DWORD PTR -16[rbp]
	mov	edx, DWORD PTR -12[rbp]
	mov	esi, ecx
	mov	edi, edx
	movq	xmm0, rax
	mov	eax, 1
	call	__nvvm_shfl_idx_f32@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	nvvm_shfl, .-nvvm_shfl
	.globl	nvvm_vote
	.type	nvvm_vote, @function
nvvm_vote:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	mov	edi, eax
	mov	eax, 0
	call	__nvvm_vote_all@PLT
	mov	eax, DWORD PTR -4[rbp]
	mov	edi, eax
	mov	eax, 0
	call	__nvvm_vote_any@PLT
	mov	eax, DWORD PTR -4[rbp]
	mov	edi, eax
	mov	eax, 0
	call	__nvvm_vote_uni@PLT
	mov	eax, DWORD PTR -4[rbp]
	mov	edi, eax
	mov	eax, 0
	call	__nvvm_vote_ballot@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	nvvm_vote, .-nvvm_vote
	.globl	nvvm_mbarrier
	.type	nvvm_mbarrier, @function
nvvm_mbarrier:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	DWORD PTR -20[rbp], edx
	mov	QWORD PTR -32[rbp], rcx
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	nvvm_mbarrier, .-nvvm_mbarrier
	.globl	nvvm_async_copy
	.type	nvvm_async_copy, @function
nvvm_async_copy:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	QWORD PTR -24[rbp], rdx
	mov	QWORD PTR -32[rbp], rcx
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	nvvm_async_copy, .-nvvm_async_copy
	.globl	nvvm_cvt_sm80
	.type	nvvm_cvt_sm80, @function
nvvm_cvt_sm80:
.LFB16:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE16:
	.size	nvvm_cvt_sm80, .-nvvm_cvt_sm80
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"190768005.c"
	.text
	.align	2
	.global	read_tid
	.syntax unified
	.arm
	.fpu softvfp
	.type	read_tid, %function
read_tid:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	bl	__nvvm_read_ptx_sreg_tid_x
	str	r0, [fp, #-20]
	bl	__nvvm_read_ptx_sreg_tid_y
	str	r0, [fp, #-16]
	bl	__nvvm_read_ptx_sreg_tid_z
	str	r0, [fp, #-12]
	bl	__nvvm_read_ptx_sreg_tid_w
	str	r0, [fp, #-8]
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-16]
	add	r2, r2, r3
	ldr	r3, [fp, #-12]
	add	r2, r2, r3
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	read_tid, .-read_tid
	.align	2
	.global	read_ntid
	.syntax unified
	.arm
	.fpu softvfp
	.type	read_ntid, %function
read_ntid:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	bl	__nvvm_read_ptx_sreg_ntid_x
	str	r0, [fp, #-20]
	bl	__nvvm_read_ptx_sreg_ntid_y
	str	r0, [fp, #-16]
	bl	__nvvm_read_ptx_sreg_ntid_z
	str	r0, [fp, #-12]
	bl	__nvvm_read_ptx_sreg_ntid_w
	str	r0, [fp, #-8]
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-16]
	add	r2, r2, r3
	ldr	r3, [fp, #-12]
	add	r2, r2, r3
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	read_ntid, .-read_ntid
	.align	2
	.global	read_ctaid
	.syntax unified
	.arm
	.fpu softvfp
	.type	read_ctaid, %function
read_ctaid:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	bl	__nvvm_read_ptx_sreg_ctaid_x
	str	r0, [fp, #-20]
	bl	__nvvm_read_ptx_sreg_ctaid_y
	str	r0, [fp, #-16]
	bl	__nvvm_read_ptx_sreg_ctaid_z
	str	r0, [fp, #-12]
	bl	__nvvm_read_ptx_sreg_ctaid_w
	str	r0, [fp, #-8]
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-16]
	add	r2, r2, r3
	ldr	r3, [fp, #-12]
	add	r2, r2, r3
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	read_ctaid, .-read_ctaid
	.align	2
	.global	read_nctaid
	.syntax unified
	.arm
	.fpu softvfp
	.type	read_nctaid, %function
read_nctaid:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	bl	__nvvm_read_ptx_sreg_nctaid_x
	str	r0, [fp, #-20]
	bl	__nvvm_read_ptx_sreg_nctaid_y
	str	r0, [fp, #-16]
	bl	__nvvm_read_ptx_sreg_nctaid_z
	str	r0, [fp, #-12]
	bl	__nvvm_read_ptx_sreg_nctaid_w
	str	r0, [fp, #-8]
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-16]
	add	r2, r2, r3
	ldr	r3, [fp, #-12]
	add	r2, r2, r3
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	read_nctaid, .-read_nctaid
	.align	2
	.global	read_ids
	.syntax unified
	.arm
	.fpu softvfp
	.type	read_ids, %function
read_ids:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	bl	__nvvm_read_ptx_sreg_laneid
	str	r0, [fp, #-28]
	bl	__nvvm_read_ptx_sreg_warpid
	str	r0, [fp, #-24]
	bl	__nvvm_read_ptx_sreg_nwarpid
	str	r0, [fp, #-20]
	bl	__nvvm_read_ptx_sreg_smid
	str	r0, [fp, #-16]
	bl	__nvvm_read_ptx_sreg_nsmid
	str	r0, [fp, #-12]
	bl	__nvvm_read_ptx_sreg_gridid
	str	r0, [fp, #-8]
	ldr	r2, [fp, #-28]
	ldr	r3, [fp, #-24]
	add	r2, r2, r3
	ldr	r3, [fp, #-20]
	add	r2, r2, r3
	ldr	r3, [fp, #-16]
	add	r2, r2, r3
	ldr	r3, [fp, #-12]
	add	r2, r2, r3
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	read_ids, .-read_ids
	.align	2
	.global	read_lanemasks
	.syntax unified
	.arm
	.fpu softvfp
	.type	read_lanemasks, %function
read_lanemasks:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	bl	__nvvm_read_ptx_sreg_lanemask_eq
	str	r0, [fp, #-24]
	bl	__nvvm_read_ptx_sreg_lanemask_le
	str	r0, [fp, #-20]
	bl	__nvvm_read_ptx_sreg_lanemask_lt
	str	r0, [fp, #-16]
	bl	__nvvm_read_ptx_sreg_lanemask_ge
	str	r0, [fp, #-12]
	bl	__nvvm_read_ptx_sreg_lanemask_gt
	str	r0, [fp, #-8]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-20]
	add	r2, r2, r3
	ldr	r3, [fp, #-16]
	add	r2, r2, r3
	ldr	r3, [fp, #-12]
	add	r2, r2, r3
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	read_lanemasks, .-read_lanemasks
	.align	2
	.global	read_clocks
	.syntax unified
	.arm
	.fpu softvfp
	.type	read_clocks, %function
read_clocks:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #16
	bl	__nvvm_read_ptx_sreg_clock
	str	r0, [fp, #-24]
	bl	__nvvm_read_ptx_sreg_clock64
	mov	r3, r0
	mov	r2, r3
	asr	r3, r2, #31
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-24]
	mov	r0, r3
	asr	r1, r0, #31
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	adds	r4, r0, r2
	adc	r5, r1, r3
	mov	r2, r4
	mov	r3, r5
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
	.size	read_clocks, .-read_clocks
	.align	2
	.global	read_pms
	.syntax unified
	.arm
	.fpu softvfp
	.type	read_pms, %function
read_pms:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	bl	__nvvm_read_ptx_sreg_pm0
	str	r0, [fp, #-20]
	bl	__nvvm_read_ptx_sreg_pm1
	str	r0, [fp, #-16]
	bl	__nvvm_read_ptx_sreg_pm2
	str	r0, [fp, #-12]
	bl	__nvvm_read_ptx_sreg_pm3
	str	r0, [fp, #-8]
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-16]
	add	r2, r2, r3
	ldr	r3, [fp, #-12]
	add	r2, r2, r3
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	read_pms, .-read_pms
	.align	2
	.global	sync
	.syntax unified
	.arm
	.fpu softvfp
	.type	sync, %function
sync:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	mov	r0, #0
	bl	__nvvm_bar_sync
	nop
	pop	{fp, pc}
	.size	sync, .-sync
	.global	__aeabi_f2d
	.global	__aeabi_i2f
	.global	__aeabi_i2d
	.align	2
	.global	nvvm_math
	.syntax unified
	.arm
	.fpu softvfp
	.type	nvvm_math, %function
nvvm_math:
	@ args = 8, pretend = 0, frame = 72
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #72
	str	r0, [fp, #-72]	@ float
	str	r1, [fp, #-76]	@ float
	str	r2, [fp, #-84]
	str	r3, [fp, #-80]
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__nvvm_fmax_f
	mov	r3, r0
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r3, r0
	str	r3, [fp, #-64]	@ float
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__nvvm_fmin_f
	mov	r3, r0
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r3, r0
	str	r3, [fp, #-60]	@ float
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__nvvm_sqrt_rn_f
	mov	r3, r0
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r3, r0
	str	r3, [fp, #-56]	@ float
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__nvvm_rcp_rn_f
	mov	r3, r0
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r3, r0
	str	r3, [fp, #-52]	@ float
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__nvvm_add_rn_f
	mov	r3, r0
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r3, r0
	str	r3, [fp, #-48]	@ float
	ldmib	fp, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	bl	__nvvm_fmax_d
	mov	r3, r0
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	ldmib	fp, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	bl	__nvvm_fmin_d
	mov	r3, r0
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	bl	__nvvm_sqrt_rn_d
	mov	r3, r0
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	ldmib	fp, {r0-r1}
	bl	__nvvm_rcp_rn_d
	mov	r3, r0
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	bl	__nvvm_membar_cta
	bl	__nvvm_membar_gl
	bl	__nvvm_membar_sys
	bl	__syncthreads
	nop
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
	.size	nvvm_math, .-nvvm_math
	.comm	di,4,4
	.comm	si,4,4
	.comm	dl,4,4
	.comm	sl,4,4
	.comm	dll,8,8
	.comm	sll,8,8
	.align	2
	.global	nvvm_atom
	.syntax unified
	.arm
	.fpu softvfp
	.type	nvvm_atom, %function
nvvm_atom:
	@ args = 48, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]	@ float
	str	r2, [fp, #-16]
	ldr	r1, [fp, #16]
	ldr	r0, [fp, #12]
	bl	__nvvm_atom_add_gen_i
	ldr	r1, [fp, #32]
	ldr	r0, .L20
	bl	__nvvm_atom_add_gen_l
	add	r3, fp, #44
	ldmia	r3, {r2-r3}
	ldr	r0, .L20+4
	bl	__nvvm_atom_add_gen_ll
	ldr	r1, [fp, #16]
	ldr	r0, [fp, #12]
	bl	__nvvm_atom_sub_gen_i
	ldr	r1, [fp, #32]
	ldr	r0, .L20
	bl	__nvvm_atom_sub_gen_l
	add	r3, fp, #44
	ldmia	r3, {r2-r3}
	ldr	r0, .L20+4
	bl	__nvvm_atom_sub_gen_ll
	ldr	r1, [fp, #16]
	ldr	r0, [fp, #12]
	bl	__nvvm_atom_and_gen_i
	ldr	r1, [fp, #32]
	ldr	r0, .L20
	bl	__nvvm_atom_and_gen_l
	add	r3, fp, #44
	ldmia	r3, {r2-r3}
	ldr	r0, .L20+4
	bl	__nvvm_atom_and_gen_ll
	ldr	r1, [fp, #16]
	ldr	r0, [fp, #12]
	bl	__nvvm_atom_or_gen_i
	ldr	r1, [fp, #32]
	ldr	r0, .L20
	bl	__nvvm_atom_or_gen_l
	add	r3, fp, #44
	ldmia	r3, {r2-r3}
	ldr	r0, .L20+4
	bl	__nvvm_atom_or_gen_ll
	ldr	r1, [fp, #16]
	ldr	r0, [fp, #12]
	bl	__nvvm_atom_xor_gen_i
	ldr	r1, [fp, #32]
	ldr	r0, .L20
	bl	__nvvm_atom_xor_gen_l
	add	r3, fp, #44
	ldmia	r3, {r2-r3}
	ldr	r0, .L20+4
	bl	__nvvm_atom_xor_gen_ll
	ldr	r1, [fp, #16]
	ldr	r0, [fp, #12]
	bl	__nvvm_atom_xchg_gen_i
	ldr	r1, [fp, #32]
	ldr	r0, .L20
	bl	__nvvm_atom_xchg_gen_l
	add	r3, fp, #44
	ldmia	r3, {r2-r3}
	ldr	r0, .L20+4
	bl	__nvvm_atom_xchg_gen_ll
	ldr	r1, [fp, #16]
	ldr	r0, [fp, #12]
	bl	__nvvm_atom_max_gen_i
	ldr	r1, [fp, #16]
	ldr	r0, [fp, #12]
	bl	__nvvm_atom_max_gen_ui
	ldr	r1, [fp, #32]
	ldr	r0, .L20
	bl	__nvvm_atom_max_gen_l
	ldr	r1, [fp, #32]
	ldr	r0, .L20
	bl	__nvvm_atom_max_gen_ul
	add	r3, fp, #44
	ldmia	r3, {r2-r3}
	ldr	r0, .L20+4
	bl	__nvvm_atom_max_gen_ll
	add	r3, fp, #44
	ldmia	r3, {r2-r3}
	ldr	r0, .L20+4
	bl	__nvvm_atom_max_gen_ull
	ldr	r1, [fp, #16]
	ldr	r0, [fp, #12]
	bl	__nvvm_atom_min_gen_i
	ldr	r1, [fp, #16]
	ldr	r0, [fp, #12]
	bl	__nvvm_atom_min_gen_ui
	ldr	r1, [fp, #32]
	ldr	r0, .L20
	bl	__nvvm_atom_min_gen_l
	ldr	r1, [fp, #32]
	ldr	r0, .L20
	bl	__nvvm_atom_min_gen_ul
	add	r3, fp, #44
	ldmia	r3, {r2-r3}
	ldr	r0, .L20+4
	bl	__nvvm_atom_min_gen_ll
	add	r3, fp, #44
	ldmia	r3, {r2-r3}
	ldr	r0, .L20+4
	bl	__nvvm_atom_min_gen_ull
	ldr	r2, [fp, #16]
	mov	r1, #0
	ldr	r0, [fp, #12]
	bl	__nvvm_atom_cas_gen_i
	ldr	r2, [fp, #32]
	mov	r1, #0
	ldr	r0, .L20
	bl	__nvvm_atom_cas_gen_l
	add	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r1, #0
	ldr	r0, .L20+4
	bl	__nvvm_atom_cas_gen_ll
	ldr	r0, [fp, #-12]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	ldr	r0, [fp, #-8]
	bl	__nvvm_atom_add_gen_f
	ldr	r1, [fp, #24]
	ldr	r0, [fp, #20]
	bl	__nvvm_atom_inc_gen_ui
	ldr	r1, [fp, #24]
	ldr	r0, [fp, #20]
	bl	__nvvm_atom_dec_gen_ui
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L21:
	.align	2
.L20:
	.word	dl
	.word	sll
	.size	nvvm_atom, .-nvvm_atom
	.align	2
	.global	nvvm_ldg
	.syntax unified
	.arm
	.fpu softvfp
	.type	nvvm_ldg, %function
nvvm_ldg:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r0, [fp, #-8]
	bl	__nvvm_ldg_c
	ldr	r0, [fp, #-8]
	bl	__nvvm_ldg_uc
	ldr	r0, [fp, #-8]
	bl	__nvvm_ldg_s
	ldr	r0, [fp, #-8]
	bl	__nvvm_ldg_us
	ldr	r0, [fp, #-8]
	bl	__nvvm_ldg_i
	ldr	r0, [fp, #-8]
	bl	__nvvm_ldg_ui
	ldr	r0, [fp, #-8]
	bl	__nvvm_ldg_l
	ldr	r0, [fp, #-8]
	bl	__nvvm_ldg_ul
	ldr	r0, [fp, #-8]
	bl	__nvvm_ldg_f
	ldr	r0, [fp, #-8]
	bl	__nvvm_ldg_d
	ldr	r0, [fp, #-8]
	bl	__nvvm_ldg_c2
	ldr	r0, [fp, #-8]
	bl	__nvvm_ldg_uc2
	ldr	r0, [fp, #-8]
	bl	__nvvm_ldg_c4
	ldr	r0, [fp, #-8]
	bl	__nvvm_ldg_uc4
	ldr	r0, [fp, #-8]
	bl	__nvvm_ldg_s2
	ldr	r0, [fp, #-8]
	bl	__nvvm_ldg_us2
	ldr	r0, [fp, #-8]
	bl	__nvvm_ldg_s4
	ldr	r0, [fp, #-8]
	bl	__nvvm_ldg_us4
	ldr	r0, [fp, #-8]
	bl	__nvvm_ldg_i2
	ldr	r0, [fp, #-8]
	bl	__nvvm_ldg_ui2
	ldr	r0, [fp, #-8]
	bl	__nvvm_ldg_i4
	ldr	r0, [fp, #-8]
	bl	__nvvm_ldg_ui4
	ldr	r0, [fp, #-8]
	bl	__nvvm_ldg_ll2
	ldr	r0, [fp, #-8]
	bl	__nvvm_ldg_ull2
	ldr	r0, [fp, #-8]
	bl	__nvvm_ldg_f2
	ldr	r0, [fp, #-8]
	bl	__nvvm_ldg_f4
	ldr	r0, [fp, #-8]
	bl	__nvvm_ldg_d2
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	nvvm_ldg, .-nvvm_ldg
	.align	2
	.global	nvvm_shfl
	.syntax unified
	.arm
	.fpu softvfp
	.type	nvvm_shfl, %function
nvvm_shfl:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]	@ float
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	ldr	r2, [fp, #-20]
	ldr	r1, [fp, #-16]
	ldr	r0, [fp, #-8]
	bl	__nvvm_shfl_down_i32
	ldr	r0, [fp, #-12]	@ float
	bl	__aeabi_f2d
	ldr	r3, [fp, #-20]
	ldr	r2, [fp, #-16]
	bl	__nvvm_shfl_down_f32
	ldr	r2, [fp, #-20]
	ldr	r1, [fp, #-16]
	ldr	r0, [fp, #-8]
	bl	__nvvm_shfl_up_i32
	ldr	r0, [fp, #-12]	@ float
	bl	__aeabi_f2d
	ldr	r3, [fp, #-20]
	ldr	r2, [fp, #-16]
	bl	__nvvm_shfl_up_f32
	ldr	r2, [fp, #-20]
	ldr	r1, [fp, #-16]
	ldr	r0, [fp, #-8]
	bl	__nvvm_shfl_bfly_i32
	ldr	r0, [fp, #-12]	@ float
	bl	__aeabi_f2d
	ldr	r3, [fp, #-20]
	ldr	r2, [fp, #-16]
	bl	__nvvm_shfl_bfly_f32
	ldr	r2, [fp, #-20]
	ldr	r1, [fp, #-16]
	ldr	r0, [fp, #-8]
	bl	__nvvm_shfl_idx_i32
	ldr	r0, [fp, #-12]	@ float
	bl	__aeabi_f2d
	ldr	r3, [fp, #-20]
	ldr	r2, [fp, #-16]
	bl	__nvvm_shfl_idx_f32
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	nvvm_shfl, .-nvvm_shfl
	.align	2
	.global	nvvm_vote
	.syntax unified
	.arm
	.fpu softvfp
	.type	nvvm_vote, %function
nvvm_vote:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r0, [fp, #-8]
	bl	__nvvm_vote_all
	ldr	r0, [fp, #-8]
	bl	__nvvm_vote_any
	ldr	r0, [fp, #-8]
	bl	__nvvm_vote_uni
	ldr	r0, [fp, #-8]
	bl	__nvvm_vote_ballot
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	nvvm_vote, .-nvvm_vote
	.align	2
	.global	nvvm_mbarrier
	.syntax unified
	.arm
	.fpu softvfp
	.type	nvvm_mbarrier, %function
nvvm_mbarrier:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	str	r2, [fp, #-16]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	nvvm_mbarrier, .-nvvm_mbarrier
	.align	2
	.global	nvvm_async_copy
	.syntax unified
	.arm
	.fpu softvfp
	.type	nvvm_async_copy, %function
nvvm_async_copy:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	nvvm_async_copy, .-nvvm_async_copy
	.align	2
	.global	nvvm_cvt_sm80
	.syntax unified
	.arm
	.fpu softvfp
	.type	nvvm_cvt_sm80, %function
nvvm_cvt_sm80:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	nvvm_cvt_sm80, .-nvvm_cvt_sm80
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
