	.file	"29825155.c"
	.intel_syntax noprefix
	.text
	.globl	distance_uint32
	.type	distance_uint32, @function
distance_uint32:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	eax, DWORD PTR -20[rbp]
	sub	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], -2147483648
	jbe	.L2
	neg	DWORD PTR -4[rbp]
.L2:
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	distance_uint32, .-distance_uint32
	.globl	adjust_seed_1
	.type	adjust_seed_1, @function
adjust_seed_1:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	add	eax, eax
	xor	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	adjust_seed_1, .-adjust_seed_1
	.globl	inverse_adjust_seed_1
	.type	inverse_adjust_seed_1, @function
inverse_adjust_seed_1:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	add	eax, eax
	xor	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 2
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 3
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 4
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 5
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 6
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 7
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 8
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 9
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 10
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 11
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 12
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 13
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 14
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 15
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 16
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 17
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 18
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 19
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 20
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 21
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 22
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 23
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 24
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 25
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 26
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 27
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 28
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 29
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 30
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 31
	xor	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	inverse_adjust_seed_1, .-inverse_adjust_seed_1
	.globl	adjust_seed_3
	.type	adjust_seed_3, @function
adjust_seed_3:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 3
	xor	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	adjust_seed_3, .-adjust_seed_3
	.globl	inverse_adjust_seed_3
	.type	inverse_adjust_seed_3, @function
inverse_adjust_seed_3:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 3
	xor	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 6
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 9
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 12
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 15
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 18
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 21
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 24
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 27
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 30
	xor	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	inverse_adjust_seed_3, .-inverse_adjust_seed_3
	.globl	adjust_seed_4
	.type	adjust_seed_4, @function
adjust_seed_4:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 4
	xor	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	adjust_seed_4, .-adjust_seed_4
	.globl	inverse_adjust_seed_4
	.type	inverse_adjust_seed_4, @function
inverse_adjust_seed_4:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 4
	xor	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 8
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 12
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 16
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 20
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 24
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 28
	xor	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	inverse_adjust_seed_4, .-inverse_adjust_seed_4
	.globl	adjust_seed_7
	.type	adjust_seed_7, @function
adjust_seed_7:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 7
	xor	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	adjust_seed_7, .-adjust_seed_7
	.globl	inverse_adjust_seed_7
	.type	inverse_adjust_seed_7, @function
inverse_adjust_seed_7:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 7
	xor	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 14
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 21
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 28
	xor	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	inverse_adjust_seed_7, .-inverse_adjust_seed_7
	.globl	adjust_seed_8
	.type	adjust_seed_8, @function
adjust_seed_8:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 8
	xor	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	adjust_seed_8, .-adjust_seed_8
	.globl	inverse_adjust_seed_8
	.type	inverse_adjust_seed_8, @function
inverse_adjust_seed_8:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 8
	xor	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 16
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 24
	xor	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	inverse_adjust_seed_8, .-inverse_adjust_seed_8
	.globl	adjust_seed_16
	.type	adjust_seed_16, @function
adjust_seed_16:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 16
	xor	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	adjust_seed_16, .-adjust_seed_16
	.globl	inverse_adjust_seed_16
	.type	inverse_adjust_seed_16, @function
inverse_adjust_seed_16:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 16
	xor	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	inverse_adjust_seed_16, .-inverse_adjust_seed_16
	.globl	adjust_seed_24
	.type	adjust_seed_24, @function
adjust_seed_24:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 24
	xor	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	adjust_seed_24, .-adjust_seed_24
	.globl	inverse_adjust_seed_24
	.type	inverse_adjust_seed_24, @function
inverse_adjust_seed_24:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 24
	xor	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	inverse_adjust_seed_24, .-inverse_adjust_seed_24
	.section	.rodata
	.align 8
.LC0:
	.string	"min dist %08X; seed out %08X; seeds"
.LC1:
	.string	" %08X"
	.text
	.globl	main
	.type	main, @function
main:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	add	rsp, -128
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -108[rbp], -1
	mov	DWORD PTR -104[rbp], 8
.L48:
	mov	DWORD PTR -116[rbp], 0
	mov	eax, DWORD PTR -104[rbp]
	mov	DWORD PTR -100[rbp], eax
.L39:
	mov	eax, DWORD PTR -100[rbp]
	mov	edi, eax
	call	inverse_adjust_seed_4
	mov	DWORD PTR -88[rbp], eax
	mov	DWORD PTR -96[rbp], 0
	jmp	.L33
.L35:
	add	DWORD PTR -96[rbp], 1
.L33:
	mov	eax, DWORD PTR -96[rbp]
	cmp	DWORD PTR -116[rbp], eax
	jbe	.L34
	mov	eax, DWORD PTR -96[rbp]
	cdqe
	mov	eax, DWORD PTR -80[rbp+rax*4]
	cmp	DWORD PTR -88[rbp], eax
	ja	.L35
.L34:
	mov	eax, DWORD PTR -116[rbp]
	sub	eax, 1
	mov	DWORD PTR -92[rbp], eax
	jmp	.L36
.L37:
	mov	eax, DWORD PTR -92[rbp]
	lea	ecx, 1[rax]
	mov	eax, DWORD PTR -92[rbp]
	cdqe
	mov	edx, DWORD PTR -80[rbp+rax*4]
	movsx	rax, ecx
	mov	DWORD PTR -80[rbp+rax*4], edx
	sub	DWORD PTR -92[rbp], 1
.L36:
	mov	eax, DWORD PTR -92[rbp]
	cmp	eax, DWORD PTR -96[rbp]
	jge	.L37
	mov	eax, DWORD PTR -96[rbp]
	cdqe
	mov	edx, DWORD PTR -88[rbp]
	mov	DWORD PTR -80[rbp+rax*4], edx
	add	DWORD PTR -116[rbp], 1
	mov	eax, DWORD PTR -100[rbp]
	xor	eax, -2147483648
	mov	edi, eax
	call	inverse_adjust_seed_4
	mov	DWORD PTR -88[rbp], eax
	mov	eax, DWORD PTR -88[rbp]
	mov	edi, eax
	call	adjust_seed_4
	cmp	eax, 7
	ja	.L38
	add	DWORD PTR -100[rbp], 1
.L38:
	mov	eax, DWORD PTR -100[rbp]
	and	eax, 7
	test	eax, eax
	jne	.L39
	mov	DWORD PTR -112[rbp], -1
	mov	DWORD PTR -96[rbp], 0
	jmp	.L40
.L42:
	mov	eax, DWORD PTR -96[rbp]
	add	eax, 1
	mov	edx, 0
	div	DWORD PTR -116[rbp]
	mov	eax, edx
	mov	eax, eax
	mov	edx, DWORD PTR -80[rbp+rax*4]
	mov	eax, DWORD PTR -96[rbp]
	cdqe
	mov	eax, DWORD PTR -80[rbp+rax*4]
	mov	esi, edx
	mov	edi, eax
	call	distance_uint32
	mov	DWORD PTR -84[rbp], eax
	mov	eax, DWORD PTR -84[rbp]
	cmp	eax, DWORD PTR -112[rbp]
	jnb	.L41
	mov	eax, DWORD PTR -84[rbp]
	mov	DWORD PTR -112[rbp], eax
.L41:
	add	DWORD PTR -96[rbp], 1
.L40:
	mov	eax, DWORD PTR -96[rbp]
	cmp	DWORD PTR -116[rbp], eax
	ja	.L42
	cmp	DWORD PTR -112[rbp], 255
	jbe	.L43
	mov	eax, DWORD PTR -112[rbp]
	cmp	eax, DWORD PTR -108[rbp]
	jnb	.L44
.L43:
	mov	edx, DWORD PTR -104[rbp]
	mov	eax, DWORD PTR -112[rbp]
	mov	esi, eax
	lea	rdi, .LC0[rip]
	mov	eax, 0
	call	printf@PLT
	mov	DWORD PTR -96[rbp], 0
	jmp	.L45
.L46:
	mov	eax, DWORD PTR -96[rbp]
	cdqe
	mov	eax, DWORD PTR -80[rbp+rax*4]
	mov	esi, eax
	lea	rdi, .LC1[rip]
	mov	eax, 0
	call	printf@PLT
	add	DWORD PTR -96[rbp], 1
.L45:
	mov	eax, DWORD PTR -96[rbp]
	cmp	DWORD PTR -116[rbp], eax
	ja	.L46
	mov	edi, 10
	call	putchar@PLT
.L44:
	mov	eax, DWORD PTR -112[rbp]
	cmp	eax, DWORD PTR -108[rbp]
	jnb	.L47
	mov	eax, DWORD PTR -112[rbp]
	mov	DWORD PTR -108[rbp], eax
.L47:
	add	DWORD PTR -104[rbp], 8
	cmp	DWORD PTR -104[rbp], 0
	jne	.L48
	mov	eax, 0
	mov	rcx, QWORD PTR -8[rbp]
	sub	rcx, QWORD PTR fs:40
	je	.L50
	call	__stack_chk_fail@PLT
.L50:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	main, .-main
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"29825155.c"
	.text
	.align	2
	.global	distance_uint32
	.syntax unified
	.arm
	.fpu softvfp
	.type	distance_uint32, %function
distance_uint32:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-20]
	sub	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #-2147483648
	bls	.L2
	ldr	r3, [fp, #-8]
	rsb	r3, r3, #0
	str	r3, [fp, #-8]
.L2:
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	distance_uint32, .-distance_uint32
	.align	2
	.global	adjust_seed_1
	.syntax unified
	.arm
	.fpu softvfp
	.type	adjust_seed_1, %function
adjust_seed_1:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsl	r2, r3, #1
	ldr	r3, [fp, #-8]
	eor	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	adjust_seed_1, .-adjust_seed_1
	.align	2
	.global	inverse_adjust_seed_1
	.syntax unified
	.arm
	.fpu softvfp
	.type	inverse_adjust_seed_1, %function
inverse_adjust_seed_1:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsl	r2, r3, #1
	ldr	r3, [fp, #-8]
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #3
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #4
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #5
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #6
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #7
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #8
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #9
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #10
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #11
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #12
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #13
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #14
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #15
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #16
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #17
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #18
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #19
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #20
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #21
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #22
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #23
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #24
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #25
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #26
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #27
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #28
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #29
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #30
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #31
	eor	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	inverse_adjust_seed_1, .-inverse_adjust_seed_1
	.align	2
	.global	adjust_seed_3
	.syntax unified
	.arm
	.fpu softvfp
	.type	adjust_seed_3, %function
adjust_seed_3:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsl	r2, r3, #3
	ldr	r3, [fp, #-8]
	eor	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	adjust_seed_3, .-adjust_seed_3
	.align	2
	.global	inverse_adjust_seed_3
	.syntax unified
	.arm
	.fpu softvfp
	.type	inverse_adjust_seed_3, %function
inverse_adjust_seed_3:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsl	r2, r3, #3
	ldr	r3, [fp, #-8]
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #6
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #9
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #12
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #15
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #18
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #21
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #24
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #27
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #30
	eor	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	inverse_adjust_seed_3, .-inverse_adjust_seed_3
	.align	2
	.global	adjust_seed_4
	.syntax unified
	.arm
	.fpu softvfp
	.type	adjust_seed_4, %function
adjust_seed_4:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsl	r2, r3, #4
	ldr	r3, [fp, #-8]
	eor	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	adjust_seed_4, .-adjust_seed_4
	.align	2
	.global	inverse_adjust_seed_4
	.syntax unified
	.arm
	.fpu softvfp
	.type	inverse_adjust_seed_4, %function
inverse_adjust_seed_4:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsl	r2, r3, #4
	ldr	r3, [fp, #-8]
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #8
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #12
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #16
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #20
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #24
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #28
	eor	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	inverse_adjust_seed_4, .-inverse_adjust_seed_4
	.align	2
	.global	adjust_seed_7
	.syntax unified
	.arm
	.fpu softvfp
	.type	adjust_seed_7, %function
adjust_seed_7:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsl	r2, r3, #7
	ldr	r3, [fp, #-8]
	eor	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	adjust_seed_7, .-adjust_seed_7
	.align	2
	.global	inverse_adjust_seed_7
	.syntax unified
	.arm
	.fpu softvfp
	.type	inverse_adjust_seed_7, %function
inverse_adjust_seed_7:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsl	r2, r3, #7
	ldr	r3, [fp, #-8]
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #14
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #21
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #28
	eor	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	inverse_adjust_seed_7, .-inverse_adjust_seed_7
	.align	2
	.global	adjust_seed_8
	.syntax unified
	.arm
	.fpu softvfp
	.type	adjust_seed_8, %function
adjust_seed_8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsl	r2, r3, #8
	ldr	r3, [fp, #-8]
	eor	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	adjust_seed_8, .-adjust_seed_8
	.align	2
	.global	inverse_adjust_seed_8
	.syntax unified
	.arm
	.fpu softvfp
	.type	inverse_adjust_seed_8, %function
inverse_adjust_seed_8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsl	r2, r3, #8
	ldr	r3, [fp, #-8]
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #16
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #24
	eor	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	inverse_adjust_seed_8, .-inverse_adjust_seed_8
	.align	2
	.global	adjust_seed_16
	.syntax unified
	.arm
	.fpu softvfp
	.type	adjust_seed_16, %function
adjust_seed_16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsl	r2, r3, #16
	ldr	r3, [fp, #-8]
	eor	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	adjust_seed_16, .-adjust_seed_16
	.align	2
	.global	inverse_adjust_seed_16
	.syntax unified
	.arm
	.fpu softvfp
	.type	inverse_adjust_seed_16, %function
inverse_adjust_seed_16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsl	r2, r3, #16
	ldr	r3, [fp, #-8]
	eor	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	inverse_adjust_seed_16, .-inverse_adjust_seed_16
	.align	2
	.global	adjust_seed_24
	.syntax unified
	.arm
	.fpu softvfp
	.type	adjust_seed_24, %function
adjust_seed_24:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsl	r2, r3, #24
	ldr	r3, [fp, #-8]
	eor	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	adjust_seed_24, .-adjust_seed_24
	.align	2
	.global	inverse_adjust_seed_24
	.syntax unified
	.arm
	.fpu softvfp
	.type	inverse_adjust_seed_24, %function
inverse_adjust_seed_24:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsl	r2, r3, #24
	ldr	r3, [fp, #-8]
	eor	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	inverse_adjust_seed_24, .-inverse_adjust_seed_24
	.global	__aeabi_uidivmod
	.section	.rodata
	.align	2
.LC0:
	.ascii	"min dist %08X; seed out %08X; seeds\000"
	.align	2
.LC1:
	.ascii	" %08X\000"
	.align	2
.LC2:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 104
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #108
	ldr	r3, .L51
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	mov	r3,#0
	mvn	r3, #0
	str	r3, [fp, #-108]
	mov	r3, #8
	str	r3, [fp, #-104]
.L48:
	mov	r3, #0
	str	r3, [fp, #-116]
	ldr	r3, [fp, #-104]
	str	r3, [fp, #-100]
.L39:
	ldr	r0, [fp, #-100]
	bl	inverse_adjust_seed_4
	str	r0, [fp, #-88]
	mov	r3, #0
	str	r3, [fp, #-96]
	b	.L33
.L35:
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	str	r3, [fp, #-96]
.L33:
	ldr	r3, [fp, #-96]
	ldr	r2, [fp, #-116]
	cmp	r2, r3
	bls	.L34
	ldr	r3, [fp, #-96]
	lsl	r3, r3, #2
	sub	r2, fp, #12
	add	r3, r2, r3
	ldr	r3, [r3, #-68]
	ldr	r2, [fp, #-88]
	cmp	r2, r3
	bhi	.L35
.L34:
	ldr	r3, [fp, #-116]
	sub	r3, r3, #1
	str	r3, [fp, #-92]
	b	.L36
.L37:
	ldr	r3, [fp, #-92]
	add	r1, r3, #1
	ldr	r3, [fp, #-92]
	lsl	r3, r3, #2
	sub	r2, fp, #12
	add	r3, r2, r3
	ldr	r2, [r3, #-68]
	lsl	r3, r1, #2
	sub	r1, fp, #12
	add	r3, r1, r3
	str	r2, [r3, #-68]
	ldr	r3, [fp, #-92]
	sub	r3, r3, #1
	str	r3, [fp, #-92]
.L36:
	ldr	r2, [fp, #-92]
	ldr	r3, [fp, #-96]
	cmp	r2, r3
	bge	.L37
	ldr	r3, [fp, #-96]
	lsl	r3, r3, #2
	sub	r2, fp, #12
	add	r3, r2, r3
	ldr	r2, [fp, #-88]
	str	r2, [r3, #-68]
	ldr	r3, [fp, #-116]
	add	r3, r3, #1
	str	r3, [fp, #-116]
	ldr	r3, [fp, #-100]
	eor	r3, r3, #-2147483648
	mov	r0, r3
	bl	inverse_adjust_seed_4
	str	r0, [fp, #-88]
	ldr	r0, [fp, #-88]
	bl	adjust_seed_4
	mov	r3, r0
	cmp	r3, #7
	bhi	.L38
	ldr	r3, [fp, #-100]
	add	r3, r3, #1
	str	r3, [fp, #-100]
.L38:
	ldr	r3, [fp, #-100]
	and	r3, r3, #7
	cmp	r3, #0
	bne	.L39
	mvn	r3, #0
	str	r3, [fp, #-112]
	mov	r3, #0
	str	r3, [fp, #-96]
	b	.L40
.L42:
	ldr	r3, [fp, #-96]
	lsl	r3, r3, #2
	sub	r2, fp, #12
	add	r3, r2, r3
	ldr	r4, [r3, #-68]
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	ldr	r1, [fp, #-116]
	mov	r0, r3
	bl	__aeabi_uidivmod
	mov	r3, r1
	lsl	r3, r3, #2
	sub	r2, fp, #12
	add	r3, r2, r3
	ldr	r3, [r3, #-68]
	mov	r1, r3
	mov	r0, r4
	bl	distance_uint32
	str	r0, [fp, #-84]
	ldr	r2, [fp, #-84]
	ldr	r3, [fp, #-112]
	cmp	r2, r3
	bcs	.L41
	ldr	r3, [fp, #-84]
	str	r3, [fp, #-112]
.L41:
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	str	r3, [fp, #-96]
.L40:
	ldr	r3, [fp, #-96]
	ldr	r2, [fp, #-116]
	cmp	r2, r3
	bhi	.L42
	ldr	r3, [fp, #-112]
	cmp	r3, #255
	bls	.L43
	ldr	r2, [fp, #-112]
	ldr	r3, [fp, #-108]
	cmp	r2, r3
	bcs	.L44
.L43:
	ldr	r2, [fp, #-104]
	ldr	r1, [fp, #-112]
	ldr	r0, .L51+4
	bl	printf
	mov	r3, #0
	str	r3, [fp, #-96]
	b	.L45
.L46:
	ldr	r3, [fp, #-96]
	lsl	r3, r3, #2
	sub	r2, fp, #12
	add	r3, r2, r3
	ldr	r3, [r3, #-68]
	mov	r1, r3
	ldr	r0, .L51+8
	bl	printf
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	str	r3, [fp, #-96]
.L45:
	ldr	r3, [fp, #-96]
	ldr	r2, [fp, #-116]
	cmp	r2, r3
	bhi	.L46
	mov	r0, #10
	bl	putchar
.L44:
	ldr	r2, [fp, #-112]
	ldr	r3, [fp, #-108]
	cmp	r2, r3
	bcs	.L47
	ldr	r3, [fp, #-112]
	str	r3, [fp, #-108]
.L47:
	ldr	r3, [fp, #-104]
	add	r3, r3, #8
	str	r3, [fp, #-104]
	ldr	r3, [fp, #-104]
	cmp	r3, #0
	bne	.L48
	mov	r3, #0
	ldr	r2, .L51
	ldr	r1, [r2]
	ldr	r2, [fp, #-16]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L50
	bl	__stack_chk_fail
.L50:
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L52:
	.align	2
.L51:
	.word	.LC2
	.word	.LC0
	.word	.LC1
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
