	.file	"4292.c"
	.intel_syntax noprefix
	.text
	.globl	j
	.bss
	.align 4
	.type	j, @object
	.size	j, 4
j:
	.zero	4
	.section	.rodata
	.align 8
.LC0:
	.string	"\n\tEntre com a quantidade de produtos [1-100]: "
.LC1:
	.string	"%d"
	.align 8
.LC2:
	.string	"\n\tEntre com a quantidade de pesos[5-20]: "
	.align 8
.LC3:
	.string	"\n\tEntre com os valores dos %d pesos: "
	.align 8
.LC4:
	.string	"\n\tEntre com os pesos dos %d produtos: "
.LC5:
	.string	"\n\t0"
	.align 8
.LC6:
	.string	"\n\tPesos para o produto de peso %d: "
.LC7:
	.string	"\t%d"
	.text
	.globl	main
	.type	main, @function
main:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r15
	push	r14
	push	r13
	push	r12
	push	rbx
	sub	rsp, 120
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -56[rbp], rax
	xor	eax, eax
	mov	rax, rsp
	mov	rbx, rax
	mov	DWORD PTR -112[rbp], 0
	mov	edx, DWORD PTR -136[rbp]
	movsx	rax, edx
	sub	rax, 1
	mov	QWORD PTR -104[rbp], rax
	movsx	rax, edx
	mov	QWORD PTR -160[rbp], rax
	mov	QWORD PTR -152[rbp], 0
	movsx	rax, edx
	mov	r14, rax
	mov	r15d, 0
	movsx	rax, edx
	lea	rdx, 0[0+rax*4]
	mov	eax, 16
	sub	rax, 1
	add	rax, rdx
	mov	ecx, 16
	mov	edx, 0
	div	rcx
	imul	rax, rax, 16
	mov	rcx, rax
	and	rcx, -4096
	mov	rdx, rsp
	sub	rdx, rcx
.L2:
	cmp	rsp, rdx
	je	.L3
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	jmp	.L2
.L3:
	mov	rdx, rax
	and	edx, 4095
	sub	rsp, rdx
	mov	rdx, rax
	and	edx, 4095
	test	rdx, rdx
	je	.L4
	and	eax, 4095
	sub	rax, 8
	add	rax, rsp
	or	QWORD PTR [rax], 0
.L4:
	mov	rax, rsp
	add	rax, 3
	shr	rax, 2
	sal	rax, 2
	mov	QWORD PTR -96[rbp], rax
	mov	eax, DWORD PTR -136[rbp]
	movsx	rdx, eax
	sub	rdx, 1
	mov	QWORD PTR -88[rbp], rdx
	movsx	rdx, eax
	mov	r12, rdx
	mov	r13d, 0
	movsx	rdx, eax
	mov	r10, rdx
	mov	r11d, 0
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	eax, 16
	sub	rax, 1
	add	rax, rdx
	mov	ecx, 16
	mov	edx, 0
	div	rcx
	imul	rax, rax, 16
	mov	rcx, rax
	and	rcx, -4096
	mov	rdx, rsp
	sub	rdx, rcx
.L5:
	cmp	rsp, rdx
	je	.L6
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	jmp	.L5
.L6:
	mov	rdx, rax
	and	edx, 4095
	sub	rsp, rdx
	mov	rdx, rax
	and	edx, 4095
	test	rdx, rdx
	je	.L7
	and	eax, 4095
	sub	rax, 8
	add	rax, rsp
	or	QWORD PTR [rax], 0
.L7:
	mov	rax, rsp
	add	rax, 3
	shr	rax, 2
	sal	rax, 2
	mov	QWORD PTR -80[rbp], rax
	mov	eax, DWORD PTR -140[rbp]
	movsx	rdx, eax
	sub	rdx, 1
	mov	QWORD PTR -72[rbp], rdx
	movsx	rdx, eax
	mov	r8, rdx
	mov	r9d, 0
	movsx	rdx, eax
	mov	rsi, rdx
	mov	edi, 0
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	eax, 16
	sub	rax, 1
	add	rax, rdx
	mov	esi, 16
	mov	edx, 0
	div	rsi
	imul	rax, rax, 16
	mov	rcx, rax
	and	rcx, -4096
	mov	rdx, rsp
	sub	rdx, rcx
.L8:
	cmp	rsp, rdx
	je	.L9
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	jmp	.L8
.L9:
	mov	rdx, rax
	and	edx, 4095
	sub	rsp, rdx
	mov	rdx, rax
	and	edx, 4095
	test	rdx, rdx
	je	.L10
	and	eax, 4095
	sub	rax, 8
	add	rax, rsp
	or	QWORD PTR [rax], 0
.L10:
	mov	rax, rsp
	add	rax, 3
	shr	rax, 2
	sal	rax, 2
	mov	QWORD PTR -64[rbp], rax
.L11:
	lea	rdi, .LC0[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rax, -140[rbp]
	mov	rsi, rax
	lea	rdi, .LC1[rip]
	mov	eax, 0
	call	__isoc99_scanf@PLT
	mov	eax, DWORD PTR -140[rbp]
	test	eax, eax
	jle	.L11
	mov	eax, DWORD PTR -140[rbp]
	cmp	eax, 100
	jg	.L11
.L12:
	lea	rdi, .LC2[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rax, -136[rbp]
	mov	rsi, rax
	lea	rdi, .LC1[rip]
	mov	eax, 0
	call	__isoc99_scanf@PLT
	mov	eax, DWORD PTR -136[rbp]
	cmp	eax, 4
	jle	.L12
	mov	eax, DWORD PTR -136[rbp]
	cmp	eax, 20
	jg	.L12
	mov	eax, DWORD PTR -136[rbp]
	mov	esi, eax
	lea	rdi, .LC3[rip]
	mov	eax, 0
	call	printf@PLT
	mov	DWORD PTR -116[rbp], 0
	jmp	.L13
.L14:
	mov	eax, DWORD PTR -116[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -96[rbp]
	add	rax, rdx
	mov	rsi, rax
	lea	rdi, .LC1[rip]
	mov	eax, 0
	call	__isoc99_scanf@PLT
	mov	rax, QWORD PTR -96[rbp]
	mov	edx, DWORD PTR -116[rbp]
	movsx	rdx, edx
	mov	eax, DWORD PTR [rax+rdx*4]
	cmp	eax, 1000000
	jg	.L14
	mov	rax, QWORD PTR -96[rbp]
	mov	edx, DWORD PTR -116[rbp]
	movsx	rdx, edx
	mov	eax, DWORD PTR [rax+rdx*4]
	test	eax, eax
	jle	.L14
	mov	rax, QWORD PTR -96[rbp]
	mov	edx, DWORD PTR -116[rbp]
	movsx	rdx, edx
	mov	eax, DWORD PTR [rax+rdx*4]
	add	DWORD PTR -112[rbp], eax
	add	DWORD PTR -116[rbp], 1
.L13:
	mov	eax, DWORD PTR -136[rbp]
	cmp	DWORD PTR -116[rbp], eax
	jl	.L14
	mov	eax, DWORD PTR -140[rbp]
	mov	esi, eax
	lea	rdi, .LC4[rip]
	mov	eax, 0
	call	printf@PLT
	mov	DWORD PTR -120[rbp], 0
	jmp	.L15
.L16:
	mov	eax, DWORD PTR -120[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	mov	rsi, rax
	lea	rdi, .LC1[rip]
	mov	eax, 0
	call	__isoc99_scanf@PLT
	mov	rax, QWORD PTR -64[rbp]
	mov	edx, DWORD PTR -120[rbp]
	movsx	rdx, edx
	mov	eax, DWORD PTR [rax+rdx*4]
	test	eax, eax
	js	.L16
	add	DWORD PTR -120[rbp], 1
.L15:
	mov	eax, DWORD PTR -140[rbp]
	cmp	DWORD PTR -120[rbp], eax
	jl	.L16
	mov	DWORD PTR -124[rbp], 0
	jmp	.L17
.L28:
	mov	rax, QWORD PTR -64[rbp]
	mov	edx, DWORD PTR -124[rbp]
	movsx	rdx, edx
	mov	eax, DWORD PTR [rax+rdx*4]
	test	eax, eax
	je	.L18
	mov	rax, QWORD PTR -64[rbp]
	mov	edx, DWORD PTR -124[rbp]
	movsx	rdx, edx
	mov	eax, DWORD PTR [rax+rdx*4]
	cmp	DWORD PTR -112[rbp], eax
	jge	.L19
.L18:
	lea	rdi, .LC5[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L20
.L19:
	mov	rax, QWORD PTR -64[rbp]
	mov	edx, DWORD PTR -124[rbp]
	movsx	rdx, edx
	mov	esi, DWORD PTR [rax+rdx*4]
	mov	eax, DWORD PTR -136[rbp]
	mov	rcx, QWORD PTR -80[rbp]
	mov	rdx, QWORD PTR -96[rbp]
	mov	r8, rcx
	mov	rcx, rdx
	mov	edx, 0
	mov	edi, eax
	call	balanceRec
	mov	DWORD PTR -108[rbp], eax
	mov	eax, DWORD PTR j[rip]
	sub	eax, 1
	mov	DWORD PTR j[rip], eax
	cmp	DWORD PTR -108[rbp], 0
	je	.L21
	mov	rax, QWORD PTR -64[rbp]
	mov	edx, DWORD PTR -124[rbp]
	movsx	rdx, edx
	mov	eax, DWORD PTR [rax+rdx*4]
	mov	esi, eax
	lea	rdi, .LC6[rip]
	mov	eax, 0
	call	printf@PLT
	mov	eax, DWORD PTR j[rip]
	mov	DWORD PTR -128[rbp], eax
	jmp	.L22
.L24:
	mov	eax, DWORD PTR -128[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -80[rbp]
	add	rax, rdx
	test	rax, rax
	je	.L23
	mov	rax, QWORD PTR -80[rbp]
	mov	edx, DWORD PTR -128[rbp]
	movsx	rdx, edx
	mov	eax, DWORD PTR [rax+rdx*4]
	mov	esi, eax
	lea	rdi, .LC7[rip]
	mov	eax, 0
	call	printf@PLT
.L23:
	sub	DWORD PTR -128[rbp], 1
.L22:
	cmp	DWORD PTR -128[rbp], 0
	jns	.L24
	mov	eax, DWORD PTR j[rip]
	mov	DWORD PTR -132[rbp], eax
	jmp	.L25
.L26:
	sub	DWORD PTR -132[rbp], 1
.L25:
	cmp	DWORD PTR -132[rbp], 0
	jns	.L26
	jmp	.L27
.L21:
	lea	rdi, .LC5[rip]
	mov	eax, 0
	call	printf@PLT
.L27:
	mov	rax, QWORD PTR -80[rbp]
	mov	rdi, rax
	call	reset
.L20:
	add	DWORD PTR -124[rbp], 1
.L17:
	mov	eax, DWORD PTR -140[rbp]
	cmp	DWORD PTR -124[rbp], eax
	jl	.L28
	mov	eax, 0
	mov	rsp, rbx
	mov	rbx, QWORD PTR -56[rbp]
	sub	rbx, QWORD PTR fs:40
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	lea	rsp, -40[rbp]
	pop	rbx
	pop	r12
	pop	r13
	pop	r14
	pop	r15
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	main, .-main
	.globl	balanceRec
	.type	balanceRec, @function
balanceRec:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r13
	push	r12
	push	rbx
	sub	rsp, 72
	.cfi_offset 13, -24
	.cfi_offset 12, -32
	.cfi_offset 3, -40
	mov	DWORD PTR -68[rbp], edi
	mov	DWORD PTR -72[rbp], esi
	mov	DWORD PTR -76[rbp], edx
	mov	QWORD PTR -88[rbp], rcx
	mov	QWORD PTR -96[rbp], r8
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -40[rbp], rax
	xor	eax, eax
	mov	rax, rsp
	mov	rbx, rax
	mov	eax, DWORD PTR -68[rbp]
	movsx	rdx, eax
	sub	rdx, 1
	mov	QWORD PTR -56[rbp], rdx
	movsx	rdx, eax
	mov	r12, rdx
	mov	r13d, 0
	movsx	rdx, eax
	mov	r10, rdx
	mov	r11d, 0
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	eax, 16
	sub	rax, 1
	add	rax, rdx
	mov	edi, 16
	mov	edx, 0
	div	rdi
	imul	rax, rax, 16
	mov	rcx, rax
	and	rcx, -4096
	mov	rdx, rsp
	sub	rdx, rcx
.L32:
	cmp	rsp, rdx
	je	.L33
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	jmp	.L32
.L33:
	mov	rdx, rax
	and	edx, 4095
	sub	rsp, rdx
	mov	rdx, rax
	and	edx, 4095
	test	rdx, rdx
	je	.L34
	and	eax, 4095
	sub	rax, 8
	add	rax, rsp
	or	QWORD PTR [rax], 0
.L34:
	mov	rax, rsp
	add	rax, 3
	shr	rax, 2
	sal	rax, 2
	mov	QWORD PTR -48[rbp], rax
	mov	DWORD PTR -64[rbp], 0
	jmp	.L35
.L36:
	mov	eax, DWORD PTR -64[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -88[rbp]
	add	rdx, rax
	mov	eax, DWORD PTR -68[rbp]
	sub	eax, DWORD PTR -64[rbp]
	lea	esi, -1[rax]
	mov	ecx, DWORD PTR [rdx]
	mov	rax, QWORD PTR -48[rbp]
	movsx	rdx, esi
	mov	DWORD PTR [rax+rdx*4], ecx
	add	DWORD PTR -64[rbp], 1
.L35:
	mov	eax, DWORD PTR -68[rbp]
	cmp	DWORD PTR -64[rbp], eax
	jl	.L36
	mov	eax, DWORD PTR -76[rbp]
	cmp	eax, DWORD PTR -72[rbp]
	jne	.L37
	mov	eax, 1
	jmp	.L38
.L37:
	mov	eax, DWORD PTR -68[rbp]
	test	eax, eax
	jne	.L39
	mov	eax, 0
	jmp	.L38
.L39:
	lea	rdx, -68[rbp]
	mov	rax, QWORD PTR -48[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	rem_first
	mov	DWORD PTR -60[rbp], eax
	mov	eax, DWORD PTR -68[rbp]
	mov	rdi, QWORD PTR -96[rbp]
	mov	rcx, QWORD PTR -88[rbp]
	mov	edx, DWORD PTR -76[rbp]
	mov	esi, DWORD PTR -72[rbp]
	mov	r8, rdi
	mov	edi, eax
	call	balanceRec
	test	eax, eax
	je	.L40
	mov	eax, 1
	jmp	.L38
.L40:
	mov	edx, DWORD PTR -76[rbp]
	mov	eax, DWORD PTR -60[rbp]
	lea	edi, [rdx+rax]
	mov	eax, DWORD PTR -68[rbp]
	mov	rcx, QWORD PTR -96[rbp]
	mov	rdx, QWORD PTR -88[rbp]
	mov	esi, DWORD PTR -72[rbp]
	mov	r8, rcx
	mov	rcx, rdx
	mov	edx, edi
	mov	edi, eax
	call	balanceRec
	test	eax, eax
	je	.L41
	mov	edx, DWORD PTR -60[rbp]
	mov	rax, QWORD PTR -96[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	add_vet
	mov	eax, 1
	jmp	.L38
.L41:
	mov	edx, DWORD PTR -72[rbp]
	mov	eax, DWORD PTR -60[rbp]
	lea	esi, [rdx+rax]
	mov	eax, DWORD PTR -68[rbp]
	mov	rdi, QWORD PTR -96[rbp]
	mov	rcx, QWORD PTR -88[rbp]
	mov	edx, DWORD PTR -76[rbp]
	mov	r8, rdi
	mov	edi, eax
	call	balanceRec
	test	eax, eax
	je	.L42
	mov	eax, DWORD PTR -60[rbp]
	neg	eax
	mov	edx, eax
	mov	rax, QWORD PTR -96[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	add_vet
	mov	eax, 1
	jmp	.L38
.L42:
	mov	eax, 0
.L38:
	mov	rsp, rbx
	mov	rbx, QWORD PTR -40[rbp]
	sub	rbx, QWORD PTR fs:40
	je	.L44
	call	__stack_chk_fail@PLT
.L44:
	lea	rsp, -24[rbp]
	pop	rbx
	pop	r12
	pop	r13
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	balanceRec, .-balanceRec
	.globl	rem_first
	.type	rem_first, @function
rem_first:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	QWORD PTR -32[rbp], rsi
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -4[rbp], eax
	mov	DWORD PTR -8[rbp], 0
	jmp	.L46
.L47:
	mov	eax, DWORD PTR -8[rbp]
	cdqe
	add	rax, 1
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	edx, DWORD PTR -8[rbp]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	mov	rdx, QWORD PTR -24[rbp]
	add	rdx, rcx
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR [rdx], eax
	add	DWORD PTR -8[rbp], 1
.L46:
	mov	rax, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR [rax]
	cmp	DWORD PTR -8[rbp], eax
	jl	.L47
	mov	rax, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR [rax]
	lea	edx, -1[rax]
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], edx
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	rem_first, .-rem_first
	.globl	add_vet
	.type	add_vet, @function
add_vet:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	DWORD PTR -4[rbp], 0
	jmp	.L50
.L53:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	cmp	DWORD PTR -28[rbp], eax
	je	.L54
	add	DWORD PTR -4[rbp], 1
.L50:
	mov	eax, DWORD PTR j[rip]
	cmp	DWORD PTR -4[rbp], eax
	jle	.L53
	mov	eax, DWORD PTR j[rip]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rdx, rax
	mov	eax, DWORD PTR -28[rbp]
	mov	DWORD PTR [rdx], eax
	mov	eax, DWORD PTR j[rip]
	add	eax, 1
	mov	DWORD PTR j[rip], eax
	jmp	.L49
.L54:
	nop
.L49:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	add_vet, .-add_vet
	.globl	reset
	.type	reset, @function
reset:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -4[rbp], 0
.L56:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	DWORD PTR [rax], 0
	add	DWORD PTR -4[rbp], 1
	mov	eax, DWORD PTR j[rip]
	cmp	DWORD PTR -4[rbp], eax
	jle	.L56
	mov	DWORD PTR j[rip], 0
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	reset, .-reset
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"4292.c"
	.text
	.global	j
	.bss
	.align	2
	.type	j, %object
	.size	j, 4
j:
	.space	4
	.section	.rodata
	.align	2
.LC0:
	.ascii	"\012\011Entre com a quantidade de produtos [1-100]:"
	.ascii	" \000"
	.align	2
.LC1:
	.ascii	"%d\000"
	.align	2
.LC2:
	.ascii	"\012\011Entre com a quantidade de pesos[5-20]: \000"
	.align	2
.LC3:
	.ascii	"\012\011Entre com os valores dos %d pesos: \000"
	.align	2
.LC4:
	.ascii	"\012\011Entre com os pesos dos %d produtos: \000"
	.align	2
.LC5:
	.ascii	"\012\0110\000"
	.align	2
.LC6:
	.ascii	"\012\011Pesos para o produto de peso %d: \000"
	.align	2
.LC7:
	.ascii	"\011%d\000"
	.align	2
.LC8:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 64
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #76
	ldr	r3, .L22
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	mov	r3,#0
	mov	r3, sp
	mov	r4, r3
	mov	r3, #0
	str	r3, [fp, #-48]
	ldr	ip, [fp, #-72]
	sub	r3, ip, #1
	str	r3, [fp, #-44]
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	lsl	r3, r3, #2
	add	r3, r3, #7
	lsr	r3, r3, #3
	lsl	r3, r3, #3
	sub	sp, sp, r3
	add	r3, sp, #8
	add	r3, r3, #3
	lsr	r3, r3, #2
	lsl	r3, r3, #2
	str	r3, [fp, #-40]
	ldr	ip, [fp, #-72]
	sub	r3, ip, #1
	str	r3, [fp, #-36]
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	lsl	r3, r3, #2
	add	r3, r3, #7
	lsr	r3, r3, #3
	lsl	r3, r3, #3
	sub	sp, sp, r3
	add	r3, sp, #8
	add	r3, r3, #3
	lsr	r3, r3, #2
	lsl	r3, r3, #2
	str	r3, [fp, #-32]
	ldr	ip, [fp, #-76]
	sub	r3, ip, #1
	str	r3, [fp, #-28]
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	lsl	r3, r3, #2
	add	r3, r3, #7
	lsr	r3, r3, #3
	lsl	r3, r3, #3
	sub	sp, sp, r3
	add	r3, sp, #8
	add	r3, r3, #3
	lsr	r3, r3, #2
	lsl	r3, r3, #2
	str	r3, [fp, #-24]
.L2:
	ldr	r0, .L22+4
	bl	printf
	sub	r3, fp, #76
	mov	r1, r3
	ldr	r0, .L22+8
	bl	__isoc99_scanf
	ldr	r3, [fp, #-76]
	cmp	r3, #0
	ble	.L2
	ldr	r3, [fp, #-76]
	cmp	r3, #100
	bgt	.L2
.L3:
	ldr	r0, .L22+12
	bl	printf
	sub	r3, fp, #72
	mov	r1, r3
	ldr	r0, .L22+8
	bl	__isoc99_scanf
	ldr	r3, [fp, #-72]
	cmp	r3, #4
	ble	.L3
	ldr	r3, [fp, #-72]
	cmp	r3, #20
	bgt	.L3
	ldr	r3, [fp, #-72]
	mov	r1, r3
	ldr	r0, .L22+16
	bl	printf
	mov	r3, #0
	str	r3, [fp, #-52]
	b	.L4
.L5:
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-40]
	add	r3, r2, r3
	mov	r1, r3
	ldr	r0, .L22+8
	bl	__isoc99_scanf
	ldr	r3, [fp, #-40]
	ldr	r2, [fp, #-52]
	ldr	r3, [r3, r2, lsl #2]
	ldr	r2, .L22+20
	cmp	r3, r2
	bgt	.L5
	ldr	r3, [fp, #-40]
	ldr	r2, [fp, #-52]
	ldr	r3, [r3, r2, lsl #2]
	cmp	r3, #0
	ble	.L5
	ldr	r3, [fp, #-40]
	ldr	r2, [fp, #-52]
	ldr	r3, [r3, r2, lsl #2]
	ldr	r2, [fp, #-48]
	add	r3, r2, r3
	str	r3, [fp, #-48]
	ldr	r3, [fp, #-52]
	add	r3, r3, #1
	str	r3, [fp, #-52]
.L4:
	ldr	r3, [fp, #-72]
	ldr	r2, [fp, #-52]
	cmp	r2, r3
	blt	.L5
	ldr	r3, [fp, #-76]
	mov	r1, r3
	ldr	r0, .L22+24
	bl	printf
	mov	r3, #0
	str	r3, [fp, #-56]
	b	.L6
.L7:
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-24]
	add	r3, r2, r3
	mov	r1, r3
	ldr	r0, .L22+8
	bl	__isoc99_scanf
	ldr	r3, [fp, #-24]
	ldr	r2, [fp, #-56]
	ldr	r3, [r3, r2, lsl #2]
	cmp	r3, #0
	blt	.L7
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
.L6:
	ldr	r3, [fp, #-76]
	ldr	r2, [fp, #-56]
	cmp	r2, r3
	blt	.L7
	mov	r3, #0
	str	r3, [fp, #-60]
	b	.L8
.L19:
	ldr	r3, [fp, #-24]
	ldr	r2, [fp, #-60]
	ldr	r3, [r3, r2, lsl #2]
	cmp	r3, #0
	beq	.L9
	ldr	r3, [fp, #-24]
	ldr	r2, [fp, #-60]
	ldr	r3, [r3, r2, lsl #2]
	ldr	r2, [fp, #-48]
	cmp	r2, r3
	bge	.L10
.L9:
	ldr	r0, .L22+28
	bl	printf
	b	.L11
.L10:
	ldr	r0, [fp, #-72]
	ldr	r3, [fp, #-24]
	ldr	r2, [fp, #-60]
	ldr	r1, [r3, r2, lsl #2]
	ldr	r3, [fp, #-32]
	str	r3, [sp]
	ldr	r3, [fp, #-40]
	mov	r2, #0
	bl	balanceRec
	str	r0, [fp, #-20]
	ldr	r3, .L22+32
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r2, .L22+32
	str	r3, [r2]
	ldr	r3, [fp, #-20]
	cmp	r3, #0
	beq	.L12
	ldr	r3, [fp, #-24]
	ldr	r2, [fp, #-60]
	ldr	r3, [r3, r2, lsl #2]
	mov	r1, r3
	ldr	r0, .L22+36
	bl	printf
	ldr	r3, .L22+32
	ldr	r3, [r3]
	str	r3, [fp, #-64]
	b	.L13
.L15:
	ldr	r3, [fp, #-64]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	cmp	r3, #0
	beq	.L14
	ldr	r3, [fp, #-32]
	ldr	r2, [fp, #-64]
	ldr	r3, [r3, r2, lsl #2]
	mov	r1, r3
	ldr	r0, .L22+40
	bl	printf
.L14:
	ldr	r3, [fp, #-64]
	sub	r3, r3, #1
	str	r3, [fp, #-64]
.L13:
	ldr	r3, [fp, #-64]
	cmp	r3, #0
	bge	.L15
	ldr	r3, .L22+32
	ldr	r3, [r3]
	str	r3, [fp, #-68]
	b	.L16
.L17:
	ldr	r3, [fp, #-68]
	sub	r3, r3, #1
	str	r3, [fp, #-68]
.L16:
	ldr	r3, [fp, #-68]
	cmp	r3, #0
	bge	.L17
	b	.L18
.L12:
	ldr	r0, .L22+28
	bl	printf
.L18:
	ldr	r0, [fp, #-32]
	bl	reset
.L11:
	ldr	r3, [fp, #-60]
	add	r3, r3, #1
	str	r3, [fp, #-60]
.L8:
	ldr	r3, [fp, #-76]
	ldr	r2, [fp, #-60]
	cmp	r2, r3
	blt	.L19
	mov	r3, #0
	mov	sp, r4
	ldr	r2, .L22
	ldr	r1, [r2]
	ldr	r2, [fp, #-16]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L21
	bl	__stack_chk_fail
.L21:
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L23:
	.align	2
.L22:
	.word	.LC8
	.word	.LC0
	.word	.LC1
	.word	.LC2
	.word	.LC3
	.word	1000000
	.word	.LC4
	.word	.LC5
	.word	j
	.word	.LC6
	.word	.LC7
	.size	main, .-main
	.section	.rodata
	.align	2
.LC9:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	balanceRec
	.syntax unified
	.arm
	.fpu softvfp
	.type	balanceRec, %function
balanceRec:
	@ args = 4, pretend = 0, frame = 48
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #60
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	str	r2, [fp, #-48]
	str	r3, [fp, #-52]
	ldr	r3, [fp, #4]
	str	r3, [fp, #-56]
	ldr	r3, .L35
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	mov	r3,#0
	mov	r3, sp
	mov	r4, r3
	ldr	ip, [fp, #-40]
	sub	r3, ip, #1
	str	r3, [fp, #-28]
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	lsl	r3, r3, #2
	add	r3, r3, #7
	lsr	r3, r3, #3
	lsl	r3, r3, #3
	sub	sp, sp, r3
	add	r3, sp, #8
	add	r3, r3, #3
	lsr	r3, r3, #2
	lsl	r3, r3, #2
	str	r3, [fp, #-24]
	mov	r3, #0
	str	r3, [fp, #-32]
	b	.L25
.L26:
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-52]
	add	r3, r2, r3
	ldr	r1, [fp, #-40]
	ldr	r2, [fp, #-32]
	sub	r2, r1, r2
	sub	r2, r2, #1
	ldr	r1, [r3]
	ldr	r3, [fp, #-24]
	str	r1, [r3, r2, lsl #2]
	ldr	r3, [fp, #-32]
	add	r3, r3, #1
	str	r3, [fp, #-32]
.L25:
	ldr	r3, [fp, #-40]
	ldr	r2, [fp, #-32]
	cmp	r2, r3
	blt	.L26
	ldr	r2, [fp, #-48]
	ldr	r3, [fp, #-44]
	cmp	r2, r3
	bne	.L27
	mov	r3, #1
	b	.L28
.L27:
	ldr	r3, [fp, #-40]
	cmp	r3, #0
	bne	.L29
	mov	r3, #0
	b	.L28
.L29:
	sub	r3, fp, #40
	mov	r1, r3
	ldr	r0, [fp, #-24]
	bl	rem_first
	str	r0, [fp, #-20]
	ldr	r0, [fp, #-40]
	ldr	r3, [fp, #-56]
	str	r3, [sp]
	ldr	r3, [fp, #-52]
	ldr	r2, [fp, #-48]
	ldr	r1, [fp, #-44]
	bl	balanceRec
	mov	r3, r0
	cmp	r3, #0
	beq	.L30
	mov	r3, #1
	b	.L28
.L30:
	ldr	r0, [fp, #-40]
	ldr	r2, [fp, #-48]
	ldr	r3, [fp, #-20]
	add	r2, r2, r3
	ldr	r3, [fp, #-56]
	str	r3, [sp]
	ldr	r3, [fp, #-52]
	ldr	r1, [fp, #-44]
	bl	balanceRec
	mov	r3, r0
	cmp	r3, #0
	beq	.L31
	ldr	r1, [fp, #-20]
	ldr	r0, [fp, #-56]
	bl	add_vet
	mov	r3, #1
	b	.L28
.L31:
	ldr	r0, [fp, #-40]
	ldr	r2, [fp, #-44]
	ldr	r3, [fp, #-20]
	add	r1, r2, r3
	ldr	r3, [fp, #-56]
	str	r3, [sp]
	ldr	r3, [fp, #-52]
	ldr	r2, [fp, #-48]
	bl	balanceRec
	mov	r3, r0
	cmp	r3, #0
	beq	.L32
	ldr	r3, [fp, #-20]
	rsb	r3, r3, #0
	mov	r1, r3
	ldr	r0, [fp, #-56]
	bl	add_vet
	mov	r3, #1
	b	.L28
.L32:
	mov	r3, #0
.L28:
	mov	sp, r4
	ldr	r2, .L35
	ldr	r1, [r2]
	ldr	r2, [fp, #-16]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L34
	bl	__stack_chk_fail
.L34:
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L36:
	.align	2
.L35:
	.word	.LC9
	.size	balanceRec, .-balanceRec
	.align	2
	.global	rem_first
	.syntax unified
	.arm
	.fpu softvfp
	.type	rem_first, %function
rem_first:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	ldr	r3, [fp, #-16]
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3, #0
	str	r3, [fp, #-12]
	b	.L38
.L39:
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r2, r2, r3
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #2
	ldr	r1, [fp, #-16]
	add	r3, r1, r3
	ldr	r2, [r2]
	str	r2, [r3]
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	str	r3, [fp, #-12]
.L38:
	ldr	r3, [fp, #-20]
	ldr	r3, [r3]
	ldr	r2, [fp, #-12]
	cmp	r2, r3
	blt	.L39
	ldr	r3, [fp, #-20]
	ldr	r3, [r3]
	sub	r2, r3, #1
	ldr	r3, [fp, #-20]
	str	r2, [r3]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	rem_first, .-rem_first
	.align	2
	.global	add_vet
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_vet, %function
add_vet:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L42
.L45:
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	ldr	r3, [r3]
	ldr	r2, [fp, #-20]
	cmp	r2, r3
	beq	.L46
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L42:
	ldr	r3, .L47
	ldr	r3, [r3]
	ldr	r2, [fp, #-8]
	cmp	r2, r3
	ble	.L45
	ldr	r3, .L47
	ldr	r3, [r3]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	ldr	r2, [fp, #-20]
	str	r2, [r3]
	ldr	r3, .L47
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L47
	str	r3, [r2]
	b	.L41
.L46:
	nop
.L41:
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L48:
	.align	2
.L47:
	.word	j
	.size	add_vet, .-add_vet
	.align	2
	.global	reset
	.syntax unified
	.arm
	.fpu softvfp
	.type	reset, %function
reset:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	mov	r3, #0
	str	r3, [fp, #-8]
.L50:
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
	ldr	r3, .L52
	ldr	r3, [r3]
	ldr	r2, [fp, #-8]
	cmp	r2, r3
	ble	.L50
	ldr	r3, .L52
	mov	r2, #0
	str	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L53:
	.align	2
.L52:
	.word	j
	.size	reset, .-reset
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
