	.file	"90145.c"
	.intel_syntax noprefix
	.text
	.globl	runner
	.type	runner, @function
runner:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -36[rbp], edi
	mov	QWORD PTR -48[rbp], rsi
	mov	QWORD PTR -56[rbp], rdx
	mov	eax, DWORD PTR -36[rbp]
	lea	ecx, -4[rax]
	movsx	rax, ecx
	sub	rax, 1
	mov	QWORD PTR -16[rbp], rax
	movsx	rax, ecx
	mov	r10, rax
	mov	r11d, 0
	mov	eax, DWORD PTR -36[rbp]
	movsx	rdx, eax
	sub	rdx, 1
	mov	QWORD PTR -8[rbp], rdx
	movsx	rdx, eax
	mov	r8, rdx
	mov	r9d, 0
	mov	DWORD PTR -24[rbp], 0
	jmp	.L2
.L35:
	mov	DWORD PTR -20[rbp], 2
	jmp	.L3
.L34:
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 2
	movsx	rdx, edx
	mov	esi, DWORD PTR [rsi+rdx*4]
	mov	edx, DWORD PTR -24[rbp]
	movsx	rdi, edx
	movsx	rdx, eax
	imul	rdx, rdi
	lea	rdi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rdi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 1
	movsx	rdx, edx
	mov	edx, DWORD PTR [rdi+rdx*4]
	cmp	esi, edx
	jle	.L4
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 2
	movsx	rdx, edx
	mov	edx, DWORD PTR [rsi+rdx*4]
	jmp	.L5
.L4:
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 1
	movsx	rdx, edx
	mov	edx, DWORD PTR [rsi+rdx*4]
.L5:
	mov	esi, DWORD PTR -24[rbp]
	movsx	rdi, esi
	movsx	rsi, eax
	imul	rsi, rdi
	lea	rdi, 0[0+rsi*4]
	mov	rsi, QWORD PTR -56[rbp]
	add	rdi, rsi
	mov	esi, DWORD PTR -20[rbp]
	movsx	rsi, esi
	mov	esi, DWORD PTR [rdi+rsi*4]
	cmp	edx, esi
	jle	.L6
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 2
	movsx	rdx, edx
	mov	esi, DWORD PTR [rsi+rdx*4]
	mov	edx, DWORD PTR -24[rbp]
	movsx	rdi, edx
	movsx	rdx, eax
	imul	rdx, rdi
	lea	rdi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rdi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 1
	movsx	rdx, edx
	mov	edx, DWORD PTR [rdi+rdx*4]
	cmp	esi, edx
	jle	.L7
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 2
	movsx	rdx, edx
	mov	edx, DWORD PTR [rsi+rdx*4]
	jmp	.L9
.L7:
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 1
	movsx	rdx, edx
	mov	edx, DWORD PTR [rsi+rdx*4]
	jmp	.L9
.L6:
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	movsx	rdx, edx
	mov	edx, DWORD PTR [rsi+rdx*4]
.L9:
	mov	esi, DWORD PTR -24[rbp]
	movsx	rdi, esi
	movsx	rsi, eax
	imul	rsi, rdi
	lea	rdi, 0[0+rsi*4]
	mov	rsi, QWORD PTR -56[rbp]
	add	rdi, rsi
	mov	esi, DWORD PTR -20[rbp]
	add	esi, 1
	movsx	rsi, esi
	mov	esi, DWORD PTR [rdi+rsi*4]
	cmp	edx, esi
	jle	.L10
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 2
	movsx	rdx, edx
	mov	esi, DWORD PTR [rsi+rdx*4]
	mov	edx, DWORD PTR -24[rbp]
	movsx	rdi, edx
	movsx	rdx, eax
	imul	rdx, rdi
	lea	rdi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rdi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 1
	movsx	rdx, edx
	mov	edx, DWORD PTR [rdi+rdx*4]
	cmp	esi, edx
	jle	.L11
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 2
	movsx	rdx, edx
	mov	edx, DWORD PTR [rsi+rdx*4]
	jmp	.L12
.L11:
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 1
	movsx	rdx, edx
	mov	edx, DWORD PTR [rsi+rdx*4]
.L12:
	mov	esi, DWORD PTR -24[rbp]
	movsx	rdi, esi
	movsx	rsi, eax
	imul	rsi, rdi
	lea	rdi, 0[0+rsi*4]
	mov	rsi, QWORD PTR -56[rbp]
	add	rdi, rsi
	mov	esi, DWORD PTR -20[rbp]
	movsx	rsi, esi
	mov	esi, DWORD PTR [rdi+rsi*4]
	cmp	edx, esi
	jle	.L13
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 2
	movsx	rdx, edx
	mov	esi, DWORD PTR [rsi+rdx*4]
	mov	edx, DWORD PTR -24[rbp]
	movsx	rdi, edx
	movsx	rdx, eax
	imul	rdx, rdi
	lea	rdi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rdi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 1
	movsx	rdx, edx
	mov	edx, DWORD PTR [rdi+rdx*4]
	cmp	esi, edx
	jle	.L14
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 2
	movsx	rdx, edx
	mov	edx, DWORD PTR [rsi+rdx*4]
	jmp	.L17
.L14:
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 1
	movsx	rdx, edx
	mov	edx, DWORD PTR [rsi+rdx*4]
	jmp	.L17
.L13:
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	movsx	rdx, edx
	mov	edx, DWORD PTR [rsi+rdx*4]
	jmp	.L17
.L10:
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	add	edx, 1
	movsx	rdx, edx
	mov	edx, DWORD PTR [rsi+rdx*4]
.L17:
	mov	esi, DWORD PTR -24[rbp]
	movsx	rdi, esi
	movsx	rsi, eax
	imul	rsi, rdi
	lea	rdi, 0[0+rsi*4]
	mov	rsi, QWORD PTR -56[rbp]
	add	rdi, rsi
	mov	esi, DWORD PTR -20[rbp]
	add	esi, 2
	movsx	rsi, esi
	mov	esi, DWORD PTR [rdi+rsi*4]
	cmp	edx, esi
	jle	.L18
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 2
	movsx	rdx, edx
	mov	esi, DWORD PTR [rsi+rdx*4]
	mov	edx, DWORD PTR -24[rbp]
	movsx	rdi, edx
	movsx	rdx, eax
	imul	rdx, rdi
	lea	rdi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rdi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 1
	movsx	rdx, edx
	mov	edx, DWORD PTR [rdi+rdx*4]
	cmp	esi, edx
	jle	.L19
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 2
	movsx	rdx, edx
	mov	edx, DWORD PTR [rsi+rdx*4]
	jmp	.L20
.L19:
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 1
	movsx	rdx, edx
	mov	edx, DWORD PTR [rsi+rdx*4]
.L20:
	mov	esi, DWORD PTR -24[rbp]
	movsx	rdi, esi
	movsx	rsi, eax
	imul	rsi, rdi
	lea	rdi, 0[0+rsi*4]
	mov	rsi, QWORD PTR -56[rbp]
	add	rdi, rsi
	mov	esi, DWORD PTR -20[rbp]
	movsx	rsi, esi
	mov	esi, DWORD PTR [rdi+rsi*4]
	cmp	edx, esi
	jle	.L21
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 2
	movsx	rdx, edx
	mov	esi, DWORD PTR [rsi+rdx*4]
	mov	edx, DWORD PTR -24[rbp]
	movsx	rdi, edx
	movsx	rdx, eax
	imul	rdx, rdi
	lea	rdi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rdi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 1
	movsx	rdx, edx
	mov	edx, DWORD PTR [rdi+rdx*4]
	cmp	esi, edx
	jle	.L22
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 2
	movsx	rdx, edx
	mov	edx, DWORD PTR [rsi+rdx*4]
	jmp	.L24
.L22:
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 1
	movsx	rdx, edx
	mov	edx, DWORD PTR [rsi+rdx*4]
	jmp	.L24
.L21:
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	movsx	rdx, edx
	mov	edx, DWORD PTR [rsi+rdx*4]
.L24:
	mov	esi, DWORD PTR -24[rbp]
	movsx	rdi, esi
	movsx	rsi, eax
	imul	rsi, rdi
	lea	rdi, 0[0+rsi*4]
	mov	rsi, QWORD PTR -56[rbp]
	add	rdi, rsi
	mov	esi, DWORD PTR -20[rbp]
	add	esi, 1
	movsx	rsi, esi
	mov	esi, DWORD PTR [rdi+rsi*4]
	cmp	edx, esi
	jle	.L25
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 2
	movsx	rdx, edx
	mov	esi, DWORD PTR [rsi+rdx*4]
	mov	edx, DWORD PTR -24[rbp]
	movsx	rdi, edx
	movsx	rdx, eax
	imul	rdx, rdi
	lea	rdi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rdi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 1
	movsx	rdx, edx
	mov	edx, DWORD PTR [rdi+rdx*4]
	cmp	esi, edx
	jle	.L26
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 2
	movsx	rdx, edx
	mov	edx, DWORD PTR [rsi+rdx*4]
	jmp	.L27
.L26:
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 1
	movsx	rdx, edx
	mov	edx, DWORD PTR [rsi+rdx*4]
.L27:
	mov	esi, DWORD PTR -24[rbp]
	movsx	rdi, esi
	movsx	rsi, eax
	imul	rsi, rdi
	lea	rdi, 0[0+rsi*4]
	mov	rsi, QWORD PTR -56[rbp]
	add	rdi, rsi
	mov	esi, DWORD PTR -20[rbp]
	movsx	rsi, esi
	mov	esi, DWORD PTR [rdi+rsi*4]
	cmp	edx, esi
	jle	.L28
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 2
	movsx	rdx, edx
	mov	esi, DWORD PTR [rsi+rdx*4]
	mov	edx, DWORD PTR -24[rbp]
	movsx	rdi, edx
	movsx	rdx, eax
	imul	rdx, rdi
	lea	rdi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rdi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 1
	movsx	rdx, edx
	mov	edx, DWORD PTR [rdi+rdx*4]
	cmp	esi, edx
	jle	.L29
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 2
	movsx	rdx, edx
	mov	edx, DWORD PTR [rsi+rdx*4]
	jmp	.L33
.L29:
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	sub	edx, 1
	movsx	rdx, edx
	mov	edx, DWORD PTR [rsi+rdx*4]
	jmp	.L33
.L28:
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	movsx	rdx, edx
	mov	edx, DWORD PTR [rsi+rdx*4]
	jmp	.L33
.L25:
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	add	edx, 1
	movsx	rdx, edx
	mov	edx, DWORD PTR [rsi+rdx*4]
	jmp	.L33
.L18:
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	imul	rdx, rsi
	lea	rsi, 0[0+rdx*4]
	mov	rdx, QWORD PTR -56[rbp]
	add	rsi, rdx
	mov	edx, DWORD PTR -20[rbp]
	add	edx, 2
	movsx	rdx, edx
	mov	edx, DWORD PTR [rsi+rdx*4]
.L33:
	mov	esi, DWORD PTR -24[rbp]
	movsx	rdi, esi
	movsx	rsi, ecx
	imul	rsi, rdi
	lea	rdi, 0[0+rsi*4]
	mov	rsi, QWORD PTR -48[rbp]
	add	rdi, rsi
	mov	esi, DWORD PTR -20[rbp]
	sub	esi, 2
	movsx	rsi, esi
	mov	DWORD PTR [rdi+rsi*4], edx
	add	DWORD PTR -20[rbp], 1
.L3:
	mov	edx, DWORD PTR -36[rbp]
	sub	edx, 2
	cmp	DWORD PTR -20[rbp], edx
	jl	.L34
	add	DWORD PTR -24[rbp], 1
.L2:
	mov	edx, DWORD PTR -24[rbp]
	cmp	edx, DWORD PTR -36[rbp]
	jl	.L35
	nop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	runner, .-runner
	.section	.rodata
.LC0:
	.string	"%d\n"
	.text
	.globl	main
	.type	main, @function
main:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r15
	push	r14
	push	r13
	push	r12
	push	rbx
	sub	rsp, 248
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	mov	DWORD PTR -132[rbp], edi
	mov	QWORD PTR -144[rbp], rsi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -56[rbp], rax
	xor	eax, eax
	mov	rax, rsp
	mov	QWORD PTR -264[rbp], rax
	cmp	DWORD PTR -132[rbp], 1
	jle	.L37
	mov	rax, QWORD PTR -144[rbp]
	add	rax, 8
	mov	rax, QWORD PTR [rax]
	mov	rdi, rax
	mov	eax, 0
	call	atoi@PLT
	jmp	.L38
.L37:
	mov	eax, 200
.L38:
	mov	DWORD PTR -108[rbp], eax
	mov	eax, DWORD PTR -108[rbp]
	lea	esi, -4[rax]
	mov	edi, DWORD PTR -108[rbp]
	movsx	rax, esi
	sub	rax, 1
	mov	QWORD PTR -104[rbp], rax
	movsx	rax, esi
	mov	QWORD PTR -256[rbp], rax
	mov	QWORD PTR -248[rbp], 0
	movsx	rax, esi
	lea	rbx, 0[0+rax*4]
	movsx	rax, edi
	sub	rax, 1
	mov	QWORD PTR -96[rbp], rax
	movsx	rax, esi
	mov	r14, rax
	mov	r15d, 0
	movsx	rax, edi
	mov	r12, rax
	mov	r13d, 0
	mov	rdx, r15
	imul	rdx, r12
	mov	rax, r13
	imul	rax, r14
	lea	rcx, [rdx+rax]
	mov	rax, r14
	mul	r12
	add	rcx, rdx
	mov	rdx, rcx
	movsx	rax, esi
	mov	QWORD PTR -160[rbp], rax
	mov	QWORD PTR -152[rbp], 0
	movsx	rax, edi
	mov	QWORD PTR -176[rbp], rax
	mov	QWORD PTR -168[rbp], 0
	mov	r9, QWORD PTR -160[rbp]
	mov	r10, QWORD PTR -152[rbp]
	mov	rdx, r10
	mov	r11, QWORD PTR -176[rbp]
	mov	r12, QWORD PTR -168[rbp]
	imul	rdx, r11
	mov	rax, r12
	imul	rax, r9
	lea	rcx, [rdx+rax]
	mov	rax, r9
	mul	r11
	add	rcx, rdx
	mov	rdx, rcx
	movsx	rdx, esi
	movsx	rax, edi
	imul	rax, rdx
	lea	rdx, 0[0+rax*4]
	mov	eax, 16
	sub	rax, 1
	add	rax, rdx
	mov	esi, 16
	mov	edx, 0
	div	rsi
	imul	rax, rax, 16
	mov	rcx, rax
	and	rcx, -4096
	mov	rdx, rsp
	sub	rdx, rcx
.L39:
	cmp	rsp, rdx
	je	.L40
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	jmp	.L39
.L40:
	mov	rdx, rax
	and	edx, 4095
	sub	rsp, rdx
	mov	rdx, rax
	and	edx, 4095
	test	rdx, rdx
	je	.L41
	and	eax, 4095
	sub	rax, 8
	add	rax, rsp
	or	QWORD PTR [rax], 0
.L41:
	mov	rax, rsp
	add	rax, 3
	shr	rax, 2
	sal	rax, 2
	mov	QWORD PTR -88[rbp], rax
	mov	edi, DWORD PTR -108[rbp]
	mov	r8d, DWORD PTR -108[rbp]
	movsx	rax, edi
	sub	rax, 1
	mov	QWORD PTR -80[rbp], rax
	movsx	rax, edi
	mov	QWORD PTR -288[rbp], rax
	mov	QWORD PTR -280[rbp], 0
	movsx	rax, edi
	lea	rsi, 0[0+rax*4]
	movsx	rax, r8d
	sub	rax, 1
	mov	QWORD PTR -72[rbp], rax
	movsx	rax, edi
	mov	QWORD PTR -192[rbp], rax
	mov	QWORD PTR -184[rbp], 0
	movsx	rax, r8d
	mov	QWORD PTR -208[rbp], rax
	mov	QWORD PTR -200[rbp], 0
	mov	r11, QWORD PTR -192[rbp]
	mov	r12, QWORD PTR -184[rbp]
	mov	rdx, r12
	mov	r14, QWORD PTR -208[rbp]
	mov	r15, QWORD PTR -200[rbp]
	imul	rdx, r14
	mov	rax, r15
	imul	rax, r11
	lea	rcx, [rdx+rax]
	mov	rax, r11
	mul	r14
	add	rcx, rdx
	mov	rdx, rcx
	movsx	rax, edi
	mov	QWORD PTR -224[rbp], rax
	mov	QWORD PTR -216[rbp], 0
	movsx	rax, r8d
	mov	QWORD PTR -240[rbp], rax
	mov	QWORD PTR -232[rbp], 0
	mov	r14, QWORD PTR -224[rbp]
	mov	r15, QWORD PTR -216[rbp]
	mov	rdx, r15
	mov	r9, QWORD PTR -240[rbp]
	mov	r10, QWORD PTR -232[rbp]
	imul	rdx, r9
	mov	rax, r10
	imul	rax, r14
	lea	rcx, [rdx+rax]
	mov	rax, r14
	mul	r9
	add	rcx, rdx
	mov	rdx, rcx
	movsx	rdx, edi
	movsx	rax, r8d
	imul	rax, rdx
	lea	rdx, 0[0+rax*4]
	mov	eax, 16
	sub	rax, 1
	add	rax, rdx
	mov	edi, 16
	mov	edx, 0
	div	rdi
	imul	rax, rax, 16
	mov	rcx, rax
	and	rcx, -4096
	mov	rdx, rsp
	sub	rdx, rcx
.L42:
	cmp	rsp, rdx
	je	.L43
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	jmp	.L42
.L43:
	mov	rdx, rax
	and	edx, 4095
	sub	rsp, rdx
	mov	rdx, rax
	and	edx, 4095
	test	rdx, rdx
	je	.L44
	and	eax, 4095
	sub	rax, 8
	add	rax, rsp
	or	QWORD PTR [rax], 0
.L44:
	mov	rax, rsp
	add	rax, 3
	shr	rax, 2
	sal	rax, 2
	mov	QWORD PTR -64[rbp], rax
	mov	DWORD PTR -116[rbp], 0
	jmp	.L45
.L48:
	mov	DWORD PTR -120[rbp], 0
	jmp	.L46
.L47:
	mov	rcx, rsi
	shr	rcx, 2
	mov	rax, QWORD PTR -64[rbp]
	mov	edx, DWORD PTR -120[rbp]
	movsx	rdi, edx
	mov	edx, DWORD PTR -116[rbp]
	movsx	rdx, edx
	imul	rdx, rcx
	lea	rcx, [rdi+rdx]
	mov	edx, DWORD PTR -120[rbp]
	mov	DWORD PTR [rax+rcx*4], edx
	add	DWORD PTR -120[rbp], 1
.L46:
	mov	eax, DWORD PTR -120[rbp]
	cmp	eax, DWORD PTR -108[rbp]
	jl	.L47
	add	DWORD PTR -116[rbp], 1
.L45:
	mov	eax, DWORD PTR -116[rbp]
	cmp	eax, DWORD PTR -108[rbp]
	jl	.L48
	mov	rdx, QWORD PTR -64[rbp]
	mov	rcx, QWORD PTR -88[rbp]
	mov	eax, DWORD PTR -108[rbp]
	mov	rsi, rcx
	mov	edi, eax
	call	runner
	mov	DWORD PTR -112[rbp], 0
	mov	DWORD PTR -116[rbp], 0
	jmp	.L49
.L52:
	mov	DWORD PTR -120[rbp], 0
	jmp	.L50
.L51:
	mov	rcx, rbx
	shr	rcx, 2
	mov	rax, QWORD PTR -88[rbp]
	mov	edx, DWORD PTR -120[rbp]
	movsx	rsi, edx
	mov	edx, DWORD PTR -116[rbp]
	movsx	rdx, edx
	imul	rdx, rcx
	add	rdx, rsi
	mov	eax, DWORD PTR [rax+rdx*4]
	add	DWORD PTR -112[rbp], eax
	add	DWORD PTR -120[rbp], 1
.L50:
	mov	eax, DWORD PTR -108[rbp]
	sub	eax, 4
	cmp	DWORD PTR -120[rbp], eax
	jl	.L51
	add	DWORD PTR -116[rbp], 1
.L49:
	mov	eax, DWORD PTR -116[rbp]
	cmp	eax, DWORD PTR -108[rbp]
	jl	.L52
	mov	eax, DWORD PTR -112[rbp]
	mov	esi, eax
	lea	rdi, .LC0[rip]
	mov	eax, 0
	call	printf@PLT
	mov	eax, 0
	mov	rsp, QWORD PTR -264[rbp]
	mov	rbx, QWORD PTR -56[rbp]
	sub	rbx, QWORD PTR fs:40
	je	.L54
	call	__stack_chk_fail@PLT
.L54:
	lea	rsp, -40[rbp]
	pop	rbx
	pop	r12
	pop	r13
	pop	r14
	pop	r15
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	main, .-main
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"90145.c"
	.text
	.align	2
	.global	runner
	.syntax unified
	.arm
	.fpu softvfp
	.type	runner, %function
runner:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, fp}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-32]
	str	r1, [fp, #-36]
	str	r2, [fp, #-40]
	ldr	r3, [fp, #-32]
	sub	ip, r3, #4
	sub	r3, ip, #1
	str	r3, [fp, #-20]
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	ldr	r3, [fp, #-32]
	sub	r2, r3, #1
	str	r2, [fp, #-16]
	mov	r2, r3
	mov	r4, r2
	mov	r5, #0
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r5, #5
	orr	r1, r1, r4, lsr #27
	lsl	r0, r4, #5
	mov	r2, #0
	str	r2, [fp, #-28]
	b	.L2
.L35:
	mov	r2, #2
	str	r2, [fp, #-24]
	b	.L3
.L34:
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	sub	r1, r1, #2
	ldr	r1, [r2, r1, lsl #2]
	mov	r0, r3
	ldr	r2, [fp, #-28]
	mul	r2, r0, r2
	lsl	r2, r2, #2
	ldr	r0, [fp, #-40]
	add	r2, r0, r2
	ldr	r0, [fp, #-24]
	sub	r0, r0, #1
	ldr	r2, [r2, r0, lsl #2]
	cmp	r1, r2
	ble	.L4
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	sub	r1, r1, #2
	ldr	r2, [r2, r1, lsl #2]
	b	.L5
.L4:
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	sub	r1, r1, #1
	ldr	r2, [r2, r1, lsl #2]
.L5:
	mov	r0, r3
	ldr	r1, [fp, #-28]
	mul	r1, r0, r1
	lsl	r1, r1, #2
	ldr	r0, [fp, #-40]
	add	r1, r0, r1
	ldr	r0, [fp, #-24]
	ldr	r1, [r1, r0, lsl #2]
	cmp	r2, r1
	ble	.L6
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	sub	r1, r1, #2
	ldr	r1, [r2, r1, lsl #2]
	mov	r0, r3
	ldr	r2, [fp, #-28]
	mul	r2, r0, r2
	lsl	r2, r2, #2
	ldr	r0, [fp, #-40]
	add	r2, r0, r2
	ldr	r0, [fp, #-24]
	sub	r0, r0, #1
	ldr	r2, [r2, r0, lsl #2]
	cmp	r1, r2
	ble	.L7
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	sub	r1, r1, #2
	ldr	r2, [r2, r1, lsl #2]
	b	.L9
.L7:
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	sub	r1, r1, #1
	ldr	r2, [r2, r1, lsl #2]
	b	.L9
.L6:
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	ldr	r2, [r2, r1, lsl #2]
.L9:
	mov	r0, r3
	ldr	r1, [fp, #-28]
	mul	r1, r0, r1
	lsl	r1, r1, #2
	ldr	r0, [fp, #-40]
	add	r1, r0, r1
	ldr	r0, [fp, #-24]
	add	r0, r0, #1
	ldr	r1, [r1, r0, lsl #2]
	cmp	r2, r1
	ble	.L10
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	sub	r1, r1, #2
	ldr	r1, [r2, r1, lsl #2]
	mov	r0, r3
	ldr	r2, [fp, #-28]
	mul	r2, r0, r2
	lsl	r2, r2, #2
	ldr	r0, [fp, #-40]
	add	r2, r0, r2
	ldr	r0, [fp, #-24]
	sub	r0, r0, #1
	ldr	r2, [r2, r0, lsl #2]
	cmp	r1, r2
	ble	.L11
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	sub	r1, r1, #2
	ldr	r2, [r2, r1, lsl #2]
	b	.L12
.L11:
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	sub	r1, r1, #1
	ldr	r2, [r2, r1, lsl #2]
.L12:
	mov	r0, r3
	ldr	r1, [fp, #-28]
	mul	r1, r0, r1
	lsl	r1, r1, #2
	ldr	r0, [fp, #-40]
	add	r1, r0, r1
	ldr	r0, [fp, #-24]
	ldr	r1, [r1, r0, lsl #2]
	cmp	r2, r1
	ble	.L13
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	sub	r1, r1, #2
	ldr	r1, [r2, r1, lsl #2]
	mov	r0, r3
	ldr	r2, [fp, #-28]
	mul	r2, r0, r2
	lsl	r2, r2, #2
	ldr	r0, [fp, #-40]
	add	r2, r0, r2
	ldr	r0, [fp, #-24]
	sub	r0, r0, #1
	ldr	r2, [r2, r0, lsl #2]
	cmp	r1, r2
	ble	.L14
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	sub	r1, r1, #2
	ldr	r2, [r2, r1, lsl #2]
	b	.L17
.L14:
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	sub	r1, r1, #1
	ldr	r2, [r2, r1, lsl #2]
	b	.L17
.L13:
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	ldr	r2, [r2, r1, lsl #2]
	b	.L17
.L10:
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	add	r1, r1, #1
	ldr	r2, [r2, r1, lsl #2]
.L17:
	mov	r0, r3
	ldr	r1, [fp, #-28]
	mul	r1, r0, r1
	lsl	r1, r1, #2
	ldr	r0, [fp, #-40]
	add	r1, r0, r1
	ldr	r0, [fp, #-24]
	add	r0, r0, #2
	ldr	r1, [r1, r0, lsl #2]
	cmp	r2, r1
	ble	.L18
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	sub	r1, r1, #2
	ldr	r1, [r2, r1, lsl #2]
	mov	r0, r3
	ldr	r2, [fp, #-28]
	mul	r2, r0, r2
	lsl	r2, r2, #2
	ldr	r0, [fp, #-40]
	add	r2, r0, r2
	ldr	r0, [fp, #-24]
	sub	r0, r0, #1
	ldr	r2, [r2, r0, lsl #2]
	cmp	r1, r2
	ble	.L19
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	sub	r1, r1, #2
	ldr	r2, [r2, r1, lsl #2]
	b	.L20
.L19:
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	sub	r1, r1, #1
	ldr	r2, [r2, r1, lsl #2]
.L20:
	mov	r0, r3
	ldr	r1, [fp, #-28]
	mul	r1, r0, r1
	lsl	r1, r1, #2
	ldr	r0, [fp, #-40]
	add	r1, r0, r1
	ldr	r0, [fp, #-24]
	ldr	r1, [r1, r0, lsl #2]
	cmp	r2, r1
	ble	.L21
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	sub	r1, r1, #2
	ldr	r1, [r2, r1, lsl #2]
	mov	r0, r3
	ldr	r2, [fp, #-28]
	mul	r2, r0, r2
	lsl	r2, r2, #2
	ldr	r0, [fp, #-40]
	add	r2, r0, r2
	ldr	r0, [fp, #-24]
	sub	r0, r0, #1
	ldr	r2, [r2, r0, lsl #2]
	cmp	r1, r2
	ble	.L22
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	sub	r1, r1, #2
	ldr	r2, [r2, r1, lsl #2]
	b	.L24
.L22:
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	sub	r1, r1, #1
	ldr	r2, [r2, r1, lsl #2]
	b	.L24
.L21:
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	ldr	r2, [r2, r1, lsl #2]
.L24:
	mov	r0, r3
	ldr	r1, [fp, #-28]
	mul	r1, r0, r1
	lsl	r1, r1, #2
	ldr	r0, [fp, #-40]
	add	r1, r0, r1
	ldr	r0, [fp, #-24]
	add	r0, r0, #1
	ldr	r1, [r1, r0, lsl #2]
	cmp	r2, r1
	ble	.L25
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	sub	r1, r1, #2
	ldr	r1, [r2, r1, lsl #2]
	mov	r0, r3
	ldr	r2, [fp, #-28]
	mul	r2, r0, r2
	lsl	r2, r2, #2
	ldr	r0, [fp, #-40]
	add	r2, r0, r2
	ldr	r0, [fp, #-24]
	sub	r0, r0, #1
	ldr	r2, [r2, r0, lsl #2]
	cmp	r1, r2
	ble	.L26
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	sub	r1, r1, #2
	ldr	r2, [r2, r1, lsl #2]
	b	.L27
.L26:
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	sub	r1, r1, #1
	ldr	r2, [r2, r1, lsl #2]
.L27:
	mov	r0, r3
	ldr	r1, [fp, #-28]
	mul	r1, r0, r1
	lsl	r1, r1, #2
	ldr	r0, [fp, #-40]
	add	r1, r0, r1
	ldr	r0, [fp, #-24]
	ldr	r1, [r1, r0, lsl #2]
	cmp	r2, r1
	ble	.L28
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	sub	r1, r1, #2
	ldr	r1, [r2, r1, lsl #2]
	mov	r0, r3
	ldr	r2, [fp, #-28]
	mul	r2, r0, r2
	lsl	r2, r2, #2
	ldr	r0, [fp, #-40]
	add	r2, r0, r2
	ldr	r0, [fp, #-24]
	sub	r0, r0, #1
	ldr	r2, [r2, r0, lsl #2]
	cmp	r1, r2
	ble	.L29
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	sub	r1, r1, #2
	ldr	r2, [r2, r1, lsl #2]
	b	.L33
.L29:
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	sub	r1, r1, #1
	ldr	r2, [r2, r1, lsl #2]
	b	.L33
.L28:
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	ldr	r2, [r2, r1, lsl #2]
	b	.L33
.L25:
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	add	r1, r1, #1
	ldr	r2, [r2, r1, lsl #2]
	b	.L33
.L18:
	mov	r1, r3
	ldr	r2, [fp, #-28]
	mul	r2, r1, r2
	lsl	r2, r2, #2
	ldr	r1, [fp, #-40]
	add	r2, r1, r2
	ldr	r1, [fp, #-24]
	add	r1, r1, #2
	ldr	r2, [r2, r1, lsl #2]
.L33:
	mov	r0, ip
	ldr	r1, [fp, #-28]
	mul	r1, r0, r1
	lsl	r1, r1, #2
	ldr	r0, [fp, #-36]
	add	r1, r0, r1
	ldr	r0, [fp, #-24]
	sub	r0, r0, #2
	str	r2, [r1, r0, lsl #2]
	ldr	r2, [fp, #-24]
	add	r2, r2, #1
	str	r2, [fp, #-24]
.L3:
	ldr	r2, [fp, #-32]
	sub	r2, r2, #2
	ldr	r1, [fp, #-24]
	cmp	r1, r2
	blt	.L34
	ldr	r2, [fp, #-28]
	add	r2, r2, #1
	str	r2, [fp, #-28]
.L2:
	ldr	r1, [fp, #-28]
	ldr	r2, [fp, #-32]
	cmp	r1, r2
	blt	.L35
	nop
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, r5, fp}
	bx	lr
	.size	runner, .-runner
	.section	.rodata
	.align	2
.LC0:
	.ascii	"%d\012\000"
	.align	2
.LC1:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 56
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #56
	str	r0, [fp, #-80]
	str	r1, [fp, #-84]
	ldr	r3, .L49
	ldr	r3, [r3]
	str	r3, [fp, #-32]
	mov	r3,#0
	mov	r3, sp
	mov	r9, r3
	ldr	r3, [fp, #-80]
	cmp	r3, #1
	ble	.L37
	ldr	r3, [fp, #-84]
	add	r3, r3, #4
	ldr	r3, [r3]
	mov	r0, r3
	bl	atoi
	mov	r3, r0
	b	.L38
.L37:
	mov	r3, #200
.L38:
	str	r3, [fp, #-60]
	ldr	r3, [fp, #-60]
	sub	ip, r3, #4
	ldr	lr, [fp, #-60]
	sub	r3, ip, #1
	str	r3, [fp, #-56]
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	lsl	r6, r3, #2
	sub	r3, lr, #1
	str	r3, [fp, #-52]
	mov	r3, ip
	mov	r4, r3
	mov	r5, #0
	mov	r3, lr
	mov	r0, r3
	mov	r1, #0
	mul	r2, r0, r5
	mul	r3, r4, r1
	add	r7, r2, r3
	umull	r2, r3, r4, r0
	add	r1, r7, r3
	mov	r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #5
	orr	r1, r1, r2, lsr #27
	lsl	r0, r2, #5
	mov	r3, ip
	mov	r4, r3
	mov	r5, #0
	mov	r3, lr
	mov	r0, r3
	mov	r1, #0
	mul	r2, r0, r5
	mul	r3, r4, r1
	add	r7, r2, r3
	umull	r2, r3, r4, r0
	add	r1, r7, r3
	mov	r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #5
	orr	r1, r1, r2, lsr #27
	lsl	r0, r2, #5
	mov	r3, ip
	mov	r2, lr
	mul	r3, r2, r3
	lsl	r3, r3, #2
	add	r3, r3, #7
	lsr	r3, r3, #3
	lsl	r3, r3, #3
	sub	sp, sp, r3
	mov	r3, sp
	add	r3, r3, #3
	lsr	r3, r3, #2
	lsl	r3, r3, #2
	str	r3, [fp, #-48]
	ldr	ip, [fp, #-60]
	ldr	lr, [fp, #-60]
	sub	r3, ip, #1
	str	r3, [fp, #-44]
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	lsl	r7, r3, #2
	sub	r3, lr, #1
	str	r3, [fp, #-40]
	mov	r3, ip
	mov	r4, r3
	mov	r5, #0
	mov	r3, lr
	mov	r0, r3
	mov	r1, #0
	mul	r2, r0, r5
	mul	r3, r4, r1
	add	r8, r2, r3
	umull	r2, r3, r4, r0
	add	r1, r8, r3
	mov	r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #5
	orr	r1, r1, r2, lsr #27
	lsl	r0, r2, #5
	mov	r3, ip
	mov	r4, r3
	mov	r5, #0
	mov	r3, lr
	mov	r0, r3
	mov	r1, #0
	mul	r2, r0, r5
	mul	r3, r4, r1
	add	r8, r2, r3
	umull	r2, r3, r4, r0
	add	r1, r8, r3
	mov	r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #5
	orr	r1, r1, r2, lsr #27
	lsl	r0, r2, #5
	mov	r3, ip
	mov	r2, lr
	mul	r3, r2, r3
	lsl	r3, r3, #2
	add	r3, r3, #7
	lsr	r3, r3, #3
	lsl	r3, r3, #3
	sub	sp, sp, r3
	mov	r3, sp
	add	r3, r3, #3
	lsr	r3, r3, #2
	lsl	r3, r3, #2
	str	r3, [fp, #-36]
	mov	r3, #0
	str	r3, [fp, #-68]
	b	.L39
.L42:
	mov	r3, #0
	str	r3, [fp, #-72]
	b	.L40
.L41:
	lsr	r2, r7, #2
	ldr	r3, [fp, #-36]
	ldr	r1, [fp, #-68]
	mul	r1, r2, r1
	ldr	r2, [fp, #-72]
	add	r2, r1, r2
	ldr	r1, [fp, #-72]
	str	r1, [r3, r2, lsl #2]
	ldr	r3, [fp, #-72]
	add	r3, r3, #1
	str	r3, [fp, #-72]
.L40:
	ldr	r2, [fp, #-72]
	ldr	r3, [fp, #-60]
	cmp	r2, r3
	blt	.L41
	ldr	r3, [fp, #-68]
	add	r3, r3, #1
	str	r3, [fp, #-68]
.L39:
	ldr	r2, [fp, #-68]
	ldr	r3, [fp, #-60]
	cmp	r2, r3
	blt	.L42
	ldr	r2, [fp, #-36]
	ldr	r1, [fp, #-48]
	ldr	r0, [fp, #-60]
	bl	runner
	mov	r3, #0
	str	r3, [fp, #-64]
	mov	r3, #0
	str	r3, [fp, #-68]
	b	.L43
.L46:
	mov	r3, #0
	str	r3, [fp, #-72]
	b	.L44
.L45:
	lsr	r2, r6, #2
	ldr	r3, [fp, #-48]
	ldr	r1, [fp, #-68]
	mul	r1, r2, r1
	ldr	r2, [fp, #-72]
	add	r2, r1, r2
	ldr	r3, [r3, r2, lsl #2]
	ldr	r2, [fp, #-64]
	add	r3, r2, r3
	str	r3, [fp, #-64]
	ldr	r3, [fp, #-72]
	add	r3, r3, #1
	str	r3, [fp, #-72]
.L44:
	ldr	r3, [fp, #-60]
	sub	r3, r3, #4
	ldr	r2, [fp, #-72]
	cmp	r2, r3
	blt	.L45
	ldr	r3, [fp, #-68]
	add	r3, r3, #1
	str	r3, [fp, #-68]
.L43:
	ldr	r2, [fp, #-68]
	ldr	r3, [fp, #-60]
	cmp	r2, r3
	blt	.L46
	ldr	r1, [fp, #-64]
	ldr	r0, .L49+4
	bl	printf
	mov	r3, #0
	mov	sp, r9
	ldr	r2, .L49
	ldr	r1, [r2]
	ldr	r2, [fp, #-32]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L48
	bl	__stack_chk_fail
.L48:
	mov	r0, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L50:
	.align	2
.L49:
	.word	.LC1
	.word	.LC0
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
