	.file	"161079987.c"
	.intel_syntax noprefix
	.text
	.globl	flags
	.bss
	.align 8
	.type	flags, @object
	.size	flags, 8
flags:
	.zero	8
	.text
	.globl	break1
	.type	break1, @function
break1:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	break1, .-break1
	.globl	break2
	.type	break2, @function
break2:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	break2, .-break2
	.globl	break3
	.type	break3, @function
break3:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	break3, .-break3
	.globl	break4
	.type	break4, @function
break4:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	break4, .-break4
	.globl	break5
	.type	break5, @function
break5:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	break5, .-break5
	.globl	break6
	.type	break6, @function
break6:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	break6, .-break6
	.globl	break7
	.type	break7, @function
break7:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	break7, .-break7
	.globl	break8
	.type	break8, @function
break8:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	break8, .-break8
	.globl	break9
	.type	break9, @function
break9:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	break9, .-break9
	.globl	break10
	.type	break10, @function
break10:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	break10, .-break10
	.globl	i
	.bss
	.align 4
	.type	i, @object
	.size	i, 4
i:
	.zero	4
	.text
	.globl	main
	.type	main, @function
main:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR flags[rip], 1
	mov	eax, 0
	call	break1
	mov	BYTE PTR flags[rip], 0
	movzx	eax, BYTE PTR flags[rip+1]
	or	eax, 1
	mov	BYTE PTR flags[rip+1], al
	mov	eax, 0
	call	break1
	movzx	eax, BYTE PTR flags[rip+1]
	and	eax, -2
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+1]
	or	eax, 2
	mov	BYTE PTR flags[rip+1], al
	mov	eax, 0
	call	break1
	movzx	eax, BYTE PTR flags[rip+1]
	and	eax, -3
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+1]
	and	eax, -13
	or	eax, 4
	mov	BYTE PTR flags[rip+1], al
	mov	eax, 0
	call	break1
	movzx	eax, BYTE PTR flags[rip+1]
	and	eax, -13
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+1]
	and	eax, -49
	or	eax, 16
	mov	BYTE PTR flags[rip+1], al
	mov	eax, 0
	call	break1
	movzx	eax, BYTE PTR flags[rip+1]
	and	eax, -49
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+1]
	and	eax, 63
	or	eax, 64
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+2]
	and	eax, -2
	mov	BYTE PTR flags[rip+2], al
	mov	eax, 0
	call	break1
	movzx	eax, BYTE PTR flags[rip+1]
	and	eax, 63
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+2]
	and	eax, -2
	mov	BYTE PTR flags[rip+2], al
	movzx	eax, BYTE PTR flags[rip+2]
	and	eax, -15
	or	eax, 2
	mov	BYTE PTR flags[rip+2], al
	mov	eax, 0
	call	break1
	movzx	eax, BYTE PTR flags[rip+2]
	and	eax, -15
	mov	BYTE PTR flags[rip+2], al
	movzx	eax, BYTE PTR flags[rip+2]
	and	eax, 15
	or	eax, 16
	mov	BYTE PTR flags[rip+2], al
	movzx	eax, BYTE PTR flags[rip+3]
	and	eax, -32
	mov	BYTE PTR flags[rip+3], al
	mov	eax, 0
	call	break1
	movzx	eax, BYTE PTR flags[rip+2]
	and	eax, 15
	mov	BYTE PTR flags[rip+2], al
	movzx	eax, BYTE PTR flags[rip+3]
	and	eax, -32
	mov	BYTE PTR flags[rip+3], al
	movzx	eax, BYTE PTR flags[rip+4]
	and	eax, 0
	or	eax, 1
	mov	BYTE PTR flags[rip+4], al
	movzx	eax, BYTE PTR flags[rip+5]
	and	eax, -2
	mov	BYTE PTR flags[rip+5], al
	mov	eax, 0
	call	break1
	movzx	eax, BYTE PTR flags[rip+4]
	and	eax, 0
	mov	BYTE PTR flags[rip+4], al
	movzx	eax, BYTE PTR flags[rip+5]
	and	eax, -2
	mov	BYTE PTR flags[rip+5], al
	mov	BYTE PTR flags[rip+6], 1
	mov	eax, 0
	call	break1
	mov	BYTE PTR flags[rip+6], 0
	mov	BYTE PTR flags[rip], -1
	movzx	eax, BYTE PTR flags[rip+1]
	or	eax, 2
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+1]
	or	eax, 48
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+2]
	or	eax, 14
	mov	BYTE PTR flags[rip+2], al
	movzx	eax, BYTE PTR flags[rip+4]
	or	eax, -1
	mov	BYTE PTR flags[rip+4], al
	movzx	eax, BYTE PTR flags[rip+5]
	or	eax, 1
	mov	BYTE PTR flags[rip+5], al
	mov	eax, 0
	call	break2
	mov	BYTE PTR flags[rip], 0
	movzx	eax, BYTE PTR flags[rip+1]
	and	eax, -3
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+1]
	and	eax, -49
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+2]
	and	eax, -15
	mov	BYTE PTR flags[rip+2], al
	movzx	eax, BYTE PTR flags[rip+4]
	and	eax, 0
	mov	BYTE PTR flags[rip+4], al
	movzx	eax, BYTE PTR flags[rip+5]
	and	eax, -2
	mov	BYTE PTR flags[rip+5], al
	movzx	eax, BYTE PTR flags[rip+1]
	or	eax, 1
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+1]
	or	eax, 12
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+1]
	or	eax, -64
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+2]
	or	eax, 1
	mov	BYTE PTR flags[rip+2], al
	movzx	eax, BYTE PTR flags[rip+2]
	or	eax, -16
	mov	BYTE PTR flags[rip+2], al
	movzx	eax, BYTE PTR flags[rip+3]
	or	eax, 31
	mov	BYTE PTR flags[rip+3], al
	mov	BYTE PTR flags[rip+6], -1
	mov	eax, 0
	call	break2
	movzx	eax, BYTE PTR flags[rip+1]
	and	eax, -2
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+1]
	and	eax, -13
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+1]
	and	eax, 63
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+2]
	and	eax, -2
	mov	BYTE PTR flags[rip+2], al
	movzx	eax, BYTE PTR flags[rip+2]
	and	eax, 15
	mov	BYTE PTR flags[rip+2], al
	movzx	eax, BYTE PTR flags[rip+3]
	and	eax, -32
	mov	BYTE PTR flags[rip+3], al
	mov	BYTE PTR flags[rip+6], 0
	movzx	eax, BYTE PTR flags[rip+1]
	or	eax, 2
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+1]
	or	eax, 48
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+2]
	or	eax, 14
	mov	BYTE PTR flags[rip+2], al
	movzx	eax, BYTE PTR flags[rip+4]
	or	eax, -1
	mov	BYTE PTR flags[rip+4], al
	movzx	eax, BYTE PTR flags[rip+5]
	or	eax, 1
	mov	BYTE PTR flags[rip+5], al
	mov	eax, 0
	call	break3
	movzx	eax, BYTE PTR flags[rip+1]
	and	eax, -3
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+1]
	and	eax, -49
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+2]
	and	eax, -15
	mov	BYTE PTR flags[rip+2], al
	movzx	eax, BYTE PTR flags[rip+4]
	and	eax, 0
	mov	BYTE PTR flags[rip+4], al
	movzx	eax, BYTE PTR flags[rip+5]
	and	eax, -2
	mov	BYTE PTR flags[rip+5], al
	movzx	eax, BYTE PTR flags[rip+1]
	and	eax, -2
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+1]
	and	eax, -13
	or	eax, 4
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+1]
	or	eax, -64
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+2]
	and	eax, -2
	mov	BYTE PTR flags[rip+2], al
	movzx	eax, BYTE PTR flags[rip+2]
	or	eax, -16
	mov	BYTE PTR flags[rip+2], al
	movzx	eax, BYTE PTR flags[rip+3]
	and	eax, -32
	or	eax, 15
	mov	BYTE PTR flags[rip+3], al
	mov	eax, 0
	call	break4
	movzx	eax, BYTE PTR flags[rip+1]
	or	eax, 1
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+1]
	and	eax, -13
	or	eax, 8
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+1]
	and	eax, 63
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+2]
	or	eax, 1
	mov	BYTE PTR flags[rip+2], al
	movzx	eax, BYTE PTR flags[rip+2]
	and	eax, 15
	mov	BYTE PTR flags[rip+2], al
	movzx	eax, BYTE PTR flags[rip+3]
	and	eax, -32
	or	eax, 16
	mov	BYTE PTR flags[rip+3], al
	movzx	eax, WORD PTR flags[rip+2]
	sal	eax, 3
	sar	ax, 7
	cwde
	mov	DWORD PTR i[rip], eax
	mov	eax, 0
	call	break4
	movzx	eax, BYTE PTR flags[rip+1]
	or	eax, 1
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+1]
	or	eax, 12
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+1]
	or	eax, -64
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+2]
	or	eax, 1
	mov	BYTE PTR flags[rip+2], al
	movzx	eax, BYTE PTR flags[rip+2]
	or	eax, -16
	mov	BYTE PTR flags[rip+2], al
	movzx	eax, BYTE PTR flags[rip+3]
	or	eax, 31
	mov	BYTE PTR flags[rip+3], al
	mov	eax, 0
	call	break4
	movzx	eax, BYTE PTR flags[rip+1]
	and	eax, -2
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+1]
	and	eax, -13
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+1]
	and	eax, 63
	mov	BYTE PTR flags[rip+1], al
	movzx	eax, BYTE PTR flags[rip+2]
	and	eax, -2
	mov	BYTE PTR flags[rip+2], al
	movzx	eax, BYTE PTR flags[rip+2]
	and	eax, 15
	mov	BYTE PTR flags[rip+2], al
	movzx	eax, BYTE PTR flags[rip+3]
	and	eax, -32
	mov	BYTE PTR flags[rip+3], al
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	main, .-main
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"161079987.c"
	.text
	.comm	flags,8,4
	.align	2
	.global	break1
	.syntax unified
	.arm
	.fpu softvfp
	.type	break1, %function
break1:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	break1, .-break1
	.align	2
	.global	break2
	.syntax unified
	.arm
	.fpu softvfp
	.type	break2, %function
break2:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	break2, .-break2
	.align	2
	.global	break3
	.syntax unified
	.arm
	.fpu softvfp
	.type	break3, %function
break3:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	break3, .-break3
	.align	2
	.global	break4
	.syntax unified
	.arm
	.fpu softvfp
	.type	break4, %function
break4:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	break4, .-break4
	.align	2
	.global	break5
	.syntax unified
	.arm
	.fpu softvfp
	.type	break5, %function
break5:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	break5, .-break5
	.align	2
	.global	break6
	.syntax unified
	.arm
	.fpu softvfp
	.type	break6, %function
break6:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	break6, .-break6
	.align	2
	.global	break7
	.syntax unified
	.arm
	.fpu softvfp
	.type	break7, %function
break7:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	break7, .-break7
	.align	2
	.global	break8
	.syntax unified
	.arm
	.fpu softvfp
	.type	break8, %function
break8:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	break8, .-break8
	.align	2
	.global	break9
	.syntax unified
	.arm
	.fpu softvfp
	.type	break9, %function
break9:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	break9, .-break9
	.align	2
	.global	break10
	.syntax unified
	.arm
	.fpu softvfp
	.type	break10, %function
break10:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	break10, .-break10
	.comm	i,4,4
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L13
	mov	r2, #1
	strb	r2, [r3]
	bl	break1
	ldr	r3, .L13
	mov	r2, #0
	strb	r2, [r3]
	ldr	r2, .L13
	ldrb	r3, [r2, #1]
	orr	r3, r3, #1
	strb	r3, [r2, #1]
	bl	break1
	ldr	r2, .L13
	ldrb	r3, [r2, #1]
	bic	r3, r3, #1
	strb	r3, [r2, #1]
	ldr	r2, .L13
	ldrb	r3, [r2, #1]
	orr	r3, r3, #2
	strb	r3, [r2, #1]
	bl	break1
	ldr	r2, .L13
	ldrb	r3, [r2, #1]
	bic	r3, r3, #2
	strb	r3, [r2, #1]
	ldr	r2, .L13
	ldrb	r3, [r2, #1]
	bic	r3, r3, #8
	orr	r3, r3, #4
	strb	r3, [r2, #1]
	bl	break1
	ldr	r2, .L13
	ldrb	r3, [r2, #1]
	bic	r3, r3, #12
	strb	r3, [r2, #1]
	ldr	r2, .L13
	ldrb	r3, [r2, #1]
	bic	r3, r3, #32
	orr	r3, r3, #16
	strb	r3, [r2, #1]
	bl	break1
	ldr	r2, .L13
	ldrb	r3, [r2, #1]
	bic	r3, r3, #48
	strb	r3, [r2, #1]
	ldr	r3, .L13
	ldrb	r2, [r3, #1]
	and	r2, r2, #63
	orr	r2, r2, #64
	strb	r2, [r3, #1]
	ldrb	r2, [r3, #2]
	bic	r2, r2, #1
	strb	r2, [r3, #2]
	bl	break1
	ldr	r3, .L13
	ldrb	r2, [r3, #1]
	and	r2, r2, #63
	strb	r2, [r3, #1]
	ldrb	r2, [r3, #2]
	bic	r2, r2, #1
	strb	r2, [r3, #2]
	ldr	r2, .L13
	ldrb	r3, [r2, #2]
	bic	r3, r3, #12
	orr	r3, r3, #2
	strb	r3, [r2, #2]
	bl	break1
	ldr	r2, .L13
	ldrb	r3, [r2, #2]
	bic	r3, r3, #14
	strb	r3, [r2, #2]
	ldr	r3, .L13
	ldrb	r2, [r3, #2]
	and	r2, r2, #15
	orr	r2, r2, #16
	strb	r2, [r3, #2]
	ldrb	r2, [r3, #3]
	bic	r2, r2, #31
	strb	r2, [r3, #3]
	bl	break1
	ldr	r3, .L13
	ldrb	r2, [r3, #2]
	and	r2, r2, #15
	strb	r2, [r3, #2]
	ldrb	r2, [r3, #3]
	bic	r2, r2, #31
	strb	r2, [r3, #3]
	ldr	r3, .L13
	mov	r2, #0
	orr	r2, r2, #1
	strb	r2, [r3, #4]
	ldrb	r2, [r3, #5]
	bic	r2, r2, #1
	strb	r2, [r3, #5]
	bl	break1
	ldr	r3, .L13
	mov	r2, #0
	strb	r2, [r3, #4]
	ldrb	r2, [r3, #5]
	bic	r2, r2, #1
	strb	r2, [r3, #5]
	ldr	r3, .L13
	mov	r2, #1
	strb	r2, [r3, #6]
	bl	break1
	ldr	r3, .L13
	mov	r2, #0
	strb	r2, [r3, #6]
	ldr	r3, .L13
	mvn	r2, #0
	strb	r2, [r3]
	ldr	r2, .L13
	ldrb	r3, [r2, #1]
	orr	r3, r3, #2
	strb	r3, [r2, #1]
	ldr	r2, .L13
	ldrb	r3, [r2, #1]
	orr	r3, r3, #48
	strb	r3, [r2, #1]
	ldr	r2, .L13
	ldrb	r3, [r2, #2]
	orr	r3, r3, #14
	strb	r3, [r2, #2]
	ldr	r3, .L13
	mvn	r2, #0
	strb	r2, [r3, #4]
	ldrb	r2, [r3, #5]
	orr	r2, r2, #1
	strb	r2, [r3, #5]
	bl	break2
	ldr	r3, .L13
	mov	r2, #0
	strb	r2, [r3]
	ldr	r2, .L13
	ldrb	r3, [r2, #1]
	bic	r3, r3, #2
	strb	r3, [r2, #1]
	ldr	r2, .L13
	ldrb	r3, [r2, #1]
	bic	r3, r3, #48
	strb	r3, [r2, #1]
	ldr	r2, .L13
	ldrb	r3, [r2, #2]
	bic	r3, r3, #14
	strb	r3, [r2, #2]
	ldr	r3, .L13
	mov	r2, #0
	strb	r2, [r3, #4]
	ldrb	r2, [r3, #5]
	bic	r2, r2, #1
	strb	r2, [r3, #5]
	ldr	r2, .L13
	ldrb	r3, [r2, #1]
	orr	r3, r3, #1
	strb	r3, [r2, #1]
	ldr	r2, .L13
	ldrb	r3, [r2, #1]
	orr	r3, r3, #12
	strb	r3, [r2, #1]
	ldr	r3, .L13
	ldrb	r2, [r3, #1]
	mvn	r2, r2, lsl #26
	mvn	r2, r2, lsr #26
	strb	r2, [r3, #1]
	ldrb	r2, [r3, #2]
	orr	r2, r2, #1
	strb	r2, [r3, #2]
	ldr	r3, .L13
	ldrb	r2, [r3, #2]
	mvn	r2, r2, lsl #28
	mvn	r2, r2, lsr #28
	strb	r2, [r3, #2]
	ldrb	r2, [r3, #3]
	orr	r2, r2, #31
	strb	r2, [r3, #3]
	ldr	r3, .L13
	mvn	r2, #0
	strb	r2, [r3, #6]
	bl	break2
	ldr	r2, .L13
	ldrb	r3, [r2, #1]
	bic	r3, r3, #1
	strb	r3, [r2, #1]
	ldr	r2, .L13
	ldrb	r3, [r2, #1]
	bic	r3, r3, #12
	strb	r3, [r2, #1]
	ldr	r3, .L13
	ldrb	r2, [r3, #1]
	and	r2, r2, #63
	strb	r2, [r3, #1]
	ldrb	r2, [r3, #2]
	bic	r2, r2, #1
	strb	r2, [r3, #2]
	ldr	r3, .L13
	ldrb	r2, [r3, #2]
	and	r2, r2, #15
	strb	r2, [r3, #2]
	ldrb	r2, [r3, #3]
	bic	r2, r2, #31
	strb	r2, [r3, #3]
	ldr	r3, .L13
	mov	r2, #0
	strb	r2, [r3, #6]
	ldr	r2, .L13
	ldrb	r3, [r2, #1]
	orr	r3, r3, #2
	strb	r3, [r2, #1]
	ldr	r2, .L13
	ldrb	r3, [r2, #1]
	orr	r3, r3, #48
	strb	r3, [r2, #1]
	ldr	r2, .L13
	ldrb	r3, [r2, #2]
	orr	r3, r3, #14
	strb	r3, [r2, #2]
	ldr	r3, .L13
	mvn	r2, #0
	strb	r2, [r3, #4]
	ldrb	r2, [r3, #5]
	orr	r2, r2, #1
	strb	r2, [r3, #5]
	bl	break3
	ldr	r2, .L13
	ldrb	r3, [r2, #1]
	bic	r3, r3, #2
	strb	r3, [r2, #1]
	ldr	r2, .L13
	ldrb	r3, [r2, #1]
	bic	r3, r3, #48
	strb	r3, [r2, #1]
	ldr	r2, .L13
	ldrb	r3, [r2, #2]
	bic	r3, r3, #14
	strb	r3, [r2, #2]
	ldr	r3, .L13
	mov	r2, #0
	strb	r2, [r3, #4]
	ldrb	r2, [r3, #5]
	bic	r2, r2, #1
	strb	r2, [r3, #5]
	ldr	r2, .L13
	ldrb	r3, [r2, #1]
	bic	r3, r3, #1
	strb	r3, [r2, #1]
	ldr	r2, .L13
	ldrb	r3, [r2, #1]
	bic	r3, r3, #8
	orr	r3, r3, #4
	strb	r3, [r2, #1]
	ldr	r3, .L13
	ldrb	r2, [r3, #1]
	mvn	r2, r2, lsl #26
	mvn	r2, r2, lsr #26
	strb	r2, [r3, #1]
	ldrb	r2, [r3, #2]
	bic	r2, r2, #1
	strb	r2, [r3, #2]
	ldr	r3, .L13
	ldrb	r2, [r3, #2]
	mvn	r2, r2, lsl #28
	mvn	r2, r2, lsr #28
	strb	r2, [r3, #2]
	ldrb	r2, [r3, #3]
	bic	r2, r2, #31
	orr	r2, r2, #15
	strb	r2, [r3, #3]
	bl	break4
	ldr	r2, .L13
	ldrb	r3, [r2, #1]
	orr	r3, r3, #1
	strb	r3, [r2, #1]
	ldr	r2, .L13
	ldrb	r3, [r2, #1]
	bic	r3, r3, #4
	orr	r3, r3, #8
	strb	r3, [r2, #1]
	ldr	r3, .L13
	ldrb	r2, [r3, #1]
	and	r2, r2, #63
	strb	r2, [r3, #1]
	ldrb	r2, [r3, #2]
	orr	r2, r2, #1
	strb	r2, [r3, #2]
	ldr	r3, .L13
	ldrb	r2, [r3, #2]
	and	r2, r2, #15
	strb	r2, [r3, #2]
	ldrb	r2, [r3, #3]
	bic	r2, r2, #31
	orr	r2, r2, #16
	strb	r2, [r3, #3]
	ldr	r3, .L13
	ldrh	r3, [r3, #2]	@ movhi
	lsl	r3, r3, #3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	asr	r3, r3, #7
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r2, r3
	ldr	r3, .L13+4
	str	r2, [r3]
	bl	break4
	ldr	r2, .L13
	ldrb	r3, [r2, #1]
	orr	r3, r3, #1
	strb	r3, [r2, #1]
	ldr	r2, .L13
	ldrb	r3, [r2, #1]
	orr	r3, r3, #12
	strb	r3, [r2, #1]
	ldr	r3, .L13
	ldrb	r2, [r3, #1]
	mvn	r2, r2, lsl #26
	mvn	r2, r2, lsr #26
	strb	r2, [r3, #1]
	ldrb	r2, [r3, #2]
	orr	r2, r2, #1
	strb	r2, [r3, #2]
	ldr	r3, .L13
	ldrb	r2, [r3, #2]
	mvn	r2, r2, lsl #28
	mvn	r2, r2, lsr #28
	strb	r2, [r3, #2]
	ldrb	r2, [r3, #3]
	orr	r2, r2, #31
	strb	r2, [r3, #3]
	bl	break4
	ldr	r2, .L13
	ldrb	r3, [r2, #1]
	bic	r3, r3, #1
	strb	r3, [r2, #1]
	ldr	r2, .L13
	ldrb	r3, [r2, #1]
	bic	r3, r3, #12
	strb	r3, [r2, #1]
	ldr	r3, .L13
	ldrb	r2, [r3, #1]
	and	r2, r2, #63
	strb	r2, [r3, #1]
	ldrb	r2, [r3, #2]
	bic	r2, r2, #1
	strb	r2, [r3, #2]
	ldr	r3, .L13
	ldrb	r2, [r3, #2]
	and	r2, r2, #15
	strb	r2, [r3, #2]
	ldrb	r2, [r3, #3]
	bic	r2, r2, #31
	strb	r2, [r3, #3]
	mov	r3, #0
	mov	r0, r3
	pop	{fp, pc}
.L14:
	.align	2
.L13:
	.word	flags
	.word	i
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
