	.file	"117327952.c"
	.intel_syntax noprefix
	.text
	.globl	__VERIFIER_nondet_bool
	.type	__VERIFIER_nondet_bool, @function
__VERIFIER_nondet_bool:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	__VERIFIER_nondet_int@PLT
	test	eax, eax
	setne	al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	__VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
	.globl	s12_z
	.bss
	.align 4
	.type	s12_z, @object
	.size	s12_z, 4
s12_z:
	.zero	4
	.globl	_x_s12_z
	.align 4
	.type	_x_s12_z, @object
	.size	_x_s12_z, 4
_x_s12_z:
	.zero	4
	.globl	s12_y
	.align 4
	.type	s12_y, @object
	.size	s12_y, 4
s12_y:
	.zero	4
	.globl	_x_s12_y
	.align 4
	.type	_x_s12_y, @object
	.size	_x_s12_y, 4
_x_s12_y:
	.zero	4
	.globl	s12_x
	.align 4
	.type	s12_x, @object
	.size	s12_x, 4
s12_x:
	.zero	4
	.globl	_x_s12_x
	.align 4
	.type	_x_s12_x, @object
	.size	_x_s12_x, 4
_x_s12_x:
	.zero	4
	.globl	s11_z
	.align 4
	.type	s11_z, @object
	.size	s11_z, 4
s11_z:
	.zero	4
	.globl	_x_s11_z
	.align 4
	.type	_x_s11_z, @object
	.size	_x_s11_z, 4
_x_s11_z:
	.zero	4
	.globl	s11_y
	.align 4
	.type	s11_y, @object
	.size	s11_y, 4
s11_y:
	.zero	4
	.globl	_x_s11_y
	.align 4
	.type	_x_s11_y, @object
	.size	_x_s11_y, 4
_x_s11_y:
	.zero	4
	.globl	s11_x
	.align 4
	.type	s11_x, @object
	.size	s11_x, 4
s11_x:
	.zero	4
	.globl	_x_s11_x
	.align 4
	.type	_x_s11_x, @object
	.size	_x_s11_x, 4
_x_s11_x:
	.zero	4
	.globl	s10_z
	.align 4
	.type	s10_z, @object
	.size	s10_z, 4
s10_z:
	.zero	4
	.globl	_x_s10_z
	.align 4
	.type	_x_s10_z, @object
	.size	_x_s10_z, 4
_x_s10_z:
	.zero	4
	.globl	s10_y
	.align 4
	.type	s10_y, @object
	.size	s10_y, 4
s10_y:
	.zero	4
	.globl	_x_s10_y
	.align 4
	.type	_x_s10_y, @object
	.size	_x_s10_y, 4
_x_s10_y:
	.zero	4
	.globl	s10_x
	.align 4
	.type	s10_x, @object
	.size	s10_x, 4
s10_x:
	.zero	4
	.globl	_x_s10_x
	.align 4
	.type	_x_s10_x, @object
	.size	_x_s10_x, 4
_x_s10_x:
	.zero	4
	.globl	s9_z
	.align 4
	.type	s9_z, @object
	.size	s9_z, 4
s9_z:
	.zero	4
	.globl	_x_s9_z
	.align 4
	.type	_x_s9_z, @object
	.size	_x_s9_z, 4
_x_s9_z:
	.zero	4
	.globl	s9_y
	.align 4
	.type	s9_y, @object
	.size	s9_y, 4
s9_y:
	.zero	4
	.globl	_x_s9_y
	.align 4
	.type	_x_s9_y, @object
	.size	_x_s9_y, 4
_x_s9_y:
	.zero	4
	.globl	s9_x
	.align 4
	.type	s9_x, @object
	.size	s9_x, 4
s9_x:
	.zero	4
	.globl	_x_s9_x
	.align 4
	.type	_x_s9_x, @object
	.size	_x_s9_x, 4
_x_s9_x:
	.zero	4
	.globl	s8_z
	.align 4
	.type	s8_z, @object
	.size	s8_z, 4
s8_z:
	.zero	4
	.globl	_x_s8_z
	.align 4
	.type	_x_s8_z, @object
	.size	_x_s8_z, 4
_x_s8_z:
	.zero	4
	.globl	s8_y
	.align 4
	.type	s8_y, @object
	.size	s8_y, 4
s8_y:
	.zero	4
	.globl	_x_s8_y
	.align 4
	.type	_x_s8_y, @object
	.size	_x_s8_y, 4
_x_s8_y:
	.zero	4
	.globl	s8_x
	.align 4
	.type	s8_x, @object
	.size	s8_x, 4
s8_x:
	.zero	4
	.globl	_x_s8_x
	.align 4
	.type	_x_s8_x, @object
	.size	_x_s8_x, 4
_x_s8_x:
	.zero	4
	.globl	s7_z
	.align 4
	.type	s7_z, @object
	.size	s7_z, 4
s7_z:
	.zero	4
	.globl	_x_s7_z
	.align 4
	.type	_x_s7_z, @object
	.size	_x_s7_z, 4
_x_s7_z:
	.zero	4
	.globl	s7_y
	.align 4
	.type	s7_y, @object
	.size	s7_y, 4
s7_y:
	.zero	4
	.globl	_x_s7_y
	.align 4
	.type	_x_s7_y, @object
	.size	_x_s7_y, 4
_x_s7_y:
	.zero	4
	.globl	s7_x
	.align 4
	.type	s7_x, @object
	.size	s7_x, 4
s7_x:
	.zero	4
	.globl	_x_s7_x
	.align 4
	.type	_x_s7_x, @object
	.size	_x_s7_x, 4
_x_s7_x:
	.zero	4
	.globl	s2_evt0
	.type	s2_evt0, @object
	.size	s2_evt0, 1
s2_evt0:
	.zero	1
	.globl	_x_s2_evt0
	.type	_x_s2_evt0, @object
	.size	_x_s2_evt0, 1
_x_s2_evt0:
	.zero	1
	.globl	s1_l2
	.type	s1_l2, @object
	.size	s1_l2, 1
s1_l2:
	.zero	1
	.globl	_x_s1_l2
	.type	_x_s1_l2, @object
	.size	_x_s1_l2, 1
_x_s1_l2:
	.zero	1
	.globl	s7_evt1
	.type	s7_evt1, @object
	.size	s7_evt1, 1
s7_evt1:
	.zero	1
	.globl	_x_s7_evt1
	.type	_x_s7_evt1, @object
	.size	_x_s7_evt1, 1
_x_s7_evt1:
	.zero	1
	.globl	s4_l1
	.type	s4_l1, @object
	.size	s4_l1, 1
s4_l1:
	.zero	1
	.globl	_x_s4_l1
	.type	_x_s4_l1, @object
	.size	_x_s4_l1, 1
_x_s4_l1:
	.zero	1
	.globl	s7_evt0
	.type	s7_evt0, @object
	.size	s7_evt0, 1
s7_evt0:
	.zero	1
	.globl	_x_s7_evt0
	.type	_x_s7_evt0, @object
	.size	_x_s7_evt0, 1
_x_s7_evt0:
	.zero	1
	.globl	s4_l0
	.type	s4_l0, @object
	.size	s4_l0, 1
s4_l0:
	.zero	1
	.globl	_x_s4_l0
	.type	_x_s4_l0, @object
	.size	_x_s4_l0, 1
_x_s4_l0:
	.zero	1
	.globl	s2_evt1
	.type	s2_evt1, @object
	.size	s2_evt1, 1
s2_evt1:
	.zero	1
	.globl	_x_s2_evt1
	.type	_x_s2_evt1, @object
	.size	_x_s2_evt1, 1
_x_s2_evt1:
	.zero	1
	.globl	s12_l2
	.type	s12_l2, @object
	.size	s12_l2, 1
s12_l2:
	.zero	1
	.globl	_x_s12_l2
	.type	_x_s12_l2, @object
	.size	_x_s12_l2, 1
_x_s12_l2:
	.zero	1
	.globl	s6_z
	.align 4
	.type	s6_z, @object
	.size	s6_z, 4
s6_z:
	.zero	4
	.globl	_x_s6_z
	.align 4
	.type	_x_s6_z, @object
	.size	_x_s6_z, 4
_x_s6_z:
	.zero	4
	.globl	s1_evt0
	.type	s1_evt0, @object
	.size	s1_evt0, 1
s1_evt0:
	.zero	1
	.globl	_x_s1_evt0
	.type	_x_s1_evt0, @object
	.size	_x_s1_evt0, 1
_x_s1_evt0:
	.zero	1
	.globl	s7_l2
	.type	s7_l2, @object
	.size	s7_l2, 1
s7_l2:
	.zero	1
	.globl	_x_s7_l2
	.type	_x_s7_l2, @object
	.size	_x_s7_l2, 1
_x_s7_l2:
	.zero	1
	.globl	s1_z
	.align 4
	.type	s1_z, @object
	.size	s1_z, 4
s1_z:
	.zero	4
	.globl	_x_s1_z
	.align 4
	.type	_x_s1_z, @object
	.size	_x_s1_z, 4
_x_s1_z:
	.zero	4
	.globl	s10_l1
	.type	s10_l1, @object
	.size	s10_l1, 1
s10_l1:
	.zero	1
	.globl	_x_s10_l1
	.type	_x_s10_l1, @object
	.size	_x_s10_l1, 1
_x_s10_l1:
	.zero	1
	.globl	s4_y
	.align 4
	.type	s4_y, @object
	.size	s4_y, 4
s4_y:
	.zero	4
	.globl	_x_s4_y
	.align 4
	.type	_x_s4_y, @object
	.size	_x_s4_y, 4
_x_s4_y:
	.zero	4
	.globl	s10_evt1
	.type	s10_evt1, @object
	.size	s10_evt1, 1
s10_evt1:
	.zero	1
	.globl	_x_s10_evt1
	.type	_x_s10_evt1, @object
	.size	_x_s10_evt1, 1
_x_s10_evt1:
	.zero	1
	.globl	s7_l1
	.type	s7_l1, @object
	.size	s7_l1, 1
s7_l1:
	.zero	1
	.globl	_x_s7_l1
	.type	_x_s7_l1, @object
	.size	_x_s7_l1, 1
_x_s7_l1:
	.zero	1
	.globl	s1_y
	.align 4
	.type	s1_y, @object
	.size	s1_y, 4
s1_y:
	.zero	4
	.globl	_x_s1_y
	.align 4
	.type	_x_s1_y, @object
	.size	_x_s1_y, 4
_x_s1_y:
	.zero	4
	.globl	s10_l0
	.type	s10_l0, @object
	.size	s10_l0, 1
s10_l0:
	.zero	1
	.globl	_x_s10_l0
	.type	_x_s10_l0, @object
	.size	_x_s10_l0, 1
_x_s10_l0:
	.zero	1
	.globl	s4_x
	.align 4
	.type	s4_x, @object
	.size	s4_x, 4
s4_x:
	.zero	4
	.globl	_x_s4_x
	.align 4
	.type	_x_s4_x, @object
	.size	_x_s4_x, 4
_x_s4_x:
	.zero	4
	.globl	s10_evt0
	.type	s10_evt0, @object
	.size	s10_evt0, 1
s10_evt0:
	.zero	1
	.globl	_x_s10_evt0
	.type	_x_s10_evt0, @object
	.size	_x_s10_evt0, 1
_x_s10_evt0:
	.zero	1
	.globl	s7_l0
	.type	s7_l0, @object
	.size	s7_l0, 1
s7_l0:
	.zero	1
	.globl	_x_s7_l0
	.type	_x_s7_l0, @object
	.size	_x_s7_l0, 1
_x_s7_l0:
	.zero	1
	.globl	s1_x
	.align 4
	.type	s1_x, @object
	.size	s1_x, 4
s1_x:
	.zero	4
	.globl	_x_s1_x
	.align 4
	.type	_x_s1_x, @object
	.size	_x_s1_x, 4
_x_s1_x:
	.zero	4
	.globl	s11_evt1
	.type	s11_evt1, @object
	.size	s11_evt1, 1
s11_evt1:
	.zero	1
	.globl	_x_s11_evt1
	.type	_x_s11_evt1, @object
	.size	_x_s11_evt1, 1
_x_s11_evt1:
	.zero	1
	.globl	s8_l1
	.type	s8_l1, @object
	.size	s8_l1, 1
s8_l1:
	.zero	1
	.globl	_x_s8_l1
	.type	_x_s8_l1, @object
	.size	_x_s8_l1, 1
_x_s8_l1:
	.zero	1
	.globl	s2_y
	.align 4
	.type	s2_y, @object
	.size	s2_y, 4
s2_y:
	.zero	4
	.globl	_x_s2_y
	.align 4
	.type	_x_s2_y, @object
	.size	_x_s2_y, 4
_x_s2_y:
	.zero	4
	.globl	s11_l0
	.type	s11_l0, @object
	.size	s11_l0, 1
s11_l0:
	.zero	1
	.globl	_x_s11_l0
	.type	_x_s11_l0, @object
	.size	_x_s11_l0, 1
_x_s11_l0:
	.zero	1
	.globl	s5_x
	.align 4
	.type	s5_x, @object
	.size	s5_x, 4
s5_x:
	.zero	4
	.globl	_x_s5_x
	.align 4
	.type	_x_s5_x, @object
	.size	_x_s5_x, 4
_x_s5_x:
	.zero	4
	.globl	s0_l2
	.type	s0_l2, @object
	.size	s0_l2, 1
s0_l2:
	.zero	1
	.globl	_x_s0_l2
	.type	_x_s0_l2, @object
	.size	_x_s0_l2, 1
_x_s0_l2:
	.zero	1
	.globl	s6_evt1
	.type	s6_evt1, @object
	.size	s6_evt1, 1
s6_evt1:
	.zero	1
	.globl	_x_s6_evt1
	.type	_x_s6_evt1, @object
	.size	_x_s6_evt1, 1
_x_s6_evt1:
	.zero	1
	.globl	s3_l1
	.type	s3_l1, @object
	.size	s3_l1, 1
s3_l1:
	.zero	1
	.globl	_x_s3_l1
	.type	_x_s3_l1, @object
	.size	_x_s3_l1, 1
_x_s3_l1:
	.zero	1
	.globl	s11_evt0
	.type	s11_evt0, @object
	.size	s11_evt0, 1
s11_evt0:
	.zero	1
	.globl	_x_s11_evt0
	.type	_x_s11_evt0, @object
	.size	_x_s11_evt0, 1
_x_s11_evt0:
	.zero	1
	.globl	s8_l0
	.type	s8_l0, @object
	.size	s8_l0, 1
s8_l0:
	.zero	1
	.globl	_x_s8_l0
	.type	_x_s8_l0, @object
	.size	_x_s8_l0, 1
_x_s8_l0:
	.zero	1
	.globl	s2_x
	.align 4
	.type	s2_x, @object
	.size	s2_x, 4
s2_x:
	.zero	4
	.globl	_x_s2_x
	.align 4
	.type	_x_s2_x, @object
	.size	_x_s2_x, 4
_x_s2_x:
	.zero	4
	.globl	s8_l2
	.type	s8_l2, @object
	.size	s8_l2, 1
s8_l2:
	.zero	1
	.globl	_x_s8_l2
	.type	_x_s8_l2, @object
	.size	_x_s8_l2, 1
_x_s8_l2:
	.zero	1
	.globl	s2_z
	.align 4
	.type	s2_z, @object
	.size	s2_z, 4
s2_z:
	.zero	4
	.globl	_x_s2_z
	.align 4
	.type	_x_s2_z, @object
	.size	_x_s2_z, 4
_x_s2_z:
	.zero	4
	.globl	s11_l1
	.type	s11_l1, @object
	.size	s11_l1, 1
s11_l1:
	.zero	1
	.globl	_x_s11_l1
	.type	_x_s11_l1, @object
	.size	_x_s11_l1, 1
_x_s11_l1:
	.zero	1
	.globl	s5_y
	.align 4
	.type	s5_y, @object
	.size	s5_y, 4
s5_y:
	.zero	4
	.globl	_x_s5_y
	.align 4
	.type	_x_s5_y, @object
	.size	_x_s5_y, 4
_x_s5_y:
	.zero	4
	.globl	delta
	.align 4
	.type	delta, @object
	.size	delta, 4
delta:
	.zero	4
	.globl	_x_delta
	.align 4
	.type	_x_delta, @object
	.size	_x_delta, 4
_x_delta:
	.zero	4
	.globl	s9_evt1
	.type	s9_evt1, @object
	.size	s9_evt1, 1
s9_evt1:
	.zero	1
	.globl	_x_s9_evt1
	.type	_x_s9_evt1, @object
	.size	_x_s9_evt1, 1
_x_s9_evt1:
	.zero	1
	.globl	s6_l1
	.type	s6_l1, @object
	.size	s6_l1, 1
s6_l1:
	.zero	1
	.globl	_x_s6_l1
	.type	_x_s6_l1, @object
	.size	_x_s6_l1, 1
_x_s6_l1:
	.zero	1
	.globl	s0_y
	.align 4
	.type	s0_y, @object
	.size	s0_y, 4
s0_y:
	.zero	4
	.globl	_x_s0_y
	.align 4
	.type	_x_s0_y, @object
	.size	_x_s0_y, 4
_x_s0_y:
	.zero	4
	.globl	r_evt_id
	.align 4
	.type	r_evt_id, @object
	.size	r_evt_id, 4
r_evt_id:
	.zero	4
	.globl	_x_r_evt_id
	.align 4
	.type	_x_r_evt_id, @object
	.size	_x_r_evt_id, 4
_x_r_evt_id:
	.zero	4
	.globl	s1_l1
	.type	s1_l1, @object
	.size	s1_l1, 1
s1_l1:
	.zero	1
	.globl	_x_s1_l1
	.type	_x_s1_l1, @object
	.size	_x_s1_l1, 1
_x_s1_l1:
	.zero	1
	.globl	s4_evt1
	.type	s4_evt1, @object
	.size	s4_evt1, 1
s4_evt1:
	.zero	1
	.globl	_x_s4_evt1
	.type	_x_s4_evt1, @object
	.size	_x_s4_evt1, 1
_x_s4_evt1:
	.zero	1
	.globl	s1_evt1
	.type	s1_evt1, @object
	.size	s1_evt1, 1
s1_evt1:
	.zero	1
	.globl	_x_s1_evt1
	.type	_x_s1_evt1, @object
	.size	_x_s1_evt1, 1
_x_s1_evt1:
	.zero	1
	.globl	r_l
	.type	r_l, @object
	.size	r_l, 1
r_l:
	.zero	1
	.globl	_x_r_l
	.type	_x_r_l, @object
	.size	_x_r_l, 1
_x_r_l:
	.zero	1
	.globl	s1_l0
	.type	s1_l0, @object
	.size	s1_l0, 1
s1_l0:
	.zero	1
	.globl	_x_s1_l0
	.type	_x_s1_l0, @object
	.size	_x_s1_l0, 1
_x_s1_l0:
	.zero	1
	.globl	s4_evt0
	.type	s4_evt0, @object
	.size	s4_evt0, 1
s4_evt0:
	.zero	1
	.globl	_x_s4_evt0
	.type	_x_s4_evt0, @object
	.size	_x_s4_evt0, 1
_x_s4_evt0:
	.zero	1
	.globl	s11_l2
	.type	s11_l2, @object
	.size	s11_l2, 1
s11_l2:
	.zero	1
	.globl	_x_s11_l2
	.type	_x_s11_l2, @object
	.size	_x_s11_l2, 1
_x_s11_l2:
	.zero	1
	.globl	s5_z
	.align 4
	.type	s5_z, @object
	.size	s5_z, 4
s5_z:
	.zero	4
	.globl	_x_s5_z
	.align 4
	.type	_x_s5_z, @object
	.size	_x_s5_z, 4
_x_s5_z:
	.zero	4
	.globl	s12_evt0
	.type	s12_evt0, @object
	.size	s12_evt0, 1
s12_evt0:
	.zero	1
	.globl	_x_s12_evt0
	.type	_x_s12_evt0, @object
	.size	_x_s12_evt0, 1
_x_s12_evt0:
	.zero	1
	.globl	s9_l0
	.type	s9_l0, @object
	.size	s9_l0, 1
s9_l0:
	.zero	1
	.globl	_x_s9_l0
	.type	_x_s9_l0, @object
	.size	_x_s9_l0, 1
_x_s9_l0:
	.zero	1
	.globl	s3_x
	.align 4
	.type	s3_x, @object
	.size	s3_x, 4
s3_x:
	.zero	4
	.globl	_x_s3_x
	.align 4
	.type	_x_s3_x, @object
	.size	_x_s3_x, 4
_x_s3_x:
	.zero	4
	.globl	r_counter
	.align 4
	.type	r_counter, @object
	.size	r_counter, 4
r_counter:
	.zero	4
	.globl	_x_r_counter
	.align 4
	.type	_x_r_counter, @object
	.size	_x_r_counter, 4
_x_r_counter:
	.zero	4
	.globl	s5_evt0
	.type	s5_evt0, @object
	.size	s5_evt0, 1
s5_evt0:
	.zero	1
	.globl	_x_s5_evt0
	.type	_x_s5_evt0, @object
	.size	_x_s5_evt0, 1
_x_s5_evt0:
	.zero	1
	.globl	s2_l0
	.type	s2_l0, @object
	.size	s2_l0, 1
s2_l0:
	.zero	1
	.globl	_x_s2_l0
	.type	_x_s2_l0, @object
	.size	_x_s2_l0, 1
_x_s2_l0:
	.zero	1
	.globl	r_event0
	.type	r_event0, @object
	.size	r_event0, 1
r_event0:
	.zero	1
	.globl	_x_r_event0
	.type	_x_r_event0, @object
	.size	_x_r_event0, 1
_x_r_event0:
	.zero	1
	.globl	_diverge_delta
	.align 4
	.type	_diverge_delta, @object
	.size	_diverge_delta, 4
_diverge_delta:
	.zero	4
	.globl	_x__diverge_delta
	.align 4
	.type	_x__diverge_delta, @object
	.size	_x__diverge_delta, 4
_x__diverge_delta:
	.zero	4
	.globl	s6_l2
	.type	s6_l2, @object
	.size	s6_l2, 1
s6_l2:
	.zero	1
	.globl	_x_s6_l2
	.type	_x_s6_l2, @object
	.size	_x_s6_l2, 1
_x_s6_l2:
	.zero	1
	.globl	s0_z
	.align 4
	.type	s0_z, @object
	.size	s0_z, 4
s0_z:
	.zero	4
	.globl	_x_s0_z
	.align 4
	.type	_x_s0_z, @object
	.size	_x_s0_z, 4
_x_s0_z:
	.zero	4
	.globl	s12_evt1
	.type	s12_evt1, @object
	.size	s12_evt1, 1
s12_evt1:
	.zero	1
	.globl	_x_s12_evt1
	.type	_x_s12_evt1, @object
	.size	_x_s12_evt1, 1
_x_s12_evt1:
	.zero	1
	.globl	s9_l1
	.type	s9_l1, @object
	.size	s9_l1, 1
s9_l1:
	.zero	1
	.globl	_x_s9_l1
	.type	_x_s9_l1, @object
	.size	_x_s9_l1, 1
_x_s9_l1:
	.zero	1
	.globl	r_x
	.align 4
	.type	r_x, @object
	.size	r_x, 4
r_x:
	.zero	4
	.globl	_x_r_x
	.align 4
	.type	_x_r_x, @object
	.size	_x_r_x, 4
_x_r_x:
	.zero	4
	.globl	s3_y
	.align 4
	.type	s3_y, @object
	.size	s3_y, 4
s3_y:
	.zero	4
	.globl	_x_s3_y
	.align 4
	.type	_x_s3_y, @object
	.size	_x_s3_y, 4
_x_s3_y:
	.zero	4
	.globl	s12_l0
	.type	s12_l0, @object
	.size	s12_l0, 1
s12_l0:
	.zero	1
	.globl	_x_s12_l0
	.type	_x_s12_l0, @object
	.size	_x_s12_l0, 1
_x_s12_l0:
	.zero	1
	.globl	s6_x
	.align 4
	.type	s6_x, @object
	.size	s6_x, 4
s6_x:
	.zero	4
	.globl	_x_s6_x
	.align 4
	.type	_x_s6_x, @object
	.size	_x_s6_x, 4
_x_s6_x:
	.zero	4
	.globl	s0_evt0
	.type	s0_evt0, @object
	.size	s0_evt0, 1
s0_evt0:
	.zero	1
	.globl	_x_s0_evt0
	.type	_x_s0_evt0, @object
	.size	_x_s0_evt0, 1
_x_s0_evt0:
	.zero	1
	.globl	s9_evt0
	.type	s9_evt0, @object
	.size	s9_evt0, 1
s9_evt0:
	.zero	1
	.globl	_x_s9_evt0
	.type	_x_s9_evt0, @object
	.size	_x_s9_evt0, 1
_x_s9_evt0:
	.zero	1
	.globl	s6_l0
	.type	s6_l0, @object
	.size	s6_l0, 1
s6_l0:
	.zero	1
	.globl	_x_s6_l0
	.type	_x_s6_l0, @object
	.size	_x_s6_l0, 1
_x_s6_l0:
	.zero	1
	.globl	s0_x
	.align 4
	.type	s0_x, @object
	.size	s0_x, 4
s0_x:
	.zero	4
	.globl	_x_s0_x
	.align 4
	.type	_x_s0_x, @object
	.size	_x_s0_x, 4
_x_s0_x:
	.zero	4
	.globl	r_event1
	.type	r_event1, @object
	.size	r_event1, 1
r_event1:
	.zero	1
	.globl	_x_r_event1
	.type	_x_r_event1, @object
	.size	_x_r_event1, 1
_x_r_event1:
	.zero	1
	.globl	s0_evt1
	.type	s0_evt1, @object
	.size	s0_evt1, 1
s0_evt1:
	.zero	1
	.globl	_x_s0_evt1
	.type	_x_s0_evt1, @object
	.size	_x_s0_evt1, 1
_x_s0_evt1:
	.zero	1
	.globl	s0_l0
	.type	s0_l0, @object
	.size	s0_l0, 1
s0_l0:
	.zero	1
	.globl	_x_s0_l0
	.type	_x_s0_l0, @object
	.size	_x_s0_l0, 1
_x_s0_l0:
	.zero	1
	.globl	s3_evt0
	.type	s3_evt0, @object
	.size	s3_evt0, 1
s3_evt0:
	.zero	1
	.globl	_x_s3_evt0
	.type	_x_s3_evt0, @object
	.size	_x_s3_evt0, 1
_x_s3_evt0:
	.zero	1
	.globl	s8_evt0
	.type	s8_evt0, @object
	.size	s8_evt0, 1
s8_evt0:
	.zero	1
	.globl	_x_s8_evt0
	.type	_x_s8_evt0, @object
	.size	_x_s8_evt0, 1
_x_s8_evt0:
	.zero	1
	.globl	s5_l0
	.type	s5_l0, @object
	.size	s5_l0, 1
s5_l0:
	.zero	1
	.globl	_x_s5_l0
	.type	_x_s5_l0, @object
	.size	_x_s5_l0, 1
_x_s5_l0:
	.zero	1
	.globl	s2_l2
	.type	s2_l2, @object
	.size	s2_l2, 1
s2_l2:
	.zero	1
	.globl	_x_s2_l2
	.type	_x_s2_l2, @object
	.size	_x_s2_l2, 1
_x_s2_l2:
	.zero	1
	.globl	s8_evt1
	.type	s8_evt1, @object
	.size	s8_evt1, 1
s8_evt1:
	.zero	1
	.globl	_x_s8_evt1
	.type	_x_s8_evt1, @object
	.size	_x_s8_evt1, 1
_x_s8_evt1:
	.zero	1
	.globl	s5_l1
	.type	s5_l1, @object
	.size	s5_l1, 1
s5_l1:
	.zero	1
	.globl	_x_s5_l1
	.type	_x_s5_l1, @object
	.size	_x_s5_l1, 1
_x_s5_l1:
	.zero	1
	.globl	s9_l2
	.type	s9_l2, @object
	.size	s9_l2, 1
s9_l2:
	.zero	1
	.globl	_x_s9_l2
	.type	_x_s9_l2, @object
	.size	_x_s9_l2, 1
_x_s9_l2:
	.zero	1
	.globl	s3_z
	.align 4
	.type	s3_z, @object
	.size	s3_z, 4
s3_z:
	.zero	4
	.globl	_x_s3_z
	.align 4
	.type	_x_s3_z, @object
	.size	_x_s3_z, 4
_x_s3_z:
	.zero	4
	.globl	s12_l1
	.type	s12_l1, @object
	.size	s12_l1, 1
s12_l1:
	.zero	1
	.globl	_x_s12_l1
	.type	_x_s12_l1, @object
	.size	_x_s12_l1, 1
_x_s12_l1:
	.zero	1
	.globl	s6_y
	.align 4
	.type	s6_y, @object
	.size	s6_y, 4
s6_y:
	.zero	4
	.globl	_x_s6_y
	.align 4
	.type	_x_s6_y, @object
	.size	_x_s6_y, 4
_x_s6_y:
	.zero	4
	.globl	s0_l1
	.type	s0_l1, @object
	.size	s0_l1, 1
s0_l1:
	.zero	1
	.globl	_x_s0_l1
	.type	_x_s0_l1, @object
	.size	_x_s0_l1, 1
_x_s0_l1:
	.zero	1
	.globl	s3_evt1
	.type	s3_evt1, @object
	.size	s3_evt1, 1
s3_evt1:
	.zero	1
	.globl	_x_s3_evt1
	.type	_x_s3_evt1, @object
	.size	_x_s3_evt1, 1
_x_s3_evt1:
	.zero	1
	.globl	s3_l0
	.type	s3_l0, @object
	.size	s3_l0, 1
s3_l0:
	.zero	1
	.globl	_x_s3_l0
	.type	_x_s3_l0, @object
	.size	_x_s3_l0, 1
_x_s3_l0:
	.zero	1
	.globl	s6_evt0
	.type	s6_evt0, @object
	.size	s6_evt0, 1
s6_evt0:
	.zero	1
	.globl	_x_s6_evt0
	.type	_x_s6_evt0, @object
	.size	_x_s6_evt0, 1
_x_s6_evt0:
	.zero	1
	.globl	s3_l2
	.type	s3_l2, @object
	.size	s3_l2, 1
s3_l2:
	.zero	1
	.globl	_x_s3_l2
	.type	_x_s3_l2, @object
	.size	_x_s3_l2, 1
_x_s3_l2:
	.zero	1
	.globl	s10_l2
	.type	s10_l2, @object
	.size	s10_l2, 1
s10_l2:
	.zero	1
	.globl	_x_s10_l2
	.type	_x_s10_l2, @object
	.size	_x_s10_l2, 1
_x_s10_l2:
	.zero	1
	.globl	s4_z
	.align 4
	.type	s4_z, @object
	.size	s4_z, 4
s4_z:
	.zero	4
	.globl	_x_s4_z
	.align 4
	.type	_x_s4_z, @object
	.size	_x_s4_z, 4
_x_s4_z:
	.zero	4
	.globl	s4_l2
	.type	s4_l2, @object
	.size	s4_l2, 1
s4_l2:
	.zero	1
	.globl	_x_s4_l2
	.type	_x_s4_l2, @object
	.size	_x_s4_l2, 1
_x_s4_l2:
	.zero	1
	.globl	s2_l1
	.type	s2_l1, @object
	.size	s2_l1, 1
s2_l1:
	.zero	1
	.globl	_x_s2_l1
	.type	_x_s2_l1, @object
	.size	_x_s2_l1, 1
_x_s2_l1:
	.zero	1
	.globl	s5_evt1
	.type	s5_evt1, @object
	.size	s5_evt1, 1
s5_evt1:
	.zero	1
	.globl	_x_s5_evt1
	.type	_x_s5_evt1, @object
	.size	_x_s5_evt1, 1
_x_s5_evt1:
	.zero	1
	.globl	s5_l2
	.type	s5_l2, @object
	.size	s5_l2, 1
s5_l2:
	.zero	1
	.globl	_x_s5_l2
	.type	_x_s5_l2, @object
	.size	_x_s5_l2, 1
_x_s5_l2:
	.zero	1
	.text
	.globl	main
	.type	main, @function
main:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s12_z[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s12_y[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s12_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s11_z[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s11_y[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s11_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s10_z[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s10_y[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s10_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s9_z[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s9_y[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s9_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s8_z[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s8_y[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s8_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s7_z[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s7_y[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s7_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s2_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s1_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s7_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s4_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s7_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s4_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s2_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s12_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s6_z[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s1_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s7_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s1_z[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s10_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s4_y[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s10_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s7_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s1_y[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s10_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s4_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s10_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s7_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s1_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s11_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s8_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s2_y[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s11_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s5_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s0_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s6_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s3_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s11_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s8_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s2_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s8_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s2_z[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s11_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s5_y[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR delta[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s9_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s6_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s0_y[rip], eax
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR r_evt_id[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s1_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s4_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s1_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR r_l[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s1_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s4_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s11_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s5_z[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s12_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s9_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s3_x[rip], eax
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR r_counter[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s5_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s2_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR r_event0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _diverge_delta[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s6_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s0_z[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s12_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s9_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR r_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s3_y[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s12_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s6_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s0_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s9_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s6_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s0_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR r_event1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s0_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s0_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s3_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s8_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s5_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s2_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s8_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s5_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s9_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s3_z[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s12_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s6_y[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s0_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s3_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s3_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s6_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s3_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s10_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s4_z[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s4_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s2_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s5_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s5_l2[rip], al
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L5
.L4:
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	je	.L6
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L5
.L6:
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L7
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	je	.L5
.L7:
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L8
.L5:
	movzx	eax, BYTE PTR s12_l2[rip]
	test	al, al
	jne	.L9
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	jne	.L9
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	je	.L10
.L9:
	movzx	eax, BYTE PTR s12_l2[rip]
	test	al, al
	jne	.L11
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	je	.L11
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	je	.L10
.L11:
	movzx	eax, BYTE PTR s12_l2[rip]
	test	al, al
	jne	.L12
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	je	.L12
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	je	.L10
.L12:
	movzx	eax, BYTE PTR s12_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	je	.L13
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	jne	.L10
.L13:
	movzx	eax, BYTE PTR s12_l2[rip]
	test	al, al
	je	.L14
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	jne	.L14
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	je	.L10
.L14:
	movzx	eax, BYTE PTR s12_l2[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	jne	.L8
.L10:
	movzx	eax, BYTE PTR s12_l2[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	jne	.L8
	movss	xmm0, DWORD PTR s12_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s12_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s12_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm1, DWORD PTR s12_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L18
	movzx	eax, BYTE PTR s12_l2[rip]
	test	al, al
	jne	.L18
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	je	.L18
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	je	.L8
.L18:
	movss	xmm1, DWORD PTR s12_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L19
	movzx	eax, BYTE PTR s12_l2[rip]
	test	al, al
	jne	.L19
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	je	.L19
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	je	.L8
.L19:
	movss	xmm1, DWORD PTR s12_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L20
	movzx	eax, BYTE PTR s12_l2[rip]
	test	al, al
	je	.L20
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	je	.L20
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	je	.L8
.L20:
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L21
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L22
.L21:
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	je	.L23
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L22
.L23:
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L24
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	je	.L22
.L24:
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L8
.L22:
	movzx	eax, BYTE PTR s11_l2[rip]
	test	al, al
	jne	.L25
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	jne	.L25
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	je	.L26
.L25:
	movzx	eax, BYTE PTR s11_l2[rip]
	test	al, al
	jne	.L27
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	je	.L27
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	je	.L26
.L27:
	movzx	eax, BYTE PTR s11_l2[rip]
	test	al, al
	jne	.L28
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	je	.L28
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	je	.L26
.L28:
	movzx	eax, BYTE PTR s11_l2[rip]
	test	al, al
	jne	.L29
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	je	.L29
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	jne	.L26
.L29:
	movzx	eax, BYTE PTR s11_l2[rip]
	test	al, al
	je	.L30
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	jne	.L30
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	je	.L26
.L30:
	movzx	eax, BYTE PTR s11_l2[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	jne	.L8
.L26:
	movzx	eax, BYTE PTR s11_l2[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	jne	.L8
	movss	xmm0, DWORD PTR s11_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s11_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s11_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm1, DWORD PTR s11_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L34
	movzx	eax, BYTE PTR s11_l2[rip]
	test	al, al
	jne	.L34
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	je	.L34
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	je	.L8
.L34:
	movss	xmm1, DWORD PTR s11_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L35
	movzx	eax, BYTE PTR s11_l2[rip]
	test	al, al
	jne	.L35
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	je	.L35
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	je	.L8
.L35:
	movss	xmm1, DWORD PTR s11_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L36
	movzx	eax, BYTE PTR s11_l2[rip]
	test	al, al
	je	.L36
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	je	.L36
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	je	.L8
.L36:
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L37
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L38
.L37:
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	je	.L39
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L38
.L39:
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L40
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	je	.L38
.L40:
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L8
.L38:
	movzx	eax, BYTE PTR s10_l2[rip]
	test	al, al
	jne	.L41
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	jne	.L41
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	je	.L42
.L41:
	movzx	eax, BYTE PTR s10_l2[rip]
	test	al, al
	jne	.L43
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	je	.L43
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	je	.L42
.L43:
	movzx	eax, BYTE PTR s10_l2[rip]
	test	al, al
	jne	.L44
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	je	.L44
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	je	.L42
.L44:
	movzx	eax, BYTE PTR s10_l2[rip]
	test	al, al
	jne	.L45
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	je	.L45
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	jne	.L42
.L45:
	movzx	eax, BYTE PTR s10_l2[rip]
	test	al, al
	je	.L46
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	jne	.L46
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	je	.L42
.L46:
	movzx	eax, BYTE PTR s10_l2[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	jne	.L8
.L42:
	movzx	eax, BYTE PTR s10_l2[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	jne	.L8
	movss	xmm0, DWORD PTR s10_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s10_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s10_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm1, DWORD PTR s10_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L50
	movzx	eax, BYTE PTR s10_l2[rip]
	test	al, al
	jne	.L50
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	je	.L50
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	je	.L8
.L50:
	movss	xmm1, DWORD PTR s10_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L51
	movzx	eax, BYTE PTR s10_l2[rip]
	test	al, al
	jne	.L51
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	je	.L51
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	je	.L8
.L51:
	movss	xmm1, DWORD PTR s10_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L52
	movzx	eax, BYTE PTR s10_l2[rip]
	test	al, al
	je	.L52
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	je	.L52
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	je	.L8
.L52:
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L53
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L54
.L53:
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	je	.L55
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L54
.L55:
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L56
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	je	.L54
.L56:
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L8
.L54:
	movzx	eax, BYTE PTR s9_l2[rip]
	test	al, al
	jne	.L57
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	jne	.L57
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	je	.L58
.L57:
	movzx	eax, BYTE PTR s9_l2[rip]
	test	al, al
	jne	.L59
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	je	.L59
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	je	.L58
.L59:
	movzx	eax, BYTE PTR s9_l2[rip]
	test	al, al
	jne	.L60
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	je	.L60
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	je	.L58
.L60:
	movzx	eax, BYTE PTR s9_l2[rip]
	test	al, al
	jne	.L61
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	je	.L61
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	jne	.L58
.L61:
	movzx	eax, BYTE PTR s9_l2[rip]
	test	al, al
	je	.L62
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	jne	.L62
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	je	.L58
.L62:
	movzx	eax, BYTE PTR s9_l2[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	jne	.L8
.L58:
	movzx	eax, BYTE PTR s9_l2[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	jne	.L8
	movss	xmm0, DWORD PTR s9_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s9_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s9_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm1, DWORD PTR s9_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L66
	movzx	eax, BYTE PTR s9_l2[rip]
	test	al, al
	jne	.L66
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	je	.L66
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	je	.L8
.L66:
	movss	xmm1, DWORD PTR s9_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L67
	movzx	eax, BYTE PTR s9_l2[rip]
	test	al, al
	jne	.L67
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	je	.L67
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	je	.L8
.L67:
	movss	xmm1, DWORD PTR s9_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L68
	movzx	eax, BYTE PTR s9_l2[rip]
	test	al, al
	je	.L68
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	je	.L68
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	je	.L8
.L68:
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L69
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L70
.L69:
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	je	.L71
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L70
.L71:
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L72
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	je	.L70
.L72:
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L8
.L70:
	movzx	eax, BYTE PTR s8_l2[rip]
	test	al, al
	jne	.L73
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	jne	.L73
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	je	.L74
.L73:
	movzx	eax, BYTE PTR s8_l2[rip]
	test	al, al
	jne	.L75
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	je	.L75
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	je	.L74
.L75:
	movzx	eax, BYTE PTR s8_l2[rip]
	test	al, al
	jne	.L76
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	je	.L76
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	je	.L74
.L76:
	movzx	eax, BYTE PTR s8_l2[rip]
	test	al, al
	jne	.L77
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	je	.L77
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	jne	.L74
.L77:
	movzx	eax, BYTE PTR s8_l2[rip]
	test	al, al
	je	.L78
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	jne	.L78
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	je	.L74
.L78:
	movzx	eax, BYTE PTR s8_l2[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	jne	.L8
.L74:
	movzx	eax, BYTE PTR s8_l2[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	jne	.L8
	movss	xmm0, DWORD PTR s8_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s8_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s8_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm1, DWORD PTR s8_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L82
	movzx	eax, BYTE PTR s8_l2[rip]
	test	al, al
	jne	.L82
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	je	.L82
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	je	.L8
.L82:
	movss	xmm1, DWORD PTR s8_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L83
	movzx	eax, BYTE PTR s8_l2[rip]
	test	al, al
	jne	.L83
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	je	.L83
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	je	.L8
.L83:
	movss	xmm1, DWORD PTR s8_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L84
	movzx	eax, BYTE PTR s8_l2[rip]
	test	al, al
	je	.L84
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	je	.L84
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	je	.L8
.L84:
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L85
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L86
.L85:
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	je	.L87
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L86
.L87:
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L88
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	je	.L86
.L88:
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L8
.L86:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	je	.L90
.L89:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	jne	.L91
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	je	.L91
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	je	.L90
.L91:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	jne	.L92
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	je	.L92
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	je	.L90
.L92:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	jne	.L93
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	je	.L93
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	jne	.L90
.L93:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	je	.L94
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	jne	.L94
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	je	.L90
.L94:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	jne	.L8
.L90:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	jne	.L8
	movss	xmm0, DWORD PTR s7_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s7_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s7_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm1, DWORD PTR s7_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L98
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	jne	.L98
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	je	.L98
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	je	.L8
.L98:
	movss	xmm1, DWORD PTR s7_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L99
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	jne	.L99
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	je	.L99
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	je	.L8
.L99:
	movss	xmm1, DWORD PTR s7_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L100
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	je	.L100
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	je	.L100
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	je	.L8
.L100:
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L101
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L102
.L101:
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	je	.L103
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L102
.L103:
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L104
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	je	.L102
.L104:
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L8
.L102:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	jne	.L105
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	jne	.L105
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	je	.L106
.L105:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	jne	.L107
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	je	.L107
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	je	.L106
.L107:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	jne	.L108
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	je	.L108
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	je	.L106
.L108:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	jne	.L109
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	je	.L109
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	jne	.L106
.L109:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	je	.L110
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	jne	.L110
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	je	.L106
.L110:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	jne	.L8
.L106:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	jne	.L8
	movss	xmm0, DWORD PTR s6_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s6_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s6_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm1, DWORD PTR s6_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L114
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	jne	.L114
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	je	.L114
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	je	.L8
.L114:
	movss	xmm1, DWORD PTR s6_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L115
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	jne	.L115
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	je	.L115
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	je	.L8
.L115:
	movss	xmm1, DWORD PTR s6_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L116
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	je	.L116
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	je	.L116
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	je	.L8
.L116:
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L117
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L118
.L117:
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	je	.L119
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L118
.L119:
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L120
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	je	.L118
.L120:
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L8
.L118:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	jne	.L121
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	jne	.L121
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	je	.L122
.L121:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	jne	.L123
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	je	.L123
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	je	.L122
.L123:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	jne	.L124
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	je	.L124
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	je	.L122
.L124:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	jne	.L125
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	je	.L125
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	jne	.L122
.L125:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	je	.L126
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	jne	.L126
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	je	.L122
.L126:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	jne	.L8
.L122:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	jne	.L8
	movss	xmm0, DWORD PTR s5_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s5_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s5_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm1, DWORD PTR s5_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L130
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	jne	.L130
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	je	.L130
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	je	.L8
.L130:
	movss	xmm1, DWORD PTR s5_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L131
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	jne	.L131
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	je	.L131
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	je	.L8
.L131:
	movss	xmm1, DWORD PTR s5_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L132
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	je	.L132
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	je	.L132
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	je	.L8
.L132:
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L133
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L134
.L133:
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	je	.L135
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L134
.L135:
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L136
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	je	.L134
.L136:
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L8
.L134:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	jne	.L137
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	jne	.L137
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	je	.L138
.L137:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	jne	.L139
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	je	.L139
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	je	.L138
.L139:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	jne	.L140
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	je	.L140
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	je	.L138
.L140:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	jne	.L141
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	je	.L141
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	jne	.L138
.L141:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	je	.L142
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	jne	.L142
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	je	.L138
.L142:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	jne	.L8
.L138:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	jne	.L8
	movss	xmm0, DWORD PTR s4_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s4_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s4_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm1, DWORD PTR s4_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L146
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	jne	.L146
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	je	.L146
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	je	.L8
.L146:
	movss	xmm1, DWORD PTR s4_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L147
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	jne	.L147
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	je	.L147
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	je	.L8
.L147:
	movss	xmm1, DWORD PTR s4_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L148
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	je	.L148
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	je	.L148
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	je	.L8
.L148:
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L150
.L149:
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	je	.L151
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L150
.L151:
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L152
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	je	.L150
.L152:
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L8
.L150:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	jne	.L153
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	jne	.L153
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	je	.L154
.L153:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	jne	.L155
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	je	.L155
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	je	.L154
.L155:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	jne	.L156
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	je	.L156
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	je	.L154
.L156:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	jne	.L154
.L157:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	je	.L158
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	jne	.L158
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	je	.L154
.L158:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	jne	.L8
.L154:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	jne	.L8
	movss	xmm0, DWORD PTR s3_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s3_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s3_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm1, DWORD PTR s3_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L162
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	jne	.L162
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	je	.L162
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	je	.L8
.L162:
	movss	xmm1, DWORD PTR s3_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L163
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	jne	.L163
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	je	.L163
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	je	.L8
.L163:
	movss	xmm1, DWORD PTR s3_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L164
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	je	.L164
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	je	.L164
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	je	.L8
.L164:
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L165
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L166
.L165:
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	je	.L167
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L166
.L167:
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L168
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	je	.L166
.L168:
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L8
.L166:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	jne	.L169
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	jne	.L169
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	je	.L170
.L169:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	jne	.L171
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	je	.L171
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	je	.L170
.L171:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	jne	.L172
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	je	.L172
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	je	.L170
.L172:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	jne	.L173
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	je	.L173
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	jne	.L170
.L173:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	je	.L174
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	jne	.L174
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	je	.L170
.L174:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	jne	.L8
.L170:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	jne	.L8
	movss	xmm0, DWORD PTR s2_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s2_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s2_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm1, DWORD PTR s2_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L178
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	jne	.L178
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	je	.L178
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	je	.L8
.L178:
	movss	xmm1, DWORD PTR s2_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L179
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	jne	.L179
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	je	.L179
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	je	.L8
.L179:
	movss	xmm1, DWORD PTR s2_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L180
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	je	.L180
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	je	.L180
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	je	.L8
.L180:
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L181
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L182
.L181:
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	je	.L183
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L182
.L183:
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L184
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	je	.L182
.L184:
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L8
.L182:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	jne	.L185
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	jne	.L185
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	je	.L186
.L185:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	jne	.L187
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	je	.L187
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	je	.L186
.L187:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	jne	.L188
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	je	.L188
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	je	.L186
.L188:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	jne	.L189
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	je	.L189
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	jne	.L186
.L189:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	je	.L190
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	jne	.L190
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	je	.L186
.L190:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	jne	.L8
.L186:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	jne	.L8
	movss	xmm0, DWORD PTR s1_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s1_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s1_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm1, DWORD PTR s1_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L194
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	jne	.L194
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	je	.L194
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	je	.L8
.L194:
	movss	xmm1, DWORD PTR s1_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L195
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	jne	.L195
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	je	.L195
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	je	.L8
.L195:
	movss	xmm1, DWORD PTR s1_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L196
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	je	.L196
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	je	.L196
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	je	.L8
.L196:
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L197
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L198
.L197:
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	je	.L199
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L198
.L199:
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L200
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	je	.L198
.L200:
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L8
.L198:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	jne	.L201
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	jne	.L201
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	je	.L202
.L201:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	jne	.L203
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	je	.L203
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	je	.L202
.L203:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	jne	.L204
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	je	.L204
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	je	.L202
.L204:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	jne	.L205
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	je	.L205
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	jne	.L202
.L205:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	je	.L206
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	jne	.L206
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	je	.L202
.L206:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	jne	.L8
.L202:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	jne	.L8
	movss	xmm0, DWORD PTR s0_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s0_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s0_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm1, DWORD PTR s0_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L210
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	jne	.L210
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	je	.L210
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	je	.L8
.L210:
	movss	xmm1, DWORD PTR s0_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L211
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	jne	.L211
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	je	.L211
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	je	.L8
.L211:
	movss	xmm1, DWORD PTR s0_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L212
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	je	.L212
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	je	.L212
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	je	.L8
.L212:
	movzx	eax, BYTE PTR r_l[rip]
	test	al, al
	je	.L8
	mov	eax, DWORD PTR r_counter[rip]
	test	eax, eax
	jne	.L8
	movss	xmm0, DWORD PTR r_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L214
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L215
.L214:
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	je	.L216
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L215
.L216:
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L8
.L215:
	mov	eax, DWORD PTR r_evt_id[rip]
	test	eax, eax
	je	.L217
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 1
	je	.L217
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 2
	je	.L217
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 3
	je	.L217
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 4
	je	.L217
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 5
	je	.L217
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 6
	je	.L217
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 7
	je	.L217
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 8
	je	.L217
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 9
	je	.L217
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 10
	je	.L217
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 11
	je	.L217
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 12
	jne	.L8
.L217:
	mov	eax, DWORD PTR r_counter[rip]
	test	eax, eax
	je	.L218
	mov	eax, DWORD PTR r_counter[rip]
	cmp	eax, 1
	je	.L218
	mov	eax, DWORD PTR r_counter[rip]
	cmp	eax, 2
	je	.L218
	mov	eax, DWORD PTR r_counter[rip]
	cmp	eax, 3
	je	.L218
	mov	eax, DWORD PTR r_counter[rip]
	cmp	eax, 4
	je	.L218
	mov	eax, DWORD PTR r_counter[rip]
	cmp	eax, 5
	je	.L218
	mov	eax, DWORD PTR r_counter[rip]
	cmp	eax, 6
	je	.L218
	mov	eax, DWORD PTR r_counter[rip]
	cmp	eax, 7
	je	.L218
	mov	eax, DWORD PTR r_counter[rip]
	cmp	eax, 8
	je	.L218
	mov	eax, DWORD PTR r_counter[rip]
	cmp	eax, 9
	je	.L218
	mov	eax, DWORD PTR r_counter[rip]
	cmp	eax, 10
	je	.L218
	mov	eax, DWORD PTR r_counter[rip]
	cmp	eax, 11
	je	.L218
	mov	eax, DWORD PTR r_counter[rip]
	cmp	eax, 12
	jne	.L8
.L218:
	movzx	eax, BYTE PTR r_l[rip]
	test	al, al
	je	.L219
	movss	xmm1, DWORD PTR r_x[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L8
.L219:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jb	.L8
	movss	xmm0, DWORD PTR delta[rip]
	movss	xmm1, DWORD PTR _diverge_delta[rip]
	ucomiss	xmm0, xmm1
	jp	.L8
	ucomiss	xmm0, xmm1
	jne	.L8
	mov	eax, 1
	jmp	.L223
.L8:
	mov	eax, 0
.L223:
	mov	DWORD PTR -4[rbp], eax
	jmp	.L224
.L1310:
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s12_z[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s12_y[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s12_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s11_z[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s11_y[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s11_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s10_z[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s10_y[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s10_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s9_z[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s9_y[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s9_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s8_z[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s8_y[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s8_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s7_z[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s7_y[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s7_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s2_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s1_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s7_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s4_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s7_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s4_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s2_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s12_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s6_z[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s1_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s7_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s1_z[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s10_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s4_y[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s10_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s7_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s1_y[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s10_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s4_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s10_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s7_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s1_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s11_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s8_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s2_y[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s11_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s5_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s0_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s6_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s3_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s11_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s8_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s2_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s8_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s2_z[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s11_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s5_y[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_delta[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s9_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s6_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s0_y[rip], eax
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR _x_r_evt_id[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s1_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s4_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s1_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_r_l[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s1_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s4_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s11_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s5_z[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s12_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s9_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s3_x[rip], eax
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR _x_r_counter[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s5_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s2_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_r_event0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x__diverge_delta[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s6_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s0_z[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s12_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s9_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_r_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s3_y[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s12_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s6_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s0_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s9_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s6_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s0_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_r_event1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s0_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s0_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s3_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s8_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s5_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s2_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s8_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s5_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s9_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s3_z[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s12_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s6_y[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s0_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s3_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s3_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s6_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s3_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s10_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s4_z[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s4_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s2_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s5_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s5_l2[rip], al
	movzx	eax, BYTE PTR _x_s12_evt0[rip]
	test	al, al
	jne	.L225
	movzx	eax, BYTE PTR _x_s12_evt1[rip]
	test	al, al
	je	.L226
.L225:
	movzx	eax, BYTE PTR _x_s12_evt0[rip]
	test	al, al
	je	.L227
	movzx	eax, BYTE PTR _x_s12_evt1[rip]
	test	al, al
	je	.L226
.L227:
	movzx	eax, BYTE PTR _x_s12_evt1[rip]
	test	al, al
	je	.L228
	movzx	eax, BYTE PTR _x_s12_evt0[rip]
	test	al, al
	je	.L226
.L228:
	movzx	eax, BYTE PTR _x_s12_evt0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s12_evt1[rip]
	test	al, al
	je	.L229
.L226:
	movzx	eax, BYTE PTR _x_s12_l2[rip]
	test	al, al
	jne	.L230
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	jne	.L230
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	je	.L231
.L230:
	movzx	eax, BYTE PTR _x_s12_l2[rip]
	test	al, al
	jne	.L232
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	je	.L232
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	je	.L231
.L232:
	movzx	eax, BYTE PTR _x_s12_l2[rip]
	test	al, al
	jne	.L233
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	je	.L233
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	je	.L231
.L233:
	movzx	eax, BYTE PTR _x_s12_l2[rip]
	test	al, al
	jne	.L234
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	je	.L234
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	jne	.L231
.L234:
	movzx	eax, BYTE PTR _x_s12_l2[rip]
	test	al, al
	je	.L235
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	jne	.L235
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	je	.L231
.L235:
	movzx	eax, BYTE PTR _x_s12_l2[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	jne	.L229
.L231:
	movss	xmm1, DWORD PTR _x_s12_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L236
	movzx	eax, BYTE PTR _x_s12_l2[rip]
	test	al, al
	jne	.L236
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	je	.L236
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	je	.L229
.L236:
	movss	xmm1, DWORD PTR _x_s12_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L237
	movzx	eax, BYTE PTR _x_s12_l2[rip]
	test	al, al
	jne	.L237
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	je	.L237
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	je	.L229
.L237:
	movss	xmm1, DWORD PTR _x_s12_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L238
	movzx	eax, BYTE PTR _x_s12_l2[rip]
	test	al, al
	je	.L238
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	je	.L238
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	je	.L229
.L238:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L239
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s12_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s12_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s12_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s12_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR s12_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s12_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s12_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s12_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L239:
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L243
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L243
	movzx	eax, BYTE PTR s12_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s12_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L243
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s12_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s12_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L243
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L243
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s12_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s12_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L243
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L243
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s12_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s12_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L243
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L246
.L243:
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L246
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L229
.L246:
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	je	.L248
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L248
	movzx	eax, BYTE PTR _x_s12_l2[rip]
	test	al, al
	jne	.L248
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	je	.L248
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	jne	.L248
	movss	xmm0, DWORD PTR _x_s12_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L248
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L248
	movss	xmm0, DWORD PTR _x_s12_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L248
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L248
	movss	xmm0, DWORD PTR s12_z[rip]
	movss	xmm1, DWORD PTR _x_s12_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L248
	ucomiss	xmm0, xmm1
	je	.L251
.L248:
	movzx	eax, BYTE PTR s12_l2[rip]
	test	al, al
	jne	.L251
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	jne	.L251
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	jne	.L251
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L251
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L251
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L229
.L251:
	movzx	eax, BYTE PTR _x_s12_l2[rip]
	test	al, al
	jne	.L253
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	je	.L253
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	je	.L254
.L253:
	movzx	eax, BYTE PTR _x_s12_l2[rip]
	test	al, al
	jne	.L255
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	je	.L255
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	je	.L255
.L254:
	movss	xmm0, DWORD PTR s12_x[rip]
	movss	xmm1, DWORD PTR _x_s12_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L255
	ucomiss	xmm0, xmm1
	jne	.L255
	movss	xmm0, DWORD PTR s12_z[rip]
	movss	xmm1, DWORD PTR _x_s12_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L255
	ucomiss	xmm0, xmm1
	jne	.L255
	movss	xmm0, DWORD PTR s12_y[rip]
	movss	xmm1, DWORD PTR _x_s12_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L255
	ucomiss	xmm0, xmm1
	je	.L258
.L255:
	movzx	eax, BYTE PTR s12_l2[rip]
	test	al, al
	jne	.L258
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	je	.L258
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	jne	.L258
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L258
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L258
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L229
.L258:
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	je	.L260
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L260
	movss	xmm0, DWORD PTR s12_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L260
	movss	xmm0, DWORD PTR s12_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L262
.L260:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L262
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L262
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L263
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L262
.L263:
	movzx	eax, BYTE PTR s12_l2[rip]
	test	al, al
	jne	.L262
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	je	.L262
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	jne	.L262
	movzx	eax, BYTE PTR _x_s12_l2[rip]
	test	al, al
	jne	.L262
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	je	.L262
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	je	.L229
.L262:
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L264
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L264
	movss	xmm0, DWORD PTR s12_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L264
	movss	xmm0, DWORD PTR s12_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L266
.L264:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L266
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L266
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L267
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L266
.L267:
	movzx	eax, BYTE PTR s12_l2[rip]
	test	al, al
	jne	.L266
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	je	.L266
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	jne	.L266
	movzx	eax, BYTE PTR _x_s12_l2[rip]
	test	al, al
	jne	.L266
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	je	.L266
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	jne	.L229
.L266:
	movss	xmm0, DWORD PTR s12_z[rip]
	movss	xmm1, DWORD PTR _x_s12_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L268
	ucomiss	xmm0, xmm1
	jne	.L268
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L268
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L268
	movzx	eax, BYTE PTR _x_s12_l2[rip]
	test	al, al
	jne	.L268
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	je	.L268
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	je	.L268
	movss	xmm0, DWORD PTR s12_x[rip]
	movss	xmm1, DWORD PTR _x_s12_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L268
	ucomiss	xmm0, xmm1
	jne	.L268
	movss	xmm0, DWORD PTR s12_y[rip]
	movss	xmm1, DWORD PTR _x_s12_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L268
	ucomiss	xmm0, xmm1
	je	.L271
.L268:
	movzx	eax, BYTE PTR s12_l2[rip]
	test	al, al
	jne	.L271
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	je	.L271
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	jne	.L271
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L271
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L271
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L229
.L271:
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	je	.L273
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L273
	movzx	eax, BYTE PTR _x_s12_l2[rip]
	test	al, al
	je	.L273
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	jne	.L273
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	jne	.L273
	movss	xmm0, DWORD PTR _x_s12_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L273
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L273
	movss	xmm0, DWORD PTR s12_y[rip]
	movss	xmm1, DWORD PTR _x_s12_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L273
	ucomiss	xmm0, xmm1
	jne	.L273
	movss	xmm0, DWORD PTR _x_s12_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L273
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L276
.L273:
	movzx	eax, BYTE PTR s12_l2[rip]
	test	al, al
	jne	.L276
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	je	.L276
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	je	.L276
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L276
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L276
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L229
.L276:
	movss	xmm0, DWORD PTR s12_x[rip]
	movss	xmm1, DWORD PTR _x_s12_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L278
	ucomiss	xmm0, xmm1
	jne	.L278
	movss	xmm0, DWORD PTR s12_y[rip]
	movss	xmm1, DWORD PTR _x_s12_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L278
	ucomiss	xmm0, xmm1
	jne	.L278
	movss	xmm0, DWORD PTR s12_z[rip]
	movss	xmm1, DWORD PTR _x_s12_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L278
	ucomiss	xmm0, xmm1
	jne	.L278
	movzx	eax, BYTE PTR _x_s12_l2[rip]
	test	al, al
	jne	.L282
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	jne	.L282
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	je	.L283
.L282:
	movzx	eax, BYTE PTR _x_s12_l2[rip]
	test	al, al
	je	.L278
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	je	.L278
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	je	.L283
.L278:
	movzx	eax, BYTE PTR s12_l2[rip]
	test	al, al
	je	.L283
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	jne	.L283
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	jne	.L283
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L283
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L283
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L229
.L283:
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	je	.L284
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L284
	movss	xmm0, DWORD PTR s12_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L284
	movss	xmm0, DWORD PTR s12_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L286
.L284:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L286
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L286
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L287
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L286
.L287:
	movzx	eax, BYTE PTR s12_l2[rip]
	test	al, al
	je	.L286
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	jne	.L286
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	jne	.L286
	movzx	eax, BYTE PTR _x_s12_l2[rip]
	test	al, al
	je	.L286
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	je	.L286
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	je	.L229
.L286:
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L288
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L288
	movss	xmm0, DWORD PTR s12_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L288
	movss	xmm0, DWORD PTR s12_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L290
.L288:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L290
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L290
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L291
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L290
.L291:
	movzx	eax, BYTE PTR _x_s12_l2[rip]
	test	al, al
	jne	.L290
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	jne	.L290
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	jne	.L290
	movzx	eax, BYTE PTR s12_l2[rip]
	test	al, al
	je	.L290
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	jne	.L290
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	je	.L229
.L290:
	movss	xmm0, DWORD PTR s12_z[rip]
	movss	xmm1, DWORD PTR _x_s12_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L292
	ucomiss	xmm0, xmm1
	jne	.L292
	movss	xmm0, DWORD PTR s12_x[rip]
	movss	xmm1, DWORD PTR _x_s12_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L292
	ucomiss	xmm0, xmm1
	jne	.L292
	movss	xmm0, DWORD PTR s12_y[rip]
	movss	xmm1, DWORD PTR _x_s12_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L292
	ucomiss	xmm0, xmm1
	jne	.L292
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L292
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L292
	movzx	eax, BYTE PTR _x_s12_l2[rip]
	test	al, al
	jne	.L292
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	jne	.L292
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	je	.L296
.L292:
	movzx	eax, BYTE PTR s12_l2[rip]
	test	al, al
	je	.L296
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	je	.L296
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	jne	.L296
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L296
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L296
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L229
.L296:
	movzx	eax, BYTE PTR _x_s11_evt0[rip]
	test	al, al
	jne	.L297
	movzx	eax, BYTE PTR _x_s11_evt1[rip]
	test	al, al
	je	.L298
.L297:
	movzx	eax, BYTE PTR _x_s11_evt0[rip]
	test	al, al
	je	.L299
	movzx	eax, BYTE PTR _x_s11_evt1[rip]
	test	al, al
	je	.L298
.L299:
	movzx	eax, BYTE PTR _x_s11_evt1[rip]
	test	al, al
	je	.L300
	movzx	eax, BYTE PTR _x_s11_evt0[rip]
	test	al, al
	je	.L298
.L300:
	movzx	eax, BYTE PTR _x_s11_evt0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s11_evt1[rip]
	test	al, al
	je	.L229
.L298:
	movzx	eax, BYTE PTR _x_s11_l2[rip]
	test	al, al
	jne	.L301
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	jne	.L301
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	je	.L302
.L301:
	movzx	eax, BYTE PTR _x_s11_l2[rip]
	test	al, al
	jne	.L303
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	je	.L303
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	je	.L302
.L303:
	movzx	eax, BYTE PTR _x_s11_l2[rip]
	test	al, al
	jne	.L304
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	je	.L304
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	je	.L302
.L304:
	movzx	eax, BYTE PTR _x_s11_l2[rip]
	test	al, al
	jne	.L305
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	je	.L305
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	jne	.L302
.L305:
	movzx	eax, BYTE PTR _x_s11_l2[rip]
	test	al, al
	je	.L306
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	jne	.L306
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	je	.L302
.L306:
	movzx	eax, BYTE PTR _x_s11_l2[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	jne	.L229
.L302:
	movss	xmm1, DWORD PTR _x_s11_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L307
	movzx	eax, BYTE PTR _x_s11_l2[rip]
	test	al, al
	jne	.L307
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	je	.L307
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	je	.L229
.L307:
	movss	xmm1, DWORD PTR _x_s11_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L308
	movzx	eax, BYTE PTR _x_s11_l2[rip]
	test	al, al
	jne	.L308
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	je	.L308
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	je	.L229
.L308:
	movss	xmm1, DWORD PTR _x_s11_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L309
	movzx	eax, BYTE PTR _x_s11_l2[rip]
	test	al, al
	je	.L309
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	je	.L309
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	je	.L229
.L309:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L310
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s11_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s11_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s11_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s11_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR s11_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s11_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s11_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s11_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L310:
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L314
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L314
	movzx	eax, BYTE PTR s11_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s11_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L314
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s11_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s11_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L314
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L314
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s11_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s11_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L314
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L314
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s11_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s11_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L314
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L317
.L314:
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L317
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L229
.L317:
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	je	.L319
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L319
	movzx	eax, BYTE PTR _x_s11_l2[rip]
	test	al, al
	jne	.L319
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	je	.L319
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	jne	.L319
	movss	xmm0, DWORD PTR _x_s11_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L319
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L319
	movss	xmm0, DWORD PTR _x_s11_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L319
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L319
	movss	xmm0, DWORD PTR s11_z[rip]
	movss	xmm1, DWORD PTR _x_s11_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L319
	ucomiss	xmm0, xmm1
	je	.L322
.L319:
	movzx	eax, BYTE PTR s11_l2[rip]
	test	al, al
	jne	.L322
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	jne	.L322
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	jne	.L322
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L322
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L322
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L229
.L322:
	movzx	eax, BYTE PTR _x_s11_l2[rip]
	test	al, al
	jne	.L324
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	je	.L324
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	je	.L325
.L324:
	movzx	eax, BYTE PTR _x_s11_l2[rip]
	test	al, al
	jne	.L326
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	je	.L326
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	je	.L326
.L325:
	movss	xmm0, DWORD PTR s11_x[rip]
	movss	xmm1, DWORD PTR _x_s11_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L326
	ucomiss	xmm0, xmm1
	jne	.L326
	movss	xmm0, DWORD PTR s11_z[rip]
	movss	xmm1, DWORD PTR _x_s11_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L326
	ucomiss	xmm0, xmm1
	jne	.L326
	movss	xmm0, DWORD PTR s11_y[rip]
	movss	xmm1, DWORD PTR _x_s11_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L326
	ucomiss	xmm0, xmm1
	je	.L329
.L326:
	movzx	eax, BYTE PTR s11_l2[rip]
	test	al, al
	jne	.L329
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	je	.L329
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	jne	.L329
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L329
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L329
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L229
.L329:
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	je	.L331
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L331
	movss	xmm0, DWORD PTR s11_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L331
	movss	xmm0, DWORD PTR s11_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L333
.L331:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L333
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L333
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L334
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L333
.L334:
	movzx	eax, BYTE PTR s11_l2[rip]
	test	al, al
	jne	.L333
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	je	.L333
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	jne	.L333
	movzx	eax, BYTE PTR _x_s11_l2[rip]
	test	al, al
	jne	.L333
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	je	.L333
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	je	.L229
.L333:
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L335
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L335
	movss	xmm0, DWORD PTR s11_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L335
	movss	xmm0, DWORD PTR s11_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L337
.L335:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L337
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L337
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L338
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L337
.L338:
	movzx	eax, BYTE PTR s11_l2[rip]
	test	al, al
	jne	.L337
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	je	.L337
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	jne	.L337
	movzx	eax, BYTE PTR _x_s11_l2[rip]
	test	al, al
	jne	.L337
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	je	.L337
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	jne	.L229
.L337:
	movss	xmm0, DWORD PTR s11_z[rip]
	movss	xmm1, DWORD PTR _x_s11_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L339
	ucomiss	xmm0, xmm1
	jne	.L339
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L339
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L339
	movzx	eax, BYTE PTR _x_s11_l2[rip]
	test	al, al
	jne	.L339
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	je	.L339
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	je	.L339
	movss	xmm0, DWORD PTR s11_x[rip]
	movss	xmm1, DWORD PTR _x_s11_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L339
	ucomiss	xmm0, xmm1
	jne	.L339
	movss	xmm0, DWORD PTR s11_y[rip]
	movss	xmm1, DWORD PTR _x_s11_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L339
	ucomiss	xmm0, xmm1
	je	.L342
.L339:
	movzx	eax, BYTE PTR s11_l2[rip]
	test	al, al
	jne	.L342
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	je	.L342
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	jne	.L342
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L342
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L342
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L229
.L342:
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	je	.L344
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L344
	movzx	eax, BYTE PTR _x_s11_l2[rip]
	test	al, al
	je	.L344
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	jne	.L344
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	jne	.L344
	movss	xmm0, DWORD PTR _x_s11_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L344
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L344
	movss	xmm0, DWORD PTR s11_y[rip]
	movss	xmm1, DWORD PTR _x_s11_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L344
	ucomiss	xmm0, xmm1
	jne	.L344
	movss	xmm0, DWORD PTR _x_s11_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L344
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L347
.L344:
	movzx	eax, BYTE PTR s11_l2[rip]
	test	al, al
	jne	.L347
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	je	.L347
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	je	.L347
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L347
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L347
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L229
.L347:
	movss	xmm0, DWORD PTR s11_x[rip]
	movss	xmm1, DWORD PTR _x_s11_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L349
	ucomiss	xmm0, xmm1
	jne	.L349
	movss	xmm0, DWORD PTR s11_y[rip]
	movss	xmm1, DWORD PTR _x_s11_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L349
	ucomiss	xmm0, xmm1
	jne	.L349
	movss	xmm0, DWORD PTR s11_z[rip]
	movss	xmm1, DWORD PTR _x_s11_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L349
	ucomiss	xmm0, xmm1
	jne	.L349
	movzx	eax, BYTE PTR _x_s11_l2[rip]
	test	al, al
	jne	.L353
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	jne	.L353
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	je	.L354
.L353:
	movzx	eax, BYTE PTR _x_s11_l2[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	je	.L354
.L349:
	movzx	eax, BYTE PTR s11_l2[rip]
	test	al, al
	je	.L354
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	jne	.L354
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	jne	.L354
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L354
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L354
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L229
.L354:
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	je	.L355
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L355
	movss	xmm0, DWORD PTR s11_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L355
	movss	xmm0, DWORD PTR s11_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L357
.L355:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L357
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L357
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L358
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L357
.L358:
	movzx	eax, BYTE PTR s11_l2[rip]
	test	al, al
	je	.L357
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	jne	.L357
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	jne	.L357
	movzx	eax, BYTE PTR _x_s11_l2[rip]
	test	al, al
	je	.L357
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	je	.L357
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	je	.L229
.L357:
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L359
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L359
	movss	xmm0, DWORD PTR s11_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L359
	movss	xmm0, DWORD PTR s11_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L361
.L359:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L361
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L361
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L362
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L361
.L362:
	movzx	eax, BYTE PTR _x_s11_l2[rip]
	test	al, al
	jne	.L361
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	jne	.L361
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	jne	.L361
	movzx	eax, BYTE PTR s11_l2[rip]
	test	al, al
	je	.L361
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	jne	.L361
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	je	.L229
.L361:
	movss	xmm0, DWORD PTR s11_z[rip]
	movss	xmm1, DWORD PTR _x_s11_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L363
	ucomiss	xmm0, xmm1
	jne	.L363
	movss	xmm0, DWORD PTR s11_x[rip]
	movss	xmm1, DWORD PTR _x_s11_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L363
	ucomiss	xmm0, xmm1
	jne	.L363
	movss	xmm0, DWORD PTR s11_y[rip]
	movss	xmm1, DWORD PTR _x_s11_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L363
	ucomiss	xmm0, xmm1
	jne	.L363
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L363
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L363
	movzx	eax, BYTE PTR _x_s11_l2[rip]
	test	al, al
	jne	.L363
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	jne	.L363
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	je	.L367
.L363:
	movzx	eax, BYTE PTR s11_l2[rip]
	test	al, al
	je	.L367
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	je	.L367
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	jne	.L367
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L367
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L367
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L229
.L367:
	movzx	eax, BYTE PTR _x_s10_evt0[rip]
	test	al, al
	jne	.L368
	movzx	eax, BYTE PTR _x_s10_evt1[rip]
	test	al, al
	je	.L369
.L368:
	movzx	eax, BYTE PTR _x_s10_evt0[rip]
	test	al, al
	je	.L370
	movzx	eax, BYTE PTR _x_s10_evt1[rip]
	test	al, al
	je	.L369
.L370:
	movzx	eax, BYTE PTR _x_s10_evt1[rip]
	test	al, al
	je	.L371
	movzx	eax, BYTE PTR _x_s10_evt0[rip]
	test	al, al
	je	.L369
.L371:
	movzx	eax, BYTE PTR _x_s10_evt0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s10_evt1[rip]
	test	al, al
	je	.L229
.L369:
	movzx	eax, BYTE PTR _x_s10_l2[rip]
	test	al, al
	jne	.L372
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	jne	.L372
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	je	.L373
.L372:
	movzx	eax, BYTE PTR _x_s10_l2[rip]
	test	al, al
	jne	.L374
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	je	.L374
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	je	.L373
.L374:
	movzx	eax, BYTE PTR _x_s10_l2[rip]
	test	al, al
	jne	.L375
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	je	.L375
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	je	.L373
.L375:
	movzx	eax, BYTE PTR _x_s10_l2[rip]
	test	al, al
	jne	.L376
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	je	.L376
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	jne	.L373
.L376:
	movzx	eax, BYTE PTR _x_s10_l2[rip]
	test	al, al
	je	.L377
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	je	.L373
.L377:
	movzx	eax, BYTE PTR _x_s10_l2[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	jne	.L229
.L373:
	movss	xmm1, DWORD PTR _x_s10_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L378
	movzx	eax, BYTE PTR _x_s10_l2[rip]
	test	al, al
	jne	.L378
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	je	.L378
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	je	.L229
.L378:
	movss	xmm1, DWORD PTR _x_s10_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L379
	movzx	eax, BYTE PTR _x_s10_l2[rip]
	test	al, al
	jne	.L379
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	je	.L379
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	je	.L229
.L379:
	movss	xmm1, DWORD PTR _x_s10_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L380
	movzx	eax, BYTE PTR _x_s10_l2[rip]
	test	al, al
	je	.L380
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	je	.L380
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	je	.L229
.L380:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L381
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s10_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s10_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s10_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s10_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR s10_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s10_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s10_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s10_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L381:
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L385
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L385
	movzx	eax, BYTE PTR s10_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s10_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L385
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s10_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s10_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L385
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L385
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s10_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s10_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L385
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L385
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s10_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s10_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L385
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L388
.L385:
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L388
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L229
.L388:
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	je	.L390
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L390
	movzx	eax, BYTE PTR _x_s10_l2[rip]
	test	al, al
	jne	.L390
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	je	.L390
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	jne	.L390
	movss	xmm0, DWORD PTR _x_s10_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L390
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L390
	movss	xmm0, DWORD PTR _x_s10_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L390
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L390
	movss	xmm0, DWORD PTR s10_z[rip]
	movss	xmm1, DWORD PTR _x_s10_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L390
	ucomiss	xmm0, xmm1
	je	.L393
.L390:
	movzx	eax, BYTE PTR s10_l2[rip]
	test	al, al
	jne	.L393
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	jne	.L393
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	jne	.L393
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L393
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L393
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L229
.L393:
	movzx	eax, BYTE PTR _x_s10_l2[rip]
	test	al, al
	jne	.L395
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	je	.L395
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	je	.L396
.L395:
	movzx	eax, BYTE PTR _x_s10_l2[rip]
	test	al, al
	jne	.L397
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	je	.L397
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	je	.L397
.L396:
	movss	xmm0, DWORD PTR s10_x[rip]
	movss	xmm1, DWORD PTR _x_s10_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L397
	ucomiss	xmm0, xmm1
	jne	.L397
	movss	xmm0, DWORD PTR s10_z[rip]
	movss	xmm1, DWORD PTR _x_s10_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L397
	ucomiss	xmm0, xmm1
	jne	.L397
	movss	xmm0, DWORD PTR s10_y[rip]
	movss	xmm1, DWORD PTR _x_s10_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L397
	ucomiss	xmm0, xmm1
	je	.L400
.L397:
	movzx	eax, BYTE PTR s10_l2[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	je	.L400
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	jne	.L400
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L400
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L400
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L229
.L400:
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	je	.L402
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L402
	movss	xmm0, DWORD PTR s10_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L402
	movss	xmm0, DWORD PTR s10_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L404
.L402:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L404
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L404
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L405
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L404
.L405:
	movzx	eax, BYTE PTR s10_l2[rip]
	test	al, al
	jne	.L404
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	je	.L404
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	jne	.L404
	movzx	eax, BYTE PTR _x_s10_l2[rip]
	test	al, al
	jne	.L404
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	je	.L404
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	je	.L229
.L404:
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L406
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L406
	movss	xmm0, DWORD PTR s10_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L406
	movss	xmm0, DWORD PTR s10_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L408
.L406:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L408
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L408
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L409
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L408
.L409:
	movzx	eax, BYTE PTR s10_l2[rip]
	test	al, al
	jne	.L408
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	je	.L408
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	jne	.L408
	movzx	eax, BYTE PTR _x_s10_l2[rip]
	test	al, al
	jne	.L408
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	je	.L408
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	jne	.L229
.L408:
	movss	xmm0, DWORD PTR s10_z[rip]
	movss	xmm1, DWORD PTR _x_s10_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L410
	ucomiss	xmm0, xmm1
	jne	.L410
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L410
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L410
	movzx	eax, BYTE PTR _x_s10_l2[rip]
	test	al, al
	jne	.L410
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	je	.L410
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	je	.L410
	movss	xmm0, DWORD PTR s10_x[rip]
	movss	xmm1, DWORD PTR _x_s10_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L410
	ucomiss	xmm0, xmm1
	jne	.L410
	movss	xmm0, DWORD PTR s10_y[rip]
	movss	xmm1, DWORD PTR _x_s10_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L410
	ucomiss	xmm0, xmm1
	je	.L413
.L410:
	movzx	eax, BYTE PTR s10_l2[rip]
	test	al, al
	jne	.L413
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	je	.L413
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	jne	.L413
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L413
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L413
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L229
.L413:
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	je	.L415
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L415
	movzx	eax, BYTE PTR _x_s10_l2[rip]
	test	al, al
	je	.L415
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	jne	.L415
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	jne	.L415
	movss	xmm0, DWORD PTR _x_s10_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L415
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L415
	movss	xmm0, DWORD PTR s10_y[rip]
	movss	xmm1, DWORD PTR _x_s10_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L415
	ucomiss	xmm0, xmm1
	jne	.L415
	movss	xmm0, DWORD PTR _x_s10_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L415
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L418
.L415:
	movzx	eax, BYTE PTR s10_l2[rip]
	test	al, al
	jne	.L418
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	je	.L418
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	je	.L418
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L418
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L418
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L229
.L418:
	movss	xmm0, DWORD PTR s10_x[rip]
	movss	xmm1, DWORD PTR _x_s10_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L420
	ucomiss	xmm0, xmm1
	jne	.L420
	movss	xmm0, DWORD PTR s10_y[rip]
	movss	xmm1, DWORD PTR _x_s10_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L420
	ucomiss	xmm0, xmm1
	jne	.L420
	movss	xmm0, DWORD PTR s10_z[rip]
	movss	xmm1, DWORD PTR _x_s10_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L420
	ucomiss	xmm0, xmm1
	jne	.L420
	movzx	eax, BYTE PTR _x_s10_l2[rip]
	test	al, al
	jne	.L424
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	jne	.L424
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	je	.L425
.L424:
	movzx	eax, BYTE PTR _x_s10_l2[rip]
	test	al, al
	je	.L420
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	je	.L420
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	je	.L425
.L420:
	movzx	eax, BYTE PTR s10_l2[rip]
	test	al, al
	je	.L425
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	jne	.L425
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	jne	.L425
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L425
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L425
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L229
.L425:
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	je	.L426
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L426
	movss	xmm0, DWORD PTR s10_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L426
	movss	xmm0, DWORD PTR s10_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L428
.L426:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L428
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L428
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L429
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L428
.L429:
	movzx	eax, BYTE PTR s10_l2[rip]
	test	al, al
	je	.L428
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	jne	.L428
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	jne	.L428
	movzx	eax, BYTE PTR _x_s10_l2[rip]
	test	al, al
	je	.L428
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	je	.L428
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	je	.L229
.L428:
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L430
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L430
	movss	xmm0, DWORD PTR s10_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L430
	movss	xmm0, DWORD PTR s10_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L432
.L430:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L432
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L432
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L433
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L432
.L433:
	movzx	eax, BYTE PTR _x_s10_l2[rip]
	test	al, al
	jne	.L432
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	jne	.L432
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	jne	.L432
	movzx	eax, BYTE PTR s10_l2[rip]
	test	al, al
	je	.L432
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	jne	.L432
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	je	.L229
.L432:
	movss	xmm0, DWORD PTR s10_z[rip]
	movss	xmm1, DWORD PTR _x_s10_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L434
	ucomiss	xmm0, xmm1
	jne	.L434
	movss	xmm0, DWORD PTR s10_x[rip]
	movss	xmm1, DWORD PTR _x_s10_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L434
	ucomiss	xmm0, xmm1
	jne	.L434
	movss	xmm0, DWORD PTR s10_y[rip]
	movss	xmm1, DWORD PTR _x_s10_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L434
	ucomiss	xmm0, xmm1
	jne	.L434
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L434
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L434
	movzx	eax, BYTE PTR _x_s10_l2[rip]
	test	al, al
	jne	.L434
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	jne	.L434
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	je	.L438
.L434:
	movzx	eax, BYTE PTR s10_l2[rip]
	test	al, al
	je	.L438
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	je	.L438
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	jne	.L438
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L438
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L438
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L229
.L438:
	movzx	eax, BYTE PTR _x_s9_evt0[rip]
	test	al, al
	jne	.L439
	movzx	eax, BYTE PTR _x_s9_evt1[rip]
	test	al, al
	je	.L440
.L439:
	movzx	eax, BYTE PTR _x_s9_evt0[rip]
	test	al, al
	je	.L441
	movzx	eax, BYTE PTR _x_s9_evt1[rip]
	test	al, al
	je	.L440
.L441:
	movzx	eax, BYTE PTR _x_s9_evt1[rip]
	test	al, al
	je	.L442
	movzx	eax, BYTE PTR _x_s9_evt0[rip]
	test	al, al
	je	.L440
.L442:
	movzx	eax, BYTE PTR _x_s9_evt0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s9_evt1[rip]
	test	al, al
	je	.L229
.L440:
	movzx	eax, BYTE PTR _x_s9_l2[rip]
	test	al, al
	jne	.L443
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	jne	.L443
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	je	.L444
.L443:
	movzx	eax, BYTE PTR _x_s9_l2[rip]
	test	al, al
	jne	.L445
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	je	.L445
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	je	.L444
.L445:
	movzx	eax, BYTE PTR _x_s9_l2[rip]
	test	al, al
	jne	.L446
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	je	.L446
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	je	.L444
.L446:
	movzx	eax, BYTE PTR _x_s9_l2[rip]
	test	al, al
	jne	.L447
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	je	.L447
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	jne	.L444
.L447:
	movzx	eax, BYTE PTR _x_s9_l2[rip]
	test	al, al
	je	.L448
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	jne	.L448
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	je	.L444
.L448:
	movzx	eax, BYTE PTR _x_s9_l2[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	jne	.L229
.L444:
	movss	xmm1, DWORD PTR _x_s9_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L449
	movzx	eax, BYTE PTR _x_s9_l2[rip]
	test	al, al
	jne	.L449
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	je	.L449
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	je	.L229
.L449:
	movss	xmm1, DWORD PTR _x_s9_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L450
	movzx	eax, BYTE PTR _x_s9_l2[rip]
	test	al, al
	jne	.L450
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	je	.L450
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	je	.L229
.L450:
	movss	xmm1, DWORD PTR _x_s9_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L451
	movzx	eax, BYTE PTR _x_s9_l2[rip]
	test	al, al
	je	.L451
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	je	.L451
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	je	.L229
.L451:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L452
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s9_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s9_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s9_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s9_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR s9_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s9_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s9_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s9_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L452:
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L456
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L456
	movzx	eax, BYTE PTR s9_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s9_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L456
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s9_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s9_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L456
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L456
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s9_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s9_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L456
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L456
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s9_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s9_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L456
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L459
.L456:
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L459
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L229
.L459:
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	je	.L461
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L461
	movzx	eax, BYTE PTR _x_s9_l2[rip]
	test	al, al
	jne	.L461
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	je	.L461
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	jne	.L461
	movss	xmm0, DWORD PTR _x_s9_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L461
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L461
	movss	xmm0, DWORD PTR _x_s9_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L461
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L461
	movss	xmm0, DWORD PTR s9_z[rip]
	movss	xmm1, DWORD PTR _x_s9_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L461
	ucomiss	xmm0, xmm1
	je	.L464
.L461:
	movzx	eax, BYTE PTR s9_l2[rip]
	test	al, al
	jne	.L464
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	jne	.L464
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	jne	.L464
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L464
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L464
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L229
.L464:
	movzx	eax, BYTE PTR _x_s9_l2[rip]
	test	al, al
	jne	.L466
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	je	.L466
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	je	.L467
.L466:
	movzx	eax, BYTE PTR _x_s9_l2[rip]
	test	al, al
	jne	.L468
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	je	.L468
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	je	.L468
.L467:
	movss	xmm0, DWORD PTR s9_x[rip]
	movss	xmm1, DWORD PTR _x_s9_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L468
	ucomiss	xmm0, xmm1
	jne	.L468
	movss	xmm0, DWORD PTR s9_z[rip]
	movss	xmm1, DWORD PTR _x_s9_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L468
	ucomiss	xmm0, xmm1
	jne	.L468
	movss	xmm0, DWORD PTR s9_y[rip]
	movss	xmm1, DWORD PTR _x_s9_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L468
	ucomiss	xmm0, xmm1
	je	.L471
.L468:
	movzx	eax, BYTE PTR s9_l2[rip]
	test	al, al
	jne	.L471
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	je	.L471
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	jne	.L471
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L471
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L471
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L229
.L471:
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	je	.L473
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L473
	movss	xmm0, DWORD PTR s9_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L473
	movss	xmm0, DWORD PTR s9_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L475
.L473:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L475
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L475
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L476
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L475
.L476:
	movzx	eax, BYTE PTR s9_l2[rip]
	test	al, al
	jne	.L475
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	je	.L475
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	jne	.L475
	movzx	eax, BYTE PTR _x_s9_l2[rip]
	test	al, al
	jne	.L475
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	je	.L475
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	je	.L229
.L475:
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L477
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L477
	movss	xmm0, DWORD PTR s9_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L477
	movss	xmm0, DWORD PTR s9_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L479
.L477:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L479
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L479
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L480
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L479
.L480:
	movzx	eax, BYTE PTR s9_l2[rip]
	test	al, al
	jne	.L479
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	je	.L479
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	jne	.L479
	movzx	eax, BYTE PTR _x_s9_l2[rip]
	test	al, al
	jne	.L479
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	je	.L479
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	jne	.L229
.L479:
	movss	xmm0, DWORD PTR s9_z[rip]
	movss	xmm1, DWORD PTR _x_s9_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L481
	ucomiss	xmm0, xmm1
	jne	.L481
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L481
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L481
	movzx	eax, BYTE PTR _x_s9_l2[rip]
	test	al, al
	jne	.L481
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	je	.L481
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	je	.L481
	movss	xmm0, DWORD PTR s9_x[rip]
	movss	xmm1, DWORD PTR _x_s9_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L481
	ucomiss	xmm0, xmm1
	jne	.L481
	movss	xmm0, DWORD PTR s9_y[rip]
	movss	xmm1, DWORD PTR _x_s9_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L481
	ucomiss	xmm0, xmm1
	je	.L484
.L481:
	movzx	eax, BYTE PTR s9_l2[rip]
	test	al, al
	jne	.L484
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	je	.L484
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	jne	.L484
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L484
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L484
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L229
.L484:
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	je	.L486
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L486
	movzx	eax, BYTE PTR _x_s9_l2[rip]
	test	al, al
	je	.L486
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	jne	.L486
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	jne	.L486
	movss	xmm0, DWORD PTR _x_s9_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L486
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L486
	movss	xmm0, DWORD PTR s9_y[rip]
	movss	xmm1, DWORD PTR _x_s9_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L486
	ucomiss	xmm0, xmm1
	jne	.L486
	movss	xmm0, DWORD PTR _x_s9_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L486
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L489
.L486:
	movzx	eax, BYTE PTR s9_l2[rip]
	test	al, al
	jne	.L489
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	je	.L489
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	je	.L489
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L489
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L489
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L229
.L489:
	movss	xmm0, DWORD PTR s9_x[rip]
	movss	xmm1, DWORD PTR _x_s9_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L491
	ucomiss	xmm0, xmm1
	jne	.L491
	movss	xmm0, DWORD PTR s9_y[rip]
	movss	xmm1, DWORD PTR _x_s9_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L491
	ucomiss	xmm0, xmm1
	jne	.L491
	movss	xmm0, DWORD PTR s9_z[rip]
	movss	xmm1, DWORD PTR _x_s9_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L491
	ucomiss	xmm0, xmm1
	jne	.L491
	movzx	eax, BYTE PTR _x_s9_l2[rip]
	test	al, al
	jne	.L495
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	jne	.L495
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	je	.L496
.L495:
	movzx	eax, BYTE PTR _x_s9_l2[rip]
	test	al, al
	je	.L491
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	je	.L491
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	je	.L496
.L491:
	movzx	eax, BYTE PTR s9_l2[rip]
	test	al, al
	je	.L496
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	jne	.L496
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	jne	.L496
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L496
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L496
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L229
.L496:
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	je	.L497
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L497
	movss	xmm0, DWORD PTR s9_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L497
	movss	xmm0, DWORD PTR s9_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L499
.L497:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L499
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L499
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L500
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L499
.L500:
	movzx	eax, BYTE PTR s9_l2[rip]
	test	al, al
	je	.L499
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	jne	.L499
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	jne	.L499
	movzx	eax, BYTE PTR _x_s9_l2[rip]
	test	al, al
	je	.L499
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	je	.L499
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	je	.L229
.L499:
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L501
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L501
	movss	xmm0, DWORD PTR s9_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L501
	movss	xmm0, DWORD PTR s9_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L503
.L501:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L503
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L503
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L504
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L503
.L504:
	movzx	eax, BYTE PTR _x_s9_l2[rip]
	test	al, al
	jne	.L503
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	jne	.L503
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	jne	.L503
	movzx	eax, BYTE PTR s9_l2[rip]
	test	al, al
	je	.L503
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	jne	.L503
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	je	.L229
.L503:
	movss	xmm0, DWORD PTR s9_z[rip]
	movss	xmm1, DWORD PTR _x_s9_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L505
	ucomiss	xmm0, xmm1
	jne	.L505
	movss	xmm0, DWORD PTR s9_x[rip]
	movss	xmm1, DWORD PTR _x_s9_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L505
	ucomiss	xmm0, xmm1
	jne	.L505
	movss	xmm0, DWORD PTR s9_y[rip]
	movss	xmm1, DWORD PTR _x_s9_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L505
	ucomiss	xmm0, xmm1
	jne	.L505
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L505
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L505
	movzx	eax, BYTE PTR _x_s9_l2[rip]
	test	al, al
	jne	.L505
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	jne	.L505
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	je	.L509
.L505:
	movzx	eax, BYTE PTR s9_l2[rip]
	test	al, al
	je	.L509
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	je	.L509
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	jne	.L509
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L509
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L509
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L229
.L509:
	movzx	eax, BYTE PTR _x_s8_evt0[rip]
	test	al, al
	jne	.L510
	movzx	eax, BYTE PTR _x_s8_evt1[rip]
	test	al, al
	je	.L511
.L510:
	movzx	eax, BYTE PTR _x_s8_evt0[rip]
	test	al, al
	je	.L512
	movzx	eax, BYTE PTR _x_s8_evt1[rip]
	test	al, al
	je	.L511
.L512:
	movzx	eax, BYTE PTR _x_s8_evt1[rip]
	test	al, al
	je	.L513
	movzx	eax, BYTE PTR _x_s8_evt0[rip]
	test	al, al
	je	.L511
.L513:
	movzx	eax, BYTE PTR _x_s8_evt0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s8_evt1[rip]
	test	al, al
	je	.L229
.L511:
	movzx	eax, BYTE PTR _x_s8_l2[rip]
	test	al, al
	jne	.L514
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	jne	.L514
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	je	.L515
.L514:
	movzx	eax, BYTE PTR _x_s8_l2[rip]
	test	al, al
	jne	.L516
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	je	.L516
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	je	.L515
.L516:
	movzx	eax, BYTE PTR _x_s8_l2[rip]
	test	al, al
	jne	.L517
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	je	.L517
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	je	.L515
.L517:
	movzx	eax, BYTE PTR _x_s8_l2[rip]
	test	al, al
	jne	.L518
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	je	.L518
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	jne	.L515
.L518:
	movzx	eax, BYTE PTR _x_s8_l2[rip]
	test	al, al
	je	.L519
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	jne	.L519
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	je	.L515
.L519:
	movzx	eax, BYTE PTR _x_s8_l2[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	jne	.L229
.L515:
	movss	xmm1, DWORD PTR _x_s8_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L520
	movzx	eax, BYTE PTR _x_s8_l2[rip]
	test	al, al
	jne	.L520
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	je	.L520
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	je	.L229
.L520:
	movss	xmm1, DWORD PTR _x_s8_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L521
	movzx	eax, BYTE PTR _x_s8_l2[rip]
	test	al, al
	jne	.L521
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	je	.L521
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	je	.L229
.L521:
	movss	xmm1, DWORD PTR _x_s8_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L522
	movzx	eax, BYTE PTR _x_s8_l2[rip]
	test	al, al
	je	.L522
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	je	.L522
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	je	.L229
.L522:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L523
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s8_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s8_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s8_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s8_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR s8_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s8_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s8_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s8_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L523:
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L527
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L527
	movzx	eax, BYTE PTR s8_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s8_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L527
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s8_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s8_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L527
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L527
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s8_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s8_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L527
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L527
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s8_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s8_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L527
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L530
.L527:
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L530
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L229
.L530:
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	je	.L532
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L532
	movzx	eax, BYTE PTR _x_s8_l2[rip]
	test	al, al
	jne	.L532
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	je	.L532
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	jne	.L532
	movss	xmm0, DWORD PTR _x_s8_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L532
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L532
	movss	xmm0, DWORD PTR _x_s8_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L532
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L532
	movss	xmm0, DWORD PTR s8_z[rip]
	movss	xmm1, DWORD PTR _x_s8_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L532
	ucomiss	xmm0, xmm1
	je	.L535
.L532:
	movzx	eax, BYTE PTR s8_l2[rip]
	test	al, al
	jne	.L535
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	jne	.L535
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	jne	.L535
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L535
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L535
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L229
.L535:
	movzx	eax, BYTE PTR _x_s8_l2[rip]
	test	al, al
	jne	.L537
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	je	.L537
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	je	.L538
.L537:
	movzx	eax, BYTE PTR _x_s8_l2[rip]
	test	al, al
	jne	.L539
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	je	.L539
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	je	.L539
.L538:
	movss	xmm0, DWORD PTR s8_x[rip]
	movss	xmm1, DWORD PTR _x_s8_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L539
	ucomiss	xmm0, xmm1
	jne	.L539
	movss	xmm0, DWORD PTR s8_z[rip]
	movss	xmm1, DWORD PTR _x_s8_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L539
	ucomiss	xmm0, xmm1
	jne	.L539
	movss	xmm0, DWORD PTR s8_y[rip]
	movss	xmm1, DWORD PTR _x_s8_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L539
	ucomiss	xmm0, xmm1
	je	.L542
.L539:
	movzx	eax, BYTE PTR s8_l2[rip]
	test	al, al
	jne	.L542
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	je	.L542
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	jne	.L542
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L542
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L542
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L229
.L542:
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	je	.L544
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L544
	movss	xmm0, DWORD PTR s8_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L544
	movss	xmm0, DWORD PTR s8_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L546
.L544:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L546
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L546
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L547
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L546
.L547:
	movzx	eax, BYTE PTR s8_l2[rip]
	test	al, al
	jne	.L546
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	je	.L546
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	jne	.L546
	movzx	eax, BYTE PTR _x_s8_l2[rip]
	test	al, al
	jne	.L546
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	je	.L546
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	je	.L229
.L546:
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L548
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L548
	movss	xmm0, DWORD PTR s8_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L548
	movss	xmm0, DWORD PTR s8_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L550
.L548:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L550
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L550
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L551
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L550
.L551:
	movzx	eax, BYTE PTR s8_l2[rip]
	test	al, al
	jne	.L550
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	je	.L550
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	jne	.L550
	movzx	eax, BYTE PTR _x_s8_l2[rip]
	test	al, al
	jne	.L550
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	je	.L550
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	jne	.L229
.L550:
	movss	xmm0, DWORD PTR s8_z[rip]
	movss	xmm1, DWORD PTR _x_s8_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L552
	ucomiss	xmm0, xmm1
	jne	.L552
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L552
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L552
	movzx	eax, BYTE PTR _x_s8_l2[rip]
	test	al, al
	jne	.L552
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	je	.L552
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	je	.L552
	movss	xmm0, DWORD PTR s8_x[rip]
	movss	xmm1, DWORD PTR _x_s8_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L552
	ucomiss	xmm0, xmm1
	jne	.L552
	movss	xmm0, DWORD PTR s8_y[rip]
	movss	xmm1, DWORD PTR _x_s8_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L552
	ucomiss	xmm0, xmm1
	je	.L555
.L552:
	movzx	eax, BYTE PTR s8_l2[rip]
	test	al, al
	jne	.L555
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	je	.L555
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	jne	.L555
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L555
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L555
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L229
.L555:
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	je	.L557
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L557
	movzx	eax, BYTE PTR _x_s8_l2[rip]
	test	al, al
	je	.L557
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	jne	.L557
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	jne	.L557
	movss	xmm0, DWORD PTR _x_s8_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L557
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L557
	movss	xmm0, DWORD PTR s8_y[rip]
	movss	xmm1, DWORD PTR _x_s8_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L557
	ucomiss	xmm0, xmm1
	jne	.L557
	movss	xmm0, DWORD PTR _x_s8_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L557
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L560
.L557:
	movzx	eax, BYTE PTR s8_l2[rip]
	test	al, al
	jne	.L560
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	je	.L560
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	je	.L560
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L560
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L560
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L229
.L560:
	movss	xmm0, DWORD PTR s8_x[rip]
	movss	xmm1, DWORD PTR _x_s8_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L562
	ucomiss	xmm0, xmm1
	jne	.L562
	movss	xmm0, DWORD PTR s8_y[rip]
	movss	xmm1, DWORD PTR _x_s8_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L562
	ucomiss	xmm0, xmm1
	jne	.L562
	movss	xmm0, DWORD PTR s8_z[rip]
	movss	xmm1, DWORD PTR _x_s8_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L562
	ucomiss	xmm0, xmm1
	jne	.L562
	movzx	eax, BYTE PTR _x_s8_l2[rip]
	test	al, al
	jne	.L566
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	jne	.L566
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	je	.L567
.L566:
	movzx	eax, BYTE PTR _x_s8_l2[rip]
	test	al, al
	je	.L562
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	je	.L562
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	je	.L567
.L562:
	movzx	eax, BYTE PTR s8_l2[rip]
	test	al, al
	je	.L567
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	jne	.L567
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	jne	.L567
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L567
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L567
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L229
.L567:
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	je	.L568
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L568
	movss	xmm0, DWORD PTR s8_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L568
	movss	xmm0, DWORD PTR s8_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L570
.L568:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L570
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L570
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L571
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L570
.L571:
	movzx	eax, BYTE PTR s8_l2[rip]
	test	al, al
	je	.L570
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	jne	.L570
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	jne	.L570
	movzx	eax, BYTE PTR _x_s8_l2[rip]
	test	al, al
	je	.L570
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	je	.L570
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	je	.L229
.L570:
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L572
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L572
	movss	xmm0, DWORD PTR s8_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L572
	movss	xmm0, DWORD PTR s8_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L574
.L572:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L574
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L574
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L575
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L574
.L575:
	movzx	eax, BYTE PTR _x_s8_l2[rip]
	test	al, al
	jne	.L574
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	jne	.L574
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	jne	.L574
	movzx	eax, BYTE PTR s8_l2[rip]
	test	al, al
	je	.L574
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	jne	.L574
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	je	.L229
.L574:
	movss	xmm0, DWORD PTR s8_z[rip]
	movss	xmm1, DWORD PTR _x_s8_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L576
	ucomiss	xmm0, xmm1
	jne	.L576
	movss	xmm0, DWORD PTR s8_x[rip]
	movss	xmm1, DWORD PTR _x_s8_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L576
	ucomiss	xmm0, xmm1
	jne	.L576
	movss	xmm0, DWORD PTR s8_y[rip]
	movss	xmm1, DWORD PTR _x_s8_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L576
	ucomiss	xmm0, xmm1
	jne	.L576
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L576
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L576
	movzx	eax, BYTE PTR _x_s8_l2[rip]
	test	al, al
	jne	.L576
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	jne	.L576
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	je	.L580
.L576:
	movzx	eax, BYTE PTR s8_l2[rip]
	test	al, al
	je	.L580
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	je	.L580
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	jne	.L580
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L580
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L580
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L229
.L580:
	movzx	eax, BYTE PTR _x_s7_evt0[rip]
	test	al, al
	jne	.L581
	movzx	eax, BYTE PTR _x_s7_evt1[rip]
	test	al, al
	je	.L582
.L581:
	movzx	eax, BYTE PTR _x_s7_evt0[rip]
	test	al, al
	je	.L583
	movzx	eax, BYTE PTR _x_s7_evt1[rip]
	test	al, al
	je	.L582
.L583:
	movzx	eax, BYTE PTR _x_s7_evt1[rip]
	test	al, al
	je	.L584
	movzx	eax, BYTE PTR _x_s7_evt0[rip]
	test	al, al
	je	.L582
.L584:
	movzx	eax, BYTE PTR _x_s7_evt0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s7_evt1[rip]
	test	al, al
	je	.L229
.L582:
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	jne	.L585
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	jne	.L585
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L586
.L585:
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	jne	.L587
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L587
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L586
.L587:
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	jne	.L588
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L588
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L586
.L588:
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	jne	.L589
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L589
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	jne	.L586
.L589:
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	je	.L590
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	jne	.L590
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L586
.L590:
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	jne	.L229
.L586:
	movss	xmm1, DWORD PTR _x_s7_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L591
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	jne	.L591
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L591
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L229
.L591:
	movss	xmm1, DWORD PTR _x_s7_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L592
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	jne	.L592
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L592
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L229
.L592:
	movss	xmm1, DWORD PTR _x_s7_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L593
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	je	.L593
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L593
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L229
.L593:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L594
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s7_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s7_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s7_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s7_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s7_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s7_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L594:
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L598
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L598
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L598
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s7_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s7_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L598
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L598
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s7_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s7_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L598
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L598
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s7_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s7_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L598
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L601
.L598:
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L601
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L229
.L601:
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	je	.L603
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L603
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	jne	.L603
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L603
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	jne	.L603
	movss	xmm0, DWORD PTR _x_s7_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L603
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L603
	movss	xmm0, DWORD PTR _x_s7_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L603
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L603
	movss	xmm0, DWORD PTR s7_z[rip]
	movss	xmm1, DWORD PTR _x_s7_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L603
	ucomiss	xmm0, xmm1
	je	.L606
.L603:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	jne	.L606
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	jne	.L606
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	jne	.L606
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L606
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L606
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L229
.L606:
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	jne	.L608
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L608
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L609
.L608:
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	jne	.L610
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L610
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L610
.L609:
	movss	xmm0, DWORD PTR s7_x[rip]
	movss	xmm1, DWORD PTR _x_s7_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L610
	ucomiss	xmm0, xmm1
	jne	.L610
	movss	xmm0, DWORD PTR s7_z[rip]
	movss	xmm1, DWORD PTR _x_s7_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L610
	ucomiss	xmm0, xmm1
	jne	.L610
	movss	xmm0, DWORD PTR s7_y[rip]
	movss	xmm1, DWORD PTR _x_s7_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L610
	ucomiss	xmm0, xmm1
	je	.L613
.L610:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	jne	.L613
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	je	.L613
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	jne	.L613
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L613
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L613
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L229
.L613:
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	je	.L615
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L615
	movss	xmm0, DWORD PTR s7_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L615
	movss	xmm0, DWORD PTR s7_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L617
.L615:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L617
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L617
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L618
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L617
.L618:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	jne	.L617
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	je	.L617
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	jne	.L617
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	jne	.L617
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L617
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L229
.L617:
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L619
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L619
	movss	xmm0, DWORD PTR s7_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L619
	movss	xmm0, DWORD PTR s7_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L621
.L619:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L621
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L621
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L622
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L621
.L622:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	jne	.L621
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	je	.L621
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	jne	.L621
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	jne	.L621
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L621
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	jne	.L229
.L621:
	movss	xmm0, DWORD PTR s7_z[rip]
	movss	xmm1, DWORD PTR _x_s7_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L623
	ucomiss	xmm0, xmm1
	jne	.L623
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L623
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L623
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	jne	.L623
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L623
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L623
	movss	xmm0, DWORD PTR s7_x[rip]
	movss	xmm1, DWORD PTR _x_s7_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L623
	ucomiss	xmm0, xmm1
	jne	.L623
	movss	xmm0, DWORD PTR s7_y[rip]
	movss	xmm1, DWORD PTR _x_s7_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L623
	ucomiss	xmm0, xmm1
	je	.L626
.L623:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	jne	.L626
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	je	.L626
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	jne	.L626
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L626
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L626
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L229
.L626:
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	je	.L628
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L628
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	je	.L628
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	jne	.L628
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	jne	.L628
	movss	xmm0, DWORD PTR _x_s7_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L628
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L628
	movss	xmm0, DWORD PTR s7_y[rip]
	movss	xmm1, DWORD PTR _x_s7_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L628
	ucomiss	xmm0, xmm1
	jne	.L628
	movss	xmm0, DWORD PTR _x_s7_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L628
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L631
.L628:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	jne	.L631
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	je	.L631
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	je	.L631
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L631
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L631
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L229
.L631:
	movss	xmm0, DWORD PTR s7_x[rip]
	movss	xmm1, DWORD PTR _x_s7_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L633
	ucomiss	xmm0, xmm1
	jne	.L633
	movss	xmm0, DWORD PTR s7_y[rip]
	movss	xmm1, DWORD PTR _x_s7_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L633
	ucomiss	xmm0, xmm1
	jne	.L633
	movss	xmm0, DWORD PTR s7_z[rip]
	movss	xmm1, DWORD PTR _x_s7_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L633
	ucomiss	xmm0, xmm1
	jne	.L633
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	jne	.L637
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	jne	.L637
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L638
.L637:
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	je	.L633
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L633
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L638
.L633:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	je	.L638
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	jne	.L638
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	jne	.L638
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L638
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L638
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L229
.L638:
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	je	.L639
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L639
	movss	xmm0, DWORD PTR s7_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L639
	movss	xmm0, DWORD PTR s7_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L641
.L639:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L641
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L641
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L642
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L641
.L642:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	je	.L641
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	jne	.L641
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	jne	.L641
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	je	.L641
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L641
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L229
.L641:
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L643
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L643
	movss	xmm0, DWORD PTR s7_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L643
	movss	xmm0, DWORD PTR s7_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L645
.L643:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L645
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L645
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L646
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L645
.L646:
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	jne	.L645
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	jne	.L645
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	jne	.L645
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	je	.L645
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	jne	.L645
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	je	.L229
.L645:
	movss	xmm0, DWORD PTR s7_z[rip]
	movss	xmm1, DWORD PTR _x_s7_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L647
	ucomiss	xmm0, xmm1
	jne	.L647
	movss	xmm0, DWORD PTR s7_x[rip]
	movss	xmm1, DWORD PTR _x_s7_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L647
	ucomiss	xmm0, xmm1
	jne	.L647
	movss	xmm0, DWORD PTR s7_y[rip]
	movss	xmm1, DWORD PTR _x_s7_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L647
	ucomiss	xmm0, xmm1
	jne	.L647
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L647
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L647
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	jne	.L647
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	jne	.L647
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L651
.L647:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	je	.L651
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	je	.L651
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	jne	.L651
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L651
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L651
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L229
.L651:
	movzx	eax, BYTE PTR _x_s6_evt0[rip]
	test	al, al
	jne	.L652
	movzx	eax, BYTE PTR _x_s6_evt1[rip]
	test	al, al
	je	.L653
.L652:
	movzx	eax, BYTE PTR _x_s6_evt0[rip]
	test	al, al
	je	.L654
	movzx	eax, BYTE PTR _x_s6_evt1[rip]
	test	al, al
	je	.L653
.L654:
	movzx	eax, BYTE PTR _x_s6_evt1[rip]
	test	al, al
	je	.L655
	movzx	eax, BYTE PTR _x_s6_evt0[rip]
	test	al, al
	je	.L653
.L655:
	movzx	eax, BYTE PTR _x_s6_evt0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s6_evt1[rip]
	test	al, al
	je	.L229
.L653:
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	jne	.L656
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	jne	.L656
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L657
.L656:
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	jne	.L658
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L658
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L657
.L658:
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	jne	.L659
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L659
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L657
.L659:
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	jne	.L660
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L660
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	jne	.L657
.L660:
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	je	.L661
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	jne	.L661
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L657
.L661:
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	jne	.L229
.L657:
	movss	xmm1, DWORD PTR _x_s6_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L662
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	jne	.L662
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L662
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L229
.L662:
	movss	xmm1, DWORD PTR _x_s6_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L663
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	jne	.L663
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L663
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L229
.L663:
	movss	xmm1, DWORD PTR _x_s6_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L664
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	je	.L664
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L664
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L229
.L664:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L665
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s6_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s6_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s6_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s6_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s6_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s6_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L665:
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L669
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L669
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L669
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s6_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s6_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L669
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L669
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s6_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s6_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L669
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L669
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s6_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s6_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L669
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L672
.L669:
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L672
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L229
.L672:
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	je	.L674
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L674
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	jne	.L674
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L674
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	jne	.L674
	movss	xmm0, DWORD PTR _x_s6_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L674
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L674
	movss	xmm0, DWORD PTR _x_s6_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L674
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L674
	movss	xmm0, DWORD PTR s6_z[rip]
	movss	xmm1, DWORD PTR _x_s6_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L674
	ucomiss	xmm0, xmm1
	je	.L677
.L674:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	jne	.L677
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	jne	.L677
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	jne	.L677
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L677
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L677
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L229
.L677:
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	jne	.L679
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L679
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L680
.L679:
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	jne	.L681
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L681
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L681
.L680:
	movss	xmm0, DWORD PTR s6_x[rip]
	movss	xmm1, DWORD PTR _x_s6_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L681
	ucomiss	xmm0, xmm1
	jne	.L681
	movss	xmm0, DWORD PTR s6_z[rip]
	movss	xmm1, DWORD PTR _x_s6_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L681
	ucomiss	xmm0, xmm1
	jne	.L681
	movss	xmm0, DWORD PTR s6_y[rip]
	movss	xmm1, DWORD PTR _x_s6_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L681
	ucomiss	xmm0, xmm1
	je	.L684
.L681:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	jne	.L684
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	je	.L684
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	jne	.L684
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L684
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L684
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L229
.L684:
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	je	.L686
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L686
	movss	xmm0, DWORD PTR s6_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L686
	movss	xmm0, DWORD PTR s6_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L688
.L686:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L688
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L688
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L689
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L688
.L689:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	jne	.L688
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	je	.L688
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	jne	.L688
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	jne	.L688
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L688
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L229
.L688:
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L690
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L690
	movss	xmm0, DWORD PTR s6_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L690
	movss	xmm0, DWORD PTR s6_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L692
.L690:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L692
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L692
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L693
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L692
.L693:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	jne	.L692
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	je	.L692
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	jne	.L692
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	jne	.L692
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L692
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	jne	.L229
.L692:
	movss	xmm0, DWORD PTR s6_z[rip]
	movss	xmm1, DWORD PTR _x_s6_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L694
	ucomiss	xmm0, xmm1
	jne	.L694
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L694
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L694
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	jne	.L694
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L694
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L694
	movss	xmm0, DWORD PTR s6_x[rip]
	movss	xmm1, DWORD PTR _x_s6_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L694
	ucomiss	xmm0, xmm1
	jne	.L694
	movss	xmm0, DWORD PTR s6_y[rip]
	movss	xmm1, DWORD PTR _x_s6_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L694
	ucomiss	xmm0, xmm1
	je	.L697
.L694:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	jne	.L697
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	je	.L697
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	jne	.L697
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L697
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L697
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L229
.L697:
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	je	.L699
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L699
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	je	.L699
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	jne	.L699
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	jne	.L699
	movss	xmm0, DWORD PTR _x_s6_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L699
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L699
	movss	xmm0, DWORD PTR s6_y[rip]
	movss	xmm1, DWORD PTR _x_s6_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L699
	ucomiss	xmm0, xmm1
	jne	.L699
	movss	xmm0, DWORD PTR _x_s6_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L699
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L702
.L699:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	jne	.L702
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	je	.L702
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	je	.L702
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L702
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L702
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L229
.L702:
	movss	xmm0, DWORD PTR s6_x[rip]
	movss	xmm1, DWORD PTR _x_s6_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L704
	ucomiss	xmm0, xmm1
	jne	.L704
	movss	xmm0, DWORD PTR s6_y[rip]
	movss	xmm1, DWORD PTR _x_s6_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L704
	ucomiss	xmm0, xmm1
	jne	.L704
	movss	xmm0, DWORD PTR s6_z[rip]
	movss	xmm1, DWORD PTR _x_s6_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L704
	ucomiss	xmm0, xmm1
	jne	.L704
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	jne	.L708
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	jne	.L708
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L709
.L708:
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	je	.L704
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L704
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L709
.L704:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	je	.L709
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	jne	.L709
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	jne	.L709
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L709
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L709
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L229
.L709:
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	je	.L710
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L710
	movss	xmm0, DWORD PTR s6_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L710
	movss	xmm0, DWORD PTR s6_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L712
.L710:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L712
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L712
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L713
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L712
.L713:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	je	.L712
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	jne	.L712
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	jne	.L712
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	je	.L712
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L712
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L229
.L712:
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L714
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L714
	movss	xmm0, DWORD PTR s6_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L714
	movss	xmm0, DWORD PTR s6_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L716
.L714:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L716
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L716
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L717
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L716
.L717:
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	jne	.L716
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	jne	.L716
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	jne	.L716
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	je	.L716
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	jne	.L716
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	je	.L229
.L716:
	movss	xmm0, DWORD PTR s6_z[rip]
	movss	xmm1, DWORD PTR _x_s6_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L718
	ucomiss	xmm0, xmm1
	jne	.L718
	movss	xmm0, DWORD PTR s6_x[rip]
	movss	xmm1, DWORD PTR _x_s6_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L718
	ucomiss	xmm0, xmm1
	jne	.L718
	movss	xmm0, DWORD PTR s6_y[rip]
	movss	xmm1, DWORD PTR _x_s6_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L718
	ucomiss	xmm0, xmm1
	jne	.L718
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L718
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L718
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	jne	.L718
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	jne	.L718
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L722
.L718:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	je	.L722
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	je	.L722
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	jne	.L722
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L722
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L722
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L229
.L722:
	movzx	eax, BYTE PTR _x_s5_evt0[rip]
	test	al, al
	jne	.L723
	movzx	eax, BYTE PTR _x_s5_evt1[rip]
	test	al, al
	je	.L724
.L723:
	movzx	eax, BYTE PTR _x_s5_evt0[rip]
	test	al, al
	je	.L725
	movzx	eax, BYTE PTR _x_s5_evt1[rip]
	test	al, al
	je	.L724
.L725:
	movzx	eax, BYTE PTR _x_s5_evt1[rip]
	test	al, al
	je	.L726
	movzx	eax, BYTE PTR _x_s5_evt0[rip]
	test	al, al
	je	.L724
.L726:
	movzx	eax, BYTE PTR _x_s5_evt0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s5_evt1[rip]
	test	al, al
	je	.L229
.L724:
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	jne	.L727
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	jne	.L727
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L728
.L727:
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	jne	.L729
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L729
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L728
.L729:
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	jne	.L730
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L730
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L728
.L730:
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	jne	.L731
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L731
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	jne	.L728
.L731:
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	je	.L732
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	jne	.L732
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L728
.L732:
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	jne	.L229
.L728:
	movss	xmm1, DWORD PTR _x_s5_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L733
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	jne	.L733
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L733
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L229
.L733:
	movss	xmm1, DWORD PTR _x_s5_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L734
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	jne	.L734
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L734
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L229
.L734:
	movss	xmm1, DWORD PTR _x_s5_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L735
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	je	.L735
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L735
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L229
.L735:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L736
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s5_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s5_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s5_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s5_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s5_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s5_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L736:
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L740
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L740
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L740
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s5_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s5_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L740
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L740
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s5_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s5_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L740
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L740
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s5_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s5_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L740
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L743
.L740:
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L743
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L229
.L743:
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	je	.L745
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L745
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	jne	.L745
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L745
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	jne	.L745
	movss	xmm0, DWORD PTR _x_s5_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L745
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L745
	movss	xmm0, DWORD PTR _x_s5_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L745
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L745
	movss	xmm0, DWORD PTR s5_z[rip]
	movss	xmm1, DWORD PTR _x_s5_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L745
	ucomiss	xmm0, xmm1
	je	.L748
.L745:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	jne	.L748
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	jne	.L748
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	jne	.L748
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L748
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L748
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L229
.L748:
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	jne	.L750
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L750
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L751
.L750:
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	jne	.L752
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L752
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L752
.L751:
	movss	xmm0, DWORD PTR s5_x[rip]
	movss	xmm1, DWORD PTR _x_s5_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L752
	ucomiss	xmm0, xmm1
	jne	.L752
	movss	xmm0, DWORD PTR s5_z[rip]
	movss	xmm1, DWORD PTR _x_s5_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L752
	ucomiss	xmm0, xmm1
	jne	.L752
	movss	xmm0, DWORD PTR s5_y[rip]
	movss	xmm1, DWORD PTR _x_s5_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L752
	ucomiss	xmm0, xmm1
	je	.L755
.L752:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	jne	.L755
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	je	.L755
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	jne	.L755
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L755
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L755
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L229
.L755:
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	je	.L757
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L757
	movss	xmm0, DWORD PTR s5_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L757
	movss	xmm0, DWORD PTR s5_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L759
.L757:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L759
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L759
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L760
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L759
.L760:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	jne	.L759
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	je	.L759
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	jne	.L759
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	jne	.L759
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L759
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L229
.L759:
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L761
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L761
	movss	xmm0, DWORD PTR s5_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L761
	movss	xmm0, DWORD PTR s5_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L763
.L761:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L763
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L763
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L764
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L763
.L764:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	jne	.L763
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	je	.L763
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	jne	.L763
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	jne	.L763
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L763
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	jne	.L229
.L763:
	movss	xmm0, DWORD PTR s5_z[rip]
	movss	xmm1, DWORD PTR _x_s5_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L765
	ucomiss	xmm0, xmm1
	jne	.L765
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L765
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L765
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	jne	.L765
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L765
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L765
	movss	xmm0, DWORD PTR s5_x[rip]
	movss	xmm1, DWORD PTR _x_s5_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L765
	ucomiss	xmm0, xmm1
	jne	.L765
	movss	xmm0, DWORD PTR s5_y[rip]
	movss	xmm1, DWORD PTR _x_s5_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L765
	ucomiss	xmm0, xmm1
	je	.L768
.L765:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	jne	.L768
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	je	.L768
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	jne	.L768
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L768
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L768
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L229
.L768:
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	je	.L770
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L770
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	je	.L770
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	jne	.L770
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	jne	.L770
	movss	xmm0, DWORD PTR _x_s5_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L770
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L770
	movss	xmm0, DWORD PTR s5_y[rip]
	movss	xmm1, DWORD PTR _x_s5_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L770
	ucomiss	xmm0, xmm1
	jne	.L770
	movss	xmm0, DWORD PTR _x_s5_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L770
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L773
.L770:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	jne	.L773
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	je	.L773
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	je	.L773
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L773
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L773
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L229
.L773:
	movss	xmm0, DWORD PTR s5_x[rip]
	movss	xmm1, DWORD PTR _x_s5_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L775
	ucomiss	xmm0, xmm1
	jne	.L775
	movss	xmm0, DWORD PTR s5_y[rip]
	movss	xmm1, DWORD PTR _x_s5_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L775
	ucomiss	xmm0, xmm1
	jne	.L775
	movss	xmm0, DWORD PTR s5_z[rip]
	movss	xmm1, DWORD PTR _x_s5_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L775
	ucomiss	xmm0, xmm1
	jne	.L775
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	jne	.L779
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	jne	.L779
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L780
.L779:
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	je	.L775
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L775
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L780
.L775:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	je	.L780
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	jne	.L780
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	jne	.L780
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L780
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L780
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L229
.L780:
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	je	.L781
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L781
	movss	xmm0, DWORD PTR s5_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L781
	movss	xmm0, DWORD PTR s5_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L783
.L781:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L783
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L783
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L784
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L783
.L784:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	je	.L783
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	jne	.L783
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	jne	.L783
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	je	.L783
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L783
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L229
.L783:
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L785
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L785
	movss	xmm0, DWORD PTR s5_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L785
	movss	xmm0, DWORD PTR s5_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L787
.L785:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L787
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L787
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L788
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L787
.L788:
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	jne	.L787
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	jne	.L787
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	jne	.L787
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	je	.L787
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	jne	.L787
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	je	.L229
.L787:
	movss	xmm0, DWORD PTR s5_z[rip]
	movss	xmm1, DWORD PTR _x_s5_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L789
	ucomiss	xmm0, xmm1
	jne	.L789
	movss	xmm0, DWORD PTR s5_x[rip]
	movss	xmm1, DWORD PTR _x_s5_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L789
	ucomiss	xmm0, xmm1
	jne	.L789
	movss	xmm0, DWORD PTR s5_y[rip]
	movss	xmm1, DWORD PTR _x_s5_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L789
	ucomiss	xmm0, xmm1
	jne	.L789
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L789
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L789
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	jne	.L789
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	jne	.L789
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L793
.L789:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	je	.L793
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	je	.L793
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	jne	.L793
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L793
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L793
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L229
.L793:
	movzx	eax, BYTE PTR _x_s4_evt0[rip]
	test	al, al
	jne	.L794
	movzx	eax, BYTE PTR _x_s4_evt1[rip]
	test	al, al
	je	.L795
.L794:
	movzx	eax, BYTE PTR _x_s4_evt0[rip]
	test	al, al
	je	.L796
	movzx	eax, BYTE PTR _x_s4_evt1[rip]
	test	al, al
	je	.L795
.L796:
	movzx	eax, BYTE PTR _x_s4_evt1[rip]
	test	al, al
	je	.L797
	movzx	eax, BYTE PTR _x_s4_evt0[rip]
	test	al, al
	je	.L795
.L797:
	movzx	eax, BYTE PTR _x_s4_evt0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s4_evt1[rip]
	test	al, al
	je	.L229
.L795:
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	jne	.L798
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	jne	.L798
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L799
.L798:
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	jne	.L800
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L800
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L799
.L800:
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	jne	.L801
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L801
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L799
.L801:
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	jne	.L802
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L802
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	jne	.L799
.L802:
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	je	.L803
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	jne	.L803
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L799
.L803:
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	jne	.L229
.L799:
	movss	xmm1, DWORD PTR _x_s4_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L804
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	jne	.L804
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L804
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L229
.L804:
	movss	xmm1, DWORD PTR _x_s4_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L805
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	jne	.L805
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L805
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L229
.L805:
	movss	xmm1, DWORD PTR _x_s4_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L806
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	je	.L806
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L806
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L229
.L806:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L807
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s4_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s4_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s4_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s4_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s4_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s4_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L807:
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L811
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L811
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L811
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s4_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s4_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L811
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L811
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s4_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s4_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L811
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L811
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s4_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s4_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L811
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L814
.L811:
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L814
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L229
.L814:
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	je	.L816
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L816
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	jne	.L816
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L816
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	jne	.L816
	movss	xmm0, DWORD PTR _x_s4_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L816
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L816
	movss	xmm0, DWORD PTR _x_s4_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L816
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L816
	movss	xmm0, DWORD PTR s4_z[rip]
	movss	xmm1, DWORD PTR _x_s4_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L816
	ucomiss	xmm0, xmm1
	je	.L819
.L816:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	jne	.L819
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	jne	.L819
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	jne	.L819
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L819
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L819
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L229
.L819:
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	jne	.L821
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L821
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L822
.L821:
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	jne	.L823
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L823
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L823
.L822:
	movss	xmm0, DWORD PTR s4_x[rip]
	movss	xmm1, DWORD PTR _x_s4_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L823
	ucomiss	xmm0, xmm1
	jne	.L823
	movss	xmm0, DWORD PTR s4_z[rip]
	movss	xmm1, DWORD PTR _x_s4_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L823
	ucomiss	xmm0, xmm1
	jne	.L823
	movss	xmm0, DWORD PTR s4_y[rip]
	movss	xmm1, DWORD PTR _x_s4_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L823
	ucomiss	xmm0, xmm1
	je	.L826
.L823:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	jne	.L826
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	je	.L826
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	jne	.L826
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L826
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L826
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L229
.L826:
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	je	.L828
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L828
	movss	xmm0, DWORD PTR s4_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L828
	movss	xmm0, DWORD PTR s4_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L830
.L828:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L830
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L830
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L831
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L830
.L831:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	jne	.L830
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	je	.L830
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	jne	.L830
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	jne	.L830
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L830
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L229
.L830:
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L832
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L832
	movss	xmm0, DWORD PTR s4_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L832
	movss	xmm0, DWORD PTR s4_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L834
.L832:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L834
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L834
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L835
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L834
.L835:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	jne	.L834
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	je	.L834
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	jne	.L834
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	jne	.L834
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L834
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	jne	.L229
.L834:
	movss	xmm0, DWORD PTR s4_z[rip]
	movss	xmm1, DWORD PTR _x_s4_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L836
	ucomiss	xmm0, xmm1
	jne	.L836
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L836
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L836
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	jne	.L836
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L836
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L836
	movss	xmm0, DWORD PTR s4_x[rip]
	movss	xmm1, DWORD PTR _x_s4_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L836
	ucomiss	xmm0, xmm1
	jne	.L836
	movss	xmm0, DWORD PTR s4_y[rip]
	movss	xmm1, DWORD PTR _x_s4_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L836
	ucomiss	xmm0, xmm1
	je	.L839
.L836:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	jne	.L839
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	je	.L839
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	jne	.L839
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L839
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L839
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L229
.L839:
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	je	.L841
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L841
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	je	.L841
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	jne	.L841
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	jne	.L841
	movss	xmm0, DWORD PTR _x_s4_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L841
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L841
	movss	xmm0, DWORD PTR s4_y[rip]
	movss	xmm1, DWORD PTR _x_s4_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L841
	ucomiss	xmm0, xmm1
	jne	.L841
	movss	xmm0, DWORD PTR _x_s4_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L841
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L844
.L841:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	jne	.L844
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	je	.L844
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	je	.L844
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L844
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L844
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L229
.L844:
	movss	xmm0, DWORD PTR s4_x[rip]
	movss	xmm1, DWORD PTR _x_s4_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L846
	ucomiss	xmm0, xmm1
	jne	.L846
	movss	xmm0, DWORD PTR s4_y[rip]
	movss	xmm1, DWORD PTR _x_s4_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L846
	ucomiss	xmm0, xmm1
	jne	.L846
	movss	xmm0, DWORD PTR s4_z[rip]
	movss	xmm1, DWORD PTR _x_s4_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L846
	ucomiss	xmm0, xmm1
	jne	.L846
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	jne	.L850
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	jne	.L850
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L851
.L850:
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	je	.L846
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L846
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L851
.L846:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	je	.L851
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	jne	.L851
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	jne	.L851
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L851
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L851
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L229
.L851:
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	je	.L852
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L852
	movss	xmm0, DWORD PTR s4_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L852
	movss	xmm0, DWORD PTR s4_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L854
.L852:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L854
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L854
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L855
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L854
.L855:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	je	.L854
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	jne	.L854
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	jne	.L854
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	je	.L854
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L854
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L229
.L854:
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L856
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L856
	movss	xmm0, DWORD PTR s4_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L856
	movss	xmm0, DWORD PTR s4_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L858
.L856:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L858
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L858
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L859
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L858
.L859:
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	jne	.L858
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	jne	.L858
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	jne	.L858
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	je	.L858
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	jne	.L858
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	je	.L229
.L858:
	movss	xmm0, DWORD PTR s4_z[rip]
	movss	xmm1, DWORD PTR _x_s4_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L860
	ucomiss	xmm0, xmm1
	jne	.L860
	movss	xmm0, DWORD PTR s4_x[rip]
	movss	xmm1, DWORD PTR _x_s4_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L860
	ucomiss	xmm0, xmm1
	jne	.L860
	movss	xmm0, DWORD PTR s4_y[rip]
	movss	xmm1, DWORD PTR _x_s4_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L860
	ucomiss	xmm0, xmm1
	jne	.L860
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L860
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L860
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	jne	.L860
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	jne	.L860
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L864
.L860:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	je	.L864
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	je	.L864
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	jne	.L864
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L864
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L864
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L229
.L864:
	movzx	eax, BYTE PTR _x_s3_evt0[rip]
	test	al, al
	jne	.L865
	movzx	eax, BYTE PTR _x_s3_evt1[rip]
	test	al, al
	je	.L866
.L865:
	movzx	eax, BYTE PTR _x_s3_evt0[rip]
	test	al, al
	je	.L867
	movzx	eax, BYTE PTR _x_s3_evt1[rip]
	test	al, al
	je	.L866
.L867:
	movzx	eax, BYTE PTR _x_s3_evt1[rip]
	test	al, al
	je	.L868
	movzx	eax, BYTE PTR _x_s3_evt0[rip]
	test	al, al
	je	.L866
.L868:
	movzx	eax, BYTE PTR _x_s3_evt0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s3_evt1[rip]
	test	al, al
	je	.L229
.L866:
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	jne	.L869
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	jne	.L869
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L870
.L869:
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	jne	.L871
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L871
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L870
.L871:
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	jne	.L872
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L872
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L870
.L872:
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	jne	.L873
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L873
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	jne	.L870
.L873:
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	je	.L874
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	jne	.L874
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L870
.L874:
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	jne	.L229
.L870:
	movss	xmm1, DWORD PTR _x_s3_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L875
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	jne	.L875
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L875
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L229
.L875:
	movss	xmm1, DWORD PTR _x_s3_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L876
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	jne	.L876
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L876
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L229
.L876:
	movss	xmm1, DWORD PTR _x_s3_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L877
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	je	.L877
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L877
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L229
.L877:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L878
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s3_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s3_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s3_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s3_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s3_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s3_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L878:
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L882
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L882
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L882
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s3_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s3_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L882
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L882
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s3_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s3_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L882
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L882
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s3_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s3_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L882
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L885
.L882:
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L885
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L229
.L885:
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	je	.L887
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L887
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	jne	.L887
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L887
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	jne	.L887
	movss	xmm0, DWORD PTR _x_s3_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L887
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L887
	movss	xmm0, DWORD PTR _x_s3_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L887
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L887
	movss	xmm0, DWORD PTR s3_z[rip]
	movss	xmm1, DWORD PTR _x_s3_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L887
	ucomiss	xmm0, xmm1
	je	.L890
.L887:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	jne	.L890
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	jne	.L890
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	jne	.L890
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L890
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L890
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L229
.L890:
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	jne	.L892
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L892
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L893
.L892:
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	jne	.L894
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L894
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L894
.L893:
	movss	xmm0, DWORD PTR s3_x[rip]
	movss	xmm1, DWORD PTR _x_s3_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L894
	ucomiss	xmm0, xmm1
	jne	.L894
	movss	xmm0, DWORD PTR s3_z[rip]
	movss	xmm1, DWORD PTR _x_s3_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L894
	ucomiss	xmm0, xmm1
	jne	.L894
	movss	xmm0, DWORD PTR s3_y[rip]
	movss	xmm1, DWORD PTR _x_s3_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L894
	ucomiss	xmm0, xmm1
	je	.L897
.L894:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	jne	.L897
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	je	.L897
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	jne	.L897
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L897
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L897
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L229
.L897:
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	je	.L899
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L899
	movss	xmm0, DWORD PTR s3_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L899
	movss	xmm0, DWORD PTR s3_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L901
.L899:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L901
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L901
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L902
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L901
.L902:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	jne	.L901
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	je	.L901
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	jne	.L901
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	jne	.L901
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L901
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L229
.L901:
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L903
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L903
	movss	xmm0, DWORD PTR s3_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L903
	movss	xmm0, DWORD PTR s3_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L905
.L903:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L905
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L905
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L906
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L905
.L906:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	jne	.L905
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	je	.L905
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	jne	.L905
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	jne	.L905
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L905
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	jne	.L229
.L905:
	movss	xmm0, DWORD PTR s3_z[rip]
	movss	xmm1, DWORD PTR _x_s3_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L907
	ucomiss	xmm0, xmm1
	jne	.L907
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L907
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L907
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	jne	.L907
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L907
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L907
	movss	xmm0, DWORD PTR s3_x[rip]
	movss	xmm1, DWORD PTR _x_s3_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L907
	ucomiss	xmm0, xmm1
	jne	.L907
	movss	xmm0, DWORD PTR s3_y[rip]
	movss	xmm1, DWORD PTR _x_s3_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L907
	ucomiss	xmm0, xmm1
	je	.L910
.L907:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	jne	.L910
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	je	.L910
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	jne	.L910
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L910
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L910
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L229
.L910:
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	je	.L912
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L912
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	je	.L912
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	jne	.L912
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	jne	.L912
	movss	xmm0, DWORD PTR _x_s3_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L912
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L912
	movss	xmm0, DWORD PTR s3_y[rip]
	movss	xmm1, DWORD PTR _x_s3_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L912
	ucomiss	xmm0, xmm1
	jne	.L912
	movss	xmm0, DWORD PTR _x_s3_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L912
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L915
.L912:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	jne	.L915
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	je	.L915
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	je	.L915
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L915
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L915
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L229
.L915:
	movss	xmm0, DWORD PTR s3_x[rip]
	movss	xmm1, DWORD PTR _x_s3_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L917
	ucomiss	xmm0, xmm1
	jne	.L917
	movss	xmm0, DWORD PTR s3_y[rip]
	movss	xmm1, DWORD PTR _x_s3_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L917
	ucomiss	xmm0, xmm1
	jne	.L917
	movss	xmm0, DWORD PTR s3_z[rip]
	movss	xmm1, DWORD PTR _x_s3_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L917
	ucomiss	xmm0, xmm1
	jne	.L917
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	jne	.L921
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	jne	.L921
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L922
.L921:
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	je	.L917
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L917
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L922
.L917:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	je	.L922
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	jne	.L922
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	jne	.L922
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L922
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L922
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L229
.L922:
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	je	.L923
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L923
	movss	xmm0, DWORD PTR s3_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L923
	movss	xmm0, DWORD PTR s3_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L925
.L923:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L925
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L925
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L926
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L925
.L926:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	je	.L925
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	jne	.L925
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	jne	.L925
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	je	.L925
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L925
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L229
.L925:
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L927
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L927
	movss	xmm0, DWORD PTR s3_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L927
	movss	xmm0, DWORD PTR s3_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L929
.L927:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L929
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L929
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L930
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L929
.L930:
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	jne	.L929
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	jne	.L929
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	jne	.L929
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	je	.L929
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	jne	.L929
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	je	.L229
.L929:
	movss	xmm0, DWORD PTR s3_z[rip]
	movss	xmm1, DWORD PTR _x_s3_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L931
	ucomiss	xmm0, xmm1
	jne	.L931
	movss	xmm0, DWORD PTR s3_x[rip]
	movss	xmm1, DWORD PTR _x_s3_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L931
	ucomiss	xmm0, xmm1
	jne	.L931
	movss	xmm0, DWORD PTR s3_y[rip]
	movss	xmm1, DWORD PTR _x_s3_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L931
	ucomiss	xmm0, xmm1
	jne	.L931
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L931
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L931
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	jne	.L931
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	jne	.L931
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L935
.L931:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	je	.L935
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	je	.L935
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	jne	.L935
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L935
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L935
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L229
.L935:
	movzx	eax, BYTE PTR _x_s2_evt0[rip]
	test	al, al
	jne	.L936
	movzx	eax, BYTE PTR _x_s2_evt1[rip]
	test	al, al
	je	.L937
.L936:
	movzx	eax, BYTE PTR _x_s2_evt0[rip]
	test	al, al
	je	.L938
	movzx	eax, BYTE PTR _x_s2_evt1[rip]
	test	al, al
	je	.L937
.L938:
	movzx	eax, BYTE PTR _x_s2_evt1[rip]
	test	al, al
	je	.L939
	movzx	eax, BYTE PTR _x_s2_evt0[rip]
	test	al, al
	je	.L937
.L939:
	movzx	eax, BYTE PTR _x_s2_evt0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s2_evt1[rip]
	test	al, al
	je	.L229
.L937:
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	jne	.L940
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	jne	.L940
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L941
.L940:
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	jne	.L942
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L942
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L941
.L942:
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	jne	.L943
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L943
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L941
.L943:
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	jne	.L944
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L944
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	jne	.L941
.L944:
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	je	.L945
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	jne	.L945
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L941
.L945:
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	jne	.L229
.L941:
	movss	xmm1, DWORD PTR _x_s2_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L946
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	jne	.L946
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L946
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L229
.L946:
	movss	xmm1, DWORD PTR _x_s2_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L947
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	jne	.L947
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L947
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L229
.L947:
	movss	xmm1, DWORD PTR _x_s2_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L948
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	je	.L948
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L948
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L229
.L948:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L949
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s2_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s2_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s2_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s2_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s2_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s2_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L949:
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L953
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L953
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L953
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s2_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s2_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L953
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L953
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s2_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s2_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L953
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L953
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s2_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s2_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L953
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L956
.L953:
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L956
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L229
.L956:
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	je	.L958
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L958
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	jne	.L958
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L958
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	jne	.L958
	movss	xmm0, DWORD PTR _x_s2_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L958
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L958
	movss	xmm0, DWORD PTR _x_s2_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L958
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L958
	movss	xmm0, DWORD PTR s2_z[rip]
	movss	xmm1, DWORD PTR _x_s2_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L958
	ucomiss	xmm0, xmm1
	je	.L961
.L958:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	jne	.L961
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	jne	.L961
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	jne	.L961
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L961
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L961
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L229
.L961:
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	jne	.L963
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L963
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L964
.L963:
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	jne	.L965
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L965
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L965
.L964:
	movss	xmm0, DWORD PTR s2_x[rip]
	movss	xmm1, DWORD PTR _x_s2_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L965
	ucomiss	xmm0, xmm1
	jne	.L965
	movss	xmm0, DWORD PTR s2_z[rip]
	movss	xmm1, DWORD PTR _x_s2_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L965
	ucomiss	xmm0, xmm1
	jne	.L965
	movss	xmm0, DWORD PTR s2_y[rip]
	movss	xmm1, DWORD PTR _x_s2_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L965
	ucomiss	xmm0, xmm1
	je	.L968
.L965:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	jne	.L968
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	je	.L968
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	jne	.L968
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L968
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L968
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L229
.L968:
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	je	.L970
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L970
	movss	xmm0, DWORD PTR s2_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L970
	movss	xmm0, DWORD PTR s2_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L972
.L970:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L972
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L972
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L973
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L972
.L973:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	jne	.L972
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	je	.L972
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	jne	.L972
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	jne	.L972
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L972
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L229
.L972:
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L974
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L974
	movss	xmm0, DWORD PTR s2_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L974
	movss	xmm0, DWORD PTR s2_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L976
.L974:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L976
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L976
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L977
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L976
.L977:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	jne	.L976
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	je	.L976
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	jne	.L976
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	jne	.L976
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L976
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	jne	.L229
.L976:
	movss	xmm0, DWORD PTR s2_z[rip]
	movss	xmm1, DWORD PTR _x_s2_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L978
	ucomiss	xmm0, xmm1
	jne	.L978
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L978
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L978
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	jne	.L978
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L978
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L978
	movss	xmm0, DWORD PTR s2_x[rip]
	movss	xmm1, DWORD PTR _x_s2_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L978
	ucomiss	xmm0, xmm1
	jne	.L978
	movss	xmm0, DWORD PTR s2_y[rip]
	movss	xmm1, DWORD PTR _x_s2_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L978
	ucomiss	xmm0, xmm1
	je	.L981
.L978:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	jne	.L981
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	je	.L981
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	jne	.L981
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L981
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L981
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L229
.L981:
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	je	.L983
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L983
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	je	.L983
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	jne	.L983
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	jne	.L983
	movss	xmm0, DWORD PTR _x_s2_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L983
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L983
	movss	xmm0, DWORD PTR s2_y[rip]
	movss	xmm1, DWORD PTR _x_s2_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L983
	ucomiss	xmm0, xmm1
	jne	.L983
	movss	xmm0, DWORD PTR _x_s2_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L983
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L986
.L983:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	jne	.L986
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	je	.L986
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	je	.L986
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L986
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L986
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L229
.L986:
	movss	xmm0, DWORD PTR s2_x[rip]
	movss	xmm1, DWORD PTR _x_s2_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L988
	ucomiss	xmm0, xmm1
	jne	.L988
	movss	xmm0, DWORD PTR s2_y[rip]
	movss	xmm1, DWORD PTR _x_s2_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L988
	ucomiss	xmm0, xmm1
	jne	.L988
	movss	xmm0, DWORD PTR s2_z[rip]
	movss	xmm1, DWORD PTR _x_s2_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L988
	ucomiss	xmm0, xmm1
	jne	.L988
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	jne	.L992
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	jne	.L992
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L993
.L992:
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	je	.L988
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L988
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L993
.L988:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	je	.L993
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	jne	.L993
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	jne	.L993
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L993
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L993
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L229
.L993:
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	je	.L994
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L994
	movss	xmm0, DWORD PTR s2_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L994
	movss	xmm0, DWORD PTR s2_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L996
.L994:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L996
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L996
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L997
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L996
.L997:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	je	.L996
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	jne	.L996
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	jne	.L996
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	je	.L996
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L996
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L229
.L996:
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L998
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L998
	movss	xmm0, DWORD PTR s2_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L998
	movss	xmm0, DWORD PTR s2_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L1000
.L998:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1000
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1000
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L1001
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L1000
.L1001:
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	jne	.L1000
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	jne	.L1000
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	jne	.L1000
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	je	.L1000
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	jne	.L1000
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	je	.L229
.L1000:
	movss	xmm0, DWORD PTR s2_z[rip]
	movss	xmm1, DWORD PTR _x_s2_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L1002
	ucomiss	xmm0, xmm1
	jne	.L1002
	movss	xmm0, DWORD PTR s2_x[rip]
	movss	xmm1, DWORD PTR _x_s2_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L1002
	ucomiss	xmm0, xmm1
	jne	.L1002
	movss	xmm0, DWORD PTR s2_y[rip]
	movss	xmm1, DWORD PTR _x_s2_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L1002
	ucomiss	xmm0, xmm1
	jne	.L1002
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L1002
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L1002
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	jne	.L1002
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	jne	.L1002
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L1006
.L1002:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	je	.L1006
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	je	.L1006
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	jne	.L1006
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1006
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1006
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L229
.L1006:
	movzx	eax, BYTE PTR _x_s1_evt0[rip]
	test	al, al
	jne	.L1007
	movzx	eax, BYTE PTR _x_s1_evt1[rip]
	test	al, al
	je	.L1008
.L1007:
	movzx	eax, BYTE PTR _x_s1_evt0[rip]
	test	al, al
	je	.L1009
	movzx	eax, BYTE PTR _x_s1_evt1[rip]
	test	al, al
	je	.L1008
.L1009:
	movzx	eax, BYTE PTR _x_s1_evt1[rip]
	test	al, al
	je	.L1010
	movzx	eax, BYTE PTR _x_s1_evt0[rip]
	test	al, al
	je	.L1008
.L1010:
	movzx	eax, BYTE PTR _x_s1_evt0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s1_evt1[rip]
	test	al, al
	je	.L229
.L1008:
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	jne	.L1011
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	jne	.L1011
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L1012
.L1011:
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	jne	.L1013
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L1013
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L1012
.L1013:
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	jne	.L1014
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L1014
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L1012
.L1014:
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	jne	.L1015
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L1015
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	jne	.L1012
.L1015:
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	je	.L1016
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	jne	.L1016
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L1012
.L1016:
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	jne	.L229
.L1012:
	movss	xmm1, DWORD PTR _x_s1_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L1017
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	jne	.L1017
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L1017
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L229
.L1017:
	movss	xmm1, DWORD PTR _x_s1_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L1018
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	jne	.L1018
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L1018
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L229
.L1018:
	movss	xmm1, DWORD PTR _x_s1_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L1019
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	je	.L1019
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L1019
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L229
.L1019:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L1020
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s1_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s1_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s1_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s1_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s1_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s1_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L1020:
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1024
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1024
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1024
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s1_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s1_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L1024
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L1024
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s1_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s1_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L1024
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L1024
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s1_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s1_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L1024
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L1027
.L1024:
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L1027
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L229
.L1027:
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	je	.L1029
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L1029
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	jne	.L1029
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L1029
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	jne	.L1029
	movss	xmm0, DWORD PTR _x_s1_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1029
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1029
	movss	xmm0, DWORD PTR _x_s1_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1029
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1029
	movss	xmm0, DWORD PTR s1_z[rip]
	movss	xmm1, DWORD PTR _x_s1_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L1029
	ucomiss	xmm0, xmm1
	je	.L1032
.L1029:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	jne	.L1032
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	jne	.L1032
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	jne	.L1032
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1032
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1032
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L229
.L1032:
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L1034
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L1035
.L1034:
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	jne	.L1036
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L1036
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L1036
.L1035:
	movss	xmm0, DWORD PTR s1_x[rip]
	movss	xmm1, DWORD PTR _x_s1_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L1036
	ucomiss	xmm0, xmm1
	jne	.L1036
	movss	xmm0, DWORD PTR s1_z[rip]
	movss	xmm1, DWORD PTR _x_s1_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L1036
	ucomiss	xmm0, xmm1
	jne	.L1036
	movss	xmm0, DWORD PTR s1_y[rip]
	movss	xmm1, DWORD PTR _x_s1_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L1036
	ucomiss	xmm0, xmm1
	je	.L1039
.L1036:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	jne	.L1039
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	je	.L1039
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	jne	.L1039
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1039
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1039
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L229
.L1039:
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	je	.L1041
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L1041
	movss	xmm0, DWORD PTR s1_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L1041
	movss	xmm0, DWORD PTR s1_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L1043
.L1041:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1043
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1043
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L1044
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L1043
.L1044:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	jne	.L1043
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	je	.L1043
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	jne	.L1043
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	jne	.L1043
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L1043
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L229
.L1043:
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L1045
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L1045
	movss	xmm0, DWORD PTR s1_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L1045
	movss	xmm0, DWORD PTR s1_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L1047
.L1045:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1047
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1047
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L1048
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L1047
.L1048:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	jne	.L1047
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	je	.L1047
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	jne	.L1047
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	jne	.L1047
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L1047
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	jne	.L229
.L1047:
	movss	xmm0, DWORD PTR s1_z[rip]
	movss	xmm1, DWORD PTR _x_s1_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L1049
	ucomiss	xmm0, xmm1
	jne	.L1049
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L1049
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L1049
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	jne	.L1049
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L1049
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L1049
	movss	xmm0, DWORD PTR s1_x[rip]
	movss	xmm1, DWORD PTR _x_s1_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L1049
	ucomiss	xmm0, xmm1
	jne	.L1049
	movss	xmm0, DWORD PTR s1_y[rip]
	movss	xmm1, DWORD PTR _x_s1_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L1049
	ucomiss	xmm0, xmm1
	je	.L1052
.L1049:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	jne	.L1052
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	je	.L1052
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	jne	.L1052
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1052
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1052
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L229
.L1052:
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	je	.L1054
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L1054
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	je	.L1054
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	jne	.L1054
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	jne	.L1054
	movss	xmm0, DWORD PTR _x_s1_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1054
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1054
	movss	xmm0, DWORD PTR s1_y[rip]
	movss	xmm1, DWORD PTR _x_s1_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L1054
	ucomiss	xmm0, xmm1
	jne	.L1054
	movss	xmm0, DWORD PTR _x_s1_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1054
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1057
.L1054:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	jne	.L1057
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	je	.L1057
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	je	.L1057
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1057
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1057
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L229
.L1057:
	movss	xmm0, DWORD PTR s1_x[rip]
	movss	xmm1, DWORD PTR _x_s1_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L1059
	ucomiss	xmm0, xmm1
	jne	.L1059
	movss	xmm0, DWORD PTR s1_y[rip]
	movss	xmm1, DWORD PTR _x_s1_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L1059
	ucomiss	xmm0, xmm1
	jne	.L1059
	movss	xmm0, DWORD PTR s1_z[rip]
	movss	xmm1, DWORD PTR _x_s1_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L1059
	ucomiss	xmm0, xmm1
	jne	.L1059
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	jne	.L1063
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	jne	.L1063
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L1064
.L1063:
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	je	.L1059
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L1059
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L1064
.L1059:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	je	.L1064
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	jne	.L1064
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	jne	.L1064
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1064
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1064
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L229
.L1064:
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	je	.L1065
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L1065
	movss	xmm0, DWORD PTR s1_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L1065
	movss	xmm0, DWORD PTR s1_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L1067
.L1065:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1067
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1067
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L1068
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L1067
.L1068:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	je	.L1067
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	jne	.L1067
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	jne	.L1067
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	je	.L1067
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L1067
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L229
.L1067:
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L1069
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L1069
	movss	xmm0, DWORD PTR s1_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L1069
	movss	xmm0, DWORD PTR s1_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L1071
.L1069:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1071
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1071
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L1072
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L1071
.L1072:
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	jne	.L1071
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	jne	.L1071
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	jne	.L1071
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	je	.L1071
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	jne	.L1071
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	je	.L229
.L1071:
	movss	xmm0, DWORD PTR s1_z[rip]
	movss	xmm1, DWORD PTR _x_s1_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L1073
	ucomiss	xmm0, xmm1
	jne	.L1073
	movss	xmm0, DWORD PTR s1_x[rip]
	movss	xmm1, DWORD PTR _x_s1_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L1073
	ucomiss	xmm0, xmm1
	jne	.L1073
	movss	xmm0, DWORD PTR s1_y[rip]
	movss	xmm1, DWORD PTR _x_s1_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L1073
	ucomiss	xmm0, xmm1
	jne	.L1073
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L1073
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L1073
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	jne	.L1073
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	jne	.L1073
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L1077
.L1073:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	je	.L1077
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	je	.L1077
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	jne	.L1077
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1077
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1077
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L229
.L1077:
	movzx	eax, BYTE PTR _x_s0_evt0[rip]
	test	al, al
	jne	.L1078
	movzx	eax, BYTE PTR _x_s0_evt1[rip]
	test	al, al
	je	.L1079
.L1078:
	movzx	eax, BYTE PTR _x_s0_evt0[rip]
	test	al, al
	je	.L1080
	movzx	eax, BYTE PTR _x_s0_evt1[rip]
	test	al, al
	je	.L1079
.L1080:
	movzx	eax, BYTE PTR _x_s0_evt1[rip]
	test	al, al
	je	.L1081
	movzx	eax, BYTE PTR _x_s0_evt0[rip]
	test	al, al
	je	.L1079
.L1081:
	movzx	eax, BYTE PTR _x_s0_evt0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s0_evt1[rip]
	test	al, al
	je	.L229
.L1079:
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	jne	.L1082
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	jne	.L1082
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L1083
.L1082:
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	jne	.L1084
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L1084
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L1083
.L1084:
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	jne	.L1085
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L1085
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L1083
.L1085:
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	jne	.L1086
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L1086
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	jne	.L1083
.L1086:
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	je	.L1087
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	jne	.L1087
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L1083
.L1087:
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	jne	.L229
.L1083:
	movss	xmm1, DWORD PTR _x_s0_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L1088
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	jne	.L1088
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L1088
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L229
.L1088:
	movss	xmm1, DWORD PTR _x_s0_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L1089
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	jne	.L1089
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L1089
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L229
.L1089:
	movss	xmm1, DWORD PTR _x_s0_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L1090
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	je	.L1090
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L1090
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L229
.L1090:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L1091
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s0_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s0_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s0_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s0_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s0_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s0_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L1091:
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1095
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1095
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1095
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s0_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s0_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L1095
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L1095
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s0_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s0_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L1095
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L1095
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s0_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s0_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L1095
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L1098
.L1095:
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L1098
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L229
.L1098:
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	je	.L1100
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L1100
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	jne	.L1100
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L1100
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	jne	.L1100
	movss	xmm0, DWORD PTR _x_s0_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1100
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1100
	movss	xmm0, DWORD PTR _x_s0_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1100
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1100
	movss	xmm0, DWORD PTR s0_z[rip]
	movss	xmm1, DWORD PTR _x_s0_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L1100
	ucomiss	xmm0, xmm1
	je	.L1103
.L1100:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	jne	.L1103
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	jne	.L1103
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	jne	.L1103
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1103
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1103
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L229
.L1103:
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	jne	.L1105
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L1105
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L1106
.L1105:
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	jne	.L1107
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L1107
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L1107
.L1106:
	movss	xmm0, DWORD PTR s0_x[rip]
	movss	xmm1, DWORD PTR _x_s0_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L1107
	ucomiss	xmm0, xmm1
	jne	.L1107
	movss	xmm0, DWORD PTR s0_z[rip]
	movss	xmm1, DWORD PTR _x_s0_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L1107
	ucomiss	xmm0, xmm1
	jne	.L1107
	movss	xmm0, DWORD PTR s0_y[rip]
	movss	xmm1, DWORD PTR _x_s0_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L1107
	ucomiss	xmm0, xmm1
	je	.L1110
.L1107:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	jne	.L1110
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	je	.L1110
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	jne	.L1110
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1110
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1110
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L229
.L1110:
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	je	.L1112
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L1112
	movss	xmm0, DWORD PTR s0_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L1112
	movss	xmm0, DWORD PTR s0_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L1114
.L1112:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1114
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1114
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L1115
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L1114
.L1115:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	jne	.L1114
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	je	.L1114
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	jne	.L1114
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	jne	.L1114
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L1114
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L229
.L1114:
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L1116
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L1116
	movss	xmm0, DWORD PTR s0_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L1116
	movss	xmm0, DWORD PTR s0_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L1118
.L1116:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1118
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1118
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L1119
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L1118
.L1119:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	jne	.L1118
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	je	.L1118
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	jne	.L1118
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	jne	.L1118
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L1118
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	jne	.L229
.L1118:
	movss	xmm0, DWORD PTR s0_z[rip]
	movss	xmm1, DWORD PTR _x_s0_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L1120
	ucomiss	xmm0, xmm1
	jne	.L1120
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L1120
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L1120
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	jne	.L1120
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L1120
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L1120
	movss	xmm0, DWORD PTR s0_x[rip]
	movss	xmm1, DWORD PTR _x_s0_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L1120
	ucomiss	xmm0, xmm1
	jne	.L1120
	movss	xmm0, DWORD PTR s0_y[rip]
	movss	xmm1, DWORD PTR _x_s0_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L1120
	ucomiss	xmm0, xmm1
	je	.L1123
.L1120:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	jne	.L1123
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	je	.L1123
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	jne	.L1123
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1123
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1123
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L229
.L1123:
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	je	.L1125
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L1125
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	je	.L1125
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	jne	.L1125
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	jne	.L1125
	movss	xmm0, DWORD PTR _x_s0_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1125
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1125
	movss	xmm0, DWORD PTR s0_y[rip]
	movss	xmm1, DWORD PTR _x_s0_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L1125
	ucomiss	xmm0, xmm1
	jne	.L1125
	movss	xmm0, DWORD PTR _x_s0_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1125
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1128
.L1125:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	jne	.L1128
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	je	.L1128
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	je	.L1128
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1128
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1128
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L229
.L1128:
	movss	xmm0, DWORD PTR s0_x[rip]
	movss	xmm1, DWORD PTR _x_s0_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L1130
	ucomiss	xmm0, xmm1
	jne	.L1130
	movss	xmm0, DWORD PTR s0_y[rip]
	movss	xmm1, DWORD PTR _x_s0_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L1130
	ucomiss	xmm0, xmm1
	jne	.L1130
	movss	xmm0, DWORD PTR s0_z[rip]
	movss	xmm1, DWORD PTR _x_s0_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L1130
	ucomiss	xmm0, xmm1
	jne	.L1130
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	jne	.L1134
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	jne	.L1134
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L1135
.L1134:
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	je	.L1130
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L1130
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L1135
.L1130:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	je	.L1135
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	jne	.L1135
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	jne	.L1135
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1135
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1135
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L229
.L1135:
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	je	.L1136
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L1136
	movss	xmm0, DWORD PTR s0_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L1136
	movss	xmm0, DWORD PTR s0_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L1138
.L1136:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1138
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1138
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L1139
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L1138
.L1139:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	je	.L1138
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	jne	.L1138
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	jne	.L1138
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	je	.L1138
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L1138
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L229
.L1138:
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L1140
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L1140
	movss	xmm0, DWORD PTR s0_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L1140
	movss	xmm0, DWORD PTR s0_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L1142
.L1140:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1142
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1142
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L1143
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L1142
.L1143:
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	jne	.L1142
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	jne	.L1142
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	jne	.L1142
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	je	.L1142
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	jne	.L1142
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	je	.L229
.L1142:
	movss	xmm0, DWORD PTR s0_z[rip]
	movss	xmm1, DWORD PTR _x_s0_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L1144
	ucomiss	xmm0, xmm1
	jne	.L1144
	movss	xmm0, DWORD PTR s0_x[rip]
	movss	xmm1, DWORD PTR _x_s0_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L1144
	ucomiss	xmm0, xmm1
	jne	.L1144
	movss	xmm0, DWORD PTR s0_y[rip]
	movss	xmm1, DWORD PTR _x_s0_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L1144
	ucomiss	xmm0, xmm1
	jne	.L1144
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L1144
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L1144
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	jne	.L1144
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	jne	.L1144
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L1148
.L1144:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	je	.L1148
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	je	.L1148
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	jne	.L1148
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1148
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1148
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L229
.L1148:
	mov	eax, DWORD PTR _x_r_evt_id[rip]
	test	eax, eax
	je	.L1149
	mov	eax, DWORD PTR _x_r_evt_id[rip]
	cmp	eax, 1
	je	.L1149
	mov	eax, DWORD PTR _x_r_evt_id[rip]
	cmp	eax, 2
	je	.L1149
	mov	eax, DWORD PTR _x_r_evt_id[rip]
	cmp	eax, 3
	je	.L1149
	mov	eax, DWORD PTR _x_r_evt_id[rip]
	cmp	eax, 4
	je	.L1149
	mov	eax, DWORD PTR _x_r_evt_id[rip]
	cmp	eax, 5
	je	.L1149
	mov	eax, DWORD PTR _x_r_evt_id[rip]
	cmp	eax, 6
	je	.L1149
	mov	eax, DWORD PTR _x_r_evt_id[rip]
	cmp	eax, 7
	je	.L1149
	mov	eax, DWORD PTR _x_r_evt_id[rip]
	cmp	eax, 8
	je	.L1149
	mov	eax, DWORD PTR _x_r_evt_id[rip]
	cmp	eax, 9
	je	.L1149
	mov	eax, DWORD PTR _x_r_evt_id[rip]
	cmp	eax, 10
	je	.L1149
	mov	eax, DWORD PTR _x_r_evt_id[rip]
	cmp	eax, 11
	je	.L1149
	mov	eax, DWORD PTR _x_r_evt_id[rip]
	cmp	eax, 12
	jne	.L229
.L1149:
	mov	eax, DWORD PTR _x_r_counter[rip]
	test	eax, eax
	je	.L1150
	mov	eax, DWORD PTR _x_r_counter[rip]
	cmp	eax, 1
	je	.L1150
	mov	eax, DWORD PTR _x_r_counter[rip]
	cmp	eax, 2
	je	.L1150
	mov	eax, DWORD PTR _x_r_counter[rip]
	cmp	eax, 3
	je	.L1150
	mov	eax, DWORD PTR _x_r_counter[rip]
	cmp	eax, 4
	je	.L1150
	mov	eax, DWORD PTR _x_r_counter[rip]
	cmp	eax, 5
	je	.L1150
	mov	eax, DWORD PTR _x_r_counter[rip]
	cmp	eax, 6
	je	.L1150
	mov	eax, DWORD PTR _x_r_counter[rip]
	cmp	eax, 7
	je	.L1150
	mov	eax, DWORD PTR _x_r_counter[rip]
	cmp	eax, 8
	je	.L1150
	mov	eax, DWORD PTR _x_r_counter[rip]
	cmp	eax, 9
	je	.L1150
	mov	eax, DWORD PTR _x_r_counter[rip]
	cmp	eax, 10
	je	.L1150
	mov	eax, DWORD PTR _x_r_counter[rip]
	cmp	eax, 11
	je	.L1150
	mov	eax, DWORD PTR _x_r_counter[rip]
	cmp	eax, 12
	jne	.L229
.L1150:
	movzx	eax, BYTE PTR _x_r_l[rip]
	test	al, al
	je	.L1151
	movss	xmm1, DWORD PTR _x_r_x[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L229
.L1151:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L1153
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR r_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_r_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
	movzx	eax, BYTE PTR r_l[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_r_l[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	mov	edx, DWORD PTR r_counter[rip]
	mov	eax, DWORD PTR _x_r_counter[rip]
	cmp	edx, eax
	jne	.L229
.L1153:
	movzx	eax, BYTE PTR r_l[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_r_l[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1155
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR r_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_r_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L1155
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L1155
	mov	edx, DWORD PTR r_counter[rip]
	mov	eax, DWORD PTR _x_r_counter[rip]
	cmp	edx, eax
	je	.L1157
.L1155:
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L1157
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L229
.L1157:
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L1158
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L1158
	movss	xmm1, DWORD PTR r_x[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L1158
	movzx	eax, BYTE PTR _x_r_l[rip]
	test	al, al
	jne	.L1158
	mov	edx, DWORD PTR r_evt_id[rip]
	mov	eax, DWORD PTR r_counter[rip]
	cmp	edx, eax
	jne	.L1158
	mov	edx, DWORD PTR r_counter[rip]
	mov	eax, DWORD PTR _x_r_counter[rip]
	cmp	edx, eax
	jne	.L1158
	movss	xmm0, DWORD PTR r_x[rip]
	movss	xmm1, DWORD PTR _x_r_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L1158
	ucomiss	xmm0, xmm1
	je	.L1160
.L1158:
	movzx	eax, BYTE PTR r_l[rip]
	test	al, al
	je	.L1160
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L1162
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L1160
.L1162:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1160
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L229
.L1160:
	movzx	eax, BYTE PTR _x_r_l[rip]
	test	al, al
	je	.L1164
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	je	.L1164
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	jne	.L1164
	mov	edx, DWORD PTR r_evt_id[rip]
	mov	eax, DWORD PTR r_counter[rip]
	cmp	edx, eax
	jne	.L1164
	movss	xmm0, DWORD PTR _x_r_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1164
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1164
	mov	eax, DWORD PTR r_counter[rip]
	mov	edx, DWORD PTR _x_r_counter[rip]
	sub	eax, edx
	cmp	eax, -1
	je	.L1166
.L1164:
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L1167
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L1166
.L1167:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1166
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1166
	movzx	eax, BYTE PTR r_l[rip]
	test	al, al
	jne	.L1166
	mov	eax, DWORD PTR r_counter[rip]
	cmp	eax, 11
	jle	.L229
.L1166:
	movzx	eax, BYTE PTR _x_r_l[rip]
	test	al, al
	je	.L1168
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	je	.L1168
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	jne	.L1168
	mov	edx, DWORD PTR r_evt_id[rip]
	mov	eax, DWORD PTR r_counter[rip]
	cmp	edx, eax
	jne	.L1168
	mov	eax, DWORD PTR _x_r_counter[rip]
	test	eax, eax
	jne	.L1168
	movss	xmm0, DWORD PTR _x_r_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1168
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1169
.L1168:
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L1171
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L1169
.L1171:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1169
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1169
	movzx	eax, BYTE PTR r_l[rip]
	test	al, al
	jne	.L1169
	mov	eax, DWORD PTR r_counter[rip]
	cmp	eax, 12
	je	.L229
.L1169:
	movss	xmm0, DWORD PTR _x_delta[rip]
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jb	.L229
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L1173
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L1173
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L1173
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L1173
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L1173
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L1173
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L1173
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L1173
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L1173
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L1173
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L1173
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L1173
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L1173
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L1173
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L1173
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L1173
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L1173
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L1173
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L1173
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L1173
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L1173
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L1173
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L1173
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L1173
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L1173
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	jne	.L1173
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L1173
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L1173
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1173
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L229
.L1173:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1175
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1175
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L1176
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L1176
	mov	eax, 1
	jmp	.L1177
.L1176:
	mov	eax, 0
.L1177:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	je	.L1178
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	jne	.L1178
	mov	eax, DWORD PTR r_evt_id[rip]
	test	eax, eax
	jne	.L1178
	mov	eax, 1
	jmp	.L1179
.L1178:
	mov	eax, 0
.L1179:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L229
.L1175:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1180
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1180
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	je	.L1181
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L1181
	mov	eax, 1
	jmp	.L1182
.L1181:
	mov	eax, 0
.L1182:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L1183
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L1183
	mov	eax, DWORD PTR r_evt_id[rip]
	test	eax, eax
	jne	.L1183
	mov	eax, 1
	jmp	.L1184
.L1183:
	mov	eax, 0
.L1184:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L229
.L1180:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1185
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1185
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L1186
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L1186
	mov	eax, 1
	jmp	.L1187
.L1186:
	mov	eax, 0
.L1187:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	je	.L1188
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	jne	.L1188
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 1
	jne	.L1188
	mov	eax, 1
	jmp	.L1189
.L1188:
	mov	eax, 0
.L1189:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L229
.L1185:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1190
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1190
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	je	.L1191
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L1191
	mov	eax, 1
	jmp	.L1192
.L1191:
	mov	eax, 0
.L1192:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L1193
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L1193
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 1
	jne	.L1193
	mov	eax, 1
	jmp	.L1194
.L1193:
	mov	eax, 0
.L1194:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L229
.L1190:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1195
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1195
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L1196
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L1196
	mov	eax, 1
	jmp	.L1197
.L1196:
	mov	eax, 0
.L1197:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	je	.L1198
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	jne	.L1198
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 2
	jne	.L1198
	mov	eax, 1
	jmp	.L1199
.L1198:
	mov	eax, 0
.L1199:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L229
.L1195:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1200
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1200
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	je	.L1201
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L1201
	mov	eax, 1
	jmp	.L1202
.L1201:
	mov	eax, 0
.L1202:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L1203
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L1203
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 2
	jne	.L1203
	mov	eax, 1
	jmp	.L1204
.L1203:
	mov	eax, 0
.L1204:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L229
.L1200:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1205
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1205
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L1206
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L1206
	mov	eax, 1
	jmp	.L1207
.L1206:
	mov	eax, 0
.L1207:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	je	.L1208
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	jne	.L1208
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 3
	jne	.L1208
	mov	eax, 1
	jmp	.L1209
.L1208:
	mov	eax, 0
.L1209:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L229
.L1205:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1210
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1210
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	je	.L1211
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L1211
	mov	eax, 1
	jmp	.L1212
.L1211:
	mov	eax, 0
.L1212:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L1213
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L1213
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 3
	jne	.L1213
	mov	eax, 1
	jmp	.L1214
.L1213:
	mov	eax, 0
.L1214:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L229
.L1210:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1215
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1215
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L1216
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L1216
	mov	eax, 1
	jmp	.L1217
.L1216:
	mov	eax, 0
.L1217:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	je	.L1218
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	jne	.L1218
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 4
	jne	.L1218
	mov	eax, 1
	jmp	.L1219
.L1218:
	mov	eax, 0
.L1219:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L229
.L1215:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1220
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1220
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	je	.L1221
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L1221
	mov	eax, 1
	jmp	.L1222
.L1221:
	mov	eax, 0
.L1222:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L1223
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L1223
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 4
	jne	.L1223
	mov	eax, 1
	jmp	.L1224
.L1223:
	mov	eax, 0
.L1224:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L229
.L1220:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1225
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1225
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L1226
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L1226
	mov	eax, 1
	jmp	.L1227
.L1226:
	mov	eax, 0
.L1227:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	je	.L1228
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	jne	.L1228
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 5
	jne	.L1228
	mov	eax, 1
	jmp	.L1229
.L1228:
	mov	eax, 0
.L1229:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L229
.L1225:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1230
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1230
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	je	.L1231
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L1231
	mov	eax, 1
	jmp	.L1232
.L1231:
	mov	eax, 0
.L1232:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L1233
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L1233
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 5
	jne	.L1233
	mov	eax, 1
	jmp	.L1234
.L1233:
	mov	eax, 0
.L1234:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L229
.L1230:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1235
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1235
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L1236
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L1236
	mov	eax, 1
	jmp	.L1237
.L1236:
	mov	eax, 0
.L1237:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	je	.L1238
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	jne	.L1238
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 6
	jne	.L1238
	mov	eax, 1
	jmp	.L1239
.L1238:
	mov	eax, 0
.L1239:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L229
.L1235:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1240
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1240
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	je	.L1241
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L1241
	mov	eax, 1
	jmp	.L1242
.L1241:
	mov	eax, 0
.L1242:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L1243
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L1243
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 6
	jne	.L1243
	mov	eax, 1
	jmp	.L1244
.L1243:
	mov	eax, 0
.L1244:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L229
.L1240:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1245
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1245
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L1246
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L1246
	mov	eax, 1
	jmp	.L1247
.L1246:
	mov	eax, 0
.L1247:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	je	.L1248
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	jne	.L1248
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 7
	jne	.L1248
	mov	eax, 1
	jmp	.L1249
.L1248:
	mov	eax, 0
.L1249:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L229
.L1245:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1250
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1250
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	je	.L1251
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L1251
	mov	eax, 1
	jmp	.L1252
.L1251:
	mov	eax, 0
.L1252:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L1253
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L1253
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 7
	jne	.L1253
	mov	eax, 1
	jmp	.L1254
.L1253:
	mov	eax, 0
.L1254:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L229
.L1250:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1255
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1255
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L1256
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L1256
	mov	eax, 1
	jmp	.L1257
.L1256:
	mov	eax, 0
.L1257:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	je	.L1258
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	jne	.L1258
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 8
	jne	.L1258
	mov	eax, 1
	jmp	.L1259
.L1258:
	mov	eax, 0
.L1259:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L229
.L1255:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1260
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1260
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	je	.L1261
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L1261
	mov	eax, 1
	jmp	.L1262
.L1261:
	mov	eax, 0
.L1262:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L1263
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L1263
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 8
	jne	.L1263
	mov	eax, 1
	jmp	.L1264
.L1263:
	mov	eax, 0
.L1264:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L229
.L1260:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1265
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1265
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L1266
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L1266
	mov	eax, 1
	jmp	.L1267
.L1266:
	mov	eax, 0
.L1267:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	je	.L1268
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	jne	.L1268
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 9
	jne	.L1268
	mov	eax, 1
	jmp	.L1269
.L1268:
	mov	eax, 0
.L1269:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L229
.L1265:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1270
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1270
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	je	.L1271
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L1271
	mov	eax, 1
	jmp	.L1272
.L1271:
	mov	eax, 0
.L1272:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L1273
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L1273
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 9
	jne	.L1273
	mov	eax, 1
	jmp	.L1274
.L1273:
	mov	eax, 0
.L1274:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L229
.L1270:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1275
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1275
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L1276
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L1276
	mov	eax, 1
	jmp	.L1277
.L1276:
	mov	eax, 0
.L1277:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	je	.L1278
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	jne	.L1278
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 10
	jne	.L1278
	mov	eax, 1
	jmp	.L1279
.L1278:
	mov	eax, 0
.L1279:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L229
.L1275:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1280
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1280
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	je	.L1281
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L1281
	mov	eax, 1
	jmp	.L1282
.L1281:
	mov	eax, 0
.L1282:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L1283
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L1283
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 10
	jne	.L1283
	mov	eax, 1
	jmp	.L1284
.L1283:
	mov	eax, 0
.L1284:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L229
.L1280:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1285
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1285
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L1286
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L1286
	mov	eax, 1
	jmp	.L1287
.L1286:
	mov	eax, 0
.L1287:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	je	.L1288
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	jne	.L1288
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 11
	jne	.L1288
	mov	eax, 1
	jmp	.L1289
.L1288:
	mov	eax, 0
.L1289:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L229
.L1285:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1290
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1290
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	je	.L1291
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L1291
	mov	eax, 1
	jmp	.L1292
.L1291:
	mov	eax, 0
.L1292:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L1293
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L1293
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 11
	jne	.L1293
	mov	eax, 1
	jmp	.L1294
.L1293:
	mov	eax, 0
.L1294:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L229
.L1290:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1295
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1295
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L1296
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L1296
	mov	eax, 1
	jmp	.L1297
.L1296:
	mov	eax, 0
.L1297:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	je	.L1298
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	jne	.L1298
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 12
	jne	.L1298
	mov	eax, 1
	jmp	.L1299
.L1298:
	mov	eax, 0
.L1299:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L229
.L1295:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1300
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1300
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	je	.L1301
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L1301
	mov	eax, 1
	jmp	.L1302
.L1301:
	mov	eax, 0
.L1302:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L1303
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L1303
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 12
	jne	.L1303
	mov	eax, 1
	jmp	.L1304
.L1303:
	mov	eax, 0
.L1304:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L229
.L1300:
	movss	xmm0, DWORD PTR delta[rip]
	movss	xmm1, DWORD PTR _x__diverge_delta[rip]
	ucomiss	xmm0, xmm1
	jp	.L1645
	ucomiss	xmm0, xmm1
	je	.L1305
.L1645:
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	movss	xmm1, DWORD PTR .LC4[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L229
.L1305:
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	movss	xmm1, DWORD PTR .LC4[rip]
	comiss	xmm0, xmm1
	jnb	.L1307
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x__diverge_delta[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L1307:
	mov	eax, 1
	jmp	.L1309
.L229:
	mov	eax, 0
.L1309:
	mov	DWORD PTR -4[rbp], eax
	movss	xmm0, DWORD PTR _x_s12_z[rip]
	movss	DWORD PTR s12_z[rip], xmm0
	movss	xmm0, DWORD PTR _x_s12_y[rip]
	movss	DWORD PTR s12_y[rip], xmm0
	movss	xmm0, DWORD PTR _x_s12_x[rip]
	movss	DWORD PTR s12_x[rip], xmm0
	movss	xmm0, DWORD PTR _x_s11_z[rip]
	movss	DWORD PTR s11_z[rip], xmm0
	movss	xmm0, DWORD PTR _x_s11_y[rip]
	movss	DWORD PTR s11_y[rip], xmm0
	movss	xmm0, DWORD PTR _x_s11_x[rip]
	movss	DWORD PTR s11_x[rip], xmm0
	movss	xmm0, DWORD PTR _x_s10_z[rip]
	movss	DWORD PTR s10_z[rip], xmm0
	movss	xmm0, DWORD PTR _x_s10_y[rip]
	movss	DWORD PTR s10_y[rip], xmm0
	movss	xmm0, DWORD PTR _x_s10_x[rip]
	movss	DWORD PTR s10_x[rip], xmm0
	movss	xmm0, DWORD PTR _x_s9_z[rip]
	movss	DWORD PTR s9_z[rip], xmm0
	movss	xmm0, DWORD PTR _x_s9_y[rip]
	movss	DWORD PTR s9_y[rip], xmm0
	movss	xmm0, DWORD PTR _x_s9_x[rip]
	movss	DWORD PTR s9_x[rip], xmm0
	movss	xmm0, DWORD PTR _x_s8_z[rip]
	movss	DWORD PTR s8_z[rip], xmm0
	movss	xmm0, DWORD PTR _x_s8_y[rip]
	movss	DWORD PTR s8_y[rip], xmm0
	movss	xmm0, DWORD PTR _x_s8_x[rip]
	movss	DWORD PTR s8_x[rip], xmm0
	movss	xmm0, DWORD PTR _x_s7_z[rip]
	movss	DWORD PTR s7_z[rip], xmm0
	movss	xmm0, DWORD PTR _x_s7_y[rip]
	movss	DWORD PTR s7_y[rip], xmm0
	movss	xmm0, DWORD PTR _x_s7_x[rip]
	movss	DWORD PTR s7_x[rip], xmm0
	movzx	eax, BYTE PTR _x_s2_evt0[rip]
	mov	BYTE PTR s2_evt0[rip], al
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	mov	BYTE PTR s1_l2[rip], al
	movzx	eax, BYTE PTR _x_s7_evt1[rip]
	mov	BYTE PTR s7_evt1[rip], al
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	mov	BYTE PTR s4_l1[rip], al
	movzx	eax, BYTE PTR _x_s7_evt0[rip]
	mov	BYTE PTR s7_evt0[rip], al
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	mov	BYTE PTR s4_l0[rip], al
	movzx	eax, BYTE PTR _x_s2_evt1[rip]
	mov	BYTE PTR s2_evt1[rip], al
	movzx	eax, BYTE PTR _x_s12_l2[rip]
	mov	BYTE PTR s12_l2[rip], al
	movss	xmm0, DWORD PTR _x_s6_z[rip]
	movss	DWORD PTR s6_z[rip], xmm0
	movzx	eax, BYTE PTR _x_s1_evt0[rip]
	mov	BYTE PTR s1_evt0[rip], al
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	mov	BYTE PTR s7_l2[rip], al
	movss	xmm0, DWORD PTR _x_s1_z[rip]
	movss	DWORD PTR s1_z[rip], xmm0
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	mov	BYTE PTR s10_l1[rip], al
	movss	xmm0, DWORD PTR _x_s4_y[rip]
	movss	DWORD PTR s4_y[rip], xmm0
	movzx	eax, BYTE PTR _x_s10_evt1[rip]
	mov	BYTE PTR s10_evt1[rip], al
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	mov	BYTE PTR s7_l1[rip], al
	movss	xmm0, DWORD PTR _x_s1_y[rip]
	movss	DWORD PTR s1_y[rip], xmm0
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	mov	BYTE PTR s10_l0[rip], al
	movss	xmm0, DWORD PTR _x_s4_x[rip]
	movss	DWORD PTR s4_x[rip], xmm0
	movzx	eax, BYTE PTR _x_s10_evt0[rip]
	mov	BYTE PTR s10_evt0[rip], al
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	mov	BYTE PTR s7_l0[rip], al
	movss	xmm0, DWORD PTR _x_s1_x[rip]
	movss	DWORD PTR s1_x[rip], xmm0
	movzx	eax, BYTE PTR _x_s11_evt1[rip]
	mov	BYTE PTR s11_evt1[rip], al
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	mov	BYTE PTR s8_l1[rip], al
	movss	xmm0, DWORD PTR _x_s2_y[rip]
	movss	DWORD PTR s2_y[rip], xmm0
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	mov	BYTE PTR s11_l0[rip], al
	movss	xmm0, DWORD PTR _x_s5_x[rip]
	movss	DWORD PTR s5_x[rip], xmm0
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	mov	BYTE PTR s0_l2[rip], al
	movzx	eax, BYTE PTR _x_s6_evt1[rip]
	mov	BYTE PTR s6_evt1[rip], al
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	mov	BYTE PTR s3_l1[rip], al
	movzx	eax, BYTE PTR _x_s11_evt0[rip]
	mov	BYTE PTR s11_evt0[rip], al
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	mov	BYTE PTR s8_l0[rip], al
	movss	xmm0, DWORD PTR _x_s2_x[rip]
	movss	DWORD PTR s2_x[rip], xmm0
	movzx	eax, BYTE PTR _x_s8_l2[rip]
	mov	BYTE PTR s8_l2[rip], al
	movss	xmm0, DWORD PTR _x_s2_z[rip]
	movss	DWORD PTR s2_z[rip], xmm0
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	mov	BYTE PTR s11_l1[rip], al
	movss	xmm0, DWORD PTR _x_s5_y[rip]
	movss	DWORD PTR s5_y[rip], xmm0
	movss	xmm0, DWORD PTR _x_delta[rip]
	movss	DWORD PTR delta[rip], xmm0
	movzx	eax, BYTE PTR _x_s9_evt1[rip]
	mov	BYTE PTR s9_evt1[rip], al
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	mov	BYTE PTR s6_l1[rip], al
	movss	xmm0, DWORD PTR _x_s0_y[rip]
	movss	DWORD PTR s0_y[rip], xmm0
	mov	eax, DWORD PTR _x_r_evt_id[rip]
	mov	DWORD PTR r_evt_id[rip], eax
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	mov	BYTE PTR s1_l1[rip], al
	movzx	eax, BYTE PTR _x_s4_evt1[rip]
	mov	BYTE PTR s4_evt1[rip], al
	movzx	eax, BYTE PTR _x_s1_evt1[rip]
	mov	BYTE PTR s1_evt1[rip], al
	movzx	eax, BYTE PTR _x_r_l[rip]
	mov	BYTE PTR r_l[rip], al
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	mov	BYTE PTR s1_l0[rip], al
	movzx	eax, BYTE PTR _x_s4_evt0[rip]
	mov	BYTE PTR s4_evt0[rip], al
	movzx	eax, BYTE PTR _x_s11_l2[rip]
	mov	BYTE PTR s11_l2[rip], al
	movss	xmm0, DWORD PTR _x_s5_z[rip]
	movss	DWORD PTR s5_z[rip], xmm0
	movzx	eax, BYTE PTR _x_s12_evt0[rip]
	mov	BYTE PTR s12_evt0[rip], al
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	mov	BYTE PTR s9_l0[rip], al
	movss	xmm0, DWORD PTR _x_s3_x[rip]
	movss	DWORD PTR s3_x[rip], xmm0
	mov	eax, DWORD PTR _x_r_counter[rip]
	mov	DWORD PTR r_counter[rip], eax
	movzx	eax, BYTE PTR _x_s5_evt0[rip]
	mov	BYTE PTR s5_evt0[rip], al
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	mov	BYTE PTR s2_l0[rip], al
	movzx	eax, BYTE PTR _x_r_event0[rip]
	mov	BYTE PTR r_event0[rip], al
	movss	xmm0, DWORD PTR _x__diverge_delta[rip]
	movss	DWORD PTR _diverge_delta[rip], xmm0
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	mov	BYTE PTR s6_l2[rip], al
	movss	xmm0, DWORD PTR _x_s0_z[rip]
	movss	DWORD PTR s0_z[rip], xmm0
	movzx	eax, BYTE PTR _x_s12_evt1[rip]
	mov	BYTE PTR s12_evt1[rip], al
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	mov	BYTE PTR s9_l1[rip], al
	movss	xmm0, DWORD PTR _x_r_x[rip]
	movss	DWORD PTR r_x[rip], xmm0
	movss	xmm0, DWORD PTR _x_s3_y[rip]
	movss	DWORD PTR s3_y[rip], xmm0
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	mov	BYTE PTR s12_l0[rip], al
	movss	xmm0, DWORD PTR _x_s6_x[rip]
	movss	DWORD PTR s6_x[rip], xmm0
	movzx	eax, BYTE PTR _x_s0_evt0[rip]
	mov	BYTE PTR s0_evt0[rip], al
	movzx	eax, BYTE PTR _x_s9_evt0[rip]
	mov	BYTE PTR s9_evt0[rip], al
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	mov	BYTE PTR s6_l0[rip], al
	movss	xmm0, DWORD PTR _x_s0_x[rip]
	movss	DWORD PTR s0_x[rip], xmm0
	movzx	eax, BYTE PTR _x_r_event1[rip]
	mov	BYTE PTR r_event1[rip], al
	movzx	eax, BYTE PTR _x_s0_evt1[rip]
	mov	BYTE PTR s0_evt1[rip], al
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	mov	BYTE PTR s0_l0[rip], al
	movzx	eax, BYTE PTR _x_s3_evt0[rip]
	mov	BYTE PTR s3_evt0[rip], al
	movzx	eax, BYTE PTR _x_s8_evt0[rip]
	mov	BYTE PTR s8_evt0[rip], al
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	mov	BYTE PTR s5_l0[rip], al
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	mov	BYTE PTR s2_l2[rip], al
	movzx	eax, BYTE PTR _x_s8_evt1[rip]
	mov	BYTE PTR s8_evt1[rip], al
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	mov	BYTE PTR s5_l1[rip], al
	movzx	eax, BYTE PTR _x_s9_l2[rip]
	mov	BYTE PTR s9_l2[rip], al
	movss	xmm0, DWORD PTR _x_s3_z[rip]
	movss	DWORD PTR s3_z[rip], xmm0
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	mov	BYTE PTR s12_l1[rip], al
	movss	xmm0, DWORD PTR _x_s6_y[rip]
	movss	DWORD PTR s6_y[rip], xmm0
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	mov	BYTE PTR s0_l1[rip], al
	movzx	eax, BYTE PTR _x_s3_evt1[rip]
	mov	BYTE PTR s3_evt1[rip], al
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	mov	BYTE PTR s3_l0[rip], al
	movzx	eax, BYTE PTR _x_s6_evt0[rip]
	mov	BYTE PTR s6_evt0[rip], al
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	mov	BYTE PTR s3_l2[rip], al
	movzx	eax, BYTE PTR _x_s10_l2[rip]
	mov	BYTE PTR s10_l2[rip], al
	movss	xmm0, DWORD PTR _x_s4_z[rip]
	movss	DWORD PTR s4_z[rip], xmm0
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	mov	BYTE PTR s4_l2[rip], al
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	mov	BYTE PTR s2_l1[rip], al
	movzx	eax, BYTE PTR _x_s5_evt1[rip]
	mov	BYTE PTR s5_evt1[rip], al
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	mov	BYTE PTR s5_l2[rip], al
.L224:
	cmp	DWORD PTR -4[rbp], 0
	jne	.L1310
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	main, .-main
	.section	.rodata
	.align 4
.LC1:
	.long	1101004800
	.align 4
.LC2:
	.long	1123024896
	.align 4
.LC4:
	.long	1065353216
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"117327952.c"
	.text
	.align	2
	.global	__VERIFIER_nondet_bool
	.syntax unified
	.arm
	.fpu softvfp
	.type	__VERIFIER_nondet_bool, %function
__VERIFIER_nondet_bool:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	pop	{fp, pc}
	.size	__VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
	.comm	s12_z,4,4
	.comm	_x_s12_z,4,4
	.comm	s12_y,4,4
	.comm	_x_s12_y,4,4
	.comm	s12_x,4,4
	.comm	_x_s12_x,4,4
	.comm	s11_z,4,4
	.comm	_x_s11_z,4,4
	.comm	s11_y,4,4
	.comm	_x_s11_y,4,4
	.comm	s11_x,4,4
	.comm	_x_s11_x,4,4
	.comm	s10_z,4,4
	.comm	_x_s10_z,4,4
	.comm	s10_y,4,4
	.comm	_x_s10_y,4,4
	.comm	s10_x,4,4
	.comm	_x_s10_x,4,4
	.comm	s9_z,4,4
	.comm	_x_s9_z,4,4
	.comm	s9_y,4,4
	.comm	_x_s9_y,4,4
	.comm	s9_x,4,4
	.comm	_x_s9_x,4,4
	.comm	s8_z,4,4
	.comm	_x_s8_z,4,4
	.comm	s8_y,4,4
	.comm	_x_s8_y,4,4
	.comm	s8_x,4,4
	.comm	_x_s8_x,4,4
	.comm	s7_z,4,4
	.comm	_x_s7_z,4,4
	.comm	s7_y,4,4
	.comm	_x_s7_y,4,4
	.comm	s7_x,4,4
	.comm	_x_s7_x,4,4
	.comm	s2_evt0,1,1
	.comm	_x_s2_evt0,1,1
	.comm	s1_l2,1,1
	.comm	_x_s1_l2,1,1
	.comm	s7_evt1,1,1
	.comm	_x_s7_evt1,1,1
	.comm	s4_l1,1,1
	.comm	_x_s4_l1,1,1
	.comm	s7_evt0,1,1
	.comm	_x_s7_evt0,1,1
	.comm	s4_l0,1,1
	.comm	_x_s4_l0,1,1
	.comm	s2_evt1,1,1
	.comm	_x_s2_evt1,1,1
	.comm	s12_l2,1,1
	.comm	_x_s12_l2,1,1
	.comm	s6_z,4,4
	.comm	_x_s6_z,4,4
	.comm	s1_evt0,1,1
	.comm	_x_s1_evt0,1,1
	.comm	s7_l2,1,1
	.comm	_x_s7_l2,1,1
	.comm	s1_z,4,4
	.comm	_x_s1_z,4,4
	.comm	s10_l1,1,1
	.comm	_x_s10_l1,1,1
	.comm	s4_y,4,4
	.comm	_x_s4_y,4,4
	.comm	s10_evt1,1,1
	.comm	_x_s10_evt1,1,1
	.comm	s7_l1,1,1
	.comm	_x_s7_l1,1,1
	.comm	s1_y,4,4
	.comm	_x_s1_y,4,4
	.comm	s10_l0,1,1
	.comm	_x_s10_l0,1,1
	.comm	s4_x,4,4
	.comm	_x_s4_x,4,4
	.comm	s10_evt0,1,1
	.comm	_x_s10_evt0,1,1
	.comm	s7_l0,1,1
	.comm	_x_s7_l0,1,1
	.comm	s1_x,4,4
	.comm	_x_s1_x,4,4
	.comm	s11_evt1,1,1
	.comm	_x_s11_evt1,1,1
	.comm	s8_l1,1,1
	.comm	_x_s8_l1,1,1
	.comm	s2_y,4,4
	.comm	_x_s2_y,4,4
	.comm	s11_l0,1,1
	.comm	_x_s11_l0,1,1
	.comm	s5_x,4,4
	.comm	_x_s5_x,4,4
	.comm	s0_l2,1,1
	.comm	_x_s0_l2,1,1
	.comm	s6_evt1,1,1
	.comm	_x_s6_evt1,1,1
	.comm	s3_l1,1,1
	.comm	_x_s3_l1,1,1
	.comm	s11_evt0,1,1
	.comm	_x_s11_evt0,1,1
	.comm	s8_l0,1,1
	.comm	_x_s8_l0,1,1
	.comm	s2_x,4,4
	.comm	_x_s2_x,4,4
	.comm	s8_l2,1,1
	.comm	_x_s8_l2,1,1
	.comm	s2_z,4,4
	.comm	_x_s2_z,4,4
	.comm	s11_l1,1,1
	.comm	_x_s11_l1,1,1
	.comm	s5_y,4,4
	.comm	_x_s5_y,4,4
	.comm	delta,4,4
	.comm	_x_delta,4,4
	.comm	s9_evt1,1,1
	.comm	_x_s9_evt1,1,1
	.comm	s6_l1,1,1
	.comm	_x_s6_l1,1,1
	.comm	s0_y,4,4
	.comm	_x_s0_y,4,4
	.comm	r_evt_id,4,4
	.comm	_x_r_evt_id,4,4
	.comm	s1_l1,1,1
	.comm	_x_s1_l1,1,1
	.comm	s4_evt1,1,1
	.comm	_x_s4_evt1,1,1
	.comm	s1_evt1,1,1
	.comm	_x_s1_evt1,1,1
	.comm	r_l,1,1
	.comm	_x_r_l,1,1
	.comm	s1_l0,1,1
	.comm	_x_s1_l0,1,1
	.comm	s4_evt0,1,1
	.comm	_x_s4_evt0,1,1
	.comm	s11_l2,1,1
	.comm	_x_s11_l2,1,1
	.comm	s5_z,4,4
	.comm	_x_s5_z,4,4
	.comm	s12_evt0,1,1
	.comm	_x_s12_evt0,1,1
	.comm	s9_l0,1,1
	.comm	_x_s9_l0,1,1
	.comm	s3_x,4,4
	.comm	_x_s3_x,4,4
	.comm	r_counter,4,4
	.comm	_x_r_counter,4,4
	.comm	s5_evt0,1,1
	.comm	_x_s5_evt0,1,1
	.comm	s2_l0,1,1
	.comm	_x_s2_l0,1,1
	.comm	r_event0,1,1
	.comm	_x_r_event0,1,1
	.comm	_diverge_delta,4,4
	.comm	_x__diverge_delta,4,4
	.comm	s6_l2,1,1
	.comm	_x_s6_l2,1,1
	.comm	s0_z,4,4
	.comm	_x_s0_z,4,4
	.comm	s12_evt1,1,1
	.comm	_x_s12_evt1,1,1
	.comm	s9_l1,1,1
	.comm	_x_s9_l1,1,1
	.comm	r_x,4,4
	.comm	_x_r_x,4,4
	.comm	s3_y,4,4
	.comm	_x_s3_y,4,4
	.comm	s12_l0,1,1
	.comm	_x_s12_l0,1,1
	.comm	s6_x,4,4
	.comm	_x_s6_x,4,4
	.comm	s0_evt0,1,1
	.comm	_x_s0_evt0,1,1
	.comm	s9_evt0,1,1
	.comm	_x_s9_evt0,1,1
	.comm	s6_l0,1,1
	.comm	_x_s6_l0,1,1
	.comm	s0_x,4,4
	.comm	_x_s0_x,4,4
	.comm	r_event1,1,1
	.comm	_x_r_event1,1,1
	.comm	s0_evt1,1,1
	.comm	_x_s0_evt1,1,1
	.comm	s0_l0,1,1
	.comm	_x_s0_l0,1,1
	.comm	s3_evt0,1,1
	.comm	_x_s3_evt0,1,1
	.comm	s8_evt0,1,1
	.comm	_x_s8_evt0,1,1
	.comm	s5_l0,1,1
	.comm	_x_s5_l0,1,1
	.comm	s2_l2,1,1
	.comm	_x_s2_l2,1,1
	.comm	s8_evt1,1,1
	.comm	_x_s8_evt1,1,1
	.comm	s5_l1,1,1
	.comm	_x_s5_l1,1,1
	.comm	s9_l2,1,1
	.comm	_x_s9_l2,1,1
	.comm	s3_z,4,4
	.comm	_x_s3_z,4,4
	.comm	s12_l1,1,1
	.comm	_x_s12_l1,1,1
	.comm	s6_y,4,4
	.comm	_x_s6_y,4,4
	.comm	s0_l1,1,1
	.comm	_x_s0_l1,1,1
	.comm	s3_evt1,1,1
	.comm	_x_s3_evt1,1,1
	.comm	s3_l0,1,1
	.comm	_x_s3_l0,1,1
	.comm	s6_evt0,1,1
	.comm	_x_s6_evt0,1,1
	.comm	s3_l2,1,1
	.comm	_x_s3_l2,1,1
	.comm	s10_l2,1,1
	.comm	_x_s10_l2,1,1
	.comm	s4_z,4,4
	.comm	_x_s4_z,4,4
	.comm	s4_l2,1,1
	.comm	_x_s4_l2,1,1
	.comm	s2_l1,1,1
	.comm	_x_s2_l1,1,1
	.comm	s5_evt1,1,1
	.comm	_x_s5_evt1,1,1
	.comm	s5_l2,1,1
	.comm	_x_s5_l2,1,1
	.global	__aeabi_fcmpeq
	.global	__aeabi_fcmple
	.global	__aeabi_fcmpge
	.global	__aeabi_f2d
	.global	__aeabi_dsub
	.global	__aeabi_dadd
	.global	__aeabi_dcmpeq
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #8
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+4
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+8
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+12
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+16
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+20
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+24
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+28
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+32
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+36
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+40
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+44
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+48
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+52
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+56
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+60
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+64
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+68
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+72
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+76
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+80
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+84
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+88
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+92
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+96
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+100
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+104
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+108
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+112
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+116
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+352
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+120
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+124
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+448
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+128
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+348
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+132
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+136
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+444
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+140
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+144
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+416
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+148
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+152
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+512
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+156
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+456
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+160
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+164
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+412
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+168
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+408
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+172
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+176
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+516
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+180
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+360
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+488
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+184
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L1604+188
	str	r3, [r2]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+192
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+196
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+200
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+204
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+208
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+212
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+216
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+220
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+224
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+380
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+228
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L1604+232
	str	r3, [r2]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+492
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+236
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+240
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+244
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+480
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+248
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+252
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+384
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+256
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+260
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+264
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+472
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+268
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+356
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+484
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+272
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+276
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+280
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+284
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+288
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+388
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+504
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+292
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+392
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+508
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+376
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+296
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+300
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+460
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+304
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+308
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+312
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+452
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+316
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+344
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1604+320
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+324
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+328
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+496
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1604+500
	strb	r2, [r3]
	ldr	r3, .L1604+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1604+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L5
.L4:
	ldr	r3, .L1604+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L6
	ldr	r3, .L1604+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L5
.L6:
	ldr	r3, .L1604+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
	ldr	r3, .L1604+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L5
.L7:
	ldr	r3, .L1604+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L5:
	ldr	r3, .L1604+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L9
	ldr	r3, .L1604+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L9
	ldr	r3, .L1604+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L10
.L9:
	ldr	r3, .L1604+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L11
	ldr	r3, .L1604+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L11
	ldr	r3, .L1604+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L10
.L11:
	ldr	r3, .L1604+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L12
	ldr	r3, .L1604+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L12
	ldr	r3, .L1604+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L10
.L12:
	ldr	r3, .L1604+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L1604+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L1604+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L10
.L13:
	ldr	r3, .L1604+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L14
	ldr	r3, .L1604+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L14
	ldr	r3, .L1604+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L10
.L14:
	ldr	r3, .L1604+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
.L10:
	ldr	r3, .L1604+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1604+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1604+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1604+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+8
	ldr	r3, [r3]	@ float
	ldr	r1, .L1604+468
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L18
	ldr	r3, .L1604+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L18
	ldr	r3, .L1604+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L18
	ldr	r3, .L1604+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L18:
	ldr	r3, .L1604+8
	ldr	r3, [r3]	@ float
	ldr	r1, .L1604+476
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L19
	ldr	r3, .L1604+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L19
	ldr	r3, .L1604+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L19
	ldr	r3, .L1604+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L19:
	ldr	r3, .L1604+8
	ldr	r3, [r3]	@ float
	ldr	r1, .L1604+476
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L20
	ldr	r3, .L1604+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L20
	ldr	r3, .L1604+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L20
	ldr	r3, .L1604+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L20:
	ldr	r3, .L1604+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L21
	ldr	r3, .L1604+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L22
.L21:
	ldr	r3, .L1604+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L23
	ldr	r3, .L1604+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L22
.L23:
	ldr	r3, .L1604+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L24
	ldr	r3, .L1604+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L22
.L24:
	ldr	r3, .L1604+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L22:
	ldr	r3, .L1604+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L25
	ldr	r3, .L1604+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L25
	ldr	r3, .L1604+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L26
.L25:
	ldr	r3, .L1604+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L27
	ldr	r3, .L1604+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L27
	ldr	r3, .L1604+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L26
.L27:
	ldr	r3, .L1604+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L28
	ldr	r3, .L1604+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L28
	ldr	r3, .L1604+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L26
.L28:
	ldr	r3, .L1604+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L29
	ldr	r3, .L1604+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L29
	ldr	r3, .L1604+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L26
.L29:
	ldr	r3, .L1604+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L30
	ldr	r3, .L1604+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L30
	ldr	r3, .L1604+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L26
.L30:
	ldr	r3, .L1604+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
.L26:
	ldr	r3, .L1604+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1604+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1604+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1604+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+20
	ldr	r3, [r3]	@ float
	ldr	r1, .L1604+468
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L34
	ldr	r3, .L1604+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L34
	ldr	r3, .L1604+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L34
	ldr	r3, .L1604+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L34:
	ldr	r3, .L1604+20
	ldr	r3, [r3]	@ float
	ldr	r1, .L1604+476
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L35
	ldr	r3, .L1604+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L35
	ldr	r3, .L1604+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L35
	ldr	r3, .L1604+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L35:
	ldr	r3, .L1604+20
	ldr	r3, [r3]	@ float
	ldr	r1, .L1604+476
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L36
	ldr	r3, .L1604+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L36
	ldr	r3, .L1604+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L36
	ldr	r3, .L1604+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L36:
	ldr	r3, .L1604+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L37
	ldr	r3, .L1604+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L38
.L37:
	ldr	r3, .L1604+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L39
	ldr	r3, .L1604+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L38
.L39:
	ldr	r3, .L1604+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L40
	ldr	r3, .L1604+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L38
.L40:
	ldr	r3, .L1604+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L38:
	ldr	r3, .L1604+344
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L41
	ldr	r3, .L1604+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L41
	ldr	r3, .L1604+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L42
.L41:
	ldr	r3, .L1604+344
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L43
	ldr	r3, .L1604+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L43
	ldr	r3, .L1604+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L42
.L43:
	ldr	r3, .L1604+344
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L44
	ldr	r3, .L1604+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L44
	ldr	r3, .L1604+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L42
.L44:
	ldr	r3, .L1604+344
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L45
	ldr	r3, .L1604+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L45
	ldr	r3, .L1604+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L42
.L45:
	ldr	r3, .L1604+344
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L46
	ldr	r3, .L1604+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L46
	ldr	r3, .L1604+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L42
.L46:
	ldr	r3, .L1604+344
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
.L42:
	ldr	r3, .L1604+344
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	b	.L1605
.L1606:
	.align	2
.L1604:
	.word	s12_z
	.word	s12_y
	.word	s12_x
	.word	s11_z
	.word	s11_y
	.word	s11_x
	.word	s10_z
	.word	s10_y
	.word	s10_x
	.word	s9_z
	.word	s9_y
	.word	s9_x
	.word	s8_z
	.word	s8_y
	.word	s8_x
	.word	s7_z
	.word	s7_y
	.word	s7_x
	.word	s2_evt0
	.word	s1_l2
	.word	s7_evt1
	.word	s4_l1
	.word	s7_evt0
	.word	s4_l0
	.word	s2_evt1
	.word	s12_l2
	.word	s6_z
	.word	s1_evt0
	.word	s7_l2
	.word	s1_z
	.word	s4_y
	.word	s10_evt1
	.word	s1_y
	.word	s4_x
	.word	s10_evt0
	.word	s1_x
	.word	s11_evt1
	.word	s2_y
	.word	s11_l0
	.word	s0_l2
	.word	s3_l1
	.word	s11_evt0
	.word	s2_x
	.word	s2_z
	.word	s11_l1
	.word	delta
	.word	s0_y
	.word	r_evt_id
	.word	s1_l1
	.word	s4_evt1
	.word	s1_evt1
	.word	r_l
	.word	s1_l0
	.word	s4_evt0
	.word	s11_l2
	.word	s5_z
	.word	s12_evt0
	.word	s3_x
	.word	r_counter
	.word	s2_l0
	.word	r_event0
	.word	_diverge_delta
	.word	s0_z
	.word	s12_evt1
	.word	r_x
	.word	s3_y
	.word	s12_l0
	.word	s0_evt0
	.word	s0_x
	.word	r_event1
	.word	s0_evt1
	.word	s0_l0
	.word	s3_evt0
	.word	s2_l2
	.word	s3_z
	.word	s12_l1
	.word	s0_l1
	.word	s3_evt1
	.word	s3_l0
	.word	s3_l2
	.word	s4_z
	.word	s4_l2
	.word	s2_l1
	.word	s10_y
	.word	s10_z
	.word	s10_x
	.word	s10_l2
	.word	s10_l0
	.word	s10_l1
	.word	s9_evt0
	.word	s9_evt1
	.word	s9_y
	.word	s9_z
	.word	s9_x
	.word	s9_l2
	.word	s9_l0
	.word	s9_l1
	.word	s8_evt0
	.word	s8_evt1
	.word	s8_y
	.word	s8_z
	.word	s8_x
	.word	s8_l2
	.word	s8_l0
	.word	s8_l1
	.word	s7_evt0
	.word	s7_evt1
	.word	s7_y
	.word	s7_z
	.word	s7_x
	.word	s7_l2
	.word	s7_l0
	.word	s7_l1
	.word	s6_evt0
	.word	s6_evt1
	.word	s6_y
	.word	s6_z
	.word	1101004800
	.word	s6_x
	.word	1123024896
	.word	s6_l2
	.word	s6_l0
	.word	s6_l1
	.word	s5_evt0
	.word	s5_evt1
	.word	s5_l2
	.word	s5_l0
	.word	s5_l1
	.word	s5_x
	.word	s5_y
.L1605:
	ldr	r3, .L1604+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1604+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1604+340
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+332
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+336
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+340
	ldr	r3, [r3]	@ float
	ldr	r1, .L1604+468
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L50
	ldr	r3, .L1604+344
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L50
	ldr	r3, .L1604+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L50
	ldr	r3, .L1604+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L50:
	ldr	r3, .L1604+340
	ldr	r3, [r3]	@ float
	ldr	r1, .L1604+476
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L51
	ldr	r3, .L1604+344
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L51
	ldr	r3, .L1604+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L51
	ldr	r3, .L1604+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L51:
	ldr	r3, .L1604+340
	ldr	r3, [r3]	@ float
	ldr	r1, .L1604+476
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L52
	ldr	r3, .L1604+344
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L52
	ldr	r3, .L1604+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L52
	ldr	r3, .L1604+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L52:
	ldr	r3, .L1604+356
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L53
	ldr	r3, .L1604+360
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L54
.L53:
	ldr	r3, .L1604+356
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L55
	ldr	r3, .L1604+360
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L54
.L55:
	ldr	r3, .L1604+360
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L56
	ldr	r3, .L1604+356
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L54
.L56:
	ldr	r3, .L1604+356
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+360
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L54:
	ldr	r3, .L1604+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L57
	ldr	r3, .L1604+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L57
	ldr	r3, .L1604+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L58
.L57:
	ldr	r3, .L1604+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L59
	ldr	r3, .L1604+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L59
	ldr	r3, .L1604+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L58
.L59:
	ldr	r3, .L1604+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L60
	ldr	r3, .L1604+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L60
	ldr	r3, .L1604+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L58
.L60:
	ldr	r3, .L1604+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L61
	ldr	r3, .L1604+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L61
	ldr	r3, .L1604+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L58
.L61:
	ldr	r3, .L1604+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L62
	ldr	r3, .L1604+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L62
	ldr	r3, .L1604+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L58
.L62:
	ldr	r3, .L1604+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
.L58:
	ldr	r3, .L1604+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1604+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1604+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1604+372
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+364
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+368
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+372
	ldr	r3, [r3]	@ float
	ldr	r1, .L1604+468
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L66
	ldr	r3, .L1604+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L66
	ldr	r3, .L1604+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L66
	ldr	r3, .L1604+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L66:
	ldr	r3, .L1604+372
	ldr	r3, [r3]	@ float
	ldr	r1, .L1604+476
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L67
	ldr	r3, .L1604+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L67
	ldr	r3, .L1604+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L67
	ldr	r3, .L1604+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L67:
	ldr	r3, .L1604+372
	ldr	r3, [r3]	@ float
	ldr	r1, .L1604+476
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L68
	ldr	r3, .L1604+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L68
	ldr	r3, .L1604+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L68
	ldr	r3, .L1604+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L68:
	ldr	r3, .L1604+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L69
	ldr	r3, .L1604+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L70
.L69:
	ldr	r3, .L1604+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L71
	ldr	r3, .L1604+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L70
.L71:
	ldr	r3, .L1604+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L72
	ldr	r3, .L1604+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L70
.L72:
	ldr	r3, .L1604+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L70:
	ldr	r3, .L1604+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L73
	ldr	r3, .L1604+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L73
	ldr	r3, .L1604+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L74
.L73:
	ldr	r3, .L1604+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L75
	ldr	r3, .L1604+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L75
	ldr	r3, .L1604+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L74
.L75:
	ldr	r3, .L1604+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L76
	ldr	r3, .L1604+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L76
	ldr	r3, .L1604+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L74
.L76:
	ldr	r3, .L1604+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L77
	ldr	r3, .L1604+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L77
	ldr	r3, .L1604+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L74
.L77:
	ldr	r3, .L1604+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L78
	ldr	r3, .L1604+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L78
	ldr	r3, .L1604+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L74
.L78:
	ldr	r3, .L1604+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
.L74:
	ldr	r3, .L1604+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1604+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1604+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1604+404
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+396
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+400
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+404
	ldr	r3, [r3]	@ float
	ldr	r1, .L1604+468
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L82
	ldr	r3, .L1604+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L82
	ldr	r3, .L1604+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L82
	ldr	r3, .L1604+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L82:
	ldr	r3, .L1604+404
	ldr	r3, [r3]	@ float
	ldr	r1, .L1604+476
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L83
	ldr	r3, .L1604+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L83
	ldr	r3, .L1604+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L83
	ldr	r3, .L1604+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L83:
	ldr	r3, .L1604+404
	ldr	r3, [r3]	@ float
	ldr	r1, .L1604+476
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L84
	ldr	r3, .L1604+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L84
	ldr	r3, .L1604+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L84
	ldr	r3, .L1604+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L84:
	ldr	r3, .L1604+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L85
	ldr	r3, .L1604+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L86
.L85:
	ldr	r3, .L1604+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L87
	ldr	r3, .L1604+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L86
.L87:
	ldr	r3, .L1604+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L88
	ldr	r3, .L1604+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L86
.L88:
	ldr	r3, .L1604+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L86:
	ldr	r3, .L1604+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L1604+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L1604+448
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L90
.L89:
	ldr	r3, .L1604+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L91
	ldr	r3, .L1604+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
	ldr	r3, .L1604+448
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L90
.L91:
	ldr	r3, .L1604+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L92
	ldr	r3, .L1604+448
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L92
	ldr	r3, .L1604+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L90
.L92:
	ldr	r3, .L1604+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L93
	ldr	r3, .L1604+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L93
	ldr	r3, .L1604+448
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L90
.L93:
	ldr	r3, .L1604+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L94
	ldr	r3, .L1604+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L94
	ldr	r3, .L1604+448
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L90
.L94:
	ldr	r3, .L1604+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+448
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
.L90:
	ldr	r3, .L1604+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1604+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1604+448
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1604+436
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+428
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+432
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+436
	ldr	r3, [r3]	@ float
	ldr	r1, .L1604+468
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L98
	ldr	r3, .L1604+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L98
	ldr	r3, .L1604+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L98
	ldr	r3, .L1604+448
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L98:
	ldr	r3, .L1604+436
	ldr	r3, [r3]	@ float
	ldr	r1, .L1604+476
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L99
	ldr	r3, .L1604+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L99
	ldr	r3, .L1604+448
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L99
	ldr	r3, .L1604+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L99:
	ldr	r3, .L1604+436
	ldr	r3, [r3]	@ float
	ldr	r1, .L1604+476
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L100
	ldr	r3, .L1604+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L100
	ldr	r3, .L1604+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L100
	ldr	r3, .L1604+448
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L100:
	ldr	r3, .L1604+452
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L101
	ldr	r3, .L1604+456
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L102
.L101:
	ldr	r3, .L1604+452
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L103
	ldr	r3, .L1604+456
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L102
.L103:
	ldr	r3, .L1604+456
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L104
	ldr	r3, .L1604+452
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L102
.L104:
	ldr	r3, .L1604+452
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+456
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L102:
	ldr	r3, .L1604+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L105
	ldr	r3, .L1604+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L105
	ldr	r3, .L1604+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L106
.L105:
	ldr	r3, .L1604+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L107
	ldr	r3, .L1604+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L107
	ldr	r3, .L1604+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L106
.L107:
	ldr	r3, .L1604+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L108
	ldr	r3, .L1604+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L108
	ldr	r3, .L1604+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L106
.L108:
	ldr	r3, .L1604+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L109
	ldr	r3, .L1604+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L109
	ldr	r3, .L1604+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L106
.L109:
	ldr	r3, .L1604+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L110
	ldr	r3, .L1604+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L110
	ldr	r3, .L1604+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L106
.L110:
	ldr	r3, .L1604+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
.L106:
	ldr	r3, .L1604+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1604+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1604+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1604+472
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+460
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+464
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+472
	ldr	r3, [r3]	@ float
	ldr	r1, .L1604+468
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L114
	ldr	r3, .L1604+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L114
	ldr	r3, .L1604+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L114
	ldr	r3, .L1604+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L114:
	ldr	r3, .L1604+472
	ldr	r3, [r3]	@ float
	ldr	r1, .L1604+476
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L115
	ldr	r3, .L1604+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L115
	ldr	r3, .L1604+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L115
	ldr	r3, .L1604+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L115:
	ldr	r3, .L1604+472
	ldr	r3, [r3]	@ float
	ldr	r1, .L1604+476
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L116
	ldr	r3, .L1604+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L116
	ldr	r3, .L1604+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L116
	ldr	r3, .L1604+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L116:
	ldr	r3, .L1604+492
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L117
	ldr	r3, .L1604+496
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L118
.L117:
	ldr	r3, .L1604+492
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L119
	ldr	r3, .L1604+496
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L118
.L119:
	ldr	r3, .L1604+496
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L120
	ldr	r3, .L1604+492
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L118
.L120:
	ldr	r3, .L1604+492
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+496
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L118:
	ldr	r3, .L1604+500
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L121
	ldr	r3, .L1604+504
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L121
	ldr	r3, .L1604+508
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L122
.L121:
	ldr	r3, .L1604+500
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L123
	ldr	r3, .L1604+504
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L123
	ldr	r3, .L1604+508
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L122
.L123:
	ldr	r3, .L1604+500
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L124
	ldr	r3, .L1604+508
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L124
	ldr	r3, .L1604+504
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L122
.L124:
	ldr	r3, .L1604+500
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L125
	ldr	r3, .L1604+504
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L125
	ldr	r3, .L1604+508
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L122
.L125:
	ldr	r3, .L1604+500
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L126
	ldr	r3, .L1604+504
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L126
	ldr	r3, .L1604+508
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L122
.L126:
	ldr	r3, .L1604+500
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+504
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+508
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
.L122:
	ldr	r3, .L1604+500
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1604+504
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1604+508
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1604+512
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1604+516
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+4
	ldr	r3, [r3]	@ float
	ldr	r1, .L1607+8
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L130
	ldr	r3, .L1607+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L130
	ldr	r3, .L1607+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L130
	ldr	r3, .L1607+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L130:
	ldr	r3, .L1607+4
	ldr	r3, [r3]	@ float
	ldr	r1, .L1607+24
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L131
	ldr	r3, .L1607+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L131
	ldr	r3, .L1607+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L131
	ldr	r3, .L1607+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L131:
	ldr	r3, .L1607+4
	ldr	r3, [r3]	@ float
	ldr	r1, .L1607+24
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L132
	ldr	r3, .L1607+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L132
	ldr	r3, .L1607+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L132
	ldr	r3, .L1607+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L132:
	ldr	r3, .L1607+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L133
	ldr	r3, .L1607+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L134
.L133:
	ldr	r3, .L1607+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L135
	ldr	r3, .L1607+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L134
.L135:
	ldr	r3, .L1607+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L136
	ldr	r3, .L1607+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L134
.L136:
	ldr	r3, .L1607+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L134:
	ldr	r3, .L1607+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L137
	ldr	r3, .L1607+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L137
	ldr	r3, .L1607+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L138
.L137:
	ldr	r3, .L1607+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L139
	ldr	r3, .L1607+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L139
	ldr	r3, .L1607+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L138
.L139:
	ldr	r3, .L1607+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L140
	ldr	r3, .L1607+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L140
	ldr	r3, .L1607+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L138
.L140:
	ldr	r3, .L1607+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L141
	ldr	r3, .L1607+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L141
	ldr	r3, .L1607+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L138
.L141:
	ldr	r3, .L1607+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L142
	ldr	r3, .L1607+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L142
	ldr	r3, .L1607+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L138
.L142:
	ldr	r3, .L1607+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
.L138:
	ldr	r3, .L1607+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1607+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1607+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1607+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+56
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+48
	ldr	r3, [r3]	@ float
	ldr	r1, .L1607+8
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L146
	ldr	r3, .L1607+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L146
	ldr	r3, .L1607+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L146
	ldr	r3, .L1607+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L146:
	ldr	r3, .L1607+48
	ldr	r3, [r3]	@ float
	ldr	r1, .L1607+24
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L147
	ldr	r3, .L1607+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L147
	ldr	r3, .L1607+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L147
	ldr	r3, .L1607+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L147:
	ldr	r3, .L1607+48
	ldr	r3, [r3]	@ float
	ldr	r1, .L1607+24
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L148
	ldr	r3, .L1607+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L148
	ldr	r3, .L1607+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L148
	ldr	r3, .L1607+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L148:
	ldr	r3, .L1607+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1607+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L150
.L149:
	ldr	r3, .L1607+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L151
	ldr	r3, .L1607+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L150
.L151:
	ldr	r3, .L1607+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L152
	ldr	r3, .L1607+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L150
.L152:
	ldr	r3, .L1607+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L150:
	ldr	r3, .L1607+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L153
	ldr	r3, .L1607+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L153
	ldr	r3, .L1607+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L154
.L153:
	ldr	r3, .L1607+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L155
	ldr	r3, .L1607+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L155
	ldr	r3, .L1607+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L154
.L155:
	ldr	r3, .L1607+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L156
	ldr	r3, .L1607+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L156
	ldr	r3, .L1607+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L154
.L156:
	ldr	r3, .L1607+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L1607+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L1607+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L154
.L157:
	ldr	r3, .L1607+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L158
	ldr	r3, .L1607+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L158
	ldr	r3, .L1607+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L154
.L158:
	ldr	r3, .L1607+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
.L154:
	ldr	r3, .L1607+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1607+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1607+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1607+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+80
	ldr	r3, [r3]	@ float
	ldr	r1, .L1607+8
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L162
	ldr	r3, .L1607+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L162
	ldr	r3, .L1607+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L162
	ldr	r3, .L1607+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L162:
	ldr	r3, .L1607+80
	ldr	r3, [r3]	@ float
	ldr	r1, .L1607+24
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L163
	ldr	r3, .L1607+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L163
	ldr	r3, .L1607+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L163
	ldr	r3, .L1607+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L163:
	ldr	r3, .L1607+80
	ldr	r3, [r3]	@ float
	ldr	r1, .L1607+24
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L164
	ldr	r3, .L1607+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L164
	ldr	r3, .L1607+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L164
	ldr	r3, .L1607+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L164:
	ldr	r3, .L1607+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L165
	ldr	r3, .L1607+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L166
.L165:
	ldr	r3, .L1607+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L167
	ldr	r3, .L1607+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L166
.L167:
	ldr	r3, .L1607+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L168
	ldr	r3, .L1607+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L166
.L168:
	ldr	r3, .L1607+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L166:
	ldr	r3, .L1607+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L169
	ldr	r3, .L1607+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L169
	ldr	r3, .L1607+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L170
.L169:
	ldr	r3, .L1607+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L171
	ldr	r3, .L1607+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L171
	ldr	r3, .L1607+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L170
.L171:
	ldr	r3, .L1607+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L172
	ldr	r3, .L1607+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L172
	ldr	r3, .L1607+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L170
.L172:
	ldr	r3, .L1607+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L173
	ldr	r3, .L1607+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L173
	ldr	r3, .L1607+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L170
.L173:
	ldr	r3, .L1607+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L174
	ldr	r3, .L1607+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L174
	ldr	r3, .L1607+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L170
.L174:
	ldr	r3, .L1607+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
.L170:
	ldr	r3, .L1607+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1607+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1607+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1607+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+112
	ldr	r3, [r3]	@ float
	ldr	r1, .L1607+8
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L178
	ldr	r3, .L1607+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L178
	ldr	r3, .L1607+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L178
	ldr	r3, .L1607+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L178:
	ldr	r3, .L1607+112
	ldr	r3, [r3]	@ float
	ldr	r1, .L1607+24
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L179
	ldr	r3, .L1607+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L179
	ldr	r3, .L1607+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L179
	ldr	r3, .L1607+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L179:
	ldr	r3, .L1607+112
	ldr	r3, [r3]	@ float
	ldr	r1, .L1607+24
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L180
	ldr	r3, .L1607+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L180
	ldr	r3, .L1607+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L180
	ldr	r3, .L1607+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L180:
	ldr	r3, .L1607+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L181
	ldr	r3, .L1607+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L182
.L181:
	ldr	r3, .L1607+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L183
	ldr	r3, .L1607+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L182
.L183:
	ldr	r3, .L1607+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L184
	ldr	r3, .L1607+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L182
.L184:
	ldr	r3, .L1607+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L182:
	ldr	r3, .L1607+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L185
	ldr	r3, .L1607+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L185
	ldr	r3, .L1607+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L186
.L185:
	ldr	r3, .L1607+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L187
	ldr	r3, .L1607+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L187
	ldr	r3, .L1607+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L186
.L187:
	ldr	r3, .L1607+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L188
	ldr	r3, .L1607+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L188
	ldr	r3, .L1607+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L186
.L188:
	ldr	r3, .L1607+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L189
	ldr	r3, .L1607+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L189
	ldr	r3, .L1607+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L186
.L189:
	ldr	r3, .L1607+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L190
	ldr	r3, .L1607+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L190
	ldr	r3, .L1607+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L186
.L190:
	ldr	r3, .L1607+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
.L186:
	ldr	r3, .L1607+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1607+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1607+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1607+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+148
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+144
	ldr	r3, [r3]	@ float
	ldr	r1, .L1607+8
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L194
	ldr	r3, .L1607+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L194
	ldr	r3, .L1607+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L194
	ldr	r3, .L1607+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L194:
	ldr	r3, .L1607+144
	ldr	r3, [r3]	@ float
	ldr	r1, .L1607+24
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L195
	ldr	r3, .L1607+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L195
	ldr	r3, .L1607+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L195
	ldr	r3, .L1607+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L195:
	ldr	r3, .L1607+144
	ldr	r3, [r3]	@ float
	ldr	r1, .L1607+24
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L196
	ldr	r3, .L1607+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L196
	ldr	r3, .L1607+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L196
	ldr	r3, .L1607+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L196:
	ldr	r3, .L1607+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L197
	ldr	r3, .L1607+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L198
.L197:
	ldr	r3, .L1607+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L199
	ldr	r3, .L1607+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L198
.L199:
	ldr	r3, .L1607+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L200
	ldr	r3, .L1607+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L198
.L200:
	ldr	r3, .L1607+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L198:
	ldr	r3, .L1607+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L201
	ldr	r3, .L1607+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L201
	ldr	r3, .L1607+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L202
.L201:
	ldr	r3, .L1607+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L203
	ldr	r3, .L1607+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L203
	ldr	r3, .L1607+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L202
.L203:
	ldr	r3, .L1607+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L204
	ldr	r3, .L1607+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L204
	ldr	r3, .L1607+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L202
.L204:
	ldr	r3, .L1607+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L205
	ldr	r3, .L1607+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L205
	ldr	r3, .L1607+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L202
.L205:
	ldr	r3, .L1607+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L206
	ldr	r3, .L1607+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L206
	ldr	r3, .L1607+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L202
.L206:
	ldr	r3, .L1607+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
.L202:
	ldr	r3, .L1607+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1607+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1607+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1607+172
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+168
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+172
	ldr	r3, [r3]	@ float
	ldr	r1, .L1607+8
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L210
	ldr	r3, .L1607+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L210
	ldr	r3, .L1607+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	b	.L1608
.L1609:
	.align	2
.L1607:
	.word	s5_z
	.word	s5_x
	.word	1101004800
	.word	s5_l2
	.word	s5_l0
	.word	s5_l1
	.word	1123024896
	.word	s4_evt0
	.word	s4_evt1
	.word	s4_l2
	.word	s4_l0
	.word	s4_l1
	.word	s4_x
	.word	s4_y
	.word	s4_z
	.word	s3_evt0
	.word	s3_evt1
	.word	s3_l2
	.word	s3_l0
	.word	s3_l1
	.word	s3_x
	.word	s3_y
	.word	s3_z
	.word	s2_evt0
	.word	s2_evt1
	.word	s2_l2
	.word	s2_l0
	.word	s2_l1
	.word	s2_x
	.word	s2_y
	.word	s2_z
	.word	s1_evt0
	.word	s1_evt1
	.word	s1_l2
	.word	s1_l0
	.word	s1_l1
	.word	s1_x
	.word	s1_y
	.word	s1_z
	.word	s0_evt0
	.word	s0_evt1
	.word	s0_y
	.word	s0_z
	.word	s0_x
	.word	s0_l2
	.word	s0_l0
	.word	s0_l1
	.word	r_event1
	.word	r_event0
	.word	r_evt_id
	.word	r_counter
	.word	r_l
	.word	r_x
	.word	_diverge_delta
	.word	_x_s12_z
	.word	_x_s11_z
	.word	_x_s11_y
	.word	_x_s11_x
	.word	_x_s10_z
	.word	_x_s10_y
	.word	_x_s10_x
	.word	_x_s9_z
	.word	_x_s9_y
	.word	_x_s9_x
	.word	_x_s8_z
	.word	_x_s8_y
	.word	_x_s8_x
	.word	_x_s7_z
	.word	_x_s7_y
	.word	_x_s7_x
	.word	_x_s2_evt0
	.word	_x_s1_l2
	.word	_x_s7_evt1
	.word	_x_s4_l1
	.word	_x_s7_evt0
	.word	_x_s4_l0
	.word	_x_s2_evt1
	.word	_x_s6_z
	.word	_x_s1_evt0
	.word	_x_s7_l2
	.word	_x_s1_z
	.word	_x_s10_l1
	.word	_x_s4_y
	.word	_x_s10_evt1
	.word	_x_s7_l1
	.word	_x_s1_y
	.word	_x_s10_l0
	.word	_x_s4_x
	.word	_x_s10_evt0
	.word	_x_s7_l0
	.word	_x_s1_x
	.word	_x_s11_evt1
	.word	_x_s8_l1
	.word	_x_s2_y
	.word	_x_s11_l0
	.word	_x_s5_x
	.word	_x_s0_l2
	.word	_x_s6_evt1
	.word	_x_s3_l1
	.word	_x_s11_evt0
	.word	_x_s8_l0
	.word	_x_s2_x
	.word	_x_s8_l2
	.word	_x_s2_z
	.word	_x_s11_l1
	.word	_x_s5_y
	.word	_x_delta
	.word	_x_s9_evt1
	.word	_x_s6_l1
	.word	_x_s0_y
	.word	_x_r_evt_id
	.word	_x_s1_l1
	.word	_x_s4_evt1
	.word	_x_s1_evt1
	.word	_x_r_l
	.word	_x_s1_l0
	.word	_x_s4_evt0
	.word	_x_s11_l2
	.word	_x_s5_z
	.word	_x_s9_l0
	.word	_x_s3_x
	.word	_x_r_counter
	.word	_x_s5_evt0
	.word	_x_s2_l0
	.word	_x_r_event0
	.word	_x__diverge_delta
	.word	_x_s6_l2
	.word	_x_s0_z
	.word	_x_s9_l1
	.word	_x_r_x
	.word	_x_s3_y
	.word	_x_s6_x
	.word	_x_s0_evt0
	.word	_x_s9_evt0
	.word	_x_s6_l0
	.word	_x_s0_x
	.word	_x_r_event1
	.word	_x_s0_evt1
	.word	_x_s0_l0
	.word	_x_s3_evt0
	.word	_x_s8_evt0
	.word	_x_s5_l0
	.word	_x_s2_l2
	.word	_x_s8_evt1
	.word	_x_s5_l1
	.word	_x_s9_l2
	.word	_x_s3_z
	.word	_x_s6_y
	.word	_x_s0_l1
	.word	_x_s3_evt1
	.word	_x_s3_l0
	.word	_x_s6_evt0
	.word	_x_s3_l2
	.word	_x_s10_l2
	.word	_x_s4_z
	.word	_x_s4_l2
	.word	_x_s2_l1
	.word	_x_s5_evt1
	.word	_x_s5_l2
	.word	_x_s12_evt0
	.word	_x_s12_evt1
	.word	1101004800
	.word	1123024896
	.word	_x_s12_l2
	.word	s12_x
	.word	_x_s12_x
	.word	delta
	.word	s12_y
	.word	_x_s12_y
	.word	s12_l0
	.word	_x_s12_l0
	.word	s12_l1
	.word	_x_s12_l1
	.word	s12_l2
.L1608:
	beq	.L210
	ldr	r3, .L1607+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L210:
	ldr	r3, .L1607+172
	ldr	r3, [r3]	@ float
	ldr	r1, .L1607+648
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L211
	ldr	r3, .L1607+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L211
	ldr	r3, .L1607+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L211
	ldr	r3, .L1607+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L211:
	ldr	r3, .L1607+172
	ldr	r3, [r3]	@ float
	ldr	r1, .L1607+648
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L212
	ldr	r3, .L1607+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L212
	ldr	r3, .L1607+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L212
	ldr	r3, .L1607+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L212:
	ldr	r3, .L1607+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+200
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1607+208
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L214
	ldr	r3, .L1607+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L215
.L214:
	ldr	r3, .L1607+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L216
	ldr	r3, .L1607+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L215
.L216:
	ldr	r3, .L1607+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
.L215:
	ldr	r3, .L1607+196
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L217
	ldr	r3, .L1607+196
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L217
	ldr	r3, .L1607+196
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L217
	ldr	r3, .L1607+196
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L217
	ldr	r3, .L1607+196
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L217
	ldr	r3, .L1607+196
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L217
	ldr	r3, .L1607+196
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L217
	ldr	r3, .L1607+196
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L217
	ldr	r3, .L1607+196
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L217
	ldr	r3, .L1607+196
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L217
	ldr	r3, .L1607+196
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L217
	ldr	r3, .L1607+196
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L217
	ldr	r3, .L1607+196
	ldr	r3, [r3]
	cmp	r3, #12
	bne	.L8
.L217:
	ldr	r3, .L1607+200
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L218
	ldr	r3, .L1607+200
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L218
	ldr	r3, .L1607+200
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L218
	ldr	r3, .L1607+200
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L218
	ldr	r3, .L1607+200
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L218
	ldr	r3, .L1607+200
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L218
	ldr	r3, .L1607+200
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L218
	ldr	r3, .L1607+200
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L218
	ldr	r3, .L1607+200
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L218
	ldr	r3, .L1607+200
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L218
	ldr	r3, .L1607+200
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L218
	ldr	r3, .L1607+200
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L218
	ldr	r3, .L1607+200
	ldr	r3, [r3]
	cmp	r3, #12
	bne	.L8
.L218:
	ldr	r3, .L1607+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L219
	ldr	r3, .L1607+208
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
.L219:
	ldr	r3, .L1607+664
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1607+664
	ldr	r3, [r3]	@ float
	ldr	r2, .L1607+212
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	mov	r3, #1
	b	.L223
.L8:
	mov	r3, #0
.L223:
	str	r3, [fp, #-24]
	b	.L224
.L1269:
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+216
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+672
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+660
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+220
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+224
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+228
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+232
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+236
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+240
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+244
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+248
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+252
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+256
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+260
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+264
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+268
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+272
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+276
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+280
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+284
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+288
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+292
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+296
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+300
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+304
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+652
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+308
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+312
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+316
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+320
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+324
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+328
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+332
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+336
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+340
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+344
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+348
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+352
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+356
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+360
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+364
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+368
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+372
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+376
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+380
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+384
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+388
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+392
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+396
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+400
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+404
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+408
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+412
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+416
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+420
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+424
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+428
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+432
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+436
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L1607+440
	str	r3, [r2]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+444
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+448
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+452
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+456
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+460
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+464
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+468
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+472
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+636
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+476
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+480
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L1607+484
	str	r3, [r2]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+488
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+492
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+496
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+500
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+504
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+508
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+640
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+512
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+516
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+520
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+680
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+524
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+528
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+532
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+536
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+540
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+544
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+548
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+552
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+556
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+560
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+564
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+568
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+572
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+576
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+580
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+584
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+688
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+588
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+592
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+596
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+600
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+604
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+608
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+612
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1607+616
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+620
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+624
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+628
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1607+632
	strb	r2, [r3]
	ldr	r3, .L1607+636
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L225
	ldr	r3, .L1607+640
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L226
.L225:
	ldr	r3, .L1607+636
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L227
	ldr	r3, .L1607+640
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L226
.L227:
	ldr	r3, .L1607+640
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L228
	ldr	r3, .L1607+636
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L226
.L228:
	ldr	r3, .L1607+636
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1607+640
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L226:
	ldr	r3, .L1607+652
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L230
	ldr	r3, .L1607+680
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L230
	ldr	r3, .L1607+688
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L231
.L230:
	ldr	r3, .L1607+652
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L232
	ldr	r3, .L1607+680
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L232
	ldr	r3, .L1607+688
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L231
.L232:
	ldr	r3, .L1607+652
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L233
	ldr	r3, .L1607+688
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L233
	ldr	r3, .L1607+680
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L231
.L233:
	ldr	r3, .L1607+652
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L234
	ldr	r3, .L1607+680
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L234
	ldr	r3, .L1607+688
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L231
.L234:
	ldr	r3, .L1607+652
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L235
	ldr	r3, .L1607+680
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L235
	ldr	r3, .L1607+688
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L231
.L235:
	ldr	r3, .L1607+652
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1607+680
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1607+688
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L231:
	ldr	r3, .L1607+660
	ldr	r3, [r3]	@ float
	ldr	r1, .L1607+644
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L236
	ldr	r3, .L1607+652
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L236
	ldr	r3, .L1607+680
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L236
	ldr	r3, .L1607+688
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L236:
	ldr	r3, .L1607+660
	ldr	r3, [r3]	@ float
	ldr	r1, .L1607+648
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L237
	ldr	r3, .L1607+652
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L237
	ldr	r3, .L1607+688
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L237
	ldr	r3, .L1607+680
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L237:
	ldr	r3, .L1607+660
	ldr	r3, [r3]	@ float
	ldr	r1, .L1607+648
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L238
	ldr	r3, .L1607+652
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L238
	ldr	r3, .L1607+680
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L238
	ldr	r3, .L1607+688
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L238:
	ldr	r3, .L1607+664
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L239
	ldr	r3, .L1607+664
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1607+656
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1607+660
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1607+664
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1607+668
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1607+672
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1607+676
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1607+680
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1607+684
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1607+688
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1607+692
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1610
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1610+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1610+8
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1610+12
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L239:
	ldr	r3, .L1610+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1610+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L243
	ldr	r3, .L1610+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1610+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L243
	ldr	r3, .L1610+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1610
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L243
	ldr	r3, .L1610+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1610+36
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1610+40
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L243
	ldr	r3, .L1610+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1610+44
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1610+48
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L243
	ldr	r3, .L1610+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1610+8
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1610+12
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L246
.L243:
	ldr	r3, .L1610+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L246
	ldr	r3, .L1610+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L246:
	ldr	r3, .L1610+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L247
	ldr	r3, .L1610+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L247
	ldr	r3, .L1610
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L247
	ldr	r3, .L1610+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L247
	ldr	r3, .L1610+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L247
	ldr	r3, .L1610+40
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L247
	ldr	r3, .L1610+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L247
	ldr	r3, .L1610+8
	ldr	r3, [r3]	@ float
	ldr	r2, .L1610+12
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L250
.L247:
	ldr	r3, .L1610+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L250
	ldr	r3, .L1610+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L250
	ldr	r3, .L1610+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L250
	ldr	r3, .L1610+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L250
	ldr	r3, .L1610+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1610+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L250:
	ldr	r3, .L1610
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L251
	ldr	r3, .L1610+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L251
	ldr	r3, .L1610+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L252
.L251:
	ldr	r3, .L1610
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L253
	ldr	r3, .L1610+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L253
	ldr	r3, .L1610+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L253
.L252:
	ldr	r3, .L1610+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L1610+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L253
	ldr	r3, .L1610+8
	ldr	r3, [r3]	@ float
	ldr	r2, .L1610+12
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L253
	ldr	r3, .L1610+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1610+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L256
.L253:
	ldr	r3, .L1610+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L256
	ldr	r3, .L1610+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L256
	ldr	r3, .L1610+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L256
	ldr	r3, .L1610+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L256
	ldr	r3, .L1610+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1610+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L256:
	ldr	r3, .L1610+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1610+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1610+36
	ldr	r3, [r3]	@ float
	ldr	r1, .L1610+88
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1610+8
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1610+96
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L259
	mov	r3, #0
	mov	r4, r3
.L259:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L260
.L257:
	ldr	r3, .L1610+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L260
	ldr	r3, .L1610+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L261
	ldr	r3, .L1610+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L260
.L261:
	ldr	r3, .L1610+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L260
	ldr	r3, .L1610+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L260
	ldr	r3, .L1610+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L260
	ldr	r3, .L1610
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L260
	ldr	r3, .L1610+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L260
	ldr	r3, .L1610+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L260:
	ldr	r3, .L1610+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L262
	ldr	r3, .L1610+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L262
	ldr	r3, .L1610+36
	ldr	r3, [r3]	@ float
	ldr	r1, .L1610+88
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L262
	ldr	r3, .L1610+8
	ldr	r3, [r3]	@ float
	ldr	r1, .L1610+96
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L264
.L262:
	ldr	r3, .L1610+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L264
	ldr	r3, .L1610+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L265
	ldr	r3, .L1610+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L264
.L265:
	ldr	r3, .L1610+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L264
	ldr	r3, .L1610+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L264
	ldr	r3, .L1610+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L264
	ldr	r3, .L1610
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L264
	ldr	r3, .L1610+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L264
	ldr	r3, .L1610+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L264:
	ldr	r3, .L1610+8
	ldr	r3, [r3]	@ float
	ldr	r2, .L1610+12
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L266
	ldr	r3, .L1610+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L266
	ldr	r3, .L1610+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L266
	ldr	r3, .L1610
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L266
	ldr	r3, .L1610+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L266
	ldr	r3, .L1610+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L266
	ldr	r3, .L1610+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L1610+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L266
	ldr	r3, .L1610+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1610+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L269
.L266:
	ldr	r3, .L1610+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L269
	ldr	r3, .L1610+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L269
	ldr	r3, .L1610+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L269
	ldr	r3, .L1610+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L269
	ldr	r3, .L1610+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1610+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L269:
	ldr	r3, .L1610+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L270
	ldr	r3, .L1610+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L270
	ldr	r3, .L1610
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L270
	ldr	r3, .L1610+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L270
	ldr	r3, .L1610+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L270
	ldr	r3, .L1610+40
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L270
	ldr	r3, .L1610+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1610+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L270
	ldr	r3, .L1610+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L273
.L270:
	ldr	r3, .L1610+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L273
	ldr	r3, .L1610+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L273
	ldr	r3, .L1610+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L273
	ldr	r3, .L1610+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L273
	ldr	r3, .L1610+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1610+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L273:
	ldr	r3, .L1610+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L1610+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L274
	ldr	r3, .L1610+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1610+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L274
	ldr	r3, .L1610+8
	ldr	r3, [r3]	@ float
	ldr	r2, .L1610+12
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L274
	ldr	r3, .L1610
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L278
	ldr	r3, .L1610+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L278
	ldr	r3, .L1610+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L279
.L278:
	ldr	r3, .L1610
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L274
	ldr	r3, .L1610+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L274
	ldr	r3, .L1610+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L279
.L274:
	ldr	r3, .L1610+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L279
	ldr	r3, .L1610+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L279
	ldr	r3, .L1610+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L279
	ldr	r3, .L1610+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L279
	ldr	r3, .L1610+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1610+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L279:
	ldr	r3, .L1610+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L280
	ldr	r3, .L1610+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L280
	ldr	r3, .L1610+36
	ldr	r3, [r3]	@ float
	ldr	r1, .L1610+88
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L280
	ldr	r3, .L1610+44
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1610+96
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L282
	mov	r3, #0
	mov	r4, r3
.L282:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L283
.L280:
	ldr	r3, .L1610+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L283
	ldr	r3, .L1610+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L284
	ldr	r3, .L1610+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L283
.L284:
	ldr	r3, .L1610+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L283
	ldr	r3, .L1610+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L283
	ldr	r3, .L1610+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L283
	ldr	r3, .L1610
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L283
	ldr	r3, .L1610+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L283
	ldr	r3, .L1610+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L283:
	ldr	r3, .L1610+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L285
	ldr	r3, .L1610+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L285
	ldr	r3, .L1610+36
	ldr	r3, [r3]	@ float
	ldr	r1, .L1610+88
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L285
	ldr	r3, .L1610+44
	ldr	r3, [r3]	@ float
	ldr	r1, .L1610+96
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L287
.L285:
	ldr	r3, .L1610+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L287
	ldr	r3, .L1610+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L288
	ldr	r3, .L1610+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L287
.L288:
	ldr	r3, .L1610
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L287
	ldr	r3, .L1610+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L287
	ldr	r3, .L1610+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L287
	ldr	r3, .L1610+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L287
	ldr	r3, .L1610+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L287
	ldr	r3, .L1610+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L287:
	ldr	r3, .L1610+8
	ldr	r3, [r3]	@ float
	ldr	r2, .L1610+12
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L289
	ldr	r3, .L1610+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L1610+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L289
	ldr	r3, .L1610+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1610+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L289
	ldr	r3, .L1610+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L289
	ldr	r3, .L1610+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L289
	ldr	r3, .L1610
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L289
	ldr	r3, .L1610+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L289
	ldr	r3, .L1610+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L293
.L289:
	ldr	r3, .L1610+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L293
	ldr	r3, .L1610+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L293
	ldr	r3, .L1610+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L293
	ldr	r3, .L1610+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L293
	ldr	r3, .L1610+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1610+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L293:
	ldr	r3, .L1610+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L294
	ldr	r3, .L1610+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L295
.L294:
	ldr	r3, .L1610+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L296
	ldr	r3, .L1610+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L295
.L296:
	ldr	r3, .L1610+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L297
	ldr	r3, .L1610+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L295
.L297:
	ldr	r3, .L1610+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1610+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L295:
	ldr	r3, .L1610+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L298
	ldr	r3, .L1610+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L298
	ldr	r3, .L1610+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L299
.L298:
	ldr	r3, .L1610+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L300
	ldr	r3, .L1610+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L300
	ldr	r3, .L1610+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L299
.L300:
	ldr	r3, .L1610+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L301
	ldr	r3, .L1610+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L301
	ldr	r3, .L1610+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L299
.L301:
	ldr	r3, .L1610+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	b	.L1611
.L1612:
	.align	2
.L1610:
	.word	_x_s12_l2
	.word	delta
	.word	s12_z
	.word	_x_s12_z
	.word	s12_l0
	.word	_x_s12_l0
	.word	s12_l1
	.word	_x_s12_l1
	.word	s12_l2
	.word	s12_x
	.word	_x_s12_x
	.word	s12_y
	.word	_x_s12_y
	.word	s12_evt0
	.word	s12_evt1
	.word	_x_s11_evt0
	.word	_x_s11_evt1
	.word	_x_s11_x
	.word	_x_s11_y
	.word	s11_z
	.word	_x_s11_z
	.word	s11_x
	.word	1101004800
	.word	s11_y
	.word	1123024896
	.word	delta
	.word	s11_evt0
	.word	s11_evt1
	.word	s11_l2
	.word	s11_l0
	.word	s11_l1
	.word	_x_s11_l2
	.word	_x_s11_l0
	.word	_x_s11_l1
.L1611:
	bne	.L302
	ldr	r3, .L1610+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L302
	ldr	r3, .L1610+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L299
.L302:
	ldr	r3, .L1610+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L303
	ldr	r3, .L1610+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L303
	ldr	r3, .L1610+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L299
.L303:
	ldr	r3, .L1610+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1610+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1610+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L299:
	ldr	r3, .L1610+68
	ldr	r3, [r3]	@ float
	ldr	r1, .L1610+88
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L304
	ldr	r3, .L1610+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L304
	ldr	r3, .L1610+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L304
	ldr	r3, .L1610+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L304:
	ldr	r3, .L1610+68
	ldr	r3, [r3]	@ float
	ldr	r1, .L1610+96
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L305
	ldr	r3, .L1610+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L305
	ldr	r3, .L1610+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L305
	ldr	r3, .L1610+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L305:
	ldr	r3, .L1610+68
	ldr	r3, [r3]	@ float
	ldr	r1, .L1610+96
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L306
	ldr	r3, .L1610+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L306
	ldr	r3, .L1610+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L306
	ldr	r3, .L1610+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L306:
	ldr	r3, .L1610+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L307
	ldr	r3, .L1610+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1610+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1610+68
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1610+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1610+92
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1610+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1610+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1610+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1610+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1610+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1610+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1610+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1610+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1610+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1610+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L307:
	ldr	r3, .L1610+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1610+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L311
	ldr	r3, .L1610+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1610+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L311
	ldr	r3, .L1610+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1610+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L311
	ldr	r3, .L1610+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1610+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1610+68
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L311
	ldr	r3, .L1610+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1610+92
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1610+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L311
	ldr	r3, .L1610+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1610+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1610+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L314
.L311:
	ldr	r3, .L1610+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L314
	ldr	r3, .L1610+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L314:
	ldr	r3, .L1610+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L315
	ldr	r3, .L1610+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L315
	ldr	r3, .L1610+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L315
	ldr	r3, .L1610+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L315
	ldr	r3, .L1610+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L315
	ldr	r3, .L1610+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L315
	ldr	r3, .L1610+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L315
	ldr	r3, .L1610+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1610+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L318
.L315:
	ldr	r3, .L1610+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L318
	ldr	r3, .L1610+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L318
	ldr	r3, .L1610+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L318
	ldr	r3, .L1610+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L318
	ldr	r3, .L1610+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1610+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L318:
	ldr	r3, .L1610+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L319
	ldr	r3, .L1610+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L319
	ldr	r3, .L1610+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L320
.L319:
	ldr	r3, .L1610+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L321
	ldr	r3, .L1610+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L321
	ldr	r3, .L1610+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L321
.L320:
	ldr	r3, .L1610+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1610+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L321
	ldr	r3, .L1610+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1610+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L321
	ldr	r3, .L1610+92
	ldr	r3, [r3]	@ float
	ldr	r2, .L1610+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L324
.L321:
	ldr	r3, .L1610+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L324
	ldr	r3, .L1610+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L324
	ldr	r3, .L1610+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L324
	ldr	r3, .L1610+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L324
	ldr	r3, .L1610+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1610+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L324:
	ldr	r3, .L1610+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L325
	ldr	r3, .L1610+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L325
	ldr	r3, .L1610+84
	ldr	r3, [r3]	@ float
	ldr	r1, .L1610+88
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L325
	ldr	r3, .L1610+76
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1610+96
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L327
	mov	r3, #0
	mov	r4, r3
.L327:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L328
.L325:
	ldr	r3, .L1610+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L328
	ldr	r3, .L1610+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L329
	ldr	r3, .L1610+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L328
.L329:
	ldr	r3, .L1610+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L328
	ldr	r3, .L1610+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L328
	ldr	r3, .L1610+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L328
	ldr	r3, .L1610+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L328
	ldr	r3, .L1610+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L328
	ldr	r3, .L1610+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L328:
	ldr	r3, .L1610+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L330
	ldr	r3, .L1610+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L330
	ldr	r3, .L1610+84
	ldr	r3, [r3]	@ float
	ldr	r1, .L1610+88
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L330
	ldr	r3, .L1610+76
	ldr	r3, [r3]	@ float
	ldr	r1, .L1610+96
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L332
.L330:
	ldr	r3, .L1610+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L332
	ldr	r3, .L1610+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L333
	ldr	r3, .L1610+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L332
.L333:
	ldr	r3, .L1610+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L332
	ldr	r3, .L1610+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L332
	ldr	r3, .L1610+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L332
	ldr	r3, .L1610+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L332
	ldr	r3, .L1610+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L332
	ldr	r3, .L1610+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L332:
	ldr	r3, .L1610+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1610+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L334
	ldr	r3, .L1610+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L334
	ldr	r3, .L1610+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L334
	ldr	r3, .L1610+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L334
	ldr	r3, .L1610+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L334
	ldr	r3, .L1610+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L334
	ldr	r3, .L1610+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1610+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L334
	ldr	r3, .L1610+92
	ldr	r3, [r3]	@ float
	ldr	r2, .L1610+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L337
.L334:
	ldr	r3, .L1610+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L337
	ldr	r3, .L1610+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L337
	ldr	r3, .L1610+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L337
	ldr	r3, .L1610+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L337
	ldr	r3, .L1610+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1610+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L337:
	ldr	r3, .L1610+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L338
	ldr	r3, .L1610+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L338
	ldr	r3, .L1610+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L338
	ldr	r3, .L1610+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L338
	ldr	r3, .L1610+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L338
	ldr	r3, .L1610+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L338
	ldr	r3, .L1610+92
	ldr	r3, [r3]	@ float
	ldr	r2, .L1610+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L338
	ldr	r3, .L1610+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L341
.L338:
	ldr	r3, .L1610+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L341
	ldr	r3, .L1610+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L341
	ldr	r3, .L1610+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L341
	ldr	r3, .L1610+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L341
	ldr	r3, .L1610+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1610+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L341:
	ldr	r3, .L1610+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1610+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L342
	ldr	r3, .L1610+92
	ldr	r3, [r3]	@ float
	ldr	r2, .L1610+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L342
	ldr	r3, .L1610+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1610+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L342
	ldr	r3, .L1610+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L346
	ldr	r3, .L1610+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L346
	ldr	r3, .L1610+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L347
.L346:
	ldr	r3, .L1610+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L342
	ldr	r3, .L1610+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L342
	ldr	r3, .L1610+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L347
.L342:
	ldr	r3, .L1610+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L347
	ldr	r3, .L1610+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L347
	ldr	r3, .L1610+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L347
	ldr	r3, .L1610+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L347
	ldr	r3, .L1610+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1610+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L347:
	ldr	r3, .L1610+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L348
	ldr	r3, .L1610+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L348
	ldr	r3, .L1610+84
	ldr	r3, [r3]	@ float
	ldr	r1, .L1610+88
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L348
	ldr	r3, .L1610+92
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1610+96
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L350
	mov	r3, #0
	mov	r4, r3
.L350:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L351
.L348:
	ldr	r3, .L1610+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L351
	ldr	r3, .L1610+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L352
	ldr	r3, .L1610+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L351
.L352:
	ldr	r3, .L1610+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L351
	ldr	r3, .L1610+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L351
	ldr	r3, .L1610+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L351
	ldr	r3, .L1610+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L351
	ldr	r3, .L1610+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L351
	ldr	r3, .L1610+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L351:
	ldr	r3, .L1613
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L353
	ldr	r3, .L1613+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L353
	ldr	r3, .L1613+8
	ldr	r3, [r3]	@ float
	ldr	r1, .L1613+12
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L353
	ldr	r3, .L1613+16
	ldr	r3, [r3]	@ float
	ldr	r1, .L1613+20
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L355
.L353:
	ldr	r3, .L1613+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L355
	ldr	r3, .L1613+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L356
	ldr	r3, .L1613
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L355
.L356:
	ldr	r3, .L1613+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L355
	ldr	r3, .L1613+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L355
	ldr	r3, .L1613+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L355
	ldr	r3, .L1613+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L355
	ldr	r3, .L1613+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L355
	ldr	r3, .L1613+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L355:
	ldr	r3, .L1613+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L1613+56
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L357
	ldr	r3, .L1613+8
	ldr	r3, [r3]	@ float
	ldr	r2, .L1613+60
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L357
	ldr	r3, .L1613+16
	ldr	r3, [r3]	@ float
	ldr	r2, .L1613+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L357
	ldr	r3, .L1613
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L357
	ldr	r3, .L1613+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L357
	ldr	r3, .L1613+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L357
	ldr	r3, .L1613+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L357
	ldr	r3, .L1613+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L361
.L357:
	ldr	r3, .L1613+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L361
	ldr	r3, .L1613+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L361
	ldr	r3, .L1613+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L361
	ldr	r3, .L1613+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L361
	ldr	r3, .L1613+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1613
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L361:
	ldr	r3, .L1613+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L362
	ldr	r3, .L1613+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L363
.L362:
	ldr	r3, .L1613+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L364
	ldr	r3, .L1613+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L363
.L364:
	ldr	r3, .L1613+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L365
	ldr	r3, .L1613+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L363
.L365:
	ldr	r3, .L1613+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1613+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L363:
	ldr	r3, .L1613+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L366
	ldr	r3, .L1613+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L366
	ldr	r3, .L1613+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L367
.L366:
	ldr	r3, .L1613+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L368
	ldr	r3, .L1613+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L368
	ldr	r3, .L1613+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L367
.L368:
	ldr	r3, .L1613+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L369
	ldr	r3, .L1613+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L369
	ldr	r3, .L1613+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L367
.L369:
	ldr	r3, .L1613+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L370
	ldr	r3, .L1613+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L370
	ldr	r3, .L1613+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L367
.L370:
	ldr	r3, .L1613+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L371
	ldr	r3, .L1613+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L371
	ldr	r3, .L1613+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L367
.L371:
	ldr	r3, .L1613+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1613+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1613+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L367:
	ldr	r3, .L1613+88
	ldr	r3, [r3]	@ float
	ldr	r1, .L1613+12
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L372
	ldr	r3, .L1613+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L372
	ldr	r3, .L1613+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L372
	ldr	r3, .L1613+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L372:
	ldr	r3, .L1613+88
	ldr	r3, [r3]	@ float
	ldr	r1, .L1613+20
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L373
	ldr	r3, .L1613+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L373
	ldr	r3, .L1613+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L373
	ldr	r3, .L1613+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L373:
	ldr	r3, .L1613+88
	ldr	r3, [r3]	@ float
	ldr	r1, .L1613+20
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L374
	ldr	r3, .L1613+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L374
	ldr	r3, .L1613+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L374
	ldr	r3, .L1613+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L374:
	ldr	r3, .L1613+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L375
	ldr	r3, .L1613+24
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1613+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1613+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1613+24
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1613+92
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1613+96
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1613+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1613+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1613+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1613+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1613+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1613+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1613+24
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1613+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1613+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L375:
	ldr	r3, .L1613+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1613+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L379
	ldr	r3, .L1613+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1613+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L379
	ldr	r3, .L1613+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1613+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L379
	ldr	r3, .L1613+24
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1613+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1613+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L379
	ldr	r3, .L1613+24
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1613+92
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1613+96
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L379
	ldr	r3, .L1613+24
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1613+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1613+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L382
.L379:
	ldr	r3, .L1613+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L382
	ldr	r3, .L1613+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L382:
	ldr	r3, .L1613+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L383
	ldr	r3, .L1613+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L383
	ldr	r3, .L1613+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L383
	ldr	r3, .L1613+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L383
	ldr	r3, .L1613+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L383
	ldr	r3, .L1613+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L383
	ldr	r3, .L1613+96
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L383
	ldr	r3, .L1613+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1613+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L386
.L383:
	ldr	r3, .L1613+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L386
	ldr	r3, .L1613+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L386
	ldr	r3, .L1613+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L386
	ldr	r3, .L1613+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L386
	ldr	r3, .L1613+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1613+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L386:
	ldr	r3, .L1613+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L387
	ldr	r3, .L1613+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L387
	ldr	r3, .L1613+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L388
.L387:
	ldr	r3, .L1613+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L389
	ldr	r3, .L1613+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L389
	ldr	r3, .L1613+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L389
.L388:
	ldr	r3, .L1613+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1613+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L389
	ldr	r3, .L1613+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1613+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L389
	ldr	r3, .L1613+92
	ldr	r3, [r3]	@ float
	ldr	r2, .L1613+96
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L392
.L389:
	ldr	r3, .L1613+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L392
	ldr	r3, .L1613+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L392
	ldr	r3, .L1613+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L392
	ldr	r3, .L1613+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L392
	ldr	r3, .L1613+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1613+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L392:
	ldr	r3, .L1613+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L393
	ldr	r3, .L1613+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L393
	ldr	r3, .L1613+84
	ldr	r3, [r3]	@ float
	ldr	r1, .L1613+12
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L393
	ldr	r3, .L1613+76
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1613+20
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L395
	mov	r3, #0
	mov	r4, r3
.L395:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L396
.L393:
	ldr	r3, .L1613+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L396
	ldr	r3, .L1613+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L397
	ldr	r3, .L1613+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L396
.L397:
	ldr	r3, .L1613+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L396
	ldr	r3, .L1613+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L396
	ldr	r3, .L1613+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L396
	ldr	r3, .L1613+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L396
	ldr	r3, .L1613+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L396
	ldr	r3, .L1613+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L396:
	ldr	r3, .L1613+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L398
	ldr	r3, .L1613+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L398
	ldr	r3, .L1613+84
	ldr	r3, [r3]	@ float
	ldr	r1, .L1613+12
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L398
	ldr	r3, .L1613+76
	ldr	r3, [r3]	@ float
	ldr	r1, .L1613+20
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L400
.L398:
	ldr	r3, .L1613+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L400
	ldr	r3, .L1613+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L401
	ldr	r3, .L1613+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L400
.L401:
	ldr	r3, .L1613+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L400
	ldr	r3, .L1613+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L400
	ldr	r3, .L1613+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L400
	ldr	r3, .L1613+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L400
	ldr	r3, .L1613+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L400
	ldr	r3, .L1613+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L400:
	ldr	r3, .L1613+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1613+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L402
	ldr	r3, .L1613+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L402
	ldr	r3, .L1613+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L402
	ldr	r3, .L1613+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L402
	ldr	r3, .L1613+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L402
	ldr	r3, .L1613+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L402
	ldr	r3, .L1613+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1613+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L402
	ldr	r3, .L1613+92
	ldr	r3, [r3]	@ float
	ldr	r2, .L1613+96
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
.L402:
	ldr	r3, .L1613+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L405
	ldr	r3, .L1613+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L405
	ldr	r3, .L1613+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L405
	ldr	r3, .L1613+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L405
	ldr	r3, .L1613+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1613+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L405:
	ldr	r3, .L1613+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L406
	ldr	r3, .L1613+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L406
	ldr	r3, .L1613+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L406
	ldr	r3, .L1613+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L406
	ldr	r3, .L1613+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	b	.L1614
.L1615:
	.align	2
.L1613:
	.word	s11_evt1
	.word	s11_evt0
	.word	s11_x
	.word	1101004800
	.word	s11_y
	.word	1123024896
	.word	delta
	.word	_x_s11_l2
	.word	_x_s11_l0
	.word	_x_s11_l1
	.word	s11_l2
	.word	s11_l0
	.word	s11_l1
	.word	s11_z
	.word	_x_s11_z
	.word	_x_s11_x
	.word	_x_s11_y
	.word	_x_s10_evt0
	.word	_x_s10_evt1
	.word	s10_z
	.word	_x_s10_z
	.word	s10_x
	.word	_x_s10_x
	.word	s10_y
	.word	_x_s10_y
	.word	_x_s10_l2
	.word	_x_s10_l0
	.word	_x_s10_l1
	.word	s10_l2
	.word	s10_l0
	.word	s10_l1
	.word	s10_evt0
	.word	s10_evt1
	.word	_x_s9_evt0
	.word	_x_s9_evt1
	.word	1123024896
	.word	_x_s9_l2
	.word	_x_s9_l0
	.word	_x_s9_l1
	.word	_x_s9_x
	.word	_x_s9_z
	.word	s9_y
	.word	_x_s9_y
	.word	s9_l2
	.word	s9_l0
	.word	s9_l1
	.word	delta
	.word	s9_evt0
	.word	s9_evt1
	.word	s9_x
	.word	1101004800
	.word	s9_z
.L1614:
	cmp	r3, #0
	bne	.L406
	ldr	r3, .L1613+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L406
	ldr	r3, .L1613+92
	ldr	r3, [r3]	@ float
	ldr	r2, .L1613+96
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L406
	ldr	r3, .L1613+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L409
.L406:
	ldr	r3, .L1613+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L409
	ldr	r3, .L1613+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L409
	ldr	r3, .L1613+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L409
	ldr	r3, .L1613+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L409
	ldr	r3, .L1613+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1613+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L409:
	ldr	r3, .L1613+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1613+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L410
	ldr	r3, .L1613+92
	ldr	r3, [r3]	@ float
	ldr	r2, .L1613+96
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L410
	ldr	r3, .L1613+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1613+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L410
	ldr	r3, .L1613+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L414
	ldr	r3, .L1613+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L414
	ldr	r3, .L1613+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L415
.L414:
	ldr	r3, .L1613+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L410
	ldr	r3, .L1613+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L410
	ldr	r3, .L1613+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L415
.L410:
	ldr	r3, .L1613+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L415
	ldr	r3, .L1613+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L415
	ldr	r3, .L1613+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L415
	ldr	r3, .L1613+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L415
	ldr	r3, .L1613+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1613+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L415:
	ldr	r3, .L1613+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L416
	ldr	r3, .L1613+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L416
	ldr	r3, .L1613+84
	ldr	r3, [r3]	@ float
	ldr	r1, .L1613+200
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L416
	ldr	r3, .L1613+92
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1613+140
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L418
	mov	r3, #0
	mov	r4, r3
.L418:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L419
.L416:
	ldr	r3, .L1613+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L419
	ldr	r3, .L1613+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L420
	ldr	r3, .L1613+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L419
.L420:
	ldr	r3, .L1613+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L419
	ldr	r3, .L1613+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L419
	ldr	r3, .L1613+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L419
	ldr	r3, .L1613+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L419
	ldr	r3, .L1613+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L419
	ldr	r3, .L1613+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L419:
	ldr	r3, .L1613+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L421
	ldr	r3, .L1613+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L421
	ldr	r3, .L1613+84
	ldr	r3, [r3]	@ float
	ldr	r1, .L1613+200
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L421
	ldr	r3, .L1613+92
	ldr	r3, [r3]	@ float
	ldr	r1, .L1613+140
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L423
.L421:
	ldr	r3, .L1613+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L423
	ldr	r3, .L1613+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L424
	ldr	r3, .L1613+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L423
.L424:
	ldr	r3, .L1613+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L423
	ldr	r3, .L1613+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L423
	ldr	r3, .L1613+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L423
	ldr	r3, .L1613+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L423
	ldr	r3, .L1613+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L423
	ldr	r3, .L1613+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L423:
	ldr	r3, .L1613+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1613+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L425
	ldr	r3, .L1613+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1613+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L425
	ldr	r3, .L1613+92
	ldr	r3, [r3]	@ float
	ldr	r2, .L1613+96
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L425
	ldr	r3, .L1613+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L425
	ldr	r3, .L1613+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L425
	ldr	r3, .L1613+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L425
	ldr	r3, .L1613+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L425
	ldr	r3, .L1613+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L429
.L425:
	ldr	r3, .L1613+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L429
	ldr	r3, .L1613+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L429
	ldr	r3, .L1613+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L429
	ldr	r3, .L1613+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L429
	ldr	r3, .L1613+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1613+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L429:
	ldr	r3, .L1613+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L430
	ldr	r3, .L1613+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L431
.L430:
	ldr	r3, .L1613+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L432
	ldr	r3, .L1613+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L431
.L432:
	ldr	r3, .L1613+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L433
	ldr	r3, .L1613+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L431
.L433:
	ldr	r3, .L1613+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1613+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L431:
	ldr	r3, .L1613+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L434
	ldr	r3, .L1613+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L434
	ldr	r3, .L1613+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L435
.L434:
	ldr	r3, .L1613+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L436
	ldr	r3, .L1613+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L436
	ldr	r3, .L1613+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L435
.L436:
	ldr	r3, .L1613+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L437
	ldr	r3, .L1613+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L437
	ldr	r3, .L1613+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L435
.L437:
	ldr	r3, .L1613+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L438
	ldr	r3, .L1613+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L438
	ldr	r3, .L1613+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L435
.L438:
	ldr	r3, .L1613+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L439
	ldr	r3, .L1613+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L439
	ldr	r3, .L1613+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L435
.L439:
	ldr	r3, .L1613+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1613+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1613+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L435:
	ldr	r3, .L1613+156
	ldr	r3, [r3]	@ float
	ldr	r1, .L1613+200
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L440
	ldr	r3, .L1613+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L440
	ldr	r3, .L1613+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L440
	ldr	r3, .L1613+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L440:
	ldr	r3, .L1613+156
	ldr	r3, [r3]	@ float
	ldr	r1, .L1613+140
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L441
	ldr	r3, .L1613+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L441
	ldr	r3, .L1613+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L441
	ldr	r3, .L1613+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L441:
	ldr	r3, .L1613+156
	ldr	r3, [r3]	@ float
	ldr	r1, .L1613+140
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L442
	ldr	r3, .L1613+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L442
	ldr	r3, .L1613+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L442
	ldr	r3, .L1613+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L442:
	ldr	r3, .L1613+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L443
	ldr	r3, .L1613+184
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1613+196
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1613+156
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1613+184
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1613+164
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1613+168
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1613+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1613+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1613+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1613+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1613+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1613+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1613+184
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1613+204
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1613+160
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L443:
	ldr	r3, .L1613+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1613+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L447
	ldr	r3, .L1613+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1613+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L447
	ldr	r3, .L1613+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1613+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L447
	ldr	r3, .L1613+184
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1613+196
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1613+156
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L447
	ldr	r3, .L1613+184
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1613+164
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1613+168
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L447
	ldr	r3, .L1613+184
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1613+204
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1613+160
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L450
.L447:
	ldr	r3, .L1613+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L450
	ldr	r3, .L1613+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L450:
	ldr	r3, .L1613+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L451
	ldr	r3, .L1613+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L451
	ldr	r3, .L1613+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L451
	ldr	r3, .L1613+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L451
	ldr	r3, .L1613+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L451
	ldr	r3, .L1613+156
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L451
	ldr	r3, .L1613+168
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L451
	ldr	r3, .L1613+204
	ldr	r3, [r3]	@ float
	ldr	r2, .L1613+160
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L454
.L451:
	ldr	r3, .L1613+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L454
	ldr	r3, .L1613+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L454
	ldr	r3, .L1613+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L454
	ldr	r3, .L1613+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L454
	ldr	r3, .L1613+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1613+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L454:
	ldr	r3, .L1613+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L455
	ldr	r3, .L1613+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L455
	ldr	r3, .L1613+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L456
.L455:
	ldr	r3, .L1613+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L457
	ldr	r3, .L1613+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L457
	ldr	r3, .L1613+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L457
.L456:
	ldr	r3, .L1613+196
	ldr	r3, [r3]	@ float
	ldr	r2, .L1613+156
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L457
	ldr	r3, .L1613+204
	ldr	r3, [r3]	@ float
	ldr	r2, .L1613+160
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L457
	ldr	r3, .L1613+164
	ldr	r3, [r3]	@ float
	ldr	r2, .L1613+168
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L460
.L457:
	ldr	r3, .L1613+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L460
	ldr	r3, .L1613+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L460
	ldr	r3, .L1613+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L460
	ldr	r3, .L1613+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L460
	ldr	r3, .L1613+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1613+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L460:
	ldr	r3, .L1613+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L461
	ldr	r3, .L1613+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L461
	ldr	r3, .L1613+196
	ldr	r3, [r3]	@ float
	ldr	r1, .L1613+200
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L461
	ldr	r3, .L1613+204
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1616
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L463
	mov	r3, #0
	mov	r4, r3
.L463:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L464
.L461:
	ldr	r3, .L1616+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L464
	ldr	r3, .L1616+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L465
	ldr	r3, .L1616+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L464
.L465:
	ldr	r3, .L1616+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L464
	ldr	r3, .L1616+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L464
	ldr	r3, .L1616+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L464
	ldr	r3, .L1616+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L464
	ldr	r3, .L1616+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L464
	ldr	r3, .L1616+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L464:
	ldr	r3, .L1616+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L466
	ldr	r3, .L1616+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L466
	ldr	r3, .L1616+40
	ldr	r3, [r3]	@ float
	ldr	r1, .L1616+136
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L466
	ldr	r3, .L1616+44
	ldr	r3, [r3]	@ float
	ldr	r1, .L1616
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L468
.L466:
	ldr	r3, .L1616+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L468
	ldr	r3, .L1616+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L469
	ldr	r3, .L1616+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L468
.L469:
	ldr	r3, .L1616+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L468
	ldr	r3, .L1616+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L468
	ldr	r3, .L1616+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L468
	ldr	r3, .L1616+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L468
	ldr	r3, .L1616+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L468
	ldr	r3, .L1616+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L468:
	ldr	r3, .L1616+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1616+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L470
	ldr	r3, .L1616+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L470
	ldr	r3, .L1616+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L470
	ldr	r3, .L1616+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L470
	ldr	r3, .L1616+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L470
	ldr	r3, .L1616+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L470
	ldr	r3, .L1616+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L1616+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L470
	ldr	r3, .L1616+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L1616+60
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L473
.L470:
	ldr	r3, .L1616+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L473
	ldr	r3, .L1616+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L473
	ldr	r3, .L1616+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L473
	ldr	r3, .L1616+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L473
	ldr	r3, .L1616+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1616+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L473:
	ldr	r3, .L1616+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L474
	ldr	r3, .L1616+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L474
	ldr	r3, .L1616+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L474
	ldr	r3, .L1616+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L474
	ldr	r3, .L1616+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L474
	ldr	r3, .L1616+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L474
	ldr	r3, .L1616+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L1616+60
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L474
	ldr	r3, .L1616+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L477
.L474:
	ldr	r3, .L1616+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L477
	ldr	r3, .L1616+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L477
	ldr	r3, .L1616+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L477
	ldr	r3, .L1616+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L477
	ldr	r3, .L1616+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1616+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L477:
	ldr	r3, .L1616+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L1616+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L478
	ldr	r3, .L1616+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L1616+60
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L478
	ldr	r3, .L1616+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1616+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L478
	ldr	r3, .L1616+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L482
	ldr	r3, .L1616+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L482
	ldr	r3, .L1616+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L483
.L482:
	ldr	r3, .L1616+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L478
	ldr	r3, .L1616+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L478
	ldr	r3, .L1616+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L483
.L478:
	ldr	r3, .L1616+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L483
	ldr	r3, .L1616+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L483
	ldr	r3, .L1616+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L483
	ldr	r3, .L1616+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L483
	ldr	r3, .L1616+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1616+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L483:
	ldr	r3, .L1616+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L484
	ldr	r3, .L1616+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L484
	ldr	r3, .L1616+40
	ldr	r3, [r3]	@ float
	ldr	r1, .L1616+136
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L484
	ldr	r3, .L1616+56
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1616
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L486
	mov	r3, #0
	mov	r4, r3
.L486:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L487
.L484:
	ldr	r3, .L1616+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L487
	ldr	r3, .L1616+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L488
	ldr	r3, .L1616+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L487
.L488:
	ldr	r3, .L1616+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L487
	ldr	r3, .L1616+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L487
	ldr	r3, .L1616+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L487
	ldr	r3, .L1616+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L487
	ldr	r3, .L1616+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L487
	ldr	r3, .L1616+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L487:
	ldr	r3, .L1616+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L489
	ldr	r3, .L1616+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L489
	ldr	r3, .L1616+40
	ldr	r3, [r3]	@ float
	ldr	r1, .L1616+136
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L489
	ldr	r3, .L1616+56
	ldr	r3, [r3]	@ float
	ldr	r1, .L1616
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L491
.L489:
	ldr	r3, .L1616+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L491
	ldr	r3, .L1616+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L492
	ldr	r3, .L1616+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L491
.L492:
	ldr	r3, .L1616+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L491
	ldr	r3, .L1616+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L491
	ldr	r3, .L1616+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L491
	ldr	r3, .L1616+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L491
	ldr	r3, .L1616+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L491
	ldr	r3, .L1616+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L491:
	ldr	r3, .L1616+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1616+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L493
	ldr	r3, .L1616+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L1616+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L493
	ldr	r3, .L1616+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L1616+60
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L493
	ldr	r3, .L1616+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L493
	ldr	r3, .L1616+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L493
	ldr	r3, .L1616+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L493
	ldr	r3, .L1616+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L493
	ldr	r3, .L1616+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L497
.L493:
	ldr	r3, .L1616+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L497
	ldr	r3, .L1616+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L497
	ldr	r3, .L1616+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L497
	ldr	r3, .L1616+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L497
	ldr	r3, .L1616+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1616+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L497:
	ldr	r3, .L1616+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L498
	ldr	r3, .L1616+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L499
.L498:
	ldr	r3, .L1616+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L500
	ldr	r3, .L1616+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L499
.L500:
	ldr	r3, .L1616+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L501
	ldr	r3, .L1616+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L499
.L501:
	ldr	r3, .L1616+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1616+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L499:
	ldr	r3, .L1616+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L502
	ldr	r3, .L1616+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L502
	ldr	r3, .L1616+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L503
.L502:
	ldr	r3, .L1616+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L504
	ldr	r3, .L1616+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L504
	ldr	r3, .L1616+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L503
.L504:
	ldr	r3, .L1616+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L505
	ldr	r3, .L1616+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L505
	ldr	r3, .L1616+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L503
.L505:
	ldr	r3, .L1616+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L506
	ldr	r3, .L1616+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L506
	ldr	r3, .L1616+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L503
.L506:
	ldr	r3, .L1616+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L507
	ldr	r3, .L1616+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L507
	ldr	r3, .L1616+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L503
.L507:
	ldr	r3, .L1616+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1616+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1616+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L503:
	ldr	r3, .L1616+84
	ldr	r3, [r3]	@ float
	ldr	r1, .L1616+136
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L508
	ldr	r3, .L1616+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L508
	ldr	r3, .L1616+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L508
	ldr	r3, .L1616+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L508:
	ldr	r3, .L1616+84
	ldr	r3, [r3]	@ float
	ldr	r1, .L1616
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L509
	ldr	r3, .L1616+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L509
	ldr	r3, .L1616+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L509
	ldr	r3, .L1616+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L509:
	ldr	r3, .L1616+84
	ldr	r3, [r3]	@ float
	ldr	r1, .L1616
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L510
	ldr	r3, .L1616+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L510
	ldr	r3, .L1616+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L510
	ldr	r3, .L1616+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L510:
	ldr	r3, .L1616+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L511
	ldr	r3, .L1616+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1616+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1616+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1616+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1616+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1616+92
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1616+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1616+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1616+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1616+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1616+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1616+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1616+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1616+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1616+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L511:
	ldr	r3, .L1616+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1616+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L515
	ldr	r3, .L1616+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1616+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L515
	ldr	r3, .L1616+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1616+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L515
	ldr	r3, .L1616+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1616+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1616+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L515
	ldr	r3, .L1616+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1616+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1616+92
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L515
	ldr	r3, .L1616+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1616+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	b	.L1617
.L1618:
	.align	2
.L1616:
	.word	1123024896
	.word	delta
	.word	s9_evt0
	.word	s9_evt1
	.word	s9_l2
	.word	s9_l0
	.word	s9_l1
	.word	_x_s9_l2
	.word	_x_s9_l1
	.word	_x_s9_l0
	.word	s9_x
	.word	s9_z
	.word	_x_s9_z
	.word	_x_s9_x
	.word	s9_y
	.word	_x_s9_y
	.word	_x_s8_evt0
	.word	_x_s8_evt1
	.word	s8_z
	.word	_x_s8_z
	.word	s8_x
	.word	_x_s8_x
	.word	s8_y
	.word	_x_s8_y
	.word	_x_s8_l2
	.word	_x_s8_l0
	.word	_x_s8_l1
	.word	s8_l2
	.word	s8_l0
	.word	s8_l1
	.word	s8_evt0
	.word	s8_evt1
	.word	_x_s7_evt0
	.word	_x_s7_evt1
	.word	1101004800
	.word	1123024896
	.word	_x_s7_l2
	.word	_x_s7_l0
	.word	_x_s7_l1
	.word	s7_x
	.word	_x_s7_x
	.word	delta
	.word	s7_y
	.word	_x_s7_y
.L1617:
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1616+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L518
.L515:
	ldr	r3, .L1616+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L518
	ldr	r3, .L1616+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L518:
	ldr	r3, .L1616+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L519
	ldr	r3, .L1616+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L519
	ldr	r3, .L1616+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L519
	ldr	r3, .L1616+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L519
	ldr	r3, .L1616+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L519
	ldr	r3, .L1616+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L519
	ldr	r3, .L1616+92
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L519
	ldr	r3, .L1616+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1616+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L522
.L519:
	ldr	r3, .L1616+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L522
	ldr	r3, .L1616+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L522
	ldr	r3, .L1616+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L522
	ldr	r3, .L1616+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L522
	ldr	r3, .L1616+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1616+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L522:
	ldr	r3, .L1616+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L523
	ldr	r3, .L1616+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L523
	ldr	r3, .L1616+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L524
.L523:
	ldr	r3, .L1616+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L525
	ldr	r3, .L1616+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L525
	ldr	r3, .L1616+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L525
.L524:
	ldr	r3, .L1616+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1616+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L525
	ldr	r3, .L1616+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1616+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L525
	ldr	r3, .L1616+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1616+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L528
.L525:
	ldr	r3, .L1616+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L528
	ldr	r3, .L1616+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L528
	ldr	r3, .L1616+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L528
	ldr	r3, .L1616+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L528
	ldr	r3, .L1616+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1616+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L528:
	ldr	r3, .L1616+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L529
	ldr	r3, .L1616+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L529
	ldr	r3, .L1616+80
	ldr	r3, [r3]	@ float
	ldr	r1, .L1616+136
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L529
	ldr	r3, .L1616+72
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1616+140
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L531
	mov	r3, #0
	mov	r4, r3
.L531:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L532
.L529:
	ldr	r3, .L1616+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L532
	ldr	r3, .L1616+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L533
	ldr	r3, .L1616+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L532
.L533:
	ldr	r3, .L1616+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L532
	ldr	r3, .L1616+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L532
	ldr	r3, .L1616+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L532
	ldr	r3, .L1616+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L532
	ldr	r3, .L1616+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L532
	ldr	r3, .L1616+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L532:
	ldr	r3, .L1616+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L534
	ldr	r3, .L1616+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L534
	ldr	r3, .L1616+80
	ldr	r3, [r3]	@ float
	ldr	r1, .L1616+136
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L534
	ldr	r3, .L1616+72
	ldr	r3, [r3]	@ float
	ldr	r1, .L1616+140
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L536
.L534:
	ldr	r3, .L1616+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L536
	ldr	r3, .L1616+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L537
	ldr	r3, .L1616+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L536
.L537:
	ldr	r3, .L1616+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L536
	ldr	r3, .L1616+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L536
	ldr	r3, .L1616+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L536
	ldr	r3, .L1616+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L536
	ldr	r3, .L1616+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L536
	ldr	r3, .L1616+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L536:
	ldr	r3, .L1616+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1616+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L538
	ldr	r3, .L1616+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L538
	ldr	r3, .L1616+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L538
	ldr	r3, .L1616+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L538
	ldr	r3, .L1616+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L538
	ldr	r3, .L1616+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L538
	ldr	r3, .L1616+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1616+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L538
	ldr	r3, .L1616+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1616+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L541
.L538:
	ldr	r3, .L1616+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L541
	ldr	r3, .L1616+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L541
	ldr	r3, .L1616+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L541
	ldr	r3, .L1616+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L541
	ldr	r3, .L1616+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1616+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L541:
	ldr	r3, .L1616+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L542
	ldr	r3, .L1616+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L542
	ldr	r3, .L1616+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L542
	ldr	r3, .L1616+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L542
	ldr	r3, .L1616+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L542
	ldr	r3, .L1616+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L542
	ldr	r3, .L1616+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1616+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L542
	ldr	r3, .L1616+76
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L545
.L542:
	ldr	r3, .L1616+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L545
	ldr	r3, .L1616+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L545
	ldr	r3, .L1616+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L545
	ldr	r3, .L1616+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L545
	ldr	r3, .L1616+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1616+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L545:
	ldr	r3, .L1616+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1616+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L546
	ldr	r3, .L1616+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1616+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L546
	ldr	r3, .L1616+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1616+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L546
	ldr	r3, .L1616+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L550
	ldr	r3, .L1616+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L550
	ldr	r3, .L1616+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L551
.L550:
	ldr	r3, .L1616+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L546
	ldr	r3, .L1616+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L546
	ldr	r3, .L1616+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L551
.L546:
	ldr	r3, .L1616+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L551
	ldr	r3, .L1616+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L551
	ldr	r3, .L1616+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L551
	ldr	r3, .L1616+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L551
	ldr	r3, .L1616+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1616+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L551:
	ldr	r3, .L1616+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L552
	ldr	r3, .L1616+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L552
	ldr	r3, .L1616+80
	ldr	r3, [r3]	@ float
	ldr	r1, .L1616+136
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L552
	ldr	r3, .L1616+88
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1616+140
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L554
	mov	r3, #0
	mov	r4, r3
.L554:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L555
.L552:
	ldr	r3, .L1616+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L555
	ldr	r3, .L1616+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L556
	ldr	r3, .L1616+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L555
.L556:
	ldr	r3, .L1616+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L555
	ldr	r3, .L1616+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L555
	ldr	r3, .L1616+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L555
	ldr	r3, .L1616+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L555
	ldr	r3, .L1616+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L555
	ldr	r3, .L1616+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L555:
	ldr	r3, .L1616+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L557
	ldr	r3, .L1616+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L557
	ldr	r3, .L1616+80
	ldr	r3, [r3]	@ float
	ldr	r1, .L1616+136
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L557
	ldr	r3, .L1616+88
	ldr	r3, [r3]	@ float
	ldr	r1, .L1616+140
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L559
.L557:
	ldr	r3, .L1616+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L559
	ldr	r3, .L1616+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L560
	ldr	r3, .L1616+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L559
.L560:
	ldr	r3, .L1616+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L559
	ldr	r3, .L1616+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L559
	ldr	r3, .L1616+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L559
	ldr	r3, .L1616+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L559
	ldr	r3, .L1616+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L559
	ldr	r3, .L1616+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L559:
	ldr	r3, .L1616+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1616+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L561
	ldr	r3, .L1616+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1616+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L561
	ldr	r3, .L1616+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1616+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L561
	ldr	r3, .L1616+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L561
	ldr	r3, .L1616+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L561
	ldr	r3, .L1616+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L561
	ldr	r3, .L1616+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L561
	ldr	r3, .L1616+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L565
.L561:
	ldr	r3, .L1616+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L565
	ldr	r3, .L1616+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L565
	ldr	r3, .L1616+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L565
	ldr	r3, .L1616+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L565
	ldr	r3, .L1616+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1616+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L565:
	ldr	r3, .L1616+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L566
	ldr	r3, .L1616+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L567
.L566:
	ldr	r3, .L1616+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L568
	ldr	r3, .L1616+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L567
.L568:
	ldr	r3, .L1616+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L569
	ldr	r3, .L1616+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L567
.L569:
	ldr	r3, .L1616+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1616+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L567:
	ldr	r3, .L1616+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L570
	ldr	r3, .L1616+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L570
	ldr	r3, .L1616+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L571
.L570:
	ldr	r3, .L1616+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L572
	ldr	r3, .L1616+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L572
	ldr	r3, .L1616+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L571
.L572:
	ldr	r3, .L1616+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L573
	ldr	r3, .L1616+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L573
	ldr	r3, .L1616+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L571
.L573:
	ldr	r3, .L1616+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L574
	ldr	r3, .L1616+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L574
	ldr	r3, .L1616+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L571
.L574:
	ldr	r3, .L1616+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L575
	ldr	r3, .L1616+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L575
	ldr	r3, .L1616+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L571
.L575:
	ldr	r3, .L1616+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1616+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1616+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L571:
	ldr	r3, .L1616+160
	ldr	r3, [r3]	@ float
	ldr	r1, .L1616+136
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L576
	ldr	r3, .L1616+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L576
	ldr	r3, .L1616+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L576
	ldr	r3, .L1616+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L576:
	ldr	r3, .L1616+160
	ldr	r3, [r3]	@ float
	ldr	r1, .L1616+140
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L577
	ldr	r3, .L1616+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L577
	ldr	r3, .L1616+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L577
	ldr	r3, .L1616+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L577:
	ldr	r3, .L1616+160
	ldr	r3, [r3]	@ float
	ldr	r1, .L1616+140
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L578
	ldr	r3, .L1616+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L578
	ldr	r3, .L1616+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L578
	ldr	r3, .L1616+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L578:
	ldr	r3, .L1616+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L579
	ldr	r3, .L1616+164
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1616+156
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1616+160
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1616+164
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1616+168
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1616+172
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1619
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1619+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1619+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1619+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1619+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1619+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1619+128
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1619+24
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1619+28
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L579:
	ldr	r3, .L1619
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1619+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L583
	ldr	r3, .L1619+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1619+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L583
	ldr	r3, .L1619+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1619+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L583
	ldr	r3, .L1619+128
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1619+32
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1619+36
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L583
	ldr	r3, .L1619+128
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1619+40
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1619+44
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L583
	ldr	r3, .L1619+128
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1619+24
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1619+28
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L586
.L583:
	ldr	r3, .L1619+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L586
	ldr	r3, .L1619+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L586:
	ldr	r3, .L1619+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L587
	ldr	r3, .L1619+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L587
	ldr	r3, .L1619+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L587
	ldr	r3, .L1619+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L587
	ldr	r3, .L1619+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L587
	ldr	r3, .L1619+36
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L587
	ldr	r3, .L1619+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L587
	ldr	r3, .L1619+24
	ldr	r3, [r3]	@ float
	ldr	r2, .L1619+28
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L590
.L587:
	ldr	r3, .L1619+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L590
	ldr	r3, .L1619
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L590
	ldr	r3, .L1619+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L590
	ldr	r3, .L1619+128
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L590
	ldr	r3, .L1619+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1619+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L590:
	ldr	r3, .L1619+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L591
	ldr	r3, .L1619+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L591
	ldr	r3, .L1619+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L592
.L591:
	ldr	r3, .L1619+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L593
	ldr	r3, .L1619+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L593
	ldr	r3, .L1619+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L593
.L592:
	ldr	r3, .L1619+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L1619+36
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L593
	ldr	r3, .L1619+24
	ldr	r3, [r3]	@ float
	ldr	r2, .L1619+28
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L593
	ldr	r3, .L1619+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L1619+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L596
.L593:
	ldr	r3, .L1619+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L596
	ldr	r3, .L1619
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L596
	ldr	r3, .L1619+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L596
	ldr	r3, .L1619+128
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L596
	ldr	r3, .L1619+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1619+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L596:
	ldr	r3, .L1619+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L597
	ldr	r3, .L1619+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L597
	ldr	r3, .L1619+32
	ldr	r3, [r3]	@ float
	ldr	r1, .L1619+116
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L597
	ldr	r3, .L1619+24
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1619+124
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L599
	mov	r3, #0
	mov	r4, r3
.L599:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L600
.L597:
	ldr	r3, .L1619+128
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L600
	ldr	r3, .L1619+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L601
	ldr	r3, .L1619+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L600
.L601:
	ldr	r3, .L1619+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L600
	ldr	r3, .L1619
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L600
	ldr	r3, .L1619+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L600
	ldr	r3, .L1619+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L600
	ldr	r3, .L1619+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L600
	ldr	r3, .L1619+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L600:
	ldr	r3, .L1619+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L602
	ldr	r3, .L1619+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L602
	ldr	r3, .L1619+32
	ldr	r3, [r3]	@ float
	ldr	r1, .L1619+116
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L602
	ldr	r3, .L1619+24
	ldr	r3, [r3]	@ float
	ldr	r1, .L1619+124
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L604
.L602:
	ldr	r3, .L1619+128
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L604
	ldr	r3, .L1619+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L605
	ldr	r3, .L1619+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L604
.L605:
	ldr	r3, .L1619+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L604
	ldr	r3, .L1619
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L604
	ldr	r3, .L1619+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L604
	ldr	r3, .L1619+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L604
	ldr	r3, .L1619+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L604
	ldr	r3, .L1619+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L604:
	ldr	r3, .L1619+24
	ldr	r3, [r3]	@ float
	ldr	r2, .L1619+28
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L606
	ldr	r3, .L1619+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L606
	ldr	r3, .L1619+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L606
	ldr	r3, .L1619+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L606
	ldr	r3, .L1619+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L606
	ldr	r3, .L1619+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L606
	ldr	r3, .L1619+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L1619+36
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L606
	ldr	r3, .L1619+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L1619+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L609
.L606:
	ldr	r3, .L1619+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L609
	ldr	r3, .L1619+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L609
	ldr	r3, .L1619
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L609
	ldr	r3, .L1619+128
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L609
	ldr	r3, .L1619+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1619+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L609:
	ldr	r3, .L1619+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L610
	ldr	r3, .L1619+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L610
	ldr	r3, .L1619+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L610
	ldr	r3, .L1619+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L610
	ldr	r3, .L1619+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L610
	ldr	r3, .L1619+36
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L610
	ldr	r3, .L1619+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L1619+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L610
	ldr	r3, .L1619+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L613
.L610:
	ldr	r3, .L1619+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L613
	ldr	r3, .L1619
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L613
	ldr	r3, .L1619+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L613
	ldr	r3, .L1619+128
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L613
	ldr	r3, .L1619+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1619+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L613:
	ldr	r3, .L1619+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L1619+36
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L614
	ldr	r3, .L1619+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L1619+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L614
	ldr	r3, .L1619+24
	ldr	r3, [r3]	@ float
	ldr	r2, .L1619+28
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L614
	ldr	r3, .L1619+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L618
	ldr	r3, .L1619+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L618
	ldr	r3, .L1619+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L619
.L618:
	ldr	r3, .L1619+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L614
	ldr	r3, .L1619+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L614
	ldr	r3, .L1619+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L619
.L614:
	ldr	r3, .L1619+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L619
	ldr	r3, .L1619
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L619
	ldr	r3, .L1619+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L619
	ldr	r3, .L1619+128
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L619
	ldr	r3, .L1619+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1619+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L619:
	ldr	r3, .L1619+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L620
	ldr	r3, .L1619+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L620
	ldr	r3, .L1619+32
	ldr	r3, [r3]	@ float
	ldr	r1, .L1619+116
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L620
	ldr	r3, .L1619+40
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1619+124
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L622
	mov	r3, #0
	mov	r4, r3
.L622:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L623
.L620:
	ldr	r3, .L1619+128
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L623
	ldr	r3, .L1619+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L624
	ldr	r3, .L1619+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L623
.L624:
	ldr	r3, .L1619+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L623
	ldr	r3, .L1619
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L623
	ldr	r3, .L1619+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L623
	ldr	r3, .L1619+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L623
	ldr	r3, .L1619+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L623
	ldr	r3, .L1619+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L623:
	ldr	r3, .L1619+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L625
	ldr	r3, .L1619+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L625
	ldr	r3, .L1619+32
	ldr	r3, [r3]	@ float
	ldr	r1, .L1619+116
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L625
	ldr	r3, .L1619+40
	ldr	r3, [r3]	@ float
	ldr	r1, .L1619+124
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L627
.L625:
	ldr	r3, .L1619+128
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L627
	ldr	r3, .L1619+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L628
	ldr	r3, .L1619+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L627
.L628:
	ldr	r3, .L1619+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L627
	ldr	r3, .L1619+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L627
	ldr	r3, .L1619+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L627
	ldr	r3, .L1619+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L627
	ldr	r3, .L1619
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L627
	ldr	r3, .L1619+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L627:
	ldr	r3, .L1619+24
	ldr	r3, [r3]	@ float
	ldr	r2, .L1619+28
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L629
	ldr	r3, .L1619+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L1619+36
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L629
	ldr	r3, .L1619+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L1619+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L629
	ldr	r3, .L1619+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L629
	ldr	r3, .L1619+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L629
	ldr	r3, .L1619+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L629
	ldr	r3, .L1619+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L629
	ldr	r3, .L1619+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L633
.L629:
	ldr	r3, .L1619+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L633
	ldr	r3, .L1619
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L633
	ldr	r3, .L1619+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L633
	ldr	r3, .L1619+128
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L633
	ldr	r3, .L1619+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1619+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L633:
	ldr	r3, .L1619+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L634
	ldr	r3, .L1619+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L635
.L634:
	ldr	r3, .L1619+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L636
	ldr	r3, .L1619+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L635
.L636:
	ldr	r3, .L1619+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L637
	ldr	r3, .L1619+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L635
.L637:
	ldr	r3, .L1619+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1619+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	b	.L1620
.L1621:
	.align	2
.L1619:
	.word	s7_l0
	.word	_x_s7_l0
	.word	s7_l1
	.word	_x_s7_l1
	.word	s7_l2
	.word	_x_s7_l2
	.word	s7_z
	.word	_x_s7_z
	.word	s7_x
	.word	_x_s7_x
	.word	s7_y
	.word	_x_s7_y
	.word	s7_evt0
	.word	s7_evt1
	.word	_x_s6_evt0
	.word	_x_s6_evt1
	.word	_x_s6_x
	.word	_x_s6_y
	.word	s6_z
	.word	_x_s6_z
	.word	_x_s6_l2
	.word	_x_s6_l0
	.word	_x_s6_l1
	.word	s6_l2
	.word	s6_l0
	.word	s6_l1
	.word	s6_evt0
	.word	s6_evt1
	.word	s6_x
	.word	1101004800
	.word	s6_y
	.word	1123024896
	.word	delta
.L1620:
.L635:
	ldr	r3, .L1619+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L638
	ldr	r3, .L1619+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L638
	ldr	r3, .L1619+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L639
.L638:
	ldr	r3, .L1619+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L640
	ldr	r3, .L1619+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L640
	ldr	r3, .L1619+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L639
.L640:
	ldr	r3, .L1619+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L641
	ldr	r3, .L1619+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L641
	ldr	r3, .L1619+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L639
.L641:
	ldr	r3, .L1619+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L642
	ldr	r3, .L1619+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L642
	ldr	r3, .L1619+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L639
.L642:
	ldr	r3, .L1619+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L643
	ldr	r3, .L1619+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L643
	ldr	r3, .L1619+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L639
.L643:
	ldr	r3, .L1619+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1619+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1619+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L639:
	ldr	r3, .L1619+64
	ldr	r3, [r3]	@ float
	ldr	r1, .L1619+116
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L644
	ldr	r3, .L1619+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L644
	ldr	r3, .L1619+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L644
	ldr	r3, .L1619+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L644:
	ldr	r3, .L1619+64
	ldr	r3, [r3]	@ float
	ldr	r1, .L1619+124
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L645
	ldr	r3, .L1619+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L645
	ldr	r3, .L1619+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L645
	ldr	r3, .L1619+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L645:
	ldr	r3, .L1619+64
	ldr	r3, [r3]	@ float
	ldr	r1, .L1619+124
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L646
	ldr	r3, .L1619+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L646
	ldr	r3, .L1619+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L646
	ldr	r3, .L1619+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L646:
	ldr	r3, .L1619+128
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L647
	ldr	r3, .L1619+128
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1619+112
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1619+64
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1619+128
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1619+120
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1619+68
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1619+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1619+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1619+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1619+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1619+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1619+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1619+128
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1619+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1619+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L647:
	ldr	r3, .L1619+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1619+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L651
	ldr	r3, .L1619+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1619+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L651
	ldr	r3, .L1619+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1619+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L651
	ldr	r3, .L1619+128
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1619+112
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1619+64
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L651
	ldr	r3, .L1619+128
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1619+120
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1619+68
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L651
	ldr	r3, .L1619+128
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1619+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1619+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L654
.L651:
	ldr	r3, .L1619+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L654
	ldr	r3, .L1619+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L654:
	ldr	r3, .L1619+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L655
	ldr	r3, .L1619+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L655
	ldr	r3, .L1619+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L655
	ldr	r3, .L1619+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L655
	ldr	r3, .L1619+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L655
	ldr	r3, .L1619+64
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L655
	ldr	r3, .L1619+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L655
	ldr	r3, .L1619+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1619+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L658
.L655:
	ldr	r3, .L1619+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L658
	ldr	r3, .L1619+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L658
	ldr	r3, .L1619+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L658
	ldr	r3, .L1619+128
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L658
	ldr	r3, .L1619+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1619+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L658:
	ldr	r3, .L1619+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L659
	ldr	r3, .L1619+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L659
	ldr	r3, .L1619+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L660
.L659:
	ldr	r3, .L1619+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L661
	ldr	r3, .L1619+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L661
	ldr	r3, .L1619+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L661
.L660:
	ldr	r3, .L1619+112
	ldr	r3, [r3]	@ float
	ldr	r2, .L1619+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L661
	ldr	r3, .L1619+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1619+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L661
	ldr	r3, .L1619+120
	ldr	r3, [r3]	@ float
	ldr	r2, .L1619+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L664
.L661:
	ldr	r3, .L1619+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L664
	ldr	r3, .L1619+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L664
	ldr	r3, .L1619+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L664
	ldr	r3, .L1619+128
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L664
	ldr	r3, .L1619+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1619+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L664:
	ldr	r3, .L1619+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L665
	ldr	r3, .L1619+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L665
	ldr	r3, .L1619+112
	ldr	r3, [r3]	@ float
	ldr	r1, .L1619+116
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L665
	ldr	r3, .L1619+72
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1619+124
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L667
	mov	r3, #0
	mov	r4, r3
.L667:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L668
.L665:
	ldr	r3, .L1619+128
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L668
	ldr	r3, .L1619+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L669
	ldr	r3, .L1619+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L668
.L669:
	ldr	r3, .L1619+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L668
	ldr	r3, .L1619+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L668
	ldr	r3, .L1619+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L668
	ldr	r3, .L1619+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L668
	ldr	r3, .L1619+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L668
	ldr	r3, .L1619+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L668:
	ldr	r3, .L1619+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L670
	ldr	r3, .L1619+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L670
	ldr	r3, .L1619+112
	ldr	r3, [r3]	@ float
	ldr	r1, .L1619+116
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L670
	ldr	r3, .L1619+72
	ldr	r3, [r3]	@ float
	ldr	r1, .L1619+124
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L672
.L670:
	ldr	r3, .L1619+128
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L672
	ldr	r3, .L1619+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L673
	ldr	r3, .L1619+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L672
.L673:
	ldr	r3, .L1619+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L672
	ldr	r3, .L1619+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L672
	ldr	r3, .L1619+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L672
	ldr	r3, .L1619+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L672
	ldr	r3, .L1619+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L672
	ldr	r3, .L1619+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L672:
	ldr	r3, .L1619+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1619+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L674
	ldr	r3, .L1619+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L674
	ldr	r3, .L1619+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L674
	ldr	r3, .L1619+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L674
	ldr	r3, .L1619+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L674
	ldr	r3, .L1619+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L674
	ldr	r3, .L1619+112
	ldr	r3, [r3]	@ float
	ldr	r2, .L1619+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L674
	ldr	r3, .L1619+120
	ldr	r3, [r3]	@ float
	ldr	r2, .L1619+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L677
.L674:
	ldr	r3, .L1619+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L677
	ldr	r3, .L1619+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L677
	ldr	r3, .L1619+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L677
	ldr	r3, .L1619+128
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L677
	ldr	r3, .L1619+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1619+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L677:
	ldr	r3, .L1619+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L678
	ldr	r3, .L1619+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L678
	ldr	r3, .L1619+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L678
	ldr	r3, .L1619+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L678
	ldr	r3, .L1619+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L678
	ldr	r3, .L1619+64
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L678
	ldr	r3, .L1619+120
	ldr	r3, [r3]	@ float
	ldr	r2, .L1619+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L678
	ldr	r3, .L1619+76
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L681
.L678:
	ldr	r3, .L1619+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L681
	ldr	r3, .L1619+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L681
	ldr	r3, .L1619+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L681
	ldr	r3, .L1619+128
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L681
	ldr	r3, .L1619+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1619+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L681:
	ldr	r3, .L1619+112
	ldr	r3, [r3]	@ float
	ldr	r2, .L1619+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L682
	ldr	r3, .L1619+120
	ldr	r3, [r3]	@ float
	ldr	r2, .L1619+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L682
	ldr	r3, .L1619+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1619+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L682
	ldr	r3, .L1619+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L686
	ldr	r3, .L1619+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L686
	ldr	r3, .L1619+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L687
.L686:
	ldr	r3, .L1619+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L682
	ldr	r3, .L1619+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L682
	ldr	r3, .L1619+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L687
.L682:
	ldr	r3, .L1619+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L687
	ldr	r3, .L1619+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L687
	ldr	r3, .L1619+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L687
	ldr	r3, .L1619+128
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L687
	ldr	r3, .L1619+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1619+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L687:
	ldr	r3, .L1619+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L688
	ldr	r3, .L1619+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L688
	ldr	r3, .L1619+112
	ldr	r3, [r3]	@ float
	ldr	r1, .L1619+116
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L688
	ldr	r3, .L1619+120
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1619+124
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L690
	mov	r3, #0
	mov	r4, r3
.L690:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L691
.L688:
	ldr	r3, .L1619+128
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L691
	ldr	r3, .L1622
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L692
	ldr	r3, .L1622+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L691
.L692:
	ldr	r3, .L1622+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L691
	ldr	r3, .L1622+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L691
	ldr	r3, .L1622+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L691
	ldr	r3, .L1622+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L691
	ldr	r3, .L1622+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L691
	ldr	r3, .L1622+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L691:
	ldr	r3, .L1622+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L693
	ldr	r3, .L1622
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L693
	ldr	r3, .L1622+32
	ldr	r3, [r3]	@ float
	ldr	r1, .L1622+128
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L693
	ldr	r3, .L1622+36
	ldr	r3, [r3]	@ float
	ldr	r1, .L1622+132
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L695
.L693:
	ldr	r3, .L1622+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L695
	ldr	r3, .L1622
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L696
	ldr	r3, .L1622+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L695
.L696:
	ldr	r3, .L1622+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L695
	ldr	r3, .L1622+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L695
	ldr	r3, .L1622+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L695
	ldr	r3, .L1622+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L695
	ldr	r3, .L1622+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L695
	ldr	r3, .L1622+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L695:
	ldr	r3, .L1622+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L1622+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L697
	ldr	r3, .L1622+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L1622+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L697
	ldr	r3, .L1622+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L1622+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L697
	ldr	r3, .L1622+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L697
	ldr	r3, .L1622
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L697
	ldr	r3, .L1622+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L697
	ldr	r3, .L1622+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L697
	ldr	r3, .L1622+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L701
.L697:
	ldr	r3, .L1622+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L701
	ldr	r3, .L1622+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L701
	ldr	r3, .L1622+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L701
	ldr	r3, .L1622+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L701
	ldr	r3, .L1622
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1622+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L701:
	ldr	r3, .L1622+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L702
	ldr	r3, .L1622+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L703
.L702:
	ldr	r3, .L1622+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L704
	ldr	r3, .L1622+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L703
.L704:
	ldr	r3, .L1622+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L705
	ldr	r3, .L1622+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L703
.L705:
	ldr	r3, .L1622+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1622+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L703:
	ldr	r3, .L1622+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L706
	ldr	r3, .L1622+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L706
	ldr	r3, .L1622+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L707
.L706:
	ldr	r3, .L1622+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L708
	ldr	r3, .L1622+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L708
	ldr	r3, .L1622+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L707
.L708:
	ldr	r3, .L1622+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L709
	ldr	r3, .L1622+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L709
	ldr	r3, .L1622+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L707
.L709:
	ldr	r3, .L1622+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L710
	ldr	r3, .L1622+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L710
	ldr	r3, .L1622+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L707
.L710:
	ldr	r3, .L1622+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L711
	ldr	r3, .L1622+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L711
	ldr	r3, .L1622+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L707
.L711:
	ldr	r3, .L1622+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1622+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1622+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L707:
	ldr	r3, .L1622+76
	ldr	r3, [r3]	@ float
	ldr	r1, .L1622+128
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L712
	ldr	r3, .L1622+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L712
	ldr	r3, .L1622+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L712
	ldr	r3, .L1622+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L712:
	ldr	r3, .L1622+76
	ldr	r3, [r3]	@ float
	ldr	r1, .L1622+132
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L713
	ldr	r3, .L1622+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L713
	ldr	r3, .L1622+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L713
	ldr	r3, .L1622+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L713:
	ldr	r3, .L1622+76
	ldr	r3, [r3]	@ float
	ldr	r1, .L1622+132
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L714
	ldr	r3, .L1622+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L714
	ldr	r3, .L1622+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L714
	ldr	r3, .L1622+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L714:
	ldr	r3, .L1622+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L715
	ldr	r3, .L1622+192
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1622+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1622+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1622+192
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1622+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1622+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1622+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1622+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1622+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1622+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1622+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1622+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1622+192
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1622+64
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1622+68
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L715:
	ldr	r3, .L1622+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1622+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L719
	ldr	r3, .L1622+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1622+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L719
	ldr	r3, .L1622+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1622+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L719
	ldr	r3, .L1622+192
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1622+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1622+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L719
	ldr	r3, .L1622+192
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1622+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1622+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L719
	ldr	r3, .L1622+192
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1622+64
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1622+68
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L722
.L719:
	ldr	r3, .L1622+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L722
	ldr	r3, .L1622+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L722:
	ldr	r3, .L1622+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L723
	ldr	r3, .L1622+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L723
	ldr	r3, .L1622+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L723
	ldr	r3, .L1622+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L723
	ldr	r3, .L1622+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L723
	ldr	r3, .L1622+76
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L723
	ldr	r3, .L1622+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L723
	ldr	r3, .L1622+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L1622+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L726
.L723:
	ldr	r3, .L1622+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L726
	ldr	r3, .L1622+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L726
	ldr	r3, .L1622+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L726
	ldr	r3, .L1622+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L726
	ldr	r3, .L1622+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1622+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L726:
	ldr	r3, .L1622+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L727
	ldr	r3, .L1622+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L727
	ldr	r3, .L1622+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L728
.L727:
	ldr	r3, .L1622+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L729
	ldr	r3, .L1622+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L729
	ldr	r3, .L1622+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L729
.L728:
	ldr	r3, .L1622+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1622+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L729
	ldr	r3, .L1622+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L1622+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L729
	ldr	r3, .L1622+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1622+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L732
.L729:
	ldr	r3, .L1622+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L732
	ldr	r3, .L1622+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L732
	ldr	r3, .L1622+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L732
	ldr	r3, .L1622+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L732
	ldr	r3, .L1622+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1622+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L732:
	ldr	r3, .L1622+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L733
	ldr	r3, .L1622+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L733
	ldr	r3, .L1622+72
	ldr	r3, [r3]	@ float
	ldr	r1, .L1622+128
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L733
	ldr	r3, .L1622+64
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1622+132
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L735
	mov	r3, #0
	mov	r4, r3
.L735:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L736
.L733:
	ldr	r3, .L1622+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L736
	ldr	r3, .L1622+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L737
	ldr	r3, .L1622+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L736
.L737:
	ldr	r3, .L1622+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L736
	ldr	r3, .L1622+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L736
	ldr	r3, .L1622+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L736
	ldr	r3, .L1622+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L736
	ldr	r3, .L1622+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L736
	ldr	r3, .L1622+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L736:
	ldr	r3, .L1622+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L738
	ldr	r3, .L1622+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L738
	ldr	r3, .L1622+72
	ldr	r3, [r3]	@ float
	ldr	r1, .L1622+128
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L738
	ldr	r3, .L1622+64
	ldr	r3, [r3]	@ float
	ldr	r1, .L1622+132
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L740
.L738:
	ldr	r3, .L1622+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L740
	ldr	r3, .L1622+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L741
	ldr	r3, .L1622+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L740
.L741:
	ldr	r3, .L1622+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L740
	ldr	r3, .L1622+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L740
	ldr	r3, .L1622+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L740
	ldr	r3, .L1622+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L740
	ldr	r3, .L1622+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L740
	ldr	r3, .L1622+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L740:
	ldr	r3, .L1622+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L1622+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L742
	ldr	r3, .L1622+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L742
	ldr	r3, .L1622+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L742
	ldr	r3, .L1622+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L742
	ldr	r3, .L1622+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L742
	ldr	r3, .L1622+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L742
	ldr	r3, .L1622+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1622+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L742
	ldr	r3, .L1622+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1622+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L745
.L742:
	ldr	r3, .L1622+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L745
	ldr	r3, .L1622+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L745
	ldr	r3, .L1622+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L745
	ldr	r3, .L1622+192
	ldr	r3, [r3]	@ float
	b	.L1623
.L1624:
	.align	2
.L1622:
	.word	s6_evt0
	.word	s6_evt1
	.word	s6_l2
	.word	s6_l0
	.word	s6_l1
	.word	_x_s6_l2
	.word	_x_s6_l0
	.word	_x_s6_l1
	.word	s6_x
	.word	s6_y
	.word	s6_z
	.word	_x_s6_z
	.word	_x_s6_x
	.word	_x_s6_y
	.word	_x_s5_evt0
	.word	_x_s5_evt1
	.word	s5_z
	.word	_x_s5_z
	.word	s5_x
	.word	_x_s5_x
	.word	s5_y
	.word	_x_s5_y
	.word	_x_s5_l2
	.word	_x_s5_l0
	.word	_x_s5_l1
	.word	s5_l2
	.word	s5_l0
	.word	s5_l1
	.word	s5_evt0
	.word	s5_evt1
	.word	_x_s4_evt0
	.word	_x_s4_evt1
	.word	1101004800
	.word	1123024896
	.word	s4_evt0
	.word	s4_evt1
	.word	_x_s4_l2
	.word	_x_s4_l0
	.word	_x_s4_l1
	.word	s4_x
	.word	_x_s4_x
	.word	s4_z
	.word	_x_s4_z
	.word	s4_y
	.word	_x_s4_y
	.word	s4_l2
	.word	s4_l0
	.word	s4_l1
	.word	delta
.L1623:
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L745
	ldr	r3, .L1622+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1622+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L745:
	ldr	r3, .L1622+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L746
	ldr	r3, .L1622+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L746
	ldr	r3, .L1622+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L746
	ldr	r3, .L1622+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L746
	ldr	r3, .L1622+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L746
	ldr	r3, .L1622+76
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L746
	ldr	r3, .L1622+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1622+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L746
	ldr	r3, .L1622+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L749
.L746:
	ldr	r3, .L1622+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L749
	ldr	r3, .L1622+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L749
	ldr	r3, .L1622+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L749
	ldr	r3, .L1622+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L749
	ldr	r3, .L1622+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1622+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L749:
	ldr	r3, .L1622+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1622+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L750
	ldr	r3, .L1622+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1622+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L750
	ldr	r3, .L1622+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L1622+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L750
	ldr	r3, .L1622+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L754
	ldr	r3, .L1622+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L754
	ldr	r3, .L1622+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L755
.L754:
	ldr	r3, .L1622+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L750
	ldr	r3, .L1622+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L750
	ldr	r3, .L1622+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L755
.L750:
	ldr	r3, .L1622+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L755
	ldr	r3, .L1622+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L755
	ldr	r3, .L1622+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L755
	ldr	r3, .L1622+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L755
	ldr	r3, .L1622+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1622+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L755:
	ldr	r3, .L1622+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L756
	ldr	r3, .L1622+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L756
	ldr	r3, .L1622+72
	ldr	r3, [r3]	@ float
	ldr	r1, .L1622+128
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L756
	ldr	r3, .L1622+80
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1622+132
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L758
	mov	r3, #0
	mov	r4, r3
.L758:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L759
.L756:
	ldr	r3, .L1622+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L759
	ldr	r3, .L1622+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L760
	ldr	r3, .L1622+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L759
.L760:
	ldr	r3, .L1622+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L759
	ldr	r3, .L1622+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L759
	ldr	r3, .L1622+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L759
	ldr	r3, .L1622+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L759
	ldr	r3, .L1622+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L759
	ldr	r3, .L1622+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L759:
	ldr	r3, .L1622+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L761
	ldr	r3, .L1622+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L761
	ldr	r3, .L1622+72
	ldr	r3, [r3]	@ float
	ldr	r1, .L1622+128
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L761
	ldr	r3, .L1622+80
	ldr	r3, [r3]	@ float
	ldr	r1, .L1622+132
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L763
.L761:
	ldr	r3, .L1622+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L763
	ldr	r3, .L1622+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L764
	ldr	r3, .L1622+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L763
.L764:
	ldr	r3, .L1622+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L763
	ldr	r3, .L1622+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L763
	ldr	r3, .L1622+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L763
	ldr	r3, .L1622+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L763
	ldr	r3, .L1622+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L763
	ldr	r3, .L1622+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L763:
	ldr	r3, .L1622+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L1622+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L765
	ldr	r3, .L1622+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1622+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L765
	ldr	r3, .L1622+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1622+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L765
	ldr	r3, .L1622+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L765
	ldr	r3, .L1622+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L765
	ldr	r3, .L1622+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L765
	ldr	r3, .L1622+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L765
	ldr	r3, .L1622+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L769
.L765:
	ldr	r3, .L1622+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L769
	ldr	r3, .L1622+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L769
	ldr	r3, .L1622+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L769
	ldr	r3, .L1622+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L769
	ldr	r3, .L1622+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1622+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L769:
	ldr	r3, .L1622+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L770
	ldr	r3, .L1622+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L771
.L770:
	ldr	r3, .L1622+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L772
	ldr	r3, .L1622+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L771
.L772:
	ldr	r3, .L1622+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L773
	ldr	r3, .L1622+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L771
.L773:
	ldr	r3, .L1622+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1622+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L771:
	ldr	r3, .L1622+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L774
	ldr	r3, .L1622+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L774
	ldr	r3, .L1622+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L775
.L774:
	ldr	r3, .L1622+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L776
	ldr	r3, .L1622+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L776
	ldr	r3, .L1622+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L775
.L776:
	ldr	r3, .L1622+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L777
	ldr	r3, .L1622+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L777
	ldr	r3, .L1622+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L775
.L777:
	ldr	r3, .L1622+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L778
	ldr	r3, .L1622+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L778
	ldr	r3, .L1622+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L775
.L778:
	ldr	r3, .L1622+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L779
	ldr	r3, .L1622+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L779
	ldr	r3, .L1622+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L775
.L779:
	ldr	r3, .L1622+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1622+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1622+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L775:
	ldr	r3, .L1622+160
	ldr	r3, [r3]	@ float
	ldr	r1, .L1622+128
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L780
	ldr	r3, .L1622+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L780
	ldr	r3, .L1622+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L780
	ldr	r3, .L1622+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L780:
	ldr	r3, .L1622+160
	ldr	r3, [r3]	@ float
	ldr	r1, .L1622+132
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L781
	ldr	r3, .L1622+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L781
	ldr	r3, .L1622+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L781
	ldr	r3, .L1622+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L781:
	ldr	r3, .L1622+160
	ldr	r3, [r3]	@ float
	ldr	r1, .L1622+132
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L782
	ldr	r3, .L1622+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L782
	ldr	r3, .L1622+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L782
	ldr	r3, .L1622+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L782:
	ldr	r3, .L1622+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L783
	ldr	r3, .L1622+192
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1622+156
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1622+160
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1622+192
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1622+172
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1622+176
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1622+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1622+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1622+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1622+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1622+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1622+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1622+192
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1622+164
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1622+168
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L783:
	ldr	r3, .L1622+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1622+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L787
	ldr	r3, .L1622+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1622+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L787
	ldr	r3, .L1622+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1622+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L787
	ldr	r3, .L1622+192
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1622+156
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1622+160
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L787
	ldr	r3, .L1622+192
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1622+172
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1622+176
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L787
	ldr	r3, .L1622+192
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1622+164
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1622+168
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L790
.L787:
	ldr	r3, .L1622+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L790
	ldr	r3, .L1622+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L790:
	ldr	r3, .L1622+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L791
	ldr	r3, .L1622+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L791
	ldr	r3, .L1622+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L791
	ldr	r3, .L1622+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L791
	ldr	r3, .L1622+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L791
	ldr	r3, .L1622+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L791
	ldr	r3, .L1622+176
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L791
	ldr	r3, .L1622+164
	ldr	r3, [r3]	@ float
	ldr	r2, .L1622+168
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L794
.L791:
	ldr	r3, .L1622+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L794
	ldr	r3, .L1622+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L794
	ldr	r3, .L1622+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L794
	ldr	r3, .L1622+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L794
	ldr	r3, .L1622+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1622+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L794:
	ldr	r3, .L1622+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L795
	ldr	r3, .L1622+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L795
	ldr	r3, .L1622+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L796
.L795:
	ldr	r3, .L1622+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L797
	ldr	r3, .L1622+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L797
	ldr	r3, .L1622+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L797
.L796:
	ldr	r3, .L1622+156
	ldr	r3, [r3]	@ float
	ldr	r2, .L1622+160
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L797
	ldr	r3, .L1622+164
	ldr	r3, [r3]	@ float
	ldr	r2, .L1622+168
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L797
	ldr	r3, .L1622+172
	ldr	r3, [r3]	@ float
	ldr	r2, .L1622+176
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L800
.L797:
	ldr	r3, .L1622+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L800
	ldr	r3, .L1622+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L800
	ldr	r3, .L1622+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L800
	ldr	r3, .L1622+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L800
	ldr	r3, .L1625
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1625+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L800:
	ldr	r3, .L1625
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L801
	ldr	r3, .L1625+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L801
	ldr	r3, .L1625+8
	ldr	r3, [r3]	@ float
	ldr	r1, .L1625+12
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L801
	ldr	r3, .L1625+16
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1625+20
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L803
	mov	r3, #0
	mov	r4, r3
.L803:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L804
.L801:
	ldr	r3, .L1625+156
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L804
	ldr	r3, .L1625
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L805
	ldr	r3, .L1625+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L804
.L805:
	ldr	r3, .L1625+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L804
	ldr	r3, .L1625+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L804
	ldr	r3, .L1625+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L804
	ldr	r3, .L1625+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L804
	ldr	r3, .L1625+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L804
	ldr	r3, .L1625+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L804:
	ldr	r3, .L1625+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L806
	ldr	r3, .L1625
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L806
	ldr	r3, .L1625+8
	ldr	r3, [r3]	@ float
	ldr	r1, .L1625+12
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L806
	ldr	r3, .L1625+16
	ldr	r3, [r3]	@ float
	ldr	r1, .L1625+20
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L808
.L806:
	ldr	r3, .L1625+156
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L808
	ldr	r3, .L1625
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L809
	ldr	r3, .L1625+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L808
.L809:
	ldr	r3, .L1625+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L808
	ldr	r3, .L1625+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L808
	ldr	r3, .L1625+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L808
	ldr	r3, .L1625+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L808
	ldr	r3, .L1625+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L808
	ldr	r3, .L1625+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L808:
	ldr	r3, .L1625+16
	ldr	r3, [r3]	@ float
	ldr	r2, .L1625+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L810
	ldr	r3, .L1625+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L810
	ldr	r3, .L1625
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L810
	ldr	r3, .L1625+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L810
	ldr	r3, .L1625+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L810
	ldr	r3, .L1625+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L810
	ldr	r3, .L1625+8
	ldr	r3, [r3]	@ float
	ldr	r2, .L1625+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L810
	ldr	r3, .L1625+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L1625+60
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L813
.L810:
	ldr	r3, .L1625+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L813
	ldr	r3, .L1625+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L813
	ldr	r3, .L1625+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L813
	ldr	r3, .L1625+156
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L813
	ldr	r3, .L1625
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1625+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L813:
	ldr	r3, .L1625
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L814
	ldr	r3, .L1625+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L814
	ldr	r3, .L1625+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L814
	ldr	r3, .L1625+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L814
	ldr	r3, .L1625+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L814
	ldr	r3, .L1625+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L814
	ldr	r3, .L1625+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L1625+60
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L814
	ldr	r3, .L1625+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L817
.L814:
	ldr	r3, .L1625+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L817
	ldr	r3, .L1625+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L817
	ldr	r3, .L1625+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L817
	ldr	r3, .L1625+156
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L817
	ldr	r3, .L1625
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1625+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L817:
	ldr	r3, .L1625+8
	ldr	r3, [r3]	@ float
	ldr	r2, .L1625+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L818
	ldr	r3, .L1625+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L1625+60
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L818
	ldr	r3, .L1625+16
	ldr	r3, [r3]	@ float
	ldr	r2, .L1625+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L818
	ldr	r3, .L1625+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L822
	ldr	r3, .L1625+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L822
	ldr	r3, .L1625+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L823
.L822:
	ldr	r3, .L1625+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L818
	ldr	r3, .L1625+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L818
	ldr	r3, .L1625+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L823
.L818:
	ldr	r3, .L1625+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L823
	ldr	r3, .L1625+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L823
	ldr	r3, .L1625+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L823
	ldr	r3, .L1625+156
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L823
	ldr	r3, .L1625
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1625+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L823:
	ldr	r3, .L1625
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L824
	ldr	r3, .L1625+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L824
	ldr	r3, .L1625+8
	ldr	r3, [r3]	@ float
	ldr	r1, .L1625+12
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L824
	ldr	r3, .L1625+56
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1625+20
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L826
	mov	r3, #0
	mov	r4, r3
.L826:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L827
.L824:
	ldr	r3, .L1625+156
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L827
	ldr	r3, .L1625
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L828
	ldr	r3, .L1625+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L827
.L828:
	ldr	r3, .L1625+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L827
	ldr	r3, .L1625+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L827
	ldr	r3, .L1625+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L827
	ldr	r3, .L1625+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L827
	ldr	r3, .L1625+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L827
	ldr	r3, .L1625+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L827:
	ldr	r3, .L1625+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L829
	ldr	r3, .L1625
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L829
	ldr	r3, .L1625+8
	ldr	r3, [r3]	@ float
	ldr	r1, .L1625+12
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L829
	ldr	r3, .L1625+56
	ldr	r3, [r3]	@ float
	ldr	r1, .L1625+20
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L831
.L829:
	ldr	r3, .L1625+156
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L831
	ldr	r3, .L1625
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L832
	ldr	r3, .L1625+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L831
.L832:
	ldr	r3, .L1625+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L831
	ldr	r3, .L1625+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L831
	ldr	r3, .L1625+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L831
	ldr	r3, .L1625+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L831
	ldr	r3, .L1625+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L831
	ldr	r3, .L1625+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L831:
	ldr	r3, .L1625+16
	ldr	r3, [r3]	@ float
	ldr	r2, .L1625+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L833
	ldr	r3, .L1625+8
	ldr	r3, [r3]	@ float
	ldr	r2, .L1625+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L833
	ldr	r3, .L1625+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L1625+60
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L833
	ldr	r3, .L1625+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L833
	ldr	r3, .L1625
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L833
	ldr	r3, .L1625+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L833
	ldr	r3, .L1625+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L833
	ldr	r3, .L1625+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L837
.L833:
	ldr	r3, .L1625+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L837
	ldr	r3, .L1625+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L837
	ldr	r3, .L1625+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L837
	ldr	r3, .L1625+156
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L837
	ldr	r3, .L1625
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1625+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L837:
	ldr	r3, .L1625+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L838
	ldr	r3, .L1625+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L839
.L838:
	ldr	r3, .L1625+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L840
	ldr	r3, .L1625+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L839
.L840:
	ldr	r3, .L1625+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L841
	ldr	r3, .L1625+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L839
.L841:
	ldr	r3, .L1625+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1625+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L839:
	ldr	r3, .L1625+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L842
	ldr	r3, .L1625+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L842
	ldr	r3, .L1625+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L843
.L842:
	ldr	r3, .L1625+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L844
	ldr	r3, .L1625+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L844
	ldr	r3, .L1625+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L843
.L844:
	ldr	r3, .L1625+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L845
	ldr	r3, .L1625+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L845
	ldr	r3, .L1625+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L843
.L845:
	ldr	r3, .L1625+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L846
	ldr	r3, .L1625+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L846
	ldr	r3, .L1625+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L843
.L846:
	ldr	r3, .L1625+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L847
	ldr	r3, .L1625+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L847
	ldr	r3, .L1625+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L843
.L847:
	ldr	r3, .L1625+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1625+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1625+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L843:
	ldr	r3, .L1625+84
	ldr	r3, [r3]	@ float
	ldr	r1, .L1625+12
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L848
	ldr	r3, .L1625+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L848
	ldr	r3, .L1625+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L848
	ldr	r3, .L1625+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L848:
	ldr	r3, .L1625+84
	ldr	r3, [r3]	@ float
	ldr	r1, .L1625+20
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L849
	ldr	r3, .L1625+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L849
	ldr	r3, .L1625+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L849
	ldr	r3, .L1625+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L849:
	ldr	r3, .L1625+84
	ldr	r3, [r3]	@ float
	ldr	r1, .L1625+20
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L850
	ldr	r3, .L1625+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L850
	ldr	r3, .L1625+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L850
	ldr	r3, .L1625+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L850:
	ldr	r3, .L1625+156
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L851
	ldr	r3, .L1625+156
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1625+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1625+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1625+156
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1625+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1625+92
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1625+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1625+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1625+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1625+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1625+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1625+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1625+156
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1625+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1625+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L851:
	ldr	r3, .L1625+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1625+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L855
	ldr	r3, .L1625+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1625+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L855
	ldr	r3, .L1625+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1625+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L855
	ldr	r3, .L1625+156
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1625+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1625+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L855
	ldr	r3, .L1625+156
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1625+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1625+92
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	b	.L1626
.L1627:
	.align	2
.L1625:
	.word	s4_evt0
	.word	s4_evt1
	.word	s4_x
	.word	1101004800
	.word	s4_z
	.word	1123024896
	.word	s4_l2
	.word	s4_l0
	.word	s4_l1
	.word	_x_s4_l2
	.word	_x_s4_l1
	.word	_x_s4_l0
	.word	_x_s4_z
	.word	_x_s4_x
	.word	s4_y
	.word	_x_s4_y
	.word	_x_s3_evt0
	.word	_x_s3_evt1
	.word	s3_z
	.word	_x_s3_z
	.word	s3_x
	.word	_x_s3_x
	.word	s3_y
	.word	_x_s3_y
	.word	_x_s3_l2
	.word	_x_s3_l0
	.word	_x_s3_l1
	.word	s3_l2
	.word	s3_l0
	.word	s3_l1
	.word	s3_evt0
	.word	s3_evt1
	.word	_x_s2_evt0
	.word	_x_s2_evt1
	.word	1101004800
	.word	1123024896
	.word	_x_s2_l2
	.word	_x_s2_l0
	.word	_x_s2_l1
	.word	delta
	.word	s2_x
	.word	_x_s2_x
	.word	delta
	.word	s2_y
.L1626:
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L855
	ldr	r3, .L1625+156
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1625+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1625+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L858
.L855:
	ldr	r3, .L1625+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L858
	ldr	r3, .L1625+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L858:
	ldr	r3, .L1625+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L859
	ldr	r3, .L1625+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L859
	ldr	r3, .L1625+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L859
	ldr	r3, .L1625+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L859
	ldr	r3, .L1625+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L859
	ldr	r3, .L1625+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L859
	ldr	r3, .L1625+92
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L859
	ldr	r3, .L1625+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1625+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L862
.L859:
	ldr	r3, .L1625+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L862
	ldr	r3, .L1625+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L862
	ldr	r3, .L1625+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L862
	ldr	r3, .L1625+156
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L862
	ldr	r3, .L1625+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1625+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L862:
	ldr	r3, .L1625+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L863
	ldr	r3, .L1625+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L863
	ldr	r3, .L1625+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L864
.L863:
	ldr	r3, .L1625+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L865
	ldr	r3, .L1625+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L865
	ldr	r3, .L1625+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L865
.L864:
	ldr	r3, .L1625+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1625+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L865
	ldr	r3, .L1625+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1625+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L865
	ldr	r3, .L1625+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1625+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L868
.L865:
	ldr	r3, .L1625+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L868
	ldr	r3, .L1625+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L868
	ldr	r3, .L1625+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L868
	ldr	r3, .L1625+156
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L868
	ldr	r3, .L1625+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1625+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L868:
	ldr	r3, .L1625+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L869
	ldr	r3, .L1625+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L869
	ldr	r3, .L1625+80
	ldr	r3, [r3]	@ float
	ldr	r1, .L1625+136
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L869
	ldr	r3, .L1625+72
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1625+140
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L871
	mov	r3, #0
	mov	r4, r3
.L871:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L872
.L869:
	ldr	r3, .L1625+156
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L872
	ldr	r3, .L1625+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L873
	ldr	r3, .L1625+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L872
.L873:
	ldr	r3, .L1625+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L872
	ldr	r3, .L1625+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L872
	ldr	r3, .L1625+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L872
	ldr	r3, .L1625+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L872
	ldr	r3, .L1625+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L872
	ldr	r3, .L1625+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L872:
	ldr	r3, .L1625+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L874
	ldr	r3, .L1625+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L874
	ldr	r3, .L1625+80
	ldr	r3, [r3]	@ float
	ldr	r1, .L1625+136
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L874
	ldr	r3, .L1625+72
	ldr	r3, [r3]	@ float
	ldr	r1, .L1625+140
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L876
.L874:
	ldr	r3, .L1625+156
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L876
	ldr	r3, .L1625+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L877
	ldr	r3, .L1625+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L876
.L877:
	ldr	r3, .L1625+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L876
	ldr	r3, .L1625+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L876
	ldr	r3, .L1625+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L876
	ldr	r3, .L1625+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L876
	ldr	r3, .L1625+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L876
	ldr	r3, .L1625+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L876:
	ldr	r3, .L1625+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1625+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L878
	ldr	r3, .L1625+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L878
	ldr	r3, .L1625+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L878
	ldr	r3, .L1625+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L878
	ldr	r3, .L1625+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L878
	ldr	r3, .L1625+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L878
	ldr	r3, .L1625+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1625+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L878
	ldr	r3, .L1625+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1625+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L881
.L878:
	ldr	r3, .L1625+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L881
	ldr	r3, .L1625+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L881
	ldr	r3, .L1625+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L881
	ldr	r3, .L1625+156
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L881
	ldr	r3, .L1625+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1625+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L881:
	ldr	r3, .L1625+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L882
	ldr	r3, .L1625+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L882
	ldr	r3, .L1625+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L882
	ldr	r3, .L1625+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L882
	ldr	r3, .L1625+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L882
	ldr	r3, .L1625+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L882
	ldr	r3, .L1625+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1625+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L882
	ldr	r3, .L1625+76
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L885
.L882:
	ldr	r3, .L1625+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L885
	ldr	r3, .L1625+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L885
	ldr	r3, .L1625+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L885
	ldr	r3, .L1625+156
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L885
	ldr	r3, .L1625+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1625+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L885:
	ldr	r3, .L1625+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1625+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L886
	ldr	r3, .L1625+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1625+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L886
	ldr	r3, .L1625+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1625+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L886
	ldr	r3, .L1625+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L890
	ldr	r3, .L1625+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L890
	ldr	r3, .L1625+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L891
.L890:
	ldr	r3, .L1625+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L886
	ldr	r3, .L1625+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L886
	ldr	r3, .L1625+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L891
.L886:
	ldr	r3, .L1625+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L891
	ldr	r3, .L1625+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L891
	ldr	r3, .L1625+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L891
	ldr	r3, .L1625+156
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L891
	ldr	r3, .L1625+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1625+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L891:
	ldr	r3, .L1625+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L892
	ldr	r3, .L1625+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L892
	ldr	r3, .L1625+80
	ldr	r3, [r3]	@ float
	ldr	r1, .L1625+136
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L892
	ldr	r3, .L1625+88
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1625+140
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L894
	mov	r3, #0
	mov	r4, r3
.L894:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L895
.L892:
	ldr	r3, .L1625+156
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L895
	ldr	r3, .L1625+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L896
	ldr	r3, .L1625+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L895
.L896:
	ldr	r3, .L1625+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L895
	ldr	r3, .L1625+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L895
	ldr	r3, .L1625+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L895
	ldr	r3, .L1625+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L895
	ldr	r3, .L1625+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L895
	ldr	r3, .L1625+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L895:
	ldr	r3, .L1625+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L897
	ldr	r3, .L1625+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L897
	ldr	r3, .L1625+80
	ldr	r3, [r3]	@ float
	ldr	r1, .L1625+136
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L897
	ldr	r3, .L1625+88
	ldr	r3, [r3]	@ float
	ldr	r1, .L1625+140
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L899
.L897:
	ldr	r3, .L1625+156
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L899
	ldr	r3, .L1625+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L900
	ldr	r3, .L1625+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L899
.L900:
	ldr	r3, .L1625+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L899
	ldr	r3, .L1625+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L899
	ldr	r3, .L1625+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L899
	ldr	r3, .L1625+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L899
	ldr	r3, .L1625+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L899
	ldr	r3, .L1625+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L899:
	ldr	r3, .L1625+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1625+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L901
	ldr	r3, .L1625+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1625+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L901
	ldr	r3, .L1625+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1625+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L901
	ldr	r3, .L1625+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L901
	ldr	r3, .L1625+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L901
	ldr	r3, .L1625+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L901
	ldr	r3, .L1625+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L901
	ldr	r3, .L1625+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L905
.L901:
	ldr	r3, .L1625+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L905
	ldr	r3, .L1625+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L905
	ldr	r3, .L1625+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L905
	ldr	r3, .L1625+156
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L905
	ldr	r3, .L1625+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1625+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L905:
	ldr	r3, .L1625+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L906
	ldr	r3, .L1625+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L907
.L906:
	ldr	r3, .L1625+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L908
	ldr	r3, .L1625+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L907
.L908:
	ldr	r3, .L1625+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L909
	ldr	r3, .L1625+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L907
.L909:
	ldr	r3, .L1625+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1625+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L907:
	ldr	r3, .L1625+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L910
	ldr	r3, .L1625+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L910
	ldr	r3, .L1625+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L911
.L910:
	ldr	r3, .L1625+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L912
	ldr	r3, .L1625+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L912
	ldr	r3, .L1625+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L911
.L912:
	ldr	r3, .L1625+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L913
	ldr	r3, .L1625+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L913
	ldr	r3, .L1625+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L911
.L913:
	ldr	r3, .L1625+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L914
	ldr	r3, .L1625+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L914
	ldr	r3, .L1625+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L911
.L914:
	ldr	r3, .L1625+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L915
	ldr	r3, .L1625+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L915
	ldr	r3, .L1625+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L911
.L915:
	ldr	r3, .L1625+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1625+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1625+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L911:
	ldr	r3, .L1625+164
	ldr	r3, [r3]	@ float
	ldr	r1, .L1625+136
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L916
	ldr	r3, .L1625+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L916
	ldr	r3, .L1625+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L916
	ldr	r3, .L1625+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L916:
	ldr	r3, .L1625+164
	ldr	r3, [r3]	@ float
	ldr	r1, .L1625+140
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L917
	ldr	r3, .L1625+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L917
	ldr	r3, .L1625+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L917
	ldr	r3, .L1625+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L917:
	ldr	r3, .L1625+164
	ldr	r3, [r3]	@ float
	ldr	r1, .L1625+140
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L918
	ldr	r3, .L1625+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L918
	ldr	r3, .L1625+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L918
	ldr	r3, .L1625+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L918:
	ldr	r3, .L1625+156
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L919
	ldr	r3, .L1625+156
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1625+160
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1625+164
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1625+168
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1625+172
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1628
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1628+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1628+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1628+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1628+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1628+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1628+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1628+116
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1628+28
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1628+32
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L919:
	ldr	r3, .L1628+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1628+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L923
	ldr	r3, .L1628+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1628+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L923
	ldr	r3, .L1628+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1628+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L923
	ldr	r3, .L1628+116
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1628+36
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1628+40
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L923
	ldr	r3, .L1628+116
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1628+44
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1628
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L923
	ldr	r3, .L1628+116
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1628+28
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1628+32
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L926
.L923:
	ldr	r3, .L1628+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L926
	ldr	r3, .L1628+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L926:
	ldr	r3, .L1628+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L927
	ldr	r3, .L1628+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L927
	ldr	r3, .L1628+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L927
	ldr	r3, .L1628+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L927
	ldr	r3, .L1628+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L927
	ldr	r3, .L1628+40
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L927
	ldr	r3, .L1628
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L927
	ldr	r3, .L1628+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L1628+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L930
.L927:
	ldr	r3, .L1628+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L930
	ldr	r3, .L1628+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L930
	ldr	r3, .L1628+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L930
	ldr	r3, .L1628+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L930
	ldr	r3, .L1628+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1628+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L930:
	ldr	r3, .L1628+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L931
	ldr	r3, .L1628+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L931
	ldr	r3, .L1628+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L932
.L931:
	ldr	r3, .L1628+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L933
	ldr	r3, .L1628+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L933
	ldr	r3, .L1628+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L933
.L932:
	ldr	r3, .L1628+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L1628+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L933
	ldr	r3, .L1628+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L1628+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L933
	ldr	r3, .L1628+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1628
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L936
.L933:
	ldr	r3, .L1628+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L936
	ldr	r3, .L1628+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L936
	ldr	r3, .L1628+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L936
	ldr	r3, .L1628+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L936
	ldr	r3, .L1628+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1628+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L936:
	ldr	r3, .L1628+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L937
	ldr	r3, .L1628+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L937
	ldr	r3, .L1628+36
	ldr	r3, [r3]	@ float
	ldr	r1, .L1628+64
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L937
	ldr	r3, .L1628+28
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1628+68
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L939
	mov	r3, #0
	mov	r4, r3
.L939:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L940
.L937:
	ldr	r3, .L1628+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L940
	ldr	r3, .L1628+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L941
	ldr	r3, .L1628+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L940
.L941:
	ldr	r3, .L1628+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L940
	ldr	r3, .L1628+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L940
	ldr	r3, .L1628+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L940
	ldr	r3, .L1628+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L940
	ldr	r3, .L1628+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L940
	ldr	r3, .L1628+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L940:
	ldr	r3, .L1628+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L942
	ldr	r3, .L1628+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L942
	ldr	r3, .L1628+36
	ldr	r3, [r3]	@ float
	ldr	r1, .L1628+64
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L942
	ldr	r3, .L1628+28
	ldr	r3, [r3]	@ float
	ldr	r1, .L1628+68
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L944
.L942:
	ldr	r3, .L1628+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L944
	ldr	r3, .L1628+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L945
	ldr	r3, .L1628+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L944
.L945:
	ldr	r3, .L1628+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L944
	ldr	r3, .L1628+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L944
	ldr	r3, .L1628+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L944
	ldr	r3, .L1628+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L944
	ldr	r3, .L1628+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L944
	ldr	r3, .L1628+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L944:
	ldr	r3, .L1628+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L1628+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L946
	ldr	r3, .L1628+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L946
	ldr	r3, .L1628+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L946
	ldr	r3, .L1628+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L946
	ldr	r3, .L1628+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L946
	ldr	r3, .L1628+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L946
	ldr	r3, .L1628+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L1628+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L946
	ldr	r3, .L1628+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1628
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L949
.L946:
	ldr	r3, .L1628+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L949
	ldr	r3, .L1628+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L949
	ldr	r3, .L1628+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L949
	ldr	r3, .L1628+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L949
	ldr	r3, .L1628+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1628+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L949:
	ldr	r3, .L1628+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L950
	ldr	r3, .L1628+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L950
	ldr	r3, .L1628+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L950
	ldr	r3, .L1628+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L950
	ldr	r3, .L1628+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L950
	ldr	r3, .L1628+40
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L950
	ldr	r3, .L1628+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1628
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L950
	ldr	r3, .L1628+32
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L953
.L950:
	ldr	r3, .L1628+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L953
	ldr	r3, .L1628+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L953
	ldr	r3, .L1628+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L953
	ldr	r3, .L1628+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L953
	ldr	r3, .L1628+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1628+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L953:
	ldr	r3, .L1628+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L1628+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L954
	ldr	r3, .L1628+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1628
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L954
	ldr	r3, .L1628+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L1628+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L954
	ldr	r3, .L1628+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L958
	ldr	r3, .L1628+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L958
	ldr	r3, .L1628+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L959
.L958:
	ldr	r3, .L1628+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L954
	ldr	r3, .L1628+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L954
	ldr	r3, .L1628+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L959
.L954:
	ldr	r3, .L1628+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L959
	ldr	r3, .L1628+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L959
	ldr	r3, .L1628+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L959
	ldr	r3, .L1628+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L959
	ldr	r3, .L1628+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1628+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L959:
	ldr	r3, .L1628+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L960
	ldr	r3, .L1628+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L960
	ldr	r3, .L1628+36
	ldr	r3, [r3]	@ float
	ldr	r1, .L1628+64
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L960
	ldr	r3, .L1628+44
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1628+68
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L962
	mov	r3, #0
	mov	r4, r3
.L962:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L963
.L960:
	ldr	r3, .L1628+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L963
	ldr	r3, .L1628+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L964
	ldr	r3, .L1628+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L963
.L964:
	ldr	r3, .L1628+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L963
	ldr	r3, .L1628+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L963
	ldr	r3, .L1628+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L963
	ldr	r3, .L1628+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L963
	ldr	r3, .L1628+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L963
	ldr	r3, .L1628+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L963:
	ldr	r3, .L1628+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L965
	ldr	r3, .L1628+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L965
	ldr	r3, .L1628+36
	ldr	r3, [r3]	@ float
	ldr	r1, .L1628+64
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L965
	ldr	r3, .L1628+44
	ldr	r3, [r3]	@ float
	ldr	r1, .L1628+68
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L967
.L965:
	ldr	r3, .L1628+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L967
	ldr	r3, .L1628+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L968
	ldr	r3, .L1628+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L967
.L968:
	ldr	r3, .L1628+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L967
	ldr	r3, .L1628+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L967
	ldr	r3, .L1628+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L967
	ldr	r3, .L1628+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L967
	ldr	r3, .L1628+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L967
	ldr	r3, .L1628+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L967:
	ldr	r3, .L1628+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L1628+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L969
	ldr	r3, .L1628+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L1628+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L969
	ldr	r3, .L1628+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1628
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L969
	ldr	r3, .L1628+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L969
	ldr	r3, .L1628+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L969
	ldr	r3, .L1628+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L969
	ldr	r3, .L1628+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L969
	ldr	r3, .L1628+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L973
.L969:
	ldr	r3, .L1628+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L973
	ldr	r3, .L1628+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L973
	ldr	r3, .L1628+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L973
	ldr	r3, .L1628+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L973
	ldr	r3, .L1628+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1628+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L973:
	ldr	r3, .L1628+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L974
	ldr	r3, .L1628+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L975
	b	.L1629
.L1630:
	.align	2
.L1628:
	.word	_x_s2_y
	.word	s2_l0
	.word	_x_s2_l0
	.word	s2_l1
	.word	_x_s2_l1
	.word	s2_l2
	.word	_x_s2_l2
	.word	s2_z
	.word	_x_s2_z
	.word	s2_x
	.word	_x_s2_x
	.word	s2_y
	.word	s2_evt0
	.word	s2_evt1
	.word	_x_s1_evt0
	.word	_x_s1_evt1
	.word	1101004800
	.word	1123024896
	.word	_x_s1_x
	.word	s1_y
	.word	_x_s1_y
	.word	s1_z
	.word	_x_s1_z
	.word	_x_s1_l2
	.word	_x_s1_l0
	.word	_x_s1_l1
	.word	s1_l2
	.word	s1_l0
	.word	s1_l1
	.word	delta
	.word	s1_evt0
	.word	s1_evt1
	.word	s1_x
.L1629:
.L974:
	ldr	r3, .L1628+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L976
	ldr	r3, .L1628+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L975
.L976:
	ldr	r3, .L1628+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L977
	ldr	r3, .L1628+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L975
.L977:
	ldr	r3, .L1628+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1628+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L975:
	ldr	r3, .L1628+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L978
	ldr	r3, .L1628+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L978
	ldr	r3, .L1628+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L979
.L978:
	ldr	r3, .L1628+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L980
	ldr	r3, .L1628+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L980
	ldr	r3, .L1628+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L979
.L980:
	ldr	r3, .L1628+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L981
	ldr	r3, .L1628+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L981
	ldr	r3, .L1628+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L979
.L981:
	ldr	r3, .L1628+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L982
	ldr	r3, .L1628+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L982
	ldr	r3, .L1628+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L979
.L982:
	ldr	r3, .L1628+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L983
	ldr	r3, .L1628+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L983
	ldr	r3, .L1628+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L979
.L983:
	ldr	r3, .L1628+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1628+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1628+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L979:
	ldr	r3, .L1628+72
	ldr	r3, [r3]	@ float
	ldr	r1, .L1628+64
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L984
	ldr	r3, .L1628+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L984
	ldr	r3, .L1628+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L984
	ldr	r3, .L1628+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L984:
	ldr	r3, .L1628+72
	ldr	r3, [r3]	@ float
	ldr	r1, .L1628+68
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L985
	ldr	r3, .L1628+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L985
	ldr	r3, .L1628+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L985
	ldr	r3, .L1628+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L985:
	ldr	r3, .L1628+72
	ldr	r3, [r3]	@ float
	ldr	r1, .L1628+68
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L986
	ldr	r3, .L1628+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L986
	ldr	r3, .L1628+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L986
	ldr	r3, .L1628+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L986:
	ldr	r3, .L1628+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L987
	ldr	r3, .L1628+116
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1628+128
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1628+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1628+116
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1628+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1628+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1628+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1628+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1628+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1628+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1628+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1628+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1628+116
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1628+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1628+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L987:
	ldr	r3, .L1628+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1628+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L991
	ldr	r3, .L1628+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1628+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L991
	ldr	r3, .L1628+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1628+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L991
	ldr	r3, .L1628+116
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1628+128
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1628+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L991
	ldr	r3, .L1628+116
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1628+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1628+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L991
	ldr	r3, .L1628+116
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1628+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1628+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L994
.L991:
	ldr	r3, .L1628+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L994
	ldr	r3, .L1628+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L994:
	ldr	r3, .L1628+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L995
	ldr	r3, .L1628+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L995
	ldr	r3, .L1628+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L995
	ldr	r3, .L1628+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L995
	ldr	r3, .L1628+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L995
	ldr	r3, .L1628+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L995
	ldr	r3, .L1628+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L995
	ldr	r3, .L1628+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1628+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L998
.L995:
	ldr	r3, .L1628+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L998
	ldr	r3, .L1628+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L998
	ldr	r3, .L1628+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L998
	ldr	r3, .L1628+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L998
	ldr	r3, .L1628+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1628+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L998:
	ldr	r3, .L1628+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L999
	ldr	r3, .L1628+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L999
	ldr	r3, .L1628+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1000
.L999:
	ldr	r3, .L1628+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1001
	ldr	r3, .L1628+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1001
	ldr	r3, .L1628+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1001
.L1000:
	ldr	r3, .L1628+128
	ldr	r3, [r3]	@ float
	ldr	r2, .L1628+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1001
	ldr	r3, .L1628+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1628+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1001
	ldr	r3, .L1628+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1628+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1004
.L1001:
	ldr	r3, .L1628+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1004
	ldr	r3, .L1628+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1004
	ldr	r3, .L1628+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1004
	ldr	r3, .L1628+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1004
	ldr	r3, .L1628+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1628+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L1004:
	ldr	r3, .L1628+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1005
	ldr	r3, .L1628+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1005
	ldr	r3, .L1628+128
	ldr	r3, [r3]	@ float
	ldr	r1, .L1628+64
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L1005
	ldr	r3, .L1628+84
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1628+68
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L1007
	mov	r3, #0
	mov	r4, r3
.L1007:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L1008
.L1005:
	ldr	r3, .L1628+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1008
	ldr	r3, .L1628+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1009
	ldr	r3, .L1628+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1008
.L1009:
	ldr	r3, .L1628+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1008
	ldr	r3, .L1628+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1008
	ldr	r3, .L1628+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1008
	ldr	r3, .L1628+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1008
	ldr	r3, .L1628+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1008
	ldr	r3, .L1628+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L1008:
	ldr	r3, .L1628+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1010
	ldr	r3, .L1628+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1010
	ldr	r3, .L1628+128
	ldr	r3, [r3]	@ float
	ldr	r1, .L1628+64
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L1010
	ldr	r3, .L1628+84
	ldr	r3, [r3]	@ float
	ldr	r1, .L1628+68
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L1012
.L1010:
	ldr	r3, .L1628+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1012
	ldr	r3, .L1628+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1013
	ldr	r3, .L1628+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1012
.L1013:
	ldr	r3, .L1628+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1012
	ldr	r3, .L1628+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1012
	ldr	r3, .L1628+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1012
	ldr	r3, .L1628+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1012
	ldr	r3, .L1628+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1012
	ldr	r3, .L1628+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L1012:
	ldr	r3, .L1628+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1628+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1014
	ldr	r3, .L1628+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1014
	ldr	r3, .L1628+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1014
	ldr	r3, .L1628+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1014
	ldr	r3, .L1628+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1014
	ldr	r3, .L1628+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1014
	ldr	r3, .L1628+128
	ldr	r3, [r3]	@ float
	ldr	r2, .L1628+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1014
	ldr	r3, .L1628+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1628+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1017
.L1014:
	ldr	r3, .L1628+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1017
	ldr	r3, .L1628+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1017
	ldr	r3, .L1628+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1017
	ldr	r3, .L1628+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1017
	ldr	r3, .L1628+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1628+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L1017:
	ldr	r3, .L1628+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1018
	ldr	r3, .L1628+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1018
	ldr	r3, .L1628+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1018
	ldr	r3, .L1628+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1018
	ldr	r3, .L1628+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1018
	ldr	r3, .L1628+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1018
	ldr	r3, .L1628+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1628+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1018
	ldr	r3, .L1628+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1021
.L1018:
	ldr	r3, .L1628+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1021
	ldr	r3, .L1628+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1021
	ldr	r3, .L1628+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1021
	ldr	r3, .L1628+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1021
	ldr	r3, .L1628+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1628+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L1021:
	ldr	r3, .L1628+128
	ldr	r3, [r3]	@ float
	ldr	r2, .L1628+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1022
	ldr	r3, .L1628+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1628+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1022
	ldr	r3, .L1628+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1628+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1022
	ldr	r3, .L1628+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1026
	ldr	r3, .L1628+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1026
	ldr	r3, .L1628+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1027
.L1026:
	ldr	r3, .L1628+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1022
	ldr	r3, .L1628+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1022
	ldr	r3, .L1628+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1027
.L1022:
	ldr	r3, .L1628+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1027
	ldr	r3, .L1628+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1027
	ldr	r3, .L1628+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1027
	ldr	r3, .L1628+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1027
	ldr	r3, .L1628+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1628+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L1027:
	ldr	r3, .L1628+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1028
	ldr	r3, .L1628+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1028
	ldr	r3, .L1628+128
	ldr	r3, [r3]	@ float
	ldr	r1, .L1631
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L1028
	ldr	r3, .L1631+4
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1631+8
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L1030
	mov	r3, #0
	mov	r4, r3
.L1030:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L1031
.L1028:
	ldr	r3, .L1631+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1031
	ldr	r3, .L1631+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1032
	ldr	r3, .L1631+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1031
.L1032:
	ldr	r3, .L1631+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1031
	ldr	r3, .L1631+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1031
	ldr	r3, .L1631+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1031
	ldr	r3, .L1631+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1031
	ldr	r3, .L1631+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1031
	ldr	r3, .L1631+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L1031:
	ldr	r3, .L1631+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1033
	ldr	r3, .L1631+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1033
	ldr	r3, .L1631+48
	ldr	r3, [r3]	@ float
	ldr	r1, .L1631
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L1033
	ldr	r3, .L1631+4
	ldr	r3, [r3]	@ float
	ldr	r1, .L1631+8
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L1035
.L1033:
	ldr	r3, .L1631+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1035
	ldr	r3, .L1631+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1036
	ldr	r3, .L1631+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1035
.L1036:
	ldr	r3, .L1631+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1035
	ldr	r3, .L1631+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1035
	ldr	r3, .L1631+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1035
	ldr	r3, .L1631+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1035
	ldr	r3, .L1631+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1035
	ldr	r3, .L1631+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L1035:
	ldr	r3, .L1631+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L1631+56
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1037
	ldr	r3, .L1631+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L1631+60
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1037
	ldr	r3, .L1631+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L1631+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1037
	ldr	r3, .L1631+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1037
	ldr	r3, .L1631+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1037
	ldr	r3, .L1631+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1037
	ldr	r3, .L1631+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1037
	ldr	r3, .L1631+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1041
.L1037:
	ldr	r3, .L1631+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1041
	ldr	r3, .L1631+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1041
	ldr	r3, .L1631+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1041
	ldr	r3, .L1631+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1041
	ldr	r3, .L1631+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1631+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L1041:
	ldr	r3, .L1631+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1042
	ldr	r3, .L1631+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1043
.L1042:
	ldr	r3, .L1631+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1044
	ldr	r3, .L1631+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1043
.L1044:
	ldr	r3, .L1631+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1045
	ldr	r3, .L1631+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1043
.L1045:
	ldr	r3, .L1631+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1631+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L1043:
	ldr	r3, .L1631+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1046
	ldr	r3, .L1631+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1046
	ldr	r3, .L1631+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1047
.L1046:
	ldr	r3, .L1631+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1048
	ldr	r3, .L1631+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1048
	ldr	r3, .L1631+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1047
.L1048:
	ldr	r3, .L1631+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1049
	ldr	r3, .L1631+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1049
	ldr	r3, .L1631+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1047
.L1049:
	ldr	r3, .L1631+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1050
	ldr	r3, .L1631+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1050
	ldr	r3, .L1631+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1047
.L1050:
	ldr	r3, .L1631+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1051
	ldr	r3, .L1631+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1051
	ldr	r3, .L1631+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1047
.L1051:
	ldr	r3, .L1631+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1631+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1631+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L1047:
	ldr	r3, .L1631+96
	ldr	r3, [r3]	@ float
	ldr	r1, .L1631
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1052
	ldr	r3, .L1631+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1052
	ldr	r3, .L1631+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1052
	ldr	r3, .L1631+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L1052:
	ldr	r3, .L1631+96
	ldr	r3, [r3]	@ float
	ldr	r1, .L1631+8
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1053
	ldr	r3, .L1631+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1053
	ldr	r3, .L1631+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1053
	ldr	r3, .L1631+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L1053:
	ldr	r3, .L1631+96
	ldr	r3, [r3]	@ float
	ldr	r1, .L1631+8
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1054
	ldr	r3, .L1631+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1054
	ldr	r3, .L1631+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1054
	ldr	r3, .L1631+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L1054:
	ldr	r3, .L1631+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1055
	ldr	r3, .L1631+12
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1631+92
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1631+96
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1631+12
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1631+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1631+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1631+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1631+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1631+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1631+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1631+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1631+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1631+12
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1631+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1631+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L1055:
	ldr	r3, .L1631+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1631+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1059
	ldr	r3, .L1631+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1631+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1059
	ldr	r3, .L1631+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1631+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1059
	ldr	r3, .L1631+12
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1631+92
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1631+96
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1059
	ldr	r3, .L1631+12
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1631+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1631+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1059
	ldr	r3, .L1631+12
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1631+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1631+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1062
.L1059:
	ldr	r3, .L1631+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1062
	ldr	r3, .L1631+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L1062:
	ldr	r3, .L1631+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1063
	ldr	r3, .L1631+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1063
	ldr	r3, .L1631+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1063
	ldr	r3, .L1631+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1063
	ldr	r3, .L1631+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1063
	ldr	r3, .L1631+96
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1063
	ldr	r3, .L1631+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1063
	ldr	r3, .L1631+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1631+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1066
.L1063:
	ldr	r3, .L1631+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1066
	ldr	r3, .L1631+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1066
	ldr	r3, .L1631+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1066
	ldr	r3, .L1631+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1066
	ldr	r3, .L1631+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1631+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L1066:
	ldr	r3, .L1631+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1067
	ldr	r3, .L1631+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1067
	ldr	r3, .L1631+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1068
.L1067:
	ldr	r3, .L1631+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1069
	ldr	r3, .L1631+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1069
	ldr	r3, .L1631+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1069
.L1068:
	ldr	r3, .L1631+92
	ldr	r3, [r3]	@ float
	ldr	r2, .L1631+96
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1069
	ldr	r3, .L1631+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1631+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1069
	ldr	r3, .L1631+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L1631+104
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1072
.L1069:
	ldr	r3, .L1631+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1072
	ldr	r3, .L1631+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1072
	ldr	r3, .L1631+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1072
	ldr	r3, .L1631+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1072
	ldr	r3, .L1631+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1631+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L1072:
	ldr	r3, .L1631+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1073
	ldr	r3, .L1631+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1073
	ldr	r3, .L1631+92
	ldr	r3, [r3]	@ float
	ldr	r1, .L1631
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L1073
	ldr	r3, .L1631+84
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1631+8
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L1075
	mov	r3, #0
	mov	r4, r3
.L1075:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L1076
.L1073:
	ldr	r3, .L1631+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1076
	ldr	r3, .L1631+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1077
	ldr	r3, .L1631+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1076
.L1077:
	ldr	r3, .L1631+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1076
	ldr	r3, .L1631+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1076
	ldr	r3, .L1631+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1076
	ldr	r3, .L1631+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1076
	ldr	r3, .L1631+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1076
	ldr	r3, .L1631+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L1076:
	ldr	r3, .L1631+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1078
	ldr	r3, .L1631+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1078
	ldr	r3, .L1631+92
	ldr	r3, [r3]	@ float
	ldr	r1, .L1631
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L1078
	ldr	r3, .L1631+84
	ldr	r3, [r3]	@ float
	ldr	r1, .L1631+8
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L1080
.L1078:
	ldr	r3, .L1631+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1080
	ldr	r3, .L1631+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1081
	ldr	r3, .L1631+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1080
.L1081:
	ldr	r3, .L1631+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1080
	ldr	r3, .L1631+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1080
	ldr	r3, .L1631+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1080
	ldr	r3, .L1631+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1080
	ldr	r3, .L1631+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1080
	ldr	r3, .L1631+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L1080:
	ldr	r3, .L1631+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1631+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1082
	ldr	r3, .L1631+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1082
	ldr	r3, .L1631+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1082
	ldr	r3, .L1631+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1082
	ldr	r3, .L1631+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1082
	ldr	r3, .L1631+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1082
	ldr	r3, .L1631+92
	ldr	r3, [r3]	@ float
	b	.L1632
.L1633:
	.align	2
.L1631:
	.word	1101004800
	.word	s1_y
	.word	1123024896
	.word	delta
	.word	s1_evt0
	.word	s1_evt1
	.word	s1_l2
	.word	s1_l0
	.word	s1_l1
	.word	_x_s1_l2
	.word	_x_s1_l0
	.word	_x_s1_l1
	.word	s1_x
	.word	s1_z
	.word	_x_s1_z
	.word	_x_s1_x
	.word	_x_s1_y
	.word	_x_s0_evt0
	.word	_x_s0_evt1
	.word	1101004800
	.word	1123024896
	.word	s0_z
	.word	_x_s0_z
	.word	s0_x
	.word	_x_s0_x
	.word	s0_y
	.word	_x_s0_y
	.word	_x_s0_l2
	.word	_x_s0_l0
	.word	_x_s0_l1
	.word	s0_l2
	.word	s0_l0
	.word	s0_l1
	.word	_x_r_evt_id
	.word	r_x
	.word	_x_r_l
	.word	_x_r_counter
	.word	_x_r_x
	.word	r_l
	.word	r_counter
	.word	_x_delta
	.word	s12_evt0
	.word	s12_evt1
	.word	s11_evt0
	.word	s11_evt1
	.word	s10_evt0
	.word	s10_evt1
	.word	s9_evt0
	.word	s9_evt1
	.word	s8_evt0
	.word	s8_evt1
	.word	s7_evt0
	.word	s7_evt1
	.word	s6_evt0
	.word	s6_evt1
	.word	s5_evt0
	.word	s5_evt1
	.word	s4_evt0
	.word	s4_evt1
	.word	s3_evt0
	.word	s3_evt1
	.word	s2_evt0
	.word	s2_evt1
	.word	s1_evt0
	.word	s1_evt1
	.word	s0_evt1
	.word	r_event0
	.word	r_event1
	.word	r_evt_id
	.word	delta
	.word	s0_evt0
.L1632:
	ldr	r2, .L1631+96
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1082
	ldr	r3, .L1631+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L1631+104
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1085
.L1082:
	ldr	r3, .L1631+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1085
	ldr	r3, .L1631+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1085
	ldr	r3, .L1631+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1085
	ldr	r3, .L1631+276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1085
	ldr	r3, .L1631+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1631+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L1085:
	ldr	r3, .L1631+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1086
	ldr	r3, .L1631+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1086
	ldr	r3, .L1631+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1086
	ldr	r3, .L1631+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1086
	ldr	r3, .L1631+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1086
	ldr	r3, .L1631+96
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1086
	ldr	r3, .L1631+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L1631+104
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1086
	ldr	r3, .L1631+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1089
.L1086:
	ldr	r3, .L1631+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1089
	ldr	r3, .L1631+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1089
	ldr	r3, .L1631+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1089
	ldr	r3, .L1631+276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1089
	ldr	r3, .L1631+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1631+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L1089:
	ldr	r3, .L1631+92
	ldr	r3, [r3]	@ float
	ldr	r2, .L1631+96
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1090
	ldr	r3, .L1631+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L1631+104
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1090
	ldr	r3, .L1631+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1631+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1090
	ldr	r3, .L1631+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1094
	ldr	r3, .L1631+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1094
	ldr	r3, .L1631+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1095
.L1094:
	ldr	r3, .L1631+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1090
	ldr	r3, .L1631+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1090
	ldr	r3, .L1631+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1095
.L1090:
	ldr	r3, .L1631+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1095
	ldr	r3, .L1631+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1095
	ldr	r3, .L1631+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1095
	ldr	r3, .L1631+276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1095
	ldr	r3, .L1631+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1631+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L1095:
	ldr	r3, .L1631+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1096
	ldr	r3, .L1631+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1096
	ldr	r3, .L1631+92
	ldr	r3, [r3]	@ float
	ldr	r1, .L1631+76
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L1096
	ldr	r3, .L1631+100
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1631+80
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L1098
	mov	r3, #0
	mov	r4, r3
.L1098:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L1099
.L1096:
	ldr	r3, .L1631+276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1099
	ldr	r3, .L1631+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1100
	ldr	r3, .L1631+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1099
.L1100:
	ldr	r3, .L1631+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1099
	ldr	r3, .L1631+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1099
	ldr	r3, .L1631+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1099
	ldr	r3, .L1631+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1099
	ldr	r3, .L1631+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1099
	ldr	r3, .L1631+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L1099:
	ldr	r3, .L1631+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1101
	ldr	r3, .L1631+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1101
	ldr	r3, .L1631+92
	ldr	r3, [r3]	@ float
	ldr	r1, .L1631+76
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L1101
	ldr	r3, .L1631+100
	ldr	r3, [r3]	@ float
	ldr	r1, .L1631+80
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L1103
.L1101:
	ldr	r3, .L1631+276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1103
	ldr	r3, .L1631+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1104
	ldr	r3, .L1631+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1103
.L1104:
	ldr	r3, .L1631+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1103
	ldr	r3, .L1631+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1103
	ldr	r3, .L1631+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1103
	ldr	r3, .L1631+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1103
	ldr	r3, .L1631+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1103
	ldr	r3, .L1631+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L1103:
	ldr	r3, .L1631+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1631+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1105
	ldr	r3, .L1631+92
	ldr	r3, [r3]	@ float
	ldr	r2, .L1631+96
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1105
	ldr	r3, .L1631+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L1631+104
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1105
	ldr	r3, .L1631+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1105
	ldr	r3, .L1631+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1105
	ldr	r3, .L1631+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1105
	ldr	r3, .L1631+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1105
	ldr	r3, .L1631+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1109
.L1105:
	ldr	r3, .L1631+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1109
	ldr	r3, .L1631+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1109
	ldr	r3, .L1631+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1109
	ldr	r3, .L1631+276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1109
	ldr	r3, .L1631+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1631+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L1109:
	ldr	r3, .L1631+132
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L1110
	ldr	r3, .L1631+132
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L1110
	ldr	r3, .L1631+132
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L1110
	ldr	r3, .L1631+132
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L1110
	ldr	r3, .L1631+132
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L1110
	ldr	r3, .L1631+132
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L1110
	ldr	r3, .L1631+132
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L1110
	ldr	r3, .L1631+132
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L1110
	ldr	r3, .L1631+132
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L1110
	ldr	r3, .L1631+132
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L1110
	ldr	r3, .L1631+132
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L1110
	ldr	r3, .L1631+132
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L1110
	ldr	r3, .L1631+132
	ldr	r3, [r3]
	cmp	r3, #12
	bne	.L229
.L1110:
	ldr	r3, .L1631+144
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L1111
	ldr	r3, .L1631+144
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L1111
	ldr	r3, .L1631+144
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L1111
	ldr	r3, .L1631+144
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L1111
	ldr	r3, .L1631+144
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L1111
	ldr	r3, .L1631+144
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L1111
	ldr	r3, .L1631+144
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L1111
	ldr	r3, .L1631+144
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L1111
	ldr	r3, .L1631+144
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L1111
	ldr	r3, .L1631+144
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L1111
	ldr	r3, .L1631+144
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L1111
	ldr	r3, .L1631+144
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L1111
	ldr	r3, .L1631+144
	ldr	r3, [r3]
	cmp	r3, #12
	bne	.L229
.L1111:
	ldr	r3, .L1631+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1112
	ldr	r3, .L1631+148
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L1112:
	ldr	r3, .L1631+276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1114
	ldr	r3, .L1631+276
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1631+136
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1631+148
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1631+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1631+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1631+156
	ldr	r2, [r3]
	ldr	r3, .L1631+144
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L229
.L1114:
	ldr	r3, .L1631+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1631+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1116
	ldr	r3, .L1631+276
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1631+136
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1631+148
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1116
	ldr	r3, .L1631+156
	ldr	r2, [r3]
	ldr	r3, .L1631+144
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L1118
.L1116:
	ldr	r3, .L1631+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1118
	ldr	r3, .L1631+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L1118:
	ldr	r3, .L1631+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1119
	ldr	r3, .L1631+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1119
	ldr	r3, .L1631+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L1119
	ldr	r3, .L1631+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1119
	ldr	r3, .L1631+272
	ldr	r2, [r3]
	ldr	r3, .L1631+156
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1119
	ldr	r3, .L1631+156
	ldr	r2, [r3]
	ldr	r3, .L1631+144
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1119
	ldr	r3, .L1631+136
	ldr	r3, [r3]	@ float
	ldr	r2, .L1631+148
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1121
.L1119:
	ldr	r3, .L1631+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1121
	ldr	r3, .L1631+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1122
	ldr	r3, .L1631+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1121
.L1122:
	ldr	r3, .L1631+276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
.L1121:
	ldr	r3, .L1631+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1124
	ldr	r3, .L1631+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1124
	ldr	r3, .L1631+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1124
	ldr	r3, .L1631+272
	ldr	r2, [r3]
	ldr	r3, .L1631+156
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1124
	ldr	r3, .L1631+148
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1124
	ldr	r3, .L1631+156
	ldr	r2, [r3]
	ldr	r3, .L1631+144
	ldr	r3, [r3]
	sub	r3, r2, r3
	cmn	r3, #1
	beq	.L1126
.L1124:
	ldr	r3, .L1631+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1127
	ldr	r3, .L1631+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1126
.L1127:
	ldr	r3, .L1631+276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1126
	ldr	r3, .L1631+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1126
	ldr	r3, .L1631+156
	ldr	r3, [r3]
	cmp	r3, #11
	ble	.L229
.L1126:
	ldr	r3, .L1631+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1128
	ldr	r3, .L1631+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1128
	ldr	r3, .L1631+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1128
	ldr	r3, .L1631+272
	ldr	r2, [r3]
	ldr	r3, .L1631+156
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1128
	ldr	r3, .L1631+144
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1128
	ldr	r3, .L1631+148
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1129
.L1128:
	ldr	r3, .L1631+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1130
	ldr	r3, .L1631+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1129
.L1130:
	ldr	r3, .L1631+276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1129
	ldr	r3, .L1631+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1129
	ldr	r3, .L1631+156
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L229
.L1129:
	ldr	r3, .L1631+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1631+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1132
	ldr	r3, .L1631+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1132
	ldr	r3, .L1631+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1132
	ldr	r3, .L1631+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1132
	ldr	r3, .L1631+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1132
	ldr	r3, .L1631+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1132
	ldr	r3, .L1631+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1132
	ldr	r3, .L1631+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1132
	ldr	r3, .L1631+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1132
	ldr	r3, .L1631+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1132
	ldr	r3, .L1631+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1132
	ldr	r3, .L1631+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1132
	ldr	r3, .L1631+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1132
	ldr	r3, .L1631+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1132
	ldr	r3, .L1631+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1132
	ldr	r3, .L1631+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1132
	ldr	r3, .L1631+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1132
	ldr	r3, .L1631+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1132
	ldr	r3, .L1631+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1132
	ldr	r3, .L1631+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1132
	ldr	r3, .L1631+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1132
	ldr	r3, .L1631+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1132
	ldr	r3, .L1631+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1132
	ldr	r3, .L1631+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1132
	ldr	r3, .L1631+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1132
	ldr	r3, .L1631+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1132
	ldr	r3, .L1631+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1132
	ldr	r3, .L1631+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1132
	ldr	r3, .L1631+276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
.L1132:
	ldr	r3, .L1631+276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1134
	ldr	r3, .L1631+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1135
	ldr	r3, .L1631+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1135
	mov	r3, #1
	b	.L1136
.L1135:
	mov	r3, #0
.L1136:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1631+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1137
	ldr	r3, .L1631+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1137
	ldr	r3, .L1631+272
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1137
	mov	r3, #1
	b	.L1138
.L1137:
	mov	r3, #0
.L1138:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
.L1134:
	ldr	r3, .L1631+276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1139
	ldr	r3, .L1631+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1140
	ldr	r3, .L1634
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1140
	mov	r3, #1
	b	.L1141
.L1140:
	mov	r3, #0
.L1141:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1634+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1142
	ldr	r3, .L1634+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1142
	ldr	r3, .L1634+12
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1142
	mov	r3, #1
	b	.L1143
.L1142:
	mov	r3, #0
.L1143:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
.L1139:
	ldr	r3, .L1634+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1144
	ldr	r3, .L1634+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1145
	ldr	r3, .L1634+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1145
	mov	r3, #1
	b	.L1146
.L1145:
	mov	r3, #0
.L1146:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1634+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1147
	ldr	r3, .L1634+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1147
	ldr	r3, .L1634+12
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L1147
	mov	r3, #1
	b	.L1148
.L1147:
	mov	r3, #0
.L1148:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
.L1144:
	ldr	r3, .L1634+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1149
	ldr	r3, .L1634+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1150
	ldr	r3, .L1634+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1150
	mov	r3, #1
	b	.L1151
.L1150:
	mov	r3, #0
.L1151:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1634+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1152
	ldr	r3, .L1634+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1152
	ldr	r3, .L1634+12
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L1152
	mov	r3, #1
	b	.L1153
.L1152:
	mov	r3, #0
.L1153:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
.L1149:
	ldr	r3, .L1634+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1154
	ldr	r3, .L1634+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1155
	ldr	r3, .L1634+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1155
	mov	r3, #1
	b	.L1156
.L1155:
	mov	r3, #0
.L1156:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1634+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1157
	ldr	r3, .L1634+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1157
	ldr	r3, .L1634+12
	ldr	r3, [r3]
	cmp	r3, #2
	bne	.L1157
	mov	r3, #1
	b	.L1158
.L1157:
	mov	r3, #0
.L1158:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
.L1154:
	ldr	r3, .L1634+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1159
	ldr	r3, .L1634+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1160
	ldr	r3, .L1634+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1160
	mov	r3, #1
	b	.L1161
.L1160:
	mov	r3, #0
.L1161:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1634+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1162
	ldr	r3, .L1634+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1162
	ldr	r3, .L1634+12
	ldr	r3, [r3]
	cmp	r3, #2
	bne	.L1162
	mov	r3, #1
	b	.L1163
.L1162:
	mov	r3, #0
.L1163:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
.L1159:
	ldr	r3, .L1634+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1164
	ldr	r3, .L1634+848
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1165
	ldr	r3, .L1634+760
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1165
	mov	r3, #1
	b	.L1166
.L1165:
	mov	r3, #0
.L1166:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1634+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1167
	ldr	r3, .L1634+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1167
	ldr	r3, .L1634+12
	ldr	r3, [r3]
	cmp	r3, #3
	bne	.L1167
	mov	r3, #1
	b	.L1168
.L1167:
	mov	r3, #0
.L1168:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
.L1164:
	ldr	r3, .L1634+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1169
	ldr	r3, .L1634+760
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1170
	ldr	r3, .L1634+848
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1170
	mov	r3, #1
	b	.L1171
.L1170:
	mov	r3, #0
.L1171:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1634+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1172
	ldr	r3, .L1634+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1172
	ldr	r3, .L1634+12
	ldr	r3, [r3]
	cmp	r3, #3
	bne	.L1172
	mov	r3, #1
	b	.L1173
.L1172:
	mov	r3, #0
.L1173:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
.L1169:
	ldr	r3, .L1634+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1174
	ldr	r3, .L1634+520
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1175
	ldr	r3, .L1634+552
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1175
	mov	r3, #1
	b	.L1176
.L1175:
	mov	r3, #0
.L1176:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1634+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1177
	ldr	r3, .L1634+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1177
	ldr	r3, .L1634+12
	ldr	r3, [r3]
	cmp	r3, #4
	bne	.L1177
	mov	r3, #1
	b	.L1178
.L1177:
	mov	r3, #0
.L1178:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
.L1174:
	ldr	r3, .L1634+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1179
	ldr	r3, .L1634+552
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1180
	ldr	r3, .L1634+520
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1180
	mov	r3, #1
	b	.L1181
.L1180:
	mov	r3, #0
.L1181:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1634+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1182
	ldr	r3, .L1634+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1182
	ldr	r3, .L1634+12
	ldr	r3, [r3]
	cmp	r3, #4
	bne	.L1182
	mov	r3, #1
	b	.L1183
.L1182:
	mov	r3, #0
.L1183:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
.L1179:
	ldr	r3, .L1634+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1184
	ldr	r3, .L1634+912
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1185
	ldr	r3, .L1634+608
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1185
	mov	r3, #1
	b	.L1186
.L1185:
	mov	r3, #0
.L1186:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1634+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1187
	ldr	r3, .L1634+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1187
	ldr	r3, .L1634+12
	ldr	r3, [r3]
	cmp	r3, #5
	bne	.L1187
	mov	r3, #1
	b	.L1188
.L1187:
	mov	r3, #0
.L1188:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
.L1184:
	ldr	r3, .L1634+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1189
	ldr	r3, .L1634+608
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1190
	ldr	r3, .L1634+912
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1190
	mov	r3, #1
	b	.L1191
.L1190:
	mov	r3, #0
.L1191:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1634+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1192
	ldr	r3, .L1634+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1192
	ldr	r3, .L1634+12
	ldr	r3, [r3]
	cmp	r3, #5
	bne	.L1192
	mov	r3, #1
	b	.L1193
.L1192:
	mov	r3, #0
.L1193:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
.L1189:
	ldr	r3, .L1634+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1194
	ldr	r3, .L1634+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1195
	ldr	r3, .L1634+864
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1195
	mov	r3, #1
	b	.L1196
.L1195:
	mov	r3, #0
.L1196:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1634+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1197
	ldr	r3, .L1634+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1197
	ldr	r3, .L1634+12
	ldr	r3, [r3]
	cmp	r3, #6
	bne	.L1197
	mov	r3, #1
	b	.L1198
.L1197:
	mov	r3, #0
.L1198:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
.L1194:
	ldr	r3, .L1634+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1199
	ldr	r3, .L1634+864
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1200
	ldr	r3, .L1634+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1200
	mov	r3, #1
	b	.L1201
.L1200:
	mov	r3, #0
.L1201:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1634+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1202
	ldr	r3, .L1634+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1202
	ldr	r3, .L1634+12
	ldr	r3, [r3]
	cmp	r3, #6
	bne	.L1202
	mov	r3, #1
	b	.L1203
.L1202:
	mov	r3, #0
.L1203:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
.L1199:
	ldr	r3, .L1634+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1204
	ldr	r3, .L1634+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1205
	ldr	r3, .L1634+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1205
	mov	r3, #1
	b	.L1206
.L1205:
	mov	r3, #0
.L1206:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1634+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1207
	ldr	r3, .L1634+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1207
	ldr	r3, .L1634+12
	ldr	r3, [r3]
	cmp	r3, #7
	bne	.L1207
	mov	r3, #1
	b	.L1208
.L1207:
	mov	r3, #0
.L1208:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
.L1204:
	ldr	r3, .L1634+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1209
	ldr	r3, .L1634+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1210
	ldr	r3, .L1634+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1210
	mov	r3, #1
	b	.L1211
.L1210:
	mov	r3, #0
.L1211:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1634+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1212
	ldr	r3, .L1634+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1634+12
	ldr	r3, [r3]
	cmp	r3, #7
	bne	.L1212
	mov	r3, #1
	b	.L1213
.L1212:
	mov	r3, #0
.L1213:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
.L1209:
	ldr	r3, .L1634+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1214
	ldr	r3, .L1634+792
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1215
	ldr	r3, .L1634+768
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1215
	mov	r3, #1
	b	.L1216
.L1215:
	mov	r3, #0
.L1216:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1634+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1217
	ldr	r3, .L1634+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1217
	ldr	r3, .L1634+12
	ldr	r3, [r3]
	cmp	r3, #8
	bne	.L1217
	mov	r3, #1
	b	.L1218
.L1217:
	mov	r3, #0
.L1218:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
.L1214:
	ldr	r3, .L1634+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1219
	ldr	r3, .L1634+768
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1220
	ldr	r3, .L1634+792
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1220
	mov	r3, #1
	b	.L1221
.L1220:
	mov	r3, #0
.L1221:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1634+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1222
	ldr	r3, .L1634+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1222
	ldr	r3, .L1634+12
	ldr	r3, [r3]
	cmp	r3, #8
	bne	.L1222
	mov	r3, #1
	b	.L1223
.L1222:
	mov	r3, #0
.L1223:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
.L1219:
	ldr	r3, .L1634+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1224
	ldr	r3, .L1634+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1225
	ldr	r3, .L1634+712
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1225
	mov	r3, #1
	b	.L1226
.L1225:
	mov	r3, #0
.L1226:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1634+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1227
	ldr	r3, .L1634+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1227
	ldr	r3, .L1634+12
	ldr	r3, [r3]
	cmp	r3, #9
	bne	.L1227
	mov	r3, #1
	b	.L1228
.L1227:
	mov	r3, #0
.L1228:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
.L1224:
	ldr	r3, .L1634+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1229
	ldr	r3, .L1634+712
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1230
	ldr	r3, .L1634+480
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1230
	mov	r3, #1
	b	.L1231
.L1230:
	mov	r3, #0
.L1231:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1634+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1232
	ldr	r3, .L1634+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1232
	ldr	r3, .L1634+12
	ldr	r3, [r3]
	cmp	r3, #9
	bne	.L1232
	mov	r3, #1
	b	.L1233
.L1232:
	mov	r3, #0
.L1233:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
.L1229:
	ldr	r3, .L1634+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1234
	ldr	r3, .L1634+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1235
	ldr	r3, .L1634+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1235
	mov	r3, #1
	b	.L1236
.L1235:
	mov	r3, #0
.L1236:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1634+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1237
	ldr	r3, .L1634+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1237
	ldr	r3, .L1634+12
	ldr	r3, [r3]
	cmp	r3, #10
	bne	.L1237
	mov	r3, #1
	b	.L1238
.L1237:
	mov	r3, #0
.L1238:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
.L1234:
	ldr	r3, .L1634+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1239
	ldr	r3, .L1634+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1240
	ldr	r3, .L1634+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1240
	mov	r3, #1
	b	.L1241
.L1240:
	mov	r3, #0
.L1241:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1634+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1242
	ldr	r3, .L1634+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1242
	ldr	r3, .L1634+12
	ldr	r3, [r3]
	cmp	r3, #10
	bne	.L1242
	mov	r3, #1
	b	.L1243
.L1242:
	mov	r3, #0
.L1243:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
.L1239:
	ldr	r3, .L1634+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1244
	ldr	r3, .L1634+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1245
	ldr	r3, .L1634+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1245
	mov	r3, #1
	b	.L1246
.L1245:
	mov	r3, #0
.L1246:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1634+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1247
	ldr	r3, .L1634+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1247
	ldr	r3, .L1634+12
	ldr	r3, [r3]
	cmp	r3, #11
	bne	.L1247
	mov	r3, #1
	b	.L1248
.L1247:
	mov	r3, #0
.L1248:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
.L1244:
	ldr	r3, .L1634+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1249
	ldr	r3, .L1634+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1250
	ldr	r3, .L1634+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1250
	mov	r3, #1
	b	.L1251
.L1250:
	mov	r3, #0
.L1251:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1634+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1252
	ldr	r3, .L1634+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1252
	ldr	r3, .L1634+12
	ldr	r3, [r3]
	cmp	r3, #11
	bne	.L1252
	mov	r3, #1
	b	.L1253
.L1252:
	mov	r3, #0
.L1253:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
.L1249:
	ldr	r3, .L1634+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1254
	ldr	r3, .L1634+656
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1255
	ldr	r3, .L1634+576
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1255
	mov	r3, #1
	b	.L1256
.L1635:
	.align	2
.L1634:
	.word	s0_evt1
	.word	r_event1
	.word	r_event0
	.word	r_evt_id
	.word	s1_evt1
	.word	s1_evt0
	.word	delta
	.word	_x_s12_z
	.word	s12_z
	.word	_x_s12_y
	.word	s12_y
	.word	_x_s12_x
	.word	s12_x
	.word	_x_s11_z
	.word	s11_z
	.word	_x_s11_y
	.word	s11_y
	.word	_x_s11_x
	.word	s11_x
	.word	_x_s10_z
	.word	s10_z
	.word	_x_s10_y
	.word	s10_y
	.word	_x_s10_x
	.word	s10_x
	.word	_x_s9_z
	.word	s9_z
	.word	_x_s9_y
	.word	s9_y
	.word	_x_s9_x
	.word	s9_x
	.word	_x_s8_z
	.word	s8_z
	.word	_x_s8_y
	.word	s8_y
	.word	_x_s8_x
	.word	s8_x
	.word	_x_s7_z
	.word	s7_z
	.word	_x_s7_y
	.word	s7_y
	.word	_x_s7_x
	.word	s7_x
	.word	_x_s2_evt0
	.word	s2_evt0
	.word	_x_s1_l2
	.word	s1_l2
	.word	_x_s7_evt1
	.word	s7_evt1
	.word	_x_s4_l1
	.word	s4_l1
	.word	_x_s7_evt0
	.word	s7_evt0
	.word	_x_s4_l0
	.word	s4_l0
	.word	_x_s2_evt1
	.word	s2_evt1
	.word	_x_s12_l2
	.word	s12_l2
	.word	_x_s6_z
	.word	s6_z
	.word	_x_s1_evt0
	.word	s1_evt0
	.word	_x_s7_l2
	.word	s7_l2
	.word	_x_s1_z
	.word	s1_z
	.word	_x_s10_l1
	.word	s10_l1
	.word	_x_s4_y
	.word	s4_y
	.word	_x_s10_evt1
	.word	s10_evt1
	.word	_x_s7_l1
	.word	s7_l1
	.word	_x_s1_y
	.word	s1_y
	.word	_x_s10_l0
	.word	s10_l0
	.word	_x_s4_x
	.word	s4_x
	.word	_x_s10_evt0
	.word	s10_evt0
	.word	_x_s7_l0
	.word	s7_l0
	.word	_x_s1_x
	.word	s1_x
	.word	_x_s11_evt1
	.word	s11_evt1
	.word	_x_s8_l1
	.word	s8_l1
	.word	_x_s2_y
	.word	s2_y
	.word	_x_s11_l0
	.word	s11_l0
	.word	_x_s5_x
	.word	s5_x
	.word	_x_s0_l2
	.word	s0_l2
	.word	_x_s6_evt1
	.word	s6_evt1
	.word	_x_s3_l1
	.word	s3_l1
	.word	_x_s11_evt0
	.word	s11_evt0
	.word	_x_s8_l0
	.word	s8_l0
	.word	_x_s2_x
	.word	s2_x
	.word	_x_s8_l2
	.word	s8_l2
	.word	_x_s2_z
	.word	s2_z
	.word	_x_s11_l1
	.word	s11_l1
	.word	_x_s5_y
	.word	s5_y
	.word	_x_delta
	.word	delta
	.word	_x_s9_evt1
	.word	s9_evt1
	.word	_x_s6_l1
	.word	s6_l1
	.word	_x_s0_y
	.word	s0_y
	.word	_x_r_evt_id
	.word	r_evt_id
	.word	_x_s1_l1
	.word	s1_l1
	.word	_x_s4_evt1
	.word	s4_evt1
	.word	_x_s1_evt1
	.word	s1_evt1
	.word	_x_r_l
	.word	r_l
	.word	_x_s1_l0
	.word	s1_l0
	.word	_x_s4_evt0
	.word	s4_evt0
	.word	_x_s11_l2
	.word	s11_l2
	.word	_x_s5_z
	.word	s5_z
	.word	_x_s12_evt0
	.word	s12_evt0
	.word	_x_s9_l0
	.word	s9_l0
	.word	_x_s3_x
	.word	s3_x
	.word	_x_r_counter
	.word	r_counter
	.word	_x_s5_evt0
	.word	s5_evt0
	.word	_x_s2_l0
	.word	s2_l0
	.word	_x_r_event0
	.word	r_event0
	.word	_x__diverge_delta
	.word	_diverge_delta
	.word	_x_s6_l2
	.word	s6_l2
	.word	_x_s0_z
	.word	s0_z
	.word	_x_s12_evt1
	.word	s12_evt1
	.word	_x_s9_l1
	.word	s9_l1
	.word	_x_r_x
	.word	r_x
	.word	_x_s3_y
	.word	s3_y
	.word	_x_s12_l0
	.word	s12_l0
	.word	_x_s6_x
	.word	s6_x
	.word	_x_s0_evt0
	.word	s0_evt0
	.word	_x_s9_evt0
	.word	s9_evt0
	.word	_x_s6_l0
	.word	s6_l0
	.word	_x_s0_x
	.word	s0_x
	.word	_x_r_event1
	.word	r_event1
	.word	_x_s0_evt1
	.word	s0_evt1
	.word	_x_s0_l0
	.word	s0_l0
	.word	_x_s3_evt0
	.word	s3_evt0
	.word	_x_s8_evt0
	.word	s8_evt0
	.word	_x_s5_l0
	.word	s5_l0
	.word	_x_s2_l2
	.word	s2_l2
	.word	_x_s8_evt1
	.word	s8_evt1
	.word	_x_s5_l1
	.word	s5_l1
	.word	_x_s9_l2
	.word	s9_l2
	.word	_x_s3_z
	.word	s3_z
	.word	_x_s12_l1
	.word	s12_l1
	.word	_x_s6_y
	.word	s6_y
	.word	_x_s0_l1
	.word	s0_l1
	.word	_x_s3_evt1
	.word	s3_evt1
	.word	_x_s3_l0
	.word	s3_l0
	.word	_x_s6_evt0
	.word	s6_evt0
	.word	_x_s3_l2
	.word	s3_l2
	.word	_x_s10_l2
	.word	s10_l2
	.word	_x_s4_z
	.word	s4_z
	.word	_x_s4_l2
	.word	s4_l2
	.word	_x_s2_l1
	.word	s2_l1
	.word	_x_s5_evt1
	.word	s5_evt1
	.word	_x_s5_l2
	.word	s5_l2
.L1255:
	mov	r3, #0
.L1256:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1634+624
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1257
	ldr	r3, .L1634+736
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1257
	ldr	r3, .L1634+504
	ldr	r3, [r3]
	cmp	r3, #12
	bne	.L1257
	mov	r3, #1
	b	.L1258
.L1257:
	mov	r3, #0
.L1258:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
.L1254:
	ldr	r3, .L1634+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1259
	ldr	r3, .L1634+576
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1260
	ldr	r3, .L1634+656
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1260
	mov	r3, #1
	b	.L1261
.L1260:
	mov	r3, #0
.L1261:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1634+736
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1262
	ldr	r3, .L1634+624
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1262
	ldr	r3, .L1634+504
	ldr	r3, [r3]
	cmp	r3, #12
	bne	.L1262
	mov	r3, #1
	b	.L1263
.L1262:
	mov	r3, #0
.L1263:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
.L1259:
	ldr	r3, .L1634+24
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+628
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1264
	ldr	r3, .L1634+632
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L1265
	mov	r3, #0
	mov	r4, r3
.L1265:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
.L1264:
	ldr	r3, .L1634+632
	ldr	r3, [r3]	@ float
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L1266
	ldr	r3, .L1634+24
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1634+632
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1634+628
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L1266:
	mov	r3, #1
	b	.L1268
.L229:
	mov	r3, #0
.L1268:
	str	r3, [fp, #-24]
	ldr	r3, .L1634+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+32
	str	r3, [r2]	@ float
	ldr	r3, .L1634+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+40
	str	r3, [r2]	@ float
	ldr	r3, .L1634+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+48
	str	r3, [r2]	@ float
	ldr	r3, .L1634+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+56
	str	r3, [r2]	@ float
	ldr	r3, .L1634+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+64
	str	r3, [r2]	@ float
	ldr	r3, .L1634+68
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+72
	str	r3, [r2]	@ float
	ldr	r3, .L1634+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+80
	str	r3, [r2]	@ float
	ldr	r3, .L1634+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+88
	str	r3, [r2]	@ float
	ldr	r3, .L1634+92
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+96
	str	r3, [r2]	@ float
	ldr	r3, .L1634+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+104
	str	r3, [r2]	@ float
	ldr	r3, .L1634+108
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+112
	str	r3, [r2]	@ float
	ldr	r3, .L1634+116
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+120
	str	r3, [r2]	@ float
	ldr	r3, .L1634+124
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+128
	str	r3, [r2]	@ float
	ldr	r3, .L1634+132
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+136
	str	r3, [r2]	@ float
	ldr	r3, .L1634+140
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+144
	str	r3, [r2]	@ float
	ldr	r3, .L1634+148
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+152
	str	r3, [r2]	@ float
	ldr	r3, .L1634+156
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+160
	str	r3, [r2]	@ float
	ldr	r3, .L1634+164
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+168
	str	r3, [r2]	@ float
	ldr	r3, .L1634+172
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+176
	strb	r2, [r3]
	ldr	r3, .L1634+180
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+184
	strb	r2, [r3]
	ldr	r3, .L1634+188
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+192
	strb	r2, [r3]
	ldr	r3, .L1634+196
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+200
	strb	r2, [r3]
	ldr	r3, .L1634+204
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+208
	strb	r2, [r3]
	ldr	r3, .L1634+212
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+216
	strb	r2, [r3]
	ldr	r3, .L1634+220
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+224
	strb	r2, [r3]
	ldr	r3, .L1634+228
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+232
	strb	r2, [r3]
	ldr	r3, .L1634+236
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+240
	str	r3, [r2]	@ float
	ldr	r3, .L1634+244
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+248
	strb	r2, [r3]
	ldr	r3, .L1634+252
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+256
	strb	r2, [r3]
	ldr	r3, .L1634+260
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+264
	str	r3, [r2]	@ float
	ldr	r3, .L1634+268
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+272
	strb	r2, [r3]
	ldr	r3, .L1634+276
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+280
	str	r3, [r2]	@ float
	ldr	r3, .L1634+284
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+288
	strb	r2, [r3]
	ldr	r3, .L1634+292
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+296
	strb	r2, [r3]
	ldr	r3, .L1634+300
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+304
	str	r3, [r2]	@ float
	ldr	r3, .L1634+308
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+312
	strb	r2, [r3]
	ldr	r3, .L1634+316
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+320
	str	r3, [r2]	@ float
	ldr	r3, .L1634+324
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+328
	strb	r2, [r3]
	ldr	r3, .L1634+332
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+336
	strb	r2, [r3]
	ldr	r3, .L1634+340
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+344
	str	r3, [r2]	@ float
	ldr	r3, .L1634+348
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+352
	strb	r2, [r3]
	ldr	r3, .L1634+356
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+360
	strb	r2, [r3]
	ldr	r3, .L1634+364
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+368
	str	r3, [r2]	@ float
	ldr	r3, .L1634+372
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+376
	strb	r2, [r3]
	ldr	r3, .L1634+380
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+384
	str	r3, [r2]	@ float
	ldr	r3, .L1634+388
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+392
	strb	r2, [r3]
	ldr	r3, .L1634+396
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+400
	strb	r2, [r3]
	ldr	r3, .L1634+404
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+408
	strb	r2, [r3]
	ldr	r3, .L1634+412
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+416
	strb	r2, [r3]
	ldr	r3, .L1634+420
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+424
	strb	r2, [r3]
	ldr	r3, .L1634+428
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+432
	str	r3, [r2]	@ float
	ldr	r3, .L1634+436
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+440
	strb	r2, [r3]
	ldr	r3, .L1634+444
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+448
	str	r3, [r2]	@ float
	ldr	r3, .L1634+452
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+456
	strb	r2, [r3]
	ldr	r3, .L1634+460
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+464
	str	r3, [r2]	@ float
	ldr	r3, .L1634+468
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+472
	str	r3, [r2]	@ float
	ldr	r3, .L1634+476
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+480
	strb	r2, [r3]
	ldr	r3, .L1634+484
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+488
	strb	r2, [r3]
	ldr	r3, .L1634+492
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+496
	str	r3, [r2]	@ float
	ldr	r3, .L1634+500
	ldr	r3, [r3]
	ldr	r2, .L1634+504
	str	r3, [r2]
	ldr	r3, .L1634+508
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+512
	strb	r2, [r3]
	ldr	r3, .L1634+516
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+520
	strb	r2, [r3]
	ldr	r3, .L1634+524
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+528
	strb	r2, [r3]
	ldr	r3, .L1634+532
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+536
	strb	r2, [r3]
	ldr	r3, .L1634+540
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+544
	strb	r2, [r3]
	ldr	r3, .L1634+548
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+552
	strb	r2, [r3]
	ldr	r3, .L1634+556
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+560
	strb	r2, [r3]
	ldr	r3, .L1634+564
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+568
	str	r3, [r2]	@ float
	ldr	r3, .L1634+572
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+576
	strb	r2, [r3]
	ldr	r3, .L1634+580
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+584
	strb	r2, [r3]
	ldr	r3, .L1634+588
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+592
	str	r3, [r2]	@ float
	ldr	r3, .L1634+596
	ldr	r3, [r3]
	ldr	r2, .L1634+600
	str	r3, [r2]
	ldr	r3, .L1634+604
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+608
	strb	r2, [r3]
	ldr	r3, .L1634+612
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+616
	strb	r2, [r3]
	ldr	r3, .L1634+620
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+624
	strb	r2, [r3]
	ldr	r3, .L1634+628
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+632
	str	r3, [r2]	@ float
	ldr	r3, .L1634+636
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+640
	strb	r2, [r3]
	ldr	r3, .L1634+644
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+648
	str	r3, [r2]	@ float
	ldr	r3, .L1634+652
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+656
	strb	r2, [r3]
	ldr	r3, .L1634+660
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+664
	strb	r2, [r3]
	ldr	r3, .L1634+668
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+672
	str	r3, [r2]	@ float
	ldr	r3, .L1634+676
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+680
	str	r3, [r2]	@ float
	ldr	r3, .L1634+684
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+688
	strb	r2, [r3]
	ldr	r3, .L1634+692
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+696
	str	r3, [r2]	@ float
	ldr	r3, .L1634+700
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+704
	strb	r2, [r3]
	ldr	r3, .L1634+708
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+712
	strb	r2, [r3]
	ldr	r3, .L1634+716
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+720
	strb	r2, [r3]
	ldr	r3, .L1634+724
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+728
	str	r3, [r2]	@ float
	ldr	r3, .L1634+732
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+736
	strb	r2, [r3]
	ldr	r3, .L1634+740
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+744
	strb	r2, [r3]
	ldr	r3, .L1634+748
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+752
	strb	r2, [r3]
	ldr	r3, .L1634+756
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+760
	strb	r2, [r3]
	ldr	r3, .L1634+764
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+768
	strb	r2, [r3]
	ldr	r3, .L1634+772
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+776
	strb	r2, [r3]
	ldr	r3, .L1634+780
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+784
	strb	r2, [r3]
	ldr	r3, .L1634+788
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+792
	strb	r2, [r3]
	ldr	r3, .L1634+796
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+800
	strb	r2, [r3]
	ldr	r3, .L1634+804
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+808
	strb	r2, [r3]
	ldr	r3, .L1634+812
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+816
	str	r3, [r2]	@ float
	ldr	r3, .L1634+820
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+824
	strb	r2, [r3]
	ldr	r3, .L1634+828
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+832
	str	r3, [r2]	@ float
	ldr	r3, .L1634+836
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+840
	strb	r2, [r3]
	ldr	r3, .L1634+844
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+848
	strb	r2, [r3]
	ldr	r3, .L1634+852
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+856
	strb	r2, [r3]
	ldr	r3, .L1634+860
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+864
	strb	r2, [r3]
	ldr	r3, .L1634+868
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+872
	strb	r2, [r3]
	ldr	r3, .L1634+876
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+880
	strb	r2, [r3]
	ldr	r3, .L1634+884
	ldr	r3, [r3]	@ float
	ldr	r2, .L1634+888
	str	r3, [r2]	@ float
	ldr	r3, .L1634+892
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+896
	strb	r2, [r3]
	ldr	r3, .L1634+900
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+904
	strb	r2, [r3]
	ldr	r3, .L1634+908
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+912
	strb	r2, [r3]
	ldr	r3, .L1634+916
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1634+920
	strb	r2, [r3]
.L224:
	ldr	r3, [fp, #-24]
	cmp	r3, #0
	bne	.L1269
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
