	.file	"92325193.c"
	.intel_syntax noprefix
	.text
	.globl	tqmf
	.bss
	.align 32
	.type	tqmf, @object
	.size	tqmf, 96
tqmf:
	.zero	96
	.globl	h_tmp
	.align 32
	.type	h_tmp, @object
	.size	h_tmp, 96
h_tmp:
	.zero	96
	.globl	xl
	.align 4
	.type	xl, @object
	.size	xl, 4
xl:
	.zero	4
	.globl	xh
	.align 4
	.type	xh, @object
	.size	xh, 4
xh:
	.zero	4
	.globl	accumc
	.align 32
	.type	accumc, @object
	.size	accumc, 44
accumc:
	.zero	44
	.globl	accumd
	.align 32
	.type	accumd, @object
	.size	accumd, 44
accumd:
	.zero	44
	.globl	xout1
	.align 4
	.type	xout1, @object
	.size	xout1, 4
xout1:
	.zero	4
	.globl	xout2
	.align 4
	.type	xout2, @object
	.size	xout2, 4
xout2:
	.zero	4
	.globl	xs
	.align 4
	.type	xs, @object
	.size	xs, 4
xs:
	.zero	4
	.globl	xd
	.align 4
	.type	xd, @object
	.size	xd, 4
xd:
	.zero	4
	.globl	il
	.align 4
	.type	il, @object
	.size	il, 4
il:
	.zero	4
	.globl	szl
	.align 4
	.type	szl, @object
	.size	szl, 4
szl:
	.zero	4
	.globl	spl
	.align 4
	.type	spl, @object
	.size	spl, 4
spl:
	.zero	4
	.globl	sl
	.align 4
	.type	sl, @object
	.size	sl, 4
sl:
	.zero	4
	.globl	el
	.align 4
	.type	el, @object
	.size	el, 4
el:
	.zero	4
	.globl	qq4_code4_table
	.align 32
	.type	qq4_code4_table, @object
	.size	qq4_code4_table, 64
qq4_code4_table:
	.zero	64
	.globl	qq5_code5_table
	.align 32
	.type	qq5_code5_table, @object
	.size	qq5_code5_table, 128
qq5_code5_table:
	.zero	128
	.globl	qq6_code6_table
	.align 32
	.type	qq6_code6_table, @object
	.size	qq6_code6_table, 256
qq6_code6_table:
	.zero	256
	.globl	delay_bpl
	.align 16
	.type	delay_bpl, @object
	.size	delay_bpl, 24
delay_bpl:
	.zero	24
	.globl	delay_dltx
	.align 16
	.type	delay_dltx, @object
	.size	delay_dltx, 24
delay_dltx:
	.zero	24
	.globl	wl_code_table
	.align 32
	.type	wl_code_table, @object
	.size	wl_code_table, 64
wl_code_table:
	.zero	64
	.globl	wl_table
	.align 32
	.type	wl_table, @object
	.size	wl_table, 32
wl_table:
	.zero	32
	.globl	ilb_table
	.align 32
	.type	ilb_table, @object
	.size	ilb_table, 128
ilb_table:
	.zero	128
	.globl	nbl
	.align 4
	.type	nbl, @object
	.size	nbl, 4
nbl:
	.zero	4
	.globl	al1
	.align 4
	.type	al1, @object
	.size	al1, 4
al1:
	.zero	4
	.globl	al2
	.align 4
	.type	al2, @object
	.size	al2, 4
al2:
	.zero	4
	.globl	plt
	.align 4
	.type	plt, @object
	.size	plt, 4
plt:
	.zero	4
	.globl	plt_tmp_1
	.align 4
	.type	plt_tmp_1, @object
	.size	plt_tmp_1, 4
plt_tmp_1:
	.zero	4
	.globl	plt_tmp_2
	.align 4
	.type	plt_tmp_2, @object
	.size	plt_tmp_2, 4
plt_tmp_2:
	.zero	4
	.globl	rs
	.align 4
	.type	rs, @object
	.size	rs, 4
rs:
	.zero	4
	.globl	dlt
	.align 4
	.type	dlt, @object
	.size	dlt, 4
dlt:
	.zero	4
	.globl	rlt
	.align 4
	.type	rlt, @object
	.size	rlt, 4
rlt:
	.zero	4
	.globl	rlt_tmp_1
	.align 4
	.type	rlt_tmp_1, @object
	.size	rlt_tmp_1, 4
rlt_tmp_1:
	.zero	4
	.globl	rlt_tmp_2
	.align 4
	.type	rlt_tmp_2, @object
	.size	rlt_tmp_2, 4
rlt_tmp_2:
	.zero	4
	.globl	decis_levl
	.align 32
	.type	decis_levl, @object
	.size	decis_levl, 120
decis_levl:
	.zero	120
	.globl	detl
	.align 4
	.type	detl, @object
	.size	detl, 4
detl:
	.zero	4
	.globl	quant26bt_pos
	.align 32
	.type	quant26bt_pos, @object
	.size	quant26bt_pos, 124
quant26bt_pos:
	.zero	124
	.globl	quant26bt_neg
	.align 32
	.type	quant26bt_neg, @object
	.size	quant26bt_neg, 124
quant26bt_neg:
	.zero	124
	.globl	deth
	.align 4
	.type	deth, @object
	.size	deth, 4
deth:
	.zero	4
	.globl	sh
	.align 4
	.type	sh, @object
	.size	sh, 4
sh:
	.zero	4
	.globl	eh
	.align 4
	.type	eh, @object
	.size	eh, 4
eh:
	.zero	4
	.globl	qq2_code2_table
	.align 16
	.type	qq2_code2_table, @object
	.size	qq2_code2_table, 16
qq2_code2_table:
	.zero	16
	.globl	wh_code_table
	.align 16
	.type	wh_code_table, @object
	.size	wh_code_table, 16
wh_code_table:
	.zero	16
	.globl	dh
	.align 4
	.type	dh, @object
	.size	dh, 4
dh:
	.zero	4
	.globl	ih
	.align 4
	.type	ih, @object
	.size	ih, 4
ih:
	.zero	4
	.globl	nbh
	.align 4
	.type	nbh, @object
	.size	nbh, 4
nbh:
	.zero	4
	.globl	szh
	.align 4
	.type	szh, @object
	.size	szh, 4
szh:
	.zero	4
	.globl	sph
	.align 4
	.type	sph, @object
	.size	sph, 4
sph:
	.zero	4
	.globl	ph
	.align 4
	.type	ph, @object
	.size	ph, 4
ph:
	.zero	4
	.globl	yh
	.align 4
	.type	yh, @object
	.size	yh, 4
yh:
	.zero	4
	.globl	rh
	.align 4
	.type	rh, @object
	.size	rh, 4
rh:
	.zero	4
	.globl	delay_dhx
	.align 16
	.type	delay_dhx, @object
	.size	delay_dhx, 24
delay_dhx:
	.zero	24
	.globl	delay_bph
	.align 16
	.type	delay_bph, @object
	.size	delay_bph, 24
delay_bph:
	.zero	24
	.globl	ah_tmp_1
	.align 4
	.type	ah_tmp_1, @object
	.size	ah_tmp_1, 4
ah_tmp_1:
	.zero	4
	.globl	ah_tmp_2
	.align 4
	.type	ah_tmp_2, @object
	.size	ah_tmp_2, 4
ah_tmp_2:
	.zero	4
	.globl	ph_tmp_1
	.align 4
	.type	ph_tmp_1, @object
	.size	ph_tmp_1, 4
ph_tmp_1:
	.zero	4
	.globl	ph_tmp_2
	.align 4
	.type	ph_tmp_2, @object
	.size	ph_tmp_2, 4
ph_tmp_2:
	.zero	4
	.globl	rh_tmp_1
	.align 4
	.type	rh_tmp_1, @object
	.size	rh_tmp_1, 4
rh_tmp_1:
	.zero	4
	.globl	rh_tmp_2
	.align 4
	.type	rh_tmp_2, @object
	.size	rh_tmp_2, 4
rh_tmp_2:
	.zero	4
	.globl	ilr
	.align 4
	.type	ilr, @object
	.size	ilr, 4
ilr:
	.zero	4
	.globl	yl
	.align 4
	.type	yl, @object
	.size	yl, 4
yl:
	.zero	4
	.globl	rl
	.align 4
	.type	rl, @object
	.size	rl, 4
rl:
	.zero	4
	.globl	dec_deth
	.align 4
	.type	dec_deth, @object
	.size	dec_deth, 4
dec_deth:
	.zero	4
	.globl	dec_detl
	.align 4
	.type	dec_detl, @object
	.size	dec_detl, 4
dec_detl:
	.zero	4
	.globl	dec_dlt
	.align 4
	.type	dec_dlt, @object
	.size	dec_dlt, 4
dec_dlt:
	.zero	4
	.globl	dec_del_bpl
	.align 16
	.type	dec_del_bpl, @object
	.size	dec_del_bpl, 24
dec_del_bpl:
	.zero	24
	.globl	dec_del_dltx
	.align 16
	.type	dec_del_dltx, @object
	.size	dec_del_dltx, 24
dec_del_dltx:
	.zero	24
	.globl	dec_plt
	.align 4
	.type	dec_plt, @object
	.size	dec_plt, 4
dec_plt:
	.zero	4
	.globl	dec_plt_tmp_1
	.align 4
	.type	dec_plt_tmp_1, @object
	.size	dec_plt_tmp_1, 4
dec_plt_tmp_1:
	.zero	4
	.globl	dec_plt_tmp_2
	.align 4
	.type	dec_plt_tmp_2, @object
	.size	dec_plt_tmp_2, 4
dec_plt_tmp_2:
	.zero	4
	.globl	dec_szl
	.align 4
	.type	dec_szl, @object
	.size	dec_szl, 4
dec_szl:
	.zero	4
	.globl	dec_spl
	.align 4
	.type	dec_spl, @object
	.size	dec_spl, 4
dec_spl:
	.zero	4
	.globl	dec_sl
	.align 4
	.type	dec_sl, @object
	.size	dec_sl, 4
dec_sl:
	.zero	4
	.globl	dec_rlt_tmp_1
	.align 4
	.type	dec_rlt_tmp_1, @object
	.size	dec_rlt_tmp_1, 4
dec_rlt_tmp_1:
	.zero	4
	.globl	dec_rlt_tmp_2
	.align 4
	.type	dec_rlt_tmp_2, @object
	.size	dec_rlt_tmp_2, 4
dec_rlt_tmp_2:
	.zero	4
	.globl	dec_rlt
	.align 4
	.type	dec_rlt, @object
	.size	dec_rlt, 4
dec_rlt:
	.zero	4
	.globl	dec_al1
	.align 4
	.type	dec_al1, @object
	.size	dec_al1, 4
dec_al1:
	.zero	4
	.globl	dec_al2
	.align 4
	.type	dec_al2, @object
	.size	dec_al2, 4
dec_al2:
	.zero	4
	.globl	dl
	.align 4
	.type	dl, @object
	.size	dl, 4
dl:
	.zero	4
	.globl	dec_nbl
	.align 4
	.type	dec_nbl, @object
	.size	dec_nbl, 4
dec_nbl:
	.zero	4
	.globl	dec_yh
	.align 4
	.type	dec_yh, @object
	.size	dec_yh, 4
dec_yh:
	.zero	4
	.globl	dec_dh
	.align 4
	.type	dec_dh, @object
	.size	dec_dh, 4
dec_dh:
	.zero	4
	.globl	dec_nbh
	.align 4
	.type	dec_nbh, @object
	.size	dec_nbh, 4
dec_nbh:
	.zero	4
	.globl	dec_del_bph
	.align 16
	.type	dec_del_bph, @object
	.size	dec_del_bph, 24
dec_del_bph:
	.zero	24
	.globl	dec_del_dhx
	.align 16
	.type	dec_del_dhx, @object
	.size	dec_del_dhx, 24
dec_del_dhx:
	.zero	24
	.globl	dec_szh
	.align 4
	.type	dec_szh, @object
	.size	dec_szh, 4
dec_szh:
	.zero	4
	.globl	dec_rh_tmp_1
	.align 4
	.type	dec_rh_tmp_1, @object
	.size	dec_rh_tmp_1, 4
dec_rh_tmp_1:
	.zero	4
	.globl	dec_rh_tmp_2
	.align 4
	.type	dec_rh_tmp_2, @object
	.size	dec_rh_tmp_2, 4
dec_rh_tmp_2:
	.zero	4
	.globl	dec_ah_tmp_1
	.align 4
	.type	dec_ah_tmp_1, @object
	.size	dec_ah_tmp_1, 4
dec_ah_tmp_1:
	.zero	4
	.globl	dec_ah_tmp_2
	.align 4
	.type	dec_ah_tmp_2, @object
	.size	dec_ah_tmp_2, 4
dec_ah_tmp_2:
	.zero	4
	.globl	dec_ph
	.align 4
	.type	dec_ph, @object
	.size	dec_ph, 4
dec_ph:
	.zero	4
	.globl	dec_sph
	.align 4
	.type	dec_sph, @object
	.size	dec_sph, 4
dec_sph:
	.zero	4
	.globl	dec_sh
	.align 4
	.type	dec_sh, @object
	.size	dec_sh, 4
dec_sh:
	.zero	4
	.globl	dec_rh
	.align 4
	.type	dec_rh, @object
	.size	dec_rh, 4
dec_rh:
	.zero	4
	.globl	dec_ph_tmp_1
	.align 4
	.type	dec_ph_tmp_1, @object
	.size	dec_ph_tmp_1, 4
dec_ph_tmp_1:
	.zero	4
	.globl	dec_ph_tmp_2
	.align 4
	.type	dec_ph_tmp_2, @object
	.size	dec_ph_tmp_2, 4
dec_ph_tmp_2:
	.zero	4
	.text
	.globl	initialize_global
	.type	initialize_global, @function
initialize_global:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR h_tmp[rip], 12
	mov	DWORD PTR h_tmp[rip+4], -44
	mov	DWORD PTR h_tmp[rip+8], -44
	mov	DWORD PTR h_tmp[rip+12], 212
	mov	DWORD PTR h_tmp[rip+16], 48
	mov	DWORD PTR h_tmp[rip+20], -624
	mov	DWORD PTR h_tmp[rip+24], 128
	mov	DWORD PTR h_tmp[rip+28], 1448
	mov	DWORD PTR h_tmp[rip+32], -840
	mov	DWORD PTR h_tmp[rip+36], -3220
	mov	DWORD PTR h_tmp[rip+40], 3804
	mov	DWORD PTR h_tmp[rip+44], 15504
	mov	DWORD PTR h_tmp[rip+48], 15504
	mov	DWORD PTR h_tmp[rip+52], 3804
	mov	DWORD PTR h_tmp[rip+56], -3220
	mov	DWORD PTR h_tmp[rip+60], -840
	mov	DWORD PTR h_tmp[rip+64], 1448
	mov	DWORD PTR h_tmp[rip+68], 128
	mov	DWORD PTR h_tmp[rip+72], -624
	mov	DWORD PTR h_tmp[rip+76], 48
	mov	DWORD PTR h_tmp[rip+80], 212
	mov	DWORD PTR h_tmp[rip+84], -44
	mov	DWORD PTR h_tmp[rip+88], -44
	mov	DWORD PTR h_tmp[rip+92], 12
	mov	DWORD PTR qq4_code4_table[rip], 0
	mov	DWORD PTR qq4_code4_table[rip+4], -20456
	mov	DWORD PTR qq4_code4_table[rip+8], -12896
	mov	DWORD PTR qq4_code4_table[rip+12], -8968
	mov	DWORD PTR qq4_code4_table[rip+16], -6288
	mov	DWORD PTR qq4_code4_table[rip+20], -4240
	mov	DWORD PTR qq4_code4_table[rip+24], -2584
	mov	DWORD PTR qq4_code4_table[rip+28], -1200
	mov	DWORD PTR qq4_code4_table[rip+32], 20456
	mov	DWORD PTR qq4_code4_table[rip+36], 12896
	mov	DWORD PTR qq4_code4_table[rip+40], 8968
	mov	DWORD PTR qq4_code4_table[rip+44], 6288
	mov	DWORD PTR qq4_code4_table[rip+48], 4240
	mov	DWORD PTR qq4_code4_table[rip+52], 2584
	mov	DWORD PTR qq4_code4_table[rip+56], 1200
	mov	DWORD PTR qq4_code4_table[rip+60], 0
	mov	DWORD PTR qq5_code5_table[rip], -280
	mov	DWORD PTR qq5_code5_table[rip+4], -280
	mov	DWORD PTR qq5_code5_table[rip+8], -23352
	mov	DWORD PTR qq5_code5_table[rip+12], -17560
	mov	DWORD PTR qq5_code5_table[rip+16], -14120
	mov	DWORD PTR qq5_code5_table[rip+20], -11664
	mov	DWORD PTR qq5_code5_table[rip+24], -9752
	mov	DWORD PTR qq5_code5_table[rip+28], -8184
	mov	DWORD PTR qq5_code5_table[rip+32], -6864
	mov	DWORD PTR qq5_code5_table[rip+36], -5712
	mov	DWORD PTR qq5_code5_table[rip+40], -4696
	mov	DWORD PTR qq5_code5_table[rip+44], -3784
	mov	DWORD PTR qq5_code5_table[rip+48], -2960
	mov	DWORD PTR qq5_code5_table[rip+52], -2208
	mov	DWORD PTR qq5_code5_table[rip+56], -1520
	mov	DWORD PTR qq5_code5_table[rip+60], -880
	mov	DWORD PTR qq5_code5_table[rip+64], 23352
	mov	DWORD PTR qq5_code5_table[rip+68], 17560
	mov	DWORD PTR qq5_code5_table[rip+72], 14120
	mov	DWORD PTR qq5_code5_table[rip+76], 11664
	mov	DWORD PTR qq5_code5_table[rip+80], 9752
	mov	DWORD PTR qq5_code5_table[rip+84], 8184
	mov	DWORD PTR qq5_code5_table[rip+88], 6864
	mov	DWORD PTR qq5_code5_table[rip+92], 5712
	mov	DWORD PTR qq5_code5_table[rip+96], 4696
	mov	DWORD PTR qq5_code5_table[rip+100], 3784
	mov	DWORD PTR qq5_code5_table[rip+104], 2960
	mov	DWORD PTR qq5_code5_table[rip+108], 2208
	mov	DWORD PTR qq5_code5_table[rip+112], 1520
	mov	DWORD PTR qq5_code5_table[rip+116], 880
	mov	DWORD PTR qq5_code5_table[rip+120], 280
	mov	DWORD PTR qq5_code5_table[rip+124], -280
	mov	DWORD PTR qq6_code6_table[rip], -136
	mov	DWORD PTR qq6_code6_table[rip+4], -136
	mov	DWORD PTR qq6_code6_table[rip+8], -136
	mov	DWORD PTR qq6_code6_table[rip+12], -136
	mov	DWORD PTR qq6_code6_table[rip+16], -24808
	mov	DWORD PTR qq6_code6_table[rip+20], -21904
	mov	DWORD PTR qq6_code6_table[rip+24], -19008
	mov	DWORD PTR qq6_code6_table[rip+28], -16704
	mov	DWORD PTR qq6_code6_table[rip+32], -14984
	mov	DWORD PTR qq6_code6_table[rip+36], -13512
	mov	DWORD PTR qq6_code6_table[rip+40], -12280
	mov	DWORD PTR qq6_code6_table[rip+44], -11192
	mov	DWORD PTR qq6_code6_table[rip+48], -10232
	mov	DWORD PTR qq6_code6_table[rip+52], -9360
	mov	DWORD PTR qq6_code6_table[rip+56], -8576
	mov	DWORD PTR qq6_code6_table[rip+60], -7856
	mov	DWORD PTR qq6_code6_table[rip+64], -7192
	mov	DWORD PTR qq6_code6_table[rip+68], -6576
	mov	DWORD PTR qq6_code6_table[rip+72], -6000
	mov	DWORD PTR qq6_code6_table[rip+76], -5456
	mov	DWORD PTR qq6_code6_table[rip+80], -4944
	mov	DWORD PTR qq6_code6_table[rip+84], -4464
	mov	DWORD PTR qq6_code6_table[rip+88], -4008
	mov	DWORD PTR qq6_code6_table[rip+92], -3576
	mov	DWORD PTR qq6_code6_table[rip+96], -3168
	mov	DWORD PTR qq6_code6_table[rip+100], -2776
	mov	DWORD PTR qq6_code6_table[rip+104], -2400
	mov	DWORD PTR qq6_code6_table[rip+108], -2032
	mov	DWORD PTR qq6_code6_table[rip+112], -1688
	mov	DWORD PTR qq6_code6_table[rip+116], -1360
	mov	DWORD PTR qq6_code6_table[rip+120], -1040
	mov	DWORD PTR qq6_code6_table[rip+124], -728
	mov	DWORD PTR qq6_code6_table[rip+128], 24808
	mov	DWORD PTR qq6_code6_table[rip+132], 21904
	mov	DWORD PTR qq6_code6_table[rip+136], 19008
	mov	DWORD PTR qq6_code6_table[rip+140], 16704
	mov	DWORD PTR qq6_code6_table[rip+144], 14984
	mov	DWORD PTR qq6_code6_table[rip+148], 13512
	mov	DWORD PTR qq6_code6_table[rip+152], 12280
	mov	DWORD PTR qq6_code6_table[rip+156], 11192
	mov	DWORD PTR qq6_code6_table[rip+160], 10232
	mov	DWORD PTR qq6_code6_table[rip+164], 9360
	mov	DWORD PTR qq6_code6_table[rip+168], 8576
	mov	DWORD PTR qq6_code6_table[rip+172], 7856
	mov	DWORD PTR qq6_code6_table[rip+176], 7192
	mov	DWORD PTR qq6_code6_table[rip+180], 6576
	mov	DWORD PTR qq6_code6_table[rip+184], 6000
	mov	DWORD PTR qq6_code6_table[rip+188], 5456
	mov	DWORD PTR qq6_code6_table[rip+192], 4944
	mov	DWORD PTR qq6_code6_table[rip+196], 4464
	mov	DWORD PTR qq6_code6_table[rip+200], 4008
	mov	DWORD PTR qq6_code6_table[rip+204], 3576
	mov	DWORD PTR qq6_code6_table[rip+208], 3168
	mov	DWORD PTR qq6_code6_table[rip+212], 2776
	mov	DWORD PTR qq6_code6_table[rip+216], 2400
	mov	DWORD PTR qq6_code6_table[rip+220], 2032
	mov	DWORD PTR qq6_code6_table[rip+224], 1688
	mov	DWORD PTR qq6_code6_table[rip+228], 1360
	mov	DWORD PTR qq6_code6_table[rip+232], 1040
	mov	DWORD PTR qq6_code6_table[rip+236], 728
	mov	DWORD PTR qq6_code6_table[rip+240], 432
	mov	DWORD PTR qq6_code6_table[rip+244], 136
	mov	DWORD PTR qq6_code6_table[rip+248], -432
	mov	DWORD PTR qq6_code6_table[rip+252], -136
	mov	DWORD PTR wl_code_table[rip], -60
	mov	DWORD PTR wl_code_table[rip+4], 3042
	mov	DWORD PTR wl_code_table[rip+8], 1198
	mov	DWORD PTR wl_code_table[rip+12], 538
	mov	DWORD PTR wl_code_table[rip+16], 334
	mov	DWORD PTR wl_code_table[rip+20], 172
	mov	DWORD PTR wl_code_table[rip+24], 58
	mov	DWORD PTR wl_code_table[rip+28], -30
	mov	DWORD PTR wl_code_table[rip+32], 3042
	mov	DWORD PTR wl_code_table[rip+36], 1198
	mov	DWORD PTR wl_code_table[rip+40], 538
	mov	DWORD PTR wl_code_table[rip+44], 334
	mov	DWORD PTR wl_code_table[rip+48], 172
	mov	DWORD PTR wl_code_table[rip+52], 58
	mov	DWORD PTR wl_code_table[rip+56], -30
	mov	DWORD PTR wl_code_table[rip+60], -60
	mov	DWORD PTR wl_table[rip], -60
	mov	DWORD PTR wl_table[rip+4], -30
	mov	DWORD PTR wl_table[rip+8], 58
	mov	DWORD PTR wl_table[rip+12], 172
	mov	DWORD PTR wl_table[rip+16], 334
	mov	DWORD PTR wl_table[rip+20], 538
	mov	DWORD PTR wl_table[rip+24], 1198
	mov	DWORD PTR wl_table[rip+28], 3042
	mov	DWORD PTR ilb_table[rip], 2048
	mov	DWORD PTR ilb_table[rip+4], 2093
	mov	DWORD PTR ilb_table[rip+8], 2139
	mov	DWORD PTR ilb_table[rip+12], 2186
	mov	DWORD PTR ilb_table[rip+16], 2233
	mov	DWORD PTR ilb_table[rip+20], 2282
	mov	DWORD PTR ilb_table[rip+24], 2332
	mov	DWORD PTR ilb_table[rip+28], 2383
	mov	DWORD PTR ilb_table[rip+32], 2435
	mov	DWORD PTR ilb_table[rip+36], 2489
	mov	DWORD PTR ilb_table[rip+40], 2543
	mov	DWORD PTR ilb_table[rip+44], 2599
	mov	DWORD PTR ilb_table[rip+48], 2656
	mov	DWORD PTR ilb_table[rip+52], 2714
	mov	DWORD PTR ilb_table[rip+56], 2774
	mov	DWORD PTR ilb_table[rip+60], 2834
	mov	DWORD PTR ilb_table[rip+64], 2896
	mov	DWORD PTR ilb_table[rip+68], 2960
	mov	DWORD PTR ilb_table[rip+72], 3025
	mov	DWORD PTR ilb_table[rip+76], 3091
	mov	DWORD PTR ilb_table[rip+80], 3158
	mov	DWORD PTR ilb_table[rip+84], 3228
	mov	DWORD PTR ilb_table[rip+88], 3298
	mov	DWORD PTR ilb_table[rip+92], 3371
	mov	DWORD PTR ilb_table[rip+96], 3444
	mov	DWORD PTR ilb_table[rip+100], 3520
	mov	DWORD PTR ilb_table[rip+104], 3597
	mov	DWORD PTR ilb_table[rip+108], 3676
	mov	DWORD PTR ilb_table[rip+112], 3756
	mov	DWORD PTR ilb_table[rip+116], 3838
	mov	DWORD PTR ilb_table[rip+120], 3922
	mov	DWORD PTR ilb_table[rip+124], 4008
	mov	DWORD PTR decis_levl[rip], 280
	mov	DWORD PTR decis_levl[rip+4], 576
	mov	DWORD PTR decis_levl[rip+8], 880
	mov	DWORD PTR decis_levl[rip+12], 1200
	mov	DWORD PTR decis_levl[rip+16], 1520
	mov	DWORD PTR decis_levl[rip+20], 1864
	mov	DWORD PTR decis_levl[rip+24], 2208
	mov	DWORD PTR decis_levl[rip+28], 2584
	mov	DWORD PTR decis_levl[rip+32], 2960
	mov	DWORD PTR decis_levl[rip+36], 3376
	mov	DWORD PTR decis_levl[rip+40], 3784
	mov	DWORD PTR decis_levl[rip+44], 4240
	mov	DWORD PTR decis_levl[rip+48], 4696
	mov	DWORD PTR decis_levl[rip+52], 5200
	mov	DWORD PTR decis_levl[rip+56], 5712
	mov	DWORD PTR decis_levl[rip+60], 6288
	mov	DWORD PTR decis_levl[rip+64], 6864
	mov	DWORD PTR decis_levl[rip+68], 7520
	mov	DWORD PTR decis_levl[rip+72], 8184
	mov	DWORD PTR decis_levl[rip+76], 8968
	mov	DWORD PTR decis_levl[rip+80], 9752
	mov	DWORD PTR decis_levl[rip+84], 10712
	mov	DWORD PTR decis_levl[rip+88], 11664
	mov	DWORD PTR decis_levl[rip+92], 12896
	mov	DWORD PTR decis_levl[rip+96], 14120
	mov	DWORD PTR decis_levl[rip+100], 15840
	mov	DWORD PTR decis_levl[rip+104], 17560
	mov	DWORD PTR decis_levl[rip+108], 20456
	mov	DWORD PTR decis_levl[rip+112], 23352
	mov	DWORD PTR decis_levl[rip+116], 32767
	mov	DWORD PTR quant26bt_pos[rip], 61
	mov	DWORD PTR quant26bt_pos[rip+4], 60
	mov	DWORD PTR quant26bt_pos[rip+8], 59
	mov	DWORD PTR quant26bt_pos[rip+12], 58
	mov	DWORD PTR quant26bt_pos[rip+16], 57
	mov	DWORD PTR quant26bt_pos[rip+20], 56
	mov	DWORD PTR quant26bt_pos[rip+24], 55
	mov	DWORD PTR quant26bt_pos[rip+28], 54
	mov	DWORD PTR quant26bt_pos[rip+32], 53
	mov	DWORD PTR quant26bt_pos[rip+36], 52
	mov	DWORD PTR quant26bt_pos[rip+40], 51
	mov	DWORD PTR quant26bt_pos[rip+44], 50
	mov	DWORD PTR quant26bt_pos[rip+48], 49
	mov	DWORD PTR quant26bt_pos[rip+52], 48
	mov	DWORD PTR quant26bt_pos[rip+56], 47
	mov	DWORD PTR quant26bt_pos[rip+60], 46
	mov	DWORD PTR quant26bt_pos[rip+64], 45
	mov	DWORD PTR quant26bt_pos[rip+68], 44
	mov	DWORD PTR quant26bt_pos[rip+72], 43
	mov	DWORD PTR quant26bt_pos[rip+76], 42
	mov	DWORD PTR quant26bt_pos[rip+80], 41
	mov	DWORD PTR quant26bt_pos[rip+84], 40
	mov	DWORD PTR quant26bt_pos[rip+88], 39
	mov	DWORD PTR quant26bt_pos[rip+92], 38
	mov	DWORD PTR quant26bt_pos[rip+96], 37
	mov	DWORD PTR quant26bt_pos[rip+100], 36
	mov	DWORD PTR quant26bt_pos[rip+104], 35
	mov	DWORD PTR quant26bt_pos[rip+108], 34
	mov	DWORD PTR quant26bt_pos[rip+112], 33
	mov	DWORD PTR quant26bt_pos[rip+116], 32
	mov	DWORD PTR quant26bt_pos[rip+120], 32
	mov	DWORD PTR quant26bt_neg[rip], 63
	mov	DWORD PTR quant26bt_neg[rip+4], 62
	mov	DWORD PTR quant26bt_neg[rip+8], 31
	mov	DWORD PTR quant26bt_neg[rip+12], 30
	mov	DWORD PTR quant26bt_neg[rip+16], 29
	mov	DWORD PTR quant26bt_neg[rip+20], 28
	mov	DWORD PTR quant26bt_neg[rip+24], 27
	mov	DWORD PTR quant26bt_neg[rip+28], 26
	mov	DWORD PTR quant26bt_neg[rip+32], 25
	mov	DWORD PTR quant26bt_neg[rip+36], 24
	mov	DWORD PTR quant26bt_neg[rip+40], 23
	mov	DWORD PTR quant26bt_neg[rip+44], 22
	mov	DWORD PTR quant26bt_neg[rip+48], 21
	mov	DWORD PTR quant26bt_neg[rip+52], 20
	mov	DWORD PTR quant26bt_neg[rip+56], 19
	mov	DWORD PTR quant26bt_neg[rip+60], 18
	mov	DWORD PTR quant26bt_neg[rip+64], 17
	mov	DWORD PTR quant26bt_neg[rip+68], 16
	mov	DWORD PTR quant26bt_neg[rip+72], 15
	mov	DWORD PTR quant26bt_neg[rip+76], 14
	mov	DWORD PTR quant26bt_neg[rip+80], 13
	mov	DWORD PTR quant26bt_neg[rip+84], 12
	mov	DWORD PTR quant26bt_neg[rip+88], 11
	mov	DWORD PTR quant26bt_neg[rip+92], 10
	mov	DWORD PTR quant26bt_neg[rip+96], 9
	mov	DWORD PTR quant26bt_neg[rip+100], 8
	mov	DWORD PTR quant26bt_neg[rip+104], 7
	mov	DWORD PTR quant26bt_neg[rip+108], 6
	mov	DWORD PTR quant26bt_neg[rip+112], 5
	mov	DWORD PTR quant26bt_neg[rip+116], 4
	mov	DWORD PTR quant26bt_neg[rip+120], 4
	mov	DWORD PTR qq2_code2_table[rip], -7408
	mov	DWORD PTR qq2_code2_table[rip+4], -1616
	mov	DWORD PTR qq2_code2_table[rip+8], 7408
	mov	DWORD PTR qq2_code2_table[rip+12], 1616
	mov	DWORD PTR wh_code_table[rip], 798
	mov	DWORD PTR wh_code_table[rip+4], -214
	mov	DWORD PTR wh_code_table[rip+8], 798
	mov	DWORD PTR wh_code_table[rip+12], -214
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	initialize_global, .-initialize_global
	.globl	my_abs
	.type	my_abs, @function
my_abs:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	.cfi_offset 3, -24
	mov	eax, edi
	test	eax, eax
	js	.L4
	mov	ebx, eax
	jmp	.L5
.L4:
	neg	eax
	mov	ebx, eax
.L5:
	mov	eax, ebx
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	my_abs, .-my_abs
	.globl	my_fabs
	.type	my_fabs, @function
my_fabs:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	.cfi_offset 3, -24
	mov	eax, edi
	test	eax, eax
	js	.L8
	mov	ebx, eax
	jmp	.L9
.L8:
	neg	eax
	mov	ebx, eax
.L9:
	mov	eax, ebx
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	my_fabs, .-my_fabs
	.globl	my_sin
	.type	my_sin, @function
my_sin:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r15
	push	r14
	push	r13
	push	r12
	push	rbx
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	mov	ebx, edi
	mov	r12d, 1
	jmp	.L12
.L13:
	sub	ebx, 6282
.L12:
	cmp	ebx, 6282
	jg	.L13
	jmp	.L14
.L15:
	add	ebx, 6282
.L14:
	cmp	ebx, -6282
	jl	.L15
	mov	r13d, ebx
	mov	r14d, r13d
	mov	eax, ebx
	imul	eax, ebx
	neg	eax
	imul	eax, r13d
	lea	edx, [r12+r12]
	add	edx, 1
	imul	edx, r12d
	lea	ecx, [rdx+rdx]
	cdq
	idiv	ecx
	mov	r13d, eax
	add	r14d, r13d
	add	r12d, 1
	mov	edi, r13d
	call	my_fabs
	mov	r15d, eax
	jmp	.L16
.L17:
	mov	eax, ebx
	imul	eax, ebx
	neg	eax
	imul	eax, r13d
	lea	edx, [r12+r12]
	add	edx, 1
	imul	edx, r12d
	lea	esi, [rdx+rdx]
	cdq
	idiv	esi
	mov	r13d, eax
	add	r14d, r13d
	add	r12d, 1
	mov	edi, r13d
	call	my_fabs
	mov	r15d, eax
.L16:
	test	r15d, r15d
	jg	.L17
	mov	eax, r14d
	pop	rbx
	pop	r12
	pop	r13
	pop	r14
	pop	r15
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	my_sin, .-my_sin
	.globl	my_cos
	.type	my_cos, @function
my_cos:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 8
	mov	DWORD PTR -4[rbp], edi
	mov	eax, 1570
	sub	eax, DWORD PTR -4[rbp]
	mov	edi, eax
	call	my_sin
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	my_cos, .-my_cos
	.globl	encode
	.type	encode, @function
encode:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r15
	push	r14
	push	r13
	push	r12
	push	rbx
	sub	rsp, 8
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	mov	edx, edi
	mov	eax, esi
	lea	r12, h_tmp[rip]
	lea	rbx, tqmf[rip]
	mov	rcx, rbx
	lea	rbx, 4[rcx]
	mov	ecx, DWORD PTR [rcx]
	movsx	rsi, ecx
	mov	rcx, r12
	lea	r12, 4[rcx]
	mov	ecx, DWORD PTR [rcx]
	movsx	rcx, ecx
	imul	rsi, rcx
	mov	r14, rsi
	mov	rcx, rbx
	lea	rbx, 4[rcx]
	mov	ecx, DWORD PTR [rcx]
	movsx	rsi, ecx
	mov	rcx, r12
	lea	r12, 4[rcx]
	mov	ecx, DWORD PTR [rcx]
	movsx	rcx, ecx
	imul	rsi, rcx
	mov	r15, rsi
	mov	r13d, 0
	jmp	.L22
.L23:
	mov	rcx, rbx
	lea	rbx, 4[rcx]
	mov	ecx, DWORD PTR [rcx]
	movsx	rsi, ecx
	mov	rcx, r12
	lea	r12, 4[rcx]
	mov	ecx, DWORD PTR [rcx]
	movsx	rcx, ecx
	imul	rcx, rsi
	add	r14, rcx
	mov	rcx, rbx
	lea	rbx, 4[rcx]
	mov	ecx, DWORD PTR [rcx]
	movsx	rsi, ecx
	mov	rcx, r12
	lea	r12, 4[rcx]
	mov	ecx, DWORD PTR [rcx]
	movsx	rcx, ecx
	imul	rcx, rsi
	add	r15, rcx
	add	r13d, 1
.L22:
	cmp	r13d, 9
	jle	.L23
	mov	rcx, rbx
	lea	rbx, 4[rcx]
	mov	ecx, DWORD PTR [rcx]
	movsx	rsi, ecx
	mov	rcx, r12
	lea	r12, 4[rcx]
	mov	ecx, DWORD PTR [rcx]
	movsx	rcx, ecx
	imul	rcx, rsi
	add	r14, rcx
	mov	ecx, DWORD PTR [rbx]
	movsx	rsi, ecx
	mov	rcx, r12
	lea	r12, 4[rcx]
	mov	ecx, DWORD PTR [rcx]
	movsx	rcx, ecx
	imul	rcx, rsi
	add	r15, rcx
	lea	r12, -8[rbx]
	mov	r13d, 0
	jmp	.L24
.L25:
	mov	rsi, r12
	lea	r12, -4[rsi]
	mov	rcx, rbx
	lea	rbx, -4[rcx]
	mov	esi, DWORD PTR [rsi]
	mov	DWORD PTR [rcx], esi
	add	r13d, 1
.L24:
	cmp	r13d, 21
	jle	.L25
	mov	rcx, rbx
	lea	rbx, -4[rcx]
	mov	DWORD PTR [rcx], edx
	mov	DWORD PTR [rbx], eax
	lea	rax, [r14+r15]
	sar	rax, 15
	mov	DWORD PTR xl[rip], eax
	mov	rax, r14
	sub	rax, r15
	sar	rax, 15
	mov	DWORD PTR xh[rip], eax
	lea	rsi, delay_dltx[rip]
	lea	rdi, delay_bpl[rip]
	mov	eax, 0
	call	filtez
	mov	DWORD PTR szl[rip], eax
	mov	ecx, DWORD PTR al2[rip]
	mov	edx, DWORD PTR rlt_tmp_2[rip]
	mov	esi, DWORD PTR al1[rip]
	mov	eax, DWORD PTR rlt_tmp_1[rip]
	mov	edi, eax
	mov	eax, 0
	call	filtep
	mov	DWORD PTR spl[rip], eax
	mov	edx, DWORD PTR szl[rip]
	mov	eax, DWORD PTR spl[rip]
	add	eax, edx
	mov	DWORD PTR sl[rip], eax
	mov	eax, DWORD PTR xl[rip]
	mov	edx, DWORD PTR sl[rip]
	sub	eax, edx
	mov	DWORD PTR el[rip], eax
	mov	edx, DWORD PTR detl[rip]
	mov	eax, DWORD PTR el[rip]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	quantl
	mov	DWORD PTR il[rip], eax
	mov	eax, DWORD PTR detl[rip]
	movsx	rdx, eax
	mov	eax, DWORD PTR il[rip]
	sar	eax, 2
	cdqe
	lea	rcx, 0[0+rax*4]
	lea	rax, qq4_code4_table[rip]
	mov	eax, DWORD PTR [rcx+rax]
	cdqe
	imul	rax, rdx
	sar	rax, 15
	mov	DWORD PTR dlt[rip], eax
	mov	edx, DWORD PTR nbl[rip]
	mov	eax, DWORD PTR il[rip]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	logscl
	mov	DWORD PTR nbl[rip], eax
	mov	eax, DWORD PTR nbl[rip]
	mov	esi, 8
	mov	edi, eax
	mov	eax, 0
	call	scalel
	mov	DWORD PTR detl[rip], eax
	mov	edx, DWORD PTR dlt[rip]
	mov	eax, DWORD PTR szl[rip]
	add	eax, edx
	mov	DWORD PTR plt[rip], eax
	mov	eax, DWORD PTR dlt[rip]
	lea	rdx, delay_bpl[rip]
	lea	rsi, delay_dltx[rip]
	mov	edi, eax
	mov	eax, 0
	call	upzero
	mov	edi, DWORD PTR plt_tmp_2[rip]
	mov	ecx, DWORD PTR plt_tmp_1[rip]
	mov	edx, DWORD PTR plt[rip]
	mov	esi, DWORD PTR al2[rip]
	mov	eax, DWORD PTR al1[rip]
	mov	r8d, edi
	mov	edi, eax
	mov	eax, 0
	call	uppol2
	mov	DWORD PTR al2[rip], eax
	mov	ecx, DWORD PTR plt_tmp_1[rip]
	mov	edx, DWORD PTR plt[rip]
	mov	esi, DWORD PTR al2[rip]
	mov	eax, DWORD PTR al1[rip]
	mov	edi, eax
	mov	eax, 0
	call	uppol1
	mov	DWORD PTR al1[rip], eax
	mov	edx, DWORD PTR sl[rip]
	mov	eax, DWORD PTR dlt[rip]
	add	eax, edx
	mov	DWORD PTR rlt[rip], eax
	mov	eax, DWORD PTR rlt_tmp_1[rip]
	mov	DWORD PTR rlt_tmp_2[rip], eax
	mov	eax, DWORD PTR rlt[rip]
	mov	DWORD PTR rlt_tmp_1[rip], eax
	mov	eax, DWORD PTR plt_tmp_1[rip]
	mov	DWORD PTR plt_tmp_2[rip], eax
	mov	eax, DWORD PTR plt[rip]
	mov	DWORD PTR plt_tmp_1[rip], eax
	lea	rsi, delay_dhx[rip]
	lea	rdi, delay_bph[rip]
	mov	eax, 0
	call	filtez
	mov	DWORD PTR szh[rip], eax
	mov	ecx, DWORD PTR ah_tmp_2[rip]
	mov	edx, DWORD PTR rh_tmp_2[rip]
	mov	esi, DWORD PTR ah_tmp_1[rip]
	mov	eax, DWORD PTR rh_tmp_1[rip]
	mov	edi, eax
	mov	eax, 0
	call	filtep
	mov	DWORD PTR sph[rip], eax
	mov	edx, DWORD PTR sph[rip]
	mov	eax, DWORD PTR szh[rip]
	add	eax, edx
	mov	DWORD PTR sh[rip], eax
	mov	eax, DWORD PTR xh[rip]
	mov	edx, DWORD PTR sh[rip]
	sub	eax, edx
	mov	DWORD PTR eh[rip], eax
	mov	eax, DWORD PTR eh[rip]
	test	eax, eax
	js	.L26
	mov	DWORD PTR ih[rip], 3
	jmp	.L27
.L26:
	mov	DWORD PTR ih[rip], 1
.L27:
	mov	eax, DWORD PTR deth[rip]
	cdqe
	imul	rax, rax, 564
	sar	rax, 12
	mov	r12d, eax
	mov	eax, DWORD PTR eh[rip]
	mov	edi, eax
	call	my_abs
	mov	ebx, eax
	cmp	ebx, r12d
	jle	.L28
	mov	eax, DWORD PTR ih[rip]
	sub	eax, 1
	mov	DWORD PTR ih[rip], eax
.L28:
	mov	eax, DWORD PTR deth[rip]
	movsx	rdx, eax
	mov	eax, DWORD PTR ih[rip]
	cdqe
	lea	rcx, 0[0+rax*4]
	lea	rax, qq2_code2_table[rip]
	mov	eax, DWORD PTR [rcx+rax]
	cdqe
	imul	rax, rdx
	sar	rax, 15
	mov	DWORD PTR dh[rip], eax
	mov	edx, DWORD PTR nbh[rip]
	mov	eax, DWORD PTR ih[rip]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	logsch
	mov	DWORD PTR nbh[rip], eax
	mov	eax, DWORD PTR nbh[rip]
	mov	esi, 10
	mov	edi, eax
	mov	eax, 0
	call	scalel
	mov	DWORD PTR deth[rip], eax
	mov	edx, DWORD PTR dh[rip]
	mov	eax, DWORD PTR szh[rip]
	add	eax, edx
	mov	DWORD PTR ph[rip], eax
	mov	eax, DWORD PTR dh[rip]
	lea	rdx, delay_bph[rip]
	lea	rsi, delay_dhx[rip]
	mov	edi, eax
	mov	eax, 0
	call	upzero
	mov	edi, DWORD PTR ph_tmp_2[rip]
	mov	ecx, DWORD PTR ph_tmp_1[rip]
	mov	edx, DWORD PTR ph[rip]
	mov	esi, DWORD PTR ah_tmp_2[rip]
	mov	eax, DWORD PTR ah_tmp_1[rip]
	mov	r8d, edi
	mov	edi, eax
	mov	eax, 0
	call	uppol2
	mov	DWORD PTR ah_tmp_2[rip], eax
	mov	ecx, DWORD PTR ph_tmp_1[rip]
	mov	edx, DWORD PTR ph[rip]
	mov	esi, DWORD PTR ah_tmp_2[rip]
	mov	eax, DWORD PTR ah_tmp_1[rip]
	mov	edi, eax
	mov	eax, 0
	call	uppol1
	mov	DWORD PTR ah_tmp_1[rip], eax
	mov	edx, DWORD PTR sh[rip]
	mov	eax, DWORD PTR dh[rip]
	add	eax, edx
	mov	DWORD PTR yh[rip], eax
	mov	eax, DWORD PTR rh_tmp_1[rip]
	mov	DWORD PTR rh_tmp_2[rip], eax
	mov	eax, DWORD PTR yh[rip]
	mov	DWORD PTR rh_tmp_1[rip], eax
	mov	eax, DWORD PTR ph_tmp_1[rip]
	mov	DWORD PTR ph_tmp_2[rip], eax
	mov	eax, DWORD PTR ph[rip]
	mov	DWORD PTR ph_tmp_1[rip], eax
	mov	eax, DWORD PTR ih[rip]
	sal	eax, 6
	mov	edx, eax
	mov	eax, DWORD PTR il[rip]
	or	eax, edx
	add	rsp, 8
	pop	rbx
	pop	r12
	pop	r13
	pop	r14
	pop	r15
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	encode, .-encode
	.globl	decode
	.type	decode, @function
decode:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r15
	push	r14
	push	r13
	push	r12
	push	rbx
	sub	rsp, 8
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	mov	eax, edi
	mov	edx, eax
	and	edx, 33
	mov	DWORD PTR ilr[rip], edx
	sar	eax, 6
	mov	DWORD PTR ih[rip], eax
	lea	rsi, dec_del_dltx[rip]
	lea	rdi, dec_del_bpl[rip]
	mov	eax, 0
	call	filtez
	mov	DWORD PTR dec_szl[rip], eax
	mov	ecx, DWORD PTR dec_al2[rip]
	mov	edx, DWORD PTR dec_rlt_tmp_2[rip]
	mov	esi, DWORD PTR dec_al1[rip]
	mov	eax, DWORD PTR dec_rlt_tmp_1[rip]
	mov	edi, eax
	mov	eax, 0
	call	filtep
	mov	DWORD PTR dec_spl[rip], eax
	mov	edx, DWORD PTR dec_spl[rip]
	mov	eax, DWORD PTR dec_szl[rip]
	add	eax, edx
	mov	DWORD PTR dec_sl[rip], eax
	mov	eax, DWORD PTR dec_detl[rip]
	movsx	rdx, eax
	mov	eax, DWORD PTR ilr[rip]
	sar	eax, 2
	cdqe
	lea	rcx, 0[0+rax*4]
	lea	rax, qq4_code4_table[rip]
	mov	eax, DWORD PTR [rcx+rax]
	cdqe
	imul	rax, rdx
	sar	rax, 15
	mov	DWORD PTR dec_dlt[rip], eax
	mov	eax, DWORD PTR dec_detl[rip]
	movsx	rdx, eax
	mov	eax, DWORD PTR il[rip]
	cdqe
	lea	rcx, 0[0+rax*4]
	lea	rax, qq6_code6_table[rip]
	mov	eax, DWORD PTR [rcx+rax]
	cdqe
	imul	rax, rdx
	sar	rax, 15
	mov	DWORD PTR dl[rip], eax
	mov	edx, DWORD PTR dl[rip]
	mov	eax, DWORD PTR dec_sl[rip]
	add	eax, edx
	mov	DWORD PTR rl[rip], eax
	mov	edx, DWORD PTR dec_nbl[rip]
	mov	eax, DWORD PTR ilr[rip]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	logscl
	mov	DWORD PTR dec_nbl[rip], eax
	mov	eax, DWORD PTR dec_nbl[rip]
	mov	esi, 8
	mov	edi, eax
	mov	eax, 0
	call	scalel
	mov	DWORD PTR dec_detl[rip], eax
	mov	edx, DWORD PTR dec_dlt[rip]
	mov	eax, DWORD PTR dec_szl[rip]
	add	eax, edx
	mov	DWORD PTR dec_plt[rip], eax
	mov	eax, DWORD PTR dec_dlt[rip]
	lea	rdx, dec_del_bpl[rip]
	lea	rsi, dec_del_dltx[rip]
	mov	edi, eax
	mov	eax, 0
	call	upzero
	mov	edi, DWORD PTR dec_plt_tmp_2[rip]
	mov	ecx, DWORD PTR dec_plt_tmp_1[rip]
	mov	edx, DWORD PTR dec_plt[rip]
	mov	esi, DWORD PTR dec_al2[rip]
	mov	eax, DWORD PTR dec_al1[rip]
	mov	r8d, edi
	mov	edi, eax
	mov	eax, 0
	call	uppol2
	mov	DWORD PTR dec_al2[rip], eax
	mov	ecx, DWORD PTR dec_plt_tmp_1[rip]
	mov	edx, DWORD PTR dec_plt[rip]
	mov	esi, DWORD PTR dec_al2[rip]
	mov	eax, DWORD PTR dec_al1[rip]
	mov	edi, eax
	mov	eax, 0
	call	uppol1
	mov	DWORD PTR dec_al1[rip], eax
	mov	edx, DWORD PTR dec_sl[rip]
	mov	eax, DWORD PTR dec_dlt[rip]
	add	eax, edx
	mov	DWORD PTR dec_rlt[rip], eax
	mov	eax, DWORD PTR dec_rlt_tmp_1[rip]
	mov	DWORD PTR dec_rlt_tmp_2[rip], eax
	mov	eax, DWORD PTR dec_rlt[rip]
	mov	DWORD PTR dec_rlt_tmp_1[rip], eax
	mov	eax, DWORD PTR dec_plt_tmp_1[rip]
	mov	DWORD PTR dec_plt_tmp_2[rip], eax
	mov	eax, DWORD PTR dec_plt[rip]
	mov	DWORD PTR dec_plt_tmp_1[rip], eax
	lea	rsi, dec_del_dhx[rip]
	lea	rdi, dec_del_bph[rip]
	mov	eax, 0
	call	filtez
	mov	DWORD PTR dec_szh[rip], eax
	mov	ecx, DWORD PTR dec_ah_tmp_2[rip]
	mov	edx, DWORD PTR dec_rh_tmp_2[rip]
	mov	esi, DWORD PTR dec_ah_tmp_1[rip]
	mov	eax, DWORD PTR dec_rh_tmp_1[rip]
	mov	edi, eax
	mov	eax, 0
	call	filtep
	mov	DWORD PTR dec_sph[rip], eax
	mov	edx, DWORD PTR dec_sph[rip]
	mov	eax, DWORD PTR dec_szh[rip]
	add	eax, edx
	mov	DWORD PTR dec_sh[rip], eax
	mov	eax, DWORD PTR dec_deth[rip]
	movsx	rdx, eax
	mov	eax, DWORD PTR ih[rip]
	cdqe
	lea	rcx, 0[0+rax*4]
	lea	rax, qq2_code2_table[rip]
	mov	eax, DWORD PTR [rcx+rax]
	cdqe
	imul	rax, rdx
	sar	rax, 15
	mov	DWORD PTR dec_dh[rip], eax
	mov	edx, DWORD PTR dec_nbh[rip]
	mov	eax, DWORD PTR ih[rip]
	mov	esi, edx
	mov	edi, eax
	mov	eax, 0
	call	logsch
	mov	DWORD PTR dec_nbh[rip], eax
	mov	eax, DWORD PTR dec_nbh[rip]
	mov	esi, 10
	mov	edi, eax
	mov	eax, 0
	call	scalel
	mov	DWORD PTR dec_deth[rip], eax
	mov	edx, DWORD PTR dec_dh[rip]
	mov	eax, DWORD PTR dec_szh[rip]
	add	eax, edx
	mov	DWORD PTR dec_ph[rip], eax
	mov	eax, DWORD PTR dec_dh[rip]
	lea	rdx, dec_del_bph[rip]
	lea	rsi, dec_del_dhx[rip]
	mov	edi, eax
	mov	eax, 0
	call	upzero
	mov	edi, DWORD PTR dec_ph_tmp_2[rip]
	mov	ecx, DWORD PTR dec_ph_tmp_1[rip]
	mov	edx, DWORD PTR dec_ph[rip]
	mov	esi, DWORD PTR dec_ah_tmp_2[rip]
	mov	eax, DWORD PTR dec_ah_tmp_1[rip]
	mov	r8d, edi
	mov	edi, eax
	mov	eax, 0
	call	uppol2
	mov	DWORD PTR dec_ah_tmp_2[rip], eax
	mov	ecx, DWORD PTR dec_ph_tmp_1[rip]
	mov	edx, DWORD PTR dec_ph[rip]
	mov	esi, DWORD PTR dec_ah_tmp_2[rip]
	mov	eax, DWORD PTR dec_ah_tmp_1[rip]
	mov	edi, eax
	mov	eax, 0
	call	uppol1
	mov	DWORD PTR dec_ah_tmp_1[rip], eax
	mov	edx, DWORD PTR dec_sh[rip]
	mov	eax, DWORD PTR dec_dh[rip]
	add	eax, edx
	mov	DWORD PTR rh[rip], eax
	mov	eax, DWORD PTR dec_rh_tmp_1[rip]
	mov	DWORD PTR dec_rh_tmp_2[rip], eax
	mov	eax, DWORD PTR rh[rip]
	mov	DWORD PTR dec_rh_tmp_1[rip], eax
	mov	eax, DWORD PTR dec_ph_tmp_1[rip]
	mov	DWORD PTR dec_ph_tmp_2[rip], eax
	mov	eax, DWORD PTR dec_ph[rip]
	mov	DWORD PTR dec_ph_tmp_1[rip], eax
	mov	eax, DWORD PTR rl[rip]
	mov	edx, DWORD PTR rh[rip]
	sub	eax, edx
	mov	DWORD PTR xd[rip], eax
	mov	edx, DWORD PTR rl[rip]
	mov	eax, DWORD PTR rh[rip]
	add	eax, edx
	mov	DWORD PTR xs[rip], eax
	lea	rbx, h_tmp[rip]
	lea	r13, accumc[rip]
	lea	r12, accumd[rip]
	mov	eax, DWORD PTR xd[rip]
	movsx	rdx, eax
	mov	rax, rbx
	lea	rbx, 4[rax]
	mov	eax, DWORD PTR [rax]
	cdqe
	imul	rdx, rax
	mov	rdi, rdx
	mov	eax, DWORD PTR xs[rip]
	movsx	rdx, eax
	mov	rax, rbx
	lea	rbx, 4[rax]
	mov	eax, DWORD PTR [rax]
	cdqe
	imul	rdx, rax
	mov	r15, rdx
	mov	r14d, 0
	jmp	.L31
.L32:
	mov	rax, r13
	lea	r13, 4[rax]
	mov	eax, DWORD PTR [rax]
	movsx	rdx, eax
	mov	rax, rbx
	lea	rbx, 4[rax]
	mov	eax, DWORD PTR [rax]
	cdqe
	imul	rax, rdx
	mov	rcx, rdi
	add	rcx, rax
	mov	rdi, rcx
	mov	rax, r12
	lea	r12, 4[rax]
	mov	eax, DWORD PTR [rax]
	movsx	rdx, eax
	mov	rax, rbx
	lea	rbx, 4[rax]
	mov	eax, DWORD PTR [rax]
	cdqe
	imul	rax, rdx
	add	r15, rax
	add	r14d, 1
.L31:
	cmp	r14d, 9
	jle	.L32
	mov	eax, DWORD PTR 0[r13]
	movsx	rdx, eax
	mov	rax, rbx
	lea	rbx, 4[rax]
	mov	eax, DWORD PTR [rax]
	cdqe
	imul	rax, rdx
	add	rdi, rax
	mov	eax, DWORD PTR [r12]
	movsx	rdx, eax
	mov	rax, rbx
	lea	rbx, 4[rax]
	mov	eax, DWORD PTR [rax]
	cdqe
	imul	rax, rdx
	add	r15, rax
	mov	rax, rdi
	sar	rax, 14
	mov	DWORD PTR xout1[rip], eax
	mov	rax, r15
	sar	rax, 14
	mov	DWORD PTR xout2[rip], eax
	lea	rbx, -4[r13]
	lea	r15, -4[r12]
	mov	r14d, 0
	jmp	.L33
.L34:
	mov	rdx, rbx
	lea	rbx, -4[rdx]
	mov	rax, r13
	lea	r13, -4[rax]
	mov	edx, DWORD PTR [rdx]
	mov	DWORD PTR [rax], edx
	mov	rdx, r15
	lea	r15, -4[rdx]
	mov	rax, r12
	lea	r12, -4[rax]
	mov	edx, DWORD PTR [rdx]
	mov	DWORD PTR [rax], edx
	add	r14d, 1
.L33:
	cmp	r14d, 9
	jle	.L34
	mov	eax, DWORD PTR xd[rip]
	mov	DWORD PTR 0[r13], eax
	mov	eax, DWORD PTR xs[rip]
	mov	DWORD PTR [r12], eax
	nop
	add	rsp, 8
	pop	rbx
	pop	r12
	pop	r13
	pop	r14
	pop	r15
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	decode, .-decode
	.globl	reset
	.type	reset, @function
reset:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR dec_detl[rip], 32
	mov	DWORD PTR detl[rip], 32
	mov	DWORD PTR dec_deth[rip], 8
	mov	DWORD PTR deth[rip], 8
	mov	DWORD PTR rlt_tmp_2[rip], 0
	mov	DWORD PTR rlt_tmp_1[rip], 0
	mov	DWORD PTR plt_tmp_2[rip], 0
	mov	DWORD PTR plt_tmp_1[rip], 0
	mov	DWORD PTR al2[rip], 0
	mov	DWORD PTR al1[rip], 0
	mov	DWORD PTR nbl[rip], 0
	mov	DWORD PTR rh_tmp_2[rip], 0
	mov	DWORD PTR rh_tmp_1[rip], 0
	mov	DWORD PTR ph_tmp_2[rip], 0
	mov	DWORD PTR ph_tmp_1[rip], 0
	mov	DWORD PTR ah_tmp_2[rip], 0
	mov	DWORD PTR ah_tmp_1[rip], 0
	mov	DWORD PTR nbh[rip], 0
	mov	DWORD PTR dec_rlt_tmp_2[rip], 0
	mov	DWORD PTR dec_rlt_tmp_1[rip], 0
	mov	DWORD PTR dec_plt_tmp_2[rip], 0
	mov	DWORD PTR dec_plt_tmp_1[rip], 0
	mov	DWORD PTR dec_al2[rip], 0
	mov	DWORD PTR dec_al1[rip], 0
	mov	DWORD PTR dec_nbl[rip], 0
	mov	DWORD PTR dec_rh_tmp_2[rip], 0
	mov	DWORD PTR dec_rh_tmp_1[rip], 0
	mov	DWORD PTR dec_ph_tmp_2[rip], 0
	mov	DWORD PTR dec_ph_tmp_1[rip], 0
	mov	DWORD PTR dec_ah_tmp_2[rip], 0
	mov	DWORD PTR dec_ah_tmp_1[rip], 0
	mov	DWORD PTR dec_nbh[rip], 0
	mov	DWORD PTR -4[rbp], 0
	jmp	.L37
.L38:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, delay_dltx[rip]
	mov	DWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, delay_dhx[rip]
	mov	DWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, dec_del_dltx[rip]
	mov	DWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, dec_del_dhx[rip]
	mov	DWORD PTR [rdx+rax], 0
	add	DWORD PTR -4[rbp], 1
.L37:
	cmp	DWORD PTR -4[rbp], 5
	jle	.L38
	mov	DWORD PTR -4[rbp], 0
	jmp	.L39
.L40:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, delay_bpl[rip]
	mov	DWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, delay_bph[rip]
	mov	DWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, dec_del_bpl[rip]
	mov	DWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, dec_del_bph[rip]
	mov	DWORD PTR [rdx+rax], 0
	add	DWORD PTR -4[rbp], 1
.L39:
	cmp	DWORD PTR -4[rbp], 5
	jle	.L40
	mov	DWORD PTR -4[rbp], 0
	jmp	.L41
.L42:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, tqmf[rip]
	mov	DWORD PTR [rdx+rax], 0
	add	DWORD PTR -4[rbp], 1
.L41:
	cmp	DWORD PTR -4[rbp], 22
	jle	.L42
	mov	DWORD PTR -4[rbp], 0
	jmp	.L43
.L44:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, accumc[rip]
	mov	DWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, accumd[rip]
	mov	DWORD PTR [rdx+rax], 0
	add	DWORD PTR -4[rbp], 1
.L43:
	cmp	DWORD PTR -4[rbp], 10
	jle	.L44
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	reset, .-reset
	.globl	filtez
	.type	filtez, @function
filtez:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r12
	push	rbx
	.cfi_offset 12, -24
	.cfi_offset 3, -32
	mov	rax, rdi
	mov	rdx, rsi
	mov	rcx, rax
	lea	rax, 4[rcx]
	mov	ecx, DWORD PTR [rcx]
	movsx	rsi, ecx
	mov	rcx, rdx
	lea	rdx, 4[rcx]
	mov	ecx, DWORD PTR [rcx]
	movsx	rcx, ecx
	mov	rbx, rsi
	imul	rbx, rcx
	mov	r12d, 1
	jmp	.L47
.L48:
	mov	rcx, rax
	lea	rax, 4[rcx]
	mov	ecx, DWORD PTR [rcx]
	movsx	rsi, ecx
	mov	rcx, rdx
	lea	rdx, 4[rcx]
	mov	ecx, DWORD PTR [rcx]
	movsx	rcx, ecx
	imul	rcx, rsi
	add	rbx, rcx
	add	r12d, 1
.L47:
	cmp	r12d, 5
	jle	.L48
	mov	rax, rbx
	sar	rax, 14
	pop	rbx
	pop	r12
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	filtez, .-filtez
	.globl	filtep
	.type	filtep, @function
filtep:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r12
	push	rbx
	.cfi_offset 12, -24
	.cfi_offset 3, -32
	mov	eax, ecx
	lea	ecx, [rdi+rdi]
	movsx	rbx, ecx
	movsx	rcx, esi
	imul	rbx, rcx
	add	edx, edx
	movsx	r12, edx
	cdqe
	imul	rax, r12
	add	rbx, rax
	mov	rax, rbx
	sar	rax, 15
	pop	rbx
	pop	r12
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	filtep, .-filtep
	.globl	quantl
	.type	quantl, @function
quantl:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r13
	push	r12
	push	rbx
	sub	rsp, 8
	.cfi_offset 13, -24
	.cfi_offset 12, -32
	.cfi_offset 3, -40
	mov	DWORD PTR -28[rbp], edi
	mov	DWORD PTR -32[rbp], esi
	mov	eax, DWORD PTR -28[rbp]
	mov	edi, eax
	call	my_abs
	movsx	r12, eax
	mov	ebx, 0
	jmp	.L53
.L56:
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, decis_levl[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movsx	rdx, eax
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	imul	rax, rdx
	sar	rax, 15
	mov	r13, rax
	cmp	r12, r13
	jle	.L60
	add	ebx, 1
.L53:
	cmp	ebx, 29
	jle	.L56
	jmp	.L55
.L60:
	nop
.L55:
	cmp	DWORD PTR -28[rbp], 0
	js	.L57
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, quant26bt_pos[rip]
	mov	ebx, DWORD PTR [rdx+rax]
	jmp	.L58
.L57:
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, quant26bt_neg[rip]
	mov	ebx, DWORD PTR [rdx+rax]
.L58:
	mov	eax, ebx
	add	rsp, 8
	pop	rbx
	pop	r12
	pop	r13
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	quantl, .-quantl
	.globl	logscl
	.type	logscl, @function
logscl:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	.cfi_offset 3, -24
	mov	DWORD PTR -12[rbp], edi
	mov	DWORD PTR -16[rbp], esi
	mov	eax, DWORD PTR -16[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 7
	sub	rax, rdx
	sar	rax, 7
	mov	rbx, rax
	mov	ecx, ebx
	mov	eax, DWORD PTR -12[rbp]
	sar	eax, 2
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, wl_code_table[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	eax, ecx
	mov	DWORD PTR -16[rbp], eax
	cmp	DWORD PTR -16[rbp], 0
	jns	.L62
	mov	DWORD PTR -16[rbp], 0
.L62:
	cmp	DWORD PTR -16[rbp], 18432
	jle	.L63
	mov	DWORD PTR -16[rbp], 18432
.L63:
	mov	eax, DWORD PTR -16[rbp]
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	logscl, .-logscl
	.globl	scalel
	.type	scalel, @function
scalel:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r12
	push	rbx
	.cfi_offset 12, -24
	.cfi_offset 3, -32
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	eax, DWORD PTR -20[rbp]
	sar	eax, 6
	and	eax, 31
	mov	ebx, eax
	mov	eax, DWORD PTR -20[rbp]
	sar	eax, 11
	mov	r12d, eax
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, ilb_table[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -24[rbp]
	add	eax, 1
	sub	eax, r12d
	mov	ecx, eax
	sar	edx, cl
	mov	ebx, edx
	lea	eax, 0[0+rbx*8]
	pop	rbx
	pop	r12
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	scalel, .-scalel
	.globl	upzero
	.type	upzero, @function
upzero:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r13
	push	r12
	push	rbx
	.cfi_offset 13, -24
	.cfi_offset 12, -32
	.cfi_offset 3, -40
	mov	DWORD PTR -28[rbp], edi
	mov	QWORD PTR -40[rbp], rsi
	mov	QWORD PTR -48[rbp], rdx
	cmp	DWORD PTR -28[rbp], 0
	jne	.L68
	mov	ebx, 0
	jmp	.L69
.L70:
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -48[rbp]
	add	rax, rdx
	mov	edx, DWORD PTR [rax]
	mov	eax, edx
	sal	eax, 8
	sub	eax, edx
	mov	ecx, eax
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -48[rbp]
	add	rax, rdx
	sar	ecx, 8
	mov	edx, ecx
	mov	DWORD PTR [rax], edx
	add	ebx, 1
.L69:
	cmp	ebx, 5
	jle	.L70
	jmp	.L71
.L68:
	mov	ebx, 0
	jmp	.L72
.L75:
	mov	eax, DWORD PTR -28[rbp]
	movsx	rdx, eax
	movsx	rax, ebx
	lea	rcx, 0[0+rax*4]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rcx
	mov	eax, DWORD PTR [rax]
	cdqe
	imul	rax, rdx
	test	rax, rax
	js	.L73
	mov	r13d, 128
	jmp	.L74
.L73:
	mov	r13d, -128
.L74:
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -48[rbp]
	add	rax, rdx
	mov	edx, DWORD PTR [rax]
	mov	eax, edx
	sal	eax, 8
	sub	eax, edx
	sar	eax, 8
	mov	r12d, eax
	movsx	rax, ebx
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -48[rbp]
	add	rax, rdx
	lea	edx, 0[r13+r12]
	mov	DWORD PTR [rax], edx
	add	ebx, 1
.L72:
	cmp	ebx, 5
	jle	.L75
.L71:
	mov	rax, QWORD PTR -40[rbp]
	lea	rdx, 20[rax]
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 16[rax]
	mov	DWORD PTR [rdx], eax
	mov	rax, QWORD PTR -40[rbp]
	lea	rdx, 16[rax]
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 12[rax]
	mov	DWORD PTR [rdx], eax
	mov	rax, QWORD PTR -40[rbp]
	lea	rdx, 12[rax]
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 8[rax]
	mov	DWORD PTR [rdx], eax
	mov	rax, QWORD PTR -40[rbp]
	lea	rdx, 4[rax]
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR [rdx], eax
	mov	rax, QWORD PTR -40[rbp]
	mov	edx, DWORD PTR -28[rbp]
	mov	DWORD PTR [rax], edx
	nop
	pop	rbx
	pop	r12
	pop	r13
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	upzero, .-upzero
	.globl	uppol2
	.type	uppol2, @function
uppol2:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	.cfi_offset 3, -24
	mov	DWORD PTR -12[rbp], edi
	mov	DWORD PTR -16[rbp], esi
	mov	DWORD PTR -20[rbp], edx
	mov	DWORD PTR -24[rbp], ecx
	mov	DWORD PTR -28[rbp], r8d
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	lea	rbx, 0[0+rax*4]
	mov	eax, DWORD PTR -20[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -24[rbp]
	cdqe
	imul	rax, rdx
	test	rax, rax
	js	.L78
	neg	rbx
.L78:
	sar	rbx, 7
	mov	eax, DWORD PTR -20[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	imul	rax, rdx
	test	rax, rax
	js	.L79
	sub	rbx, -128
	jmp	.L80
.L79:
	add	rbx, -128
.L80:
	mov	eax, DWORD PTR -16[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 7
	sub	rax, rdx
	sar	rax, 7
	mov	edx, eax
	mov	eax, ebx
	add	eax, edx
	mov	ebx, eax
	cmp	ebx, 12288
	jle	.L81
	mov	ebx, 12288
.L81:
	cmp	ebx, -12288
	jge	.L82
	mov	ebx, -12288
.L82:
	mov	eax, ebx
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	uppol2, .-uppol2
	.globl	uppol1
	.type	uppol1, @function
uppol1:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	DWORD PTR -28[rbp], edx
	mov	DWORD PTR -32[rbp], ecx
	mov	eax, DWORD PTR -20[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 8
	sub	rax, rdx
	sar	rax, 8
	mov	QWORD PTR -8[rbp], rax
	mov	eax, DWORD PTR -28[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	imul	rax, rdx
	test	rax, rax
	js	.L85
	mov	rax, QWORD PTR -8[rbp]
	add	eax, 192
	mov	DWORD PTR -16[rbp], eax
	jmp	.L86
.L85:
	mov	rax, QWORD PTR -8[rbp]
	sub	eax, 192
	mov	DWORD PTR -16[rbp], eax
.L86:
	mov	eax, 15360
	sub	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	cmp	eax, DWORD PTR -12[rbp]
	jle	.L87
	mov	eax, DWORD PTR -12[rbp]
	mov	DWORD PTR -16[rbp], eax
.L87:
	mov	eax, DWORD PTR -12[rbp]
	neg	eax
	cmp	DWORD PTR -16[rbp], eax
	jge	.L88
	mov	eax, DWORD PTR -12[rbp]
	neg	eax
	mov	DWORD PTR -16[rbp], eax
.L88:
	mov	eax, DWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	uppol1, .-uppol1
	.globl	logsch
	.type	logsch, @function
logsch:
.LFB16:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	eax, DWORD PTR -24[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 7
	sub	rax, rdx
	sar	rax, 7
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, wh_code_table[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -4[rbp]
	add	eax, edx
	mov	DWORD PTR -24[rbp], eax
	cmp	DWORD PTR -24[rbp], 0
	jns	.L91
	mov	DWORD PTR -24[rbp], 0
.L91:
	cmp	DWORD PTR -24[rbp], 22528
	jle	.L92
	mov	DWORD PTR -24[rbp], 22528
.L92:
	mov	eax, DWORD PTR -24[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE16:
	.size	logsch, .-logsch
	.globl	main
	.type	main, @function
main:
.LFB17:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r13
	push	r12
	push	rbx
	sub	rsp, 88
	.cfi_offset 13, -24
	.cfi_offset 12, -32
	.cfi_offset 3, -40
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -40[rbp], rax
	xor	eax, eax
	mov	eax, 0
	call	initialize_global
	mov	eax, 0
	call	reset
	mov	r12d, 10
	mov	r13d, 2000
	mov	ebx, 0
	jmp	.L95
.L96:
	mov	eax, r13d
	imul	eax, ebx
	imul	eax, eax, 3141
	mov	edi, eax
	call	my_cos
	imul	eax, r12d
	mov	edx, eax
	movsx	rax, ebx
	mov	DWORD PTR -96[rbp+rax*4], edx
	add	ebx, 1
.L95:
	cmp	ebx, 2
	jle	.L96
	mov	ebx, 0
	jmp	.L97
.L98:
	lea	eax, 1[rbx]
	cdqe
	mov	edx, DWORD PTR -96[rbp+rax*4]
	movsx	rax, ebx
	mov	eax, DWORD PTR -96[rbp+rax*4]
	mov	ecx, ebx
	shr	ecx, 31
	add	ecx, ebx
	sar	ecx
	mov	r12d, ecx
	mov	esi, edx
	mov	edi, eax
	call	encode
	movsx	rdx, r12d
	mov	DWORD PTR -108[rbp+rdx*4], eax
	add	ebx, 2
.L97:
	cmp	ebx, 3
	jle	.L98
	mov	ebx, 0
	jmp	.L99
.L100:
	mov	eax, ebx
	shr	eax, 31
	add	eax, ebx
	sar	eax
	cdqe
	mov	eax, DWORD PTR -108[rbp+rax*4]
	mov	edi, eax
	call	decode
	mov	edx, DWORD PTR xout1[rip]
	movsx	rax, ebx
	mov	DWORD PTR -64[rbp+rax*4], edx
	lea	eax, 1[rbx]
	mov	edx, DWORD PTR xout2[rip]
	cdqe
	mov	DWORD PTR -64[rbp+rax*4], edx
	add	ebx, 2
.L99:
	cmp	ebx, 3
	jle	.L100
	movsx	rax, ebx
	mov	edx, DWORD PTR -64[rbp+rax*4]
	lea	eax, 1[rbx]
	cdqe
	mov	eax, DWORD PTR -64[rbp+rax*4]
	add	eax, edx
	mov	rsi, QWORD PTR -40[rbp]
	sub	rsi, QWORD PTR fs:40
	je	.L102
	call	__stack_chk_fail@PLT
.L102:
	add	rsp, 88
	pop	rbx
	pop	r12
	pop	r13
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE17:
	.size	main, .-main
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"92325193.c"
	.text
	.comm	tqmf,96,4
	.comm	h_tmp,96,4
	.comm	xl,4,4
	.comm	xh,4,4
	.comm	accumc,44,4
	.comm	accumd,44,4
	.comm	xout1,4,4
	.comm	xout2,4,4
	.comm	xs,4,4
	.comm	xd,4,4
	.comm	il,4,4
	.comm	szl,4,4
	.comm	spl,4,4
	.comm	sl,4,4
	.comm	el,4,4
	.comm	qq4_code4_table,64,4
	.comm	qq5_code5_table,128,4
	.comm	qq6_code6_table,256,4
	.comm	delay_bpl,24,4
	.comm	delay_dltx,24,4
	.comm	wl_code_table,64,4
	.comm	wl_table,32,4
	.comm	ilb_table,128,4
	.comm	nbl,4,4
	.comm	al1,4,4
	.comm	al2,4,4
	.comm	plt,4,4
	.comm	plt_tmp_1,4,4
	.comm	plt_tmp_2,4,4
	.comm	rs,4,4
	.comm	dlt,4,4
	.comm	rlt,4,4
	.comm	rlt_tmp_1,4,4
	.comm	rlt_tmp_2,4,4
	.comm	decis_levl,120,4
	.comm	detl,4,4
	.comm	quant26bt_pos,124,4
	.comm	quant26bt_neg,124,4
	.comm	deth,4,4
	.comm	sh,4,4
	.comm	eh,4,4
	.comm	qq2_code2_table,16,4
	.comm	wh_code_table,16,4
	.comm	dh,4,4
	.comm	ih,4,4
	.comm	nbh,4,4
	.comm	szh,4,4
	.comm	sph,4,4
	.comm	ph,4,4
	.comm	yh,4,4
	.comm	rh,4,4
	.comm	delay_dhx,24,4
	.comm	delay_bph,24,4
	.comm	ah_tmp_1,4,4
	.comm	ah_tmp_2,4,4
	.comm	ph_tmp_1,4,4
	.comm	ph_tmp_2,4,4
	.comm	rh_tmp_1,4,4
	.comm	rh_tmp_2,4,4
	.comm	ilr,4,4
	.comm	yl,4,4
	.comm	rl,4,4
	.comm	dec_deth,4,4
	.comm	dec_detl,4,4
	.comm	dec_dlt,4,4
	.comm	dec_del_bpl,24,4
	.comm	dec_del_dltx,24,4
	.comm	dec_plt,4,4
	.comm	dec_plt_tmp_1,4,4
	.comm	dec_plt_tmp_2,4,4
	.comm	dec_szl,4,4
	.comm	dec_spl,4,4
	.comm	dec_sl,4,4
	.comm	dec_rlt_tmp_1,4,4
	.comm	dec_rlt_tmp_2,4,4
	.comm	dec_rlt,4,4
	.comm	dec_al1,4,4
	.comm	dec_al2,4,4
	.comm	dl,4,4
	.comm	dec_nbl,4,4
	.comm	dec_yh,4,4
	.comm	dec_dh,4,4
	.comm	dec_nbh,4,4
	.comm	dec_del_bph,24,4
	.comm	dec_del_dhx,24,4
	.comm	dec_szh,4,4
	.comm	dec_rh_tmp_1,4,4
	.comm	dec_rh_tmp_2,4,4
	.comm	dec_ah_tmp_1,4,4
	.comm	dec_ah_tmp_2,4,4
	.comm	dec_ph,4,4
	.comm	dec_sph,4,4
	.comm	dec_sh,4,4
	.comm	dec_rh,4,4
	.comm	dec_ph_tmp_1,4,4
	.comm	dec_ph_tmp_2,4,4
	.align	2
	.global	initialize_global
	.syntax unified
	.arm
	.fpu softvfp
	.type	initialize_global, %function
initialize_global:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L3
	mov	r2, #12
	str	r2, [r3]
	ldr	r3, .L3
	mvn	r2, #43
	str	r2, [r3, #4]
	ldr	r3, .L3
	mvn	r2, #43
	str	r2, [r3, #8]
	ldr	r3, .L3
	mov	r2, #212
	str	r2, [r3, #12]
	ldr	r3, .L3
	mov	r2, #48
	str	r2, [r3, #16]
	ldr	r3, .L3
	ldr	r2, .L3+4
	str	r2, [r3, #20]
	ldr	r3, .L3
	mov	r2, #128
	str	r2, [r3, #24]
	ldr	r3, .L3
	ldr	r2, .L3+8
	str	r2, [r3, #28]
	ldr	r3, .L3
	ldr	r2, .L3+12
	str	r2, [r3, #32]
	ldr	r3, .L3
	ldr	r2, .L3+16
	str	r2, [r3, #36]
	ldr	r3, .L3
	ldr	r2, .L3+20
	str	r2, [r3, #40]
	ldr	r3, .L3
	ldr	r2, .L3+24
	str	r2, [r3, #44]
	ldr	r3, .L3
	ldr	r2, .L3+24
	str	r2, [r3, #48]
	ldr	r3, .L3
	ldr	r2, .L3+20
	str	r2, [r3, #52]
	ldr	r3, .L3
	ldr	r2, .L3+16
	str	r2, [r3, #56]
	ldr	r3, .L3
	ldr	r2, .L3+12
	str	r2, [r3, #60]
	ldr	r3, .L3
	ldr	r2, .L3+8
	str	r2, [r3, #64]
	ldr	r3, .L3
	mov	r2, #128
	str	r2, [r3, #68]
	ldr	r3, .L3
	ldr	r2, .L3+4
	str	r2, [r3, #72]
	ldr	r3, .L3
	mov	r2, #48
	str	r2, [r3, #76]
	ldr	r3, .L3
	mov	r2, #212
	str	r2, [r3, #80]
	ldr	r3, .L3
	mvn	r2, #43
	str	r2, [r3, #84]
	ldr	r3, .L3
	mvn	r2, #43
	str	r2, [r3, #88]
	ldr	r3, .L3
	mov	r2, #12
	str	r2, [r3, #92]
	ldr	r3, .L3+28
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L3+28
	ldr	r2, .L3+32
	str	r2, [r3, #4]
	ldr	r3, .L3+28
	ldr	r2, .L3+36
	str	r2, [r3, #8]
	ldr	r3, .L3+28
	ldr	r2, .L3+40
	str	r2, [r3, #12]
	ldr	r3, .L3+28
	ldr	r2, .L3+44
	str	r2, [r3, #16]
	ldr	r3, .L3+28
	ldr	r2, .L3+48
	str	r2, [r3, #20]
	ldr	r3, .L3+28
	ldr	r2, .L3+52
	str	r2, [r3, #24]
	ldr	r3, .L3+28
	ldr	r2, .L3+56
	str	r2, [r3, #28]
	ldr	r3, .L3+28
	ldr	r2, .L3+60
	str	r2, [r3, #32]
	ldr	r3, .L3+28
	ldr	r2, .L3+64
	str	r2, [r3, #36]
	ldr	r3, .L3+28
	ldr	r2, .L3+68
	str	r2, [r3, #40]
	ldr	r3, .L3+28
	ldr	r2, .L3+72
	str	r2, [r3, #44]
	ldr	r3, .L3+28
	ldr	r2, .L3+76
	str	r2, [r3, #48]
	ldr	r3, .L3+28
	ldr	r2, .L3+80
	str	r2, [r3, #52]
	ldr	r3, .L3+28
	mov	r2, #1200
	str	r2, [r3, #56]
	ldr	r3, .L3+28
	mov	r2, #0
	str	r2, [r3, #60]
	ldr	r3, .L3+84
	ldr	r2, .L3+88
	str	r2, [r3]
	ldr	r3, .L3+84
	ldr	r2, .L3+88
	str	r2, [r3, #4]
	ldr	r3, .L3+84
	ldr	r2, .L3+92
	str	r2, [r3, #8]
	ldr	r3, .L3+84
	ldr	r2, .L3+96
	str	r2, [r3, #12]
	ldr	r3, .L3+84
	ldr	r2, .L3+100
	str	r2, [r3, #16]
	ldr	r3, .L3+84
	ldr	r2, .L3+104
	str	r2, [r3, #20]
	ldr	r3, .L3+84
	ldr	r2, .L3+108
	str	r2, [r3, #24]
	ldr	r3, .L3+84
	ldr	r2, .L3+112
	str	r2, [r3, #28]
	ldr	r3, .L3+84
	ldr	r2, .L3+116
	str	r2, [r3, #32]
	ldr	r3, .L3+84
	ldr	r2, .L3+120
	str	r2, [r3, #36]
	ldr	r3, .L3+84
	ldr	r2, .L3+124
	str	r2, [r3, #40]
	ldr	r3, .L3+84
	ldr	r2, .L3+128
	str	r2, [r3, #44]
	ldr	r3, .L3+84
	ldr	r2, .L3+132
	str	r2, [r3, #48]
	ldr	r3, .L3+84
	ldr	r2, .L3+136
	str	r2, [r3, #52]
	ldr	r3, .L3+84
	ldr	r2, .L3+140
	str	r2, [r3, #56]
	ldr	r3, .L3+84
	ldr	r2, .L3+144
	str	r2, [r3, #60]
	ldr	r3, .L3+84
	ldr	r2, .L3+148
	str	r2, [r3, #64]
	ldr	r3, .L3+84
	ldr	r2, .L3+152
	str	r2, [r3, #68]
	ldr	r3, .L3+84
	ldr	r2, .L3+156
	str	r2, [r3, #72]
	ldr	r3, .L3+84
	ldr	r2, .L3+160
	str	r2, [r3, #76]
	ldr	r3, .L3+84
	ldr	r2, .L3+164
	str	r2, [r3, #80]
	ldr	r3, .L3+84
	ldr	r2, .L3+168
	str	r2, [r3, #84]
	ldr	r3, .L3+84
	ldr	r2, .L3+172
	str	r2, [r3, #88]
	ldr	r3, .L3+84
	ldr	r2, .L3+176
	str	r2, [r3, #92]
	ldr	r3, .L3+84
	ldr	r2, .L3+180
	str	r2, [r3, #96]
	ldr	r3, .L3+84
	ldr	r2, .L3+184
	str	r2, [r3, #100]
	ldr	r3, .L3+84
	mov	r2, #2960
	str	r2, [r3, #104]
	ldr	r3, .L3+84
	mov	r2, #2208
	str	r2, [r3, #108]
	ldr	r3, .L3+84
	mov	r2, #1520
	str	r2, [r3, #112]
	ldr	r3, .L3+84
	mov	r2, #880
	str	r2, [r3, #116]
	ldr	r3, .L3+84
	mov	r2, #280
	str	r2, [r3, #120]
	ldr	r3, .L3+84
	ldr	r2, .L3+88
	str	r2, [r3, #124]
	ldr	r3, .L3+188
	mvn	r2, #135
	str	r2, [r3]
	ldr	r3, .L3+188
	mvn	r2, #135
	str	r2, [r3, #4]
	ldr	r3, .L3+188
	mvn	r2, #135
	str	r2, [r3, #8]
	ldr	r3, .L3+188
	mvn	r2, #135
	str	r2, [r3, #12]
	ldr	r3, .L3+188
	ldr	r2, .L3+192
	str	r2, [r3, #16]
	ldr	r3, .L3+188
	ldr	r2, .L3+196
	str	r2, [r3, #20]
	ldr	r3, .L3+188
	ldr	r2, .L3+200
	str	r2, [r3, #24]
	ldr	r3, .L3+188
	ldr	r2, .L3+204
	str	r2, [r3, #28]
	ldr	r3, .L3+188
	ldr	r2, .L3+208
	str	r2, [r3, #32]
	ldr	r3, .L3+188
	ldr	r2, .L3+212
	str	r2, [r3, #36]
	ldr	r3, .L3+188
	ldr	r2, .L3+216
	str	r2, [r3, #40]
	ldr	r3, .L3+188
	ldr	r2, .L3+220
	str	r2, [r3, #44]
	ldr	r3, .L3+188
	ldr	r2, .L3+224
	str	r2, [r3, #48]
	ldr	r3, .L3+188
	ldr	r2, .L3+228
	str	r2, [r3, #52]
	ldr	r3, .L3+188
	ldr	r2, .L3+232
	str	r2, [r3, #56]
	ldr	r3, .L3+188
	ldr	r2, .L3+236
	str	r2, [r3, #60]
	ldr	r3, .L3+188
	ldr	r2, .L3+240
	str	r2, [r3, #64]
	ldr	r3, .L3+188
	ldr	r2, .L3+244
	str	r2, [r3, #68]
	ldr	r3, .L3+188
	ldr	r2, .L3+248
	str	r2, [r3, #72]
	ldr	r3, .L3+188
	ldr	r2, .L3+252
	str	r2, [r3, #76]
	ldr	r3, .L3+188
	ldr	r2, .L3+256
	str	r2, [r3, #80]
	ldr	r3, .L3+188
	ldr	r2, .L3+260
	str	r2, [r3, #84]
	ldr	r3, .L3+188
	ldr	r2, .L3+264
	str	r2, [r3, #88]
	ldr	r3, .L3+188
	ldr	r2, .L3+268
	str	r2, [r3, #92]
	ldr	r3, .L3+188
	ldr	r2, .L3+272
	str	r2, [r3, #96]
	ldr	r3, .L3+188
	ldr	r2, .L3+276
	str	r2, [r3, #100]
	ldr	r3, .L3+188
	ldr	r2, .L3+280
	str	r2, [r3, #104]
	ldr	r3, .L3+188
	ldr	r2, .L3+284
	str	r2, [r3, #108]
	ldr	r3, .L3+188
	ldr	r2, .L3+288
	str	r2, [r3, #112]
	ldr	r3, .L3+188
	ldr	r2, .L3+292
	str	r2, [r3, #116]
	ldr	r3, .L3+188
	ldr	r2, .L3+296
	str	r2, [r3, #120]
	ldr	r3, .L3+188
	ldr	r2, .L3+300
	str	r2, [r3, #124]
	ldr	r3, .L3+188
	ldr	r2, .L3+304
	str	r2, [r3, #128]
	ldr	r3, .L3+188
	ldr	r2, .L3+308
	str	r2, [r3, #132]
	ldr	r3, .L3+188
	ldr	r2, .L3+312
	str	r2, [r3, #136]
	ldr	r3, .L3+188
	ldr	r2, .L3+316
	str	r2, [r3, #140]
	ldr	r3, .L3+188
	ldr	r2, .L3+320
	str	r2, [r3, #144]
	ldr	r3, .L3+188
	ldr	r2, .L3+324
	str	r2, [r3, #148]
	ldr	r3, .L3+188
	ldr	r2, .L3+328
	str	r2, [r3, #152]
	ldr	r3, .L3+188
	ldr	r2, .L3+332
	str	r2, [r3, #156]
	ldr	r3, .L3+188
	ldr	r2, .L3+336
	str	r2, [r3, #160]
	ldr	r3, .L3+188
	ldr	r2, .L3+340
	str	r2, [r3, #164]
	ldr	r3, .L3+188
	mov	r2, #8576
	str	r2, [r3, #168]
	ldr	r3, .L3+188
	ldr	r2, .L3+344
	str	r2, [r3, #172]
	ldr	r3, .L3+188
	ldr	r2, .L3+348
	str	r2, [r3, #176]
	ldr	r3, .L3+188
	ldr	r2, .L3+352
	str	r2, [r3, #180]
	ldr	r3, .L3+188
	ldr	r2, .L3+356
	str	r2, [r3, #184]
	ldr	r3, .L3+188
	ldr	r2, .L3+360
	str	r2, [r3, #188]
	ldr	r3, .L3+188
	ldr	r2, .L3+364
	str	r2, [r3, #192]
	ldr	r3, .L3+188
	ldr	r2, .L3+368
	str	r2, [r3, #196]
	ldr	r3, .L3+188
	ldr	r2, .L3+372
	str	r2, [r3, #200]
	ldr	r3, .L3+188
	ldr	r2, .L3+376
	str	r2, [r3, #204]
	ldr	r3, .L3+188
	mov	r2, #3168
	str	r2, [r3, #208]
	ldr	r3, .L3+188
	ldr	r2, .L3+380
	str	r2, [r3, #212]
	ldr	r3, .L3+188
	mov	r2, #2400
	str	r2, [r3, #216]
	ldr	r3, .L3+188
	mov	r2, #2032
	str	r2, [r3, #220]
	ldr	r3, .L3+188
	ldr	r2, .L3+384
	str	r2, [r3, #224]
	ldr	r3, .L3+188
	mov	r2, #1360
	str	r2, [r3, #228]
	ldr	r3, .L3+188
	mov	r2, #1040
	str	r2, [r3, #232]
	ldr	r3, .L3+188
	mov	r2, #728
	str	r2, [r3, #236]
	ldr	r3, .L3+188
	mov	r2, #432
	str	r2, [r3, #240]
	ldr	r3, .L3+188
	mov	r2, #136
	str	r2, [r3, #244]
	ldr	r3, .L3+188
	ldr	r2, .L3+388
	str	r2, [r3, #248]
	ldr	r3, .L3+188
	mvn	r2, #135
	str	r2, [r3, #252]
	ldr	r3, .L3+392
	mvn	r2, #59
	str	r2, [r3]
	ldr	r3, .L3+392
	ldr	r2, .L3+396
	str	r2, [r3, #4]
	ldr	r3, .L3+392
	ldr	r2, .L3+400
	str	r2, [r3, #8]
	ldr	r3, .L3+392
	ldr	r2, .L3+404
	str	r2, [r3, #12]
	ldr	r3, .L3+392
	ldr	r2, .L3+408
	str	r2, [r3, #16]
	ldr	r3, .L3+392
	mov	r2, #172
	str	r2, [r3, #20]
	ldr	r3, .L3+392
	mov	r2, #58
	str	r2, [r3, #24]
	ldr	r3, .L3+392
	mvn	r2, #29
	str	r2, [r3, #28]
	ldr	r3, .L3+392
	ldr	r2, .L3+396
	str	r2, [r3, #32]
	ldr	r3, .L3+392
	ldr	r2, .L3+400
	str	r2, [r3, #36]
	ldr	r3, .L3+392
	ldr	r2, .L3+404
	str	r2, [r3, #40]
	ldr	r3, .L3+392
	ldr	r2, .L3+408
	str	r2, [r3, #44]
	ldr	r3, .L3+392
	mov	r2, #172
	str	r2, [r3, #48]
	ldr	r3, .L3+392
	mov	r2, #58
	str	r2, [r3, #52]
	ldr	r3, .L3+392
	mvn	r2, #29
	str	r2, [r3, #56]
	ldr	r3, .L3+392
	mvn	r2, #59
	str	r2, [r3, #60]
	ldr	r3, .L3+412
	mvn	r2, #59
	str	r2, [r3]
	ldr	r3, .L3+412
	mvn	r2, #29
	str	r2, [r3, #4]
	ldr	r3, .L3+412
	mov	r2, #58
	str	r2, [r3, #8]
	ldr	r3, .L3+412
	mov	r2, #172
	str	r2, [r3, #12]
	ldr	r3, .L3+412
	ldr	r2, .L3+408
	str	r2, [r3, #16]
	ldr	r3, .L3+412
	ldr	r2, .L3+404
	str	r2, [r3, #20]
	ldr	r3, .L3+412
	ldr	r2, .L3+400
	str	r2, [r3, #24]
	ldr	r3, .L3+412
	ldr	r2, .L3+396
	str	r2, [r3, #28]
	ldr	r3, .L3+416
	mov	r2, #2048
	str	r2, [r3]
	ldr	r3, .L3+416
	ldr	r2, .L3+420
	str	r2, [r3, #4]
	ldr	r3, .L3+416
	ldr	r2, .L3+424
	str	r2, [r3, #8]
	ldr	r3, .L3+416
	ldr	r2, .L3+428
	str	r2, [r3, #12]
	ldr	r3, .L3+416
	ldr	r2, .L3+432
	str	r2, [r3, #16]
	ldr	r3, .L3+416
	ldr	r2, .L3+436
	str	r2, [r3, #20]
	ldr	r3, .L3+416
	ldr	r2, .L3+440
	str	r2, [r3, #24]
	ldr	r3, .L3+416
	ldr	r2, .L3+444
	str	r2, [r3, #28]
	ldr	r3, .L3+416
	ldr	r2, .L3+448
	str	r2, [r3, #32]
	ldr	r3, .L3+416
	ldr	r2, .L3+452
	str	r2, [r3, #36]
	ldr	r3, .L3+416
	ldr	r2, .L3+456
	str	r2, [r3, #40]
	ldr	r3, .L3+416
	ldr	r2, .L3+460
	str	r2, [r3, #44]
	ldr	r3, .L3+416
	mov	r2, #2656
	str	r2, [r3, #48]
	ldr	r3, .L3+416
	ldr	r2, .L3+464
	str	r2, [r3, #52]
	ldr	r3, .L3+416
	ldr	r2, .L3+468
	str	r2, [r3, #56]
	ldr	r3, .L3+416
	ldr	r2, .L3+472
	str	r2, [r3, #60]
	ldr	r3, .L3+416
	mov	r2, #2896
	str	r2, [r3, #64]
	ldr	r3, .L3+416
	mov	r2, #2960
	str	r2, [r3, #68]
	ldr	r3, .L3+416
	ldr	r2, .L3+476
	str	r2, [r3, #72]
	ldr	r3, .L3+416
	ldr	r2, .L3+480
	str	r2, [r3, #76]
	ldr	r3, .L3+416
	ldr	r2, .L3+484
	str	r2, [r3, #80]
	ldr	r3, .L3+416
	ldr	r2, .L3+488
	str	r2, [r3, #84]
	ldr	r3, .L3+416
	ldr	r2, .L3+492
	str	r2, [r3, #88]
	ldr	r3, .L3+416
	ldr	r2, .L3+496
	str	r2, [r3, #92]
	ldr	r3, .L3+416
	ldr	r2, .L3+500
	str	r2, [r3, #96]
	ldr	r3, .L3+416
	mov	r2, #3520
	str	r2, [r3, #100]
	ldr	r3, .L3+416
	ldr	r2, .L3+504
	str	r2, [r3, #104]
	ldr	r3, .L3+416
	ldr	r2, .L3+508
	str	r2, [r3, #108]
	ldr	r3, .L3+416
	ldr	r2, .L3+512
	str	r2, [r3, #112]
	ldr	r3, .L3+416
	ldr	r2, .L3+516
	str	r2, [r3, #116]
	ldr	r3, .L3+416
	ldr	r2, .L3+520
	str	r2, [r3, #120]
	ldr	r3, .L3+416
	ldr	r2, .L3+372
	str	r2, [r3, #124]
	ldr	r3, .L3+524
	mov	r2, #280
	str	r2, [r3]
	ldr	r3, .L3+524
	mov	r2, #576
	str	r2, [r3, #4]
	ldr	r3, .L3+524
	mov	r2, #880
	str	r2, [r3, #8]
	ldr	r3, .L3+524
	mov	r2, #1200
	str	r2, [r3, #12]
	ldr	r3, .L3+524
	mov	r2, #1520
	str	r2, [r3, #16]
	ldr	r3, .L3+524
	ldr	r2, .L3+528
	str	r2, [r3, #20]
	ldr	r3, .L3+524
	mov	r2, #2208
	str	r2, [r3, #24]
	ldr	r3, .L3+524
	ldr	r2, .L3+80
	str	r2, [r3, #28]
	ldr	r3, .L3+524
	mov	r2, #2960
	str	r2, [r3, #32]
	ldr	r3, .L3+524
	mov	r2, #3376
	str	r2, [r3, #36]
	ldr	r3, .L3+524
	ldr	r2, .L3+184
	str	r2, [r3, #40]
	ldr	r3, .L3+524
	ldr	r2, .L3+76
	str	r2, [r3, #44]
	ldr	r3, .L3+524
	ldr	r2, .L3+180
	str	r2, [r3, #48]
	ldr	r3, .L3+524
	ldr	r2, .L3+532
	str	r2, [r3, #52]
	ldr	r3, .L3+524
	ldr	r2, .L3+176
	str	r2, [r3, #56]
	ldr	r3, .L3+524
	ldr	r2, .L3+72
	str	r2, [r3, #60]
	ldr	r3, .L3+524
	ldr	r2, .L3+172
	str	r2, [r3, #64]
	ldr	r3, .L3+524
	ldr	r2, .L3+536
	str	r2, [r3, #68]
	ldr	r3, .L3+524
	ldr	r2, .L3+168
	str	r2, [r3, #72]
	ldr	r3, .L3+524
	ldr	r2, .L3+68
	str	r2, [r3, #76]
	ldr	r3, .L3+524
	ldr	r2, .L3+164
	str	r2, [r3, #80]
	ldr	r3, .L3+524
	ldr	r2, .L3+540
	str	r2, [r3, #84]
	ldr	r3, .L3+524
	ldr	r2, .L3+160
	str	r2, [r3, #88]
	ldr	r3, .L3+524
	ldr	r2, .L3+64
	str	r2, [r3, #92]
	ldr	r3, .L3+524
	ldr	r2, .L3+156
	str	r2, [r3, #96]
	ldr	r3, .L3+524
	ldr	r2, .L3+544
	str	r2, [r3, #100]
	ldr	r3, .L3+524
	ldr	r2, .L3+152
	str	r2, [r3, #104]
	ldr	r3, .L3+524
	ldr	r2, .L3+60
	str	r2, [r3, #108]
	ldr	r3, .L3+524
	ldr	r2, .L3+148
	str	r2, [r3, #112]
	ldr	r3, .L3+524
	ldr	r2, .L3+548
	str	r2, [r3, #116]
	ldr	r3, .L3+552
	mov	r2, #61
	str	r2, [r3]
	ldr	r3, .L3+552
	mov	r2, #60
	str	r2, [r3, #4]
	ldr	r3, .L3+552
	mov	r2, #59
	str	r2, [r3, #8]
	ldr	r3, .L3+552
	mov	r2, #58
	str	r2, [r3, #12]
	ldr	r3, .L3+552
	mov	r2, #57
	str	r2, [r3, #16]
	ldr	r3, .L3+552
	mov	r2, #56
	str	r2, [r3, #20]
	ldr	r3, .L3+552
	mov	r2, #55
	str	r2, [r3, #24]
	ldr	r3, .L3+552
	mov	r2, #54
	str	r2, [r3, #28]
	ldr	r3, .L3+552
	mov	r2, #53
	str	r2, [r3, #32]
	ldr	r3, .L3+552
	mov	r2, #52
	str	r2, [r3, #36]
	ldr	r3, .L3+552
	mov	r2, #51
	str	r2, [r3, #40]
	ldr	r3, .L3+552
	mov	r2, #50
	str	r2, [r3, #44]
	ldr	r3, .L3+552
	mov	r2, #49
	str	r2, [r3, #48]
	ldr	r3, .L3+552
	mov	r2, #48
	str	r2, [r3, #52]
	ldr	r3, .L3+552
	mov	r2, #47
	str	r2, [r3, #56]
	ldr	r3, .L3+552
	mov	r2, #46
	str	r2, [r3, #60]
	ldr	r3, .L3+552
	mov	r2, #45
	str	r2, [r3, #64]
	ldr	r3, .L3+552
	mov	r2, #44
	str	r2, [r3, #68]
	ldr	r3, .L3+552
	mov	r2, #43
	str	r2, [r3, #72]
	ldr	r3, .L3+552
	mov	r2, #42
	str	r2, [r3, #76]
	ldr	r3, .L3+552
	mov	r2, #41
	str	r2, [r3, #80]
	ldr	r3, .L3+552
	mov	r2, #40
	str	r2, [r3, #84]
	ldr	r3, .L3+552
	mov	r2, #39
	str	r2, [r3, #88]
	ldr	r3, .L3+552
	mov	r2, #38
	str	r2, [r3, #92]
	ldr	r3, .L3+552
	mov	r2, #37
	str	r2, [r3, #96]
	ldr	r3, .L3+552
	mov	r2, #36
	str	r2, [r3, #100]
	ldr	r3, .L3+552
	mov	r2, #35
	str	r2, [r3, #104]
	ldr	r3, .L3+552
	mov	r2, #34
	str	r2, [r3, #108]
	ldr	r3, .L3+552
	mov	r2, #33
	str	r2, [r3, #112]
	ldr	r3, .L3+552
	mov	r2, #32
	str	r2, [r3, #116]
	ldr	r3, .L3+552
	mov	r2, #32
	str	r2, [r3, #120]
	ldr	r3, .L3+556
	mov	r2, #63
	str	r2, [r3]
	ldr	r3, .L3+556
	mov	r2, #62
	str	r2, [r3, #4]
	ldr	r3, .L3+556
	mov	r2, #31
	str	r2, [r3, #8]
	ldr	r3, .L3+556
	mov	r2, #30
	str	r2, [r3, #12]
	ldr	r3, .L3+556
	mov	r2, #29
	str	r2, [r3, #16]
	ldr	r3, .L3+556
	mov	r2, #28
	str	r2, [r3, #20]
	ldr	r3, .L3+556
	mov	r2, #27
	str	r2, [r3, #24]
	ldr	r3, .L3+556
	mov	r2, #26
	str	r2, [r3, #28]
	ldr	r3, .L3+556
	mov	r2, #25
	str	r2, [r3, #32]
	ldr	r3, .L3+556
	mov	r2, #24
	str	r2, [r3, #36]
	ldr	r3, .L3+556
	mov	r2, #23
	str	r2, [r3, #40]
	ldr	r3, .L3+556
	mov	r2, #22
	str	r2, [r3, #44]
	ldr	r3, .L3+556
	mov	r2, #21
	str	r2, [r3, #48]
	ldr	r3, .L3+556
	mov	r2, #20
	str	r2, [r3, #52]
	ldr	r3, .L3+556
	mov	r2, #19
	str	r2, [r3, #56]
	ldr	r3, .L3+556
	mov	r2, #18
	str	r2, [r3, #60]
	ldr	r3, .L3+556
	mov	r2, #17
	str	r2, [r3, #64]
	ldr	r3, .L3+556
	mov	r2, #16
	str	r2, [r3, #68]
	ldr	r3, .L3+556
	mov	r2, #15
	str	r2, [r3, #72]
	ldr	r3, .L3+556
	mov	r2, #14
	str	r2, [r3, #76]
	ldr	r3, .L3+556
	mov	r2, #13
	str	r2, [r3, #80]
	ldr	r3, .L3+556
	mov	r2, #12
	str	r2, [r3, #84]
	ldr	r3, .L3+556
	mov	r2, #11
	str	r2, [r3, #88]
	ldr	r3, .L3+556
	mov	r2, #10
	str	r2, [r3, #92]
	ldr	r3, .L3+556
	mov	r2, #9
	str	r2, [r3, #96]
	ldr	r3, .L3+556
	mov	r2, #8
	str	r2, [r3, #100]
	ldr	r3, .L3+556
	mov	r2, #7
	str	r2, [r3, #104]
	ldr	r3, .L3+556
	mov	r2, #6
	str	r2, [r3, #108]
	ldr	r3, .L3+556
	mov	r2, #5
	str	r2, [r3, #112]
	ldr	r3, .L3+556
	mov	r2, #4
	str	r2, [r3, #116]
	ldr	r3, .L3+556
	mov	r2, #4
	str	r2, [r3, #120]
	ldr	r3, .L3+560
	ldr	r2, .L3+564
	str	r2, [r3]
	ldr	r3, .L3+560
	ldr	r2, .L3+568
	str	r2, [r3, #4]
	ldr	r3, .L3+560
	ldr	r2, .L3+572
	str	r2, [r3, #8]
	ldr	r3, .L3+560
	mov	r2, #1616
	str	r2, [r3, #12]
	ldr	r3, .L3+576
	ldr	r2, .L3+580
	str	r2, [r3]
	ldr	r3, .L3+576
	mvn	r2, #213
	str	r2, [r3, #4]
	ldr	r3, .L3+576
	ldr	r2, .L3+580
	str	r2, [r3, #8]
	ldr	r3, .L3+576
	mvn	r2, #213
	str	r2, [r3, #12]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L4:
	.align	2
.L3:
	.word	h_tmp
	.word	-624
	.word	1448
	.word	-840
	.word	-3220
	.word	3804
	.word	15504
	.word	qq4_code4_table
	.word	-20456
	.word	-12896
	.word	-8968
	.word	-6288
	.word	-4240
	.word	-2584
	.word	-1200
	.word	20456
	.word	12896
	.word	8968
	.word	6288
	.word	4240
	.word	2584
	.word	qq5_code5_table
	.word	-280
	.word	-23352
	.word	-17560
	.word	-14120
	.word	-11664
	.word	-9752
	.word	-8184
	.word	-6864
	.word	-5712
	.word	-4696
	.word	-3784
	.word	-2960
	.word	-2208
	.word	-1520
	.word	-880
	.word	23352
	.word	17560
	.word	14120
	.word	11664
	.word	9752
	.word	8184
	.word	6864
	.word	5712
	.word	4696
	.word	3784
	.word	qq6_code6_table
	.word	-24808
	.word	-21904
	.word	-19008
	.word	-16704
	.word	-14984
	.word	-13512
	.word	-12280
	.word	-11192
	.word	-10232
	.word	-9360
	.word	-8576
	.word	-7856
	.word	-7192
	.word	-6576
	.word	-6000
	.word	-5456
	.word	-4944
	.word	-4464
	.word	-4008
	.word	-3576
	.word	-3168
	.word	-2776
	.word	-2400
	.word	-2032
	.word	-1688
	.word	-1360
	.word	-1040
	.word	-728
	.word	24808
	.word	21904
	.word	19008
	.word	16704
	.word	14984
	.word	13512
	.word	12280
	.word	11192
	.word	10232
	.word	9360
	.word	7856
	.word	7192
	.word	6576
	.word	6000
	.word	5456
	.word	4944
	.word	4464
	.word	4008
	.word	3576
	.word	2776
	.word	1688
	.word	-432
	.word	wl_code_table
	.word	3042
	.word	1198
	.word	538
	.word	334
	.word	wl_table
	.word	ilb_table
	.word	2093
	.word	2139
	.word	2186
	.word	2233
	.word	2282
	.word	2332
	.word	2383
	.word	2435
	.word	2489
	.word	2543
	.word	2599
	.word	2714
	.word	2774
	.word	2834
	.word	3025
	.word	3091
	.word	3158
	.word	3228
	.word	3298
	.word	3371
	.word	3444
	.word	3597
	.word	3676
	.word	3756
	.word	3838
	.word	3922
	.word	decis_levl
	.word	1864
	.word	5200
	.word	7520
	.word	10712
	.word	15840
	.word	32767
	.word	quant26bt_pos
	.word	quant26bt_neg
	.word	qq2_code2_table
	.word	-7408
	.word	-1616
	.word	7408
	.word	wh_code_table
	.word	798
	.size	initialize_global, .-initialize_global
	.align	2
	.global	my_abs
	.syntax unified
	.arm
	.fpu softvfp
	.type	my_abs, %function
my_abs:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, fp}
	add	fp, sp, #4
	mov	r3, r0
	cmp	r3, #0
	blt	.L6
	mov	r4, r3
	b	.L7
.L6:
	rsb	r4, r3, #0
.L7:
	mov	r3, r4
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{r4, fp}
	bx	lr
	.size	my_abs, .-my_abs
	.align	2
	.global	my_fabs
	.syntax unified
	.arm
	.fpu softvfp
	.type	my_fabs, %function
my_fabs:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, fp}
	add	fp, sp, #4
	mov	r3, r0
	cmp	r3, #0
	blt	.L10
	mov	r4, r3
	b	.L11
.L10:
	rsb	r4, r3, #0
.L11:
	mov	r3, r4
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{r4, fp}
	bx	lr
	.size	my_fabs, .-my_fabs
	.global	__aeabi_idiv
	.align	2
	.global	my_sin
	.syntax unified
	.arm
	.fpu softvfp
	.type	my_sin, %function
my_sin:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	mov	r4, r0
	mov	r7, #0
	mov	r5, #1
	b	.L14
.L15:
	sub	r3, r4, #6272
	sub	r3, r3, #10
	mov	r4, r3
.L14:
	ldr	r3, .L21
	cmp	r4, r3
	bgt	.L15
	b	.L16
.L17:
	add	r3, r4, #6272
	add	r3, r3, #10
	mov	r4, r3
.L16:
	ldr	r3, .L21+4
	cmp	r4, r3
	blt	.L17
	mov	r6, r4
	mov	r7, r6
	mul	r3, r4, r4
	rsb	r3, r3, #0
	mul	r2, r3, r6
	lsl	r3, r5, #1
	add	r3, r3, #1
	mul	r3, r5, r3
	lsl	r3, r3, #1
	mov	r1, r3
	mov	r0, r2
	bl	__aeabi_idiv
	mov	r3, r0
	mov	r6, r3
	add	r7, r7, r6
	add	r5, r5, #1
	mov	r0, r6
	bl	my_fabs
	mov	r8, r0
	b	.L18
.L19:
	mul	r3, r4, r4
	rsb	r3, r3, #0
	mul	r2, r3, r6
	lsl	r3, r5, #1
	add	r3, r3, #1
	mul	r3, r5, r3
	lsl	r3, r3, #1
	mov	r1, r3
	mov	r0, r2
	bl	__aeabi_idiv
	mov	r3, r0
	mov	r6, r3
	add	r7, r7, r6
	add	r5, r5, #1
	mov	r0, r6
	bl	my_fabs
	mov	r8, r0
.L18:
	cmp	r8, #0
	bgt	.L19
	mov	r3, r7
	mov	r0, r3
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L22:
	.align	2
.L21:
	.word	6282
	.word	-6282
	.size	my_sin, .-my_sin
	.align	2
	.global	my_cos
	.syntax unified
	.arm
	.fpu softvfp
	.type	my_cos, %function
my_cos:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	rsb	r3, r3, #1568
	add	r3, r3, #2
	mov	r0, r3
	bl	my_sin
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	my_cos, .-my_cos
	.align	2
	.global	encode
	.syntax unified
	.arm
	.fpu softvfp
	.type	encode, %function
encode:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, fp, lr}
	add	fp, sp, #24
	sub	sp, sp, #12
	ldr	r5, .L34
	ldr	r4, .L34+4
	mov	r3, r4
	add	r4, r3, #4
	ldr	r2, [r3]
	mov	r3, r5
	add	r5, r3, #4
	ldr	r3, [r3]
	mul	r8, r3, r2
	mov	r3, r4
	add	r4, r3, #4
	ldr	r2, [r3]
	mov	r3, r5
	add	r5, r3, #4
	ldr	r3, [r3]
	mul	r7, r3, r2
	mov	r6, #0
	b	.L26
.L27:
	mov	r3, r4
	add	r4, r3, #4
	ldr	r2, [r3]
	mov	r3, r5
	add	r5, r3, #4
	ldr	r3, [r3]
	mul	r3, r2, r3
	add	r8, r8, r3
	mov	r3, r4
	add	r4, r3, #4
	ldr	r2, [r3]
	mov	r3, r5
	add	r5, r3, #4
	ldr	r3, [r3]
	mul	r3, r2, r3
	add	r7, r7, r3
	add	r6, r6, #1
.L26:
	cmp	r6, #9
	ble	.L27
	mov	r3, r4
	add	r4, r3, #4
	ldr	r2, [r3]
	mov	r3, r5
	add	r5, r3, #4
	ldr	r3, [r3]
	mul	r3, r2, r3
	add	r8, r8, r3
	ldr	r2, [r4]
	mov	r3, r5
	add	r5, r3, #4
	ldr	r3, [r3]
	mul	r3, r2, r3
	add	r7, r7, r3
	sub	r5, r4, #8
	mov	r6, #0
	b	.L28
.L29:
	mov	r2, r5
	sub	r5, r2, #4
	mov	r3, r4
	sub	r4, r3, #4
	ldr	r2, [r2]
	str	r2, [r3]
	add	r6, r6, #1
.L28:
	cmp	r6, #21
	ble	.L29
	mov	r3, r4
	sub	r4, r3, #4
	str	r0, [r3]
	str	r1, [r4]
	add	r3, r8, r7
	asr	r3, r3, #15
	ldr	r2, .L34+8
	str	r3, [r2]
	sub	r3, r8, r7
	asr	r3, r3, #15
	ldr	r2, .L34+12
	str	r3, [r2]
	ldr	r1, .L34+16
	ldr	r0, .L34+20
	bl	filtez
	mov	r3, r0
	ldr	r2, .L34+24
	str	r3, [r2]
	ldr	r3, .L34+28
	ldr	r0, [r3]
	ldr	r3, .L34+32
	ldr	r1, [r3]
	ldr	r3, .L34+36
	ldr	r2, [r3]
	ldr	r3, .L34+40
	ldr	r3, [r3]
	bl	filtep
	mov	r3, r0
	ldr	r2, .L34+44
	str	r3, [r2]
	ldr	r3, .L34+24
	ldr	r2, [r3]
	ldr	r3, .L34+44
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L34+48
	str	r3, [r2]
	ldr	r3, .L34+8
	ldr	r2, [r3]
	ldr	r3, .L34+48
	ldr	r3, [r3]
	sub	r3, r2, r3
	ldr	r2, .L34+52
	str	r3, [r2]
	ldr	r3, .L34+52
	ldr	r3, [r3]
	ldr	r2, .L34+56
	ldr	r2, [r2]
	mov	r1, r2
	mov	r0, r3
	bl	quantl
	mov	r3, r0
	ldr	r2, .L34+60
	str	r3, [r2]
	ldr	r3, .L34+60
	ldr	r3, [r3]
	asr	r3, r3, #2
	ldr	r2, .L34+64
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L34+56
	ldr	r2, [r2]
	mul	r3, r2, r3
	asr	r3, r3, #15
	ldr	r2, .L34+68
	str	r3, [r2]
	ldr	r3, .L34+60
	ldr	r3, [r3]
	ldr	r2, .L34+72
	ldr	r2, [r2]
	mov	r1, r2
	mov	r0, r3
	bl	logscl
	mov	r3, r0
	ldr	r2, .L34+72
	str	r3, [r2]
	ldr	r3, .L34+72
	ldr	r3, [r3]
	mov	r1, #8
	mov	r0, r3
	bl	scalel
	mov	r3, r0
	ldr	r2, .L34+56
	str	r3, [r2]
	ldr	r3, .L34+68
	ldr	r2, [r3]
	ldr	r3, .L34+24
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L34+76
	str	r3, [r2]
	ldr	r3, .L34+68
	ldr	r3, [r3]
	ldr	r2, .L34+20
	ldr	r1, .L34+16
	mov	r0, r3
	bl	upzero
	ldr	r3, .L34+32
	ldr	r0, [r3]
	ldr	r3, .L34+40
	ldr	r1, [r3]
	ldr	r3, .L34+76
	ldr	r2, [r3]
	ldr	r3, .L34+80
	ldr	ip, [r3]
	ldr	r3, .L34+84
	ldr	r3, [r3]
	str	r3, [sp]
	mov	r3, ip
	bl	uppol2
	mov	r3, r0
	ldr	r2, .L34+40
	str	r3, [r2]
	ldr	r3, .L34+32
	ldr	r0, [r3]
	ldr	r3, .L34+40
	ldr	r1, [r3]
	ldr	r3, .L34+76
	ldr	r2, [r3]
	ldr	r3, .L34+80
	ldr	r3, [r3]
	bl	uppol1
	mov	r3, r0
	ldr	r2, .L34+32
	str	r3, [r2]
	ldr	r3, .L34+48
	ldr	r2, [r3]
	ldr	r3, .L34+68
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L34+88
	str	r3, [r2]
	ldr	r3, .L34+28
	ldr	r3, [r3]
	ldr	r2, .L34+36
	str	r3, [r2]
	ldr	r3, .L34+88
	ldr	r3, [r3]
	ldr	r2, .L34+28
	str	r3, [r2]
	ldr	r3, .L34+80
	ldr	r3, [r3]
	ldr	r2, .L34+84
	str	r3, [r2]
	ldr	r3, .L34+76
	ldr	r3, [r3]
	ldr	r2, .L34+80
	str	r3, [r2]
	ldr	r1, .L34+92
	ldr	r0, .L34+96
	bl	filtez
	mov	r3, r0
	ldr	r2, .L34+100
	str	r3, [r2]
	ldr	r3, .L34+104
	ldr	r0, [r3]
	ldr	r3, .L34+108
	ldr	r1, [r3]
	ldr	r3, .L34+112
	ldr	r2, [r3]
	ldr	r3, .L34+116
	ldr	r3, [r3]
	bl	filtep
	mov	r3, r0
	ldr	r2, .L34+120
	str	r3, [r2]
	ldr	r3, .L34+120
	ldr	r2, [r3]
	ldr	r3, .L34+100
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L34+124
	str	r3, [r2]
	ldr	r3, .L34+12
	ldr	r2, [r3]
	ldr	r3, .L34+124
	ldr	r3, [r3]
	sub	r3, r2, r3
	ldr	r2, .L34+128
	str	r3, [r2]
	ldr	r3, .L34+128
	ldr	r3, [r3]
	cmp	r3, #0
	blt	.L30
	ldr	r3, .L34+132
	mov	r2, #3
	str	r2, [r3]
	b	.L31
.L30:
	ldr	r3, .L34+132
	mov	r2, #1
	str	r2, [r3]
.L31:
	ldr	r3, .L34+136
	ldr	r3, [r3]
	mov	r2, #564
	mul	r3, r2, r3
	asr	r4, r3, #12
	ldr	r3, .L34+128
	ldr	r3, [r3]
	mov	r0, r3
	bl	my_abs
	mov	r5, r0
	cmp	r5, r4
	ble	.L32
	ldr	r3, .L34+132
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r2, .L34+132
	str	r3, [r2]
.L32:
	ldr	r3, .L34+132
	ldr	r3, [r3]
	ldr	r2, .L34+140
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L34+136
	ldr	r2, [r2]
	mul	r3, r2, r3
	asr	r3, r3, #15
	ldr	r2, .L34+144
	str	r3, [r2]
	ldr	r3, .L34+132
	ldr	r3, [r3]
	ldr	r2, .L34+148
	ldr	r2, [r2]
	mov	r1, r2
	mov	r0, r3
	bl	logsch
	mov	r3, r0
	ldr	r2, .L34+148
	str	r3, [r2]
	ldr	r3, .L34+148
	ldr	r3, [r3]
	mov	r1, #10
	mov	r0, r3
	bl	scalel
	mov	r3, r0
	ldr	r2, .L34+136
	str	r3, [r2]
	ldr	r3, .L34+144
	ldr	r2, [r3]
	ldr	r3, .L34+100
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L34+152
	str	r3, [r2]
	ldr	r3, .L34+144
	ldr	r3, [r3]
	ldr	r2, .L34+96
	ldr	r1, .L34+92
	mov	r0, r3
	bl	upzero
	ldr	r3, .L34+108
	ldr	r0, [r3]
	ldr	r3, .L34+116
	ldr	r1, [r3]
	ldr	r3, .L34+152
	ldr	r2, [r3]
	ldr	r3, .L34+156
	ldr	ip, [r3]
	ldr	r3, .L34+160
	ldr	r3, [r3]
	str	r3, [sp]
	mov	r3, ip
	bl	uppol2
	mov	r3, r0
	ldr	r2, .L34+116
	str	r3, [r2]
	ldr	r3, .L34+108
	ldr	r0, [r3]
	ldr	r3, .L34+116
	ldr	r1, [r3]
	ldr	r3, .L34+152
	ldr	r2, [r3]
	ldr	r3, .L34+156
	ldr	r3, [r3]
	bl	uppol1
	mov	r3, r0
	ldr	r2, .L34+108
	str	r3, [r2]
	ldr	r3, .L34+124
	ldr	r2, [r3]
	ldr	r3, .L34+144
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L34+164
	str	r3, [r2]
	ldr	r3, .L34+104
	ldr	r3, [r3]
	ldr	r2, .L34+112
	str	r3, [r2]
	ldr	r3, .L34+164
	ldr	r3, [r3]
	ldr	r2, .L34+104
	str	r3, [r2]
	ldr	r3, .L34+156
	ldr	r3, [r3]
	ldr	r2, .L34+160
	str	r3, [r2]
	ldr	r3, .L34+152
	ldr	r3, [r3]
	ldr	r2, .L34+156
	str	r3, [r2]
	ldr	r3, .L34+132
	ldr	r3, [r3]
	lsl	r2, r3, #6
	ldr	r3, .L34+60
	ldr	r3, [r3]
	orr	r3, r2, r3
	mov	r0, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, fp, pc}
.L35:
	.align	2
.L34:
	.word	h_tmp
	.word	tqmf
	.word	xl
	.word	xh
	.word	delay_dltx
	.word	delay_bpl
	.word	szl
	.word	rlt_tmp_1
	.word	al1
	.word	rlt_tmp_2
	.word	al2
	.word	spl
	.word	sl
	.word	el
	.word	detl
	.word	il
	.word	qq4_code4_table
	.word	dlt
	.word	nbl
	.word	plt
	.word	plt_tmp_1
	.word	plt_tmp_2
	.word	rlt
	.word	delay_dhx
	.word	delay_bph
	.word	szh
	.word	rh_tmp_1
	.word	ah_tmp_1
	.word	rh_tmp_2
	.word	ah_tmp_2
	.word	sph
	.word	sh
	.word	eh
	.word	ih
	.word	deth
	.word	qq2_code2_table
	.word	dh
	.word	nbh
	.word	ph
	.word	ph_tmp_1
	.word	ph_tmp_2
	.word	yh
	.size	encode, .-encode
	.align	2
	.global	decode
	.syntax unified
	.arm
	.fpu softvfp
	.type	decode, %function
decode:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #8
	mov	r3, r0
	and	r2, r3, #33
	ldr	r1, .L42
	str	r2, [r1]
	asr	r3, r3, #6
	ldr	r2, .L42+4
	str	r3, [r2]
	ldr	r1, .L42+8
	ldr	r0, .L42+12
	bl	filtez
	mov	r3, r0
	ldr	r2, .L42+16
	str	r3, [r2]
	ldr	r3, .L42+20
	ldr	r0, [r3]
	ldr	r3, .L42+24
	ldr	r1, [r3]
	ldr	r3, .L42+28
	ldr	r2, [r3]
	ldr	r3, .L42+32
	ldr	r3, [r3]
	bl	filtep
	mov	r3, r0
	ldr	r2, .L42+36
	str	r3, [r2]
	ldr	r3, .L42+36
	ldr	r2, [r3]
	ldr	r3, .L42+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L42+40
	str	r3, [r2]
	ldr	r3, .L42
	ldr	r3, [r3]
	asr	r3, r3, #2
	ldr	r2, .L42+44
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L42+48
	ldr	r2, [r2]
	mul	r3, r2, r3
	asr	r3, r3, #15
	ldr	r2, .L42+52
	str	r3, [r2]
	ldr	r3, .L42+56
	ldr	r3, [r3]
	ldr	r2, .L42+60
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L42+48
	ldr	r2, [r2]
	mul	r3, r2, r3
	asr	r3, r3, #15
	ldr	r2, .L42+64
	str	r3, [r2]
	ldr	r3, .L42+64
	ldr	r2, [r3]
	ldr	r3, .L42+40
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L42+68
	str	r3, [r2]
	ldr	r3, .L42
	ldr	r3, [r3]
	ldr	r2, .L42+72
	ldr	r2, [r2]
	mov	r1, r2
	mov	r0, r3
	bl	logscl
	mov	r3, r0
	ldr	r2, .L42+72
	str	r3, [r2]
	ldr	r3, .L42+72
	ldr	r3, [r3]
	mov	r1, #8
	mov	r0, r3
	bl	scalel
	mov	r3, r0
	ldr	r2, .L42+48
	str	r3, [r2]
	ldr	r3, .L42+52
	ldr	r2, [r3]
	ldr	r3, .L42+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L42+76
	str	r3, [r2]
	ldr	r3, .L42+52
	ldr	r3, [r3]
	ldr	r2, .L42+12
	ldr	r1, .L42+8
	mov	r0, r3
	bl	upzero
	ldr	r3, .L42+24
	ldr	r0, [r3]
	ldr	r3, .L42+32
	ldr	r1, [r3]
	ldr	r3, .L42+76
	ldr	r2, [r3]
	ldr	r3, .L42+80
	ldr	ip, [r3]
	ldr	r3, .L42+84
	ldr	r3, [r3]
	str	r3, [sp]
	mov	r3, ip
	bl	uppol2
	mov	r3, r0
	ldr	r2, .L42+32
	str	r3, [r2]
	ldr	r3, .L42+24
	ldr	r0, [r3]
	ldr	r3, .L42+32
	ldr	r1, [r3]
	ldr	r3, .L42+76
	ldr	r2, [r3]
	ldr	r3, .L42+80
	ldr	r3, [r3]
	bl	uppol1
	mov	r3, r0
	ldr	r2, .L42+24
	str	r3, [r2]
	ldr	r3, .L42+40
	ldr	r2, [r3]
	ldr	r3, .L42+52
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L42+88
	str	r3, [r2]
	ldr	r3, .L42+20
	ldr	r3, [r3]
	ldr	r2, .L42+28
	str	r3, [r2]
	ldr	r3, .L42+88
	ldr	r3, [r3]
	ldr	r2, .L42+20
	str	r3, [r2]
	ldr	r3, .L42+80
	ldr	r3, [r3]
	ldr	r2, .L42+84
	str	r3, [r2]
	ldr	r3, .L42+76
	ldr	r3, [r3]
	ldr	r2, .L42+80
	str	r3, [r2]
	ldr	r1, .L42+92
	ldr	r0, .L42+96
	bl	filtez
	mov	r3, r0
	ldr	r2, .L42+100
	str	r3, [r2]
	ldr	r3, .L42+104
	ldr	r0, [r3]
	ldr	r3, .L42+108
	ldr	r1, [r3]
	ldr	r3, .L42+112
	ldr	r2, [r3]
	ldr	r3, .L42+116
	ldr	r3, [r3]
	bl	filtep
	mov	r3, r0
	ldr	r2, .L42+120
	str	r3, [r2]
	ldr	r3, .L42+120
	ldr	r2, [r3]
	ldr	r3, .L42+100
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L42+124
	str	r3, [r2]
	ldr	r3, .L42+4
	ldr	r3, [r3]
	ldr	r2, .L42+128
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L42+132
	ldr	r2, [r2]
	mul	r3, r2, r3
	asr	r3, r3, #15
	ldr	r2, .L42+136
	str	r3, [r2]
	ldr	r3, .L42+4
	ldr	r3, [r3]
	ldr	r2, .L42+140
	ldr	r2, [r2]
	mov	r1, r2
	mov	r0, r3
	bl	logsch
	mov	r3, r0
	ldr	r2, .L42+140
	str	r3, [r2]
	ldr	r3, .L42+140
	ldr	r3, [r3]
	mov	r1, #10
	mov	r0, r3
	bl	scalel
	mov	r3, r0
	ldr	r2, .L42+132
	str	r3, [r2]
	ldr	r3, .L42+136
	ldr	r2, [r3]
	ldr	r3, .L42+100
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L42+144
	str	r3, [r2]
	ldr	r3, .L42+136
	ldr	r3, [r3]
	ldr	r2, .L42+96
	ldr	r1, .L42+92
	mov	r0, r3
	bl	upzero
	ldr	r3, .L42+108
	ldr	r0, [r3]
	ldr	r3, .L42+116
	ldr	r1, [r3]
	ldr	r3, .L42+144
	ldr	r2, [r3]
	ldr	r3, .L42+148
	ldr	ip, [r3]
	ldr	r3, .L42+152
	ldr	r3, [r3]
	str	r3, [sp]
	mov	r3, ip
	bl	uppol2
	mov	r3, r0
	ldr	r2, .L42+116
	str	r3, [r2]
	ldr	r3, .L42+108
	ldr	r0, [r3]
	ldr	r3, .L42+116
	ldr	r1, [r3]
	ldr	r3, .L42+144
	ldr	r2, [r3]
	ldr	r3, .L42+148
	ldr	r3, [r3]
	bl	uppol1
	mov	r3, r0
	ldr	r2, .L42+108
	str	r3, [r2]
	ldr	r3, .L42+124
	ldr	r2, [r3]
	ldr	r3, .L42+136
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L42+156
	str	r3, [r2]
	ldr	r3, .L42+104
	ldr	r3, [r3]
	ldr	r2, .L42+112
	str	r3, [r2]
	ldr	r3, .L42+156
	ldr	r3, [r3]
	ldr	r2, .L42+104
	str	r3, [r2]
	ldr	r3, .L42+148
	ldr	r3, [r3]
	ldr	r2, .L42+152
	str	r3, [r2]
	ldr	r3, .L42+144
	ldr	r3, [r3]
	ldr	r2, .L42+148
	str	r3, [r2]
	ldr	r3, .L42+68
	ldr	r2, [r3]
	ldr	r3, .L42+156
	ldr	r3, [r3]
	sub	r3, r2, r3
	ldr	r2, .L42+160
	str	r3, [r2]
	ldr	r3, .L42+68
	ldr	r2, [r3]
	ldr	r3, .L42+156
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L42+164
	str	r3, [r2]
	ldr	r4, .L42+168
	ldr	r7, .L42+172
	ldr	r6, .L42+176
	mov	r3, r4
	add	r4, r3, #4
	ldr	r3, [r3]
	ldr	r2, .L42+160
	ldr	r2, [r2]
	mul	r9, r2, r3
	mov	r3, r4
	add	r4, r3, #4
	ldr	r3, [r3]
	ldr	r2, .L42+164
	ldr	r2, [r2]
	mul	r8, r2, r3
	mov	r5, #0
	b	.L37
.L38:
	mov	r3, r7
	add	r7, r3, #4
	ldr	r2, [r3]
	mov	r3, r4
	add	r4, r3, #4
	ldr	r3, [r3]
	mul	r3, r2, r3
	add	r9, r9, r3
	mov	r3, r6
	add	r6, r3, #4
	ldr	r2, [r3]
	mov	r3, r4
	add	r4, r3, #4
	ldr	r3, [r3]
	mul	r3, r2, r3
	add	r8, r8, r3
	add	r5, r5, #1
.L37:
	cmp	r5, #9
	ble	.L38
	ldr	r2, [r7]
	mov	r3, r4
	add	r4, r3, #4
	ldr	r3, [r3]
	mul	r3, r2, r3
	add	r9, r9, r3
	ldr	r2, [r6]
	mov	r3, r4
	add	r4, r3, #4
	ldr	r3, [r3]
	mul	r3, r2, r3
	add	r8, r8, r3
	asr	r3, r9, #14
	ldr	r2, .L42+180
	str	r3, [r2]
	asr	r3, r8, #14
	ldr	r2, .L42+184
	str	r3, [r2]
	sub	r4, r7, #4
	sub	r8, r6, #4
	mov	r5, #0
	b	.L39
.L40:
	mov	r2, r4
	sub	r4, r2, #4
	mov	r3, r7
	sub	r7, r3, #4
	ldr	r2, [r2]
	str	r2, [r3]
	mov	r2, r8
	sub	r8, r2, #4
	mov	r3, r6
	sub	r6, r3, #4
	ldr	r2, [r2]
	str	r2, [r3]
	add	r5, r5, #1
.L39:
	cmp	r5, #9
	ble	.L40
	ldr	r3, .L42+160
	ldr	r3, [r3]
	str	r3, [r7]
	ldr	r3, .L42+164
	ldr	r3, [r3]
	str	r3, [r6]
	nop
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L43:
	.align	2
.L42:
	.word	ilr
	.word	ih
	.word	dec_del_dltx
	.word	dec_del_bpl
	.word	dec_szl
	.word	dec_rlt_tmp_1
	.word	dec_al1
	.word	dec_rlt_tmp_2
	.word	dec_al2
	.word	dec_spl
	.word	dec_sl
	.word	qq4_code4_table
	.word	dec_detl
	.word	dec_dlt
	.word	il
	.word	qq6_code6_table
	.word	dl
	.word	rl
	.word	dec_nbl
	.word	dec_plt
	.word	dec_plt_tmp_1
	.word	dec_plt_tmp_2
	.word	dec_rlt
	.word	dec_del_dhx
	.word	dec_del_bph
	.word	dec_szh
	.word	dec_rh_tmp_1
	.word	dec_ah_tmp_1
	.word	dec_rh_tmp_2
	.word	dec_ah_tmp_2
	.word	dec_sph
	.word	dec_sh
	.word	qq2_code2_table
	.word	dec_deth
	.word	dec_dh
	.word	dec_nbh
	.word	dec_ph
	.word	dec_ph_tmp_1
	.word	dec_ph_tmp_2
	.word	rh
	.word	xd
	.word	xs
	.word	h_tmp
	.word	accumc
	.word	accumd
	.word	xout1
	.word	xout2
	.size	decode, .-decode
	.align	2
	.global	reset
	.syntax unified
	.arm
	.fpu softvfp
	.type	reset, %function
reset:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	ldr	r3, .L54
	mov	r2, #32
	str	r2, [r3]
	ldr	r3, .L54+4
	mov	r2, #32
	str	r2, [r3]
	ldr	r3, .L54+8
	mov	r2, #8
	str	r2, [r3]
	ldr	r3, .L54+12
	mov	r2, #8
	str	r2, [r3]
	ldr	r3, .L54+16
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L54+20
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L54+24
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L54+28
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L54+32
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L54+36
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L54+40
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L54+44
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L54+48
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L54+52
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L54+56
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L54+60
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L54+64
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L54+68
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L54+72
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L54+76
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L54+80
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L54+84
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L54+88
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L54+92
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L54+96
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L54+100
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L54+104
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L54+108
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L54+112
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L54+116
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L54+120
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L54+124
	mov	r2, #0
	str	r2, [r3]
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L45
.L46:
	ldr	r2, .L54+128
	ldr	r3, [fp, #-8]
	mov	r1, #0
	str	r1, [r2, r3, lsl #2]
	ldr	r2, .L54+132
	ldr	r3, [fp, #-8]
	mov	r1, #0
	str	r1, [r2, r3, lsl #2]
	ldr	r2, .L54+136
	ldr	r3, [fp, #-8]
	mov	r1, #0
	str	r1, [r2, r3, lsl #2]
	ldr	r2, .L54+140
	ldr	r3, [fp, #-8]
	mov	r1, #0
	str	r1, [r2, r3, lsl #2]
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L45:
	ldr	r3, [fp, #-8]
	cmp	r3, #5
	ble	.L46
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L47
.L48:
	ldr	r2, .L54+144
	ldr	r3, [fp, #-8]
	mov	r1, #0
	str	r1, [r2, r3, lsl #2]
	ldr	r2, .L54+148
	ldr	r3, [fp, #-8]
	mov	r1, #0
	str	r1, [r2, r3, lsl #2]
	ldr	r2, .L54+152
	ldr	r3, [fp, #-8]
	mov	r1, #0
	str	r1, [r2, r3, lsl #2]
	ldr	r2, .L54+156
	ldr	r3, [fp, #-8]
	mov	r1, #0
	str	r1, [r2, r3, lsl #2]
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L47:
	ldr	r3, [fp, #-8]
	cmp	r3, #5
	ble	.L48
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L49
.L50:
	ldr	r2, .L54+160
	ldr	r3, [fp, #-8]
	mov	r1, #0
	str	r1, [r2, r3, lsl #2]
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L49:
	ldr	r3, [fp, #-8]
	cmp	r3, #22
	ble	.L50
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L51
.L52:
	ldr	r2, .L54+164
	ldr	r3, [fp, #-8]
	mov	r1, #0
	str	r1, [r2, r3, lsl #2]
	ldr	r2, .L54+168
	ldr	r3, [fp, #-8]
	mov	r1, #0
	str	r1, [r2, r3, lsl #2]
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L51:
	ldr	r3, [fp, #-8]
	cmp	r3, #10
	ble	.L52
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L55:
	.align	2
.L54:
	.word	dec_detl
	.word	detl
	.word	dec_deth
	.word	deth
	.word	rlt_tmp_2
	.word	rlt_tmp_1
	.word	plt_tmp_2
	.word	plt_tmp_1
	.word	al2
	.word	al1
	.word	nbl
	.word	rh_tmp_2
	.word	rh_tmp_1
	.word	ph_tmp_2
	.word	ph_tmp_1
	.word	ah_tmp_2
	.word	ah_tmp_1
	.word	nbh
	.word	dec_rlt_tmp_2
	.word	dec_rlt_tmp_1
	.word	dec_plt_tmp_2
	.word	dec_plt_tmp_1
	.word	dec_al2
	.word	dec_al1
	.word	dec_nbl
	.word	dec_rh_tmp_2
	.word	dec_rh_tmp_1
	.word	dec_ph_tmp_2
	.word	dec_ph_tmp_1
	.word	dec_ah_tmp_2
	.word	dec_ah_tmp_1
	.word	dec_nbh
	.word	delay_dltx
	.word	delay_dhx
	.word	dec_del_dltx
	.word	dec_del_dhx
	.word	delay_bpl
	.word	delay_bph
	.word	dec_del_bpl
	.word	dec_del_bph
	.word	tqmf
	.word	accumc
	.word	accumd
	.size	reset, .-reset
	.align	2
	.global	filtez
	.syntax unified
	.arm
	.fpu softvfp
	.type	filtez, %function
filtez:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, fp}
	add	fp, sp, #8
	mov	r3, r0
	mov	r2, r1
	mov	r1, r3
	add	r3, r1, #4
	ldr	r0, [r1]
	mov	r1, r2
	add	r2, r1, #4
	ldr	r1, [r1]
	mul	r4, r1, r0
	mov	r5, #1
	b	.L57
.L58:
	mov	r1, r3
	add	r3, r1, #4
	ldr	r0, [r1]
	mov	r1, r2
	add	r2, r1, #4
	ldr	r1, [r1]
	mul	r1, r0, r1
	add	r4, r4, r1
	add	r5, r5, #1
.L57:
	cmp	r5, #5
	ble	.L58
	asr	r3, r4, #14
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, r5, fp}
	bx	lr
	.size	filtez, .-filtez
	.align	2
	.global	filtep
	.syntax unified
	.arm
	.fpu softvfp
	.type	filtep, %function
filtep:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, fp}
	add	fp, sp, #8
	lsl	r4, r0, #1
	mul	r4, r1, r4
	lsl	r5, r2, #1
	mul	r3, r5, r3
	add	r4, r4, r3
	asr	r3, r4, #15
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, r5, fp}
	bx	lr
	.size	filtep, .-filtep
	.align	2
	.global	quantl
	.syntax unified
	.arm
	.fpu softvfp
	.type	quantl, %function
quantl:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, fp, lr}
	add	fp, sp, #16
	sub	sp, sp, #12
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	ldr	r0, [fp, #-24]
	bl	my_abs
	mov	r6, r0
	mov	r4, #0
	b	.L63
.L66:
	ldr	r3, .L71
	ldr	r3, [r3, r4, lsl #2]
	ldr	r2, [fp, #-28]
	mul	r3, r2, r3
	asr	r5, r3, #15
	cmp	r6, r5
	ble	.L70
	add	r4, r4, #1
.L63:
	cmp	r4, #29
	ble	.L66
	b	.L65
.L70:
	nop
.L65:
	ldr	r3, [fp, #-24]
	cmp	r3, #0
	blt	.L67
	ldr	r3, .L71+4
	ldr	r4, [r3, r4, lsl #2]
	b	.L68
.L67:
	ldr	r3, .L71+8
	ldr	r4, [r3, r4, lsl #2]
.L68:
	mov	r3, r4
	mov	r0, r3
	sub	sp, fp, #16
	@ sp needed
	pop	{r4, r5, r6, fp, pc}
.L72:
	.align	2
.L71:
	.word	decis_levl
	.word	quant26bt_pos
	.word	quant26bt_neg
	.size	quantl, .-quantl
	.align	2
	.global	logscl
	.syntax unified
	.arm
	.fpu softvfp
	.type	logscl, %function
logscl:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, fp}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-12]
	mov	r3, r2
	lsl	r3, r3, #7
	sub	r3, r3, r2
	asr	r4, r3, #7
	ldr	r3, [fp, #-8]
	asr	r3, r3, #2
	ldr	r2, .L77
	ldr	r3, [r2, r3, lsl #2]
	add	r3, r4, r3
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-12]
	cmp	r3, #0
	bge	.L74
	mov	r3, #0
	str	r3, [fp, #-12]
.L74:
	ldr	r3, [fp, #-12]
	cmp	r3, #18432
	ble	.L75
	mov	r3, #18432
	str	r3, [fp, #-12]
.L75:
	ldr	r3, [fp, #-12]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{r4, fp}
	bx	lr
.L78:
	.align	2
.L77:
	.word	wl_code_table
	.size	logscl, .-logscl
	.align	2
	.global	scalel
	.syntax unified
	.arm
	.fpu softvfp
	.type	scalel, %function
scalel:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, fp}
	add	fp, sp, #8
	sub	sp, sp, #12
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	ldr	r3, [fp, #-16]
	asr	r3, r3, #6
	and	r5, r3, #31
	ldr	r3, [fp, #-16]
	asr	r4, r3, #11
	ldr	r3, .L81
	ldr	r2, [r3, r5, lsl #2]
	ldr	r3, [fp, #-20]
	add	r3, r3, #1
	sub	r3, r3, r4
	asr	r4, r2, r3
	lsl	r3, r4, #3
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, r5, fp}
	bx	lr
.L82:
	.align	2
.L81:
	.word	ilb_table
	.size	scalel, .-scalel
	.align	2
	.global	upzero
	.syntax unified
	.arm
	.fpu softvfp
	.type	upzero, %function
upzero:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, fp}
	add	fp, sp, #12
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-24]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L84
	mov	r4, #0
	b	.L85
.L86:
	mov	r3, r4
	lsl	r3, r3, #2
	ldr	r2, [fp, #-24]
	add	r3, r2, r3
	ldr	r2, [r3]
	mov	r3, r2
	lsl	r3, r3, #8
	sub	r2, r3, r2
	mov	r3, r4
	lsl	r3, r3, #2
	ldr	r1, [fp, #-24]
	add	r3, r1, r3
	asr	r2, r2, #8
	str	r2, [r3]
	add	r4, r4, #1
.L85:
	cmp	r4, #5
	ble	.L86
	b	.L87
.L84:
	mov	r4, #0
	b	.L88
.L91:
	mov	r3, r4
	lsl	r3, r3, #2
	ldr	r2, [fp, #-20]
	add	r3, r2, r3
	ldr	r3, [r3]
	ldr	r2, [fp, #-16]
	mul	r3, r2, r3
	cmp	r3, #0
	blt	.L89
	mov	r6, #128
	b	.L90
.L89:
	mvn	r6, #127
.L90:
	mov	r3, r4
	lsl	r3, r3, #2
	ldr	r2, [fp, #-24]
	add	r3, r2, r3
	ldr	r2, [r3]
	mov	r3, r2
	lsl	r3, r3, #8
	sub	r3, r3, r2
	asr	r5, r3, #8
	mov	r3, r4
	lsl	r3, r3, #2
	ldr	r2, [fp, #-24]
	add	r3, r2, r3
	add	r2, r6, r5
	str	r2, [r3]
	add	r4, r4, #1
.L88:
	cmp	r4, #5
	ble	.L91
.L87:
	ldr	r3, [fp, #-20]
	add	r3, r3, #20
	ldr	r2, [fp, #-20]
	ldr	r2, [r2, #16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	add	r3, r3, #16
	ldr	r2, [fp, #-20]
	ldr	r2, [r2, #12]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	add	r3, r3, #12
	ldr	r2, [fp, #-20]
	ldr	r2, [r2, #8]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	add	r3, r3, #4
	ldr	r2, [fp, #-20]
	ldr	r2, [r2]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	ldr	r2, [fp, #-16]
	str	r2, [r3]
	nop
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, r6, fp}
	bx	lr
	.size	upzero, .-upzero
	.align	2
	.global	uppol2
	.syntax unified
	.arm
	.fpu softvfp
	.type	uppol2, %function
uppol2:
	@ args = 4, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, fp}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-8]
	lsl	r4, r3, #2
	ldr	r3, [fp, #-16]
	ldr	r2, [fp, #-20]
	mul	r3, r2, r3
	cmp	r3, #0
	blt	.L94
	rsb	r4, r4, #0
.L94:
	asr	r4, r4, #7
	ldr	r3, [fp, #-16]
	ldr	r2, [fp, #4]
	mul	r3, r2, r3
	cmp	r3, #0
	blt	.L95
	add	r4, r4, #128
	b	.L96
.L95:
	sub	r4, r4, #128
.L96:
	ldr	r2, [fp, #-12]
	mov	r3, r2
	lsl	r3, r3, #7
	sub	r3, r3, r2
	asr	r3, r3, #7
	add	r4, r4, r3
	cmp	r4, #12288
	ble	.L97
	mov	r4, #12288
.L97:
	cmn	r4, #12288
	bge	.L98
	ldr	r4, .L100
.L98:
	mov	r3, r4
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{r4, fp}
	bx	lr
.L101:
	.align	2
.L100:
	.word	-12288
	.size	uppol2, .-uppol2
	.align	2
	.global	uppol1
	.syntax unified
	.arm
	.fpu softvfp
	.type	uppol1, %function
uppol1:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #36
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	str	r2, [fp, #-32]
	str	r3, [fp, #-36]
	ldr	r2, [fp, #-24]
	mov	r3, r2
	lsl	r3, r3, #8
	sub	r3, r3, r2
	asr	r3, r3, #8
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-32]
	ldr	r2, [fp, #-36]
	mul	r3, r2, r3
	cmp	r3, #0
	blt	.L103
	ldr	r3, [fp, #-12]
	add	r3, r3, #192
	str	r3, [fp, #-16]
	b	.L104
.L103:
	ldr	r3, [fp, #-12]
	sub	r3, r3, #192
	str	r3, [fp, #-16]
.L104:
	ldr	r3, [fp, #-28]
	rsb	r3, r3, #15360
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-8]
	cmp	r2, r3
	ble	.L105
	ldr	r3, [fp, #-8]
	str	r3, [fp, #-16]
.L105:
	ldr	r3, [fp, #-8]
	rsb	r3, r3, #0
	ldr	r2, [fp, #-16]
	cmp	r2, r3
	bge	.L106
	ldr	r3, [fp, #-8]
	rsb	r3, r3, #0
	str	r3, [fp, #-16]
.L106:
	ldr	r3, [fp, #-16]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	uppol1, .-uppol1
	.align	2
	.global	logsch
	.syntax unified
	.arm
	.fpu softvfp
	.type	logsch, %function
logsch:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	ldr	r2, [fp, #-20]
	mov	r3, r2
	lsl	r3, r3, #7
	sub	r3, r3, r2
	asr	r3, r3, #7
	str	r3, [fp, #-8]
	ldr	r2, .L112
	ldr	r3, [fp, #-16]
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, [fp, #-8]
	add	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-20]
	cmp	r3, #0
	bge	.L109
	mov	r3, #0
	str	r3, [fp, #-20]
.L109:
	ldr	r3, [fp, #-20]
	cmp	r3, #22528
	ble	.L110
	mov	r3, #22528
	str	r3, [fp, #-20]
.L110:
	ldr	r3, [fp, #-20]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L113:
	.align	2
.L112:
	.word	wh_code_table
	.size	logsch, .-logsch
	.section	.rodata
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 64
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, fp, lr}
	add	fp, sp, #16
	sub	sp, sp, #68
	ldr	r3, .L123
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	mov	r3,#0
	bl	initialize_global
	bl	reset
	mov	r5, #10
	mov	r6, #2000
	mov	r4, #0
	b	.L115
.L116:
	mul	r1, r4, r6
	mov	r2, r1
	lsl	r2, r2, #3
	sub	r2, r2, r1
	lsl	r3, r2, #3
	sub	r3, r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	mov	r0, r3
	bl	my_cos
	mov	r3, r0
	mul	r2, r3, r5
	lsl	r3, r4, #2
	sub	r1, fp, #20
	add	r3, r1, r3
	str	r2, [r3, #-52]
	add	r4, r4, #1
.L115:
	cmp	r4, #2
	ble	.L116
	mov	r4, #0
	b	.L117
.L118:
	lsl	r3, r4, #2
	sub	r2, fp, #20
	add	r3, r2, r3
	ldr	r2, [r3, #-52]
	add	r3, r4, #1
	lsl	r3, r3, #2
	sub	r1, fp, #20
	add	r3, r1, r3
	ldr	r1, [r3, #-52]
	lsr	r3, r4, #31
	add	r3, r3, r4
	asr	r3, r3, #1
	mov	r5, r3
	mov	r0, r2
	bl	encode
	mov	r2, r0
	lsl	r3, r5, #2
	sub	r1, fp, #20
	add	r3, r1, r3
	str	r2, [r3, #-64]
	add	r4, r4, #2
.L117:
	cmp	r4, #3
	ble	.L118
	mov	r4, #0
	b	.L119
.L120:
	lsr	r3, r4, #31
	add	r3, r3, r4
	asr	r3, r3, #1
	lsl	r3, r3, #2
	sub	r2, fp, #20
	add	r3, r2, r3
	ldr	r3, [r3, #-64]
	mov	r0, r3
	bl	decode
	ldr	r3, .L123+4
	ldr	r2, [r3]
	lsl	r3, r4, #2
	sub	r1, fp, #20
	add	r3, r1, r3
	str	r2, [r3, #-28]
	add	r3, r4, #1
	ldr	r2, .L123+8
	ldr	r2, [r2]
	lsl	r3, r3, #2
	sub	r1, fp, #20
	add	r3, r1, r3
	str	r2, [r3, #-28]
	add	r4, r4, #2
.L119:
	cmp	r4, #3
	ble	.L120
	lsl	r3, r4, #2
	sub	r2, fp, #20
	add	r3, r2, r3
	ldr	r2, [r3, #-28]
	add	r3, r4, #1
	lsl	r3, r3, #2
	sub	r1, fp, #20
	add	r3, r1, r3
	ldr	r3, [r3, #-28]
	add	r3, r2, r3
	ldr	r2, .L123
	ldr	r1, [r2]
	ldr	r2, [fp, #-24]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L122
	bl	__stack_chk_fail
.L122:
	mov	r0, r3
	sub	sp, fp, #16
	@ sp needed
	pop	{r4, r5, r6, fp, pc}
.L124:
	.align	2
.L123:
	.word	.LC0
	.word	xout1
	.word	xout2
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
