	.file	"658851.c"
	.intel_syntax noprefix
	.text
	.globl	__VERIFIER_nondet_bool
	.type	__VERIFIER_nondet_bool, @function
__VERIFIER_nondet_bool:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	__VERIFIER_nondet_int@PLT
	test	eax, eax
	setne	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	__VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
	.globl	main
	.type	main, @function
main:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 352
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR -180[rbp], eax
	call	__VERIFIER_nondet_bool
	mov	DWORD PTR -352[rbp], eax
	call	__VERIFIER_nondet_bool
	mov	DWORD PTR -348[rbp], eax
	call	__VERIFIER_nondet_bool
	mov	DWORD PTR -344[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -340[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -336[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -332[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -328[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -324[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -320[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -316[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -312[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -308[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -304[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -300[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -296[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -292[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -288[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -284[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -280[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -276[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -272[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -268[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -264[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -260[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -256[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -252[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -248[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -244[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -240[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -236[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -232[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -228[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -224[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -220[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -216[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -212[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -208[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -204[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -200[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -196[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -192[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -188[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -184[rbp], eax
	cmp	DWORD PTR -344[rbp], 0
	jne	.L4
	cmp	DWORD PTR -348[rbp], 0
	jne	.L4
	cmp	DWORD PTR -352[rbp], 0
	je	.L4
	mov	eax, 1
	jmp	.L5
.L4:
	mov	eax, 0
.L5:
	mov	DWORD PTR -176[rbp], eax
	jmp	.L6
.L1656:
	cmp	DWORD PTR -348[rbp], 0
	jne	.L7
	cmp	DWORD PTR -352[rbp], 0
	je	.L7
	cmp	DWORD PTR -344[rbp], 0
	jne	.L8
	cmp	DWORD PTR -348[rbp], 0
	jne	.L8
	cmp	DWORD PTR -352[rbp], 0
	je	.L8
.L7:
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR -180[rbp], eax
	jmp	.L9
.L8:
	sub	DWORD PTR -180[rbp], 1
.L9:
	call	__VERIFIER_nondet_bool
	mov	DWORD PTR -172[rbp], eax
	call	__VERIFIER_nondet_bool
	mov	DWORD PTR -168[rbp], eax
	call	__VERIFIER_nondet_bool
	mov	DWORD PTR -164[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -160[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -156[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -152[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -148[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -144[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -140[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -136[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -132[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -128[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -124[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -120[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -116[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -112[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -108[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -104[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -100[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -96[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -92[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -88[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -84[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -80[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -76[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -72[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -68[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -64[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -60[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -56[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -52[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -48[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -44[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -40[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -36[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -32[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -28[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -24[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -20[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -16[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -12[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -8[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -4[rbp], eax
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L1678
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L31
.L1678:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L1679
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L31
.L1679:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L1680
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L31
.L1680:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L1681
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L31
.L1681:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1682
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L31
.L1682:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1683
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L31
.L1683:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1684
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L31
.L1684:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1685
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L31
.L1685:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L1686
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L31
.L1686:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1687
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L31
.L1687:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1688
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L31
.L1688:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1689
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L31
.L1689:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1690
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L31
.L1690:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1691
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L31
.L1691:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L1692
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L31
.L1692:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1693
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L31
.L1693:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1694
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L31
.L1694:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L1695
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L31
.L1695:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L1696
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L31
.L1696:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jne	.L10
.L31:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -148[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -148[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -148[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -148[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -148[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -148[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -148[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -148[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -148[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -148[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -148[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -148[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -148[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -148[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -148[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -148[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -148[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -148[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -148[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -148[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -148[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1717
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L72
.L1717:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -148[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L1718
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L72
.L1718:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -148[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1719
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L72
.L1719:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -148[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1720
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L72
.L1720:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -148[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1721
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L72
.L1721:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -148[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1722
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L72
.L1722:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -148[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1723
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L72
.L1723:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -148[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L1724
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L72
.L1724:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -148[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L1725
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L72
.L1725:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -148[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L1726
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L72
.L1726:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -148[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1727
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L72
.L1727:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -148[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1728
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L72
.L1728:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -148[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L1729
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L72
.L1729:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -148[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1730
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L72
.L1730:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -148[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1731
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L72
.L1731:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -148[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1732
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L72
.L1732:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -148[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1733
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L72
.L1733:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -148[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1734
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L72
.L1734:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -148[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L1735
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L72
.L1735:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -148[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jne	.L10
.L72:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1756
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L113
.L1756:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1757
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L113
.L1757:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1758
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L113
.L1758:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L1759
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L113
.L1759:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1760
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L113
.L1760:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L1761
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L113
.L1761:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L1762
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L113
.L1762:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1763
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L113
.L1763:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L1764
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L113
.L1764:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1765
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L113
.L1765:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L1766
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L113
.L1766:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1767
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L113
.L1767:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1768
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L113
.L1768:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1769
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L113
.L1769:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L1770
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L113
.L1770:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L1771
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L113
.L1771:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L1772
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L113
.L1772:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1773
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L113
.L1773:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1774
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L113
.L1774:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jne	.L10
.L113:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -156[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -156[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -156[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -156[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -156[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -156[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -156[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -156[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -156[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -156[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -156[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -156[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -156[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -156[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -156[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -156[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -156[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -156[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -156[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -156[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -156[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L1795
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L154
.L1795:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -156[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L1796
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L154
.L1796:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -156[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L1797
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L154
.L1797:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -156[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1798
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L154
.L1798:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -156[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1799
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L154
.L1799:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -156[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1800
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L154
.L1800:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -156[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L1801
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L154
.L1801:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -156[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1802
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L154
.L1802:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -156[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L1803
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L154
.L1803:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -156[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L1804
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L154
.L1804:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -156[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L1805
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L154
.L1805:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -156[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L1806
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L154
.L1806:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -156[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1807
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L154
.L1807:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -156[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L1808
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L154
.L1808:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -156[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1809
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L154
.L1809:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -156[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L1810
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L154
.L1810:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -156[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L1811
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L154
.L1811:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -156[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L1812
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L154
.L1812:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -156[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1813
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L154
.L1813:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -156[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jne	.L10
.L154:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -152[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -152[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -152[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -152[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -152[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -152[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -152[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -152[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -152[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -152[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -152[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -152[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -152[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -152[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -152[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -152[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -152[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -152[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -152[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -152[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -152[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L1834
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L195
.L1834:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -152[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L1835
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L195
.L1835:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -152[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L1836
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L195
.L1836:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -152[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L1837
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L195
.L1837:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -152[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1838
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L195
.L1838:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -152[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1839
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L195
.L1839:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -152[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L1840
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L195
.L1840:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -152[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L1841
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L195
.L1841:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -152[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L1842
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L195
.L1842:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -152[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1843
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L195
.L1843:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -152[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L1844
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L195
.L1844:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -152[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1845
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L195
.L1845:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -152[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L1846
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L195
.L1846:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -152[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1847
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L195
.L1847:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -152[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L1848
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L195
.L1848:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -152[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1849
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L195
.L1849:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -152[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1850
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L195
.L1850:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -152[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L1851
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L195
.L1851:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -152[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1852
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L195
.L1852:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -152[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jne	.L10
.L195:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1873
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L236
.L1873:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1874
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L236
.L1874:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1875
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L236
.L1875:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L1876
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L236
.L1876:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L1877
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L236
.L1877:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L1878
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L236
.L1878:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1879
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L236
.L1879:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1880
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L236
.L1880:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L1881
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L236
.L1881:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1882
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L236
.L1882:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1883
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L236
.L1883:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1884
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L236
.L1884:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L1885
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L236
.L1885:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1886
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L236
.L1886:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1887
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L236
.L1887:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L1888
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L236
.L1888:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1889
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L236
.L1889:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1890
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L236
.L1890:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L1891
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L236
.L1891:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jne	.L10
.L236:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -136[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -136[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -136[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -136[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -136[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -136[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -136[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -136[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -136[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -136[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -136[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -136[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -136[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -136[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -136[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -136[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -136[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -136[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -136[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -136[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -136[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1912
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L277
.L1912:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -136[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L1913
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L277
.L1913:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -136[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1914
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L277
.L1914:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -136[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L1915
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L277
.L1915:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -136[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L1916
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L277
.L1916:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -136[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1917
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L277
.L1917:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -136[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1918
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L277
.L1918:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -136[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1919
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L277
.L1919:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -136[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L1920
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L277
.L1920:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -136[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1921
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L277
.L1921:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -136[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1922
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L277
.L1922:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -136[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1923
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L277
.L1923:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -136[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L1924
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L277
.L1924:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -136[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L1925
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L277
.L1925:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -136[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L1926
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L277
.L1926:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -136[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1927
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L277
.L1927:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -136[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L1928
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L277
.L1928:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -136[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1929
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L277
.L1929:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -136[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L1930
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L277
.L1930:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -136[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jne	.L10
.L277:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -140[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -140[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -140[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -140[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -140[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -140[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -140[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -140[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -140[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -140[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -140[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -140[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -140[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -140[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -140[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -140[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -140[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -140[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -140[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -140[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -140[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1951
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L318
.L1951:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -140[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L1952
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L318
.L1952:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -140[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1953
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L318
.L1953:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -140[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L1954
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L318
.L1954:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -140[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1955
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L318
.L1955:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -140[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L1956
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L318
.L1956:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -140[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L1957
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L318
.L1957:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -140[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1958
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L318
.L1958:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -140[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L1959
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L318
.L1959:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -140[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L1960
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L318
.L1960:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -140[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L1961
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L318
.L1961:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -140[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L1962
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L318
.L1962:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -140[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1963
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L318
.L1963:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -140[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L1964
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L318
.L1964:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -140[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L1965
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L318
.L1965:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -140[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1966
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L318
.L1966:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -140[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L1967
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L318
.L1967:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -140[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L1968
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L318
.L1968:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -140[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L1969
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L318
.L1969:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -140[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jne	.L10
.L318:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L1990
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L359
.L1990:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L1991
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L359
.L1991:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1992
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L359
.L1992:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L1993
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L359
.L1993:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L1994
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L359
.L1994:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L1995
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L359
.L1995:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L1996
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L359
.L1996:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1997
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L359
.L1997:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1998
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L359
.L1998:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1999
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L359
.L1999:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L2000
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L359
.L2000:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2001
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L359
.L2001:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L2002
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L359
.L2002:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L2003
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L359
.L2003:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L2004
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L359
.L2004:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2005
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L359
.L2005:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2006
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L359
.L2006:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L2007
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L359
.L2007:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L2008
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L359
.L2008:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jne	.L10
.L359:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2029
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L400
.L2029:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L2030
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L400
.L2030:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L2031
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L400
.L2031:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L2032
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L400
.L2032:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2033
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L400
.L2033:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L2034
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L400
.L2034:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L2035
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L400
.L2035:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L2036
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L400
.L2036:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L2037
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L400
.L2037:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2038
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L400
.L2038:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L2039
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L400
.L2039:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L2040
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L400
.L2040:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L2041
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L400
.L2041:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L2042
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L400
.L2042:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L2043
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L400
.L2043:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L2044
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L400
.L2044:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2045
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L400
.L2045:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L2046
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L400
.L2046:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L2047
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L400
.L2047:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jne	.L10
.L400:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L2068
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L441
.L2068:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L2069
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L441
.L2069:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L2070
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L441
.L2070:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L2071
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L441
.L2071:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L2072
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L441
.L2072:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2073
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L441
.L2073:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2074
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L441
.L2074:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2075
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L441
.L2075:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L2076
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L441
.L2076:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L2077
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L441
.L2077:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L2078
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L441
.L2078:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2079
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L441
.L2079:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L2080
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L441
.L2080:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L2081
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L441
.L2081:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L2082
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L441
.L2082:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2083
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L441
.L2083:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L2084
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L441
.L2084:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L2085
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L441
.L2085:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L2086
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L441
.L2086:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jne	.L10
.L441:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L2107
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L482
.L2107:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2108
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L482
.L2108:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L2109
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L482
.L2109:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2110
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L482
.L2110:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L2111
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L482
.L2111:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L2112
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L482
.L2112:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L2113
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L482
.L2113:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L2114
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L482
.L2114:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L2115
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L482
.L2115:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2116
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L482
.L2116:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L2117
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L482
.L2117:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L2118
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L482
.L2118:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L2119
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L482
.L2119:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L2120
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L482
.L2120:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L2121
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L482
.L2121:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2122
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L482
.L2122:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L2123
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L482
.L2123:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2124
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L482
.L2124:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2125
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L482
.L2125:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jne	.L10
.L482:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L2146
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L523
.L2146:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L2147
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L523
.L2147:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L2148
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L523
.L2148:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2149
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L523
.L2149:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L2150
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L523
.L2150:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L2151
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L523
.L2151:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L2152
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L523
.L2152:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2153
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L523
.L2153:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L2154
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L523
.L2154:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2155
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L523
.L2155:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2156
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L523
.L2156:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2157
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L523
.L2157:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2158
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L523
.L2158:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L2159
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L523
.L2159:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2160
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L523
.L2160:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L2161
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L523
.L2161:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L2162
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L523
.L2162:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L2163
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L523
.L2163:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L2164
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L523
.L2164:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jne	.L10
.L523:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L2185
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L564
.L2185:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L2186
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L564
.L2186:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L2187
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L564
.L2187:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2188
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L564
.L2188:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L2189
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L564
.L2189:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L2190
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L564
.L2190:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L2191
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L564
.L2191:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L2192
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L564
.L2192:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L2193
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L564
.L2193:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L2194
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L564
.L2194:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L2195
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L564
.L2195:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L2196
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L564
.L2196:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2197
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L564
.L2197:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2198
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L564
.L2198:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2199
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L564
.L2199:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L2200
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L564
.L2200:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2201
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L564
.L2201:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L2202
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L564
.L2202:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L2203
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L564
.L2203:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jne	.L10
.L564:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -112[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -112[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -112[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -112[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -112[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -112[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -112[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -112[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -112[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -112[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -112[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -112[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -112[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -112[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -112[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -112[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -112[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -112[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -112[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -112[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -112[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L2224
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L605
.L2224:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -112[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L2225
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L605
.L2225:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -112[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L2226
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L605
.L2226:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -112[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L2227
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L605
.L2227:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -112[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L2228
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L605
.L2228:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -112[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L2229
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L605
.L2229:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -112[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L2230
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L605
.L2230:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -112[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2231
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L605
.L2231:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -112[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2232
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L605
.L2232:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -112[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L2233
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L605
.L2233:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -112[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2234
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L605
.L2234:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -112[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L2235
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L605
.L2235:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -112[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L2236
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L605
.L2236:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -112[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2237
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L605
.L2237:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -112[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L2238
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L605
.L2238:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -112[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L2239
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L605
.L2239:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -112[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L2240
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L605
.L2240:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -112[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L2241
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L605
.L2241:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -112[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2242
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L605
.L2242:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -112[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L10
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jne	.L10
.L605:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2263
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L646
.L2263:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L2264
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L646
.L2264:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L2265
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L646
.L2265:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L2266
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L646
.L2266:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L2267
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L646
.L2267:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L2268
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L646
.L2268:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L2269
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L646
.L2269:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2270
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L646
.L2270:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L2271
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L646
.L2271:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L2272
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L646
.L2272:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2273
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L646
.L2273:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L2274
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L646
.L2274:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L2275
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L646
.L2275:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L2276
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L646
.L2276:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L2277
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L646
.L2277:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L2278
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L646
.L2278:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L2279
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L646
.L2279:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L2280
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L646
.L2280:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L2281
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L646
.L2281:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jne	.L10
.L646:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L2302
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L687
.L2302:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L2303
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L687
.L2303:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L2304
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L687
.L2304:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L2305
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L687
.L2305:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L2306
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L687
.L2306:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2307
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L687
.L2307:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L2308
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L687
.L2308:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L2309
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L687
.L2309:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L2310
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L687
.L2310:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2311
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L687
.L2311:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L2312
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L687
.L2312:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L2313
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L687
.L2313:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L2314
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L687
.L2314:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L2315
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L687
.L2315:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L2316
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L687
.L2316:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L2317
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L687
.L2317:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L2318
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L687
.L2318:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2319
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L687
.L2319:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2320
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L687
.L2320:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jne	.L10
.L687:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2341
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L728
.L2341:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L2342
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L728
.L2342:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L2343
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L728
.L2343:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L2344
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L728
.L2344:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L2345
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L728
.L2345:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L2346
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L728
.L2346:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L2347
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L728
.L2347:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L2348
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L728
.L2348:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L2349
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L728
.L2349:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L2350
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L728
.L2350:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2351
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L728
.L2351:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L2352
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L728
.L2352:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2353
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L728
.L2353:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2354
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L728
.L2354:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L2355
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L728
.L2355:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L2356
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L728
.L2356:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2357
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L728
.L2357:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L2358
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L728
.L2358:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L2359
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L728
.L2359:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jne	.L10
.L728:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2380
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L769
.L2380:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L2381
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L769
.L2381:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L2382
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L769
.L2382:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2383
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L769
.L2383:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L2384
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L769
.L2384:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2385
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L769
.L2385:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2386
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L769
.L2386:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L2387
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L769
.L2387:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2388
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L769
.L2388:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L2389
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L769
.L2389:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L2390
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L769
.L2390:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L2391
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L769
.L2391:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2392
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L769
.L2392:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2393
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L769
.L2393:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L2394
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L769
.L2394:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L2395
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L769
.L2395:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L2396
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L769
.L2396:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2397
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L769
.L2397:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L2398
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L769
.L2398:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jne	.L10
.L769:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2419
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L810
.L2419:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L2420
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L810
.L2420:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L2421
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L810
.L2421:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L2422
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L810
.L2422:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2423
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L810
.L2423:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L2424
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L810
.L2424:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L2425
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L810
.L2425:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L2426
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L810
.L2426:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L2427
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L810
.L2427:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2428
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L810
.L2428:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L2429
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L810
.L2429:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L2430
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L810
.L2430:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L2431
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L810
.L2431:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L2432
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L810
.L2432:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L2433
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L810
.L2433:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L2434
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L810
.L2434:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L2435
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L810
.L2435:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L2436
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L810
.L2436:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L2437
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L810
.L2437:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jne	.L10
.L810:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L2458
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L851
.L2458:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L2459
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L851
.L2459:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2460
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L851
.L2460:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L2461
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L851
.L2461:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L2462
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L851
.L2462:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L2463
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L851
.L2463:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2464
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L851
.L2464:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2465
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L851
.L2465:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L2466
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L851
.L2466:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L2467
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L851
.L2467:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2468
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L851
.L2468:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L2469
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L851
.L2469:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L2470
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L851
.L2470:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L2471
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L851
.L2471:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L2472
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L851
.L2472:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L2473
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L851
.L2473:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L2474
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L851
.L2474:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L2475
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L851
.L2475:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L2476
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L851
.L2476:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jne	.L10
.L851:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L2497
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L892
.L2497:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2498
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L892
.L2498:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L2499
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L892
.L2499:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L2500
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L892
.L2500:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L2501
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L892
.L2501:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L2502
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L892
.L2502:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L2503
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L892
.L2503:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2504
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L892
.L2504:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2505
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L892
.L2505:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L2506
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L892
.L2506:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L2507
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L892
.L2507:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2508
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L892
.L2508:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L2509
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L892
.L2509:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L2510
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L892
.L2510:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2511
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L892
.L2511:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L2512
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L892
.L2512:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2513
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L892
.L2513:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L2514
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L892
.L2514:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L2515
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L892
.L2515:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jne	.L10
.L892:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L2536
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L933
.L2536:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2537
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L933
.L2537:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L2538
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L933
.L2538:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L2539
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L933
.L2539:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2540
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L933
.L2540:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L2541
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L933
.L2541:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2542
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L933
.L2542:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L2543
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L933
.L2543:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2544
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L933
.L2544:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L2545
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L933
.L2545:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L2546
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L933
.L2546:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L2547
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L933
.L2547:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L2548
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L933
.L2548:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L2549
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L933
.L2549:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L2550
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L933
.L2550:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L2551
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L933
.L2551:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L2552
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L933
.L2552:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L2553
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L933
.L2553:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L2554
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L933
.L2554:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jne	.L10
.L933:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L2575
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L974
.L2575:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L2576
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L974
.L2576:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L2577
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L974
.L2577:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L2578
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L974
.L2578:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L2579
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L974
.L2579:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L2580
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L974
.L2580:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L2581
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L974
.L2581:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L2582
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L974
.L2582:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2583
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L974
.L2583:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L2584
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L974
.L2584:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L2585
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L974
.L2585:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L2586
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L974
.L2586:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L2587
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L974
.L2587:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L2588
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L974
.L2588:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L2589
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L974
.L2589:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2590
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L974
.L2590:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L2591
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L974
.L2591:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L2592
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L974
.L2592:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L2593
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L974
.L2593:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jne	.L10
.L974:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L2614
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L1015
.L2614:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2615
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L1015
.L2615:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2616
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L1015
.L2616:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L2617
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L1015
.L2617:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L2618
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L1015
.L2618:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L2619
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L1015
.L2619:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L2620
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L1015
.L2620:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L2621
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L1015
.L2621:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L2622
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L1015
.L2622:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2623
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L1015
.L2623:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L2624
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L1015
.L2624:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L2625
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L1015
.L2625:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L2626
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L1015
.L2626:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L2627
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L1015
.L2627:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L2628
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L1015
.L2628:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L2629
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L1015
.L2629:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L2630
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L1015
.L2630:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L2631
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L1015
.L2631:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2632
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L1015
.L2632:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jne	.L10
.L1015:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L2653
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L1056
.L2653:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L2654
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L1056
.L2654:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L2655
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L1056
.L2655:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L2656
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L1056
.L2656:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L2657
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L1056
.L2657:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L2658
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L1056
.L2658:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L2659
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L1056
.L2659:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L2660
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L1056
.L2660:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L2661
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L1056
.L2661:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L2662
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L1056
.L2662:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2663
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L1056
.L2663:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L2664
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L1056
.L2664:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L2665
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L1056
.L2665:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L2666
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L1056
.L2666:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2667
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L1056
.L2667:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L2668
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L1056
.L2668:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L2669
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L1056
.L2669:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L2670
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L1056
.L2670:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L2671
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L1056
.L2671:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jne	.L10
.L1056:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L2692
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L1097
.L2692:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L2693
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L1097
.L2693:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L2694
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L1097
.L2694:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2695
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L1097
.L2695:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2696
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L1097
.L2696:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L2697
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L1097
.L2697:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L2698
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L1097
.L2698:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2699
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L1097
.L2699:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L2700
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L1097
.L2700:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2701
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L1097
.L2701:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L2702
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L1097
.L2702:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L2703
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L1097
.L2703:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L2704
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L1097
.L2704:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L2705
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L1097
.L2705:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L2706
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L1097
.L2706:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L2707
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L1097
.L2707:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2708
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L1097
.L2708:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2709
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L1097
.L2709:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L2710
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L1097
.L2710:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jne	.L10
.L1097:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L2731
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L1138
.L2731:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L2732
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L1138
.L2732:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L2733
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L1138
.L2733:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L2734
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L1138
.L2734:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L2735
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L1138
.L2735:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L2736
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L1138
.L2736:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L2737
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L1138
.L2737:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2738
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L1138
.L2738:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2739
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L1138
.L2739:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L2740
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L1138
.L2740:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L2741
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L1138
.L2741:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L2742
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L1138
.L2742:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2743
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L1138
.L2743:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L2744
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L1138
.L2744:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2745
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L1138
.L2745:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L2746
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L1138
.L2746:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L2747
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L1138
.L2747:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L2748
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L1138
.L2748:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2749
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L1138
.L2749:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jne	.L10
.L1138:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2770
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L1179
.L2770:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L2771
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L1179
.L2771:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L2772
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L1179
.L2772:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L2773
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L1179
.L2773:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2774
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L1179
.L2774:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L2775
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L1179
.L2775:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L2776
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L1179
.L2776:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L2777
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L1179
.L2777:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2778
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L1179
.L2778:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2779
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L1179
.L2779:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2780
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L1179
.L2780:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L2781
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L1179
.L2781:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L2782
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L1179
.L2782:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L2783
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L1179
.L2783:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2784
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L1179
.L2784:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L2785
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L1179
.L2785:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2786
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L1179
.L2786:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L2787
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L1179
.L2787:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L2788
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L1179
.L2788:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jne	.L10
.L1179:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L2809
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L1220
.L2809:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2810
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L1220
.L2810:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2811
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L1220
.L2811:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2812
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L1220
.L2812:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L2813
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L1220
.L2813:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L2814
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L1220
.L2814:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2815
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L1220
.L2815:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2816
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L1220
.L2816:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L2817
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L1220
.L2817:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2818
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L1220
.L2818:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L2819
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L1220
.L2819:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2820
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L1220
.L2820:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L2821
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L1220
.L2821:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L2822
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L1220
.L2822:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L2823
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L1220
.L2823:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L2824
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L1220
.L2824:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L2825
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L1220
.L2825:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2826
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L1220
.L2826:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L2827
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L1220
.L2827:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jne	.L10
.L1220:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L2848
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L1261
.L2848:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L2849
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L1261
.L2849:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L2850
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L1261
.L2850:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L2851
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L1261
.L2851:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L2852
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L1261
.L2852:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2853
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L1261
.L2853:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L2854
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L1261
.L2854:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L2855
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L1261
.L2855:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L2856
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L1261
.L2856:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L2857
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L1261
.L2857:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L2858
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L1261
.L2858:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L2859
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L1261
.L2859:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2860
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L1261
.L2860:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L2861
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L1261
.L2861:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2862
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L1261
.L2862:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L2863
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L1261
.L2863:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2864
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L1261
.L2864:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L2865
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L1261
.L2865:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L2866
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L1261
.L2866:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L10
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jne	.L10
.L1261:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L2887
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L1302
.L2887:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L2888
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L1302
.L2888:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L2889
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L1302
.L2889:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L2890
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L1302
.L2890:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2891
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L1302
.L2891:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L2892
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L1302
.L2892:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L2893
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L1302
.L2893:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2894
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L1302
.L2894:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L2895
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L1302
.L2895:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L2896
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L1302
.L2896:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L2897
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L1302
.L2897:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L2898
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L1302
.L2898:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L2899
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L1302
.L2899:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L2900
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L1302
.L2900:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L2901
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L1302
.L2901:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2902
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L1302
.L2902:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L2903
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L1302
.L2903:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L2904
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L1302
.L2904:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L2905
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L1302
.L2905:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jne	.L10
.L1302:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L2926
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L1343
.L2926:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2927
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L1343
.L2927:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L2928
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L1343
.L2928:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L2929
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L1343
.L2929:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L2930
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L1343
.L2930:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2931
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L1343
.L2931:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L2932
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L1343
.L2932:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2933
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L1343
.L2933:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L2934
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L1343
.L2934:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L2935
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L1343
.L2935:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L2936
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L1343
.L2936:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L2937
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L1343
.L2937:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L2938
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L1343
.L2938:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2939
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L1343
.L2939:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L2940
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L1343
.L2940:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L2941
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L1343
.L2941:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2942
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L1343
.L2942:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2943
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L1343
.L2943:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L2944
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L1343
.L2944:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jne	.L10
.L1343:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L2965
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L1384
.L2965:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L2966
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L1384
.L2966:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2967
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L1384
.L2967:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L2968
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L1384
.L2968:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L2969
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L1384
.L2969:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L2970
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L1384
.L2970:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L2971
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L1384
.L2971:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L2972
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L1384
.L2972:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L2973
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L1384
.L2973:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L2974
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L1384
.L2974:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L2975
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L1384
.L2975:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L2976
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L1384
.L2976:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L2977
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L1384
.L2977:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L2978
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L1384
.L2978:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L2979
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L1384
.L2979:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L2980
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L1384
.L2980:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2981
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L1384
.L2981:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L2982
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L1384
.L2982:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L2983
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L1384
.L2983:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jne	.L10
.L1384:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L3004
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L1425
.L3004:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L3005
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L1425
.L3005:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -340[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L3006
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L1425
.L3006:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L3007
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L1425
.L3007:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L3008
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L1425
.L3008:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L3009
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L1425
.L3009:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L3010
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L1425
.L3010:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L3011
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L1425
.L3011:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L3012
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L1425
.L3012:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L3013
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L1425
.L3013:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L3014
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L1425
.L3014:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L3015
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L1425
.L3015:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L3016
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L1425
.L3016:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L3017
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L1425
.L3017:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L3018
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L1425
.L3018:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L3019
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L1425
.L3019:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L3020
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L1425
.L3020:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L3021
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L1425
.L3021:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L3022
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L1425
.L3022:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jne	.L10
.L1425:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L3043
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L1466
.L3043:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L3044
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L1466
.L3044:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -312[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L3045
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L1466
.L3045:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L3046
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L1466
.L3046:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L3047
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L1466
.L3047:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L3048
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L1466
.L3048:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L3049
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L1466
.L3049:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L3050
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L1466
.L3050:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L3051
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L1466
.L3051:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L3052
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L1466
.L3052:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L3053
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L1466
.L3053:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L3054
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L1466
.L3054:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L3055
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L1466
.L3055:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L3056
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L1466
.L3056:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L3057
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L1466
.L3057:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L3058
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L1466
.L3058:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L3059
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L1466
.L3059:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L3060
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L1466
.L3060:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L3061
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L1466
.L3061:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jne	.L10
.L1466:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -160[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -160[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -160[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -160[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -160[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -160[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -160[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -160[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -160[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -160[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -160[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -160[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -160[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -160[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -160[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -160[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -160[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -160[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -160[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -160[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -160[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L3082
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L1507
.L3082:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -160[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L3083
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L1507
.L3083:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -160[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L3084
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L1507
.L3084:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -160[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L3085
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L1507
.L3085:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -160[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L3086
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L1507
.L3086:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -160[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L3087
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L1507
.L3087:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -160[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L3088
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L1507
.L3088:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -160[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L3089
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L1507
.L3089:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -160[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L3090
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L1507
.L3090:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -160[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L3091
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L1507
.L3091:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -160[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	jp	.L3092
	movsd	xmm1, QWORD PTR .LC2[rip]
	ucomisd	xmm0, xmm1
	je	.L1507
.L3092:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -160[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L3093
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L1507
.L3093:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -160[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L3094
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L1507
.L3094:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -160[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L3095
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L1507
.L3095:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -160[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L3096
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L1507
.L3096:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -160[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L3097
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L1507
.L3097:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -160[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L3098
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L1507
.L3098:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -160[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L3099
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L1507
.L3099:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -160[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L3100
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L1507
.L3100:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -336[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -160[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jne	.L10
.L1507:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -132[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -132[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -132[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -132[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -132[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -132[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -132[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -132[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -132[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -132[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -132[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -132[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -132[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -132[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -132[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -132[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -132[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -132[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -132[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -132[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -132[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L3121
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L1548
.L3121:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -132[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L3122
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L1548
.L3122:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -132[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L3123
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L1548
.L3123:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -132[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L3124
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L1548
.L3124:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -132[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L3125
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L1548
.L3125:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -132[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L3126
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L1548
.L3126:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -132[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L3127
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L1548
.L3127:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -132[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L3128
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L1548
.L3128:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -132[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L3129
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L1548
.L3129:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -132[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L3130
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L1548
.L3130:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -132[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L3131
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L1548
.L3131:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -132[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L3132
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L1548
.L3132:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -132[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	jp	.L3133
	ucomisd	xmm0, QWORD PTR .LC16[rip]
	je	.L1548
.L3133:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -292[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -132[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L3134
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L1548
.L3134:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -300[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -132[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L3135
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L1548
.L3135:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -132[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L3136
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L1548
.L3136:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -132[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L3137
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L1548
.L3137:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -320[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -132[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L3138
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L1548
.L3138:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -132[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L3139
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L1548
.L3139:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -132[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jne	.L10
.L1548:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L3160
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L1589
.L3160:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L3161
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L1589
.L3161:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L3162
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L1589
.L3162:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L3163
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L1589
.L3163:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L3164
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L1589
.L3164:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L3165
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L1589
.L3165:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L3166
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L1589
.L3166:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L3167
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L1589
.L3167:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L3168
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L1589
.L3168:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L3169
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L1589
.L3169:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L3170
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L1589
.L3170:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L3171
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L1589
.L3171:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L3172
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L1589
.L3172:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L3173
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L1589
.L3173:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L3174
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L1589
.L3174:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L3175
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L1589
.L3175:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L3176
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L1589
.L3176:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L3177
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L1589
.L3177:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -308[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L3178
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L1589
.L3178:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jne	.L10
.L1589:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L3199
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L1630
.L3199:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L3200
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L1630
.L3200:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L3201
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L1630
.L3201:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L3202
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L1630
.L3202:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L3203
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L1630
.L3203:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L3204
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L1630
.L3204:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L3205
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L1630
.L3205:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L3206
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L1630
.L3206:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L3207
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L1630
.L3207:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L3208
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L1630
.L3208:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -264[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L3209
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L1630
.L3209:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L3210
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L1630
.L3210:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L3211
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L1630
.L3211:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -284[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L3212
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L1630
.L3212:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -288[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L3213
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L1630
.L3213:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -304[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L3214
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L1630
.L3214:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -316[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L3215
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L1630
.L3215:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -324[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L3216
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L1630
.L3216:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -328[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L3217
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L1630
.L3217:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -332[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jne	.L10
.L1630:
	cmp	DWORD PTR -164[rbp], 0
	jne	.L1651
	cmp	DWORD PTR -168[rbp], 0
	jne	.L1651
	cmp	DWORD PTR -172[rbp], 0
	jne	.L1652
.L1651:
	mov	edx, 1
	jmp	.L1653
.L1652:
	mov	edx, 0
.L1653:
	mov	eax, DWORD PTR -344[rbp]
	cmp	edx, eax
	jne	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -116[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	comisd	xmm0, QWORD PTR .LC18[rip]
	setnb	al
	movzx	eax, al
	cmp	DWORD PTR -352[rbp], eax
	jne	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -64[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC20[rip]
	comisd	xmm0, xmm1
	setnb	al
	movzx	eax, al
	cmp	DWORD PTR -348[rbp], eax
	jne	.L10
	mov	eax, 1
	jmp	.L1654
.L10:
	mov	eax, 0
.L1654:
	mov	DWORD PTR -176[rbp], eax
	mov	eax, DWORD PTR -172[rbp]
	mov	DWORD PTR -352[rbp], eax
	mov	eax, DWORD PTR -168[rbp]
	mov	DWORD PTR -348[rbp], eax
	mov	eax, DWORD PTR -164[rbp]
	mov	DWORD PTR -344[rbp], eax
	movss	xmm0, DWORD PTR -160[rbp]
	movss	DWORD PTR -340[rbp], xmm0
	movss	xmm0, DWORD PTR -156[rbp]
	movss	DWORD PTR -336[rbp], xmm0
	movss	xmm0, DWORD PTR -152[rbp]
	movss	DWORD PTR -332[rbp], xmm0
	movss	xmm0, DWORD PTR -148[rbp]
	movss	DWORD PTR -328[rbp], xmm0
	movss	xmm0, DWORD PTR -144[rbp]
	movss	DWORD PTR -324[rbp], xmm0
	movss	xmm0, DWORD PTR -140[rbp]
	movss	DWORD PTR -320[rbp], xmm0
	movss	xmm0, DWORD PTR -136[rbp]
	movss	DWORD PTR -316[rbp], xmm0
	movss	xmm0, DWORD PTR -132[rbp]
	movss	DWORD PTR -312[rbp], xmm0
	movss	xmm0, DWORD PTR -128[rbp]
	movss	DWORD PTR -308[rbp], xmm0
	movss	xmm0, DWORD PTR -124[rbp]
	movss	DWORD PTR -304[rbp], xmm0
	movss	xmm0, DWORD PTR -120[rbp]
	movss	DWORD PTR -300[rbp], xmm0
	movss	xmm0, DWORD PTR -116[rbp]
	movss	DWORD PTR -296[rbp], xmm0
	movss	xmm0, DWORD PTR -112[rbp]
	movss	DWORD PTR -292[rbp], xmm0
	movss	xmm0, DWORD PTR -108[rbp]
	movss	DWORD PTR -288[rbp], xmm0
	movss	xmm0, DWORD PTR -104[rbp]
	movss	DWORD PTR -284[rbp], xmm0
	movss	xmm0, DWORD PTR -100[rbp]
	movss	DWORD PTR -280[rbp], xmm0
	movss	xmm0, DWORD PTR -96[rbp]
	movss	DWORD PTR -276[rbp], xmm0
	movss	xmm0, DWORD PTR -92[rbp]
	movss	DWORD PTR -272[rbp], xmm0
	movss	xmm0, DWORD PTR -88[rbp]
	movss	DWORD PTR -268[rbp], xmm0
	movss	xmm0, DWORD PTR -84[rbp]
	movss	DWORD PTR -264[rbp], xmm0
	movss	xmm0, DWORD PTR -80[rbp]
	movss	DWORD PTR -260[rbp], xmm0
	movss	xmm0, DWORD PTR -76[rbp]
	movss	DWORD PTR -256[rbp], xmm0
	movss	xmm0, DWORD PTR -72[rbp]
	movss	DWORD PTR -252[rbp], xmm0
	movss	xmm0, DWORD PTR -68[rbp]
	movss	DWORD PTR -248[rbp], xmm0
	movss	xmm0, DWORD PTR -64[rbp]
	movss	DWORD PTR -244[rbp], xmm0
	movss	xmm0, DWORD PTR -60[rbp]
	movss	DWORD PTR -240[rbp], xmm0
	movss	xmm0, DWORD PTR -56[rbp]
	movss	DWORD PTR -236[rbp], xmm0
	movss	xmm0, DWORD PTR -52[rbp]
	movss	DWORD PTR -232[rbp], xmm0
	movss	xmm0, DWORD PTR -48[rbp]
	movss	DWORD PTR -228[rbp], xmm0
	movss	xmm0, DWORD PTR -44[rbp]
	movss	DWORD PTR -224[rbp], xmm0
	movss	xmm0, DWORD PTR -40[rbp]
	movss	DWORD PTR -220[rbp], xmm0
	movss	xmm0, DWORD PTR -36[rbp]
	movss	DWORD PTR -216[rbp], xmm0
	movss	xmm0, DWORD PTR -32[rbp]
	movss	DWORD PTR -212[rbp], xmm0
	movss	xmm0, DWORD PTR -28[rbp]
	movss	DWORD PTR -208[rbp], xmm0
	movss	xmm0, DWORD PTR -24[rbp]
	movss	DWORD PTR -204[rbp], xmm0
	movss	xmm0, DWORD PTR -20[rbp]
	movss	DWORD PTR -200[rbp], xmm0
	movss	xmm0, DWORD PTR -16[rbp]
	movss	DWORD PTR -196[rbp], xmm0
	movss	xmm0, DWORD PTR -12[rbp]
	movss	DWORD PTR -192[rbp], xmm0
	movss	xmm0, DWORD PTR -8[rbp]
	movss	DWORD PTR -188[rbp], xmm0
	movss	xmm0, DWORD PTR -4[rbp]
	movss	DWORD PTR -184[rbp], xmm0
.L6:
	cmp	DWORD PTR -180[rbp], 0
	js	.L1655
	cmp	DWORD PTR -176[rbp], 0
	jne	.L1656
.L1655:
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	main, .-main
	.section	.rodata
	.align 8
.LC0:
	.long	0
	.long	-1072431104
	.align 8
.LC1:
	.long	0
	.long	-1071513600
	.align 8
.LC2:
	.long	0
	.long	-1074790400
	.align 8
.LC3:
	.long	0
	.long	-1071120384
	.align 8
.LC4:
	.long	0
	.long	-1071251456
	.align 8
.LC5:
	.long	0
	.long	-1070858240
	.align 8
.LC6:
	.long	0
	.long	-1070989312
	.align 8
.LC7:
	.long	0
	.long	-1070465024
	.align 8
.LC8:
	.long	0
	.long	-1071382528
	.align 8
.LC9:
	.long	0
	.long	-1073217536
	.align 8
.LC10:
	.long	0
	.long	-1071906816
	.align 8
.LC11:
	.long	0
	.long	-1072693248
	.align 8
.LC12:
	.long	0
	.long	-1070399488
	.align 8
.LC13:
	.long	0
	.long	-1073741824
	.align 8
.LC14:
	.long	0
	.long	-1070333952
	.align 8
.LC15:
	.long	0
	.long	-1070727168
	.align 8
.LC16:
	.long	0
	.long	-1070596096
	.align 8
.LC17:
	.long	0
	.long	-1071644672
	.align 8
.LC18:
	.long	0
	.long	-1072168960
	.align 8
.LC19:
	.long	0
	.long	-1070530560
	.align 8
.LC20:
	.long	0
	.long	1076363264
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"658851.c"
	.text
	.align	2
	.global	__VERIFIER_nondet_bool
	.syntax unified
	.arm
	.fpu softvfp
	.type	__VERIFIER_nondet_bool, %function
__VERIFIER_nondet_bool:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	pop	{fp, pc}
	.size	__VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
	.global	__aeabi_f2d
	.global	__aeabi_dsub
	.global	__aeabi_dcmple
	.global	__aeabi_dcmpeq
	.global	__aeabi_dcmpge
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 352
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #352
	bl	__VERIFIER_nondet_int
	str	r0, [fp, #-192]
	bl	__VERIFIER_nondet_bool
	str	r0, [fp, #-364]
	bl	__VERIFIER_nondet_bool
	str	r0, [fp, #-360]
	bl	__VERIFIER_nondet_bool
	str	r0, [fp, #-356]
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-352]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-348]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-344]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-340]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-336]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-332]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-328]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-324]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-320]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-316]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-312]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-308]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-304]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-300]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-296]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-292]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-288]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-284]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-280]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-276]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-272]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-268]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-264]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-260]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-256]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-252]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-248]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-244]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-240]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-236]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-232]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-228]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-224]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-220]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-216]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-212]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-208]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-204]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-200]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-196]	@ float
	ldr	r3, [fp, #-356]
	cmp	r3, #0
	bne	.L4
	ldr	r3, [fp, #-360]
	cmp	r3, #0
	bne	.L4
	ldr	r3, [fp, #-364]
	cmp	r3, #0
	beq	.L4
	mov	r3, #1
	b	.L5
.L4:
	mov	r3, #0
.L5:
	str	r3, [fp, #-188]
	b	.L6
.L898:
	ldr	r3, [fp, #-360]
	cmp	r3, #0
	bne	.L7
	ldr	r3, [fp, #-364]
	cmp	r3, #0
	beq	.L7
	ldr	r3, [fp, #-356]
	cmp	r3, #0
	bne	.L8
	ldr	r3, [fp, #-360]
	cmp	r3, #0
	bne	.L8
	ldr	r3, [fp, #-364]
	cmp	r3, #0
	beq	.L8
.L7:
	bl	__VERIFIER_nondet_int
	str	r0, [fp, #-192]
	b	.L9
.L8:
	ldr	r3, [fp, #-192]
	sub	r3, r3, #1
	str	r3, [fp, #-192]
.L9:
	bl	__VERIFIER_nondet_bool
	str	r0, [fp, #-184]
	bl	__VERIFIER_nondet_bool
	str	r0, [fp, #-180]
	bl	__VERIFIER_nondet_bool
	str	r0, [fp, #-176]
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-172]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-168]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-164]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-160]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-156]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-152]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-148]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-144]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-140]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-136]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-132]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-128]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-124]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-120]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-116]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-112]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-108]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-104]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-100]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-96]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-92]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-88]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-84]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-80]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-76]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-72]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-68]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-64]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-60]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-56]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-52]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-48]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-44]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-40]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-36]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-32]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-28]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-24]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-20]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-16]	@ float
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L31
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L31
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L31
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L31
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L31
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L31
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L31
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L31
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L31
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L31
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L31
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L31
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L31
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L31
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L31
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L31
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L31
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L31
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L31
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L31:
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	b	.L1701
.L1702:
	.align	2
.L1700:
	.word	-1072431104
	.word	-1070858240
	.word	-1071382528
	.word	-1072693248
	.word	-1070989312
	.word	-1071251456
	.word	-1070465024
	.word	-1070399488
	.word	-1074790400
	.word	-1072431104
	.word	-1070333952
	.word	-1070727168
	.word	-1071513600
	.word	-1070596096
	.word	-1071906816
	.word	-1073217536
	.word	-1071120384
	.word	-1071644672
.L1701:
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L53
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L53
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L53
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L53
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L53
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L53
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L53
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L53
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L53
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L53
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L53
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L53
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L53
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L53
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L53
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L53
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L53
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L53
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L53
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-160]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L53:
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1700+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L75
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L75
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L75
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L75
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L75
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L75
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L75
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L75
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L75
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L75
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L75
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L75
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L75
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L75
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L75
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L75
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L75
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L75
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L75
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L75:
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L97
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L97
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L97
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L97
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L97
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L97
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L97
	b	.L1704
.L1705:
	.align	2
.L1703:
	.word	-1070399488
	.word	-1073217536
	.word	-1074790400
	.word	-1072168960
	.word	-1070465024
	.word	-1070530560
	.word	-1070399488
	.word	-1071382528
	.word	-1070596096
	.word	-1071513600
	.word	-1072431104
	.word	-1071906816
	.word	-1070727168
	.word	-1071644672
	.word	-1072693248
	.word	-1070989312
	.word	-1071120384
	.word	-1071251456
	.word	-1070333952
.L1704:
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L97
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L97
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L97
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L97
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L97
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L97
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L97
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L97
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L97
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L97
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L97
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L97
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L97:
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L119
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L119
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L119
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L119
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L119
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L119
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L119
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L119
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L119
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L119
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L119
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L119
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L119
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L119
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1703+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L119
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L119
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L119
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L119
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L119
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-164]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L119:
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L141
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L141
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L141
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L141
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L141
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L141
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L141
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L141
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L141
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L141
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L141
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L141
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L141
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L141
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L141
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L141
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L141
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L141
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L141
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L141:
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	b	.L1707
.L1708:
	.align	2
.L1706:
	.word	-1070399488
	.word	-1072693248
	.word	-1072431104
	.word	-1073217536
	.word	-1074790400
	.word	-1071251456
	.word	-1071906816
	.word	-1070333952
	.word	-1071513600
	.word	-1072168960
	.word	-1070858240
	.word	-1070399488
	.word	-1070530560
	.word	-1070727168
	.word	-1070465024
	.word	-1071382528
	.word	-1071120384
	.word	-1071644672
	.word	-1070596096
	.word	-1070989312
.L1707:
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L163
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L163
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L163
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L163
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L163
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L163
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L163
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L163
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L163
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L163
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L163
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L163
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L163
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L163
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L163
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L163
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L163
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L163
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L163
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-148]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L163:
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+76
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1706+76
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L185
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L185
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L185
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L185
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L185
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L185
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L185
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L185
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L185
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L185
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L185
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L185
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L185
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L185
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L185
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L185
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L185
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L185
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L185
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-152]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L185:
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+76
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	b	.L1710
.L1711:
	.align	2
.L1709:
	.word	-1071382528
	.word	-1071644672
	.word	-1071513600
	.word	-1072431104
	.word	-1071382528
	.word	-1073217536
	.word	-1071251456
	.word	-1070596096
	.word	-1070399488
	.word	-1074790400
	.word	-1070858240
	.word	-1070333952
	.word	-1072168960
	.word	-1070465024
	.word	-1070727168
	.word	-1071906816
	.word	-1070989312
	.word	-1070530560
	.word	-1071120384
	.word	-1072693248
.L1710:
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+76
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L207:
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+76
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+76
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1709+76
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L229:
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L251
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L251
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L251
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L251
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L251
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L251
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L251
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L251
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L251
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L251
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L251
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L251
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L251
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L251
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L251
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L251
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L251
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L251
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L251
	b	.L1713
.L1714:
	.align	2
.L1712:
	.word	-1071251456
	.word	-1070399488
	.word	-1074790400
	.word	-1071513600
	.word	-1071382528
	.word	-1070989312
	.word	-1071120384
	.word	-1071906816
	.word	-1071251456
	.word	-1072431104
	.word	-1073217536
	.word	-1070465024
	.word	-1070727168
	.word	-1072168960
	.word	-1071644672
	.word	-1070858240
	.word	-1072693248
	.word	-1070596096
	.word	-1070333952
	.word	-1070530560
.L1713:
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L251:
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L273
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L273
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L273
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L273
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L273
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L273
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L273
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L273
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L273
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L273
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L273
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L273
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L273
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L273
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L273
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L273
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L273
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L273
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L273
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L273:
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1712+76
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L295
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L295
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L295
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L295
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L295
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L295
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L295
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L295
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L295
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L295
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L295
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L295
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L295
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L295
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L295
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L295
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L295
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L295
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L295
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L295:
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	b	.L1716
.L1717:
	.align	2
.L1715:
	.word	-1072168960
	.word	-1070858240
	.word	-1070530560
	.word	-1071513600
	.word	-1072431104
	.word	-1072693248
	.word	-1071251456
	.word	-1073217536
	.word	-1070989312
	.word	-1071382528
	.word	-1071644672
	.word	-1070465024
	.word	-1071906816
	.word	-1072168960
	.word	-1074790400
	.word	-1070399488
	.word	-1070333952
	.word	-1070727168
	.word	-1070596096
.L1716:
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L317
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L317
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L317
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L317
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L317
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L317
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L317
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L317
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L317
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L317
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L317
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L317
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L317
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L317
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L317
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L317
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L317
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L317
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L317
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L317:
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L339
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L339
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L339
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1715+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L339
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L339
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L339
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L339
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L339
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L339
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L339
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L339
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L339
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L339
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L339
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L339
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L339
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L339
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L339
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L339
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L339:
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L361
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L361
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L361
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L361
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L361
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L361
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L361
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L361
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L361
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L361
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L361
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L361
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L361
	b	.L1719
.L1720:
	.align	2
.L1718:
	.word	-1071644672
	.word	-1072431104
	.word	-1070530560
	.word	-1070333952
	.word	-1071906816
	.word	-1071251456
	.word	-1070465024
	.word	-1071120384
	.word	-1071513600
	.word	-1072168960
	.word	-1073217536
	.word	-1074790400
	.word	-1070596096
	.word	-1070727168
	.word	-1070399488
	.word	-1070858240
	.word	-1072693248
	.word	-1070989312
	.word	-1071382528
.L1719:
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L361
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L361
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L361
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L361
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L361
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L361
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L361:
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L383
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L383
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L383
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L383
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L383
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L383
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L383
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L383
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L383
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L383
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L383
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L383
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L383
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L383
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L383
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L383
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L383
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L383
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L383
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L383:
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1718+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L405:
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	b	.L1722
.L1723:
	.align	2
.L1721:
	.word	-1070596096
	.word	-1074790400
	.word	-1071644672
	.word	-1070858240
	.word	-1070399488
	.word	-1072693248
	.word	-1072431104
	.word	-1072168960
	.word	-1071906816
	.word	-1071513600
	.word	-1071382528
	.word	-1070333952
	.word	-1070465024
	.word	-1070727168
	.word	-1071120384
	.word	-1070989312
	.word	-1070596096
	.word	-1071251456
	.word	-1073217536
	.word	-1070530560
.L1722:
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L427
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L427
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L427
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L427
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L427
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L427
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L427
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L427
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L427
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L427
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L427
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L427
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L427
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L427
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L427
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L427
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L427
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L427
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L427
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L427:
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+76
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+76
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+76
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+76
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1721+76
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L449
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L449
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L449
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L449
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L449
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L449
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L449
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L449
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L449
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L449
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L449
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L449
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L449
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L449
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L449
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L449
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L449
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L449
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L449
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L449:
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L471
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L471
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L471
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L471
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L471
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L471
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L471
	b	.L1725
.L1726:
	.align	2
.L1724:
	.word	-1071906816
	.word	-1071120384
	.word	-1070530560
	.word	-1070596096
	.word	-1071513600
	.word	-1072693248
	.word	-1072168960
	.word	-1070858240
	.word	-1071251456
	.word	-1070727168
	.word	-1073217536
	.word	-1070399488
	.word	-1070333952
	.word	-1070989312
	.word	-1072431104
	.word	-1071906816
	.word	-1070465024
	.word	-1071644672
	.word	-1071382528
.L1725:
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L471
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L471
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L471
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L471
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L471
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L471
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L471
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L471
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L471
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L471
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L471
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L471
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L471:
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L493
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L493
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L493
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L493
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L493
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L493
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L493
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L493
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L493
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L493
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L493
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L493
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L493
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L493
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1724+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L493
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L493
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L493
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L493
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L493
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L493:
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L515
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L515
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L515
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L515
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L515
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L515
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L515
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L515
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L515
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L515
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L515
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L515
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L515
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L515
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L515
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L515
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L515
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L515
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L515
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L515:
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	b	.L1728
.L1729:
	.align	2
.L1727:
	.word	-1070989312
	.word	-1072431104
	.word	-1072693248
	.word	-1071906816
	.word	-1070465024
	.word	-1070530560
	.word	-1070596096
	.word	-1070989312
	.word	-1071644672
	.word	-1070333952
	.word	-1070399488
	.word	-1071382528
	.word	-1074790400
	.word	-1070727168
	.word	-1073217536
	.word	-1072168960
	.word	-1071251456
	.word	-1071120384
	.word	-1070858240
.L1728:
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L537
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L537
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L537
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L537
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L537
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L537
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L537
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L537
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L537
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L537
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L537
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L537
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L537
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L537
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L537
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L537
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L537
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L537
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L537
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L537:
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1727+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L559
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L559
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L559
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L559
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L559
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L559
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L559
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L559
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L559
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L559
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L559
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L559
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L559
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L559
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L559
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L559
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L559
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L559
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L559
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L559:
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L581
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L581
	b	.L1731
.L1732:
	.align	2
.L1730:
	.word	-1074790400
	.word	-1071513600
	.word	-1073217536
	.word	-1071251456
	.word	-1070530560
	.word	-1070465024
	.word	-1070727168
	.word	-1072431104
	.word	-1071644672
	.word	-1070989312
	.word	-1071120384
	.word	-1070858240
	.word	-1071382528
	.word	-1071906816
	.word	-1072168960
.L1731:
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L581
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L581
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L581
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L581
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L581
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L581
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L581
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L581
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L581
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L581
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L581
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L581
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L581
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L581
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L581
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L581
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L581
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L581:
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L603
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L603
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L603
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L603
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L603
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L603
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L603
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L603
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L603
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1730+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L603
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L603
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L603
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L603
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L603
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L603
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L603
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L603
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L603
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L603
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L603:
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L625
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L625
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L625
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L625
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L625
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L625
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L625
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L625
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L625
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L625
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L625
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L625
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L625
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L625
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L625
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L625
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L625
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L625
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L625
	b	.L1734
.L1735:
	.align	2
.L1733:
	.word	-1070465024
	.word	-1070530560
	.word	-1070727168
	.word	-1071513600
	.word	-1070333952
	.word	-1070858240
	.word	-1071120384
	.word	-1071251456
	.word	-1070596096
	.word	-1072431104
	.word	-1072693248
	.word	-1071906816
	.word	-1073217536
	.word	-1070399488
	.word	-1071382528
	.word	-1070989312
	.word	-1074790400
	.word	-1070465024
	.word	-1072168960
.L1734:
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L625:
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L647
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L647
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L647
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L647
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L647
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L647
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L647
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L647
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L647
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L647
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L647
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L647
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L647
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L647
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L647
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L647
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L647
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L647
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L647
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L647:
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1733+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+76
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L669
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L669
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L669
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L669
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L669
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L669
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L669
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L669
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L669
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L669
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L669
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L669
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L669
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L669
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L669
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L669
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L669
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L669
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+76
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L669
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L669:
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+76
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	b	.L1737
.L1738:
	.align	2
.L1736:
	.word	-1072693248
	.word	-1070465024
	.word	-1072693248
	.word	-1071644672
	.word	-1071251456
	.word	-1074790400
	.word	-1072168960
	.word	-1072431104
	.word	-1071513600
	.word	-1073217536
	.word	-1070727168
	.word	-1071120384
	.word	-1070333952
	.word	-1070989312
	.word	-1070399488
	.word	-1071906816
	.word	-1071382528
	.word	-1070596096
	.word	-1070858240
	.word	-1070530560
.L1737:
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L691
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L691
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L691
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+76
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L691
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L691
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L691
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L691
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L691
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L691
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L691
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L691
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L691
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L691
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L691
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L691
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L691
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L691
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L691
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L691
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L691:
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+76
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L713
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L713
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1736+76
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L713
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L713
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L713
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L713
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L713
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L713
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L713
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L713
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L713
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L713
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L713
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L713
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L713
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L713
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L713
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L713
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L713
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L713:
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L735
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L735
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L735
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L735
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L735
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L735
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L735
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L735
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L735
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L735
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L735
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L735
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L735
	b	.L1740
.L1741:
	.align	2
.L1739:
	.word	-1072168960
	.word	-1070727168
	.word	-1070858240
	.word	-1071644672
	.word	-1072693248
	.word	-1072168960
	.word	-1070989312
	.word	-1070399488
	.word	-1074790400
	.word	-1070530560
	.word	-1070596096
	.word	-1071513600
	.word	-1070333952
	.word	-1071120384
	.word	-1073217536
	.word	-1072431104
	.word	-1071382528
	.word	-1071906816
	.word	-1071251456
.L1740:
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L735
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L735
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L735
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L735
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L735
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L735
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L735:
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L757
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L757
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L757
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L757
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L757
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L757
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L757
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L757
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L757
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L757
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L757
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L757
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L757
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L757
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L757
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L757
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L757
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L757
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L757
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L757:
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1739+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+76
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L779
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L779
	ldr	r0, [fp, #-352]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L779
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L779
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L779
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+76
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L779
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L779
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L779
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L779
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L779
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L779
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L779
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L779
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L779
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L779
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L779
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L779
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L779
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L779
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L779:
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	b	.L1743
.L1744:
	.align	2
.L1742:
	.word	-1070858240
	.word	-1072431104
	.word	-1070333952
	.word	-1073217536
	.word	-1070399488
	.word	-1070596096
	.word	-1070530560
	.word	-1071644672
	.word	-1070858240
	.word	-1071120384
	.word	-1070989312
	.word	-1072168960
	.word	-1070727168
	.word	-1071513600
	.word	-1074790400
	.word	-1071906816
	.word	-1072693248
	.word	-1071382528
	.word	-1071251456
	.word	-1070465024
.L1743:
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L801
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L801
	ldr	r0, [fp, #-324]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L801
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L801
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L801
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L801
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L801
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L801
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L801
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L801
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L801
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L801
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L801
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L801
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L801
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L801
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L801
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L801
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L801
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L801:
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1742+76
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L823
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L823
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L823
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L823
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L823
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L823
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L823
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L823
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L823
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L823
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L823
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L823
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L823
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L823
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L823
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L823
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L823
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L823
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L823
	ldr	r0, [fp, #-348]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L823:
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L845
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L845
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L845
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L845
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L845
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L845
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L845
	b	.L1746
.L1747:
	.align	2
.L1745:
	.word	-1073217536
	.word	-1074790400
	.word	-1072693248
	.word	-1071382528
	.word	-1070596096
	.word	-1070333952
	.word	-1071513600
	.word	-1070530560
	.word	-1071906816
	.word	-1071251456
	.word	-1070727168
	.word	-1070858240
	.word	-1070989312
	.word	-1071120384
	.word	-1072431104
	.word	-1070465024
	.word	-1071644672
	.word	-1072168960
.L1746:
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L845
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L845
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L845
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L845
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L845
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L845
	ldr	r0, [fp, #-304]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L845
	ldr	r0, [fp, #-312]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L845
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L845
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L845
	ldr	r0, [fp, #-332]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L845
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L845
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-144]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L845:
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L867
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L867
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L867
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L867
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L867
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L867
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L867
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L867
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L867
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L867
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L867
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L867
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L867
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L867
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1745+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L867
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L867
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L867
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L867
	ldr	r0, [fp, #-320]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L867
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L867:
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L889
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L889
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L889
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L889
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L889
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L889
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L889
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L889
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L889
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L889
	ldr	r0, [fp, #-276]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L889
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L889
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L889
	ldr	r0, [fp, #-296]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L889
	ldr	r0, [fp, #-300]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L889
	ldr	r0, [fp, #-316]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L889
	ldr	r0, [fp, #-328]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L889
	ldr	r0, [fp, #-336]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L889
	ldr	r0, [fp, #-340]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L889
	ldr	r0, [fp, #-344]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1748+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L889:
	ldr	r3, [fp, #-176]
	cmp	r3, #0
	bne	.L891
	ldr	r3, [fp, #-180]
	cmp	r3, #0
	bne	.L891
	ldr	r3, [fp, #-184]
	cmp	r3, #0
	bne	.L892
.L891:
	mov	r2, #1
	b	.L893
.L892:
	mov	r2, #0
.L893:
	ldr	r3, [fp, #-356]
	cmp	r2, r3
	bne	.L10
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r3, #1
	mov	r4, r3
	mov	r2, #0
	ldr	r3, .L1748+20
	bl	__aeabi_dcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L894
	mov	r3, #0
	mov	r4, r3
.L894:
	and	r3, r4, #255
	mov	r2, r3
	ldr	r3, [fp, #-364]
	cmp	r3, r2
	bne	.L10
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r3, #1
	mov	r4, r3
	mov	r2, #0
	ldr	r3, .L1748+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L895
	mov	r3, #0
	mov	r4, r3
.L895:
	and	r3, r4, #255
	mov	r2, r3
	ldr	r3, [fp, #-360]
	cmp	r3, r2
	bne	.L10
	mov	r3, #1
	b	.L896
.L1749:
	.align	2
.L1748:
	.word	-1071120384
	.word	-1070989312
	.word	-1070858240
	.word	-1071513600
	.word	-1070530560
	.word	-1072168960
	.word	-1071644672
	.word	-1072693248
	.word	-1071251456
	.word	-1070399488
	.word	-1070727168
	.word	-1070333952
	.word	1076363264
.L10:
	mov	r3, #0
.L896:
	str	r3, [fp, #-188]
	ldr	r3, [fp, #-184]
	str	r3, [fp, #-364]
	ldr	r3, [fp, #-180]
	str	r3, [fp, #-360]
	ldr	r3, [fp, #-176]
	str	r3, [fp, #-356]
	ldr	r3, [fp, #-172]	@ float
	str	r3, [fp, #-352]	@ float
	ldr	r3, [fp, #-168]	@ float
	str	r3, [fp, #-348]	@ float
	ldr	r3, [fp, #-164]	@ float
	str	r3, [fp, #-344]	@ float
	ldr	r3, [fp, #-160]	@ float
	str	r3, [fp, #-340]	@ float
	ldr	r3, [fp, #-156]	@ float
	str	r3, [fp, #-336]	@ float
	ldr	r3, [fp, #-152]	@ float
	str	r3, [fp, #-332]	@ float
	ldr	r3, [fp, #-148]	@ float
	str	r3, [fp, #-328]	@ float
	ldr	r3, [fp, #-144]	@ float
	str	r3, [fp, #-324]	@ float
	ldr	r3, [fp, #-140]	@ float
	str	r3, [fp, #-320]	@ float
	ldr	r3, [fp, #-136]	@ float
	str	r3, [fp, #-316]	@ float
	ldr	r3, [fp, #-132]	@ float
	str	r3, [fp, #-312]	@ float
	ldr	r3, [fp, #-128]	@ float
	str	r3, [fp, #-308]	@ float
	ldr	r3, [fp, #-124]	@ float
	str	r3, [fp, #-304]	@ float
	ldr	r3, [fp, #-120]	@ float
	str	r3, [fp, #-300]	@ float
	ldr	r3, [fp, #-116]	@ float
	str	r3, [fp, #-296]	@ float
	ldr	r3, [fp, #-112]	@ float
	str	r3, [fp, #-292]	@ float
	ldr	r3, [fp, #-108]	@ float
	str	r3, [fp, #-288]	@ float
	ldr	r3, [fp, #-104]	@ float
	str	r3, [fp, #-284]	@ float
	ldr	r3, [fp, #-100]	@ float
	str	r3, [fp, #-280]	@ float
	ldr	r3, [fp, #-96]	@ float
	str	r3, [fp, #-276]	@ float
	ldr	r3, [fp, #-92]	@ float
	str	r3, [fp, #-272]	@ float
	ldr	r3, [fp, #-88]	@ float
	str	r3, [fp, #-268]	@ float
	ldr	r3, [fp, #-84]	@ float
	str	r3, [fp, #-264]	@ float
	ldr	r3, [fp, #-80]	@ float
	str	r3, [fp, #-260]	@ float
	ldr	r3, [fp, #-76]	@ float
	str	r3, [fp, #-256]	@ float
	ldr	r3, [fp, #-72]	@ float
	str	r3, [fp, #-252]	@ float
	ldr	r3, [fp, #-68]	@ float
	str	r3, [fp, #-248]	@ float
	ldr	r3, [fp, #-64]	@ float
	str	r3, [fp, #-244]	@ float
	ldr	r3, [fp, #-60]	@ float
	str	r3, [fp, #-240]	@ float
	ldr	r3, [fp, #-56]	@ float
	str	r3, [fp, #-236]	@ float
	ldr	r3, [fp, #-52]	@ float
	str	r3, [fp, #-232]	@ float
	ldr	r3, [fp, #-48]	@ float
	str	r3, [fp, #-228]	@ float
	ldr	r3, [fp, #-44]	@ float
	str	r3, [fp, #-224]	@ float
	ldr	r3, [fp, #-40]	@ float
	str	r3, [fp, #-220]	@ float
	ldr	r3, [fp, #-36]	@ float
	str	r3, [fp, #-216]	@ float
	ldr	r3, [fp, #-32]	@ float
	str	r3, [fp, #-212]	@ float
	ldr	r3, [fp, #-28]	@ float
	str	r3, [fp, #-208]	@ float
	ldr	r3, [fp, #-24]	@ float
	str	r3, [fp, #-204]	@ float
	ldr	r3, [fp, #-20]	@ float
	str	r3, [fp, #-200]	@ float
	ldr	r3, [fp, #-16]	@ float
	str	r3, [fp, #-196]	@ float
.L6:
	ldr	r3, [fp, #-192]
	cmp	r3, #0
	blt	.L897
	ldr	r3, [fp, #-188]
	cmp	r3, #0
	bne	.L898
.L897:
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
