	.file	"723789.c"
	.intel_syntax noprefix
	.text
	.globl	dflt_uint64
	.type	dflt_uint64, @function
dflt_uint64:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	dflt_uint64, .-dflt_uint64
	.globl	get_uint64
	.type	get_uint64, @function
get_uint64:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	get_uint64, .-get_uint64
	.globl	rtn_uint64
	.type	rtn_uint64, @function
rtn_uint64:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	rtn_uint64, .-rtn_uint64
	.globl	rel_uint64
	.type	rel_uint64, @function
rel_uint64:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	rel_uint64, .-rel_uint64
	.globl	litrl_uint64
	.type	litrl_uint64, @function
litrl_uint64:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	litrl_uint64, .-litrl_uint64
	.globl	dflt_uint32
	.type	dflt_uint32, @function
dflt_uint32:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	dflt_uint32, .-dflt_uint32
	.globl	get_uint32
	.type	get_uint32, @function
get_uint32:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	get_uint32, .-get_uint32
	.globl	rtn_uint32
	.type	rtn_uint32, @function
rtn_uint32:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	rtn_uint32, .-rtn_uint32
	.globl	rel_uint32
	.type	rel_uint32, @function
rel_uint32:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	rel_uint32, .-rel_uint32
	.globl	litrl_uint32
	.type	litrl_uint32, @function
litrl_uint32:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	litrl_uint32, .-litrl_uint32
	.globl	dflt_uint16
	.type	dflt_uint16, @function
dflt_uint16:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	dflt_uint16, .-dflt_uint16
	.globl	get_uint16
	.type	get_uint16, @function
get_uint16:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	WORD PTR -2[rbp], di
	movzx	eax, WORD PTR -2[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	get_uint16, .-get_uint16
	.globl	rtn_uint16
	.type	rtn_uint16, @function
rtn_uint16:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	WORD PTR -2[rbp], di
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	rtn_uint16, .-rtn_uint16
	.globl	rel_uint16
	.type	rel_uint16, @function
rel_uint16:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	WORD PTR -2[rbp], di
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	rel_uint16, .-rel_uint16
	.globl	litrl_uint16
	.type	litrl_uint16, @function
litrl_uint16:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	WORD PTR -4[rbp], ax
	movzx	eax, WORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	litrl_uint16, .-litrl_uint16
	.globl	dflt_uint8
	.type	dflt_uint8, @function
dflt_uint8:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	dflt_uint8, .-dflt_uint8
	.globl	get_uint8
	.type	get_uint8, @function
get_uint8:
.LFB16:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR -1[rbp], dil
	movzx	eax, BYTE PTR -1[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE16:
	.size	get_uint8, .-get_uint8
	.globl	rtn_uint8
	.type	rtn_uint8, @function
rtn_uint8:
.LFB17:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR -1[rbp], dil
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE17:
	.size	rtn_uint8, .-rtn_uint8
	.globl	rel_uint8
	.type	rel_uint8, @function
rel_uint8:
.LFB18:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR -1[rbp], dil
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE18:
	.size	rel_uint8, .-rel_uint8
	.globl	litrl_uint8
	.type	litrl_uint8, @function
litrl_uint8:
.LFB19:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	BYTE PTR -4[rbp], al
	movzx	eax, BYTE PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE19:
	.size	litrl_uint8, .-litrl_uint8
	.globl	dflt_int64
	.type	dflt_int64, @function
dflt_int64:
.LFB20:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE20:
	.size	dflt_int64, .-dflt_int64
	.globl	get_int64
	.type	get_int64, @function
get_int64:
.LFB21:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE21:
	.size	get_int64, .-get_int64
	.globl	rtn_int64
	.type	rtn_int64, @function
rtn_int64:
.LFB22:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE22:
	.size	rtn_int64, .-rtn_int64
	.globl	rel_int64
	.type	rel_int64, @function
rel_int64:
.LFB23:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE23:
	.size	rel_int64, .-rel_int64
	.globl	litrl_int64
	.type	litrl_int64, @function
litrl_int64:
.LFB24:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE24:
	.size	litrl_int64, .-litrl_int64
	.globl	dflt_int32
	.type	dflt_int32, @function
dflt_int32:
.LFB25:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE25:
	.size	dflt_int32, .-dflt_int32
	.globl	get_int32
	.type	get_int32, @function
get_int32:
.LFB26:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE26:
	.size	get_int32, .-get_int32
	.globl	rtn_int32
	.type	rtn_int32, @function
rtn_int32:
.LFB27:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE27:
	.size	rtn_int32, .-rtn_int32
	.globl	rel_int32
	.type	rel_int32, @function
rel_int32:
.LFB28:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE28:
	.size	rel_int32, .-rel_int32
	.globl	litrl_int32
	.type	litrl_int32, @function
litrl_int32:
.LFB29:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE29:
	.size	litrl_int32, .-litrl_int32
	.globl	dflt_int16
	.type	dflt_int16, @function
dflt_int16:
.LFB30:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE30:
	.size	dflt_int16, .-dflt_int16
	.globl	get_int16
	.type	get_int16, @function
get_int16:
.LFB31:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	WORD PTR -2[rbp], di
	movzx	eax, WORD PTR -2[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE31:
	.size	get_int16, .-get_int16
	.globl	rtn_int16
	.type	rtn_int16, @function
rtn_int16:
.LFB32:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	WORD PTR -2[rbp], di
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE32:
	.size	rtn_int16, .-rtn_int16
	.globl	rel_int16
	.type	rel_int16, @function
rel_int16:
.LFB33:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	WORD PTR -2[rbp], di
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE33:
	.size	rel_int16, .-rel_int16
	.globl	litrl_int16
	.type	litrl_int16, @function
litrl_int16:
.LFB34:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	WORD PTR -4[rbp], ax
	movzx	eax, WORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE34:
	.size	litrl_int16, .-litrl_int16
	.globl	dflt_int8
	.type	dflt_int8, @function
dflt_int8:
.LFB35:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE35:
	.size	dflt_int8, .-dflt_int8
	.globl	get_int8
	.type	get_int8, @function
get_int8:
.LFB36:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR -1[rbp], dil
	movzx	eax, BYTE PTR -1[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE36:
	.size	get_int8, .-get_int8
	.globl	rtn_int8
	.type	rtn_int8, @function
rtn_int8:
.LFB37:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR -1[rbp], dil
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE37:
	.size	rtn_int8, .-rtn_int8
	.globl	rel_int8
	.type	rel_int8, @function
rel_int8:
.LFB38:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR -1[rbp], dil
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE38:
	.size	rel_int8, .-rel_int8
	.globl	litrl_int8
	.type	litrl_int8, @function
litrl_int8:
.LFB39:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	BYTE PTR -4[rbp], al
	movzx	eax, BYTE PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE39:
	.size	litrl_int8, .-litrl_int8
	.globl	dflt_float32
	.type	dflt_float32, @function
dflt_float32:
.LFB40:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	pxor	xmm0, xmm0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE40:
	.size	dflt_float32, .-dflt_float32
	.globl	get_float32
	.type	get_float32, @function
get_float32:
.LFB41:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	xmm0, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE41:
	.size	get_float32, .-get_float32
	.globl	rtn_float32
	.type	rtn_float32, @function
rtn_float32:
.LFB42:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE42:
	.size	rtn_float32, .-rtn_float32
	.globl	rel_float32
	.type	rel_float32, @function
rel_float32:
.LFB43:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE43:
	.size	rel_float32, .-rel_float32
	.globl	litrl_float32
	.type	litrl_float32, @function
litrl_float32:
.LFB44:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	xmm0, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE44:
	.size	litrl_float32, .-litrl_float32
	.globl	dflt_float64
	.type	dflt_float64, @function
dflt_float64:
.LFB45:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	pxor	xmm0, xmm0
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE45:
	.size	dflt_float64, .-dflt_float64
	.globl	get_float64
	.type	get_float64, @function
get_float64:
.LFB46:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	xmm0, QWORD PTR -8[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE46:
	.size	get_float64, .-get_float64
	.globl	rtn_float64
	.type	rtn_float64, @function
rtn_float64:
.LFB47:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE47:
	.size	rtn_float64, .-rtn_float64
	.globl	rel_float64
	.type	rel_float64, @function
rel_float64:
.LFB48:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE48:
	.size	rel_float64, .-rel_float64
	.globl	litrl_float64
	.type	litrl_float64, @function
litrl_float64:
.LFB49:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	xmm0, QWORD PTR -8[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE49:
	.size	litrl_float64, .-litrl_float64
	.globl	cast_uint32_to_uint64
	.type	cast_uint32_to_uint64, @function
cast_uint32_to_uint64:
.LFB50:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	mov	eax, eax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE50:
	.size	cast_uint32_to_uint64, .-cast_uint32_to_uint64
	.globl	cast_int32_to_int64
	.type	cast_int32_to_int64, @function
cast_int32_to_int64:
.LFB51:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE51:
	.size	cast_int32_to_int64, .-cast_int32_to_int64
	.globl	cast_uint16_to_uint64
	.type	cast_uint16_to_uint64, @function
cast_uint16_to_uint64:
.LFB52:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	WORD PTR -2[rbp], di
	movzx	eax, WORD PTR -2[rbp]
	movzx	eax, ax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE52:
	.size	cast_uint16_to_uint64, .-cast_uint16_to_uint64
	.globl	cast_int16_to_int64
	.type	cast_int16_to_int64, @function
cast_int16_to_int64:
.LFB53:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	WORD PTR -2[rbp], di
	movzx	eax, WORD PTR -2[rbp]
	movsx	rax, ax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE53:
	.size	cast_int16_to_int64, .-cast_int16_to_int64
	.globl	cast_uint8_to_uint64
	.type	cast_uint8_to_uint64, @function
cast_uint8_to_uint64:
.LFB54:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR -1[rbp], dil
	movzx	eax, BYTE PTR -1[rbp]
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE54:
	.size	cast_uint8_to_uint64, .-cast_uint8_to_uint64
	.globl	cast_int8_to_int64
	.type	cast_int8_to_int64, @function
cast_int8_to_int64:
.LFB55:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR -1[rbp], dil
	movzx	eax, BYTE PTR -1[rbp]
	movsx	rax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE55:
	.size	cast_int8_to_int64, .-cast_int8_to_int64
	.globl	cast_uint16_to_uint32
	.type	cast_uint16_to_uint32, @function
cast_uint16_to_uint32:
.LFB56:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	WORD PTR -2[rbp], di
	movzx	eax, WORD PTR -2[rbp]
	movzx	eax, ax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE56:
	.size	cast_uint16_to_uint32, .-cast_uint16_to_uint32
	.globl	cast_int16_to_int32
	.type	cast_int16_to_int32, @function
cast_int16_to_int32:
.LFB57:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	WORD PTR -2[rbp], di
	movzx	eax, WORD PTR -2[rbp]
	cwde
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE57:
	.size	cast_int16_to_int32, .-cast_int16_to_int32
	.globl	cast_uint8_to_uint32
	.type	cast_uint8_to_uint32, @function
cast_uint8_to_uint32:
.LFB58:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR -1[rbp], dil
	movzx	eax, BYTE PTR -1[rbp]
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE58:
	.size	cast_uint8_to_uint32, .-cast_uint8_to_uint32
	.globl	cast_int8_to_int32
	.type	cast_int8_to_int32, @function
cast_int8_to_int32:
.LFB59:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR -1[rbp], dil
	movzx	eax, BYTE PTR -1[rbp]
	movsx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE59:
	.size	cast_int8_to_int32, .-cast_int8_to_int32
	.globl	cast_uint8_to_uint16
	.type	cast_uint8_to_uint16, @function
cast_uint8_to_uint16:
.LFB60:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR -1[rbp], dil
	movzx	eax, BYTE PTR -1[rbp]
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE60:
	.size	cast_uint8_to_uint16, .-cast_uint8_to_uint16
	.globl	cast_int8_to_int16
	.type	cast_int8_to_int16, @function
cast_int8_to_int16:
.LFB61:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR -1[rbp], dil
	movzx	eax, BYTE PTR -1[rbp]
	cbw
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE61:
	.size	cast_int8_to_int16, .-cast_int8_to_int16
	.globl	cast_float32_to_float64
	.type	cast_float32_to_float64, @function
cast_float32_to_float64:
.LFB62:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	xmm0, DWORD PTR -4[rbp]
	cvtss2sd	xmm0, xmm0
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE62:
	.size	cast_float32_to_float64, .-cast_float32_to_float64
	.globl	add_uint64_uint64
	.type	add_uint64_uint64, @function
add_uint64_uint64:
.LFB63:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE63:
	.size	add_uint64_uint64, .-add_uint64_uint64
	.globl	add_int64_int64
	.type	add_int64_int64, @function
add_int64_int64:
.LFB64:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE64:
	.size	add_int64_int64, .-add_int64_int64
	.globl	add_uint32_uint32
	.type	add_uint32_uint32, @function
add_uint32_uint32:
.LFB65:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	edx, DWORD PTR -4[rbp]
	mov	eax, DWORD PTR -8[rbp]
	add	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE65:
	.size	add_uint32_uint32, .-add_uint32_uint32
	.globl	add_int32_int32
	.type	add_int32_int32, @function
add_int32_int32:
.LFB66:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	edx, DWORD PTR -4[rbp]
	mov	eax, DWORD PTR -8[rbp]
	add	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE66:
	.size	add_int32_int32, .-add_int32_int32
	.globl	add_uint16_uint16
	.type	add_uint16_uint16, @function
add_uint16_uint16:
.LFB67:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	WORD PTR -2[rbp], di
	mov	WORD PTR -4[rbp], si
	movzx	edx, WORD PTR -2[rbp]
	movzx	eax, WORD PTR -4[rbp]
	add	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE67:
	.size	add_uint16_uint16, .-add_uint16_uint16
	.globl	add_int16_int16
	.type	add_int16_int16, @function
add_int16_int16:
.LFB68:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	WORD PTR -2[rbp], di
	mov	WORD PTR -4[rbp], si
	movzx	eax, WORD PTR -2[rbp]
	mov	edx, eax
	movzx	eax, WORD PTR -4[rbp]
	add	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE68:
	.size	add_int16_int16, .-add_int16_int16
	.globl	add_uint8_uint8
	.type	add_uint8_uint8, @function
add_uint8_uint8:
.LFB69:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR -1[rbp], dil
	mov	BYTE PTR -2[rbp], sil
	movzx	edx, BYTE PTR -1[rbp]
	movzx	eax, BYTE PTR -2[rbp]
	add	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE69:
	.size	add_uint8_uint8, .-add_uint8_uint8
	.globl	add_int8_int8
	.type	add_int8_int8, @function
add_int8_int8:
.LFB70:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR -1[rbp], dil
	mov	BYTE PTR -2[rbp], sil
	movzx	eax, BYTE PTR -1[rbp]
	mov	edx, eax
	movzx	eax, BYTE PTR -2[rbp]
	add	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE70:
	.size	add_int8_int8, .-add_int8_int8
	.globl	add_float32_float32
	.type	add_float32_float32, @function
add_float32_float32:
.LFB71:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	DWORD PTR -8[rbp], xmm1
	movss	xmm1, DWORD PTR -4[rbp]
	movss	xmm0, DWORD PTR -8[rbp]
	addss	xmm0, xmm1
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE71:
	.size	add_float32_float32, .-add_float32_float32
	.globl	add_float64_float64
	.type	add_float64_float64, @function
add_float64_float64:
.LFB72:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	QWORD PTR -16[rbp], xmm1
	movsd	xmm1, QWORD PTR -8[rbp]
	movsd	xmm0, QWORD PTR -16[rbp]
	addsd	xmm0, xmm1
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE72:
	.size	add_float64_float64, .-add_float64_float64
	.globl	sub_uint64_uint64
	.type	sub_uint64_uint64, @function
sub_uint64_uint64:
.LFB73:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -8[rbp]
	mov	rdx, QWORD PTR -16[rbp]
	sub	rax, rdx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE73:
	.size	sub_uint64_uint64, .-sub_uint64_uint64
	.globl	sub_int64_int64
	.type	sub_int64_int64, @function
sub_int64_int64:
.LFB74:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -8[rbp]
	mov	rdx, QWORD PTR -16[rbp]
	sub	rax, rdx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE74:
	.size	sub_int64_int64, .-sub_int64_int64
	.globl	sub_uint32_uint32
	.type	sub_uint32_uint32, @function
sub_uint32_uint32:
.LFB75:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, DWORD PTR -8[rbp]
	sub	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE75:
	.size	sub_uint32_uint32, .-sub_uint32_uint32
	.globl	sub_int32_int32
	.type	sub_int32_int32, @function
sub_int32_int32:
.LFB76:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, DWORD PTR -8[rbp]
	sub	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE76:
	.size	sub_int32_int32, .-sub_int32_int32
	.globl	sub_uint16_uint16
	.type	sub_uint16_uint16, @function
sub_uint16_uint16:
.LFB77:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	WORD PTR -2[rbp], di
	mov	WORD PTR -4[rbp], si
	movzx	eax, WORD PTR -2[rbp]
	movzx	edx, WORD PTR -4[rbp]
	sub	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE77:
	.size	sub_uint16_uint16, .-sub_uint16_uint16
	.globl	sub_int16_int16
	.type	sub_int16_int16, @function
sub_int16_int16:
.LFB78:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	WORD PTR -2[rbp], di
	mov	WORD PTR -4[rbp], si
	movzx	eax, WORD PTR -2[rbp]
	mov	edx, eax
	movzx	eax, WORD PTR -4[rbp]
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE78:
	.size	sub_int16_int16, .-sub_int16_int16
	.globl	sub_uint8_uint8
	.type	sub_uint8_uint8, @function
sub_uint8_uint8:
.LFB79:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR -1[rbp], dil
	mov	BYTE PTR -2[rbp], sil
	movzx	eax, BYTE PTR -1[rbp]
	movzx	edx, BYTE PTR -2[rbp]
	sub	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE79:
	.size	sub_uint8_uint8, .-sub_uint8_uint8
	.globl	sub_int8_int8
	.type	sub_int8_int8, @function
sub_int8_int8:
.LFB80:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR -1[rbp], dil
	mov	BYTE PTR -2[rbp], sil
	movzx	eax, BYTE PTR -1[rbp]
	mov	edx, eax
	movzx	eax, BYTE PTR -2[rbp]
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE80:
	.size	sub_int8_int8, .-sub_int8_int8
	.globl	sub_float32_float32
	.type	sub_float32_float32, @function
sub_float32_float32:
.LFB81:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	DWORD PTR -8[rbp], xmm1
	movss	xmm0, DWORD PTR -4[rbp]
	movss	xmm1, DWORD PTR -8[rbp]
	subss	xmm0, xmm1
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE81:
	.size	sub_float32_float32, .-sub_float32_float32
	.globl	sub_float64_float64
	.type	sub_float64_float64, @function
sub_float64_float64:
.LFB82:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	QWORD PTR -16[rbp], xmm1
	movsd	xmm0, QWORD PTR -8[rbp]
	movsd	xmm1, QWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE82:
	.size	sub_float64_float64, .-sub_float64_float64
	.globl	mul_uint64_uint64
	.type	mul_uint64_uint64, @function
mul_uint64_uint64:
.LFB83:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	imul	rax, rdx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE83:
	.size	mul_uint64_uint64, .-mul_uint64_uint64
	.globl	mul_int64_int64
	.type	mul_int64_int64, @function
mul_int64_int64:
.LFB84:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	imul	rax, rdx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE84:
	.size	mul_int64_int64, .-mul_int64_int64
	.globl	mul_uint32_uint32
	.type	mul_uint32_uint32, @function
mul_uint32_uint32:
.LFB85:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	edx, DWORD PTR -4[rbp]
	mov	eax, DWORD PTR -8[rbp]
	imul	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE85:
	.size	mul_uint32_uint32, .-mul_uint32_uint32
	.globl	mul_int32_int32
	.type	mul_int32_int32, @function
mul_int32_int32:
.LFB86:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	edx, DWORD PTR -4[rbp]
	mov	eax, DWORD PTR -8[rbp]
	imul	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE86:
	.size	mul_int32_int32, .-mul_int32_int32
	.globl	mul_uint16_uint16
	.type	mul_uint16_uint16, @function
mul_uint16_uint16:
.LFB87:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	WORD PTR -2[rbp], di
	mov	WORD PTR -4[rbp], si
	movzx	edx, WORD PTR -2[rbp]
	movzx	eax, WORD PTR -4[rbp]
	imul	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE87:
	.size	mul_uint16_uint16, .-mul_uint16_uint16
	.globl	mul_int16_int16
	.type	mul_int16_int16, @function
mul_int16_int16:
.LFB88:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	WORD PTR -2[rbp], di
	mov	WORD PTR -4[rbp], si
	movzx	eax, WORD PTR -2[rbp]
	mov	edx, eax
	movzx	eax, WORD PTR -4[rbp]
	imul	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE88:
	.size	mul_int16_int16, .-mul_int16_int16
	.globl	mul_uint8_uint8
	.type	mul_uint8_uint8, @function
mul_uint8_uint8:
.LFB89:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR -1[rbp], dil
	mov	BYTE PTR -2[rbp], sil
	movzx	eax, BYTE PTR -1[rbp]
	movzx	edx, BYTE PTR -2[rbp]
	imul	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE89:
	.size	mul_uint8_uint8, .-mul_uint8_uint8
	.globl	mul_int8_int8
	.type	mul_int8_int8, @function
mul_int8_int8:
.LFB90:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR -1[rbp], dil
	mov	BYTE PTR -2[rbp], sil
	movzx	eax, BYTE PTR -1[rbp]
	mov	ecx, eax
	movzx	eax, BYTE PTR -2[rbp]
	mov	edx, eax
	mov	eax, ecx
	imul	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE90:
	.size	mul_int8_int8, .-mul_int8_int8
	.globl	mul_float32_float32
	.type	mul_float32_float32, @function
mul_float32_float32:
.LFB91:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	DWORD PTR -8[rbp], xmm1
	movss	xmm1, DWORD PTR -4[rbp]
	movss	xmm0, DWORD PTR -8[rbp]
	mulss	xmm0, xmm1
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE91:
	.size	mul_float32_float32, .-mul_float32_float32
	.globl	mul_float64_float64
	.type	mul_float64_float64, @function
mul_float64_float64:
.LFB92:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	QWORD PTR -16[rbp], xmm1
	movsd	xmm1, QWORD PTR -8[rbp]
	movsd	xmm0, QWORD PTR -16[rbp]
	mulsd	xmm0, xmm1
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE92:
	.size	mul_float64_float64, .-mul_float64_float64
	.globl	div_uint64_uint64
	.type	div_uint64_uint64, @function
div_uint64_uint64:
.LFB93:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -8[rbp]
	mov	rcx, QWORD PTR -16[rbp]
	mov	edx, 0
	div	rcx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE93:
	.size	div_uint64_uint64, .-div_uint64_uint64
	.globl	div_int64_int64
	.type	div_int64_int64, @function
div_int64_int64:
.LFB94:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -8[rbp]
	mov	rcx, QWORD PTR -16[rbp]
	cqo
	idiv	rcx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE94:
	.size	div_int64_int64, .-div_int64_int64
	.globl	div_uint32_uint32
	.type	div_uint32_uint32, @function
div_uint32_uint32:
.LFB95:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -4[rbp]
	mov	ecx, DWORD PTR -8[rbp]
	mov	edx, 0
	div	ecx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE95:
	.size	div_uint32_uint32, .-div_uint32_uint32
	.globl	div_int32_int32
	.type	div_int32_int32, @function
div_int32_int32:
.LFB96:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -4[rbp]
	mov	ecx, DWORD PTR -8[rbp]
	cdq
	idiv	ecx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE96:
	.size	div_int32_int32, .-div_int32_int32
	.globl	div_uint16_uint16
	.type	div_uint16_uint16, @function
div_uint16_uint16:
.LFB97:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	WORD PTR -2[rbp], di
	mov	WORD PTR -4[rbp], si
	movzx	eax, WORD PTR -2[rbp]
	movzx	ecx, WORD PTR -4[rbp]
	mov	edx, 0
	div	cx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE97:
	.size	div_uint16_uint16, .-div_uint16_uint16
	.globl	div_int16_int16
	.type	div_int16_int16, @function
div_int16_int16:
.LFB98:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	WORD PTR -2[rbp], di
	mov	WORD PTR -4[rbp], si
	movzx	eax, WORD PTR -2[rbp]
	cwde
	movzx	edx, WORD PTR -4[rbp]
	movsx	ecx, dx
	cdq
	idiv	ecx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE98:
	.size	div_int16_int16, .-div_int16_int16
	.globl	div_uint8_uint8
	.type	div_uint8_uint8, @function
div_uint8_uint8:
.LFB99:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR -1[rbp], dil
	mov	BYTE PTR -2[rbp], sil
	movzx	eax, BYTE PTR -1[rbp]
	movzx	edx, BYTE PTR -2[rbp]
	movzx	eax, al
	div	dl
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE99:
	.size	div_uint8_uint8, .-div_uint8_uint8
	.globl	div_int8_int8
	.type	div_int8_int8, @function
div_int8_int8:
.LFB100:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR -1[rbp], dil
	mov	BYTE PTR -2[rbp], sil
	movzx	eax, BYTE PTR -1[rbp]
	movsx	eax, al
	movzx	edx, BYTE PTR -2[rbp]
	movsx	ecx, dl
	cdq
	idiv	ecx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE100:
	.size	div_int8_int8, .-div_int8_int8
	.globl	div_float32_float32
	.type	div_float32_float32, @function
div_float32_float32:
.LFB101:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	DWORD PTR -8[rbp], xmm1
	movss	xmm0, DWORD PTR -4[rbp]
	movss	xmm1, DWORD PTR -8[rbp]
	divss	xmm0, xmm1
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE101:
	.size	div_float32_float32, .-div_float32_float32
	.globl	div_float64_float64
	.type	div_float64_float64, @function
div_float64_float64:
.LFB102:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	QWORD PTR -16[rbp], xmm1
	movsd	xmm0, QWORD PTR -8[rbp]
	movsd	xmm1, QWORD PTR -16[rbp]
	divsd	xmm0, xmm1
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE102:
	.size	div_float64_float64, .-div_float64_float64
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"723789.c"
	.text
	.align	2
	.global	dflt_uint64
	.syntax unified
	.arm
	.fpu softvfp
	.type	dflt_uint64, %function
dflt_uint64:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r1, [fp, #-8]
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r0, [fp, #-8]
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	dflt_uint64, .-dflt_uint64
	.align	2
	.global	get_uint64
	.syntax unified
	.arm
	.fpu softvfp
	.type	get_uint64, %function
get_uint64:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	ldr	r1, [fp, #-8]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	ldr	r0, [fp, #-8]
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	get_uint64, .-get_uint64
	.align	2
	.global	rtn_uint64
	.syntax unified
	.arm
	.fpu softvfp
	.type	rtn_uint64, %function
rtn_uint64:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	rtn_uint64, .-rtn_uint64
	.align	2
	.global	rel_uint64
	.syntax unified
	.arm
	.fpu softvfp
	.type	rel_uint64, %function
rel_uint64:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	rel_uint64, .-rel_uint64
	.align	2
	.global	litrl_uint64
	.syntax unified
	.arm
	.fpu softvfp
	.type	litrl_uint64, %function
litrl_uint64:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	ldr	r1, [fp, #-8]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	ldr	r0, [fp, #-8]
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	litrl_uint64, .-litrl_uint64
	.align	2
	.global	dflt_uint32
	.syntax unified
	.arm
	.fpu softvfp
	.type	dflt_uint32, %function
dflt_uint32:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	mov	r3, #0
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	dflt_uint32, .-dflt_uint32
	.align	2
	.global	get_uint32
	.syntax unified
	.arm
	.fpu softvfp
	.type	get_uint32, %function
get_uint32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	get_uint32, .-get_uint32
	.align	2
	.global	rtn_uint32
	.syntax unified
	.arm
	.fpu softvfp
	.type	rtn_uint32, %function
rtn_uint32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	rtn_uint32, .-rtn_uint32
	.align	2
	.global	rel_uint32
	.syntax unified
	.arm
	.fpu softvfp
	.type	rel_uint32, %function
rel_uint32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	rel_uint32, .-rel_uint32
	.align	2
	.global	litrl_uint32
	.syntax unified
	.arm
	.fpu softvfp
	.type	litrl_uint32, %function
litrl_uint32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	litrl_uint32, .-litrl_uint32
	.align	2
	.global	dflt_uint16
	.syntax unified
	.arm
	.fpu softvfp
	.type	dflt_uint16, %function
dflt_uint16:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	mov	r3, #0
	mov	r0, r3	@ movhi
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	dflt_uint16, .-dflt_uint16
	.align	2
	.global	get_uint16
	.syntax unified
	.arm
	.fpu softvfp
	.type	get_uint16, %function
get_uint16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	strh	r0, [fp, #-8]	@ movhi
	ldrh	r3, [fp, #-8]	@ movhi
	mov	r0, r3	@ movhi
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	get_uint16, .-get_uint16
	.align	2
	.global	rtn_uint16
	.syntax unified
	.arm
	.fpu softvfp
	.type	rtn_uint16, %function
rtn_uint16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	strh	r0, [fp, #-8]	@ movhi
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	rtn_uint16, .-rtn_uint16
	.align	2
	.global	rel_uint16
	.syntax unified
	.arm
	.fpu softvfp
	.type	rel_uint16, %function
rel_uint16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	strh	r0, [fp, #-8]	@ movhi
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	rel_uint16, .-rel_uint16
	.align	2
	.global	litrl_uint16
	.syntax unified
	.arm
	.fpu softvfp
	.type	litrl_uint16, %function
litrl_uint16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	strh	r3, [fp, #-6]	@ movhi
	ldrh	r3, [fp, #-6]	@ movhi
	mov	r0, r3	@ movhi
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	litrl_uint16, .-litrl_uint16
	.align	2
	.global	dflt_uint8
	.syntax unified
	.arm
	.fpu softvfp
	.type	dflt_uint8, %function
dflt_uint8:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	mov	r3, #0
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	dflt_uint8, .-dflt_uint8
	.align	2
	.global	get_uint8
	.syntax unified
	.arm
	.fpu softvfp
	.type	get_uint8, %function
get_uint8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	strb	r0, [fp, #-8]
	ldrb	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	get_uint8, .-get_uint8
	.align	2
	.global	rtn_uint8
	.syntax unified
	.arm
	.fpu softvfp
	.type	rtn_uint8, %function
rtn_uint8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	strb	r0, [fp, #-8]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	rtn_uint8, .-rtn_uint8
	.align	2
	.global	rel_uint8
	.syntax unified
	.arm
	.fpu softvfp
	.type	rel_uint8, %function
rel_uint8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	strb	r0, [fp, #-8]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	rel_uint8, .-rel_uint8
	.align	2
	.global	litrl_uint8
	.syntax unified
	.arm
	.fpu softvfp
	.type	litrl_uint8, %function
litrl_uint8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	litrl_uint8, .-litrl_uint8
	.align	2
	.global	dflt_int64
	.syntax unified
	.arm
	.fpu softvfp
	.type	dflt_int64, %function
dflt_int64:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r1, [fp, #-8]
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r0, [fp, #-8]
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	dflt_int64, .-dflt_int64
	.align	2
	.global	get_int64
	.syntax unified
	.arm
	.fpu softvfp
	.type	get_int64, %function
get_int64:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	ldr	r1, [fp, #-8]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	ldr	r0, [fp, #-8]
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	get_int64, .-get_int64
	.align	2
	.global	rtn_int64
	.syntax unified
	.arm
	.fpu softvfp
	.type	rtn_int64, %function
rtn_int64:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	rtn_int64, .-rtn_int64
	.align	2
	.global	rel_int64
	.syntax unified
	.arm
	.fpu softvfp
	.type	rel_int64, %function
rel_int64:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	rel_int64, .-rel_int64
	.align	2
	.global	litrl_int64
	.syntax unified
	.arm
	.fpu softvfp
	.type	litrl_int64, %function
litrl_int64:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	ldr	r1, [fp, #-8]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	ldr	r0, [fp, #-8]
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	litrl_int64, .-litrl_int64
	.align	2
	.global	dflt_int32
	.syntax unified
	.arm
	.fpu softvfp
	.type	dflt_int32, %function
dflt_int32:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	mov	r3, #0
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	dflt_int32, .-dflt_int32
	.align	2
	.global	get_int32
	.syntax unified
	.arm
	.fpu softvfp
	.type	get_int32, %function
get_int32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	get_int32, .-get_int32
	.align	2
	.global	rtn_int32
	.syntax unified
	.arm
	.fpu softvfp
	.type	rtn_int32, %function
rtn_int32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	rtn_int32, .-rtn_int32
	.align	2
	.global	rel_int32
	.syntax unified
	.arm
	.fpu softvfp
	.type	rel_int32, %function
rel_int32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	rel_int32, .-rel_int32
	.align	2
	.global	litrl_int32
	.syntax unified
	.arm
	.fpu softvfp
	.type	litrl_int32, %function
litrl_int32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	litrl_int32, .-litrl_int32
	.align	2
	.global	dflt_int16
	.syntax unified
	.arm
	.fpu softvfp
	.type	dflt_int16, %function
dflt_int16:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	mov	r3, #0
	mov	r0, r3	@ movhi
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	dflt_int16, .-dflt_int16
	.align	2
	.global	get_int16
	.syntax unified
	.arm
	.fpu softvfp
	.type	get_int16, %function
get_int16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	strh	r0, [fp, #-8]	@ movhi
	ldrh	r3, [fp, #-8]	@ movhi
	mov	r0, r3	@ movhi
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	get_int16, .-get_int16
	.align	2
	.global	rtn_int16
	.syntax unified
	.arm
	.fpu softvfp
	.type	rtn_int16, %function
rtn_int16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	strh	r0, [fp, #-8]	@ movhi
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	rtn_int16, .-rtn_int16
	.align	2
	.global	rel_int16
	.syntax unified
	.arm
	.fpu softvfp
	.type	rel_int16, %function
rel_int16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	strh	r0, [fp, #-8]	@ movhi
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	rel_int16, .-rel_int16
	.align	2
	.global	litrl_int16
	.syntax unified
	.arm
	.fpu softvfp
	.type	litrl_int16, %function
litrl_int16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	strh	r3, [fp, #-6]	@ movhi
	ldrh	r3, [fp, #-6]	@ movhi
	mov	r0, r3	@ movhi
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	litrl_int16, .-litrl_int16
	.align	2
	.global	dflt_int8
	.syntax unified
	.arm
	.fpu softvfp
	.type	dflt_int8, %function
dflt_int8:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	mov	r3, #0
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	dflt_int8, .-dflt_int8
	.align	2
	.global	get_int8
	.syntax unified
	.arm
	.fpu softvfp
	.type	get_int8, %function
get_int8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	strb	r0, [fp, #-8]
	ldrb	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	get_int8, .-get_int8
	.align	2
	.global	rtn_int8
	.syntax unified
	.arm
	.fpu softvfp
	.type	rtn_int8, %function
rtn_int8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	strb	r0, [fp, #-8]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	rtn_int8, .-rtn_int8
	.align	2
	.global	rel_int8
	.syntax unified
	.arm
	.fpu softvfp
	.type	rel_int8, %function
rel_int8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	strb	r0, [fp, #-8]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	rel_int8, .-rel_int8
	.align	2
	.global	litrl_int8
	.syntax unified
	.arm
	.fpu softvfp
	.type	litrl_int8, %function
litrl_int8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	litrl_int8, .-litrl_int8
	.align	2
	.global	dflt_float32
	.syntax unified
	.arm
	.fpu softvfp
	.type	dflt_float32, %function
dflt_float32:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	mov	r3, #0
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	dflt_float32, .-dflt_float32
	.align	2
	.global	get_float32
	.syntax unified
	.arm
	.fpu softvfp
	.type	get_float32, %function
get_float32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]	@ float
	ldr	r3, [fp, #-8]	@ float
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	get_float32, .-get_float32
	.align	2
	.global	rtn_float32
	.syntax unified
	.arm
	.fpu softvfp
	.type	rtn_float32, %function
rtn_float32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]	@ float
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	rtn_float32, .-rtn_float32
	.align	2
	.global	rel_float32
	.syntax unified
	.arm
	.fpu softvfp
	.type	rel_float32, %function
rel_float32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]	@ float
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	rel_float32, .-rel_float32
	.align	2
	.global	litrl_float32
	.syntax unified
	.arm
	.fpu softvfp
	.type	litrl_float32, %function
litrl_float32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]	@ float
	ldr	r3, [fp, #-8]	@ float
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	litrl_float32, .-litrl_float32
	.align	2
	.global	dflt_float64
	.syntax unified
	.arm
	.fpu softvfp
	.type	dflt_float64, %function
dflt_float64:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r1, [fp, #-8]
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r0, [fp, #-8]
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	dflt_float64, .-dflt_float64
	.align	2
	.global	get_float64
	.syntax unified
	.arm
	.fpu softvfp
	.type	get_float64, %function
get_float64:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	ldr	r1, [fp, #-8]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	ldr	r0, [fp, #-8]
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	get_float64, .-get_float64
	.align	2
	.global	rtn_float64
	.syntax unified
	.arm
	.fpu softvfp
	.type	rtn_float64, %function
rtn_float64:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	rtn_float64, .-rtn_float64
	.align	2
	.global	rel_float64
	.syntax unified
	.arm
	.fpu softvfp
	.type	rel_float64, %function
rel_float64:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	rel_float64, .-rel_float64
	.align	2
	.global	litrl_float64
	.syntax unified
	.arm
	.fpu softvfp
	.type	litrl_float64, %function
litrl_float64:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	ldr	r1, [fp, #-8]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	ldr	r0, [fp, #-8]
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	litrl_float64, .-litrl_float64
	.align	2
	.global	cast_uint32_to_uint64
	.syntax unified
	.arm
	.fpu softvfp
	.type	cast_uint32_to_uint64, %function
cast_uint32_to_uint64:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-12]
	mov	r2, r3
	mov	r3, #0
	ldr	r1, [fp, #-8]
	stm	r1, {r2-r3}
	ldr	r0, [fp, #-8]
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	cast_uint32_to_uint64, .-cast_uint32_to_uint64
	.align	2
	.global	cast_int32_to_int64
	.syntax unified
	.arm
	.fpu softvfp
	.type	cast_int32_to_int64, %function
cast_int32_to_int64:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-12]
	mov	r2, r3
	asr	r3, r2, #31
	ldr	r1, [fp, #-8]
	stm	r1, {r2-r3}
	ldr	r0, [fp, #-8]
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	cast_int32_to_int64, .-cast_int32_to_int64
	.align	2
	.global	cast_uint16_to_uint64
	.syntax unified
	.arm
	.fpu softvfp
	.type	cast_uint16_to_uint64, %function
cast_uint16_to_uint64:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	strh	r1, [fp, #-12]	@ movhi
	ldrh	r1, [fp, #-12]
	mov	r3, r1
	mov	r2, r3
	mov	r3, #0
	ldr	r1, [fp, #-8]
	stm	r1, {r2-r3}
	ldr	r0, [fp, #-8]
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	cast_uint16_to_uint64, .-cast_uint16_to_uint64
	.align	2
	.global	cast_int16_to_int64
	.syntax unified
	.arm
	.fpu softvfp
	.type	cast_int16_to_int64, %function
cast_int16_to_int64:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	strh	r1, [fp, #-12]	@ movhi
	ldrsh	r1, [fp, #-12]
	mov	r3, r1
	mov	r2, r3
	asr	r3, r2, #31
	ldr	r1, [fp, #-8]
	stm	r1, {r2-r3}
	ldr	r0, [fp, #-8]
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	cast_int16_to_int64, .-cast_int16_to_int64
	.align	2
	.global	cast_uint8_to_uint64
	.syntax unified
	.arm
	.fpu softvfp
	.type	cast_uint8_to_uint64, %function
cast_uint8_to_uint64:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	strb	r1, [fp, #-12]
	ldrb	r3, [fp, #-12]	@ zero_extendqisi2
	and	r2, r3, #255
	mov	r3, #0
	ldr	r1, [fp, #-8]
	stm	r1, {r2-r3}
	ldr	r0, [fp, #-8]
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	cast_uint8_to_uint64, .-cast_uint8_to_uint64
	.align	2
	.global	cast_int8_to_int64
	.syntax unified
	.arm
	.fpu softvfp
	.type	cast_int8_to_int64, %function
cast_int8_to_int64:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	strb	r1, [fp, #-12]
	ldrsb	r1, [fp, #-12]
	mov	r3, r1
	mov	r2, r3
	asr	r3, r2, #31
	ldr	r1, [fp, #-8]
	stm	r1, {r2-r3}
	ldr	r0, [fp, #-8]
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	cast_int8_to_int64, .-cast_int8_to_int64
	.align	2
	.global	cast_uint16_to_uint32
	.syntax unified
	.arm
	.fpu softvfp
	.type	cast_uint16_to_uint32, %function
cast_uint16_to_uint32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	strh	r0, [fp, #-8]	@ movhi
	ldrh	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	cast_uint16_to_uint32, .-cast_uint16_to_uint32
	.align	2
	.global	cast_int16_to_int32
	.syntax unified
	.arm
	.fpu softvfp
	.type	cast_int16_to_int32, %function
cast_int16_to_int32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	strh	r0, [fp, #-8]	@ movhi
	ldrsh	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	cast_int16_to_int32, .-cast_int16_to_int32
	.align	2
	.global	cast_uint8_to_uint32
	.syntax unified
	.arm
	.fpu softvfp
	.type	cast_uint8_to_uint32, %function
cast_uint8_to_uint32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	strb	r0, [fp, #-8]
	ldrb	r3, [fp, #-8]	@ zero_extendqisi2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	cast_uint8_to_uint32, .-cast_uint8_to_uint32
	.align	2
	.global	cast_int8_to_int32
	.syntax unified
	.arm
	.fpu softvfp
	.type	cast_int8_to_int32, %function
cast_int8_to_int32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	strb	r0, [fp, #-8]
	ldrsb	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	cast_int8_to_int32, .-cast_int8_to_int32
	.align	2
	.global	cast_uint8_to_uint16
	.syntax unified
	.arm
	.fpu softvfp
	.type	cast_uint8_to_uint16, %function
cast_uint8_to_uint16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	strb	r0, [fp, #-8]
	ldrb	r3, [fp, #-8]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3	@ movhi
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	cast_uint8_to_uint16, .-cast_uint8_to_uint16
	.align	2
	.global	cast_int8_to_int16
	.syntax unified
	.arm
	.fpu softvfp
	.type	cast_int8_to_int16, %function
cast_int8_to_int16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	strb	r0, [fp, #-8]
	ldrsb	r3, [fp, #-8]
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3	@ movhi
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	cast_int8_to_int16, .-cast_int8_to_int16
	.global	__aeabi_f2d
	.align	2
	.global	cast_float32_to_float64
	.syntax unified
	.arm
	.fpu softvfp
	.type	cast_float32_to_float64, %function
cast_float32_to_float64:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]	@ float
	ldr	r3, [fp, #-12]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	ldr	r1, [fp, #-8]
	stm	r1, {r2-r3}
	ldr	r0, [fp, #-8]
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	cast_float32_to_float64, .-cast_float32_to_float64
	.align	2
	.global	add_uint64_uint64
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_uint64_uint64, %function
add_uint64_uint64:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, fp}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	sub	r1, fp, #28
	ldmia	r1, {r0-r1}
	ldmib	fp, {r2-r3}
	adds	r4, r0, r2
	adc	r5, r1, r3
	ldr	r3, [fp, #-16]
	stm	r3, {r4-r5}
	ldr	r0, [fp, #-16]
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, r5, fp}
	bx	lr
	.size	add_uint64_uint64, .-add_uint64_uint64
	.align	2
	.global	add_int64_int64
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_int64_int64, %function
add_int64_int64:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, fp}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	sub	r1, fp, #28
	ldmia	r1, {r0-r1}
	ldmib	fp, {r2-r3}
	adds	r4, r0, r2
	adc	r5, r1, r3
	ldr	r3, [fp, #-16]
	stm	r3, {r4-r5}
	ldr	r0, [fp, #-16]
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, r5, fp}
	bx	lr
	.size	add_int64_int64, .-add_int64_int64
	.align	2
	.global	add_uint32_uint32
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_uint32_uint32, %function
add_uint32_uint32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	add	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	add_uint32_uint32, .-add_uint32_uint32
	.align	2
	.global	add_int32_int32
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_int32_int32, %function
add_int32_int32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	add	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	add_int32_int32, .-add_int32_int32
	.align	2
	.global	add_uint16_uint16
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_uint16_uint16, %function
add_uint16_uint16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	strh	r0, [fp, #-8]	@ movhi
	strh	r1, [fp, #-12]	@ movhi
	ldrh	r2, [fp, #-8]
	ldrh	r3, [fp, #-12]
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3	@ movhi
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	add_uint16_uint16, .-add_uint16_uint16
	.align	2
	.global	add_int16_int16
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_int16_int16, %function
add_int16_int16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	strh	r0, [fp, #-8]	@ movhi
	strh	r1, [fp, #-12]	@ movhi
	ldrsh	r3, [fp, #-8]
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldrsh	r3, [fp, #-12]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3	@ movhi
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	add_int16_int16, .-add_int16_int16
	.align	2
	.global	add_uint8_uint8
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_uint8_uint8, %function
add_uint8_uint8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	strb	r0, [fp, #-8]
	strb	r1, [fp, #-12]
	ldrb	r2, [fp, #-8]	@ zero_extendqisi2
	ldrb	r3, [fp, #-12]	@ zero_extendqisi2
	add	r3, r2, r3
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	add_uint8_uint8, .-add_uint8_uint8
	.align	2
	.global	add_int8_int8
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_int8_int8, %function
add_int8_int8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	strb	r0, [fp, #-8]
	strb	r1, [fp, #-12]
	ldrsb	r3, [fp, #-8]
	and	r2, r3, #255
	ldrsb	r3, [fp, #-12]
	and	r3, r3, #255
	add	r3, r2, r3
	and	r3, r3, #255
	lsl	r3, r3, #24
	asr	r3, r3, #24
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	add_int8_int8, .-add_int8_int8
	.global	__aeabi_fadd
	.align	2
	.global	add_float32_float32
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_float32_float32, %function
add_float32_float32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]	@ float
	str	r1, [fp, #-12]	@ float
	ldr	r3, [fp, #-8]	@ float
	ldr	r2, [fp, #-12]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fadd
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	add_float32_float32, .-add_float32_float32
	.global	__aeabi_dadd
	.align	2
	.global	add_float64_float64
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_float64_float64, %function
add_float64_float64:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	ldmib	fp, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	ldr	r1, [fp, #-8]
	stm	r1, {r2-r3}
	ldr	r0, [fp, #-8]
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	add_float64_float64, .-add_float64_float64
	.align	2
	.global	sub_uint64_uint64
	.syntax unified
	.arm
	.fpu softvfp
	.type	sub_uint64_uint64, %function
sub_uint64_uint64:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, fp}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	sub	r1, fp, #28
	ldmia	r1, {r0-r1}
	ldmib	fp, {r2-r3}
	subs	r4, r0, r2
	sbc	r5, r1, r3
	ldr	r3, [fp, #-16]
	stm	r3, {r4-r5}
	ldr	r0, [fp, #-16]
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, r5, fp}
	bx	lr
	.size	sub_uint64_uint64, .-sub_uint64_uint64
	.align	2
	.global	sub_int64_int64
	.syntax unified
	.arm
	.fpu softvfp
	.type	sub_int64_int64, %function
sub_int64_int64:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, fp}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	sub	r1, fp, #28
	ldmia	r1, {r0-r1}
	ldmib	fp, {r2-r3}
	subs	r4, r0, r2
	sbc	r5, r1, r3
	ldr	r3, [fp, #-16]
	stm	r3, {r4-r5}
	ldr	r0, [fp, #-16]
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, r5, fp}
	bx	lr
	.size	sub_int64_int64, .-sub_int64_int64
	.align	2
	.global	sub_uint32_uint32
	.syntax unified
	.arm
	.fpu softvfp
	.type	sub_uint32_uint32, %function
sub_uint32_uint32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	sub	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	sub_uint32_uint32, .-sub_uint32_uint32
	.align	2
	.global	sub_int32_int32
	.syntax unified
	.arm
	.fpu softvfp
	.type	sub_int32_int32, %function
sub_int32_int32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	sub	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	sub_int32_int32, .-sub_int32_int32
	.align	2
	.global	sub_uint16_uint16
	.syntax unified
	.arm
	.fpu softvfp
	.type	sub_uint16_uint16, %function
sub_uint16_uint16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	strh	r0, [fp, #-8]	@ movhi
	strh	r1, [fp, #-12]	@ movhi
	ldrh	r2, [fp, #-8]
	ldrh	r3, [fp, #-12]
	sub	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3	@ movhi
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	sub_uint16_uint16, .-sub_uint16_uint16
	.align	2
	.global	sub_int16_int16
	.syntax unified
	.arm
	.fpu softvfp
	.type	sub_int16_int16, %function
sub_int16_int16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	strh	r0, [fp, #-8]	@ movhi
	strh	r1, [fp, #-12]	@ movhi
	ldrsh	r3, [fp, #-8]
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldrsh	r3, [fp, #-12]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	sub	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3	@ movhi
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	sub_int16_int16, .-sub_int16_int16
	.align	2
	.global	sub_uint8_uint8
	.syntax unified
	.arm
	.fpu softvfp
	.type	sub_uint8_uint8, %function
sub_uint8_uint8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	strb	r0, [fp, #-8]
	strb	r1, [fp, #-12]
	ldrb	r2, [fp, #-8]	@ zero_extendqisi2
	ldrb	r3, [fp, #-12]	@ zero_extendqisi2
	sub	r3, r2, r3
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	sub_uint8_uint8, .-sub_uint8_uint8
	.align	2
	.global	sub_int8_int8
	.syntax unified
	.arm
	.fpu softvfp
	.type	sub_int8_int8, %function
sub_int8_int8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	strb	r0, [fp, #-8]
	strb	r1, [fp, #-12]
	ldrsb	r3, [fp, #-8]
	and	r2, r3, #255
	ldrsb	r3, [fp, #-12]
	and	r3, r3, #255
	sub	r3, r2, r3
	and	r3, r3, #255
	lsl	r3, r3, #24
	asr	r3, r3, #24
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	sub_int8_int8, .-sub_int8_int8
	.global	__aeabi_fsub
	.align	2
	.global	sub_float32_float32
	.syntax unified
	.arm
	.fpu softvfp
	.type	sub_float32_float32, %function
sub_float32_float32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]	@ float
	str	r1, [fp, #-12]	@ float
	ldr	r3, [fp, #-8]	@ float
	ldr	r2, [fp, #-12]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fsub
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sub_float32_float32, .-sub_float32_float32
	.global	__aeabi_dsub
	.align	2
	.global	sub_float64_float64
	.syntax unified
	.arm
	.fpu softvfp
	.type	sub_float64_float64, %function
sub_float64_float64:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	ldmib	fp, {r2-r3}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	ldr	r1, [fp, #-8]
	stm	r1, {r2-r3}
	ldr	r0, [fp, #-8]
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sub_float64_float64, .-sub_float64_float64
	.align	2
	.global	mul_uint64_uint64
	.syntax unified
	.arm
	.fpu softvfp
	.type	mul_uint64_uint64, %function
mul_uint64_uint64:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	sub	r1, fp, #28
	ldmia	r1, {r0-r1}
	ldmib	fp, {r2-r3}
	mul	lr, r2, r1
	mul	ip, r0, r3
	add	ip, lr, ip
	umull	r4, r5, r0, r2
	add	r3, ip, r5
	mov	r5, r3
	ldr	r3, [fp, #-16]
	stm	r3, {r4-r5}
	ldr	r0, [fp, #-16]
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
	.size	mul_uint64_uint64, .-mul_uint64_uint64
	.align	2
	.global	mul_int64_int64
	.syntax unified
	.arm
	.fpu softvfp
	.type	mul_int64_int64, %function
mul_int64_int64:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	sub	r1, fp, #28
	ldmia	r1, {r0-r1}
	ldmib	fp, {r2-r3}
	mul	lr, r2, r1
	mul	ip, r0, r3
	add	ip, lr, ip
	umull	r4, r5, r0, r2
	add	r3, ip, r5
	mov	r5, r3
	ldr	r3, [fp, #-16]
	stm	r3, {r4-r5}
	ldr	r0, [fp, #-16]
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
	.size	mul_int64_int64, .-mul_int64_int64
	.align	2
	.global	mul_uint32_uint32
	.syntax unified
	.arm
	.fpu softvfp
	.type	mul_uint32_uint32, %function
mul_uint32_uint32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-8]
	ldr	r2, [fp, #-12]
	mul	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	mul_uint32_uint32, .-mul_uint32_uint32
	.align	2
	.global	mul_int32_int32
	.syntax unified
	.arm
	.fpu softvfp
	.type	mul_int32_int32, %function
mul_int32_int32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-8]
	ldr	r2, [fp, #-12]
	mul	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	mul_int32_int32, .-mul_int32_int32
	.align	2
	.global	mul_uint16_uint16
	.syntax unified
	.arm
	.fpu softvfp
	.type	mul_uint16_uint16, %function
mul_uint16_uint16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	strh	r0, [fp, #-8]	@ movhi
	strh	r1, [fp, #-12]	@ movhi
	ldrh	r3, [fp, #-8]
	ldrh	r2, [fp, #-12]
	mul	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3	@ movhi
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	mul_uint16_uint16, .-mul_uint16_uint16
	.align	2
	.global	mul_int16_int16
	.syntax unified
	.arm
	.fpu softvfp
	.type	mul_int16_int16, %function
mul_int16_int16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	strh	r0, [fp, #-8]	@ movhi
	strh	r1, [fp, #-12]	@ movhi
	ldrsh	r3, [fp, #-8]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldrsh	r2, [fp, #-12]
	lsl	r2, r2, #16
	lsr	r2, r2, #16
	mul	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3	@ movhi
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	mul_int16_int16, .-mul_int16_int16
	.align	2
	.global	mul_uint8_uint8
	.syntax unified
	.arm
	.fpu softvfp
	.type	mul_uint8_uint8, %function
mul_uint8_uint8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	strb	r0, [fp, #-8]
	strb	r1, [fp, #-12]
	ldrb	r3, [fp, #-8]	@ zero_extendqisi2
	ldrb	r2, [fp, #-12]	@ zero_extendqisi2
	mul	r3, r2, r3
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	mul_uint8_uint8, .-mul_uint8_uint8
	.align	2
	.global	mul_int8_int8
	.syntax unified
	.arm
	.fpu softvfp
	.type	mul_int8_int8, %function
mul_int8_int8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	strb	r0, [fp, #-8]
	strb	r1, [fp, #-12]
	ldrsb	r3, [fp, #-8]
	and	r3, r3, #255
	ldrsb	r2, [fp, #-12]
	and	r2, r2, #255
	mul	r3, r2, r3
	and	r3, r3, #255
	lsl	r3, r3, #24
	asr	r3, r3, #24
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	mul_int8_int8, .-mul_int8_int8
	.global	__aeabi_fmul
	.align	2
	.global	mul_float32_float32
	.syntax unified
	.arm
	.fpu softvfp
	.type	mul_float32_float32, %function
mul_float32_float32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]	@ float
	str	r1, [fp, #-12]	@ float
	ldr	r3, [fp, #-8]	@ float
	ldr	r2, [fp, #-12]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	mul_float32_float32, .-mul_float32_float32
	.global	__aeabi_dmul
	.align	2
	.global	mul_float64_float64
	.syntax unified
	.arm
	.fpu softvfp
	.type	mul_float64_float64, %function
mul_float64_float64:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	ldmib	fp, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	ldr	r1, [fp, #-8]
	stm	r1, {r2-r3}
	ldr	r0, [fp, #-8]
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	mul_float64_float64, .-mul_float64_float64
	.global	__aeabi_uldivmod
	.align	2
	.global	div_uint64_uint64
	.syntax unified
	.arm
	.fpu softvfp
	.type	div_uint64_uint64, %function
div_uint64_uint64:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	ldmib	fp, {r2-r3}
	bl	__aeabi_uldivmod
	mov	r2, r0
	mov	r3, r1
	ldr	r1, [fp, #-8]
	stm	r1, {r2-r3}
	ldr	r0, [fp, #-8]
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	div_uint64_uint64, .-div_uint64_uint64
	.global	__aeabi_ldivmod
	.align	2
	.global	div_int64_int64
	.syntax unified
	.arm
	.fpu softvfp
	.type	div_int64_int64, %function
div_int64_int64:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	ldmib	fp, {r2-r3}
	bl	__aeabi_ldivmod
	mov	r2, r0
	mov	r3, r1
	ldr	r1, [fp, #-8]
	stm	r1, {r2-r3}
	ldr	r0, [fp, #-8]
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	div_int64_int64, .-div_int64_int64
	.global	__aeabi_uidiv
	.align	2
	.global	div_uint32_uint32
	.syntax unified
	.arm
	.fpu softvfp
	.type	div_uint32_uint32, %function
div_uint32_uint32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-8]
	ldr	r2, [fp, #-12]
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_uidiv
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	div_uint32_uint32, .-div_uint32_uint32
	.global	__aeabi_idiv
	.align	2
	.global	div_int32_int32
	.syntax unified
	.arm
	.fpu softvfp
	.type	div_int32_int32, %function
div_int32_int32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-8]
	ldr	r2, [fp, #-12]
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_idiv
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	div_int32_int32, .-div_int32_int32
	.align	2
	.global	div_uint16_uint16
	.syntax unified
	.arm
	.fpu softvfp
	.type	div_uint16_uint16, %function
div_uint16_uint16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	strh	r0, [fp, #-8]	@ movhi
	strh	r1, [fp, #-12]	@ movhi
	ldrh	r3, [fp, #-8]
	ldrh	r2, [fp, #-12]
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_uidiv
	mov	r3, r0
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3	@ movhi
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	div_uint16_uint16, .-div_uint16_uint16
	.align	2
	.global	div_int16_int16
	.syntax unified
	.arm
	.fpu softvfp
	.type	div_int16_int16, %function
div_int16_int16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	strh	r0, [fp, #-8]	@ movhi
	strh	r1, [fp, #-12]	@ movhi
	ldrsh	r3, [fp, #-8]
	mov	r2, r3
	ldrsh	r3, [fp, #-12]
	mov	r1, r3
	mov	r0, r2
	bl	__aeabi_idiv
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3	@ movhi
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	div_int16_int16, .-div_int16_int16
	.align	2
	.global	div_uint8_uint8
	.syntax unified
	.arm
	.fpu softvfp
	.type	div_uint8_uint8, %function
div_uint8_uint8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	strb	r0, [fp, #-8]
	strb	r1, [fp, #-12]
	ldrb	r3, [fp, #-8]	@ zero_extendqisi2
	ldrb	r2, [fp, #-12]	@ zero_extendqisi2
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_uidiv
	mov	r3, r0
	and	r3, r3, #255
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	div_uint8_uint8, .-div_uint8_uint8
	.align	2
	.global	div_int8_int8
	.syntax unified
	.arm
	.fpu softvfp
	.type	div_int8_int8, %function
div_int8_int8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	strb	r0, [fp, #-8]
	strb	r1, [fp, #-12]
	ldrsb	r3, [fp, #-8]
	mov	r2, r3
	ldrsb	r3, [fp, #-12]
	mov	r1, r3
	mov	r0, r2
	bl	__aeabi_idiv
	mov	r3, r0
	lsl	r3, r3, #24
	asr	r3, r3, #24
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	div_int8_int8, .-div_int8_int8
	.global	__aeabi_fdiv
	.align	2
	.global	div_float32_float32
	.syntax unified
	.arm
	.fpu softvfp
	.type	div_float32_float32, %function
div_float32_float32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]	@ float
	str	r1, [fp, #-12]	@ float
	ldr	r3, [fp, #-8]	@ float
	ldr	r2, [fp, #-12]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fdiv
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	div_float32_float32, .-div_float32_float32
	.global	__aeabi_ddiv
	.align	2
	.global	div_float64_float64
	.syntax unified
	.arm
	.fpu softvfp
	.type	div_float64_float64, %function
div_float64_float64:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	ldmib	fp, {r2-r3}
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	ldr	r1, [fp, #-8]
	stm	r1, {r2-r3}
	ldr	r0, [fp, #-8]
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	div_float64_float64, .-div_float64_float64
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
