	.file	"107953467.c"
	.intel_syntax noprefix
	.text
	.type	variance_c, @function
variance_c:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	QWORD PTR -40[rbp], rdx
	mov	DWORD PTR -32[rbp], ecx
	mov	DWORD PTR -44[rbp], r8d
	mov	DWORD PTR -48[rbp], r9d
	mov	rax, QWORD PTR 24[rbp]
	mov	DWORD PTR [rax], 0
	mov	rax, QWORD PTR 16[rbp]
	mov	DWORD PTR [rax], 0
	mov	DWORD PTR -12[rbp], 0
	jmp	.L2
.L5:
	mov	DWORD PTR -8[rbp], 0
	jmp	.L3
.L4:
	mov	eax, DWORD PTR -8[rbp]
	movsx	rdx, eax
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	mov	edx, DWORD PTR -8[rbp]
	movsx	rcx, edx
	mov	rdx, QWORD PTR -40[rbp]
	add	rdx, rcx
	movzx	edx, BYTE PTR [rdx]
	movzx	edx, dl
	sub	eax, edx
	mov	DWORD PTR -4[rbp], eax
	mov	rax, QWORD PTR 24[rbp]
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -4[rbp]
	add	edx, eax
	mov	rax, QWORD PTR 24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR 16[rbp]
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -4[rbp]
	imul	eax, eax
	add	edx, eax
	mov	rax, QWORD PTR 16[rbp]
	mov	DWORD PTR [rax], edx
	add	DWORD PTR -8[rbp], 1
.L3:
	mov	eax, DWORD PTR -8[rbp]
	cmp	eax, DWORD PTR -44[rbp]
	jl	.L4
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	add	QWORD PTR -24[rbp], rax
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	add	QWORD PTR -40[rbp], rax
	add	DWORD PTR -12[rbp], 1
.L2:
	mov	eax, DWORD PTR -12[rbp]
	cmp	eax, DWORD PTR -48[rbp]
	jl	.L5
	nop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	variance_c, .-variance_c
	.globl	aom_variance4x4_c
	.type	aom_variance4x4_c, @function
aom_variance4x4_c:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	QWORD PTR -40[rbp], rdx
	mov	DWORD PTR -32[rbp], ecx
	mov	QWORD PTR -48[rbp], r8
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	ecx, DWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -40[rbp]
	mov	esi, DWORD PTR -28[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdi, -12[rbp]
	push	rdi
	push	QWORD PTR -48[rbp]
	mov	r9d, 4
	mov	r8d, 4
	mov	rdi, rax
	call	variance_c
	add	rsp, 16
	mov	rax, QWORD PTR -48[rbp]
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -12[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	imul	rax, rcx
	lea	rcx, 15[rax]
	test	rax, rax
	cmovs	rax, rcx
	sar	rax, 4
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	mov	rsi, QWORD PTR -8[rbp]
	sub	rsi, QWORD PTR fs:40
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	aom_variance4x4_c, .-aom_variance4x4_c
	.globl	aom_variance4x8_c
	.type	aom_variance4x8_c, @function
aom_variance4x8_c:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	QWORD PTR -40[rbp], rdx
	mov	DWORD PTR -32[rbp], ecx
	mov	QWORD PTR -48[rbp], r8
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	ecx, DWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -40[rbp]
	mov	esi, DWORD PTR -28[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdi, -12[rbp]
	push	rdi
	push	QWORD PTR -48[rbp]
	mov	r9d, 8
	mov	r8d, 4
	mov	rdi, rax
	call	variance_c
	add	rsp, 16
	mov	rax, QWORD PTR -48[rbp]
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -12[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	imul	rax, rcx
	lea	rcx, 31[rax]
	test	rax, rax
	cmovs	rax, rcx
	sar	rax, 5
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	mov	rsi, QWORD PTR -8[rbp]
	sub	rsi, QWORD PTR fs:40
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	aom_variance4x8_c, .-aom_variance4x8_c
	.globl	aom_variance4x16_c
	.type	aom_variance4x16_c, @function
aom_variance4x16_c:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	QWORD PTR -40[rbp], rdx
	mov	DWORD PTR -32[rbp], ecx
	mov	QWORD PTR -48[rbp], r8
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	ecx, DWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -40[rbp]
	mov	esi, DWORD PTR -28[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdi, -12[rbp]
	push	rdi
	push	QWORD PTR -48[rbp]
	mov	r9d, 16
	mov	r8d, 4
	mov	rdi, rax
	call	variance_c
	add	rsp, 16
	mov	rax, QWORD PTR -48[rbp]
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -12[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	imul	rax, rcx
	lea	rcx, 63[rax]
	test	rax, rax
	cmovs	rax, rcx
	sar	rax, 6
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	mov	rsi, QWORD PTR -8[rbp]
	sub	rsi, QWORD PTR fs:40
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	aom_variance4x16_c, .-aom_variance4x16_c
	.globl	aom_variance8x4_c
	.type	aom_variance8x4_c, @function
aom_variance8x4_c:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	QWORD PTR -40[rbp], rdx
	mov	DWORD PTR -32[rbp], ecx
	mov	QWORD PTR -48[rbp], r8
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	ecx, DWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -40[rbp]
	mov	esi, DWORD PTR -28[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdi, -12[rbp]
	push	rdi
	push	QWORD PTR -48[rbp]
	mov	r9d, 4
	mov	r8d, 8
	mov	rdi, rax
	call	variance_c
	add	rsp, 16
	mov	rax, QWORD PTR -48[rbp]
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -12[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	imul	rax, rcx
	lea	rcx, 31[rax]
	test	rax, rax
	cmovs	rax, rcx
	sar	rax, 5
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	mov	rsi, QWORD PTR -8[rbp]
	sub	rsi, QWORD PTR fs:40
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	aom_variance8x4_c, .-aom_variance8x4_c
	.globl	aom_variance8x8_c
	.type	aom_variance8x8_c, @function
aom_variance8x8_c:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	QWORD PTR -40[rbp], rdx
	mov	DWORD PTR -32[rbp], ecx
	mov	QWORD PTR -48[rbp], r8
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	ecx, DWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -40[rbp]
	mov	esi, DWORD PTR -28[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdi, -12[rbp]
	push	rdi
	push	QWORD PTR -48[rbp]
	mov	r9d, 8
	mov	r8d, 8
	mov	rdi, rax
	call	variance_c
	add	rsp, 16
	mov	rax, QWORD PTR -48[rbp]
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -12[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	imul	rax, rcx
	lea	rcx, 63[rax]
	test	rax, rax
	cmovs	rax, rcx
	sar	rax, 6
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	mov	rsi, QWORD PTR -8[rbp]
	sub	rsi, QWORD PTR fs:40
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	aom_variance8x8_c, .-aom_variance8x8_c
	.globl	aom_variance8x16_c
	.type	aom_variance8x16_c, @function
aom_variance8x16_c:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	QWORD PTR -40[rbp], rdx
	mov	DWORD PTR -32[rbp], ecx
	mov	QWORD PTR -48[rbp], r8
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	ecx, DWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -40[rbp]
	mov	esi, DWORD PTR -28[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdi, -12[rbp]
	push	rdi
	push	QWORD PTR -48[rbp]
	mov	r9d, 16
	mov	r8d, 8
	mov	rdi, rax
	call	variance_c
	add	rsp, 16
	mov	rax, QWORD PTR -48[rbp]
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -12[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	imul	rax, rcx
	lea	rcx, 127[rax]
	test	rax, rax
	cmovs	rax, rcx
	sar	rax, 7
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	mov	rsi, QWORD PTR -8[rbp]
	sub	rsi, QWORD PTR fs:40
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	aom_variance8x16_c, .-aom_variance8x16_c
	.globl	aom_variance8x32_c
	.type	aom_variance8x32_c, @function
aom_variance8x32_c:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	QWORD PTR -40[rbp], rdx
	mov	DWORD PTR -32[rbp], ecx
	mov	QWORD PTR -48[rbp], r8
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	ecx, DWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -40[rbp]
	mov	esi, DWORD PTR -28[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdi, -12[rbp]
	push	rdi
	push	QWORD PTR -48[rbp]
	mov	r9d, 32
	mov	r8d, 8
	mov	rdi, rax
	call	variance_c
	add	rsp, 16
	mov	rax, QWORD PTR -48[rbp]
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -12[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	imul	rax, rcx
	lea	rcx, 255[rax]
	test	rax, rax
	cmovs	rax, rcx
	sar	rax, 8
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	mov	rsi, QWORD PTR -8[rbp]
	sub	rsi, QWORD PTR fs:40
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	aom_variance8x32_c, .-aom_variance8x32_c
	.globl	aom_variance16x4_c
	.type	aom_variance16x4_c, @function
aom_variance16x4_c:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	QWORD PTR -40[rbp], rdx
	mov	DWORD PTR -32[rbp], ecx
	mov	QWORD PTR -48[rbp], r8
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	ecx, DWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -40[rbp]
	mov	esi, DWORD PTR -28[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdi, -12[rbp]
	push	rdi
	push	QWORD PTR -48[rbp]
	mov	r9d, 4
	mov	r8d, 16
	mov	rdi, rax
	call	variance_c
	add	rsp, 16
	mov	rax, QWORD PTR -48[rbp]
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -12[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	imul	rax, rcx
	lea	rcx, 63[rax]
	test	rax, rax
	cmovs	rax, rcx
	sar	rax, 6
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	mov	rsi, QWORD PTR -8[rbp]
	sub	rsi, QWORD PTR fs:40
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	aom_variance16x4_c, .-aom_variance16x4_c
	.globl	aom_variance16x8_c
	.type	aom_variance16x8_c, @function
aom_variance16x8_c:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	QWORD PTR -40[rbp], rdx
	mov	DWORD PTR -32[rbp], ecx
	mov	QWORD PTR -48[rbp], r8
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	ecx, DWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -40[rbp]
	mov	esi, DWORD PTR -28[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdi, -12[rbp]
	push	rdi
	push	QWORD PTR -48[rbp]
	mov	r9d, 8
	mov	r8d, 16
	mov	rdi, rax
	call	variance_c
	add	rsp, 16
	mov	rax, QWORD PTR -48[rbp]
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -12[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	imul	rax, rcx
	lea	rcx, 127[rax]
	test	rax, rax
	cmovs	rax, rcx
	sar	rax, 7
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	mov	rsi, QWORD PTR -8[rbp]
	sub	rsi, QWORD PTR fs:40
	je	.L32
	call	__stack_chk_fail@PLT
.L32:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	aom_variance16x8_c, .-aom_variance16x8_c
	.globl	aom_variance16x16_c
	.type	aom_variance16x16_c, @function
aom_variance16x16_c:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	QWORD PTR -40[rbp], rdx
	mov	DWORD PTR -32[rbp], ecx
	mov	QWORD PTR -48[rbp], r8
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	ecx, DWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -40[rbp]
	mov	esi, DWORD PTR -28[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdi, -12[rbp]
	push	rdi
	push	QWORD PTR -48[rbp]
	mov	r9d, 16
	mov	r8d, 16
	mov	rdi, rax
	call	variance_c
	add	rsp, 16
	mov	rax, QWORD PTR -48[rbp]
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -12[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	imul	rax, rcx
	lea	rcx, 255[rax]
	test	rax, rax
	cmovs	rax, rcx
	sar	rax, 8
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	mov	rsi, QWORD PTR -8[rbp]
	sub	rsi, QWORD PTR fs:40
	je	.L35
	call	__stack_chk_fail@PLT
.L35:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	aom_variance16x16_c, .-aom_variance16x16_c
	.globl	aom_variance16x32_c
	.type	aom_variance16x32_c, @function
aom_variance16x32_c:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	QWORD PTR -40[rbp], rdx
	mov	DWORD PTR -32[rbp], ecx
	mov	QWORD PTR -48[rbp], r8
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	ecx, DWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -40[rbp]
	mov	esi, DWORD PTR -28[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdi, -12[rbp]
	push	rdi
	push	QWORD PTR -48[rbp]
	mov	r9d, 32
	mov	r8d, 16
	mov	rdi, rax
	call	variance_c
	add	rsp, 16
	mov	rax, QWORD PTR -48[rbp]
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -12[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	imul	rax, rcx
	lea	rcx, 511[rax]
	test	rax, rax
	cmovs	rax, rcx
	sar	rax, 9
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	mov	rsi, QWORD PTR -8[rbp]
	sub	rsi, QWORD PTR fs:40
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	aom_variance16x32_c, .-aom_variance16x32_c
	.globl	aom_variance16x64_c
	.type	aom_variance16x64_c, @function
aom_variance16x64_c:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	QWORD PTR -40[rbp], rdx
	mov	DWORD PTR -32[rbp], ecx
	mov	QWORD PTR -48[rbp], r8
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	ecx, DWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -40[rbp]
	mov	esi, DWORD PTR -28[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdi, -12[rbp]
	push	rdi
	push	QWORD PTR -48[rbp]
	mov	r9d, 64
	mov	r8d, 16
	mov	rdi, rax
	call	variance_c
	add	rsp, 16
	mov	rax, QWORD PTR -48[rbp]
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -12[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	imul	rax, rcx
	lea	rcx, 1023[rax]
	test	rax, rax
	cmovs	rax, rcx
	sar	rax, 10
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	mov	rsi, QWORD PTR -8[rbp]
	sub	rsi, QWORD PTR fs:40
	je	.L41
	call	__stack_chk_fail@PLT
.L41:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	aom_variance16x64_c, .-aom_variance16x64_c
	.globl	aom_variance32x8_c
	.type	aom_variance32x8_c, @function
aom_variance32x8_c:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	QWORD PTR -40[rbp], rdx
	mov	DWORD PTR -32[rbp], ecx
	mov	QWORD PTR -48[rbp], r8
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	ecx, DWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -40[rbp]
	mov	esi, DWORD PTR -28[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdi, -12[rbp]
	push	rdi
	push	QWORD PTR -48[rbp]
	mov	r9d, 8
	mov	r8d, 32
	mov	rdi, rax
	call	variance_c
	add	rsp, 16
	mov	rax, QWORD PTR -48[rbp]
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -12[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	imul	rax, rcx
	lea	rcx, 255[rax]
	test	rax, rax
	cmovs	rax, rcx
	sar	rax, 8
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	mov	rsi, QWORD PTR -8[rbp]
	sub	rsi, QWORD PTR fs:40
	je	.L44
	call	__stack_chk_fail@PLT
.L44:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	aom_variance32x8_c, .-aom_variance32x8_c
	.globl	aom_variance32x16_c
	.type	aom_variance32x16_c, @function
aom_variance32x16_c:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	QWORD PTR -40[rbp], rdx
	mov	DWORD PTR -32[rbp], ecx
	mov	QWORD PTR -48[rbp], r8
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	ecx, DWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -40[rbp]
	mov	esi, DWORD PTR -28[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdi, -12[rbp]
	push	rdi
	push	QWORD PTR -48[rbp]
	mov	r9d, 16
	mov	r8d, 32
	mov	rdi, rax
	call	variance_c
	add	rsp, 16
	mov	rax, QWORD PTR -48[rbp]
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -12[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	imul	rax, rcx
	lea	rcx, 511[rax]
	test	rax, rax
	cmovs	rax, rcx
	sar	rax, 9
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	mov	rsi, QWORD PTR -8[rbp]
	sub	rsi, QWORD PTR fs:40
	je	.L47
	call	__stack_chk_fail@PLT
.L47:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	aom_variance32x16_c, .-aom_variance32x16_c
	.globl	aom_variance32x32_c
	.type	aom_variance32x32_c, @function
aom_variance32x32_c:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	QWORD PTR -40[rbp], rdx
	mov	DWORD PTR -32[rbp], ecx
	mov	QWORD PTR -48[rbp], r8
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	ecx, DWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -40[rbp]
	mov	esi, DWORD PTR -28[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdi, -12[rbp]
	push	rdi
	push	QWORD PTR -48[rbp]
	mov	r9d, 32
	mov	r8d, 32
	mov	rdi, rax
	call	variance_c
	add	rsp, 16
	mov	rax, QWORD PTR -48[rbp]
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -12[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	imul	rax, rcx
	lea	rcx, 1023[rax]
	test	rax, rax
	cmovs	rax, rcx
	sar	rax, 10
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	mov	rsi, QWORD PTR -8[rbp]
	sub	rsi, QWORD PTR fs:40
	je	.L50
	call	__stack_chk_fail@PLT
.L50:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	aom_variance32x32_c, .-aom_variance32x32_c
	.globl	aom_variance32x64_c
	.type	aom_variance32x64_c, @function
aom_variance32x64_c:
.LFB16:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	QWORD PTR -40[rbp], rdx
	mov	DWORD PTR -32[rbp], ecx
	mov	QWORD PTR -48[rbp], r8
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	ecx, DWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -40[rbp]
	mov	esi, DWORD PTR -28[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdi, -12[rbp]
	push	rdi
	push	QWORD PTR -48[rbp]
	mov	r9d, 64
	mov	r8d, 32
	mov	rdi, rax
	call	variance_c
	add	rsp, 16
	mov	rax, QWORD PTR -48[rbp]
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -12[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	imul	rax, rcx
	lea	rcx, 2047[rax]
	test	rax, rax
	cmovs	rax, rcx
	sar	rax, 11
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	mov	rsi, QWORD PTR -8[rbp]
	sub	rsi, QWORD PTR fs:40
	je	.L53
	call	__stack_chk_fail@PLT
.L53:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE16:
	.size	aom_variance32x64_c, .-aom_variance32x64_c
	.globl	aom_variance64x16_c
	.type	aom_variance64x16_c, @function
aom_variance64x16_c:
.LFB17:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	QWORD PTR -40[rbp], rdx
	mov	DWORD PTR -32[rbp], ecx
	mov	QWORD PTR -48[rbp], r8
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	ecx, DWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -40[rbp]
	mov	esi, DWORD PTR -28[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdi, -12[rbp]
	push	rdi
	push	QWORD PTR -48[rbp]
	mov	r9d, 16
	mov	r8d, 64
	mov	rdi, rax
	call	variance_c
	add	rsp, 16
	mov	rax, QWORD PTR -48[rbp]
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -12[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	imul	rax, rcx
	lea	rcx, 1023[rax]
	test	rax, rax
	cmovs	rax, rcx
	sar	rax, 10
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	mov	rsi, QWORD PTR -8[rbp]
	sub	rsi, QWORD PTR fs:40
	je	.L56
	call	__stack_chk_fail@PLT
.L56:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE17:
	.size	aom_variance64x16_c, .-aom_variance64x16_c
	.globl	aom_variance64x32_c
	.type	aom_variance64x32_c, @function
aom_variance64x32_c:
.LFB18:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	QWORD PTR -40[rbp], rdx
	mov	DWORD PTR -32[rbp], ecx
	mov	QWORD PTR -48[rbp], r8
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	ecx, DWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -40[rbp]
	mov	esi, DWORD PTR -28[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdi, -12[rbp]
	push	rdi
	push	QWORD PTR -48[rbp]
	mov	r9d, 32
	mov	r8d, 64
	mov	rdi, rax
	call	variance_c
	add	rsp, 16
	mov	rax, QWORD PTR -48[rbp]
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -12[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	imul	rax, rcx
	lea	rcx, 2047[rax]
	test	rax, rax
	cmovs	rax, rcx
	sar	rax, 11
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	mov	rsi, QWORD PTR -8[rbp]
	sub	rsi, QWORD PTR fs:40
	je	.L59
	call	__stack_chk_fail@PLT
.L59:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE18:
	.size	aom_variance64x32_c, .-aom_variance64x32_c
	.globl	aom_variance64x64_c
	.type	aom_variance64x64_c, @function
aom_variance64x64_c:
.LFB19:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	QWORD PTR -40[rbp], rdx
	mov	DWORD PTR -32[rbp], ecx
	mov	QWORD PTR -48[rbp], r8
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	ecx, DWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -40[rbp]
	mov	esi, DWORD PTR -28[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdi, -12[rbp]
	push	rdi
	push	QWORD PTR -48[rbp]
	mov	r9d, 64
	mov	r8d, 64
	mov	rdi, rax
	call	variance_c
	add	rsp, 16
	mov	rax, QWORD PTR -48[rbp]
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -12[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	imul	rax, rcx
	lea	rcx, 4095[rax]
	test	rax, rax
	cmovs	rax, rcx
	sar	rax, 12
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	mov	rsi, QWORD PTR -8[rbp]
	sub	rsi, QWORD PTR fs:40
	je	.L62
	call	__stack_chk_fail@PLT
.L62:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE19:
	.size	aom_variance64x64_c, .-aom_variance64x64_c
	.globl	aom_variance64x128_c
	.type	aom_variance64x128_c, @function
aom_variance64x128_c:
.LFB20:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	QWORD PTR -40[rbp], rdx
	mov	DWORD PTR -32[rbp], ecx
	mov	QWORD PTR -48[rbp], r8
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	ecx, DWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -40[rbp]
	mov	esi, DWORD PTR -28[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdi, -12[rbp]
	push	rdi
	push	QWORD PTR -48[rbp]
	mov	r9d, 128
	mov	r8d, 64
	mov	rdi, rax
	call	variance_c
	add	rsp, 16
	mov	rax, QWORD PTR -48[rbp]
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -12[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	imul	rax, rcx
	lea	rcx, 8191[rax]
	test	rax, rax
	cmovs	rax, rcx
	sar	rax, 13
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	mov	rsi, QWORD PTR -8[rbp]
	sub	rsi, QWORD PTR fs:40
	je	.L65
	call	__stack_chk_fail@PLT
.L65:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE20:
	.size	aom_variance64x128_c, .-aom_variance64x128_c
	.globl	aom_variance128x64_c
	.type	aom_variance128x64_c, @function
aom_variance128x64_c:
.LFB21:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	QWORD PTR -40[rbp], rdx
	mov	DWORD PTR -32[rbp], ecx
	mov	QWORD PTR -48[rbp], r8
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	ecx, DWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -40[rbp]
	mov	esi, DWORD PTR -28[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdi, -12[rbp]
	push	rdi
	push	QWORD PTR -48[rbp]
	mov	r9d, 64
	mov	r8d, 128
	mov	rdi, rax
	call	variance_c
	add	rsp, 16
	mov	rax, QWORD PTR -48[rbp]
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -12[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	imul	rax, rcx
	lea	rcx, 8191[rax]
	test	rax, rax
	cmovs	rax, rcx
	sar	rax, 13
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	mov	rsi, QWORD PTR -8[rbp]
	sub	rsi, QWORD PTR fs:40
	je	.L68
	call	__stack_chk_fail@PLT
.L68:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE21:
	.size	aom_variance128x64_c, .-aom_variance128x64_c
	.globl	aom_variance128x128_c
	.type	aom_variance128x128_c, @function
aom_variance128x128_c:
.LFB22:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	QWORD PTR -40[rbp], rdx
	mov	DWORD PTR -32[rbp], ecx
	mov	QWORD PTR -48[rbp], r8
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	ecx, DWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -40[rbp]
	mov	esi, DWORD PTR -28[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdi, -12[rbp]
	push	rdi
	push	QWORD PTR -48[rbp]
	mov	r9d, 128
	mov	r8d, 128
	mov	rdi, rax
	call	variance_c
	add	rsp, 16
	mov	rax, QWORD PTR -48[rbp]
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -12[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	imul	rax, rcx
	lea	rcx, 16383[rax]
	test	rax, rax
	cmovs	rax, rcx
	sar	rax, 14
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	mov	rsi, QWORD PTR -8[rbp]
	sub	rsi, QWORD PTR fs:40
	je	.L71
	call	__stack_chk_fail@PLT
.L71:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE22:
	.size	aom_variance128x128_c, .-aom_variance128x128_c
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"107953467.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	variance_c, %function
variance_c:
	@ args = 16, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #36
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	str	r2, [fp, #-32]
	str	r3, [fp, #-36]
	ldr	r3, [fp, #16]
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, [fp, #12]
	mov	r2, #0
	str	r2, [r3]
	mov	r3, #0
	str	r3, [fp, #-16]
	b	.L2
.L5:
	mov	r3, #0
	str	r3, [fp, #-12]
	b	.L3
.L4:
	ldr	r3, [fp, #-12]
	ldr	r2, [fp, #-24]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r3, [fp, #-12]
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	sub	r3, r1, r3
	str	r3, [fp, #-8]
	ldr	r3, [fp, #16]
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	add	r2, r2, r3
	ldr	r3, [fp, #16]
	str	r2, [r3]
	ldr	r3, [fp, #12]
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	mov	r1, r3
	mul	r1, r3, r1
	mov	r3, r1
	add	r2, r2, r3
	ldr	r3, [fp, #12]
	str	r2, [r3]
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	str	r3, [fp, #-12]
.L3:
	ldr	r2, [fp, #-12]
	ldr	r3, [fp, #4]
	cmp	r2, r3
	blt	.L4
	ldr	r3, [fp, #-28]
	ldr	r2, [fp, #-24]
	add	r3, r2, r3
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-36]
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	str	r3, [fp, #-16]
.L2:
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #8]
	cmp	r2, r3
	blt	.L5
	nop
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	variance_c, .-variance_c
	.section	.rodata
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	aom_variance4x4_c
	.syntax unified
	.arm
	.fpu softvfp
	.type	aom_variance4x4_c, %function
aom_variance4x4_c:
	@ args = 4, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #48
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	str	r2, [fp, #-48]
	str	r3, [fp, #-52]
	ldr	r3, [fp, #4]
	str	r3, [fp, #-56]
	ldr	r3, .L9
	ldr	r3, [r3]
	str	r3, [fp, #-32]
	mov	r3,#0
	sub	r3, fp, #36
	str	r3, [sp, #12]
	ldr	r3, [fp, #-56]
	str	r3, [sp, #8]
	mov	r3, #4
	str	r3, [sp, #4]
	mov	r3, #4
	str	r3, [sp]
	ldr	r3, [fp, #-52]
	ldr	r2, [fp, #-48]
	ldr	r1, [fp, #-44]
	ldr	r0, [fp, #-40]
	bl	variance_c
	ldr	r3, [fp, #-56]
	ldr	ip, [r3]
	ldr	r3, [fp, #-36]
	mov	r8, r3
	asr	r9, r8, #31
	ldr	r3, [fp, #-36]
	mov	r0, r3
	asr	r1, r0, #31
	mul	r2, r0, r9
	mul	r3, r8, r1
	add	lr, r2, r3
	umull	r2, r3, r8, r0
	add	r1, lr, r3
	mov	r3, r1
	asr	r1, r3, #31
	mov	r0, r1
	asr	r1, r0, #31
	mov	r8, #15
	mov	r9, #0
	and	r6, r0, r8
	and	r7, r1, r9
	adds	r4, r6, r2
	adc	r5, r7, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r4, #4
	orr	r2, r2, r5, lsl #28
	asr	r3, r5, #4
	mov	r3, r2
	sub	r3, ip, r3
	ldr	r2, .L9
	ldr	r1, [r2]
	ldr	r2, [fp, #-32]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L8
	bl	__stack_chk_fail
.L8:
	mov	r0, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L10:
	.align	2
.L9:
	.word	.LC0
	.size	aom_variance4x4_c, .-aom_variance4x4_c
	.section	.rodata
	.align	2
.LC1:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	aom_variance4x8_c
	.syntax unified
	.arm
	.fpu softvfp
	.type	aom_variance4x8_c, %function
aom_variance4x8_c:
	@ args = 4, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #48
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	str	r2, [fp, #-48]
	str	r3, [fp, #-52]
	ldr	r3, [fp, #4]
	str	r3, [fp, #-56]
	ldr	r3, .L14
	ldr	r3, [r3]
	str	r3, [fp, #-32]
	mov	r3,#0
	sub	r3, fp, #36
	str	r3, [sp, #12]
	ldr	r3, [fp, #-56]
	str	r3, [sp, #8]
	mov	r3, #8
	str	r3, [sp, #4]
	mov	r3, #4
	str	r3, [sp]
	ldr	r3, [fp, #-52]
	ldr	r2, [fp, #-48]
	ldr	r1, [fp, #-44]
	ldr	r0, [fp, #-40]
	bl	variance_c
	ldr	r3, [fp, #-56]
	ldr	ip, [r3]
	ldr	r3, [fp, #-36]
	mov	r8, r3
	asr	r9, r8, #31
	ldr	r3, [fp, #-36]
	mov	r0, r3
	asr	r1, r0, #31
	mul	r2, r0, r9
	mul	r3, r8, r1
	add	lr, r2, r3
	umull	r2, r3, r8, r0
	add	r1, lr, r3
	mov	r3, r1
	asr	r1, r3, #31
	mov	r0, r1
	asr	r1, r0, #31
	mov	r8, #31
	mov	r9, #0
	and	r6, r0, r8
	and	r7, r1, r9
	adds	r4, r6, r2
	adc	r5, r7, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r4, #5
	orr	r2, r2, r5, lsl #27
	asr	r3, r5, #5
	mov	r3, r2
	sub	r3, ip, r3
	ldr	r2, .L14
	ldr	r1, [r2]
	ldr	r2, [fp, #-32]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L13
	bl	__stack_chk_fail
.L13:
	mov	r0, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L15:
	.align	2
.L14:
	.word	.LC1
	.size	aom_variance4x8_c, .-aom_variance4x8_c
	.section	.rodata
	.align	2
.LC2:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	aom_variance4x16_c
	.syntax unified
	.arm
	.fpu softvfp
	.type	aom_variance4x16_c, %function
aom_variance4x16_c:
	@ args = 4, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #48
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	str	r2, [fp, #-48]
	str	r3, [fp, #-52]
	ldr	r3, [fp, #4]
	str	r3, [fp, #-56]
	ldr	r3, .L19
	ldr	r3, [r3]
	str	r3, [fp, #-32]
	mov	r3,#0
	sub	r3, fp, #36
	str	r3, [sp, #12]
	ldr	r3, [fp, #-56]
	str	r3, [sp, #8]
	mov	r3, #16
	str	r3, [sp, #4]
	mov	r3, #4
	str	r3, [sp]
	ldr	r3, [fp, #-52]
	ldr	r2, [fp, #-48]
	ldr	r1, [fp, #-44]
	ldr	r0, [fp, #-40]
	bl	variance_c
	ldr	r3, [fp, #-56]
	ldr	ip, [r3]
	ldr	r3, [fp, #-36]
	mov	r8, r3
	asr	r9, r8, #31
	ldr	r3, [fp, #-36]
	mov	r0, r3
	asr	r1, r0, #31
	mul	r2, r0, r9
	mul	r3, r8, r1
	add	lr, r2, r3
	umull	r2, r3, r8, r0
	add	r1, lr, r3
	mov	r3, r1
	asr	r1, r3, #31
	mov	r0, r1
	asr	r1, r0, #31
	mov	r8, #63
	mov	r9, #0
	and	r6, r0, r8
	and	r7, r1, r9
	adds	r4, r6, r2
	adc	r5, r7, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r4, #6
	orr	r2, r2, r5, lsl #26
	asr	r3, r5, #6
	mov	r3, r2
	sub	r3, ip, r3
	ldr	r2, .L19
	ldr	r1, [r2]
	ldr	r2, [fp, #-32]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L18
	bl	__stack_chk_fail
.L18:
	mov	r0, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L20:
	.align	2
.L19:
	.word	.LC2
	.size	aom_variance4x16_c, .-aom_variance4x16_c
	.section	.rodata
	.align	2
.LC3:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	aom_variance8x4_c
	.syntax unified
	.arm
	.fpu softvfp
	.type	aom_variance8x4_c, %function
aom_variance8x4_c:
	@ args = 4, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #48
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	str	r2, [fp, #-48]
	str	r3, [fp, #-52]
	ldr	r3, [fp, #4]
	str	r3, [fp, #-56]
	ldr	r3, .L24
	ldr	r3, [r3]
	str	r3, [fp, #-32]
	mov	r3,#0
	sub	r3, fp, #36
	str	r3, [sp, #12]
	ldr	r3, [fp, #-56]
	str	r3, [sp, #8]
	mov	r3, #4
	str	r3, [sp, #4]
	mov	r3, #8
	str	r3, [sp]
	ldr	r3, [fp, #-52]
	ldr	r2, [fp, #-48]
	ldr	r1, [fp, #-44]
	ldr	r0, [fp, #-40]
	bl	variance_c
	ldr	r3, [fp, #-56]
	ldr	ip, [r3]
	ldr	r3, [fp, #-36]
	mov	r8, r3
	asr	r9, r8, #31
	ldr	r3, [fp, #-36]
	mov	r0, r3
	asr	r1, r0, #31
	mul	r2, r0, r9
	mul	r3, r8, r1
	add	lr, r2, r3
	umull	r2, r3, r8, r0
	add	r1, lr, r3
	mov	r3, r1
	asr	r1, r3, #31
	mov	r0, r1
	asr	r1, r0, #31
	mov	r8, #31
	mov	r9, #0
	and	r6, r0, r8
	and	r7, r1, r9
	adds	r4, r6, r2
	adc	r5, r7, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r4, #5
	orr	r2, r2, r5, lsl #27
	asr	r3, r5, #5
	mov	r3, r2
	sub	r3, ip, r3
	ldr	r2, .L24
	ldr	r1, [r2]
	ldr	r2, [fp, #-32]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L23
	bl	__stack_chk_fail
.L23:
	mov	r0, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L25:
	.align	2
.L24:
	.word	.LC3
	.size	aom_variance8x4_c, .-aom_variance8x4_c
	.section	.rodata
	.align	2
.LC4:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	aom_variance8x8_c
	.syntax unified
	.arm
	.fpu softvfp
	.type	aom_variance8x8_c, %function
aom_variance8x8_c:
	@ args = 4, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #48
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	str	r2, [fp, #-48]
	str	r3, [fp, #-52]
	ldr	r3, [fp, #4]
	str	r3, [fp, #-56]
	ldr	r3, .L29
	ldr	r3, [r3]
	str	r3, [fp, #-32]
	mov	r3,#0
	sub	r3, fp, #36
	str	r3, [sp, #12]
	ldr	r3, [fp, #-56]
	str	r3, [sp, #8]
	mov	r3, #8
	str	r3, [sp, #4]
	mov	r3, #8
	str	r3, [sp]
	ldr	r3, [fp, #-52]
	ldr	r2, [fp, #-48]
	ldr	r1, [fp, #-44]
	ldr	r0, [fp, #-40]
	bl	variance_c
	ldr	r3, [fp, #-56]
	ldr	ip, [r3]
	ldr	r3, [fp, #-36]
	mov	r8, r3
	asr	r9, r8, #31
	ldr	r3, [fp, #-36]
	mov	r0, r3
	asr	r1, r0, #31
	mul	r2, r0, r9
	mul	r3, r8, r1
	add	lr, r2, r3
	umull	r2, r3, r8, r0
	add	r1, lr, r3
	mov	r3, r1
	asr	r1, r3, #31
	mov	r0, r1
	asr	r1, r0, #31
	mov	r8, #63
	mov	r9, #0
	and	r6, r0, r8
	and	r7, r1, r9
	adds	r4, r6, r2
	adc	r5, r7, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r4, #6
	orr	r2, r2, r5, lsl #26
	asr	r3, r5, #6
	mov	r3, r2
	sub	r3, ip, r3
	ldr	r2, .L29
	ldr	r1, [r2]
	ldr	r2, [fp, #-32]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L28
	bl	__stack_chk_fail
.L28:
	mov	r0, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L30:
	.align	2
.L29:
	.word	.LC4
	.size	aom_variance8x8_c, .-aom_variance8x8_c
	.section	.rodata
	.align	2
.LC5:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	aom_variance8x16_c
	.syntax unified
	.arm
	.fpu softvfp
	.type	aom_variance8x16_c, %function
aom_variance8x16_c:
	@ args = 4, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #48
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	str	r2, [fp, #-48]
	str	r3, [fp, #-52]
	ldr	r3, [fp, #4]
	str	r3, [fp, #-56]
	ldr	r3, .L34
	ldr	r3, [r3]
	str	r3, [fp, #-32]
	mov	r3,#0
	sub	r3, fp, #36
	str	r3, [sp, #12]
	ldr	r3, [fp, #-56]
	str	r3, [sp, #8]
	mov	r3, #16
	str	r3, [sp, #4]
	mov	r3, #8
	str	r3, [sp]
	ldr	r3, [fp, #-52]
	ldr	r2, [fp, #-48]
	ldr	r1, [fp, #-44]
	ldr	r0, [fp, #-40]
	bl	variance_c
	ldr	r3, [fp, #-56]
	ldr	ip, [r3]
	ldr	r3, [fp, #-36]
	mov	r8, r3
	asr	r9, r8, #31
	ldr	r3, [fp, #-36]
	mov	r0, r3
	asr	r1, r0, #31
	mul	r2, r0, r9
	mul	r3, r8, r1
	add	lr, r2, r3
	umull	r2, r3, r8, r0
	add	r1, lr, r3
	mov	r3, r1
	asr	r1, r3, #31
	mov	r0, r1
	asr	r1, r0, #31
	mov	r8, #127
	mov	r9, #0
	and	r6, r0, r8
	and	r7, r1, r9
	adds	r4, r6, r2
	adc	r5, r7, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r4, #7
	orr	r2, r2, r5, lsl #25
	asr	r3, r5, #7
	mov	r3, r2
	sub	r3, ip, r3
	ldr	r2, .L34
	ldr	r1, [r2]
	ldr	r2, [fp, #-32]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L33
	bl	__stack_chk_fail
.L33:
	mov	r0, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L35:
	.align	2
.L34:
	.word	.LC5
	.size	aom_variance8x16_c, .-aom_variance8x16_c
	.section	.rodata
	.align	2
.LC6:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	aom_variance8x32_c
	.syntax unified
	.arm
	.fpu softvfp
	.type	aom_variance8x32_c, %function
aom_variance8x32_c:
	@ args = 4, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #48
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	str	r2, [fp, #-48]
	str	r3, [fp, #-52]
	ldr	r3, [fp, #4]
	str	r3, [fp, #-56]
	ldr	r3, .L39
	ldr	r3, [r3]
	str	r3, [fp, #-32]
	mov	r3,#0
	sub	r3, fp, #36
	str	r3, [sp, #12]
	ldr	r3, [fp, #-56]
	str	r3, [sp, #8]
	mov	r3, #32
	str	r3, [sp, #4]
	mov	r3, #8
	str	r3, [sp]
	ldr	r3, [fp, #-52]
	ldr	r2, [fp, #-48]
	ldr	r1, [fp, #-44]
	ldr	r0, [fp, #-40]
	bl	variance_c
	ldr	r3, [fp, #-56]
	ldr	ip, [r3]
	ldr	r3, [fp, #-36]
	mov	r8, r3
	asr	r9, r8, #31
	ldr	r3, [fp, #-36]
	mov	r0, r3
	asr	r1, r0, #31
	mul	r2, r0, r9
	mul	r3, r8, r1
	add	lr, r2, r3
	umull	r2, r3, r8, r0
	add	r1, lr, r3
	mov	r3, r1
	asr	r1, r3, #31
	mov	r0, r1
	asr	r1, r0, #31
	mov	r8, #255
	mov	r9, #0
	and	r6, r0, r8
	and	r7, r1, r9
	adds	r4, r6, r2
	adc	r5, r7, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r4, #8
	orr	r2, r2, r5, lsl #24
	asr	r3, r5, #8
	mov	r3, r2
	sub	r3, ip, r3
	ldr	r2, .L39
	ldr	r1, [r2]
	ldr	r2, [fp, #-32]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L38
	bl	__stack_chk_fail
.L38:
	mov	r0, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L40:
	.align	2
.L39:
	.word	.LC6
	.size	aom_variance8x32_c, .-aom_variance8x32_c
	.section	.rodata
	.align	2
.LC7:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	aom_variance16x4_c
	.syntax unified
	.arm
	.fpu softvfp
	.type	aom_variance16x4_c, %function
aom_variance16x4_c:
	@ args = 4, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #48
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	str	r2, [fp, #-48]
	str	r3, [fp, #-52]
	ldr	r3, [fp, #4]
	str	r3, [fp, #-56]
	ldr	r3, .L44
	ldr	r3, [r3]
	str	r3, [fp, #-32]
	mov	r3,#0
	sub	r3, fp, #36
	str	r3, [sp, #12]
	ldr	r3, [fp, #-56]
	str	r3, [sp, #8]
	mov	r3, #4
	str	r3, [sp, #4]
	mov	r3, #16
	str	r3, [sp]
	ldr	r3, [fp, #-52]
	ldr	r2, [fp, #-48]
	ldr	r1, [fp, #-44]
	ldr	r0, [fp, #-40]
	bl	variance_c
	ldr	r3, [fp, #-56]
	ldr	ip, [r3]
	ldr	r3, [fp, #-36]
	mov	r8, r3
	asr	r9, r8, #31
	ldr	r3, [fp, #-36]
	mov	r0, r3
	asr	r1, r0, #31
	mul	r2, r0, r9
	mul	r3, r8, r1
	add	lr, r2, r3
	umull	r2, r3, r8, r0
	add	r1, lr, r3
	mov	r3, r1
	asr	r1, r3, #31
	mov	r0, r1
	asr	r1, r0, #31
	mov	r8, #63
	mov	r9, #0
	and	r6, r0, r8
	and	r7, r1, r9
	adds	r4, r6, r2
	adc	r5, r7, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r4, #6
	orr	r2, r2, r5, lsl #26
	asr	r3, r5, #6
	mov	r3, r2
	sub	r3, ip, r3
	ldr	r2, .L44
	ldr	r1, [r2]
	ldr	r2, [fp, #-32]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L43
	bl	__stack_chk_fail
.L43:
	mov	r0, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L45:
	.align	2
.L44:
	.word	.LC7
	.size	aom_variance16x4_c, .-aom_variance16x4_c
	.section	.rodata
	.align	2
.LC8:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	aom_variance16x8_c
	.syntax unified
	.arm
	.fpu softvfp
	.type	aom_variance16x8_c, %function
aom_variance16x8_c:
	@ args = 4, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #48
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	str	r2, [fp, #-48]
	str	r3, [fp, #-52]
	ldr	r3, [fp, #4]
	str	r3, [fp, #-56]
	ldr	r3, .L49
	ldr	r3, [r3]
	str	r3, [fp, #-32]
	mov	r3,#0
	sub	r3, fp, #36
	str	r3, [sp, #12]
	ldr	r3, [fp, #-56]
	str	r3, [sp, #8]
	mov	r3, #8
	str	r3, [sp, #4]
	mov	r3, #16
	str	r3, [sp]
	ldr	r3, [fp, #-52]
	ldr	r2, [fp, #-48]
	ldr	r1, [fp, #-44]
	ldr	r0, [fp, #-40]
	bl	variance_c
	ldr	r3, [fp, #-56]
	ldr	ip, [r3]
	ldr	r3, [fp, #-36]
	mov	r8, r3
	asr	r9, r8, #31
	ldr	r3, [fp, #-36]
	mov	r0, r3
	asr	r1, r0, #31
	mul	r2, r0, r9
	mul	r3, r8, r1
	add	lr, r2, r3
	umull	r2, r3, r8, r0
	add	r1, lr, r3
	mov	r3, r1
	asr	r1, r3, #31
	mov	r0, r1
	asr	r1, r0, #31
	mov	r8, #127
	mov	r9, #0
	and	r6, r0, r8
	and	r7, r1, r9
	adds	r4, r6, r2
	adc	r5, r7, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r4, #7
	orr	r2, r2, r5, lsl #25
	asr	r3, r5, #7
	mov	r3, r2
	sub	r3, ip, r3
	ldr	r2, .L49
	ldr	r1, [r2]
	ldr	r2, [fp, #-32]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L48
	bl	__stack_chk_fail
.L48:
	mov	r0, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L50:
	.align	2
.L49:
	.word	.LC8
	.size	aom_variance16x8_c, .-aom_variance16x8_c
	.section	.rodata
	.align	2
.LC9:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	aom_variance16x16_c
	.syntax unified
	.arm
	.fpu softvfp
	.type	aom_variance16x16_c, %function
aom_variance16x16_c:
	@ args = 4, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #48
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	str	r2, [fp, #-48]
	str	r3, [fp, #-52]
	ldr	r3, [fp, #4]
	str	r3, [fp, #-56]
	ldr	r3, .L54
	ldr	r3, [r3]
	str	r3, [fp, #-32]
	mov	r3,#0
	sub	r3, fp, #36
	str	r3, [sp, #12]
	ldr	r3, [fp, #-56]
	str	r3, [sp, #8]
	mov	r3, #16
	str	r3, [sp, #4]
	mov	r3, #16
	str	r3, [sp]
	ldr	r3, [fp, #-52]
	ldr	r2, [fp, #-48]
	ldr	r1, [fp, #-44]
	ldr	r0, [fp, #-40]
	bl	variance_c
	ldr	r3, [fp, #-56]
	ldr	ip, [r3]
	ldr	r3, [fp, #-36]
	mov	r8, r3
	asr	r9, r8, #31
	ldr	r3, [fp, #-36]
	mov	r0, r3
	asr	r1, r0, #31
	mul	r2, r0, r9
	mul	r3, r8, r1
	add	lr, r2, r3
	umull	r2, r3, r8, r0
	add	r1, lr, r3
	mov	r3, r1
	asr	r1, r3, #31
	mov	r0, r1
	asr	r1, r0, #31
	mov	r8, #255
	mov	r9, #0
	and	r6, r0, r8
	and	r7, r1, r9
	adds	r4, r6, r2
	adc	r5, r7, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r4, #8
	orr	r2, r2, r5, lsl #24
	asr	r3, r5, #8
	mov	r3, r2
	sub	r3, ip, r3
	ldr	r2, .L54
	ldr	r1, [r2]
	ldr	r2, [fp, #-32]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L53
	bl	__stack_chk_fail
.L53:
	mov	r0, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L55:
	.align	2
.L54:
	.word	.LC9
	.size	aom_variance16x16_c, .-aom_variance16x16_c
	.section	.rodata
	.align	2
.LC10:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	aom_variance16x32_c
	.syntax unified
	.arm
	.fpu softvfp
	.type	aom_variance16x32_c, %function
aom_variance16x32_c:
	@ args = 4, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #48
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	str	r2, [fp, #-48]
	str	r3, [fp, #-52]
	ldr	r3, [fp, #4]
	str	r3, [fp, #-56]
	ldr	r3, .L59
	ldr	r3, [r3]
	str	r3, [fp, #-32]
	mov	r3,#0
	sub	r3, fp, #36
	str	r3, [sp, #12]
	ldr	r3, [fp, #-56]
	str	r3, [sp, #8]
	mov	r3, #32
	str	r3, [sp, #4]
	mov	r3, #16
	str	r3, [sp]
	ldr	r3, [fp, #-52]
	ldr	r2, [fp, #-48]
	ldr	r1, [fp, #-44]
	ldr	r0, [fp, #-40]
	bl	variance_c
	ldr	r3, [fp, #-56]
	ldr	ip, [r3]
	ldr	r3, [fp, #-36]
	mov	r8, r3
	asr	r9, r8, #31
	ldr	r3, [fp, #-36]
	mov	r0, r3
	asr	r1, r0, #31
	mul	r2, r0, r9
	mul	r3, r8, r1
	add	lr, r2, r3
	umull	r2, r3, r8, r0
	add	r1, lr, r3
	mov	r3, r1
	asr	r1, r3, #31
	mov	r0, r1
	asr	r1, r0, #31
	ldr	r8, .L59+4
	mov	r9, #0
	and	r6, r0, r8
	and	r7, r1, r9
	adds	r4, r6, r2
	adc	r5, r7, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r4, #9
	orr	r2, r2, r5, lsl #23
	asr	r3, r5, #9
	mov	r3, r2
	sub	r3, ip, r3
	ldr	r2, .L59
	ldr	r1, [r2]
	ldr	r2, [fp, #-32]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L58
	bl	__stack_chk_fail
.L58:
	mov	r0, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L60:
	.align	2
.L59:
	.word	.LC10
	.word	511
	.size	aom_variance16x32_c, .-aom_variance16x32_c
	.section	.rodata
	.align	2
.LC11:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	aom_variance16x64_c
	.syntax unified
	.arm
	.fpu softvfp
	.type	aom_variance16x64_c, %function
aom_variance16x64_c:
	@ args = 4, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #48
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	str	r2, [fp, #-48]
	str	r3, [fp, #-52]
	ldr	r3, [fp, #4]
	str	r3, [fp, #-56]
	ldr	r3, .L64
	ldr	r3, [r3]
	str	r3, [fp, #-32]
	mov	r3,#0
	sub	r3, fp, #36
	str	r3, [sp, #12]
	ldr	r3, [fp, #-56]
	str	r3, [sp, #8]
	mov	r3, #64
	str	r3, [sp, #4]
	mov	r3, #16
	str	r3, [sp]
	ldr	r3, [fp, #-52]
	ldr	r2, [fp, #-48]
	ldr	r1, [fp, #-44]
	ldr	r0, [fp, #-40]
	bl	variance_c
	ldr	r3, [fp, #-56]
	ldr	ip, [r3]
	ldr	r3, [fp, #-36]
	mov	r8, r3
	asr	r9, r8, #31
	ldr	r3, [fp, #-36]
	mov	r0, r3
	asr	r1, r0, #31
	mul	r2, r0, r9
	mul	r3, r8, r1
	add	lr, r2, r3
	umull	r2, r3, r8, r0
	add	r1, lr, r3
	mov	r3, r1
	asr	r1, r3, #31
	mov	r0, r1
	asr	r1, r0, #31
	ldr	r8, .L64+4
	mov	r9, #0
	and	r6, r0, r8
	and	r7, r1, r9
	adds	r4, r6, r2
	adc	r5, r7, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r4, #10
	orr	r2, r2, r5, lsl #22
	asr	r3, r5, #10
	mov	r3, r2
	sub	r3, ip, r3
	ldr	r2, .L64
	ldr	r1, [r2]
	ldr	r2, [fp, #-32]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L63
	bl	__stack_chk_fail
.L63:
	mov	r0, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L65:
	.align	2
.L64:
	.word	.LC11
	.word	1023
	.size	aom_variance16x64_c, .-aom_variance16x64_c
	.section	.rodata
	.align	2
.LC12:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	aom_variance32x8_c
	.syntax unified
	.arm
	.fpu softvfp
	.type	aom_variance32x8_c, %function
aom_variance32x8_c:
	@ args = 4, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #48
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	str	r2, [fp, #-48]
	str	r3, [fp, #-52]
	ldr	r3, [fp, #4]
	str	r3, [fp, #-56]
	ldr	r3, .L69
	ldr	r3, [r3]
	str	r3, [fp, #-32]
	mov	r3,#0
	sub	r3, fp, #36
	str	r3, [sp, #12]
	ldr	r3, [fp, #-56]
	str	r3, [sp, #8]
	mov	r3, #8
	str	r3, [sp, #4]
	mov	r3, #32
	str	r3, [sp]
	ldr	r3, [fp, #-52]
	ldr	r2, [fp, #-48]
	ldr	r1, [fp, #-44]
	ldr	r0, [fp, #-40]
	bl	variance_c
	ldr	r3, [fp, #-56]
	ldr	ip, [r3]
	ldr	r3, [fp, #-36]
	mov	r8, r3
	asr	r9, r8, #31
	ldr	r3, [fp, #-36]
	mov	r0, r3
	asr	r1, r0, #31
	mul	r2, r0, r9
	mul	r3, r8, r1
	add	lr, r2, r3
	umull	r2, r3, r8, r0
	add	r1, lr, r3
	mov	r3, r1
	asr	r1, r3, #31
	mov	r0, r1
	asr	r1, r0, #31
	mov	r8, #255
	mov	r9, #0
	and	r6, r0, r8
	and	r7, r1, r9
	adds	r4, r6, r2
	adc	r5, r7, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r4, #8
	orr	r2, r2, r5, lsl #24
	asr	r3, r5, #8
	mov	r3, r2
	sub	r3, ip, r3
	ldr	r2, .L69
	ldr	r1, [r2]
	ldr	r2, [fp, #-32]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L68
	bl	__stack_chk_fail
.L68:
	mov	r0, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L70:
	.align	2
.L69:
	.word	.LC12
	.size	aom_variance32x8_c, .-aom_variance32x8_c
	.section	.rodata
	.align	2
.LC13:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	aom_variance32x16_c
	.syntax unified
	.arm
	.fpu softvfp
	.type	aom_variance32x16_c, %function
aom_variance32x16_c:
	@ args = 4, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #48
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	str	r2, [fp, #-48]
	str	r3, [fp, #-52]
	ldr	r3, [fp, #4]
	str	r3, [fp, #-56]
	ldr	r3, .L74
	ldr	r3, [r3]
	str	r3, [fp, #-32]
	mov	r3,#0
	sub	r3, fp, #36
	str	r3, [sp, #12]
	ldr	r3, [fp, #-56]
	str	r3, [sp, #8]
	mov	r3, #16
	str	r3, [sp, #4]
	mov	r3, #32
	str	r3, [sp]
	ldr	r3, [fp, #-52]
	ldr	r2, [fp, #-48]
	ldr	r1, [fp, #-44]
	ldr	r0, [fp, #-40]
	bl	variance_c
	ldr	r3, [fp, #-56]
	ldr	ip, [r3]
	ldr	r3, [fp, #-36]
	mov	r8, r3
	asr	r9, r8, #31
	ldr	r3, [fp, #-36]
	mov	r0, r3
	asr	r1, r0, #31
	mul	r2, r0, r9
	mul	r3, r8, r1
	add	lr, r2, r3
	umull	r2, r3, r8, r0
	add	r1, lr, r3
	mov	r3, r1
	asr	r1, r3, #31
	mov	r0, r1
	asr	r1, r0, #31
	ldr	r8, .L74+4
	mov	r9, #0
	and	r6, r0, r8
	and	r7, r1, r9
	adds	r4, r6, r2
	adc	r5, r7, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r4, #9
	orr	r2, r2, r5, lsl #23
	asr	r3, r5, #9
	mov	r3, r2
	sub	r3, ip, r3
	ldr	r2, .L74
	ldr	r1, [r2]
	ldr	r2, [fp, #-32]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L73
	bl	__stack_chk_fail
.L73:
	mov	r0, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L75:
	.align	2
.L74:
	.word	.LC13
	.word	511
	.size	aom_variance32x16_c, .-aom_variance32x16_c
	.section	.rodata
	.align	2
.LC14:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	aom_variance32x32_c
	.syntax unified
	.arm
	.fpu softvfp
	.type	aom_variance32x32_c, %function
aom_variance32x32_c:
	@ args = 4, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #48
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	str	r2, [fp, #-48]
	str	r3, [fp, #-52]
	ldr	r3, [fp, #4]
	str	r3, [fp, #-56]
	ldr	r3, .L79
	ldr	r3, [r3]
	str	r3, [fp, #-32]
	mov	r3,#0
	sub	r3, fp, #36
	str	r3, [sp, #12]
	ldr	r3, [fp, #-56]
	str	r3, [sp, #8]
	mov	r3, #32
	str	r3, [sp, #4]
	mov	r3, #32
	str	r3, [sp]
	ldr	r3, [fp, #-52]
	ldr	r2, [fp, #-48]
	ldr	r1, [fp, #-44]
	ldr	r0, [fp, #-40]
	bl	variance_c
	ldr	r3, [fp, #-56]
	ldr	ip, [r3]
	ldr	r3, [fp, #-36]
	mov	r8, r3
	asr	r9, r8, #31
	ldr	r3, [fp, #-36]
	mov	r0, r3
	asr	r1, r0, #31
	mul	r2, r0, r9
	mul	r3, r8, r1
	add	lr, r2, r3
	umull	r2, r3, r8, r0
	add	r1, lr, r3
	mov	r3, r1
	asr	r1, r3, #31
	mov	r0, r1
	asr	r1, r0, #31
	ldr	r8, .L79+4
	mov	r9, #0
	and	r6, r0, r8
	and	r7, r1, r9
	adds	r4, r6, r2
	adc	r5, r7, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r4, #10
	orr	r2, r2, r5, lsl #22
	asr	r3, r5, #10
	mov	r3, r2
	sub	r3, ip, r3
	ldr	r2, .L79
	ldr	r1, [r2]
	ldr	r2, [fp, #-32]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L78
	bl	__stack_chk_fail
.L78:
	mov	r0, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L80:
	.align	2
.L79:
	.word	.LC14
	.word	1023
	.size	aom_variance32x32_c, .-aom_variance32x32_c
	.section	.rodata
	.align	2
.LC15:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	aom_variance32x64_c
	.syntax unified
	.arm
	.fpu softvfp
	.type	aom_variance32x64_c, %function
aom_variance32x64_c:
	@ args = 4, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #48
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	str	r2, [fp, #-48]
	str	r3, [fp, #-52]
	ldr	r3, [fp, #4]
	str	r3, [fp, #-56]
	ldr	r3, .L84
	ldr	r3, [r3]
	str	r3, [fp, #-32]
	mov	r3,#0
	sub	r3, fp, #36
	str	r3, [sp, #12]
	ldr	r3, [fp, #-56]
	str	r3, [sp, #8]
	mov	r3, #64
	str	r3, [sp, #4]
	mov	r3, #32
	str	r3, [sp]
	ldr	r3, [fp, #-52]
	ldr	r2, [fp, #-48]
	ldr	r1, [fp, #-44]
	ldr	r0, [fp, #-40]
	bl	variance_c
	ldr	r3, [fp, #-56]
	ldr	ip, [r3]
	ldr	r3, [fp, #-36]
	mov	r8, r3
	asr	r9, r8, #31
	ldr	r3, [fp, #-36]
	mov	r0, r3
	asr	r1, r0, #31
	mul	r2, r0, r9
	mul	r3, r8, r1
	add	lr, r2, r3
	umull	r2, r3, r8, r0
	add	r1, lr, r3
	mov	r3, r1
	asr	r1, r3, #31
	mov	r0, r1
	asr	r1, r0, #31
	ldr	r8, .L84+4
	mov	r9, #0
	and	r6, r0, r8
	and	r7, r1, r9
	adds	r4, r6, r2
	adc	r5, r7, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r4, #11
	orr	r2, r2, r5, lsl #21
	asr	r3, r5, #11
	mov	r3, r2
	sub	r3, ip, r3
	ldr	r2, .L84
	ldr	r1, [r2]
	ldr	r2, [fp, #-32]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L83
	bl	__stack_chk_fail
.L83:
	mov	r0, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L85:
	.align	2
.L84:
	.word	.LC15
	.word	2047
	.size	aom_variance32x64_c, .-aom_variance32x64_c
	.section	.rodata
	.align	2
.LC16:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	aom_variance64x16_c
	.syntax unified
	.arm
	.fpu softvfp
	.type	aom_variance64x16_c, %function
aom_variance64x16_c:
	@ args = 4, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #48
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	str	r2, [fp, #-48]
	str	r3, [fp, #-52]
	ldr	r3, [fp, #4]
	str	r3, [fp, #-56]
	ldr	r3, .L89
	ldr	r3, [r3]
	str	r3, [fp, #-32]
	mov	r3,#0
	sub	r3, fp, #36
	str	r3, [sp, #12]
	ldr	r3, [fp, #-56]
	str	r3, [sp, #8]
	mov	r3, #16
	str	r3, [sp, #4]
	mov	r3, #64
	str	r3, [sp]
	ldr	r3, [fp, #-52]
	ldr	r2, [fp, #-48]
	ldr	r1, [fp, #-44]
	ldr	r0, [fp, #-40]
	bl	variance_c
	ldr	r3, [fp, #-56]
	ldr	ip, [r3]
	ldr	r3, [fp, #-36]
	mov	r8, r3
	asr	r9, r8, #31
	ldr	r3, [fp, #-36]
	mov	r0, r3
	asr	r1, r0, #31
	mul	r2, r0, r9
	mul	r3, r8, r1
	add	lr, r2, r3
	umull	r2, r3, r8, r0
	add	r1, lr, r3
	mov	r3, r1
	asr	r1, r3, #31
	mov	r0, r1
	asr	r1, r0, #31
	ldr	r8, .L89+4
	mov	r9, #0
	and	r6, r0, r8
	and	r7, r1, r9
	adds	r4, r6, r2
	adc	r5, r7, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r4, #10
	orr	r2, r2, r5, lsl #22
	asr	r3, r5, #10
	mov	r3, r2
	sub	r3, ip, r3
	ldr	r2, .L89
	ldr	r1, [r2]
	ldr	r2, [fp, #-32]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L88
	bl	__stack_chk_fail
.L88:
	mov	r0, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L90:
	.align	2
.L89:
	.word	.LC16
	.word	1023
	.size	aom_variance64x16_c, .-aom_variance64x16_c
	.section	.rodata
	.align	2
.LC17:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	aom_variance64x32_c
	.syntax unified
	.arm
	.fpu softvfp
	.type	aom_variance64x32_c, %function
aom_variance64x32_c:
	@ args = 4, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #48
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	str	r2, [fp, #-48]
	str	r3, [fp, #-52]
	ldr	r3, [fp, #4]
	str	r3, [fp, #-56]
	ldr	r3, .L94
	ldr	r3, [r3]
	str	r3, [fp, #-32]
	mov	r3,#0
	sub	r3, fp, #36
	str	r3, [sp, #12]
	ldr	r3, [fp, #-56]
	str	r3, [sp, #8]
	mov	r3, #32
	str	r3, [sp, #4]
	mov	r3, #64
	str	r3, [sp]
	ldr	r3, [fp, #-52]
	ldr	r2, [fp, #-48]
	ldr	r1, [fp, #-44]
	ldr	r0, [fp, #-40]
	bl	variance_c
	ldr	r3, [fp, #-56]
	ldr	ip, [r3]
	ldr	r3, [fp, #-36]
	mov	r8, r3
	asr	r9, r8, #31
	ldr	r3, [fp, #-36]
	mov	r0, r3
	asr	r1, r0, #31
	mul	r2, r0, r9
	mul	r3, r8, r1
	add	lr, r2, r3
	umull	r2, r3, r8, r0
	add	r1, lr, r3
	mov	r3, r1
	asr	r1, r3, #31
	mov	r0, r1
	asr	r1, r0, #31
	ldr	r8, .L94+4
	mov	r9, #0
	and	r6, r0, r8
	and	r7, r1, r9
	adds	r4, r6, r2
	adc	r5, r7, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r4, #11
	orr	r2, r2, r5, lsl #21
	asr	r3, r5, #11
	mov	r3, r2
	sub	r3, ip, r3
	ldr	r2, .L94
	ldr	r1, [r2]
	ldr	r2, [fp, #-32]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L93
	bl	__stack_chk_fail
.L93:
	mov	r0, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L95:
	.align	2
.L94:
	.word	.LC17
	.word	2047
	.size	aom_variance64x32_c, .-aom_variance64x32_c
	.section	.rodata
	.align	2
.LC18:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	aom_variance64x64_c
	.syntax unified
	.arm
	.fpu softvfp
	.type	aom_variance64x64_c, %function
aom_variance64x64_c:
	@ args = 4, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #48
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	str	r2, [fp, #-48]
	str	r3, [fp, #-52]
	ldr	r3, [fp, #4]
	str	r3, [fp, #-56]
	ldr	r3, .L99
	ldr	r3, [r3]
	str	r3, [fp, #-32]
	mov	r3,#0
	sub	r3, fp, #36
	str	r3, [sp, #12]
	ldr	r3, [fp, #-56]
	str	r3, [sp, #8]
	mov	r3, #64
	str	r3, [sp, #4]
	mov	r3, #64
	str	r3, [sp]
	ldr	r3, [fp, #-52]
	ldr	r2, [fp, #-48]
	ldr	r1, [fp, #-44]
	ldr	r0, [fp, #-40]
	bl	variance_c
	ldr	r3, [fp, #-56]
	ldr	ip, [r3]
	ldr	r3, [fp, #-36]
	mov	r8, r3
	asr	r9, r8, #31
	ldr	r3, [fp, #-36]
	mov	r0, r3
	asr	r1, r0, #31
	mul	r2, r0, r9
	mul	r3, r8, r1
	add	lr, r2, r3
	umull	r2, r3, r8, r0
	add	r1, lr, r3
	mov	r3, r1
	asr	r1, r3, #31
	mov	r0, r1
	asr	r1, r0, #31
	ldr	r8, .L99+4
	mov	r9, #0
	and	r6, r0, r8
	and	r7, r1, r9
	adds	r4, r6, r2
	adc	r5, r7, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r4, #12
	orr	r2, r2, r5, lsl #20
	asr	r3, r5, #12
	mov	r3, r2
	sub	r3, ip, r3
	ldr	r2, .L99
	ldr	r1, [r2]
	ldr	r2, [fp, #-32]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L98
	bl	__stack_chk_fail
.L98:
	mov	r0, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L100:
	.align	2
.L99:
	.word	.LC18
	.word	4095
	.size	aom_variance64x64_c, .-aom_variance64x64_c
	.section	.rodata
	.align	2
.LC19:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	aom_variance64x128_c
	.syntax unified
	.arm
	.fpu softvfp
	.type	aom_variance64x128_c, %function
aom_variance64x128_c:
	@ args = 4, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #48
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	str	r2, [fp, #-48]
	str	r3, [fp, #-52]
	ldr	r3, [fp, #4]
	str	r3, [fp, #-56]
	ldr	r3, .L104
	ldr	r3, [r3]
	str	r3, [fp, #-32]
	mov	r3,#0
	sub	r3, fp, #36
	str	r3, [sp, #12]
	ldr	r3, [fp, #-56]
	str	r3, [sp, #8]
	mov	r3, #128
	str	r3, [sp, #4]
	mov	r3, #64
	str	r3, [sp]
	ldr	r3, [fp, #-52]
	ldr	r2, [fp, #-48]
	ldr	r1, [fp, #-44]
	ldr	r0, [fp, #-40]
	bl	variance_c
	ldr	r3, [fp, #-56]
	ldr	ip, [r3]
	ldr	r3, [fp, #-36]
	mov	r8, r3
	asr	r9, r8, #31
	ldr	r3, [fp, #-36]
	mov	r0, r3
	asr	r1, r0, #31
	mul	r2, r0, r9
	mul	r3, r8, r1
	add	lr, r2, r3
	umull	r2, r3, r8, r0
	add	r1, lr, r3
	mov	r3, r1
	asr	r1, r3, #31
	mov	r0, r1
	asr	r1, r0, #31
	ldr	r8, .L104+4
	mov	r9, #0
	and	r6, r0, r8
	and	r7, r1, r9
	adds	r4, r6, r2
	adc	r5, r7, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r4, #13
	orr	r2, r2, r5, lsl #19
	asr	r3, r5, #13
	mov	r3, r2
	sub	r3, ip, r3
	ldr	r2, .L104
	ldr	r1, [r2]
	ldr	r2, [fp, #-32]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L103
	bl	__stack_chk_fail
.L103:
	mov	r0, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L105:
	.align	2
.L104:
	.word	.LC19
	.word	8191
	.size	aom_variance64x128_c, .-aom_variance64x128_c
	.section	.rodata
	.align	2
.LC20:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	aom_variance128x64_c
	.syntax unified
	.arm
	.fpu softvfp
	.type	aom_variance128x64_c, %function
aom_variance128x64_c:
	@ args = 4, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #48
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	str	r2, [fp, #-48]
	str	r3, [fp, #-52]
	ldr	r3, [fp, #4]
	str	r3, [fp, #-56]
	ldr	r3, .L109
	ldr	r3, [r3]
	str	r3, [fp, #-32]
	mov	r3,#0
	sub	r3, fp, #36
	str	r3, [sp, #12]
	ldr	r3, [fp, #-56]
	str	r3, [sp, #8]
	mov	r3, #64
	str	r3, [sp, #4]
	mov	r3, #128
	str	r3, [sp]
	ldr	r3, [fp, #-52]
	ldr	r2, [fp, #-48]
	ldr	r1, [fp, #-44]
	ldr	r0, [fp, #-40]
	bl	variance_c
	ldr	r3, [fp, #-56]
	ldr	ip, [r3]
	ldr	r3, [fp, #-36]
	mov	r8, r3
	asr	r9, r8, #31
	ldr	r3, [fp, #-36]
	mov	r0, r3
	asr	r1, r0, #31
	mul	r2, r0, r9
	mul	r3, r8, r1
	add	lr, r2, r3
	umull	r2, r3, r8, r0
	add	r1, lr, r3
	mov	r3, r1
	asr	r1, r3, #31
	mov	r0, r1
	asr	r1, r0, #31
	ldr	r8, .L109+4
	mov	r9, #0
	and	r6, r0, r8
	and	r7, r1, r9
	adds	r4, r6, r2
	adc	r5, r7, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r4, #13
	orr	r2, r2, r5, lsl #19
	asr	r3, r5, #13
	mov	r3, r2
	sub	r3, ip, r3
	ldr	r2, .L109
	ldr	r1, [r2]
	ldr	r2, [fp, #-32]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L108
	bl	__stack_chk_fail
.L108:
	mov	r0, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L110:
	.align	2
.L109:
	.word	.LC20
	.word	8191
	.size	aom_variance128x64_c, .-aom_variance128x64_c
	.section	.rodata
	.align	2
.LC21:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	aom_variance128x128_c
	.syntax unified
	.arm
	.fpu softvfp
	.type	aom_variance128x128_c, %function
aom_variance128x128_c:
	@ args = 4, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #48
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	str	r2, [fp, #-48]
	str	r3, [fp, #-52]
	ldr	r3, [fp, #4]
	str	r3, [fp, #-56]
	ldr	r3, .L114
	ldr	r3, [r3]
	str	r3, [fp, #-32]
	mov	r3,#0
	sub	r3, fp, #36
	str	r3, [sp, #12]
	ldr	r3, [fp, #-56]
	str	r3, [sp, #8]
	mov	r3, #128
	str	r3, [sp, #4]
	mov	r3, #128
	str	r3, [sp]
	ldr	r3, [fp, #-52]
	ldr	r2, [fp, #-48]
	ldr	r1, [fp, #-44]
	ldr	r0, [fp, #-40]
	bl	variance_c
	ldr	r3, [fp, #-56]
	ldr	ip, [r3]
	ldr	r3, [fp, #-36]
	mov	r8, r3
	asr	r9, r8, #31
	ldr	r3, [fp, #-36]
	mov	r0, r3
	asr	r1, r0, #31
	mul	r2, r0, r9
	mul	r3, r8, r1
	add	lr, r2, r3
	umull	r2, r3, r8, r0
	add	r1, lr, r3
	mov	r3, r1
	asr	r1, r3, #31
	mov	r0, r1
	asr	r1, r0, #31
	ldr	r8, .L114+4
	mov	r9, #0
	and	r6, r0, r8
	and	r7, r1, r9
	adds	r4, r6, r2
	adc	r5, r7, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r4, #14
	orr	r2, r2, r5, lsl #18
	asr	r3, r5, #14
	mov	r3, r2
	sub	r3, ip, r3
	ldr	r2, .L114
	ldr	r1, [r2]
	ldr	r2, [fp, #-32]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L113
	bl	__stack_chk_fail
.L113:
	mov	r0, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L115:
	.align	2
.L114:
	.word	.LC21
	.word	16383
	.size	aom_variance128x128_c, .-aom_variance128x128_c
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
