	.file	"28357.c"
	.intel_syntax noprefix
	.text
	.globl	add_int8_t
	.type	add_int8_t, @function
add_int8_t:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edx, edi
	mov	eax, esi
	mov	BYTE PTR -4[rbp], dl
	mov	BYTE PTR -8[rbp], al
	movzx	edx, BYTE PTR -4[rbp]
	movzx	eax, BYTE PTR -8[rbp]
	add	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	add_int8_t, .-add_int8_t
	.globl	sub_int8_t
	.type	sub_int8_t, @function
sub_int8_t:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edx, edi
	mov	eax, esi
	mov	BYTE PTR -4[rbp], dl
	mov	BYTE PTR -8[rbp], al
	movzx	eax, BYTE PTR -4[rbp]
	movzx	edx, BYTE PTR -8[rbp]
	sub	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	sub_int8_t, .-sub_int8_t
	.globl	mul_int8_t
	.type	mul_int8_t, @function
mul_int8_t:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edx, edi
	mov	eax, esi
	mov	BYTE PTR -4[rbp], dl
	mov	BYTE PTR -8[rbp], al
	movzx	eax, BYTE PTR -4[rbp]
	movzx	edx, BYTE PTR -8[rbp]
	imul	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	mul_int8_t, .-mul_int8_t
	.globl	div_int8_t
	.type	div_int8_t, @function
div_int8_t:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edx, edi
	mov	eax, esi
	mov	BYTE PTR -4[rbp], dl
	mov	BYTE PTR -8[rbp], al
	movsx	eax, BYTE PTR -4[rbp]
	movsx	ecx, BYTE PTR -8[rbp]
	cdq
	idiv	ecx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	div_int8_t, .-div_int8_t
	.globl	ret_int8_t
	.type	ret_int8_t, @function
ret_int8_t:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	BYTE PTR -4[rbp], al
	movzx	eax, BYTE PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	ret_int8_t, .-ret_int8_t
	.globl	add_int16_t
	.type	add_int16_t, @function
add_int16_t:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edx, edi
	mov	eax, esi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	movzx	edx, WORD PTR -4[rbp]
	movzx	eax, WORD PTR -8[rbp]
	add	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	add_int16_t, .-add_int16_t
	.globl	sub_int16_t
	.type	sub_int16_t, @function
sub_int16_t:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edx, edi
	mov	eax, esi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	movzx	eax, WORD PTR -4[rbp]
	movzx	edx, WORD PTR -8[rbp]
	sub	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	sub_int16_t, .-sub_int16_t
	.globl	mul_int16_t
	.type	mul_int16_t, @function
mul_int16_t:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edx, edi
	mov	eax, esi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	movzx	edx, WORD PTR -4[rbp]
	movzx	eax, WORD PTR -8[rbp]
	imul	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	mul_int16_t, .-mul_int16_t
	.globl	div_int16_t
	.type	div_int16_t, @function
div_int16_t:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edx, edi
	mov	eax, esi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	movsx	eax, WORD PTR -4[rbp]
	movsx	ecx, WORD PTR -8[rbp]
	cdq
	idiv	ecx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	div_int16_t, .-div_int16_t
	.globl	ret_int16_t
	.type	ret_int16_t, @function
ret_int16_t:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	WORD PTR -4[rbp], ax
	movzx	eax, WORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	ret_int16_t, .-ret_int16_t
	.globl	add_int32_t
	.type	add_int32_t, @function
add_int32_t:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	edx, DWORD PTR -4[rbp]
	mov	eax, DWORD PTR -8[rbp]
	add	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	add_int32_t, .-add_int32_t
	.globl	sub_int32_t
	.type	sub_int32_t, @function
sub_int32_t:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -4[rbp]
	sub	eax, DWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	sub_int32_t, .-sub_int32_t
	.globl	mul_int32_t
	.type	mul_int32_t, @function
mul_int32_t:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -4[rbp]
	imul	eax, DWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	mul_int32_t, .-mul_int32_t
	.globl	div_int32_t
	.type	div_int32_t, @function
div_int32_t:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -4[rbp]
	cdq
	idiv	DWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	div_int32_t, .-div_int32_t
	.globl	ret_int32_t
	.type	ret_int32_t, @function
ret_int32_t:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	ret_int32_t, .-ret_int32_t
	.globl	add_int64_t
	.type	add_int64_t, @function
add_int64_t:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	add_int64_t, .-add_int64_t
	.globl	sub_int64_t
	.type	sub_int64_t, @function
sub_int64_t:
.LFB16:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE16:
	.size	sub_int64_t, .-sub_int64_t
	.globl	mul_int64_t
	.type	mul_int64_t, @function
mul_int64_t:
.LFB17:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -8[rbp]
	imul	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE17:
	.size	mul_int64_t, .-mul_int64_t
	.globl	div_int64_t
	.type	div_int64_t, @function
div_int64_t:
.LFB18:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -8[rbp]
	cqo
	idiv	QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE18:
	.size	div_int64_t, .-div_int64_t
	.globl	ret_int64_t
	.type	ret_int64_t, @function
ret_int64_t:
.LFB19:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE19:
	.size	ret_int64_t, .-ret_int64_t
	.globl	add_uint8_t
	.type	add_uint8_t, @function
add_uint8_t:
.LFB20:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edx, edi
	mov	eax, esi
	mov	BYTE PTR -4[rbp], dl
	mov	BYTE PTR -8[rbp], al
	movzx	edx, BYTE PTR -4[rbp]
	movzx	eax, BYTE PTR -8[rbp]
	add	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE20:
	.size	add_uint8_t, .-add_uint8_t
	.globl	sub_uint8_t
	.type	sub_uint8_t, @function
sub_uint8_t:
.LFB21:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edx, edi
	mov	eax, esi
	mov	BYTE PTR -4[rbp], dl
	mov	BYTE PTR -8[rbp], al
	movzx	eax, BYTE PTR -4[rbp]
	sub	al, BYTE PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE21:
	.size	sub_uint8_t, .-sub_uint8_t
	.globl	mul_uint8_t
	.type	mul_uint8_t, @function
mul_uint8_t:
.LFB22:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edx, edi
	mov	eax, esi
	mov	BYTE PTR -4[rbp], dl
	mov	BYTE PTR -8[rbp], al
	movzx	eax, BYTE PTR -4[rbp]
	mul	BYTE PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE22:
	.size	mul_uint8_t, .-mul_uint8_t
	.globl	div_uint8_t
	.type	div_uint8_t, @function
div_uint8_t:
.LFB23:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edx, edi
	mov	eax, esi
	mov	BYTE PTR -4[rbp], dl
	mov	BYTE PTR -8[rbp], al
	movzx	eax, BYTE PTR -4[rbp]
	movzx	eax, al
	div	BYTE PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE23:
	.size	div_uint8_t, .-div_uint8_t
	.globl	ret_uint8_t
	.type	ret_uint8_t, @function
ret_uint8_t:
.LFB24:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	BYTE PTR -4[rbp], al
	movzx	eax, BYTE PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE24:
	.size	ret_uint8_t, .-ret_uint8_t
	.globl	add_uint16_t
	.type	add_uint16_t, @function
add_uint16_t:
.LFB25:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edx, edi
	mov	eax, esi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	movzx	edx, WORD PTR -4[rbp]
	movzx	eax, WORD PTR -8[rbp]
	add	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE25:
	.size	add_uint16_t, .-add_uint16_t
	.globl	sub_uint16_t
	.type	sub_uint16_t, @function
sub_uint16_t:
.LFB26:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edx, edi
	mov	eax, esi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	movzx	eax, WORD PTR -4[rbp]
	sub	ax, WORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE26:
	.size	sub_uint16_t, .-sub_uint16_t
	.globl	mul_uint16_t
	.type	mul_uint16_t, @function
mul_uint16_t:
.LFB27:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edx, edi
	mov	eax, esi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	movzx	eax, WORD PTR -4[rbp]
	imul	ax, WORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE27:
	.size	mul_uint16_t, .-mul_uint16_t
	.globl	div_uint16_t
	.type	div_uint16_t, @function
div_uint16_t:
.LFB28:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edx, edi
	mov	eax, esi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	movzx	eax, WORD PTR -4[rbp]
	mov	edx, 0
	div	WORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE28:
	.size	div_uint16_t, .-div_uint16_t
	.globl	ret_uint16_t
	.type	ret_uint16_t, @function
ret_uint16_t:
.LFB29:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	WORD PTR -4[rbp], ax
	movzx	eax, WORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE29:
	.size	ret_uint16_t, .-ret_uint16_t
	.globl	add_uint32_t
	.type	add_uint32_t, @function
add_uint32_t:
.LFB30:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	edx, DWORD PTR -4[rbp]
	mov	eax, DWORD PTR -8[rbp]
	add	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE30:
	.size	add_uint32_t, .-add_uint32_t
	.globl	sub_uint32_t
	.type	sub_uint32_t, @function
sub_uint32_t:
.LFB31:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -4[rbp]
	sub	eax, DWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE31:
	.size	sub_uint32_t, .-sub_uint32_t
	.globl	mul_uint32_t
	.type	mul_uint32_t, @function
mul_uint32_t:
.LFB32:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -4[rbp]
	imul	eax, DWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE32:
	.size	mul_uint32_t, .-mul_uint32_t
	.globl	div_uint32_t
	.type	div_uint32_t, @function
div_uint32_t:
.LFB33:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, 0
	div	DWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE33:
	.size	div_uint32_t, .-div_uint32_t
	.globl	ret_uint32_t
	.type	ret_uint32_t, @function
ret_uint32_t:
.LFB34:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE34:
	.size	ret_uint32_t, .-ret_uint32_t
	.globl	add_uint64_t
	.type	add_uint64_t, @function
add_uint64_t:
.LFB35:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE35:
	.size	add_uint64_t, .-add_uint64_t
	.globl	sub_uint64_t
	.type	sub_uint64_t, @function
sub_uint64_t:
.LFB36:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE36:
	.size	sub_uint64_t, .-sub_uint64_t
	.globl	mul_uint64_t
	.type	mul_uint64_t, @function
mul_uint64_t:
.LFB37:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -8[rbp]
	imul	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE37:
	.size	mul_uint64_t, .-mul_uint64_t
	.globl	div_uint64_t
	.type	div_uint64_t, @function
div_uint64_t:
.LFB38:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -8[rbp]
	mov	edx, 0
	div	QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE38:
	.size	div_uint64_t, .-div_uint64_t
	.globl	ret_uint64_t
	.type	ret_uint64_t, @function
ret_uint64_t:
.LFB39:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE39:
	.size	ret_uint64_t, .-ret_uint64_t
	.globl	add_float
	.type	add_float, @function
add_float:
.LFB40:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	DWORD PTR -8[rbp], xmm1
	movss	xmm0, DWORD PTR -4[rbp]
	addss	xmm0, DWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE40:
	.size	add_float, .-add_float
	.globl	sub_float
	.type	sub_float, @function
sub_float:
.LFB41:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	DWORD PTR -8[rbp], xmm1
	movss	xmm0, DWORD PTR -4[rbp]
	subss	xmm0, DWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE41:
	.size	sub_float, .-sub_float
	.globl	mul_float
	.type	mul_float, @function
mul_float:
.LFB42:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	DWORD PTR -8[rbp], xmm1
	movss	xmm0, DWORD PTR -4[rbp]
	mulss	xmm0, DWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE42:
	.size	mul_float, .-mul_float
	.globl	div_float
	.type	div_float, @function
div_float:
.LFB43:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	DWORD PTR -8[rbp], xmm1
	movss	xmm0, DWORD PTR -4[rbp]
	divss	xmm0, DWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE43:
	.size	div_float, .-div_float
	.globl	ret_float
	.type	ret_float, @function
ret_float:
.LFB44:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	xmm0, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE44:
	.size	ret_float, .-ret_float
	.globl	add_double
	.type	add_double, @function
add_double:
.LFB45:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	QWORD PTR -16[rbp], xmm1
	movsd	xmm0, QWORD PTR -8[rbp]
	addsd	xmm0, QWORD PTR -16[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE45:
	.size	add_double, .-add_double
	.globl	sub_double
	.type	sub_double, @function
sub_double:
.LFB46:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	QWORD PTR -16[rbp], xmm1
	movsd	xmm0, QWORD PTR -8[rbp]
	subsd	xmm0, QWORD PTR -16[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE46:
	.size	sub_double, .-sub_double
	.globl	mul_double
	.type	mul_double, @function
mul_double:
.LFB47:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	QWORD PTR -16[rbp], xmm1
	movsd	xmm0, QWORD PTR -8[rbp]
	mulsd	xmm0, QWORD PTR -16[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE47:
	.size	mul_double, .-mul_double
	.globl	div_double
	.type	div_double, @function
div_double:
.LFB48:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	QWORD PTR -16[rbp], xmm1
	movsd	xmm0, QWORD PTR -8[rbp]
	divsd	xmm0, QWORD PTR -16[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE48:
	.size	div_double, .-div_double
	.globl	ret_double
	.type	ret_double, @function
ret_double:
.LFB49:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	xmm0, QWORD PTR -8[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE49:
	.size	ret_double, .-ret_double
	.globl	add_long
	.type	add_long, @function
add_long:
.LFB50:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE50:
	.size	add_long, .-add_long
	.globl	sub_long
	.type	sub_long, @function
sub_long:
.LFB51:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE51:
	.size	sub_long, .-sub_long
	.globl	mul_long
	.type	mul_long, @function
mul_long:
.LFB52:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -8[rbp]
	imul	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE52:
	.size	mul_long, .-mul_long
	.globl	div_long
	.type	div_long, @function
div_long:
.LFB53:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -8[rbp]
	cqo
	idiv	QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE53:
	.size	div_long, .-div_long
	.globl	ret_long
	.type	ret_long, @function
ret_long:
.LFB54:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE54:
	.size	ret_long, .-ret_long
	.globl	add_ulong
	.type	add_ulong, @function
add_ulong:
.LFB55:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE55:
	.size	add_ulong, .-add_ulong
	.globl	sub_ulong
	.type	sub_ulong, @function
sub_ulong:
.LFB56:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE56:
	.size	sub_ulong, .-sub_ulong
	.globl	mul_ulong
	.type	mul_ulong, @function
mul_ulong:
.LFB57:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -8[rbp]
	imul	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE57:
	.size	mul_ulong, .-mul_ulong
	.globl	div_ulong
	.type	div_ulong, @function
div_ulong:
.LFB58:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -8[rbp]
	mov	edx, 0
	div	QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE58:
	.size	div_ulong, .-div_ulong
	.globl	ret_ulong
	.type	ret_ulong, @function
ret_ulong:
.LFB59:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE59:
	.size	ret_ulong, .-ret_ulong
	.globl	add_Signed8
	.type	add_Signed8, @function
add_Signed8:
.LFB60:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edx, edi
	mov	eax, esi
	mov	BYTE PTR -4[rbp], dl
	mov	BYTE PTR -8[rbp], al
	movzx	edx, BYTE PTR -4[rbp]
	movzx	eax, BYTE PTR -8[rbp]
	add	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE60:
	.size	add_Signed8, .-add_Signed8
	.globl	sub_Signed8
	.type	sub_Signed8, @function
sub_Signed8:
.LFB61:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edx, edi
	mov	eax, esi
	mov	BYTE PTR -4[rbp], dl
	mov	BYTE PTR -8[rbp], al
	movzx	eax, BYTE PTR -4[rbp]
	movzx	edx, BYTE PTR -8[rbp]
	sub	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE61:
	.size	sub_Signed8, .-sub_Signed8
	.globl	mul_Signed8
	.type	mul_Signed8, @function
mul_Signed8:
.LFB62:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edx, edi
	mov	eax, esi
	mov	BYTE PTR -4[rbp], dl
	mov	BYTE PTR -8[rbp], al
	movzx	eax, BYTE PTR -4[rbp]
	movzx	edx, BYTE PTR -8[rbp]
	imul	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE62:
	.size	mul_Signed8, .-mul_Signed8
	.globl	div_Signed8
	.type	div_Signed8, @function
div_Signed8:
.LFB63:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edx, edi
	mov	eax, esi
	mov	BYTE PTR -4[rbp], dl
	mov	BYTE PTR -8[rbp], al
	movsx	eax, BYTE PTR -4[rbp]
	movsx	ecx, BYTE PTR -8[rbp]
	cdq
	idiv	ecx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE63:
	.size	div_Signed8, .-div_Signed8
	.globl	ret_Signed8
	.type	ret_Signed8, @function
ret_Signed8:
.LFB64:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	BYTE PTR -4[rbp], al
	movzx	eax, BYTE PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE64:
	.size	ret_Signed8, .-ret_Signed8
	.globl	add_Signed16
	.type	add_Signed16, @function
add_Signed16:
.LFB65:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edx, edi
	mov	eax, esi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	movzx	edx, WORD PTR -4[rbp]
	movzx	eax, WORD PTR -8[rbp]
	add	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE65:
	.size	add_Signed16, .-add_Signed16
	.globl	sub_Signed16
	.type	sub_Signed16, @function
sub_Signed16:
.LFB66:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edx, edi
	mov	eax, esi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	movzx	eax, WORD PTR -4[rbp]
	movzx	edx, WORD PTR -8[rbp]
	sub	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE66:
	.size	sub_Signed16, .-sub_Signed16
	.globl	mul_Signed16
	.type	mul_Signed16, @function
mul_Signed16:
.LFB67:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edx, edi
	mov	eax, esi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	movzx	edx, WORD PTR -4[rbp]
	movzx	eax, WORD PTR -8[rbp]
	imul	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE67:
	.size	mul_Signed16, .-mul_Signed16
	.globl	div_Signed16
	.type	div_Signed16, @function
div_Signed16:
.LFB68:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edx, edi
	mov	eax, esi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	movsx	eax, WORD PTR -4[rbp]
	movsx	ecx, WORD PTR -8[rbp]
	cdq
	idiv	ecx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE68:
	.size	div_Signed16, .-div_Signed16
	.globl	ret_Signed16
	.type	ret_Signed16, @function
ret_Signed16:
.LFB69:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	WORD PTR -4[rbp], ax
	movzx	eax, WORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE69:
	.size	ret_Signed16, .-ret_Signed16
	.globl	add_Signed32
	.type	add_Signed32, @function
add_Signed32:
.LFB70:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	edx, DWORD PTR -4[rbp]
	mov	eax, DWORD PTR -8[rbp]
	add	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE70:
	.size	add_Signed32, .-add_Signed32
	.globl	sub_Signed32
	.type	sub_Signed32, @function
sub_Signed32:
.LFB71:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -4[rbp]
	sub	eax, DWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE71:
	.size	sub_Signed32, .-sub_Signed32
	.globl	mul_Signed32
	.type	mul_Signed32, @function
mul_Signed32:
.LFB72:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -4[rbp]
	imul	eax, DWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE72:
	.size	mul_Signed32, .-mul_Signed32
	.globl	div_Signed32
	.type	div_Signed32, @function
div_Signed32:
.LFB73:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -4[rbp]
	cdq
	idiv	DWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE73:
	.size	div_Signed32, .-div_Signed32
	.globl	ret_Signed32
	.type	ret_Signed32, @function
ret_Signed32:
.LFB74:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE74:
	.size	ret_Signed32, .-ret_Signed32
	.globl	add_Signed64
	.type	add_Signed64, @function
add_Signed64:
.LFB75:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE75:
	.size	add_Signed64, .-add_Signed64
	.globl	sub_Signed64
	.type	sub_Signed64, @function
sub_Signed64:
.LFB76:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE76:
	.size	sub_Signed64, .-sub_Signed64
	.globl	mul_Signed64
	.type	mul_Signed64, @function
mul_Signed64:
.LFB77:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -8[rbp]
	imul	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE77:
	.size	mul_Signed64, .-mul_Signed64
	.globl	div_Signed64
	.type	div_Signed64, @function
div_Signed64:
.LFB78:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -8[rbp]
	cqo
	idiv	QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE78:
	.size	div_Signed64, .-div_Signed64
	.globl	ret_Signed64
	.type	ret_Signed64, @function
ret_Signed64:
.LFB79:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE79:
	.size	ret_Signed64, .-ret_Signed64
	.globl	add_SignedLong
	.type	add_SignedLong, @function
add_SignedLong:
.LFB80:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE80:
	.size	add_SignedLong, .-add_SignedLong
	.globl	sub_SignedLong
	.type	sub_SignedLong, @function
sub_SignedLong:
.LFB81:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE81:
	.size	sub_SignedLong, .-sub_SignedLong
	.globl	mul_SignedLong
	.type	mul_SignedLong, @function
mul_SignedLong:
.LFB82:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -8[rbp]
	imul	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE82:
	.size	mul_SignedLong, .-mul_SignedLong
	.globl	div_SignedLong
	.type	div_SignedLong, @function
div_SignedLong:
.LFB83:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -8[rbp]
	cqo
	idiv	QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE83:
	.size	div_SignedLong, .-div_SignedLong
	.globl	ret_SignedLong
	.type	ret_SignedLong, @function
ret_SignedLong:
.LFB84:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE84:
	.size	ret_SignedLong, .-ret_SignedLong
	.globl	add_Float32
	.type	add_Float32, @function
add_Float32:
.LFB85:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	DWORD PTR -8[rbp], xmm1
	movss	xmm0, DWORD PTR -4[rbp]
	addss	xmm0, DWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE85:
	.size	add_Float32, .-add_Float32
	.globl	sub_Float32
	.type	sub_Float32, @function
sub_Float32:
.LFB86:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	DWORD PTR -8[rbp], xmm1
	movss	xmm0, DWORD PTR -4[rbp]
	subss	xmm0, DWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE86:
	.size	sub_Float32, .-sub_Float32
	.globl	mul_Float32
	.type	mul_Float32, @function
mul_Float32:
.LFB87:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	DWORD PTR -8[rbp], xmm1
	movss	xmm0, DWORD PTR -4[rbp]
	mulss	xmm0, DWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE87:
	.size	mul_Float32, .-mul_Float32
	.globl	div_Float32
	.type	div_Float32, @function
div_Float32:
.LFB88:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	DWORD PTR -8[rbp], xmm1
	movss	xmm0, DWORD PTR -4[rbp]
	divss	xmm0, DWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE88:
	.size	div_Float32, .-div_Float32
	.globl	ret_Float32
	.type	ret_Float32, @function
ret_Float32:
.LFB89:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	xmm0, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE89:
	.size	ret_Float32, .-ret_Float32
	.globl	add_Float64
	.type	add_Float64, @function
add_Float64:
.LFB90:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	QWORD PTR -16[rbp], xmm1
	movsd	xmm0, QWORD PTR -8[rbp]
	addsd	xmm0, QWORD PTR -16[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE90:
	.size	add_Float64, .-add_Float64
	.globl	sub_Float64
	.type	sub_Float64, @function
sub_Float64:
.LFB91:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	QWORD PTR -16[rbp], xmm1
	movsd	xmm0, QWORD PTR -8[rbp]
	subsd	xmm0, QWORD PTR -16[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE91:
	.size	sub_Float64, .-sub_Float64
	.globl	mul_Float64
	.type	mul_Float64, @function
mul_Float64:
.LFB92:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	QWORD PTR -16[rbp], xmm1
	movsd	xmm0, QWORD PTR -8[rbp]
	mulsd	xmm0, QWORD PTR -16[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE92:
	.size	mul_Float64, .-mul_Float64
	.globl	div_Float64
	.type	div_Float64, @function
div_Float64:
.LFB93:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	QWORD PTR -16[rbp], xmm1
	movsd	xmm0, QWORD PTR -8[rbp]
	divsd	xmm0, QWORD PTR -16[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE93:
	.size	div_Float64, .-div_Float64
	.globl	ret_Float64
	.type	ret_Float64, @function
ret_Float64:
.LFB94:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	xmm0, QWORD PTR -8[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE94:
	.size	ret_Float64, .-ret_Float64
	.globl	ret_pointer
	.type	ret_pointer, @function
ret_pointer:
.LFB95:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE95:
	.size	ret_pointer, .-ret_pointer
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"28357.c"
	.text
	.align	2
	.global	add_int8_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_int8_t, %function
add_int8_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	mov	r2, r1
	strb	r3, [fp, #-5]
	mov	r3, r2
	strb	r3, [fp, #-6]
	ldrb	r2, [fp, #-5]	@ zero_extendqisi2
	ldrb	r3, [fp, #-6]	@ zero_extendqisi2
	add	r3, r2, r3
	and	r3, r3, #255
	lsl	r3, r3, #24
	asr	r3, r3, #24
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	add_int8_t, .-add_int8_t
	.align	2
	.global	sub_int8_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	sub_int8_t, %function
sub_int8_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	mov	r2, r1
	strb	r3, [fp, #-5]
	mov	r3, r2
	strb	r3, [fp, #-6]
	ldrb	r2, [fp, #-5]	@ zero_extendqisi2
	ldrb	r3, [fp, #-6]	@ zero_extendqisi2
	sub	r3, r2, r3
	and	r3, r3, #255
	lsl	r3, r3, #24
	asr	r3, r3, #24
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	sub_int8_t, .-sub_int8_t
	.align	2
	.global	mul_int8_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	mul_int8_t, %function
mul_int8_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	mov	r2, r1
	strb	r3, [fp, #-5]
	mov	r3, r2
	strb	r3, [fp, #-6]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	ldrb	r2, [fp, #-6]	@ zero_extendqisi2
	mul	r3, r2, r3
	and	r3, r3, #255
	lsl	r3, r3, #24
	asr	r3, r3, #24
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	mul_int8_t, .-mul_int8_t
	.global	__aeabi_idiv
	.align	2
	.global	div_int8_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	div_int8_t, %function
div_int8_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	mov	r2, r1
	strb	r3, [fp, #-5]
	mov	r3, r2
	strb	r3, [fp, #-6]
	ldrsb	r3, [fp, #-5]
	ldrsb	r2, [fp, #-6]
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_idiv
	mov	r3, r0
	lsl	r3, r3, #24
	asr	r3, r3, #24
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	div_int8_t, .-div_int8_t
	.align	2
	.global	ret_int8_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	ret_int8_t, %function
ret_int8_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrsb	r3, [fp, #-5]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	ret_int8_t, .-ret_int8_t
	.align	2
	.global	add_int16_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_int16_t, %function
add_int16_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	mov	r2, r1
	strh	r3, [fp, #-6]	@ movhi
	mov	r3, r2	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	ldrh	r2, [fp, #-6]
	ldrh	r3, [fp, #-8]
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	add_int16_t, .-add_int16_t
	.align	2
	.global	sub_int16_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	sub_int16_t, %function
sub_int16_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	mov	r2, r1
	strh	r3, [fp, #-6]	@ movhi
	mov	r3, r2	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	ldrh	r2, [fp, #-6]
	ldrh	r3, [fp, #-8]
	sub	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	sub_int16_t, .-sub_int16_t
	.align	2
	.global	mul_int16_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	mul_int16_t, %function
mul_int16_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	mov	r2, r1
	strh	r3, [fp, #-6]	@ movhi
	mov	r3, r2	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	ldrh	r3, [fp, #-6]
	ldrh	r2, [fp, #-8]
	mul	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	mul_int16_t, .-mul_int16_t
	.align	2
	.global	div_int16_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	div_int16_t, %function
div_int16_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	mov	r2, r1
	strh	r3, [fp, #-6]	@ movhi
	mov	r3, r2	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	ldrsh	r3, [fp, #-6]
	ldrsh	r2, [fp, #-8]
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_idiv
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	div_int16_t, .-div_int16_t
	.align	2
	.global	ret_int16_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	ret_int16_t, %function
ret_int16_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	strh	r3, [fp, #-6]	@ movhi
	ldrsh	r3, [fp, #-6]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	ret_int16_t, .-ret_int16_t
	.align	2
	.global	add_int32_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_int32_t, %function
add_int32_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	add	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	add_int32_t, .-add_int32_t
	.align	2
	.global	sub_int32_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	sub_int32_t, %function
sub_int32_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	sub	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	sub_int32_t, .-sub_int32_t
	.align	2
	.global	mul_int32_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	mul_int32_t, %function
mul_int32_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-8]
	ldr	r2, [fp, #-12]
	mul	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	mul_int32_t, .-mul_int32_t
	.align	2
	.global	div_int32_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	div_int32_t, %function
div_int32_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r1, [fp, #-12]
	ldr	r0, [fp, #-8]
	bl	__aeabi_idiv
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	div_int32_t, .-div_int32_t
	.align	2
	.global	ret_int32_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	ret_int32_t, %function
ret_int32_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	ret_int32_t, .-ret_int32_t
	.align	2
	.global	add_int64_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_int64_t, %function
add_int64_t:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, fp}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-20]
	str	r1, [fp, #-16]
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	adds	r4, r0, r2
	adc	r5, r1, r3
	mov	r2, r4
	mov	r3, r5
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, r5, fp}
	bx	lr
	.size	add_int64_t, .-add_int64_t
	.align	2
	.global	sub_int64_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	sub_int64_t, %function
sub_int64_t:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, fp}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-20]
	str	r1, [fp, #-16]
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	subs	r4, r0, r2
	sbc	r5, r1, r3
	mov	r2, r4
	mov	r3, r5
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, r5, fp}
	bx	lr
	.size	sub_int64_t, .-sub_int64_t
	.align	2
	.global	mul_int64_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	mul_int64_t, %function
mul_int64_t:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-8]
	ldr	r2, [fp, #-20]
	mul	r2, r3, r2
	ldr	r3, [fp, #-16]
	ldr	r1, [fp, #-12]
	mul	r3, r1, r3
	add	r1, r2, r3
	ldr	ip, [fp, #-12]
	ldr	r0, [fp, #-20]
	umull	r2, r3, ip, r0
	add	r1, r1, r3
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	mul_int64_t, .-mul_int64_t
	.global	__aeabi_ldivmod
	.align	2
	.global	div_int64_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	div_int64_t, %function
div_int64_t:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_ldivmod
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	div_int64_t, .-div_int64_t
	.align	2
	.global	ret_int64_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	ret_int64_t, %function
ret_int64_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	ret_int64_t, .-ret_int64_t
	.align	2
	.global	add_uint8_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_uint8_t, %function
add_uint8_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	mov	r2, r1
	strb	r3, [fp, #-5]
	mov	r3, r2
	strb	r3, [fp, #-6]
	ldrb	r2, [fp, #-5]
	ldrb	r3, [fp, #-6]
	add	r3, r2, r3
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	add_uint8_t, .-add_uint8_t
	.align	2
	.global	sub_uint8_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	sub_uint8_t, %function
sub_uint8_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	mov	r2, r1
	strb	r3, [fp, #-5]
	mov	r3, r2
	strb	r3, [fp, #-6]
	ldrb	r2, [fp, #-5]
	ldrb	r3, [fp, #-6]
	sub	r3, r2, r3
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	sub_uint8_t, .-sub_uint8_t
	.align	2
	.global	mul_uint8_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	mul_uint8_t, %function
mul_uint8_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	mov	r2, r1
	strb	r3, [fp, #-5]
	mov	r3, r2
	strb	r3, [fp, #-6]
	ldrb	r1, [fp, #-5]
	ldrb	r2, [fp, #-6]
	mul	r3, r2, r1
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	mul_uint8_t, .-mul_uint8_t
	.global	__aeabi_uidiv
	.align	2
	.global	div_uint8_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	div_uint8_t, %function
div_uint8_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	mov	r2, r1
	strb	r3, [fp, #-5]
	mov	r3, r2
	strb	r3, [fp, #-6]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	ldrb	r2, [fp, #-6]	@ zero_extendqisi2
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_uidiv
	mov	r3, r0
	and	r3, r3, #255
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	div_uint8_t, .-div_uint8_t
	.align	2
	.global	ret_uint8_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	ret_uint8_t, %function
ret_uint8_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	ret_uint8_t, .-ret_uint8_t
	.align	2
	.global	add_uint16_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_uint16_t, %function
add_uint16_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	mov	r2, r1
	strh	r3, [fp, #-6]	@ movhi
	mov	r3, r2	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	ldrh	r2, [fp, #-6]	@ movhi
	ldrh	r3, [fp, #-8]	@ movhi
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	add_uint16_t, .-add_uint16_t
	.align	2
	.global	sub_uint16_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	sub_uint16_t, %function
sub_uint16_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	mov	r2, r1
	strh	r3, [fp, #-6]	@ movhi
	mov	r3, r2	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	ldrh	r2, [fp, #-6]	@ movhi
	ldrh	r3, [fp, #-8]	@ movhi
	sub	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	sub_uint16_t, .-sub_uint16_t
	.align	2
	.global	mul_uint16_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	mul_uint16_t, %function
mul_uint16_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	mov	r2, r1
	strh	r3, [fp, #-6]	@ movhi
	mov	r3, r2	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	ldrh	r1, [fp, #-6]	@ movhi
	ldrh	r2, [fp, #-8]	@ movhi
	mul	r3, r2, r1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	mul_uint16_t, .-mul_uint16_t
	.align	2
	.global	div_uint16_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	div_uint16_t, %function
div_uint16_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	mov	r2, r1
	strh	r3, [fp, #-6]	@ movhi
	mov	r3, r2	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	ldrh	r3, [fp, #-6]
	ldrh	r2, [fp, #-8]
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_uidiv
	mov	r3, r0
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	div_uint16_t, .-div_uint16_t
	.align	2
	.global	ret_uint16_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	ret_uint16_t, %function
ret_uint16_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	strh	r3, [fp, #-6]	@ movhi
	ldrh	r3, [fp, #-6]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	ret_uint16_t, .-ret_uint16_t
	.align	2
	.global	add_uint32_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_uint32_t, %function
add_uint32_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	add	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	add_uint32_t, .-add_uint32_t
	.align	2
	.global	sub_uint32_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	sub_uint32_t, %function
sub_uint32_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	sub	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	sub_uint32_t, .-sub_uint32_t
	.align	2
	.global	mul_uint32_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	mul_uint32_t, %function
mul_uint32_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-8]
	ldr	r2, [fp, #-12]
	mul	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	mul_uint32_t, .-mul_uint32_t
	.align	2
	.global	div_uint32_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	div_uint32_t, %function
div_uint32_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r1, [fp, #-12]
	ldr	r0, [fp, #-8]
	bl	__aeabi_uidiv
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	div_uint32_t, .-div_uint32_t
	.align	2
	.global	ret_uint32_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	ret_uint32_t, %function
ret_uint32_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	ret_uint32_t, .-ret_uint32_t
	.align	2
	.global	add_uint64_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_uint64_t, %function
add_uint64_t:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, fp}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-20]
	str	r1, [fp, #-16]
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	adds	r4, r0, r2
	adc	r5, r1, r3
	mov	r2, r4
	mov	r3, r5
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, r5, fp}
	bx	lr
	.size	add_uint64_t, .-add_uint64_t
	.align	2
	.global	sub_uint64_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	sub_uint64_t, %function
sub_uint64_t:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, fp}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-20]
	str	r1, [fp, #-16]
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	subs	r4, r0, r2
	sbc	r5, r1, r3
	mov	r2, r4
	mov	r3, r5
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, r5, fp}
	bx	lr
	.size	sub_uint64_t, .-sub_uint64_t
	.align	2
	.global	mul_uint64_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	mul_uint64_t, %function
mul_uint64_t:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-8]
	ldr	r2, [fp, #-20]
	mul	r2, r3, r2
	ldr	r3, [fp, #-16]
	ldr	r1, [fp, #-12]
	mul	r3, r1, r3
	add	r1, r2, r3
	ldr	ip, [fp, #-12]
	ldr	r0, [fp, #-20]
	umull	r2, r3, ip, r0
	add	r1, r1, r3
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	mul_uint64_t, .-mul_uint64_t
	.global	__aeabi_uldivmod
	.align	2
	.global	div_uint64_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	div_uint64_t, %function
div_uint64_t:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_uldivmod
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	div_uint64_t, .-div_uint64_t
	.align	2
	.global	ret_uint64_t
	.syntax unified
	.arm
	.fpu softvfp
	.type	ret_uint64_t, %function
ret_uint64_t:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	ret_uint64_t, .-ret_uint64_t
	.global	__aeabi_fadd
	.align	2
	.global	add_float
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_float, %function
add_float:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]	@ float
	str	r1, [fp, #-12]	@ float
	ldr	r1, [fp, #-12]	@ float
	ldr	r0, [fp, #-8]	@ float
	bl	__aeabi_fadd
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	add_float, .-add_float
	.global	__aeabi_fsub
	.align	2
	.global	sub_float
	.syntax unified
	.arm
	.fpu softvfp
	.type	sub_float, %function
sub_float:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]	@ float
	str	r1, [fp, #-12]	@ float
	ldr	r1, [fp, #-12]	@ float
	ldr	r0, [fp, #-8]	@ float
	bl	__aeabi_fsub
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sub_float, .-sub_float
	.global	__aeabi_fmul
	.align	2
	.global	mul_float
	.syntax unified
	.arm
	.fpu softvfp
	.type	mul_float, %function
mul_float:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]	@ float
	str	r1, [fp, #-12]	@ float
	ldr	r1, [fp, #-12]	@ float
	ldr	r0, [fp, #-8]	@ float
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	mul_float, .-mul_float
	.global	__aeabi_fdiv
	.align	2
	.global	div_float
	.syntax unified
	.arm
	.fpu softvfp
	.type	div_float, %function
div_float:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]	@ float
	str	r1, [fp, #-12]	@ float
	ldr	r1, [fp, #-12]	@ float
	ldr	r0, [fp, #-8]	@ float
	bl	__aeabi_fdiv
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	div_float, .-div_float
	.align	2
	.global	ret_float
	.syntax unified
	.arm
	.fpu softvfp
	.type	ret_float, %function
ret_float:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]	@ float
	ldr	r3, [fp, #-8]	@ float
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	ret_float, .-ret_float
	.global	__aeabi_dadd
	.align	2
	.global	add_double
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_double, %function
add_double:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	add_double, .-add_double
	.global	__aeabi_dsub
	.align	2
	.global	sub_double
	.syntax unified
	.arm
	.fpu softvfp
	.type	sub_double, %function
sub_double:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sub_double, .-sub_double
	.global	__aeabi_dmul
	.align	2
	.global	mul_double
	.syntax unified
	.arm
	.fpu softvfp
	.type	mul_double, %function
mul_double:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	mul_double, .-mul_double
	.global	__aeabi_ddiv
	.align	2
	.global	div_double
	.syntax unified
	.arm
	.fpu softvfp
	.type	div_double, %function
div_double:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	div_double, .-div_double
	.align	2
	.global	ret_double
	.syntax unified
	.arm
	.fpu softvfp
	.type	ret_double, %function
ret_double:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	ret_double, .-ret_double
	.align	2
	.global	add_long
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_long, %function
add_long:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	add	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	add_long, .-add_long
	.align	2
	.global	sub_long
	.syntax unified
	.arm
	.fpu softvfp
	.type	sub_long, %function
sub_long:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	sub	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	sub_long, .-sub_long
	.align	2
	.global	mul_long
	.syntax unified
	.arm
	.fpu softvfp
	.type	mul_long, %function
mul_long:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-8]
	ldr	r2, [fp, #-12]
	mul	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	mul_long, .-mul_long
	.align	2
	.global	div_long
	.syntax unified
	.arm
	.fpu softvfp
	.type	div_long, %function
div_long:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r1, [fp, #-12]
	ldr	r0, [fp, #-8]
	bl	__aeabi_idiv
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	div_long, .-div_long
	.align	2
	.global	ret_long
	.syntax unified
	.arm
	.fpu softvfp
	.type	ret_long, %function
ret_long:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	ret_long, .-ret_long
	.align	2
	.global	add_ulong
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_ulong, %function
add_ulong:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	add	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	add_ulong, .-add_ulong
	.align	2
	.global	sub_ulong
	.syntax unified
	.arm
	.fpu softvfp
	.type	sub_ulong, %function
sub_ulong:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	sub	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	sub_ulong, .-sub_ulong
	.align	2
	.global	mul_ulong
	.syntax unified
	.arm
	.fpu softvfp
	.type	mul_ulong, %function
mul_ulong:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-8]
	ldr	r2, [fp, #-12]
	mul	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	mul_ulong, .-mul_ulong
	.align	2
	.global	div_ulong
	.syntax unified
	.arm
	.fpu softvfp
	.type	div_ulong, %function
div_ulong:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r1, [fp, #-12]
	ldr	r0, [fp, #-8]
	bl	__aeabi_uidiv
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	div_ulong, .-div_ulong
	.align	2
	.global	ret_ulong
	.syntax unified
	.arm
	.fpu softvfp
	.type	ret_ulong, %function
ret_ulong:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	ret_ulong, .-ret_ulong
	.align	2
	.global	add_Signed8
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_Signed8, %function
add_Signed8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	mov	r2, r1
	strb	r3, [fp, #-5]
	mov	r3, r2
	strb	r3, [fp, #-6]
	ldrb	r2, [fp, #-5]
	ldrb	r3, [fp, #-6]
	add	r3, r2, r3
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	add_Signed8, .-add_Signed8
	.align	2
	.global	sub_Signed8
	.syntax unified
	.arm
	.fpu softvfp
	.type	sub_Signed8, %function
sub_Signed8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	mov	r2, r1
	strb	r3, [fp, #-5]
	mov	r3, r2
	strb	r3, [fp, #-6]
	ldrb	r2, [fp, #-5]
	ldrb	r3, [fp, #-6]
	sub	r3, r2, r3
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	sub_Signed8, .-sub_Signed8
	.align	2
	.global	mul_Signed8
	.syntax unified
	.arm
	.fpu softvfp
	.type	mul_Signed8, %function
mul_Signed8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	mov	r2, r1
	strb	r3, [fp, #-5]
	mov	r3, r2
	strb	r3, [fp, #-6]
	ldrb	r1, [fp, #-5]
	ldrb	r2, [fp, #-6]
	mul	r3, r2, r1
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	mul_Signed8, .-mul_Signed8
	.align	2
	.global	div_Signed8
	.syntax unified
	.arm
	.fpu softvfp
	.type	div_Signed8, %function
div_Signed8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	mov	r2, r1
	strb	r3, [fp, #-5]
	mov	r3, r2
	strb	r3, [fp, #-6]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	ldrb	r2, [fp, #-6]	@ zero_extendqisi2
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_uidiv
	mov	r3, r0
	and	r3, r3, #255
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	div_Signed8, .-div_Signed8
	.align	2
	.global	ret_Signed8
	.syntax unified
	.arm
	.fpu softvfp
	.type	ret_Signed8, %function
ret_Signed8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	ret_Signed8, .-ret_Signed8
	.align	2
	.global	add_Signed16
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_Signed16, %function
add_Signed16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	mov	r2, r1
	strh	r3, [fp, #-6]	@ movhi
	mov	r3, r2	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	ldrh	r2, [fp, #-6]
	ldrh	r3, [fp, #-8]
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	add_Signed16, .-add_Signed16
	.align	2
	.global	sub_Signed16
	.syntax unified
	.arm
	.fpu softvfp
	.type	sub_Signed16, %function
sub_Signed16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	mov	r2, r1
	strh	r3, [fp, #-6]	@ movhi
	mov	r3, r2	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	ldrh	r2, [fp, #-6]
	ldrh	r3, [fp, #-8]
	sub	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	sub_Signed16, .-sub_Signed16
	.align	2
	.global	mul_Signed16
	.syntax unified
	.arm
	.fpu softvfp
	.type	mul_Signed16, %function
mul_Signed16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	mov	r2, r1
	strh	r3, [fp, #-6]	@ movhi
	mov	r3, r2	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	ldrh	r3, [fp, #-6]
	ldrh	r2, [fp, #-8]
	mul	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	mul_Signed16, .-mul_Signed16
	.align	2
	.global	div_Signed16
	.syntax unified
	.arm
	.fpu softvfp
	.type	div_Signed16, %function
div_Signed16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	mov	r2, r1
	strh	r3, [fp, #-6]	@ movhi
	mov	r3, r2	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	ldrsh	r3, [fp, #-6]
	ldrsh	r2, [fp, #-8]
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_idiv
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	div_Signed16, .-div_Signed16
	.align	2
	.global	ret_Signed16
	.syntax unified
	.arm
	.fpu softvfp
	.type	ret_Signed16, %function
ret_Signed16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	strh	r3, [fp, #-6]	@ movhi
	ldrsh	r3, [fp, #-6]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	ret_Signed16, .-ret_Signed16
	.align	2
	.global	add_Signed32
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_Signed32, %function
add_Signed32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	add	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	add_Signed32, .-add_Signed32
	.align	2
	.global	sub_Signed32
	.syntax unified
	.arm
	.fpu softvfp
	.type	sub_Signed32, %function
sub_Signed32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	sub	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	sub_Signed32, .-sub_Signed32
	.align	2
	.global	mul_Signed32
	.syntax unified
	.arm
	.fpu softvfp
	.type	mul_Signed32, %function
mul_Signed32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-8]
	ldr	r2, [fp, #-12]
	mul	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	mul_Signed32, .-mul_Signed32
	.align	2
	.global	div_Signed32
	.syntax unified
	.arm
	.fpu softvfp
	.type	div_Signed32, %function
div_Signed32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r1, [fp, #-12]
	ldr	r0, [fp, #-8]
	bl	__aeabi_idiv
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	div_Signed32, .-div_Signed32
	.align	2
	.global	ret_Signed32
	.syntax unified
	.arm
	.fpu softvfp
	.type	ret_Signed32, %function
ret_Signed32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	ret_Signed32, .-ret_Signed32
	.align	2
	.global	add_Signed64
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_Signed64, %function
add_Signed64:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, fp}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-20]
	str	r1, [fp, #-16]
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	adds	r4, r0, r2
	adc	r5, r1, r3
	mov	r2, r4
	mov	r3, r5
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, r5, fp}
	bx	lr
	.size	add_Signed64, .-add_Signed64
	.align	2
	.global	sub_Signed64
	.syntax unified
	.arm
	.fpu softvfp
	.type	sub_Signed64, %function
sub_Signed64:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, fp}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-20]
	str	r1, [fp, #-16]
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	subs	r4, r0, r2
	sbc	r5, r1, r3
	mov	r2, r4
	mov	r3, r5
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, r5, fp}
	bx	lr
	.size	sub_Signed64, .-sub_Signed64
	.align	2
	.global	mul_Signed64
	.syntax unified
	.arm
	.fpu softvfp
	.type	mul_Signed64, %function
mul_Signed64:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-8]
	ldr	r2, [fp, #-20]
	mul	r2, r3, r2
	ldr	r3, [fp, #-16]
	ldr	r1, [fp, #-12]
	mul	r3, r1, r3
	add	r1, r2, r3
	ldr	ip, [fp, #-12]
	ldr	r0, [fp, #-20]
	umull	r2, r3, ip, r0
	add	r1, r1, r3
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	mul_Signed64, .-mul_Signed64
	.align	2
	.global	div_Signed64
	.syntax unified
	.arm
	.fpu softvfp
	.type	div_Signed64, %function
div_Signed64:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_ldivmod
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	div_Signed64, .-div_Signed64
	.align	2
	.global	ret_Signed64
	.syntax unified
	.arm
	.fpu softvfp
	.type	ret_Signed64, %function
ret_Signed64:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	ret_Signed64, .-ret_Signed64
	.align	2
	.global	add_SignedLong
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_SignedLong, %function
add_SignedLong:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	add	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	add_SignedLong, .-add_SignedLong
	.align	2
	.global	sub_SignedLong
	.syntax unified
	.arm
	.fpu softvfp
	.type	sub_SignedLong, %function
sub_SignedLong:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	sub	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	sub_SignedLong, .-sub_SignedLong
	.align	2
	.global	mul_SignedLong
	.syntax unified
	.arm
	.fpu softvfp
	.type	mul_SignedLong, %function
mul_SignedLong:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-8]
	ldr	r2, [fp, #-12]
	mul	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	mul_SignedLong, .-mul_SignedLong
	.align	2
	.global	div_SignedLong
	.syntax unified
	.arm
	.fpu softvfp
	.type	div_SignedLong, %function
div_SignedLong:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r1, [fp, #-12]
	ldr	r0, [fp, #-8]
	bl	__aeabi_idiv
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	div_SignedLong, .-div_SignedLong
	.align	2
	.global	ret_SignedLong
	.syntax unified
	.arm
	.fpu softvfp
	.type	ret_SignedLong, %function
ret_SignedLong:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	ret_SignedLong, .-ret_SignedLong
	.align	2
	.global	add_Float32
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_Float32, %function
add_Float32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]	@ float
	str	r1, [fp, #-12]	@ float
	ldr	r1, [fp, #-12]	@ float
	ldr	r0, [fp, #-8]	@ float
	bl	__aeabi_fadd
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	add_Float32, .-add_Float32
	.align	2
	.global	sub_Float32
	.syntax unified
	.arm
	.fpu softvfp
	.type	sub_Float32, %function
sub_Float32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]	@ float
	str	r1, [fp, #-12]	@ float
	ldr	r1, [fp, #-12]	@ float
	ldr	r0, [fp, #-8]	@ float
	bl	__aeabi_fsub
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sub_Float32, .-sub_Float32
	.align	2
	.global	mul_Float32
	.syntax unified
	.arm
	.fpu softvfp
	.type	mul_Float32, %function
mul_Float32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]	@ float
	str	r1, [fp, #-12]	@ float
	ldr	r1, [fp, #-12]	@ float
	ldr	r0, [fp, #-8]	@ float
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	mul_Float32, .-mul_Float32
	.align	2
	.global	div_Float32
	.syntax unified
	.arm
	.fpu softvfp
	.type	div_Float32, %function
div_Float32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]	@ float
	str	r1, [fp, #-12]	@ float
	ldr	r1, [fp, #-12]	@ float
	ldr	r0, [fp, #-8]	@ float
	bl	__aeabi_fdiv
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	div_Float32, .-div_Float32
	.align	2
	.global	ret_Float32
	.syntax unified
	.arm
	.fpu softvfp
	.type	ret_Float32, %function
ret_Float32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]	@ float
	ldr	r3, [fp, #-8]	@ float
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	ret_Float32, .-ret_Float32
	.align	2
	.global	add_Float64
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_Float64, %function
add_Float64:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	add_Float64, .-add_Float64
	.align	2
	.global	sub_Float64
	.syntax unified
	.arm
	.fpu softvfp
	.type	sub_Float64, %function
sub_Float64:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sub_Float64, .-sub_Float64
	.align	2
	.global	mul_Float64
	.syntax unified
	.arm
	.fpu softvfp
	.type	mul_Float64, %function
mul_Float64:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	mul_Float64, .-mul_Float64
	.align	2
	.global	div_Float64
	.syntax unified
	.arm
	.fpu softvfp
	.type	div_Float64, %function
div_Float64:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	div_Float64, .-div_Float64
	.align	2
	.global	ret_Float64
	.syntax unified
	.arm
	.fpu softvfp
	.type	ret_Float64, %function
ret_Float64:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	ret_Float64, .-ret_Float64
	.align	2
	.global	ret_pointer
	.syntax unified
	.arm
	.fpu softvfp
	.type	ret_pointer, %function
ret_pointer:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	ret_pointer, .-ret_pointer
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
