	.file	"72013080.c"
	.intel_syntax noprefix
	.text
	.globl	vnum_test1
	.type	vnum_test1, @function
vnum_test1:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR [rax], 0
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	vnum_test1, .-vnum_test1
	.globl	vnum_result1
	.type	vnum_result1, @function
vnum_result1:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR [rax], 0
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	vnum_result1, .-vnum_result1
	.globl	vnum_test2
	.type	vnum_test2, @function
vnum_test2:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR [rax], 0
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	vnum_test2, .-vnum_test2
	.globl	vnum_result2
	.type	vnum_result2, @function
vnum_result2:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR [rax], 0
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	vnum_result2, .-vnum_result2
	.globl	vnum_test3
	.type	vnum_test3, @function
vnum_test3:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	rax, QWORD PTR -40[rbp]
	add	rax, 4
	mov	edx, DWORD PTR [rax]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, 12
	mov	eax, DWORD PTR [rax]
	imul	eax, edx
	mov	DWORD PTR -20[rbp], eax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 12[rax]
	mov	DWORD PTR -16[rbp], eax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 4[rax]
	mov	DWORD PTR -12[rbp], eax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 8[rax]
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -8[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rdx
	mov	DWORD PTR [rax], 2
	mov	eax, DWORD PTR -12[rbp]
	imul	eax, DWORD PTR -16[rbp]
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	sub	eax, DWORD PTR -20[rbp]
	mov	edx, eax
	mov	rax, QWORD PTR -40[rbp]
	mov	DWORD PTR [rax], edx
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	vnum_test3, .-vnum_test3
	.globl	vnum_result3
	.type	vnum_result3, @function
vnum_result3:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 8[rax]
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	DWORD PTR [rax], 2
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], 0
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	vnum_result3, .-vnum_result3
	.globl	vnum_test4
	.type	vnum_test4, @function
vnum_test4:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	rax, QWORD PTR -40[rbp]
	add	rax, 4
	mov	edx, DWORD PTR [rax]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, 12
	mov	eax, DWORD PTR [rax]
	imul	eax, edx
	mov	DWORD PTR -20[rbp], eax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 12[rax]
	mov	DWORD PTR -16[rbp], eax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 4[rax]
	mov	DWORD PTR -12[rbp], eax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 8[rax]
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -8[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rdx
	mov	DWORD PTR [rax], 2
	mov	eax, DWORD PTR -16[rbp]
	imul	eax, DWORD PTR -12[rbp]
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	sub	eax, DWORD PTR -20[rbp]
	mov	edx, eax
	mov	rax, QWORD PTR -40[rbp]
	mov	DWORD PTR [rax], edx
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	vnum_test4, .-vnum_test4
	.globl	vnum_result4
	.type	vnum_result4, @function
vnum_result4:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 8[rax]
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	DWORD PTR [rax], 2
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], 0
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	vnum_result4, .-vnum_result4
	.globl	vnum_test5
	.type	vnum_test5, @function
vnum_test5:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	rax, QWORD PTR -40[rbp]
	add	rax, 4
	mov	edx, DWORD PTR [rax]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, 12
	mov	eax, DWORD PTR [rax]
	imul	eax, edx
	mov	DWORD PTR -20[rbp], eax
	mov	rax, QWORD PTR -40[rbp]
	add	rax, 12
	mov	eax, DWORD PTR [rax]
	cmp	eax, 3
	jne	.L10
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 12[rax]
	mov	DWORD PTR -16[rbp], eax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 4[rax]
	mov	DWORD PTR -12[rbp], eax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 8[rax]
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -8[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rdx
	mov	DWORD PTR [rax], 2
	mov	eax, DWORD PTR -12[rbp]
	imul	eax, DWORD PTR -16[rbp]
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	sub	eax, DWORD PTR -20[rbp]
	mov	edx, eax
	mov	rax, QWORD PTR -40[rbp]
	mov	DWORD PTR [rax], edx
	jmp	.L12
.L10:
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR [rax]
	and	eax, 1
	test	eax, eax
	je	.L12
	mov	rax, QWORD PTR -40[rbp]
	add	rax, 8
	mov	eax, DWORD PTR [rax]
	add	eax, 3
	sub	eax, DWORD PTR -20[rbp]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rdx
	mov	DWORD PTR [rax], 2
.L12:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	vnum_test5, .-vnum_test5
	.globl	vnum_result5
	.type	vnum_result5, @function
vnum_result5:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 4
	mov	edx, DWORD PTR [rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 12
	mov	eax, DWORD PTR [rax]
	imul	eax, edx
	mov	DWORD PTR -8[rbp], eax
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 12
	mov	eax, DWORD PTR [rax]
	cmp	eax, 3
	jne	.L14
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 8[rax]
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	DWORD PTR [rax], 2
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], 0
	jmp	.L16
.L14:
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	and	eax, 1
	test	eax, eax
	je	.L16
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 8
	mov	eax, DWORD PTR [rax]
	add	eax, 3
	sub	eax, DWORD PTR -8[rbp]
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -8[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	DWORD PTR [rax], 2
.L16:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	vnum_result5, .-vnum_result5
	.globl	vnum_test6
	.type	vnum_test6, @function
vnum_test6:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 4
	mov	edx, DWORD PTR [rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 12
	mov	eax, DWORD PTR [rax]
	imul	eax, edx
	mov	DWORD PTR -16[rbp], eax
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 4[rax]
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	mov	DWORD PTR -8[rbp], eax
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	je	.L18
	add	DWORD PTR -16[rbp], 3
	jmp	.L19
.L18:
	sub	DWORD PTR -16[rbp], 3
.L19:
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 12[rax]
	mov	DWORD PTR -4[rbp], eax
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 8
	mov	eax, DWORD PTR [rax]
	add	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	DWORD PTR [rax], 2
	mov	eax, DWORD PTR -12[rbp]
	imul	eax, DWORD PTR -4[rbp]
	mov	ecx, eax
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 16
	mov	edx, DWORD PTR -8[rbp]
	sub	edx, ecx
	mov	DWORD PTR [rax], edx
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	vnum_test6, .-vnum_test6
	.globl	vnum_result6
	.type	vnum_result6, @function
vnum_result6:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 4
	mov	edx, DWORD PTR [rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 12
	mov	eax, DWORD PTR [rax]
	imul	eax, edx
	mov	DWORD PTR -4[rbp], eax
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	je	.L21
	add	DWORD PTR -4[rbp], 3
	jmp	.L22
.L21:
	sub	DWORD PTR -4[rbp], 3
.L22:
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 8
	mov	eax, DWORD PTR [rax]
	add	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	DWORD PTR [rax], 2
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 16
	mov	DWORD PTR [rax], 0
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	vnum_result6, .-vnum_result6
	.globl	vnum_test7
	.type	vnum_test7, @function
vnum_test7:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 4[rax]
	mov	DWORD PTR -12[rbp], eax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 12[rax]
	mov	DWORD PTR -8[rbp], eax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	je	.L24
	mov	eax, DWORD PTR -12[rbp]
	imul	eax, DWORD PTR -8[rbp]
	mov	DWORD PTR -20[rbp], eax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 8[rax]
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rdx
	mov	DWORD PTR [rax], 2
	mov	eax, DWORD PTR -12[rbp]
	imul	eax, DWORD PTR -8[rbp]
	mov	DWORD PTR -16[rbp], eax
	jmp	.L25
.L24:
	mov	DWORD PTR -20[rbp], 5
	mov	DWORD PTR -16[rbp], 5
.L25:
	mov	eax, DWORD PTR -16[rbp]
	sub	eax, DWORD PTR -20[rbp]
	mov	edx, eax
	mov	rax, QWORD PTR -40[rbp]
	mov	DWORD PTR [rax], edx
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	vnum_test7, .-vnum_test7
	.globl	vnum_result7
	.type	vnum_result7, @function
vnum_result7:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	je	.L27
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 8[rax]
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	DWORD PTR [rax], 2
.L27:
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], 0
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	vnum_result7, .-vnum_result7
	.globl	vnum_test8
	.type	vnum_test8, @function
vnum_test8:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 12[rax]
	mov	DWORD PTR -8[rbp], eax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 16[rax]
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	mov	DWORD PTR -12[rbp], eax
	mov	DWORD PTR -20[rbp], 0
	jmp	.L29
.L30:
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 8[rax]
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rdx
	mov	DWORD PTR [rax], 2
	mov	eax, DWORD PTR -16[rbp]
	sub	eax, DWORD PTR -12[rbp]
	mov	edx, eax
	mov	rax, QWORD PTR -40[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 4[rax]
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	add	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	add	DWORD PTR -12[rbp], eax
	add	DWORD PTR -20[rbp], 1
.L29:
	mov	eax, DWORD PTR -20[rbp]
	cmp	eax, DWORD PTR -8[rbp]
	jl	.L30
	nop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	vnum_test8, .-vnum_test8
	.globl	vnum_result8
	.type	vnum_result8, @function
vnum_result8:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 12[rax]
	mov	DWORD PTR -8[rbp], eax
	mov	DWORD PTR -12[rbp], 0
	jmp	.L32
.L33:
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 8[rax]
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	DWORD PTR [rax], 2
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], 0
	add	DWORD PTR -12[rbp], 1
.L32:
	mov	eax, DWORD PTR -12[rbp]
	cmp	eax, DWORD PTR -8[rbp]
	jl	.L33
	nop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	vnum_result8, .-vnum_result8
	.globl	vnum_test9
	.type	vnum_test9, @function
vnum_test9:
.LFB16:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -8[rbp], eax
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 4[rax]
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -8[rbp]
	cmp	eax, DWORD PTR -4[rbp]
	jne	.L35
	mov	eax, DWORD PTR -8[rbp]
	sub	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	lea	rcx, 8[rax]
	mov	eax, edx
	sal	eax, 2
	add	eax, edx
	sal	eax, 2
	add	eax, edx
	mov	DWORD PTR [rcx], eax
	jmp	.L37
.L35:
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 8
	mov	ecx, DWORD PTR -8[rbp]
	mov	edx, DWORD PTR -4[rbp]
	add	edx, ecx
	mov	DWORD PTR [rax], edx
.L37:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE16:
	.size	vnum_test9, .-vnum_test9
	.globl	vnum_result9
	.type	vnum_result9, @function
vnum_result9:
.LFB17:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -8[rbp], eax
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 4[rax]
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -8[rbp]
	cmp	eax, DWORD PTR -4[rbp]
	jne	.L39
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 8
	mov	DWORD PTR [rax], 0
	jmp	.L41
.L39:
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 8
	mov	ecx, DWORD PTR -8[rbp]
	mov	edx, DWORD PTR -4[rbp]
	add	edx, ecx
	mov	DWORD PTR [rax], edx
.L41:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE17:
	.size	vnum_result9, .-vnum_result9
	.globl	vnum_test10
	.type	vnum_test10, @function
vnum_test10:
.LFB18:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	add	eax, 1
	mov	DWORD PTR -12[rbp], eax
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 4[rax]
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -8[rbp]
	add	eax, 1
	mov	DWORD PTR -4[rbp], eax
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 8
	mov	ecx, DWORD PTR -12[rbp]
	mov	edx, DWORD PTR -4[rbp]
	add	edx, ecx
	mov	DWORD PTR [rax], edx
	mov	eax, DWORD PTR -16[rbp]
	cmp	eax, DWORD PTR -8[rbp]
	jne	.L44
	mov	eax, DWORD PTR -12[rbp]
	sub	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	lea	rcx, 12[rax]
	mov	eax, edx
	sal	eax, 2
	add	eax, edx
	sal	eax, 2
	add	eax, edx
	mov	DWORD PTR [rcx], eax
.L44:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE18:
	.size	vnum_test10, .-vnum_test10
	.globl	vnum_result10
	.type	vnum_result10, @function
vnum_result10:
.LFB19:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	add	eax, 1
	mov	DWORD PTR -12[rbp], eax
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 4[rax]
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -8[rbp]
	add	eax, 1
	mov	DWORD PTR -4[rbp], eax
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 8
	mov	ecx, DWORD PTR -12[rbp]
	mov	edx, DWORD PTR -4[rbp]
	add	edx, ecx
	mov	DWORD PTR [rax], edx
	mov	eax, DWORD PTR -16[rbp]
	cmp	eax, DWORD PTR -8[rbp]
	jne	.L47
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 12
	mov	DWORD PTR [rax], 0
.L47:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE19:
	.size	vnum_result10, .-vnum_result10
	.globl	vnum_test11
	.type	vnum_test11, @function
vnum_test11:
.LFB20:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 12[rax]
	mov	DWORD PTR -8[rbp], eax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 4[rax]
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	mov	DWORD PTR -16[rbp], eax
	mov	DWORD PTR -12[rbp], 1
	mov	DWORD PTR -20[rbp], 0
	jmp	.L49
.L52:
	mov	eax, DWORD PTR -4[rbp]
	cmp	eax, DWORD PTR -16[rbp]
	je	.L50
	mov	DWORD PTR -12[rbp], 2
.L50:
	cmp	DWORD PTR -12[rbp], 1
	je	.L51
	mov	DWORD PTR -16[rbp], 2
.L51:
	mov	rax, QWORD PTR -40[rbp]
	add	rax, 8
	mov	eax, DWORD PTR [rax]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rdx
	mov	DWORD PTR [rax], 2
	add	DWORD PTR -20[rbp], 1
.L49:
	mov	eax, DWORD PTR -20[rbp]
	cmp	eax, DWORD PTR -8[rbp]
	jl	.L52
	mov	rax, QWORD PTR -40[rbp]
	lea	rdx, 4[rax]
	mov	eax, DWORD PTR -12[rbp]
	mov	DWORD PTR [rdx], eax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE20:
	.size	vnum_test11, .-vnum_test11
	.globl	vnum_result11
	.type	vnum_result11, @function
vnum_result11:
.LFB21:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 12[rax]
	mov	DWORD PTR -4[rbp], eax
	mov	DWORD PTR -8[rbp], 0
	jmp	.L54
.L55:
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 8
	mov	eax, DWORD PTR [rax]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	DWORD PTR [rax], 2
	add	DWORD PTR -8[rbp], 1
.L54:
	mov	eax, DWORD PTR -8[rbp]
	cmp	eax, DWORD PTR -4[rbp]
	jl	.L55
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 4
	mov	DWORD PTR [rax], 1
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE21:
	.size	vnum_result11, .-vnum_result11
	.globl	vnum_test12
	.type	vnum_test12, @function
vnum_test12:
.LFB22:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 12[rax]
	mov	DWORD PTR -8[rbp], eax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 4[rax]
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	mov	DWORD PTR -16[rbp], eax
	mov	DWORD PTR -12[rbp], 1
	mov	DWORD PTR -20[rbp], 0
	jmp	.L57
.L60:
	mov	eax, DWORD PTR -4[rbp]
	cmp	eax, DWORD PTR -16[rbp]
	je	.L58
	mov	DWORD PTR -12[rbp], 2
.L58:
	mov	eax, 2
	sub	eax, DWORD PTR -12[rbp]
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 1
	je	.L59
	mov	DWORD PTR -16[rbp], 2
.L59:
	mov	rax, QWORD PTR -40[rbp]
	add	rax, 8
	mov	eax, DWORD PTR [rax]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rdx
	mov	DWORD PTR [rax], 2
	add	DWORD PTR -20[rbp], 1
.L57:
	mov	eax, DWORD PTR -20[rbp]
	cmp	eax, DWORD PTR -8[rbp]
	jl	.L60
	mov	rax, QWORD PTR -40[rbp]
	lea	rdx, 4[rax]
	mov	eax, DWORD PTR -12[rbp]
	mov	DWORD PTR [rdx], eax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE22:
	.size	vnum_test12, .-vnum_test12
	.globl	vnum_result12
	.type	vnum_result12, @function
vnum_result12:
.LFB23:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 12[rax]
	mov	DWORD PTR -4[rbp], eax
	mov	DWORD PTR -8[rbp], 0
	jmp	.L62
.L63:
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 8
	mov	eax, DWORD PTR [rax]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	DWORD PTR [rax], 2
	add	DWORD PTR -8[rbp], 1
.L62:
	mov	eax, DWORD PTR -8[rbp]
	cmp	eax, DWORD PTR -4[rbp]
	jl	.L63
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 4
	mov	DWORD PTR [rax], 1
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE23:
	.size	vnum_result12, .-vnum_result12
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"72013080.c"
	.text
	.align	2
	.global	vnum_test1
	.syntax unified
	.arm
	.fpu softvfp
	.type	vnum_test1, %function
vnum_test1:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r2, #0
	str	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	vnum_test1, .-vnum_test1
	.align	2
	.global	vnum_result1
	.syntax unified
	.arm
	.fpu softvfp
	.type	vnum_result1, %function
vnum_result1:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r2, #0
	str	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	vnum_result1, .-vnum_result1
	.align	2
	.global	vnum_test2
	.syntax unified
	.arm
	.fpu softvfp
	.type	vnum_test2, %function
vnum_test2:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r2, #0
	str	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	vnum_test2, .-vnum_test2
	.align	2
	.global	vnum_result2
	.syntax unified
	.arm
	.fpu softvfp
	.type	vnum_result2, %function
vnum_result2:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r2, #0
	str	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	vnum_result2, .-vnum_result2
	.align	2
	.global	vnum_test3
	.syntax unified
	.arm
	.fpu softvfp
	.type	vnum_test3, %function
vnum_test3:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #36
	str	r0, [fp, #-32]
	ldr	r3, [fp, #-32]
	add	r3, r3, #4
	ldr	r3, [r3]
	ldr	r2, [fp, #-32]
	add	r2, r2, #12
	ldr	r2, [r2]
	mul	r3, r2, r3
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #12]
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #4]
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #8]
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	mov	r2, #2
	str	r2, [r3]
	ldr	r3, [fp, #-16]
	ldr	r2, [fp, #-20]
	mul	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-24]
	sub	r2, r2, r3
	ldr	r3, [fp, #-32]
	str	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	vnum_test3, .-vnum_test3
	.align	2
	.global	vnum_result3
	.syntax unified
	.arm
	.fpu softvfp
	.type	vnum_result3, %function
vnum_result3:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	ldr	r3, [r3, #8]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	mov	r2, #2
	str	r2, [r3]
	ldr	r3, [fp, #-16]
	mov	r2, #0
	str	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	vnum_result3, .-vnum_result3
	.align	2
	.global	vnum_test4
	.syntax unified
	.arm
	.fpu softvfp
	.type	vnum_test4, %function
vnum_test4:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #36
	str	r0, [fp, #-32]
	ldr	r3, [fp, #-32]
	add	r3, r3, #4
	ldr	r3, [r3]
	ldr	r2, [fp, #-32]
	add	r2, r2, #12
	ldr	r2, [r2]
	mul	r3, r2, r3
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #12]
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #4]
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #8]
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	mov	r2, #2
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	ldr	r2, [fp, #-16]
	mul	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-24]
	sub	r2, r2, r3
	ldr	r3, [fp, #-32]
	str	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	vnum_test4, .-vnum_test4
	.align	2
	.global	vnum_result4
	.syntax unified
	.arm
	.fpu softvfp
	.type	vnum_result4, %function
vnum_result4:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	ldr	r3, [r3, #8]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	mov	r2, #2
	str	r2, [r3]
	ldr	r3, [fp, #-16]
	mov	r2, #0
	str	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	vnum_result4, .-vnum_result4
	.align	2
	.global	vnum_test5
	.syntax unified
	.arm
	.fpu softvfp
	.type	vnum_test5, %function
vnum_test5:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #36
	str	r0, [fp, #-32]
	ldr	r3, [fp, #-32]
	add	r3, r3, #4
	ldr	r3, [r3]
	ldr	r2, [fp, #-32]
	add	r2, r2, #12
	ldr	r2, [r2]
	mul	r3, r2, r3
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-32]
	add	r3, r3, #12
	ldr	r3, [r3]
	cmp	r3, #3
	bne	.L10
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #12]
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #4]
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #8]
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	mov	r2, #2
	str	r2, [r3]
	ldr	r3, [fp, #-16]
	ldr	r2, [fp, #-20]
	mul	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-24]
	sub	r2, r2, r3
	ldr	r3, [fp, #-32]
	str	r2, [r3]
	b	.L12
.L10:
	ldr	r3, [fp, #-32]
	ldr	r3, [r3]
	and	r3, r3, #1
	cmp	r3, #0
	beq	.L12
	ldr	r3, [fp, #-32]
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, r3, #3
	ldr	r3, [fp, #-24]
	sub	r3, r2, r3
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-24]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	mov	r2, #2
	str	r2, [r3]
.L12:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	vnum_test5, .-vnum_test5
	.align	2
	.global	vnum_result5
	.syntax unified
	.arm
	.fpu softvfp
	.type	vnum_result5, %function
vnum_result5:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	add	r3, r3, #4
	ldr	r3, [r3]
	ldr	r2, [fp, #-16]
	add	r2, r2, #12
	ldr	r2, [r2]
	mul	r3, r2, r3
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-16]
	add	r3, r3, #12
	ldr	r3, [r3]
	cmp	r3, #3
	bne	.L14
	ldr	r3, [fp, #-16]
	ldr	r3, [r3, #8]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	mov	r2, #2
	str	r2, [r3]
	ldr	r3, [fp, #-16]
	mov	r2, #0
	str	r2, [r3]
	b	.L16
.L14:
	ldr	r3, [fp, #-16]
	ldr	r3, [r3]
	and	r3, r3, #1
	cmp	r3, #0
	beq	.L16
	ldr	r3, [fp, #-16]
	add	r3, r3, #8
	ldr	r3, [r3]
	add	r2, r3, #3
	ldr	r3, [fp, #-12]
	sub	r3, r2, r3
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	mov	r2, #2
	str	r2, [r3]
.L16:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	vnum_result5, .-vnum_result5
	.align	2
	.global	vnum_test6
	.syntax unified
	.arm
	.fpu softvfp
	.type	vnum_test6, %function
vnum_test6:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #28
	str	r0, [fp, #-24]
	ldr	r3, [fp, #-24]
	add	r3, r3, #4
	ldr	r3, [r3]
	ldr	r2, [fp, #-24]
	add	r2, r2, #12
	ldr	r2, [r2]
	mul	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	ldr	r3, [r3, #4]
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-20]
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-24]
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L18
	ldr	r3, [fp, #-20]
	add	r3, r3, #3
	str	r3, [fp, #-20]
	b	.L19
.L18:
	ldr	r3, [fp, #-20]
	sub	r3, r3, #3
	str	r3, [fp, #-20]
.L19:
	ldr	r3, [fp, #-24]
	ldr	r3, [r3, #12]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-24]
	add	r3, r3, #8
	ldr	r3, [r3]
	ldr	r2, [fp, #-20]
	add	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-24]
	add	r3, r2, r3
	mov	r2, #2
	str	r2, [r3]
	ldr	r3, [fp, #-16]
	ldr	r2, [fp, #-8]
	mul	r2, r3, r2
	ldr	r3, [fp, #-24]
	add	r3, r3, #16
	ldr	r1, [fp, #-12]
	sub	r2, r1, r2
	str	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	vnum_test6, .-vnum_test6
	.align	2
	.global	vnum_result6
	.syntax unified
	.arm
	.fpu softvfp
	.type	vnum_result6, %function
vnum_result6:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	add	r3, r3, #4
	ldr	r3, [r3]
	ldr	r2, [fp, #-16]
	add	r2, r2, #12
	ldr	r2, [r2]
	mul	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-16]
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L21
	ldr	r3, [fp, #-8]
	add	r3, r3, #3
	str	r3, [fp, #-8]
	b	.L22
.L21:
	ldr	r3, [fp, #-8]
	sub	r3, r3, #3
	str	r3, [fp, #-8]
.L22:
	ldr	r3, [fp, #-16]
	add	r3, r3, #8
	ldr	r3, [r3]
	ldr	r2, [fp, #-8]
	add	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	mov	r2, #2
	str	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r3, r3, #16
	mov	r2, #0
	str	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	vnum_result6, .-vnum_result6
	.align	2
	.global	vnum_test7
	.syntax unified
	.arm
	.fpu softvfp
	.type	vnum_test7, %function
vnum_test7:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #36
	str	r0, [fp, #-32]
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #4]
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #12]
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-32]
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L24
	ldr	r3, [fp, #-16]
	ldr	r2, [fp, #-12]
	mul	r3, r2, r3
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #8]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	mov	r2, #2
	str	r2, [r3]
	ldr	r3, [fp, #-16]
	ldr	r2, [fp, #-12]
	mul	r3, r2, r3
	str	r3, [fp, #-20]
	b	.L25
.L24:
	mov	r3, #5
	str	r3, [fp, #-24]
	mov	r3, #5
	str	r3, [fp, #-20]
.L25:
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-24]
	sub	r2, r2, r3
	ldr	r3, [fp, #-32]
	str	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	vnum_test7, .-vnum_test7
	.align	2
	.global	vnum_result7
	.syntax unified
	.arm
	.fpu softvfp
	.type	vnum_result7, %function
vnum_result7:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L27
	ldr	r3, [fp, #-16]
	ldr	r3, [r3, #8]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	mov	r2, #2
	str	r2, [r3]
.L27:
	ldr	r3, [fp, #-16]
	mov	r2, #0
	str	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	vnum_result7, .-vnum_result7
	.align	2
	.global	vnum_test8
	.syntax unified
	.arm
	.fpu softvfp
	.type	vnum_test8, %function
vnum_test8:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #36
	str	r0, [fp, #-32]
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #12]
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #16]
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-20]
	str	r3, [fp, #-16]
	mov	r3, #0
	str	r3, [fp, #-24]
	b	.L29
.L30:
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #8]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	mov	r2, #2
	str	r2, [r3]
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-16]
	sub	r2, r2, r3
	ldr	r3, [fp, #-32]
	str	r2, [r3]
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #4]
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-24]
	add	r3, r3, #1
	str	r3, [fp, #-24]
.L29:
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-12]
	cmp	r2, r3
	blt	.L30
	nop
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	vnum_test8, .-vnum_test8
	.align	2
	.global	vnum_result8
	.syntax unified
	.arm
	.fpu softvfp
	.type	vnum_result8, %function
vnum_result8:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #28
	str	r0, [fp, #-24]
	ldr	r3, [fp, #-24]
	ldr	r3, [r3, #12]
	str	r3, [fp, #-12]
	mov	r3, #0
	str	r3, [fp, #-16]
	b	.L32
.L33:
	ldr	r3, [fp, #-24]
	ldr	r3, [r3, #8]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-24]
	add	r3, r2, r3
	mov	r2, #2
	str	r2, [r3]
	ldr	r3, [fp, #-24]
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	str	r3, [fp, #-16]
.L32:
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-12]
	cmp	r2, r3
	blt	.L33
	nop
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	vnum_result8, .-vnum_result8
	.align	2
	.global	vnum_test9
	.syntax unified
	.arm
	.fpu softvfp
	.type	vnum_test9, %function
vnum_test9:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	ldr	r3, [r3]
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-16]
	ldr	r3, [r3, #4]
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-12]
	ldr	r3, [fp, #-8]
	cmp	r2, r3
	bne	.L35
	ldr	r2, [fp, #-12]
	ldr	r3, [fp, #-8]
	sub	r2, r2, r3
	ldr	r3, [fp, #-16]
	add	r1, r3, #8
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r2, r3, #3
	sub	r3, r2, r3
	str	r3, [r1]
	b	.L37
.L35:
	ldr	r3, [fp, #-16]
	add	r3, r3, #8
	ldr	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	add	r2, r1, r2
	str	r2, [r3]
.L37:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	vnum_test9, .-vnum_test9
	.align	2
	.global	vnum_result9
	.syntax unified
	.arm
	.fpu softvfp
	.type	vnum_result9, %function
vnum_result9:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	ldr	r3, [r3]
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-16]
	ldr	r3, [r3, #4]
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-12]
	ldr	r3, [fp, #-8]
	cmp	r2, r3
	bne	.L39
	ldr	r3, [fp, #-16]
	add	r3, r3, #8
	mov	r2, #0
	str	r2, [r3]
	b	.L41
.L39:
	ldr	r3, [fp, #-16]
	add	r3, r3, #8
	ldr	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	add	r2, r1, r2
	str	r2, [r3]
.L41:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	vnum_result9, .-vnum_result9
	.align	2
	.global	vnum_test10
	.syntax unified
	.arm
	.fpu softvfp
	.type	vnum_test10, %function
vnum_test10:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #28
	str	r0, [fp, #-24]
	ldr	r3, [fp, #-24]
	ldr	r3, [r3]
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-20]
	add	r3, r3, #1
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-24]
	ldr	r3, [r3, #4]
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-24]
	add	r3, r3, #8
	ldr	r1, [fp, #-16]
	ldr	r2, [fp, #-8]
	add	r2, r1, r2
	str	r2, [r3]
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-12]
	cmp	r2, r3
	bne	.L44
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-8]
	sub	r2, r2, r3
	ldr	r3, [fp, #-24]
	add	r1, r3, #12
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r2, r3, #3
	sub	r3, r2, r3
	str	r3, [r1]
.L44:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	vnum_test10, .-vnum_test10
	.align	2
	.global	vnum_result10
	.syntax unified
	.arm
	.fpu softvfp
	.type	vnum_result10, %function
vnum_result10:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #28
	str	r0, [fp, #-24]
	ldr	r3, [fp, #-24]
	ldr	r3, [r3]
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-20]
	add	r3, r3, #1
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-24]
	ldr	r3, [r3, #4]
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-24]
	add	r3, r3, #8
	ldr	r1, [fp, #-16]
	ldr	r2, [fp, #-8]
	add	r2, r1, r2
	str	r2, [r3]
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-12]
	cmp	r2, r3
	bne	.L47
	ldr	r3, [fp, #-24]
	add	r3, r3, #12
	mov	r2, #0
	str	r2, [r3]
.L47:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	vnum_result10, .-vnum_result10
	.align	2
	.global	vnum_test11
	.syntax unified
	.arm
	.fpu softvfp
	.type	vnum_test11, %function
vnum_test11:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #36
	str	r0, [fp, #-32]
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #12]
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #4]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	str	r3, [fp, #-20]
	mov	r3, #1
	str	r3, [fp, #-16]
	mov	r3, #0
	str	r3, [fp, #-24]
	b	.L49
.L52:
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-20]
	cmp	r2, r3
	beq	.L50
	mov	r3, #2
	str	r3, [fp, #-16]
.L50:
	ldr	r3, [fp, #-16]
	cmp	r3, #1
	beq	.L51
	mov	r3, #2
	str	r3, [fp, #-20]
.L51:
	ldr	r3, [fp, #-32]
	add	r3, r3, #8
	ldr	r3, [r3]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	mov	r2, #2
	str	r2, [r3]
	ldr	r3, [fp, #-24]
	add	r3, r3, #1
	str	r3, [fp, #-24]
.L49:
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-12]
	cmp	r2, r3
	blt	.L52
	ldr	r3, [fp, #-32]
	add	r3, r3, #4
	ldr	r2, [fp, #-16]
	str	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	vnum_test11, .-vnum_test11
	.align	2
	.global	vnum_result11
	.syntax unified
	.arm
	.fpu softvfp
	.type	vnum_result11, %function
vnum_result11:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	ldr	r3, [r3, #12]
	str	r3, [fp, #-8]
	mov	r3, #0
	str	r3, [fp, #-12]
	b	.L54
.L55:
	ldr	r3, [fp, #-16]
	add	r3, r3, #8
	ldr	r3, [r3]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	mov	r2, #2
	str	r2, [r3]
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	str	r3, [fp, #-12]
.L54:
	ldr	r2, [fp, #-12]
	ldr	r3, [fp, #-8]
	cmp	r2, r3
	blt	.L55
	ldr	r3, [fp, #-16]
	add	r3, r3, #4
	mov	r2, #1
	str	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	vnum_result11, .-vnum_result11
	.align	2
	.global	vnum_test12
	.syntax unified
	.arm
	.fpu softvfp
	.type	vnum_test12, %function
vnum_test12:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #36
	str	r0, [fp, #-32]
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #12]
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #4]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	str	r3, [fp, #-20]
	mov	r3, #1
	str	r3, [fp, #-16]
	mov	r3, #0
	str	r3, [fp, #-24]
	b	.L57
.L60:
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-20]
	cmp	r2, r3
	beq	.L58
	mov	r3, #2
	str	r3, [fp, #-16]
.L58:
	ldr	r3, [fp, #-16]
	rsb	r3, r3, #2
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #1
	beq	.L59
	mov	r3, #2
	str	r3, [fp, #-20]
.L59:
	ldr	r3, [fp, #-32]
	add	r3, r3, #8
	ldr	r3, [r3]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	mov	r2, #2
	str	r2, [r3]
	ldr	r3, [fp, #-24]
	add	r3, r3, #1
	str	r3, [fp, #-24]
.L57:
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-12]
	cmp	r2, r3
	blt	.L60
	ldr	r3, [fp, #-32]
	add	r3, r3, #4
	ldr	r2, [fp, #-16]
	str	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	vnum_test12, .-vnum_test12
	.align	2
	.global	vnum_result12
	.syntax unified
	.arm
	.fpu softvfp
	.type	vnum_result12, %function
vnum_result12:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	ldr	r3, [r3, #12]
	str	r3, [fp, #-8]
	mov	r3, #0
	str	r3, [fp, #-12]
	b	.L62
.L63:
	ldr	r3, [fp, #-16]
	add	r3, r3, #8
	ldr	r3, [r3]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	mov	r2, #2
	str	r2, [r3]
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	str	r3, [fp, #-12]
.L62:
	ldr	r2, [fp, #-12]
	ldr	r3, [fp, #-8]
	cmp	r2, r3
	blt	.L63
	ldr	r3, [fp, #-16]
	add	r3, r3, #4
	mov	r2, #1
	str	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	vnum_result12, .-vnum_result12
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
