	.file	"90766158.c"
	.intel_syntax noprefix
	.text
	.globl	versions
	.data
	.align 32
	.type	versions, @object
	.size	versions, 72
versions:
	.long	64
	.long	64
	.long	32
	.long	64
	.long	128
	.long	36
	.long	64
	.long	192
	.long	40
	.long	128
	.long	128
	.long	40
	.long	128
	.long	256
	.long	48
	.long	128
	.long	384
	.long	56
	.globl	sbox_4
	.section	.rodata
	.align 16
	.type	sbox_4, @object
	.size	sbox_4, 16
sbox_4:
	.string	"\f\006\t"
	.ascii	"\001\n\002\013\003\b\005\r\004\016\007\017"
	.globl	sbox_4_inv
	.align 16
	.type	sbox_4_inv, @object
	.size	sbox_4_inv, 16
sbox_4_inv:
	.string	"\003\004\006\b\f\n\001\016\t\002\005\007"
	.ascii	"\013\r\017"
	.globl	sbox_8
	.align 32
	.type	sbox_8, @object
	.size	sbox_8, 256
sbox_8:
	.string	"eLjBKcCkUuZzSs[{5\214:\201\2113\200;\225%\230*\220#\231+\345\314\350\301\311\340\300\351\325\365\330\370\320\360\331\371\245\034\250\022\033\240\023\251\005\265\n\270\003\260\013\2712\210<\205\2154\204=\221\"\234,\224$\235-bJlEMdDmRr\\|Tt]}\241\032\254\025\035\244\024\255\002\261\f\274\004\264\r\275\341\310\354\305\315\344\304\355\321\361\334\374\324\364\335\3756\2168\202\2130\2039\226&\232(\223 \233)fNhAI`@iVvXxPpYy\246\036\252\021\031\243\020\253\006\266\b\272"
	.ascii	"\263\t\273\346\316\352\302\313\343\303\353\326\366\332\372\323"
	.ascii	"\363\333\3731\212>\206\2177\207?\222!\236.\227'\237/aHnFOgGo"
	.ascii	"Qq^~Ww_\177\242\030\256\026\037\247\027\257\001\262\016\276\007"
	.ascii	"\267\017\277\342\312\356\306\317\347\307\357\322\362\336\376"
	.ascii	"\327\367\337\377"
	.globl	sbox_8_inv
	.align 32
	.type	sbox_8_inv, @object
	.size	sbox_8_inv, 256
sbox_8_inv:
	.string	"\254\350h<l8\250\354\252\256:>jn\352\356\246\24336fc\343\346\341\244a41d\241\344\215\311I\035M\031\211\315\213\217\033\037KO\313\317\205\300@\025E\020\200\305\202\207\022\027BG\302\307\226\223\003\006VS\323\326\321\224Q\004\001T\221\324\234\330X\f\\\b\230\334\232\236\n\016Z^\332\336\225\320P\005U"
	.ascii	"\220\325\222\227\002\007RW\322\327\235\331Y\r]\t\231\335\233"
	.ascii	"\237\013\017[_\333\337\026\023\203\206FC\303\306A\024\301\204"
	.ascii	"\021D\201\304\034H\310\214L\030\210\314\032\036\212\216JN\312"
	.ascii	"\3165`\340\245e0\240\34527\242\247bg\342\347=i\351\255m9\251"
	.ascii	"\355;?\253\257ko\353\357&#\263\266vs\363\366q$\361\264!t\261"
	.ascii	"\364,x\370\274|(\270\374*.\272\276z~\372\376%p\360\265u \260"
	.ascii	"\365\"'\262\267rw\362\367-y\371\275})\271\375+/\273\277{\177"
	.ascii	"\373\377"
	.globl	P
	.align 16
	.type	P, @object
	.size	P, 16
P:
	.string	""
	.ascii	"\001\002\003\007\004\005\006\n\013\b\t\r\016\017\f"
	.globl	P_inv
	.align 16
	.type	P_inv, @object
	.size	P_inv, 16
P_inv:
	.string	""
	.ascii	"\001\002\003\005\006\007\004\n\013\b\t\017\f\r\016"
	.globl	TWEAKEY_P
	.align 16
	.type	TWEAKEY_P, @object
	.size	TWEAKEY_P, 16
TWEAKEY_P:
	.string	"\t\017\b\r\n\016\f\013"
	.ascii	"\001\002\003\004\005\006\007"
	.globl	TWEAKEY_P_inv
	.align 16
	.type	TWEAKEY_P_inv, @object
	.size	TWEAKEY_P_inv, 16
TWEAKEY_P_inv:
	.string	"\b\t\n\013\f\r\016\017\002"
	.ascii	"\004\007\006\003\005\001"
	.globl	RC
	.align 32
	.type	RC, @object
	.size	RC, 62
RC:
	.ascii	"\001\003\007\017\037>=;7/\036<93'\016\035:5+\026,\0300!\002\005"
	.ascii	"\013\027.\03481#\006\r\0336-\0324)\022$\b\021\"\004\t\023&\f"
	.ascii	"\0312%\n\025*\024(\020 "
	.globl	fic
	.bss
	.align 8
	.type	fic, @object
	.size	fic, 8
fic:
	.zero	8
	.section	.rodata
	.align 8
.LC0:
	.string	"[+] PRNG initialized to 0x%08zX\n"
	.text
	.globl	init_prng
	.type	init_prng, @function
init_prng:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -20[rbp], edi
	mov	edi, 0
	call	time@PLT
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	mov	rcx, rax
	mov	eax, DWORD PTR -20[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	add	rax, rdx
	sal	rax, 2
	add	rax, rcx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	mov	edi, eax
	call	srand@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	rsi, rax
	lea	rdi, .LC0[rip]
	mov	eax, 0
	call	printf@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	init_prng, .-init_prng
	.section	.rodata
.LC1:
	.string	"%02x"
	.text
	.globl	display_matrix
	.type	display_matrix, @function
display_matrix:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 64
	mov	QWORD PTR -56[rbp], rdi
	mov	DWORD PTR -60[rbp], esi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	eax, DWORD PTR -60[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 64
	jne	.L3
	mov	DWORD PTR -36[rbp], 0
	jmp	.L4
.L5:
	mov	eax, DWORD PTR -36[rbp]
	add	eax, eax
	sar	eax, 2
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -56[rbp]
	add	rdx, rax
	mov	eax, DWORD PTR -36[rbp]
	add	eax, eax
	and	eax, 2
	cdqe
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	eax, al
	sal	eax, 4
	mov	ecx, eax
	mov	eax, DWORD PTR -36[rbp]
	add	eax, eax
	add	eax, 1
	sar	eax, 2
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -56[rbp]
	add	rdx, rax
	mov	eax, DWORD PTR -36[rbp]
	add	eax, eax
	add	eax, 1
	and	eax, 3
	cdqe
	movzx	eax, BYTE PTR [rdx+rax]
	and	eax, 15
	or	eax, ecx
	mov	edx, eax
	mov	eax, DWORD PTR -36[rbp]
	cdqe
	mov	BYTE PTR -32[rbp+rax], dl
	add	DWORD PTR -36[rbp], 1
.L4:
	cmp	DWORD PTR -36[rbp], 7
	jle	.L5
	mov	DWORD PTR -36[rbp], 0
	jmp	.L6
.L7:
	mov	eax, DWORD PTR -36[rbp]
	cdqe
	movzx	eax, BYTE PTR -32[rbp+rax]
	movzx	edx, al
	mov	rax, QWORD PTR fic[rip]
	lea	rsi, .LC1[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	add	DWORD PTR -36[rbp], 1
.L6:
	cmp	DWORD PTR -36[rbp], 7
	jle	.L7
	jmp	.L14
.L3:
	mov	eax, DWORD PTR -60[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 128
	jne	.L14
	mov	DWORD PTR -36[rbp], 0
	jmp	.L9
.L10:
	mov	eax, DWORD PTR -36[rbp]
	sar	eax, 2
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -56[rbp]
	add	rdx, rax
	mov	eax, DWORD PTR -36[rbp]
	and	eax, 3
	cdqe
	movzx	edx, BYTE PTR [rdx+rax]
	mov	eax, DWORD PTR -36[rbp]
	cdqe
	mov	BYTE PTR -32[rbp+rax], dl
	add	DWORD PTR -36[rbp], 1
.L9:
	cmp	DWORD PTR -36[rbp], 15
	jle	.L10
	mov	DWORD PTR -36[rbp], 0
	jmp	.L11
.L12:
	mov	eax, DWORD PTR -36[rbp]
	cdqe
	movzx	eax, BYTE PTR -32[rbp+rax]
	movzx	edx, al
	mov	rax, QWORD PTR fic[rip]
	lea	rsi, .LC1[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	add	DWORD PTR -36[rbp], 1
.L11:
	cmp	DWORD PTR -36[rbp], 15
	jle	.L12
.L14:
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	display_matrix, .-display_matrix
	.section	.rodata
.LC2:
	.string	"S = "
.LC3:
	.string	" - TK%i = "
	.text
	.globl	display_cipher_state
	.type	display_cipher_state, @function
display_cipher_state:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -24[rbp], rdi
	mov	QWORD PTR -32[rbp], rsi
	mov	DWORD PTR -36[rbp], edx
	mov	rax, QWORD PTR fic[rip]
	mov	rcx, rax
	mov	edx, 4
	mov	esi, 1
	lea	rdi, .LC2[rip]
	call	fwrite@PLT
	mov	edx, DWORD PTR -36[rbp]
	mov	rax, QWORD PTR -24[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	display_matrix
	mov	DWORD PTR -4[rbp], 0
	jmp	.L16
.L17:
	mov	eax, DWORD PTR -4[rbp]
	lea	edx, 1[rax]
	mov	rax, QWORD PTR fic[rip]
	lea	rsi, .LC3[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	mov	rax, QWORD PTR -32[rbp]
	add	rdx, rax
	mov	eax, DWORD PTR -36[rbp]
	mov	esi, eax
	mov	rdi, rdx
	call	display_matrix
	add	DWORD PTR -4[rbp], 1
.L16:
	mov	eax, DWORD PTR -36[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip+4]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -36[rbp]
	movsx	rcx, eax
	mov	rax, rcx
	add	rax, rax
	add	rax, rcx
	sal	rax, 2
	mov	rcx, rax
	lea	rax, versions[rip]
	mov	ecx, DWORD PTR [rcx+rax]
	mov	eax, edx
	cdq
	idiv	ecx
	cmp	DWORD PTR -4[rbp], eax
	jl	.L17
	nop
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	display_cipher_state, .-display_cipher_state
	.globl	AddKey
	.type	AddKey, @function
AddKey:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 112
	mov	QWORD PTR -88[rbp], rdi
	mov	QWORD PTR -96[rbp], rsi
	mov	DWORD PTR -100[rbp], edx
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -76[rbp], 0
	jmp	.L19
.L24:
	mov	DWORD PTR -72[rbp], 0
	jmp	.L20
.L23:
	mov	eax, DWORD PTR -76[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -88[rbp]
	add	rdx, rax
	mov	eax, DWORD PTR -72[rbp]
	cdqe
	movzx	esi, BYTE PTR [rdx+rax]
	mov	rcx, QWORD PTR -96[rbp]
	mov	eax, DWORD PTR -72[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -76[rbp]
	cdqe
	sal	rax, 2
	add	rax, rcx
	add	rax, rdx
	movzx	ecx, BYTE PTR [rax]
	mov	eax, DWORD PTR -76[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -88[rbp]
	add	rdx, rax
	xor	ecx, esi
	mov	eax, DWORD PTR -72[rbp]
	cdqe
	mov	BYTE PTR [rdx+rax], cl
	mov	eax, DWORD PTR -100[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	eax, DWORD PTR [rdx+rax]
	lea	ecx, [rax+rax]
	mov	eax, DWORD PTR -100[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	ecx, eax
	jne	.L21
	mov	eax, DWORD PTR -76[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -88[rbp]
	add	rdx, rax
	mov	eax, DWORD PTR -72[rbp]
	cdqe
	movzx	esi, BYTE PTR [rdx+rax]
	mov	rax, QWORD PTR -96[rbp]
	lea	rcx, 16[rax]
	mov	eax, DWORD PTR -72[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -76[rbp]
	cdqe
	sal	rax, 2
	add	rax, rcx
	add	rax, rdx
	movzx	ecx, BYTE PTR [rax]
	mov	eax, DWORD PTR -76[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -88[rbp]
	add	rdx, rax
	xor	ecx, esi
	mov	eax, DWORD PTR -72[rbp]
	cdqe
	mov	BYTE PTR [rdx+rax], cl
	jmp	.L22
.L21:
	mov	eax, DWORD PTR -100[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, edx
	add	eax, eax
	lea	ecx, [rax+rdx]
	mov	eax, DWORD PTR -100[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	ecx, eax
	jne	.L22
	mov	eax, DWORD PTR -76[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -88[rbp]
	add	rdx, rax
	mov	eax, DWORD PTR -72[rbp]
	cdqe
	movzx	ecx, BYTE PTR [rdx+rax]
	mov	rax, QWORD PTR -96[rbp]
	lea	rsi, 16[rax]
	mov	eax, DWORD PTR -72[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -76[rbp]
	cdqe
	sal	rax, 2
	add	rax, rsi
	add	rax, rdx
	movzx	edx, BYTE PTR [rax]
	mov	rax, QWORD PTR -96[rbp]
	lea	rdi, 32[rax]
	mov	eax, DWORD PTR -72[rbp]
	movsx	rsi, eax
	mov	eax, DWORD PTR -76[rbp]
	cdqe
	sal	rax, 2
	add	rax, rdi
	add	rax, rsi
	movzx	eax, BYTE PTR [rax]
	mov	esi, edx
	xor	esi, eax
	mov	eax, DWORD PTR -76[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -88[rbp]
	add	rdx, rax
	xor	ecx, esi
	mov	eax, DWORD PTR -72[rbp]
	cdqe
	mov	BYTE PTR [rdx+rax], cl
.L22:
	add	DWORD PTR -72[rbp], 1
.L20:
	cmp	DWORD PTR -72[rbp], 3
	jle	.L23
	add	DWORD PTR -76[rbp], 1
.L19:
	cmp	DWORD PTR -76[rbp], 1
	jle	.L24
	mov	DWORD PTR -68[rbp], 0
	jmp	.L25
.L30:
	mov	DWORD PTR -76[rbp], 0
	jmp	.L26
.L29:
	mov	DWORD PTR -72[rbp], 0
	jmp	.L27
.L28:
	mov	eax, DWORD PTR -76[rbp]
	lea	edx, 0[0+rax*4]
	mov	eax, DWORD PTR -72[rbp]
	add	eax, edx
	cdqe
	lea	rdx, TWEAKEY_P[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	mov	BYTE PTR -77[rbp], al
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	mov	rax, QWORD PTR -96[rbp]
	lea	rcx, [rdx+rax]
	movzx	eax, BYTE PTR -77[rbp]
	shr	al, 2
	movzx	eax, al
	movzx	edx, BYTE PTR -77[rbp]
	and	edx, 3
	movsx	rdx, edx
	cdqe
	sal	rax, 2
	add	rax, rcx
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	mov	edx, DWORD PTR -72[rbp]
	movsx	rsi, edx
	mov	edx, DWORD PTR -68[rbp]
	movsx	rdx, edx
	mov	ecx, DWORD PTR -76[rbp]
	movsx	rcx, ecx
	sal	rdx, 2
	add	rdx, rcx
	sal	rdx, 2
	add	rdx, rbp
	add	rdx, rsi
	sub	rdx, 64
	mov	BYTE PTR [rdx], al
	add	DWORD PTR -72[rbp], 1
.L27:
	cmp	DWORD PTR -72[rbp], 3
	jle	.L28
	add	DWORD PTR -76[rbp], 1
.L26:
	cmp	DWORD PTR -76[rbp], 3
	jle	.L29
	add	DWORD PTR -68[rbp], 1
.L25:
	mov	eax, DWORD PTR -100[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip+4]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -100[rbp]
	movsx	rcx, eax
	mov	rax, rcx
	add	rax, rax
	add	rax, rcx
	sal	rax, 2
	mov	rcx, rax
	lea	rax, versions[rip]
	mov	ecx, DWORD PTR [rcx+rax]
	mov	eax, edx
	cdq
	idiv	ecx
	cmp	DWORD PTR -68[rbp], eax
	jl	.L30
	mov	DWORD PTR -68[rbp], 0
	jmp	.L31
.L40:
	mov	DWORD PTR -76[rbp], 0
	jmp	.L32
.L39:
	mov	DWORD PTR -72[rbp], 0
	jmp	.L33
.L38:
	cmp	DWORD PTR -68[rbp], 1
	jne	.L34
	mov	eax, DWORD PTR -100[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 64
	jne	.L35
	mov	eax, DWORD PTR -72[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rcx
	sub	rax, 64
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	add	eax, eax
	and	eax, 14
	mov	esi, eax
	mov	eax, DWORD PTR -72[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rcx
	sub	rax, 64
	movzx	eax, BYTE PTR [rax]
	shr	al, 3
	and	eax, 1
	or	esi, eax
	mov	eax, DWORD PTR -72[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rcx
	sub	rax, 64
	movzx	eax, BYTE PTR [rax]
	shr	al, 2
	and	eax, 1
	xor	eax, esi
	mov	ecx, eax
	mov	eax, DWORD PTR -72[rbp]
	movsx	rsi, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rsi
	sub	rax, 64
	mov	BYTE PTR [rax], cl
	jmp	.L36
.L35:
	mov	eax, DWORD PTR -72[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rcx
	sub	rax, 64
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	add	eax, eax
	mov	esi, eax
	mov	eax, DWORD PTR -72[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rcx
	sub	rax, 64
	movzx	eax, BYTE PTR [rax]
	shr	al, 7
	xor	esi, eax
	mov	eax, DWORD PTR -72[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rcx
	sub	rax, 64
	movzx	eax, BYTE PTR [rax]
	shr	al, 5
	and	eax, 1
	xor	eax, esi
	mov	ecx, eax
	mov	eax, DWORD PTR -72[rbp]
	movsx	rsi, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rsi
	sub	rax, 64
	mov	BYTE PTR [rax], cl
	jmp	.L36
.L34:
	cmp	DWORD PTR -68[rbp], 2
	jne	.L36
	mov	eax, DWORD PTR -100[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 64
	jne	.L37
	mov	eax, DWORD PTR -72[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rcx
	sub	rax, 64
	movzx	eax, BYTE PTR [rax]
	shr	al
	and	eax, 7
	mov	esi, eax
	mov	eax, DWORD PTR -72[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rcx
	sub	rax, 64
	movzx	eax, BYTE PTR [rax]
	and	eax, 8
	or	esi, eax
	mov	eax, DWORD PTR -72[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rcx
	sub	rax, 64
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	eax, 3
	and	eax, 8
	xor	eax, esi
	mov	ecx, eax
	mov	eax, DWORD PTR -72[rbp]
	movsx	rsi, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rsi
	sub	rax, 64
	mov	BYTE PTR [rax], cl
	jmp	.L36
.L37:
	mov	eax, DWORD PTR -72[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rcx
	sub	rax, 64
	movzx	eax, BYTE PTR [rax]
	shr	al
	mov	esi, eax
	mov	eax, DWORD PTR -72[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rcx
	sub	rax, 64
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	eax, 7
	xor	esi, eax
	mov	eax, DWORD PTR -72[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rcx
	sub	rax, 64
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	add	eax, eax
	and	eax, -128
	xor	eax, esi
	mov	ecx, eax
	mov	eax, DWORD PTR -72[rbp]
	movsx	rsi, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rsi
	sub	rax, 64
	mov	BYTE PTR [rax], cl
.L36:
	add	DWORD PTR -72[rbp], 1
.L33:
	cmp	DWORD PTR -72[rbp], 3
	jle	.L38
	add	DWORD PTR -76[rbp], 1
.L32:
	cmp	DWORD PTR -76[rbp], 1
	jle	.L39
	add	DWORD PTR -68[rbp], 1
.L31:
	mov	eax, DWORD PTR -100[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip+4]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -100[rbp]
	movsx	rcx, eax
	mov	rax, rcx
	add	rax, rax
	add	rax, rcx
	sal	rax, 2
	mov	rcx, rax
	lea	rax, versions[rip]
	mov	ecx, DWORD PTR [rcx+rax]
	mov	eax, edx
	cdq
	idiv	ecx
	cmp	DWORD PTR -68[rbp], eax
	jl	.L40
	mov	DWORD PTR -68[rbp], 0
	jmp	.L41
.L46:
	mov	DWORD PTR -76[rbp], 0
	jmp	.L42
.L45:
	mov	DWORD PTR -72[rbp], 0
	jmp	.L43
.L44:
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	mov	rax, QWORD PTR -96[rbp]
	lea	rsi, [rdx+rax]
	mov	eax, DWORD PTR -72[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rcx
	sub	rax, 64
	movzx	edx, BYTE PTR [rax]
	mov	eax, DWORD PTR -72[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -76[rbp]
	cdqe
	sal	rax, 2
	add	rax, rsi
	add	rax, rcx
	mov	BYTE PTR [rax], dl
	add	DWORD PTR -72[rbp], 1
.L43:
	cmp	DWORD PTR -72[rbp], 3
	jle	.L44
	add	DWORD PTR -76[rbp], 1
.L42:
	cmp	DWORD PTR -76[rbp], 3
	jle	.L45
	add	DWORD PTR -68[rbp], 1
.L41:
	mov	eax, DWORD PTR -100[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip+4]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -100[rbp]
	movsx	rcx, eax
	mov	rax, rcx
	add	rax, rax
	add	rax, rcx
	sal	rax, 2
	mov	rcx, rax
	lea	rax, versions[rip]
	mov	ecx, DWORD PTR [rcx+rax]
	mov	eax, edx
	cdq
	idiv	ecx
	cmp	DWORD PTR -68[rbp], eax
	jl	.L46
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L47
	call	__stack_chk_fail@PLT
.L47:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	AddKey, .-AddKey
	.globl	AddKey_inv
	.type	AddKey_inv, @function
AddKey_inv:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 112
	mov	QWORD PTR -88[rbp], rdi
	mov	QWORD PTR -96[rbp], rsi
	mov	DWORD PTR -100[rbp], edx
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -68[rbp], 0
	jmp	.L49
.L54:
	mov	DWORD PTR -76[rbp], 0
	jmp	.L50
.L53:
	mov	DWORD PTR -72[rbp], 0
	jmp	.L51
.L52:
	mov	eax, DWORD PTR -76[rbp]
	lea	edx, 0[0+rax*4]
	mov	eax, DWORD PTR -72[rbp]
	add	eax, edx
	cdqe
	lea	rdx, TWEAKEY_P_inv[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	mov	BYTE PTR -77[rbp], al
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	mov	rax, QWORD PTR -96[rbp]
	lea	rcx, [rdx+rax]
	movzx	eax, BYTE PTR -77[rbp]
	shr	al, 2
	movzx	eax, al
	movzx	edx, BYTE PTR -77[rbp]
	and	edx, 3
	movsx	rdx, edx
	cdqe
	sal	rax, 2
	add	rax, rcx
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	mov	edx, DWORD PTR -72[rbp]
	movsx	rsi, edx
	mov	edx, DWORD PTR -68[rbp]
	movsx	rdx, edx
	mov	ecx, DWORD PTR -76[rbp]
	movsx	rcx, ecx
	sal	rdx, 2
	add	rdx, rcx
	sal	rdx, 2
	add	rdx, rbp
	add	rdx, rsi
	sub	rdx, 64
	mov	BYTE PTR [rdx], al
	add	DWORD PTR -72[rbp], 1
.L51:
	cmp	DWORD PTR -72[rbp], 3
	jle	.L52
	add	DWORD PTR -76[rbp], 1
.L50:
	cmp	DWORD PTR -76[rbp], 3
	jle	.L53
	add	DWORD PTR -68[rbp], 1
.L49:
	mov	eax, DWORD PTR -100[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip+4]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -100[rbp]
	movsx	rcx, eax
	mov	rax, rcx
	add	rax, rax
	add	rax, rcx
	sal	rax, 2
	mov	rcx, rax
	lea	rax, versions[rip]
	mov	ecx, DWORD PTR [rcx+rax]
	mov	eax, edx
	cdq
	idiv	ecx
	cmp	DWORD PTR -68[rbp], eax
	jl	.L54
	mov	DWORD PTR -68[rbp], 0
	jmp	.L55
.L64:
	mov	DWORD PTR -76[rbp], 2
	jmp	.L56
.L63:
	mov	DWORD PTR -72[rbp], 0
	jmp	.L57
.L62:
	cmp	DWORD PTR -68[rbp], 1
	jne	.L58
	mov	eax, DWORD PTR -100[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 64
	jne	.L59
	mov	eax, DWORD PTR -72[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rcx
	sub	rax, 64
	movzx	eax, BYTE PTR [rax]
	shr	al
	and	eax, 7
	mov	esi, eax
	mov	eax, DWORD PTR -72[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rcx
	sub	rax, 64
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	eax, 3
	and	eax, 8
	or	esi, eax
	mov	eax, DWORD PTR -72[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rcx
	sub	rax, 64
	movzx	eax, BYTE PTR [rax]
	and	eax, 8
	xor	eax, esi
	mov	ecx, eax
	mov	eax, DWORD PTR -72[rbp]
	movsx	rsi, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rsi
	sub	rax, 64
	mov	BYTE PTR [rax], cl
	jmp	.L60
.L59:
	mov	eax, DWORD PTR -72[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rcx
	sub	rax, 64
	movzx	eax, BYTE PTR [rax]
	shr	al
	mov	esi, eax
	mov	eax, DWORD PTR -72[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rcx
	sub	rax, 64
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	eax, 7
	xor	esi, eax
	mov	eax, DWORD PTR -72[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rcx
	sub	rax, 64
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	add	eax, eax
	and	eax, -128
	xor	eax, esi
	mov	ecx, eax
	mov	eax, DWORD PTR -72[rbp]
	movsx	rsi, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rsi
	sub	rax, 64
	mov	BYTE PTR [rax], cl
	jmp	.L60
.L58:
	cmp	DWORD PTR -68[rbp], 2
	jne	.L60
	mov	eax, DWORD PTR -100[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 64
	jne	.L61
	mov	eax, DWORD PTR -72[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rcx
	sub	rax, 64
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	add	eax, eax
	and	eax, 14
	mov	esi, eax
	mov	eax, DWORD PTR -72[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rcx
	sub	rax, 64
	movzx	eax, BYTE PTR [rax]
	shr	al, 3
	and	eax, 1
	or	esi, eax
	mov	eax, DWORD PTR -72[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rcx
	sub	rax, 64
	movzx	eax, BYTE PTR [rax]
	shr	al, 2
	and	eax, 1
	xor	eax, esi
	mov	ecx, eax
	mov	eax, DWORD PTR -72[rbp]
	movsx	rsi, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rsi
	sub	rax, 64
	mov	BYTE PTR [rax], cl
	jmp	.L60
.L61:
	mov	eax, DWORD PTR -72[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rcx
	sub	rax, 64
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	add	eax, eax
	mov	esi, eax
	mov	eax, DWORD PTR -72[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rcx
	sub	rax, 64
	movzx	eax, BYTE PTR [rax]
	shr	al, 7
	xor	esi, eax
	mov	eax, DWORD PTR -72[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rcx
	sub	rax, 64
	movzx	eax, BYTE PTR [rax]
	shr	al, 5
	and	eax, 1
	xor	eax, esi
	mov	ecx, eax
	mov	eax, DWORD PTR -72[rbp]
	movsx	rsi, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rsi
	sub	rax, 64
	mov	BYTE PTR [rax], cl
.L60:
	add	DWORD PTR -72[rbp], 1
.L57:
	cmp	DWORD PTR -72[rbp], 3
	jle	.L62
	add	DWORD PTR -76[rbp], 1
.L56:
	cmp	DWORD PTR -76[rbp], 3
	jle	.L63
	add	DWORD PTR -68[rbp], 1
.L55:
	mov	eax, DWORD PTR -100[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip+4]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -100[rbp]
	movsx	rcx, eax
	mov	rax, rcx
	add	rax, rax
	add	rax, rcx
	sal	rax, 2
	mov	rcx, rax
	lea	rax, versions[rip]
	mov	ecx, DWORD PTR [rcx+rax]
	mov	eax, edx
	cdq
	idiv	ecx
	cmp	DWORD PTR -68[rbp], eax
	jl	.L64
	mov	DWORD PTR -68[rbp], 0
	jmp	.L65
.L70:
	mov	DWORD PTR -76[rbp], 0
	jmp	.L66
.L69:
	mov	DWORD PTR -72[rbp], 0
	jmp	.L67
.L68:
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	mov	rax, QWORD PTR -96[rbp]
	lea	rsi, [rdx+rax]
	mov	eax, DWORD PTR -72[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	mov	edx, DWORD PTR -76[rbp]
	movsx	rdx, edx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 2
	add	rax, rbp
	add	rax, rcx
	sub	rax, 64
	movzx	edx, BYTE PTR [rax]
	mov	eax, DWORD PTR -72[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -76[rbp]
	cdqe
	sal	rax, 2
	add	rax, rsi
	add	rax, rcx
	mov	BYTE PTR [rax], dl
	add	DWORD PTR -72[rbp], 1
.L67:
	cmp	DWORD PTR -72[rbp], 3
	jle	.L68
	add	DWORD PTR -76[rbp], 1
.L66:
	cmp	DWORD PTR -76[rbp], 3
	jle	.L69
	add	DWORD PTR -68[rbp], 1
.L65:
	mov	eax, DWORD PTR -100[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip+4]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -100[rbp]
	movsx	rcx, eax
	mov	rax, rcx
	add	rax, rax
	add	rax, rcx
	sal	rax, 2
	mov	rcx, rax
	lea	rax, versions[rip]
	mov	ecx, DWORD PTR [rcx+rax]
	mov	eax, edx
	cdq
	idiv	ecx
	cmp	DWORD PTR -68[rbp], eax
	jl	.L70
	mov	DWORD PTR -76[rbp], 0
	jmp	.L71
.L76:
	mov	DWORD PTR -72[rbp], 0
	jmp	.L72
.L75:
	mov	eax, DWORD PTR -76[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -88[rbp]
	add	rdx, rax
	mov	eax, DWORD PTR -72[rbp]
	cdqe
	movzx	esi, BYTE PTR [rdx+rax]
	mov	rcx, QWORD PTR -96[rbp]
	mov	eax, DWORD PTR -72[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -76[rbp]
	cdqe
	sal	rax, 2
	add	rax, rcx
	add	rax, rdx
	movzx	ecx, BYTE PTR [rax]
	mov	eax, DWORD PTR -76[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -88[rbp]
	add	rdx, rax
	xor	ecx, esi
	mov	eax, DWORD PTR -72[rbp]
	cdqe
	mov	BYTE PTR [rdx+rax], cl
	mov	eax, DWORD PTR -100[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	eax, DWORD PTR [rdx+rax]
	lea	ecx, [rax+rax]
	mov	eax, DWORD PTR -100[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	ecx, eax
	jne	.L73
	mov	eax, DWORD PTR -76[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -88[rbp]
	add	rdx, rax
	mov	eax, DWORD PTR -72[rbp]
	cdqe
	movzx	esi, BYTE PTR [rdx+rax]
	mov	rax, QWORD PTR -96[rbp]
	lea	rcx, 16[rax]
	mov	eax, DWORD PTR -72[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -76[rbp]
	cdqe
	sal	rax, 2
	add	rax, rcx
	add	rax, rdx
	movzx	ecx, BYTE PTR [rax]
	mov	eax, DWORD PTR -76[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -88[rbp]
	add	rdx, rax
	xor	ecx, esi
	mov	eax, DWORD PTR -72[rbp]
	cdqe
	mov	BYTE PTR [rdx+rax], cl
	jmp	.L74
.L73:
	mov	eax, DWORD PTR -100[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, edx
	add	eax, eax
	lea	ecx, [rax+rdx]
	mov	eax, DWORD PTR -100[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	ecx, eax
	jne	.L74
	mov	eax, DWORD PTR -76[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -88[rbp]
	add	rdx, rax
	mov	eax, DWORD PTR -72[rbp]
	cdqe
	movzx	ecx, BYTE PTR [rdx+rax]
	mov	rax, QWORD PTR -96[rbp]
	lea	rsi, 16[rax]
	mov	eax, DWORD PTR -72[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -76[rbp]
	cdqe
	sal	rax, 2
	add	rax, rsi
	add	rax, rdx
	movzx	edx, BYTE PTR [rax]
	mov	rax, QWORD PTR -96[rbp]
	lea	rdi, 32[rax]
	mov	eax, DWORD PTR -72[rbp]
	movsx	rsi, eax
	mov	eax, DWORD PTR -76[rbp]
	cdqe
	sal	rax, 2
	add	rax, rdi
	add	rax, rsi
	movzx	eax, BYTE PTR [rax]
	mov	esi, edx
	xor	esi, eax
	mov	eax, DWORD PTR -76[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -88[rbp]
	add	rdx, rax
	xor	ecx, esi
	mov	eax, DWORD PTR -72[rbp]
	cdqe
	mov	BYTE PTR [rdx+rax], cl
.L74:
	add	DWORD PTR -72[rbp], 1
.L72:
	cmp	DWORD PTR -72[rbp], 3
	jle	.L75
	add	DWORD PTR -76[rbp], 1
.L71:
	cmp	DWORD PTR -76[rbp], 1
	jle	.L76
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L77
	call	__stack_chk_fail@PLT
.L77:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	AddKey_inv, .-AddKey_inv
	.globl	AddConstants
	.type	AddConstants, @function
AddConstants:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	DWORD PTR -12[rbp], esi
	mov	rax, QWORD PTR -8[rbp]
	movzx	eax, BYTE PTR [rax]
	mov	ecx, eax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	lea	rdx, RC[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	and	eax, 15
	xor	eax, ecx
	mov	edx, eax
	mov	rax, QWORD PTR -8[rbp]
	mov	BYTE PTR [rax], dl
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 4
	movzx	eax, BYTE PTR [rax]
	mov	ecx, eax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	lea	rdx, RC[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	shr	al, 4
	and	eax, 3
	xor	ecx, eax
	mov	edx, ecx
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 4
	mov	BYTE PTR [rax], dl
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 8
	movzx	edx, BYTE PTR [rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 8
	xor	edx, 2
	mov	BYTE PTR [rax], dl
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	AddConstants, .-AddConstants
	.globl	SubCell4
	.type	SubCell4, @function
SubCell4:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -8[rbp], 0
	jmp	.L80
.L83:
	mov	DWORD PTR -4[rbp], 0
	jmp	.L81
.L82:
	mov	eax, DWORD PTR -8[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rdx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	eax, al
	mov	edx, DWORD PTR -8[rbp]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	mov	rdx, QWORD PTR -24[rbp]
	add	rcx, rdx
	cdqe
	lea	rdx, sbox_4[rip]
	movzx	edx, BYTE PTR [rax+rdx]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	mov	BYTE PTR [rcx+rax], dl
	add	DWORD PTR -4[rbp], 1
.L81:
	cmp	DWORD PTR -4[rbp], 3
	jle	.L82
	add	DWORD PTR -8[rbp], 1
.L80:
	cmp	DWORD PTR -8[rbp], 3
	jle	.L83
	nop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	SubCell4, .-SubCell4
	.globl	SubCell4_inv
	.type	SubCell4_inv, @function
SubCell4_inv:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -8[rbp], 0
	jmp	.L85
.L88:
	mov	DWORD PTR -4[rbp], 0
	jmp	.L86
.L87:
	mov	eax, DWORD PTR -8[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rdx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	eax, al
	mov	edx, DWORD PTR -8[rbp]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	mov	rdx, QWORD PTR -24[rbp]
	add	rcx, rdx
	cdqe
	lea	rdx, sbox_4_inv[rip]
	movzx	edx, BYTE PTR [rax+rdx]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	mov	BYTE PTR [rcx+rax], dl
	add	DWORD PTR -4[rbp], 1
.L86:
	cmp	DWORD PTR -4[rbp], 3
	jle	.L87
	add	DWORD PTR -8[rbp], 1
.L85:
	cmp	DWORD PTR -8[rbp], 3
	jle	.L88
	nop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	SubCell4_inv, .-SubCell4_inv
	.globl	SubCell8
	.type	SubCell8, @function
SubCell8:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -8[rbp], 0
	jmp	.L90
.L93:
	mov	DWORD PTR -4[rbp], 0
	jmp	.L91
.L92:
	mov	eax, DWORD PTR -8[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rdx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	eax, al
	mov	edx, DWORD PTR -8[rbp]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	mov	rdx, QWORD PTR -24[rbp]
	add	rcx, rdx
	cdqe
	lea	rdx, sbox_8[rip]
	movzx	edx, BYTE PTR [rax+rdx]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	mov	BYTE PTR [rcx+rax], dl
	add	DWORD PTR -4[rbp], 1
.L91:
	cmp	DWORD PTR -4[rbp], 3
	jle	.L92
	add	DWORD PTR -8[rbp], 1
.L90:
	cmp	DWORD PTR -8[rbp], 3
	jle	.L93
	nop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	SubCell8, .-SubCell8
	.globl	SubCell8_inv
	.type	SubCell8_inv, @function
SubCell8_inv:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -8[rbp], 0
	jmp	.L95
.L98:
	mov	DWORD PTR -4[rbp], 0
	jmp	.L96
.L97:
	mov	eax, DWORD PTR -8[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rdx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	eax, al
	mov	edx, DWORD PTR -8[rbp]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	mov	rdx, QWORD PTR -24[rbp]
	add	rcx, rdx
	cdqe
	lea	rdx, sbox_8_inv[rip]
	movzx	edx, BYTE PTR [rax+rdx]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	mov	BYTE PTR [rcx+rax], dl
	add	DWORD PTR -4[rbp], 1
.L96:
	cmp	DWORD PTR -4[rbp], 3
	jle	.L97
	add	DWORD PTR -8[rbp], 1
.L95:
	cmp	DWORD PTR -8[rbp], 3
	jle	.L98
	nop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	SubCell8_inv, .-SubCell8_inv
	.globl	ShiftRows
	.type	ShiftRows, @function
ShiftRows:
.LFB16:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 64
	mov	QWORD PTR -56[rbp], rdi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -44[rbp], 0
	jmp	.L100
.L103:
	mov	DWORD PTR -40[rbp], 0
	jmp	.L101
.L102:
	mov	eax, DWORD PTR -44[rbp]
	lea	edx, 0[0+rax*4]
	mov	eax, DWORD PTR -40[rbp]
	add	eax, edx
	cdqe
	lea	rdx, P[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	mov	DWORD PTR -36[rbp], eax
	mov	eax, DWORD PTR -36[rbp]
	sar	eax, 2
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -56[rbp]
	add	rdx, rax
	mov	eax, DWORD PTR -36[rbp]
	and	eax, 3
	cdqe
	movzx	eax, BYTE PTR [rdx+rax]
	mov	edx, DWORD PTR -40[rbp]
	movsx	rcx, edx
	mov	edx, DWORD PTR -44[rbp]
	movsx	rdx, edx
	sal	rdx, 2
	add	rdx, rbp
	add	rdx, rcx
	sub	rdx, 32
	mov	BYTE PTR [rdx], al
	add	DWORD PTR -40[rbp], 1
.L101:
	cmp	DWORD PTR -40[rbp], 3
	jle	.L102
	add	DWORD PTR -44[rbp], 1
.L100:
	cmp	DWORD PTR -44[rbp], 3
	jle	.L103
	mov	DWORD PTR -44[rbp], 0
	jmp	.L104
.L107:
	mov	DWORD PTR -40[rbp], 0
	jmp	.L105
.L106:
	mov	eax, DWORD PTR -44[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -56[rbp]
	lea	rcx, [rdx+rax]
	mov	eax, DWORD PTR -40[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -44[rbp]
	cdqe
	sal	rax, 2
	add	rax, rbp
	add	rax, rdx
	sub	rax, 32
	movzx	edx, BYTE PTR [rax]
	mov	eax, DWORD PTR -40[rbp]
	cdqe
	mov	BYTE PTR [rcx+rax], dl
	add	DWORD PTR -40[rbp], 1
.L105:
	cmp	DWORD PTR -40[rbp], 3
	jle	.L106
	add	DWORD PTR -44[rbp], 1
.L104:
	cmp	DWORD PTR -44[rbp], 3
	jle	.L107
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L108
	call	__stack_chk_fail@PLT
.L108:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE16:
	.size	ShiftRows, .-ShiftRows
	.globl	ShiftRows_inv
	.type	ShiftRows_inv, @function
ShiftRows_inv:
.LFB17:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 64
	mov	QWORD PTR -56[rbp], rdi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -44[rbp], 0
	jmp	.L110
.L113:
	mov	DWORD PTR -40[rbp], 0
	jmp	.L111
.L112:
	mov	eax, DWORD PTR -44[rbp]
	lea	edx, 0[0+rax*4]
	mov	eax, DWORD PTR -40[rbp]
	add	eax, edx
	cdqe
	lea	rdx, P_inv[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	mov	DWORD PTR -36[rbp], eax
	mov	eax, DWORD PTR -36[rbp]
	sar	eax, 2
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -56[rbp]
	add	rdx, rax
	mov	eax, DWORD PTR -36[rbp]
	and	eax, 3
	cdqe
	movzx	eax, BYTE PTR [rdx+rax]
	mov	edx, DWORD PTR -40[rbp]
	movsx	rcx, edx
	mov	edx, DWORD PTR -44[rbp]
	movsx	rdx, edx
	sal	rdx, 2
	add	rdx, rbp
	add	rdx, rcx
	sub	rdx, 32
	mov	BYTE PTR [rdx], al
	add	DWORD PTR -40[rbp], 1
.L111:
	cmp	DWORD PTR -40[rbp], 3
	jle	.L112
	add	DWORD PTR -44[rbp], 1
.L110:
	cmp	DWORD PTR -44[rbp], 3
	jle	.L113
	mov	DWORD PTR -44[rbp], 0
	jmp	.L114
.L117:
	mov	DWORD PTR -40[rbp], 0
	jmp	.L115
.L116:
	mov	eax, DWORD PTR -44[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -56[rbp]
	lea	rcx, [rdx+rax]
	mov	eax, DWORD PTR -40[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -44[rbp]
	cdqe
	sal	rax, 2
	add	rax, rbp
	add	rax, rdx
	sub	rax, 32
	movzx	edx, BYTE PTR [rax]
	mov	eax, DWORD PTR -40[rbp]
	cdqe
	mov	BYTE PTR [rcx+rax], dl
	add	DWORD PTR -40[rbp], 1
.L115:
	cmp	DWORD PTR -40[rbp], 3
	jle	.L116
	add	DWORD PTR -44[rbp], 1
.L114:
	cmp	DWORD PTR -44[rbp], 3
	jle	.L117
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L118
	call	__stack_chk_fail@PLT
.L118:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE17:
	.size	ShiftRows_inv, .-ShiftRows_inv
	.globl	MixColumn
	.type	MixColumn, @function
MixColumn:
.LFB18:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -4[rbp], 0
	jmp	.L120
.L121:
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 4[rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	movzx	esi, BYTE PTR [rdx+rax]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 8[rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	movzx	ecx, BYTE PTR [rdx+rax]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 4[rax]
	xor	ecx, esi
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	mov	BYTE PTR [rdx+rax], cl
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 8[rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	movzx	esi, BYTE PTR [rdx+rax]
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	movzx	ecx, BYTE PTR [rdx+rax]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 8[rax]
	xor	ecx, esi
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	mov	BYTE PTR [rdx+rax], cl
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 12[rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	movzx	esi, BYTE PTR [rdx+rax]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 8[rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	movzx	ecx, BYTE PTR [rdx+rax]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 12[rax]
	xor	ecx, esi
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	mov	BYTE PTR [rdx+rax], cl
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 12[rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	movzx	eax, BYTE PTR [rdx+rax]
	mov	BYTE PTR -5[rbp], al
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 8[rax]
	mov	rax, QWORD PTR -24[rbp]
	lea	rcx, 12[rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	movzx	edx, BYTE PTR [rdx+rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	mov	BYTE PTR [rcx+rax], dl
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 4[rax]
	mov	rax, QWORD PTR -24[rbp]
	lea	rcx, 8[rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	movzx	edx, BYTE PTR [rdx+rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	mov	BYTE PTR [rcx+rax], dl
	mov	rax, QWORD PTR -24[rbp]
	lea	rcx, 4[rax]
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	movzx	edx, BYTE PTR [rdx+rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	mov	BYTE PTR [rcx+rax], dl
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	movzx	ecx, BYTE PTR -5[rbp]
	mov	BYTE PTR [rdx+rax], cl
	add	DWORD PTR -4[rbp], 1
.L120:
	cmp	DWORD PTR -4[rbp], 3
	jle	.L121
	nop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE18:
	.size	MixColumn, .-MixColumn
	.globl	MixColumn_inv
	.type	MixColumn_inv, @function
MixColumn_inv:
.LFB19:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -4[rbp], 0
	jmp	.L123
.L124:
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 12[rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	movzx	eax, BYTE PTR [rdx+rax]
	mov	BYTE PTR -5[rbp], al
	mov	rax, QWORD PTR -24[rbp]
	lea	rcx, 12[rax]
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	movzx	edx, BYTE PTR [rdx+rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	mov	BYTE PTR [rcx+rax], dl
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 4[rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	movzx	ecx, BYTE PTR [rdx+rax]
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	mov	BYTE PTR [rdx+rax], cl
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 8[rax]
	mov	rax, QWORD PTR -24[rbp]
	lea	rcx, 4[rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	movzx	edx, BYTE PTR [rdx+rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	mov	BYTE PTR [rcx+rax], dl
	mov	rax, QWORD PTR -24[rbp]
	lea	rcx, 8[rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	movzx	edx, BYTE PTR -5[rbp]
	mov	BYTE PTR [rcx+rax], dl
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 12[rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	movzx	esi, BYTE PTR [rdx+rax]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 8[rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	movzx	ecx, BYTE PTR [rdx+rax]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 12[rax]
	xor	ecx, esi
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	mov	BYTE PTR [rdx+rax], cl
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 8[rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	movzx	esi, BYTE PTR [rdx+rax]
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	movzx	ecx, BYTE PTR [rdx+rax]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 8[rax]
	xor	ecx, esi
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	mov	BYTE PTR [rdx+rax], cl
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 4[rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	movzx	esi, BYTE PTR [rdx+rax]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 8[rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	movzx	ecx, BYTE PTR [rdx+rax]
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 4[rax]
	xor	ecx, esi
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	mov	BYTE PTR [rdx+rax], cl
	add	DWORD PTR -4[rbp], 1
.L123:
	cmp	DWORD PTR -4[rbp], 3
	jle	.L124
	nop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE19:
	.size	MixColumn_inv, .-MixColumn_inv
	.globl	dec
	.type	dec, @function
dec:
.LFB20:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 144
	mov	QWORD PTR -120[rbp], rdi
	mov	QWORD PTR -128[rbp], rsi
	mov	DWORD PTR -132[rbp], edx
	mov	DWORD PTR -136[rbp], ecx
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	QWORD PTR -80[rbp], 0
	mov	QWORD PTR -72[rbp], 0
	lea	rax, -64[rbp]
	mov	edx, 48
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	DWORD PTR -100[rbp], 0
	jmp	.L126
.L133:
	mov	eax, DWORD PTR -132[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 64
	jne	.L127
	mov	eax, DWORD PTR -100[rbp]
	and	eax, 1
	test	eax, eax
	je	.L128
	mov	eax, DWORD PTR -100[rbp]
	sar	eax
	movsx	rdx, eax
	mov	rax, QWORD PTR -120[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	mov	edx, DWORD PTR -100[rbp]
	mov	ecx, edx
	sar	ecx, 2
	mov	edx, DWORD PTR -100[rbp]
	mov	esi, edx
	and	esi, 3
	and	eax, 15
	mov	edx, eax
	movsx	rsi, esi
	movsx	rax, ecx
	sal	rax, 2
	add	rax, rbp
	add	rax, rsi
	sub	rax, 96
	mov	BYTE PTR [rax], dl
	mov	eax, DWORD PTR -100[rbp]
	sar	eax
	movsx	rdx, eax
	mov	rax, QWORD PTR -128[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	mov	edx, DWORD PTR -100[rbp]
	mov	ecx, edx
	sar	ecx, 2
	mov	edx, DWORD PTR -100[rbp]
	mov	esi, edx
	and	esi, 3
	and	eax, 15
	mov	edx, eax
	movsx	rsi, esi
	movsx	rax, ecx
	sal	rax, 2
	add	rax, rbp
	add	rax, rsi
	sub	rax, 64
	mov	BYTE PTR [rax], dl
	mov	eax, DWORD PTR -132[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 127
	jle	.L129
	mov	eax, DWORD PTR -100[rbp]
	add	eax, 16
	sar	eax
	movsx	rdx, eax
	mov	rax, QWORD PTR -128[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	mov	edx, DWORD PTR -100[rbp]
	mov	ecx, edx
	sar	ecx, 2
	mov	edx, DWORD PTR -100[rbp]
	mov	esi, edx
	and	esi, 3
	and	eax, 15
	mov	edx, eax
	movsx	rsi, esi
	movsx	rax, ecx
	sal	rax, 2
	add	rax, rbp
	add	rax, rsi
	sub	rax, 48
	mov	BYTE PTR [rax], dl
.L129:
	mov	eax, DWORD PTR -132[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 191
	jle	.L130
	mov	eax, DWORD PTR -100[rbp]
	add	eax, 32
	sar	eax
	movsx	rdx, eax
	mov	rax, QWORD PTR -128[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	mov	edx, DWORD PTR -100[rbp]
	mov	ecx, edx
	sar	ecx, 2
	mov	edx, DWORD PTR -100[rbp]
	mov	esi, edx
	and	esi, 3
	and	eax, 15
	mov	edx, eax
	movsx	rsi, esi
	movsx	rax, ecx
	sal	rax, 2
	add	rax, rbp
	add	rax, rsi
	sub	rax, 32
	mov	BYTE PTR [rax], dl
	jmp	.L130
.L128:
	mov	eax, DWORD PTR -100[rbp]
	sar	eax
	movsx	rdx, eax
	mov	rax, QWORD PTR -120[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	mov	edx, DWORD PTR -100[rbp]
	mov	ecx, edx
	sar	ecx, 2
	mov	edx, DWORD PTR -100[rbp]
	mov	esi, edx
	and	esi, 3
	shr	al, 4
	mov	edx, eax
	movsx	rsi, esi
	movsx	rax, ecx
	sal	rax, 2
	add	rax, rbp
	add	rax, rsi
	sub	rax, 96
	mov	BYTE PTR [rax], dl
	mov	eax, DWORD PTR -100[rbp]
	sar	eax
	movsx	rdx, eax
	mov	rax, QWORD PTR -128[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	mov	edx, DWORD PTR -100[rbp]
	mov	ecx, edx
	sar	ecx, 2
	mov	edx, DWORD PTR -100[rbp]
	mov	esi, edx
	and	esi, 3
	shr	al, 4
	mov	edx, eax
	movsx	rsi, esi
	movsx	rax, ecx
	sal	rax, 2
	add	rax, rbp
	add	rax, rsi
	sub	rax, 64
	mov	BYTE PTR [rax], dl
	mov	eax, DWORD PTR -132[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 127
	jle	.L131
	mov	eax, DWORD PTR -100[rbp]
	add	eax, 16
	sar	eax
	movsx	rdx, eax
	mov	rax, QWORD PTR -128[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	mov	edx, DWORD PTR -100[rbp]
	mov	ecx, edx
	sar	ecx, 2
	mov	edx, DWORD PTR -100[rbp]
	mov	esi, edx
	and	esi, 3
	shr	al, 4
	mov	edx, eax
	movsx	rsi, esi
	movsx	rax, ecx
	sal	rax, 2
	add	rax, rbp
	add	rax, rsi
	sub	rax, 48
	mov	BYTE PTR [rax], dl
.L131:
	mov	eax, DWORD PTR -132[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 191
	jle	.L130
	mov	eax, DWORD PTR -100[rbp]
	add	eax, 32
	sar	eax
	movsx	rdx, eax
	mov	rax, QWORD PTR -128[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	mov	edx, DWORD PTR -100[rbp]
	mov	ecx, edx
	sar	ecx, 2
	mov	edx, DWORD PTR -100[rbp]
	mov	esi, edx
	and	esi, 3
	shr	al, 4
	mov	edx, eax
	movsx	rsi, esi
	movsx	rax, ecx
	sal	rax, 2
	add	rax, rbp
	add	rax, rsi
	sub	rax, 32
	mov	BYTE PTR [rax], dl
	jmp	.L130
.L127:
	mov	eax, DWORD PTR -132[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 128
	jne	.L130
	mov	eax, DWORD PTR -100[rbp]
	movsx	rdx, eax
	mov	rax, QWORD PTR -120[rbp]
	add	rax, rdx
	mov	edx, DWORD PTR -100[rbp]
	mov	ecx, edx
	sar	ecx, 2
	mov	edx, DWORD PTR -100[rbp]
	and	edx, 3
	movzx	eax, BYTE PTR [rax]
	movsx	rsi, edx
	movsx	rdx, ecx
	sal	rdx, 2
	add	rdx, rbp
	add	rdx, rsi
	sub	rdx, 96
	mov	BYTE PTR [rdx], al
	mov	eax, DWORD PTR -100[rbp]
	movsx	rdx, eax
	mov	rax, QWORD PTR -128[rbp]
	add	rax, rdx
	mov	edx, DWORD PTR -100[rbp]
	mov	ecx, edx
	sar	ecx, 2
	mov	edx, DWORD PTR -100[rbp]
	and	edx, 3
	movzx	eax, BYTE PTR [rax]
	movsx	rsi, edx
	movsx	rdx, ecx
	sal	rdx, 2
	add	rdx, rbp
	add	rdx, rsi
	sub	rdx, 64
	mov	BYTE PTR [rdx], al
	mov	eax, DWORD PTR -132[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 255
	jle	.L132
	mov	eax, DWORD PTR -100[rbp]
	cdqe
	lea	rdx, 16[rax]
	mov	rax, QWORD PTR -128[rbp]
	add	rax, rdx
	mov	edx, DWORD PTR -100[rbp]
	mov	ecx, edx
	sar	ecx, 2
	mov	edx, DWORD PTR -100[rbp]
	and	edx, 3
	movzx	eax, BYTE PTR [rax]
	movsx	rsi, edx
	movsx	rdx, ecx
	sal	rdx, 2
	add	rdx, rbp
	add	rdx, rsi
	sub	rdx, 48
	mov	BYTE PTR [rdx], al
.L132:
	mov	eax, DWORD PTR -132[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 383
	jle	.L130
	mov	eax, DWORD PTR -100[rbp]
	cdqe
	lea	rdx, 32[rax]
	mov	rax, QWORD PTR -128[rbp]
	add	rax, rdx
	mov	edx, DWORD PTR -100[rbp]
	mov	ecx, edx
	sar	ecx, 2
	mov	edx, DWORD PTR -100[rbp]
	and	edx, 3
	movzx	eax, BYTE PTR [rax]
	movsx	rsi, edx
	movsx	rdx, ecx
	sal	rdx, 2
	add	rdx, rbp
	add	rdx, rsi
	sub	rdx, 32
	mov	BYTE PTR [rdx], al
.L130:
	add	DWORD PTR -100[rbp], 1
.L126:
	cmp	DWORD PTR -100[rbp], 15
	jle	.L133
	mov	eax, DWORD PTR -136[rbp]
	sub	eax, 1
	mov	DWORD PTR -100[rbp], eax
	jmp	.L134
.L135:
	mov	edx, DWORD PTR -132[rbp]
	lea	rcx, -64[rbp]
	lea	rax, -80[rbp]
	mov	rsi, rcx
	mov	rdi, rax
	call	AddKey
	sub	DWORD PTR -100[rbp], 1
.L134:
	cmp	DWORD PTR -100[rbp], 0
	jns	.L135
	mov	eax, DWORD PTR -136[rbp]
	sub	eax, 1
	mov	DWORD PTR -100[rbp], eax
	jmp	.L136
.L139:
	lea	rax, -96[rbp]
	mov	rdi, rax
	call	MixColumn_inv
	lea	rax, -96[rbp]
	mov	rdi, rax
	call	ShiftRows_inv
	mov	edx, DWORD PTR -132[rbp]
	lea	rcx, -64[rbp]
	lea	rax, -96[rbp]
	mov	rsi, rcx
	mov	rdi, rax
	call	AddKey_inv
	mov	edx, DWORD PTR -100[rbp]
	lea	rax, -96[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	AddConstants
	mov	eax, DWORD PTR -132[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 64
	jne	.L137
	lea	rax, -96[rbp]
	mov	rdi, rax
	call	SubCell4_inv
	jmp	.L138
.L137:
	lea	rax, -96[rbp]
	mov	rdi, rax
	call	SubCell8_inv
.L138:
	sub	DWORD PTR -100[rbp], 1
.L136:
	cmp	DWORD PTR -100[rbp], 0
	jns	.L139
	mov	eax, DWORD PTR -132[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 64
	jne	.L140
	mov	DWORD PTR -100[rbp], 0
	jmp	.L141
.L142:
	mov	eax, DWORD PTR -100[rbp]
	add	eax, eax
	sar	eax, 2
	mov	edx, eax
	mov	eax, DWORD PTR -100[rbp]
	add	eax, eax
	and	eax, 2
	movsx	rcx, eax
	movsx	rax, edx
	sal	rax, 2
	add	rax, rbp
	add	rax, rcx
	sub	rax, 96
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	eax, 4
	mov	esi, eax
	mov	eax, DWORD PTR -100[rbp]
	add	eax, eax
	add	eax, 1
	sar	eax, 2
	mov	edx, eax
	mov	eax, DWORD PTR -100[rbp]
	add	eax, eax
	add	eax, 1
	and	eax, 3
	movsx	rcx, eax
	movsx	rax, edx
	sal	rax, 2
	add	rax, rbp
	add	rax, rcx
	sub	rax, 96
	movzx	eax, BYTE PTR [rax]
	and	eax, 15
	mov	ecx, esi
	or	ecx, eax
	mov	eax, DWORD PTR -100[rbp]
	movsx	rdx, eax
	mov	rax, QWORD PTR -120[rbp]
	add	rax, rdx
	mov	edx, ecx
	mov	BYTE PTR [rax], dl
	add	DWORD PTR -100[rbp], 1
.L141:
	cmp	DWORD PTR -100[rbp], 7
	jle	.L142
	jmp	.L147
.L140:
	mov	eax, DWORD PTR -132[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 128
	jne	.L147
	mov	DWORD PTR -100[rbp], 0
	jmp	.L144
.L145:
	mov	eax, DWORD PTR -100[rbp]
	sar	eax, 2
	mov	ecx, eax
	mov	eax, DWORD PTR -100[rbp]
	and	eax, 3
	mov	esi, eax
	mov	eax, DWORD PTR -100[rbp]
	movsx	rdx, eax
	mov	rax, QWORD PTR -120[rbp]
	add	rdx, rax
	movsx	rsi, esi
	movsx	rax, ecx
	sal	rax, 2
	add	rax, rbp
	add	rax, rsi
	sub	rax, 96
	movzx	eax, BYTE PTR [rax]
	mov	BYTE PTR [rdx], al
	add	DWORD PTR -100[rbp], 1
.L144:
	cmp	DWORD PTR -100[rbp], 15
	jle	.L145
.L147:
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L146
	call	__stack_chk_fail@PLT
.L146:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE20:
	.size	dec, .-dec
	.globl	enc
	.type	enc, @function
enc:
.LFB21:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	add	rsp, -128
	mov	QWORD PTR -104[rbp], rdi
	mov	QWORD PTR -112[rbp], rsi
	mov	DWORD PTR -116[rbp], edx
	mov	DWORD PTR -120[rbp], ecx
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	lea	rax, -64[rbp]
	mov	edx, 48
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	DWORD PTR -84[rbp], 0
	jmp	.L149
.L156:
	mov	eax, DWORD PTR -116[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 64
	jne	.L150
	mov	eax, DWORD PTR -84[rbp]
	and	eax, 1
	test	eax, eax
	je	.L151
	mov	eax, DWORD PTR -84[rbp]
	sar	eax
	movsx	rdx, eax
	mov	rax, QWORD PTR -104[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	mov	edx, DWORD PTR -84[rbp]
	mov	ecx, edx
	sar	ecx, 2
	mov	edx, DWORD PTR -84[rbp]
	mov	esi, edx
	and	esi, 3
	and	eax, 15
	mov	edx, eax
	movsx	rsi, esi
	movsx	rax, ecx
	sal	rax, 2
	add	rax, rbp
	add	rax, rsi
	sub	rax, 80
	mov	BYTE PTR [rax], dl
	mov	eax, DWORD PTR -84[rbp]
	sar	eax
	movsx	rdx, eax
	mov	rax, QWORD PTR -112[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	mov	edx, DWORD PTR -84[rbp]
	mov	ecx, edx
	sar	ecx, 2
	mov	edx, DWORD PTR -84[rbp]
	mov	esi, edx
	and	esi, 3
	and	eax, 15
	mov	edx, eax
	movsx	rsi, esi
	movsx	rax, ecx
	sal	rax, 2
	add	rax, rbp
	add	rax, rsi
	sub	rax, 64
	mov	BYTE PTR [rax], dl
	mov	eax, DWORD PTR -116[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 127
	jle	.L152
	mov	eax, DWORD PTR -84[rbp]
	add	eax, 16
	sar	eax
	movsx	rdx, eax
	mov	rax, QWORD PTR -112[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	mov	edx, DWORD PTR -84[rbp]
	mov	ecx, edx
	sar	ecx, 2
	mov	edx, DWORD PTR -84[rbp]
	mov	esi, edx
	and	esi, 3
	and	eax, 15
	mov	edx, eax
	movsx	rsi, esi
	movsx	rax, ecx
	sal	rax, 2
	add	rax, rbp
	add	rax, rsi
	sub	rax, 48
	mov	BYTE PTR [rax], dl
.L152:
	mov	eax, DWORD PTR -116[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 191
	jle	.L153
	mov	eax, DWORD PTR -84[rbp]
	add	eax, 32
	sar	eax
	movsx	rdx, eax
	mov	rax, QWORD PTR -112[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	mov	edx, DWORD PTR -84[rbp]
	mov	ecx, edx
	sar	ecx, 2
	mov	edx, DWORD PTR -84[rbp]
	mov	esi, edx
	and	esi, 3
	and	eax, 15
	mov	edx, eax
	movsx	rsi, esi
	movsx	rax, ecx
	sal	rax, 2
	add	rax, rbp
	add	rax, rsi
	sub	rax, 32
	mov	BYTE PTR [rax], dl
	jmp	.L153
.L151:
	mov	eax, DWORD PTR -84[rbp]
	sar	eax
	movsx	rdx, eax
	mov	rax, QWORD PTR -104[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	mov	edx, DWORD PTR -84[rbp]
	mov	ecx, edx
	sar	ecx, 2
	mov	edx, DWORD PTR -84[rbp]
	mov	esi, edx
	and	esi, 3
	shr	al, 4
	mov	edx, eax
	movsx	rsi, esi
	movsx	rax, ecx
	sal	rax, 2
	add	rax, rbp
	add	rax, rsi
	sub	rax, 80
	mov	BYTE PTR [rax], dl
	mov	eax, DWORD PTR -84[rbp]
	sar	eax
	movsx	rdx, eax
	mov	rax, QWORD PTR -112[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	mov	edx, DWORD PTR -84[rbp]
	mov	ecx, edx
	sar	ecx, 2
	mov	edx, DWORD PTR -84[rbp]
	mov	esi, edx
	and	esi, 3
	shr	al, 4
	mov	edx, eax
	movsx	rsi, esi
	movsx	rax, ecx
	sal	rax, 2
	add	rax, rbp
	add	rax, rsi
	sub	rax, 64
	mov	BYTE PTR [rax], dl
	mov	eax, DWORD PTR -116[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 127
	jle	.L154
	mov	eax, DWORD PTR -84[rbp]
	add	eax, 16
	sar	eax
	movsx	rdx, eax
	mov	rax, QWORD PTR -112[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	mov	edx, DWORD PTR -84[rbp]
	mov	ecx, edx
	sar	ecx, 2
	mov	edx, DWORD PTR -84[rbp]
	mov	esi, edx
	and	esi, 3
	shr	al, 4
	mov	edx, eax
	movsx	rsi, esi
	movsx	rax, ecx
	sal	rax, 2
	add	rax, rbp
	add	rax, rsi
	sub	rax, 48
	mov	BYTE PTR [rax], dl
.L154:
	mov	eax, DWORD PTR -116[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 191
	jle	.L153
	mov	eax, DWORD PTR -84[rbp]
	add	eax, 32
	sar	eax
	movsx	rdx, eax
	mov	rax, QWORD PTR -112[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	mov	edx, DWORD PTR -84[rbp]
	mov	ecx, edx
	sar	ecx, 2
	mov	edx, DWORD PTR -84[rbp]
	mov	esi, edx
	and	esi, 3
	shr	al, 4
	mov	edx, eax
	movsx	rsi, esi
	movsx	rax, ecx
	sal	rax, 2
	add	rax, rbp
	add	rax, rsi
	sub	rax, 32
	mov	BYTE PTR [rax], dl
	jmp	.L153
.L150:
	mov	eax, DWORD PTR -116[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 128
	jne	.L153
	mov	eax, DWORD PTR -84[rbp]
	movsx	rdx, eax
	mov	rax, QWORD PTR -104[rbp]
	add	rax, rdx
	mov	edx, DWORD PTR -84[rbp]
	mov	ecx, edx
	sar	ecx, 2
	mov	edx, DWORD PTR -84[rbp]
	and	edx, 3
	movzx	eax, BYTE PTR [rax]
	movsx	rsi, edx
	movsx	rdx, ecx
	sal	rdx, 2
	add	rdx, rbp
	add	rdx, rsi
	sub	rdx, 80
	mov	BYTE PTR [rdx], al
	mov	eax, DWORD PTR -84[rbp]
	movsx	rdx, eax
	mov	rax, QWORD PTR -112[rbp]
	add	rax, rdx
	mov	edx, DWORD PTR -84[rbp]
	mov	ecx, edx
	sar	ecx, 2
	mov	edx, DWORD PTR -84[rbp]
	and	edx, 3
	movzx	eax, BYTE PTR [rax]
	movsx	rsi, edx
	movsx	rdx, ecx
	sal	rdx, 2
	add	rdx, rbp
	add	rdx, rsi
	sub	rdx, 64
	mov	BYTE PTR [rdx], al
	mov	eax, DWORD PTR -116[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 255
	jle	.L155
	mov	eax, DWORD PTR -84[rbp]
	cdqe
	lea	rdx, 16[rax]
	mov	rax, QWORD PTR -112[rbp]
	add	rax, rdx
	mov	edx, DWORD PTR -84[rbp]
	mov	ecx, edx
	sar	ecx, 2
	mov	edx, DWORD PTR -84[rbp]
	and	edx, 3
	movzx	eax, BYTE PTR [rax]
	movsx	rsi, edx
	movsx	rdx, ecx
	sal	rdx, 2
	add	rdx, rbp
	add	rdx, rsi
	sub	rdx, 48
	mov	BYTE PTR [rdx], al
.L155:
	mov	eax, DWORD PTR -116[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 383
	jle	.L153
	mov	eax, DWORD PTR -84[rbp]
	cdqe
	lea	rdx, 32[rax]
	mov	rax, QWORD PTR -112[rbp]
	add	rax, rdx
	mov	edx, DWORD PTR -84[rbp]
	mov	ecx, edx
	sar	ecx, 2
	mov	edx, DWORD PTR -84[rbp]
	and	edx, 3
	movzx	eax, BYTE PTR [rax]
	movsx	rsi, edx
	movsx	rdx, ecx
	sal	rdx, 2
	add	rdx, rbp
	add	rdx, rsi
	sub	rdx, 32
	mov	BYTE PTR [rdx], al
.L153:
	add	DWORD PTR -84[rbp], 1
.L149:
	cmp	DWORD PTR -84[rbp], 15
	jle	.L156
	mov	DWORD PTR -84[rbp], 0
	jmp	.L157
.L160:
	mov	eax, DWORD PTR -116[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 64
	jne	.L158
	lea	rax, -80[rbp]
	mov	rdi, rax
	call	SubCell4
	jmp	.L159
.L158:
	lea	rax, -80[rbp]
	mov	rdi, rax
	call	SubCell8
.L159:
	mov	edx, DWORD PTR -84[rbp]
	lea	rax, -80[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	AddConstants
	mov	edx, DWORD PTR -116[rbp]
	lea	rcx, -64[rbp]
	lea	rax, -80[rbp]
	mov	rsi, rcx
	mov	rdi, rax
	call	AddKey
	lea	rax, -80[rbp]
	mov	rdi, rax
	call	ShiftRows
	lea	rax, -80[rbp]
	mov	rdi, rax
	call	MixColumn
	add	DWORD PTR -84[rbp], 1
.L157:
	mov	eax, DWORD PTR -84[rbp]
	cmp	eax, DWORD PTR -120[rbp]
	jl	.L160
	mov	eax, DWORD PTR -116[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 64
	jne	.L161
	mov	DWORD PTR -84[rbp], 0
	jmp	.L162
.L163:
	mov	eax, DWORD PTR -84[rbp]
	add	eax, eax
	sar	eax, 2
	mov	edx, eax
	mov	eax, DWORD PTR -84[rbp]
	add	eax, eax
	and	eax, 2
	movsx	rcx, eax
	movsx	rax, edx
	sal	rax, 2
	add	rax, rbp
	add	rax, rcx
	sub	rax, 80
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	eax, 4
	mov	esi, eax
	mov	eax, DWORD PTR -84[rbp]
	add	eax, eax
	add	eax, 1
	sar	eax, 2
	mov	edx, eax
	mov	eax, DWORD PTR -84[rbp]
	add	eax, eax
	add	eax, 1
	and	eax, 3
	movsx	rcx, eax
	movsx	rax, edx
	sal	rax, 2
	add	rax, rbp
	add	rax, rcx
	sub	rax, 80
	movzx	eax, BYTE PTR [rax]
	and	eax, 15
	mov	ecx, esi
	or	ecx, eax
	mov	eax, DWORD PTR -84[rbp]
	movsx	rdx, eax
	mov	rax, QWORD PTR -104[rbp]
	add	rax, rdx
	mov	edx, ecx
	mov	BYTE PTR [rax], dl
	add	DWORD PTR -84[rbp], 1
.L162:
	cmp	DWORD PTR -84[rbp], 7
	jle	.L163
	jmp	.L168
.L161:
	mov	eax, DWORD PTR -116[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 128
	jne	.L168
	mov	DWORD PTR -84[rbp], 0
	jmp	.L165
.L166:
	mov	eax, DWORD PTR -84[rbp]
	sar	eax, 2
	mov	ecx, eax
	mov	eax, DWORD PTR -84[rbp]
	and	eax, 3
	mov	esi, eax
	mov	eax, DWORD PTR -84[rbp]
	movsx	rdx, eax
	mov	rax, QWORD PTR -104[rbp]
	add	rdx, rax
	movsx	rsi, esi
	movsx	rax, ecx
	sal	rax, 2
	add	rax, rbp
	add	rax, rsi
	sub	rax, 80
	movzx	eax, BYTE PTR [rax]
	mov	BYTE PTR [rdx], al
	add	DWORD PTR -84[rbp], 1
.L165:
	cmp	DWORD PTR -84[rbp], 15
	jle	.L166
.L168:
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L167
	call	__stack_chk_fail@PLT
.L167:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE21:
	.size	enc, .-enc
	.section	.rodata
.LC4:
	.string	"TK = "
.LC5:
	.string	"P =  "
.LC6:
	.string	"C =  "
.LC7:
	.string	"P' = "
.LC8:
	.string	"\n\n"
	.text
	.globl	TestVectors
	.type	TestVectors, @function
TestVectors:
.LFB22:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	add	rsp, -128
	mov	DWORD PTR -116[rbp], edi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -104[rbp], 1
	jmp	.L170
.L185:
	mov	DWORD PTR -100[rbp], 0
	jmp	.L171
.L172:
	call	rand@PLT
	mov	edx, eax
	mov	eax, DWORD PTR -100[rbp]
	cdqe
	mov	BYTE PTR -96[rbp+rax], dl
	mov	eax, DWORD PTR -100[rbp]
	cdqe
	movzx	edx, BYTE PTR -96[rbp+rax]
	mov	eax, DWORD PTR -100[rbp]
	cdqe
	mov	BYTE PTR -80[rbp+rax], dl
	add	DWORD PTR -100[rbp], 1
.L171:
	mov	eax, DWORD PTR -116[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	eax, DWORD PTR [rdx+rax]
	sar	eax, 3
	cmp	DWORD PTR -100[rbp], eax
	jl	.L172
	mov	DWORD PTR -100[rbp], 0
	jmp	.L173
.L174:
	mov	eax, DWORD PTR -100[rbp]
	cdqe
	movzx	eax, BYTE PTR -96[rbp+rax]
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC1[rip]
	mov	eax, 0
	call	printf@PLT
	add	DWORD PTR -100[rbp], 1
.L173:
	mov	eax, DWORD PTR -116[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	eax, DWORD PTR [rdx+rax]
	sar	eax, 3
	cmp	DWORD PTR -100[rbp], eax
	jl	.L174
	mov	edi, 10
	call	putchar@PLT
	mov	DWORD PTR -100[rbp], 0
	jmp	.L175
.L176:
	call	rand@PLT
	mov	edx, eax
	mov	eax, DWORD PTR -100[rbp]
	cdqe
	mov	BYTE PTR -64[rbp+rax], dl
	add	DWORD PTR -100[rbp], 1
.L175:
	mov	eax, DWORD PTR -116[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sar	eax, 3
	cmp	DWORD PTR -100[rbp], eax
	jl	.L176
	mov	rax, QWORD PTR fic[rip]
	mov	rcx, rax
	mov	edx, 5
	mov	esi, 1
	lea	rdi, .LC4[rip]
	call	fwrite@PLT
	mov	DWORD PTR -100[rbp], 0
	jmp	.L177
.L178:
	mov	eax, DWORD PTR -100[rbp]
	cdqe
	movzx	eax, BYTE PTR -64[rbp+rax]
	movzx	edx, al
	mov	rax, QWORD PTR fic[rip]
	lea	rsi, .LC1[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	add	DWORD PTR -100[rbp], 1
.L177:
	mov	eax, DWORD PTR -116[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sar	eax, 3
	cmp	DWORD PTR -100[rbp], eax
	jl	.L178
	mov	rax, QWORD PTR fic[rip]
	mov	rsi, rax
	mov	edi, 10
	call	fputc@PLT
	mov	rax, QWORD PTR fic[rip]
	mov	rcx, rax
	mov	edx, 5
	mov	esi, 1
	lea	rdi, .LC5[rip]
	call	fwrite@PLT
	mov	DWORD PTR -100[rbp], 0
	jmp	.L179
.L180:
	mov	eax, DWORD PTR -100[rbp]
	cdqe
	movzx	eax, BYTE PTR -96[rbp+rax]
	movzx	edx, al
	mov	rax, QWORD PTR fic[rip]
	lea	rsi, .LC1[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	add	DWORD PTR -100[rbp], 1
.L179:
	mov	eax, DWORD PTR -116[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	eax, DWORD PTR [rdx+rax]
	sar	eax, 3
	cmp	DWORD PTR -100[rbp], eax
	jl	.L180
	mov	rax, QWORD PTR fic[rip]
	mov	rsi, rax
	mov	edi, 10
	call	fputc@PLT
	mov	edx, DWORD PTR -116[rbp]
	lea	rsi, -64[rbp]
	lea	rax, -80[rbp]
	mov	ecx, 10
	mov	rdi, rax
	call	enc
	mov	rax, QWORD PTR fic[rip]
	mov	rcx, rax
	mov	edx, 5
	mov	esi, 1
	lea	rdi, .LC6[rip]
	call	fwrite@PLT
	mov	DWORD PTR -100[rbp], 0
	jmp	.L181
.L182:
	mov	eax, DWORD PTR -100[rbp]
	cdqe
	movzx	eax, BYTE PTR -80[rbp+rax]
	movzx	edx, al
	mov	rax, QWORD PTR fic[rip]
	lea	rsi, .LC1[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	add	DWORD PTR -100[rbp], 1
.L181:
	mov	eax, DWORD PTR -116[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	eax, DWORD PTR [rdx+rax]
	sar	eax, 3
	cmp	DWORD PTR -100[rbp], eax
	jl	.L182
	mov	rax, QWORD PTR fic[rip]
	mov	rsi, rax
	mov	edi, 10
	call	fputc@PLT
	mov	edx, DWORD PTR -116[rbp]
	lea	rsi, -64[rbp]
	lea	rax, -80[rbp]
	mov	ecx, 10
	mov	rdi, rax
	call	dec
	mov	rax, QWORD PTR fic[rip]
	mov	rcx, rax
	mov	edx, 5
	mov	esi, 1
	lea	rdi, .LC7[rip]
	call	fwrite@PLT
	mov	DWORD PTR -100[rbp], 0
	jmp	.L183
.L184:
	mov	eax, DWORD PTR -100[rbp]
	cdqe
	movzx	eax, BYTE PTR -80[rbp+rax]
	movzx	edx, al
	mov	rax, QWORD PTR fic[rip]
	lea	rsi, .LC1[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	add	DWORD PTR -100[rbp], 1
.L183:
	mov	eax, DWORD PTR -116[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	eax, DWORD PTR [rdx+rax]
	sar	eax, 3
	cmp	DWORD PTR -100[rbp], eax
	jl	.L184
	mov	rax, QWORD PTR fic[rip]
	mov	rcx, rax
	mov	edx, 2
	mov	esi, 1
	lea	rdi, .LC8[rip]
	call	fwrite@PLT
	add	DWORD PTR -104[rbp], 1
.L170:
	cmp	DWORD PTR -104[rbp], 9
	jle	.L185
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L186
	call	__stack_chk_fail@PLT
.L186:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE22:
	.size	TestVectors, .-TestVectors
	.globl	boomerang
	.type	boomerang, @function
boomerang:
.LFB23:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 336
	mov	DWORD PTR -292[rbp], edi
	mov	DWORD PTR -296[rbp], esi
	mov	DWORD PTR -300[rbp], edx
	mov	QWORD PTR -312[rbp], rcx
	mov	QWORD PTR -320[rbp], r8
	mov	QWORD PTR -328[rbp], r9
	mov	rax, QWORD PTR 16[rbp]
	mov	QWORD PTR -336[rbp], rax
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -284[rbp], 0
	jmp	.L188
.L189:
	call	rand@PLT
	mov	edx, eax
	mov	eax, DWORD PTR -284[rbp]
	cdqe
	mov	BYTE PTR -208[rbp+rax], dl
	add	DWORD PTR -284[rbp], 1
.L188:
	mov	eax, DWORD PTR -296[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sar	eax, 3
	cmp	DWORD PTR -284[rbp], eax
	jl	.L189
	mov	DWORD PTR -284[rbp], 0
	jmp	.L190
.L191:
	mov	eax, DWORD PTR -284[rbp]
	cdqe
	movzx	edx, BYTE PTR -208[rbp+rax]
	mov	eax, DWORD PTR -284[rbp]
	movsx	rcx, eax
	mov	rax, QWORD PTR -328[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	xor	edx, eax
	mov	eax, DWORD PTR -284[rbp]
	cdqe
	mov	BYTE PTR -160[rbp+rax], dl
	add	DWORD PTR -284[rbp], 1
.L190:
	mov	eax, DWORD PTR -296[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sar	eax, 3
	cmp	DWORD PTR -284[rbp], eax
	jl	.L191
	mov	DWORD PTR -284[rbp], 0
	jmp	.L192
.L193:
	mov	eax, DWORD PTR -284[rbp]
	cdqe
	movzx	edx, BYTE PTR -208[rbp+rax]
	mov	eax, DWORD PTR -284[rbp]
	movsx	rcx, eax
	mov	rax, QWORD PTR -336[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	xor	edx, eax
	mov	eax, DWORD PTR -284[rbp]
	cdqe
	mov	BYTE PTR -112[rbp+rax], dl
	add	DWORD PTR -284[rbp], 1
.L192:
	mov	eax, DWORD PTR -296[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sar	eax, 3
	cmp	DWORD PTR -284[rbp], eax
	jl	.L193
	mov	DWORD PTR -284[rbp], 0
	jmp	.L194
.L195:
	mov	eax, DWORD PTR -284[rbp]
	cdqe
	movzx	edx, BYTE PTR -160[rbp+rax]
	mov	eax, DWORD PTR -284[rbp]
	movsx	rcx, eax
	mov	rax, QWORD PTR -336[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	xor	edx, eax
	mov	eax, DWORD PTR -284[rbp]
	cdqe
	mov	BYTE PTR -64[rbp+rax], dl
	add	DWORD PTR -284[rbp], 1
.L194:
	mov	eax, DWORD PTR -296[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sar	eax, 3
	cmp	DWORD PTR -284[rbp], eax
	jl	.L195
	mov	DWORD PTR -280[rbp], 0
	mov	DWORD PTR -276[rbp], 0
	jmp	.L196
.L209:
	mov	DWORD PTR -284[rbp], 0
	jmp	.L197
.L198:
	call	rand@PLT
	mov	edx, eax
	mov	eax, DWORD PTR -284[rbp]
	cdqe
	movzx	eax, BYTE PTR -240[rbp+rax]
	xor	eax, edx
	mov	edx, eax
	mov	eax, DWORD PTR -284[rbp]
	cdqe
	mov	BYTE PTR -272[rbp+rax], dl
	add	DWORD PTR -284[rbp], 1
.L197:
	mov	eax, DWORD PTR -296[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	eax, DWORD PTR [rdx+rax]
	sar	eax, 3
	cmp	DWORD PTR -284[rbp], eax
	jl	.L198
	mov	DWORD PTR -284[rbp], 0
	jmp	.L199
.L200:
	mov	eax, DWORD PTR -284[rbp]
	cdqe
	movzx	edx, BYTE PTR -272[rbp+rax]
	mov	eax, DWORD PTR -284[rbp]
	movsx	rcx, eax
	mov	rax, QWORD PTR -312[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	xor	edx, eax
	mov	eax, DWORD PTR -284[rbp]
	cdqe
	mov	BYTE PTR -256[rbp+rax], dl
	add	DWORD PTR -284[rbp], 1
.L199:
	mov	eax, DWORD PTR -296[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	eax, DWORD PTR [rdx+rax]
	sar	eax, 3
	cmp	DWORD PTR -284[rbp], eax
	jl	.L200
	mov	ecx, DWORD PTR -292[rbp]
	mov	edx, DWORD PTR -296[rbp]
	lea	rsi, -208[rbp]
	lea	rax, -272[rbp]
	mov	rdi, rax
	call	enc
	mov	ecx, DWORD PTR -292[rbp]
	mov	edx, DWORD PTR -296[rbp]
	lea	rsi, -160[rbp]
	lea	rax, -256[rbp]
	mov	rdi, rax
	call	enc
	mov	DWORD PTR -284[rbp], 0
	jmp	.L201
.L202:
	mov	eax, DWORD PTR -284[rbp]
	cdqe
	movzx	edx, BYTE PTR -272[rbp+rax]
	mov	eax, DWORD PTR -284[rbp]
	movsx	rcx, eax
	mov	rax, QWORD PTR -320[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	xor	edx, eax
	mov	eax, DWORD PTR -284[rbp]
	cdqe
	mov	BYTE PTR -240[rbp+rax], dl
	add	DWORD PTR -284[rbp], 1
.L201:
	mov	eax, DWORD PTR -296[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	eax, DWORD PTR [rdx+rax]
	sar	eax, 3
	cmp	DWORD PTR -284[rbp], eax
	jl	.L202
	mov	DWORD PTR -284[rbp], 0
	jmp	.L203
.L204:
	mov	eax, DWORD PTR -284[rbp]
	cdqe
	movzx	edx, BYTE PTR -256[rbp+rax]
	mov	eax, DWORD PTR -284[rbp]
	movsx	rcx, eax
	mov	rax, QWORD PTR -320[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	xor	edx, eax
	mov	eax, DWORD PTR -284[rbp]
	cdqe
	mov	BYTE PTR -224[rbp+rax], dl
	add	DWORD PTR -284[rbp], 1
.L203:
	mov	eax, DWORD PTR -296[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	eax, DWORD PTR [rdx+rax]
	sar	eax, 3
	cmp	DWORD PTR -284[rbp], eax
	jl	.L204
	mov	ecx, DWORD PTR -292[rbp]
	mov	edx, DWORD PTR -296[rbp]
	lea	rsi, -112[rbp]
	lea	rax, -240[rbp]
	mov	rdi, rax
	call	dec
	mov	ecx, DWORD PTR -292[rbp]
	mov	edx, DWORD PTR -296[rbp]
	lea	rsi, -64[rbp]
	lea	rax, -224[rbp]
	mov	rdi, rax
	call	dec
	mov	BYTE PTR -285[rbp], 1
	mov	DWORD PTR -284[rbp], 0
	jmp	.L205
.L207:
	mov	eax, DWORD PTR -284[rbp]
	cdqe
	movzx	edx, BYTE PTR -240[rbp+rax]
	mov	eax, DWORD PTR -284[rbp]
	cdqe
	movzx	eax, BYTE PTR -224[rbp+rax]
	xor	edx, eax
	mov	eax, DWORD PTR -284[rbp]
	movsx	rcx, eax
	mov	rax, QWORD PTR -312[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	cmp	dl, al
	je	.L206
	mov	BYTE PTR -285[rbp], 0
.L206:
	add	DWORD PTR -284[rbp], 1
.L205:
	mov	eax, DWORD PTR -296[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	eax, DWORD PTR [rdx+rax]
	sar	eax, 3
	cmp	DWORD PTR -284[rbp], eax
	jl	.L207
	cmp	BYTE PTR -285[rbp], 0
	je	.L208
	add	DWORD PTR -280[rbp], 1
.L208:
	add	DWORD PTR -276[rbp], 1
.L196:
	mov	eax, DWORD PTR -276[rbp]
	cmp	eax, DWORD PTR -300[rbp]
	jl	.L209
	mov	eax, DWORD PTR -280[rbp]
	mov	rdi, QWORD PTR -8[rbp]
	sub	rdi, QWORD PTR fs:40
	je	.L211
	call	__stack_chk_fail@PLT
.L211:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE23:
	.size	boomerang, .-boomerang
	.section	.rodata
.LC9:
	.string	"#Rounds: %d rounds\n"
	.align 8
.LC11:
	.string	"#Total Queries = (#Parallel threads) * (#Bunches per thread) * (#Queries per bunch) = %d * %d * %d = 2^(%f)\n"
.LC13:
	.string	"time on clock"
.LC14:
	.string	"%s: %0.4f\n"
.LC15:
	.string	"time on wall"
.LC18:
	.string	"sum = %f\n"
.LC19:
	.string	"2^(-%f)\n\n"
.LC20:
	.string	"##########################"
	.text
	.globl	send_boomerangs
	.type	send_boomerangs, @function
send_boomerangs:
.LFB24:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r13
	push	r12
	push	rbx
	sub	rsp, 152
	.cfi_offset 13, -24
	.cfi_offset 12, -32
	.cfi_offset 3, -40
	mov	DWORD PTR -116[rbp], edi
	mov	DWORD PTR -120[rbp], esi
	mov	DWORD PTR -124[rbp], edx
	mov	DWORD PTR -128[rbp], ecx
	mov	DWORD PTR -132[rbp], r8d
	mov	QWORD PTR -144[rbp], r9
	mov	rax, QWORD PTR 16[rbp]
	mov	QWORD PTR -152[rbp], rax
	mov	rax, QWORD PTR 24[rbp]
	mov	QWORD PTR -160[rbp], rax
	mov	rax, QWORD PTR 32[rbp]
	mov	QWORD PTR -168[rbp], rax
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -40[rbp], rax
	xor	eax, eax
	mov	rax, rsp
	mov	rbx, rax
	mov	eax, DWORD PTR -124[rbp]
	movsx	rdx, eax
	sub	rdx, 1
	mov	QWORD PTR -80[rbp], rdx
	movsx	rdx, eax
	mov	r12, rdx
	mov	r13d, 0
	movsx	rdx, eax
	mov	r10, rdx
	mov	r11d, 0
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	eax, 16
	sub	rax, 1
	add	rax, rdx
	mov	esi, 16
	mov	edx, 0
	div	rsi
	imul	rax, rax, 16
	mov	rcx, rax
	and	rcx, -4096
	mov	rdx, rsp
	sub	rdx, rcx
.L213:
	cmp	rsp, rdx
	je	.L214
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	jmp	.L213
.L214:
	mov	rdx, rax
	and	edx, 4095
	sub	rsp, rdx
	mov	rdx, rax
	and	edx, 4095
	test	rdx, rdx
	je	.L215
	and	eax, 4095
	sub	rax, 8
	add	rax, rsp
	or	QWORD PTR [rax], 0
.L215:
	mov	rax, rsp
	add	rax, 3
	shr	rax, 2
	sal	rax, 2
	mov	QWORD PTR -72[rbp], rax
	mov	eax, DWORD PTR -116[rbp]
	mov	esi, eax
	lea	rdi, .LC9[rip]
	mov	eax, 0
	call	printf@PLT
	mov	eax, DWORD PTR -124[rbp]
	imul	eax, DWORD PTR -128[rbp]
	imul	eax, DWORD PTR -132[rbp]
	pxor	xmm5, xmm5
	cvtsi2sd	xmm5, eax
	movq	rax, xmm5
	movq	xmm0, rax
	call	log@PLT
	movq	rax, xmm0
	movsd	xmm0, QWORD PTR .LC10[rip]
	movq	xmm2, rax
	divsd	xmm2, xmm0
	movq	rsi, xmm2
	mov	ecx, DWORD PTR -132[rbp]
	mov	edx, DWORD PTR -128[rbp]
	mov	eax, DWORD PTR -124[rbp]
	movq	xmm0, rsi
	mov	esi, eax
	lea	rdi, .LC11[rip]
	mov	eax, 1
	call	printf@PLT
	call	clock@PLT
	mov	QWORD PTR -64[rbp], rax
	call	omp_get_wtime@PLT
	movq	rax, xmm0
	mov	QWORD PTR -56[rbp], rax
	mov	eax, DWORD PTR -124[rbp]
	mov	edi, eax
	call	omp_set_num_threads@PLT
	mov	DWORD PTR -96[rbp], 0
	jmp	.L216
.L219:
	mov	DWORD PTR -100[rbp], 0
	call	omp_get_thread_num@PLT
	mov	DWORD PTR -92[rbp], eax
	mov	eax, DWORD PTR -92[rbp]
	mov	edi, eax
	call	init_prng
	mov	DWORD PTR -104[rbp], 0
	jmp	.L217
.L218:
	mov	r8, QWORD PTR -160[rbp]
	mov	rdi, QWORD PTR -152[rbp]
	mov	rcx, QWORD PTR -144[rbp]
	mov	edx, DWORD PTR -132[rbp]
	mov	esi, DWORD PTR -120[rbp]
	mov	eax, DWORD PTR -116[rbp]
	sub	rsp, 8
	push	QWORD PTR -168[rbp]
	mov	r9, r8
	mov	r8, rdi
	mov	edi, eax
	call	boomerang
	add	rsp, 16
	add	DWORD PTR -100[rbp], eax
	add	DWORD PTR -104[rbp], 1
.L217:
	mov	eax, DWORD PTR -104[rbp]
	cmp	eax, DWORD PTR -128[rbp]
	jl	.L218
	mov	rax, QWORD PTR -72[rbp]
	mov	edx, DWORD PTR -92[rbp]
	movsx	rdx, edx
	mov	ecx, DWORD PTR -100[rbp]
	mov	DWORD PTR [rax+rdx*4], ecx
	add	DWORD PTR -96[rbp], 1
.L216:
	mov	eax, DWORD PTR -96[rbp]
	cmp	eax, DWORD PTR -124[rbp]
	jl	.L219
	call	clock@PLT
	sub	rax, QWORD PTR -64[rbp]
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rax
	movsd	xmm1, QWORD PTR .LC12[rip]
	divsd	xmm0, xmm1
	movq	rax, xmm0
	movq	xmm0, rax
	lea	rsi, .LC13[rip]
	lea	rdi, .LC14[rip]
	mov	eax, 1
	call	printf@PLT
	call	omp_get_wtime@PLT
	movq	rax, xmm0
	movq	xmm3, rax
	subsd	xmm3, QWORD PTR -56[rbp]
	movq	rax, xmm3
	movq	xmm0, rax
	lea	rsi, .LC15[rip]
	lea	rdi, .LC14[rip]
	mov	eax, 1
	call	printf@PLT
	pxor	xmm0, xmm0
	movsd	QWORD PTR -88[rbp], xmm0
	movsd	xmm0, QWORD PTR .LC17[rip]
	movsd	QWORD PTR -48[rbp], xmm0
	mov	DWORD PTR -108[rbp], 0
	jmp	.L220
.L221:
	mov	rax, QWORD PTR -72[rbp]
	mov	edx, DWORD PTR -108[rbp]
	movsx	rdx, edx
	mov	eax, DWORD PTR [rax+rdx*4]
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, eax
	movsd	xmm1, QWORD PTR -88[rbp]
	addsd	xmm0, xmm1
	movsd	QWORD PTR -88[rbp], xmm0
	add	DWORD PTR -108[rbp], 1
.L220:
	mov	eax, DWORD PTR -108[rbp]
	cmp	eax, DWORD PTR -124[rbp]
	jl	.L221
	mov	rax, QWORD PTR -88[rbp]
	movq	xmm0, rax
	lea	rdi, .LC18[rip]
	mov	eax, 1
	call	printf@PLT
	mov	eax, DWORD PTR -124[rbp]
	imul	eax, DWORD PTR -128[rbp]
	imul	eax, DWORD PTR -132[rbp]
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, eax
	divsd	xmm0, QWORD PTR -88[rbp]
	movsd	QWORD PTR -48[rbp], xmm0
	mov	rax, QWORD PTR -48[rbp]
	movq	xmm0, rax
	call	log@PLT
	movq	rax, xmm0
	movsd	xmm0, QWORD PTR .LC10[rip]
	movq	xmm4, rax
	divsd	xmm4, xmm0
	movq	rax, xmm4
	movq	xmm0, rax
	lea	rdi, .LC19[rip]
	mov	eax, 1
	call	printf@PLT
	lea	rdi, .LC20[rip]
	call	puts@PLT
	movsd	xmm0, QWORD PTR -88[rbp]
	mov	rsp, rbx
	movq	rax, xmm0
	mov	rbx, QWORD PTR -40[rbp]
	sub	rbx, QWORD PTR fs:40
	je	.L223
	call	__stack_chk_fail@PLT
.L223:
	movq	xmm0, rax
	lea	rsp, -24[rbp]
	pop	rbx
	pop	r12
	pop	r13
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE24:
	.size	send_boomerangs, .-send_boomerangs
	.globl	convert_hexstr_to_statearray
	.type	convert_hexstr_to_statearray, @function
convert_hexstr_to_statearray:
.LFB25:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	DWORD PTR -20[rbp], edi
	mov	QWORD PTR -32[rbp], rsi
	mov	QWORD PTR -40[rbp], rdx
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -16[rbp], 0
	jmp	.L225
.L226:
	mov	eax, DWORD PTR -16[rbp]
	add	eax, eax
	movsx	rdx, eax
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	mov	BYTE PTR -10[rbp], al
	mov	eax, DWORD PTR -16[rbp]
	add	eax, eax
	cdqe
	lea	rdx, 1[rax]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	mov	BYTE PTR -9[rbp], al
	lea	rax, -10[rbp]
	mov	edx, 16
	mov	esi, 0
	mov	rdi, rax
	call	strtol@PLT
	mov	rdx, rax
	mov	eax, DWORD PTR -16[rbp]
	movsx	rcx, eax
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rcx
	mov	BYTE PTR [rax], dl
	add	DWORD PTR -16[rbp], 1
.L225:
	mov	eax, DWORD PTR -20[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip]
	mov	eax, DWORD PTR [rdx+rax]
	sar	eax, 3
	cmp	DWORD PTR -16[rbp], eax
	jl	.L226
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L227
	call	__stack_chk_fail@PLT
.L227:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE25:
	.size	convert_hexstr_to_statearray, .-convert_hexstr_to_statearray
	.globl	convert_hexstr_to_tweakarray
	.type	convert_hexstr_to_tweakarray, @function
convert_hexstr_to_tweakarray:
.LFB26:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	DWORD PTR -20[rbp], edi
	mov	QWORD PTR -32[rbp], rsi
	mov	QWORD PTR -40[rbp], rdx
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -16[rbp], 0
	jmp	.L229
.L230:
	mov	eax, DWORD PTR -16[rbp]
	add	eax, eax
	movsx	rdx, eax
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	mov	BYTE PTR -10[rbp], al
	mov	eax, DWORD PTR -16[rbp]
	add	eax, eax
	cdqe
	lea	rdx, 1[rax]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	mov	BYTE PTR -9[rbp], al
	lea	rax, -10[rbp]
	mov	edx, 16
	mov	esi, 0
	mov	rdi, rax
	call	strtol@PLT
	mov	rdx, rax
	mov	eax, DWORD PTR -16[rbp]
	movsx	rcx, eax
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rcx
	mov	BYTE PTR [rax], dl
	add	DWORD PTR -16[rbp], 1
.L229:
	mov	eax, DWORD PTR -20[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 2
	mov	rdx, rax
	lea	rax, versions[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sar	eax, 3
	cmp	DWORD PTR -16[rbp], eax
	jl	.L230
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L231
	call	__stack_chk_fail@PLT
.L231:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE26:
	.size	convert_hexstr_to_tweakarray, .-convert_hexstr_to_tweakarray
	.section	.rodata
.LC21:
	.string	"\nAverage = 2^(-%0.4f)\n"
	.text
	.globl	main
	.type	main, @function
main:
.LFB27:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 384
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -360[rbp], 100
	mov	DWORD PTR -356[rbp], 6
	mov	DWORD PTR -352[rbp], 2
	movabs	rax, 3472328296227680304
	movabs	rdx, 3472328296261234736
	mov	QWORD PTR -288[rbp], rax
	mov	QWORD PTR -280[rbp], rdx
	mov	BYTE PTR -272[rbp], 0
	movabs	rax, 3472328296227680304
	movabs	rdx, 3472328296227680304
	mov	QWORD PTR -256[rbp], rax
	mov	QWORD PTR -248[rbp], rdx
	mov	BYTE PTR -240[rbp], 0
	movabs	rax, 3472328296227680304
	movabs	rdx, 3477394845808472112
	mov	QWORD PTR -128[rbp], rax
	mov	QWORD PTR -120[rbp], rdx
	movabs	rax, 3472328296227680304
	movabs	rdx, 3477113370831761456
	mov	QWORD PTR -112[rbp], rax
	mov	QWORD PTR -104[rbp], rdx
	movabs	rax, 3472328296227680304
	movabs	rdx, 3473172721157812272
	mov	QWORD PTR -96[rbp], rax
	mov	QWORD PTR -88[rbp], rdx
	mov	BYTE PTR -80[rbp], 0
	movabs	rax, 3472328296227680304
	movabs	rdx, 3472328296294789168
	mov	QWORD PTR -64[rbp], rax
	mov	QWORD PTR -56[rbp], rdx
	movabs	rax, 3472328296227680304
	movabs	rdx, 3472328296529670192
	mov	QWORD PTR -48[rbp], rax
	mov	QWORD PTR -40[rbp], rdx
	movabs	rax, 3472328296227680304
	movabs	rdx, 3472328296378675248
	mov	QWORD PTR -32[rbp], rax
	mov	QWORD PTR -24[rbp], rdx
	mov	BYTE PTR -16[rbp], 0
	lea	rdx, -320[rbp]
	lea	rcx, -288[rbp]
	mov	eax, DWORD PTR -352[rbp]
	mov	rsi, rcx
	mov	edi, eax
	call	convert_hexstr_to_statearray
	lea	rdx, -304[rbp]
	lea	rcx, -256[rbp]
	mov	eax, DWORD PTR -352[rbp]
	mov	rsi, rcx
	mov	edi, eax
	call	convert_hexstr_to_statearray
	lea	rdx, -224[rbp]
	lea	rcx, -128[rbp]
	mov	eax, DWORD PTR -352[rbp]
	mov	rsi, rcx
	mov	edi, eax
	call	convert_hexstr_to_tweakarray
	lea	rdx, -176[rbp]
	lea	rcx, -64[rbp]
	mov	eax, DWORD PTR -352[rbp]
	mov	rsi, rcx
	mov	edi, eax
	call	convert_hexstr_to_tweakarray
	mov	DWORD PTR -348[rbp], 16
	mov	DWORD PTR -344[rbp], 10
	mov	DWORD PTR -340[rbp], 12
	mov	eax, DWORD PTR -344[rbp]
	mov	edx, 1
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -336[rbp], eax
	mov	eax, DWORD PTR -340[rbp]
	mov	edx, 1
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -332[rbp], eax
	pxor	xmm0, xmm0
	movsd	QWORD PTR -328[rbp], xmm0
	mov	DWORD PTR -364[rbp], 0
	jmp	.L233
.L234:
	lea	r9, -320[rbp]
	mov	r8d, DWORD PTR -332[rbp]
	mov	ecx, DWORD PTR -336[rbp]
	mov	edx, DWORD PTR -348[rbp]
	mov	esi, DWORD PTR -352[rbp]
	mov	eax, DWORD PTR -356[rbp]
	sub	rsp, 8
	lea	rdi, -176[rbp]
	push	rdi
	lea	rdi, -224[rbp]
	push	rdi
	lea	rdi, -304[rbp]
	push	rdi
	mov	edi, eax
	call	send_boomerangs
	add	rsp, 32
	movsd	xmm1, QWORD PTR -328[rbp]
	addsd	xmm0, xmm1
	movsd	QWORD PTR -328[rbp], xmm0
	add	DWORD PTR -364[rbp], 1
.L233:
	mov	eax, DWORD PTR -364[rbp]
	cmp	eax, DWORD PTR -360[rbp]
	jl	.L234
	pxor	xmm4, xmm4
	cvtsi2sd	xmm4, DWORD PTR -360[rbp]
	movq	rax, xmm4
	movq	xmm0, rax
	call	log@PLT
	movsd	QWORD PTR -376[rbp], xmm0
	pxor	xmm5, xmm5
	cvtsi2sd	xmm5, DWORD PTR -348[rbp]
	movq	rax, xmm5
	movq	xmm0, rax
	call	log@PLT
	movapd	xmm2, xmm0
	addsd	xmm2, QWORD PTR -376[rbp]
	movsd	QWORD PTR -376[rbp], xmm2
	pxor	xmm7, xmm7
	cvtsi2sd	xmm7, DWORD PTR -336[rbp]
	movq	rax, xmm7
	movq	xmm0, rax
	call	log@PLT
	addsd	xmm0, QWORD PTR -376[rbp]
	movsd	QWORD PTR -376[rbp], xmm0
	pxor	xmm4, xmm4
	cvtsi2sd	xmm4, DWORD PTR -332[rbp]
	movq	rax, xmm4
	movq	xmm0, rax
	call	log@PLT
	addsd	xmm0, QWORD PTR -376[rbp]
	movsd	QWORD PTR -376[rbp], xmm0
	mov	rax, QWORD PTR -328[rbp]
	movq	xmm0, rax
	call	log@PLT
	movapd	xmm1, xmm0
	movsd	xmm0, QWORD PTR -376[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC10[rip]
	divsd	xmm0, xmm1
	movq	rax, xmm0
	movq	xmm0, rax
	lea	rdi, .LC21[rip]
	mov	eax, 1
	call	printf@PLT
	mov	eax, 0
	mov	rsi, QWORD PTR -8[rbp]
	sub	rsi, QWORD PTR fs:40
	je	.L236
	call	__stack_chk_fail@PLT
.L236:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE27:
	.size	main, .-main
	.section	.rodata
	.align 8
.LC10:
	.long	-17155601
	.long	1072049730
	.align 8
.LC12:
	.long	0
	.long	1093567616
	.align 8
.LC17:
	.long	0
	.long	1072693248
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"90766158.c"
	.text
	.global	versions
	.data
	.align	2
	.type	versions, %object
	.size	versions, 72
versions:
	.word	64
	.word	64
	.word	32
	.word	64
	.word	128
	.word	36
	.word	64
	.word	192
	.word	40
	.word	128
	.word	128
	.word	40
	.word	128
	.word	256
	.word	48
	.word	128
	.word	384
	.word	56
	.global	sbox_4
	.section	.rodata
	.align	2
	.type	sbox_4, %object
	.size	sbox_4, 16
sbox_4:
	.ascii	"\014\006\011\000\001\012\002\013\003\010\005\015\004"
	.ascii	"\016\007\017"
	.global	sbox_4_inv
	.align	2
	.type	sbox_4_inv, %object
	.size	sbox_4_inv, 16
sbox_4_inv:
	.ascii	"\003\004\006\010\014\012\001\016\011\002\005\007\000"
	.ascii	"\013\015\017"
	.global	sbox_8
	.align	2
	.type	sbox_8, %object
	.size	sbox_8, 256
sbox_8:
	.ascii	"eLjBKcCkUuZzSs[{5\214:\201\2113\200;\225%\230*\220#"
	.ascii	"\231+\345\314\350\301\311\340\300\351\325\365\330\370"
	.ascii	"\320\360\331\371\245\034\250\022\033\240\023\251\005"
	.ascii	"\265\012\270\003\260\013\2712\210<\205\2154\204=\221"
	.ascii	"\"\234,\224$\235-bJlEMdDmRr\\|Tt]}\241\032\254\025\035"
	.ascii	"\244\024\255\002\261\014\274\004\264\015\275\341\310"
	.ascii	"\354\305\315\344\304\355\321\361\334\374\324\364\335"
	.ascii	"\3756\2168\202\2130\2039\226&\232(\223 \233)fNhAI`@"
	.ascii	"iVvXxPpYy\246\036\252\021\031\243\020\253\006\266\010"
	.ascii	"\272\000\263\011\273\346\316\352\302\313\343\303\353"
	.ascii	"\326\366\332\372\323\363\333\3731\212>\206\2177\207"
	.ascii	"?\222!\236.\227'\237/aHnFOgGoQq^~Ww_\177\242\030\256"
	.ascii	"\026\037\247\027\257\001\262\016\276\007\267\017\277"
	.ascii	"\342\312\356\306\317\347\307\357\322\362\336\376\327"
	.ascii	"\367\337\377"
	.global	sbox_8_inv
	.align	2
	.type	sbox_8_inv, %object
	.size	sbox_8_inv, 256
sbox_8_inv:
	.ascii	"\254\350h<l8\250\354\252\256:>jn\352\356\246\24336f"
	.ascii	"c\343\346\341\244a41d\241\344\215\311I\035M\031\211"
	.ascii	"\315\213\217\033\037KO\313\317\205\300@\025E\020\200"
	.ascii	"\305\202\207\022\027BG\302\307\226\223\003\006VS\323"
	.ascii	"\326\321\224Q\004\001T\221\324\234\330X\014\\\010\230"
	.ascii	"\334\232\236\012\016Z^\332\336\225\320P\005U\000\220"
	.ascii	"\325\222\227\002\007RW\322\327\235\331Y\015]\011\231"
	.ascii	"\335\233\237\013\017[_\333\337\026\023\203\206FC\303"
	.ascii	"\306A\024\301\204\021D\201\304\034H\310\214L\030\210"
	.ascii	"\314\032\036\212\216JN\312\3165`\340\245e0\240\3452"
	.ascii	"7\242\247bg\342\347=i\351\255m9\251\355;?\253\257ko"
	.ascii	"\353\357&#\263\266vs\363\366q$\361\264!t\261\364,x\370"
	.ascii	"\274|(\270\374*.\272\276z~\372\376%p\360\265u \260\365"
	.ascii	"\"'\262\267rw\362\367-y\371\275})\271\375+/\273\277"
	.ascii	"{\177\373\377"
	.global	P
	.align	2
	.type	P, %object
	.size	P, 16
P:
	.ascii	"\000\001\002\003\007\004\005\006\012\013\010\011\015"
	.ascii	"\016\017\014"
	.global	P_inv
	.align	2
	.type	P_inv, %object
	.size	P_inv, 16
P_inv:
	.ascii	"\000\001\002\003\005\006\007\004\012\013\010\011\017"
	.ascii	"\014\015\016"
	.global	TWEAKEY_P
	.align	2
	.type	TWEAKEY_P, %object
	.size	TWEAKEY_P, 16
TWEAKEY_P:
	.ascii	"\011\017\010\015\012\016\014\013\000\001\002\003\004"
	.ascii	"\005\006\007"
	.global	TWEAKEY_P_inv
	.align	2
	.type	TWEAKEY_P_inv, %object
	.size	TWEAKEY_P_inv, 16
TWEAKEY_P_inv:
	.ascii	"\010\011\012\013\014\015\016\017\002\000\004\007\006"
	.ascii	"\003\005\001"
	.global	RC
	.align	2
	.type	RC, %object
	.size	RC, 62
RC:
	.ascii	"\001\003\007\017\037>=;7/\036<93'\016\035:5+\026,\030"
	.ascii	"0!\002\005\013\027.\03481#\006\015\0336-\0324)\022$"
	.ascii	"\010\021\"\004\011\023&\014\0312%\012\025*\024(\020"
	.ascii	" "
	.comm	fic,4,4
	.align	2
.LC0:
	.ascii	"[+] PRNG initialized to 0x%08zX\012\000"
	.text
	.align	2
	.global	init_prng
	.syntax unified
	.arm
	.fpu softvfp
	.type	init_prng, %function
init_prng:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	mov	r0, #0
	bl	time
	mov	r2, r0
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	mov	r1, r3
	ldr	r2, [fp, #-16]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	str	r3, [fp, #-8]
	ldr	r0, [fp, #-8]
	bl	srand
	ldr	r1, [fp, #-8]
	ldr	r0, .L2
	bl	printf
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L3:
	.align	2
.L2:
	.word	.LC0
	.size	init_prng, .-init_prng
	.section	.rodata
	.align	2
.LC1:
	.ascii	"%02x\000"
	.align	2
.LC2:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	display_matrix
	.syntax unified
	.arm
	.fpu softvfp
	.type	display_matrix, %function
display_matrix:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #32
	str	r0, [fp, #-32]
	str	r1, [fp, #-36]
	ldr	r3, .L17
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	ldr	r1, .L17+4
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	cmp	r3, #64
	bne	.L5
	mov	r3, #0
	str	r3, [fp, #-28]
	b	.L6
.L7:
	ldr	r3, [fp, #-28]
	lsl	r3, r3, #1
	asr	r3, r3, #2
	lsl	r3, r3, #2
	ldr	r2, [fp, #-32]
	add	r2, r2, r3
	ldr	r3, [fp, #-28]
	lsl	r3, r3, #1
	and	r3, r3, #2
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	lsl	r3, r3, #4
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, [fp, #-28]
	lsl	r3, r3, #1
	add	r3, r3, #1
	asr	r3, r3, #2
	lsl	r3, r3, #2
	ldr	r1, [fp, #-32]
	add	r1, r1, r3
	ldr	r3, [fp, #-28]
	lsl	r3, r3, #1
	add	r3, r3, #1
	and	r3, r3, #3
	ldrb	r3, [r1, r3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r3, r3, #15
	lsl	r3, r3, #24
	asr	r3, r3, #24
	orr	r3, r2, r3
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r1, r3, #255
	sub	r2, fp, #24
	ldr	r3, [fp, #-28]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-28]
	add	r3, r3, #1
	str	r3, [fp, #-28]
.L6:
	ldr	r3, [fp, #-28]
	cmp	r3, #7
	ble	.L7
	mov	r3, #0
	str	r3, [fp, #-28]
	b	.L8
.L9:
	ldr	r3, .L17+8
	ldr	r0, [r3]
	sub	r2, fp, #24
	ldr	r3, [fp, #-28]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, .L17+12
	bl	fprintf
	ldr	r3, [fp, #-28]
	add	r3, r3, #1
	str	r3, [fp, #-28]
.L8:
	ldr	r3, [fp, #-28]
	cmp	r3, #7
	ble	.L9
	b	.L16
.L5:
	ldr	r1, .L17+4
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	cmp	r3, #128
	bne	.L16
	mov	r3, #0
	str	r3, [fp, #-28]
	b	.L11
.L12:
	ldr	r3, [fp, #-28]
	asr	r3, r3, #2
	lsl	r3, r3, #2
	ldr	r2, [fp, #-32]
	add	r2, r2, r3
	ldr	r3, [fp, #-28]
	and	r3, r3, #3
	ldrb	r1, [r2, r3]	@ zero_extendqisi2
	sub	r2, fp, #24
	ldr	r3, [fp, #-28]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-28]
	add	r3, r3, #1
	str	r3, [fp, #-28]
.L11:
	ldr	r3, [fp, #-28]
	cmp	r3, #15
	ble	.L12
	mov	r3, #0
	str	r3, [fp, #-28]
	b	.L13
.L14:
	ldr	r3, .L17+8
	ldr	r0, [r3]
	sub	r2, fp, #24
	ldr	r3, [fp, #-28]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, .L17+12
	bl	fprintf
	ldr	r3, [fp, #-28]
	add	r3, r3, #1
	str	r3, [fp, #-28]
.L13:
	ldr	r3, [fp, #-28]
	cmp	r3, #15
	ble	.L14
.L16:
	nop
	ldr	r3, .L17
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L15
	bl	__stack_chk_fail
.L15:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L18:
	.align	2
.L17:
	.word	.LC2
	.word	versions
	.word	fic
	.word	.LC1
	.size	display_matrix, .-display_matrix
	.section	.rodata
	.align	2
.LC3:
	.ascii	"S = \000"
	.align	2
.LC4:
	.ascii	" - TK%i = \000"
	.global	__aeabi_idiv
	.text
	.align	2
	.global	display_cipher_state
	.syntax unified
	.arm
	.fpu softvfp
	.type	display_cipher_state, %function
display_cipher_state:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-24]
	ldr	r3, .L22
	ldr	r3, [r3]
	mov	r2, #4
	mov	r1, #1
	ldr	r0, .L22+4
	bl	fwrite
	ldr	r1, [fp, #-24]
	ldr	r0, [fp, #-16]
	bl	display_matrix
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L20
.L21:
	ldr	r3, .L22
	ldr	r0, [r3]
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	mov	r2, r3
	ldr	r1, .L22+8
	bl	fprintf
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #4
	ldr	r2, [fp, #-20]
	add	r3, r2, r3
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	display_matrix
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L20:
	ldr	r1, .L22+12
	ldr	r2, [fp, #-24]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #4
	ldr	r0, [r3]
	ldr	r1, .L22+12
	ldr	r2, [fp, #-24]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	mov	r1, r3
	bl	__aeabi_idiv
	mov	r3, r0
	mov	r2, r3
	ldr	r3, [fp, #-8]
	cmp	r3, r2
	blt	.L21
	nop
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L23:
	.align	2
.L22:
	.word	fic
	.word	.LC3
	.word	.LC4
	.word	versions
	.size	display_cipher_state, .-display_cipher_state
	.section	.rodata
	.align	2
.LC5:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	AddKey
	.syntax unified
	.arm
	.fpu softvfp
	.type	AddKey, %function
AddKey:
	@ args = 0, pretend = 0, frame = 88
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #88
	str	r0, [fp, #-80]
	str	r1, [fp, #-84]
	str	r2, [fp, #-88]
	ldr	r3, .L54
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	mov	r3, #0
	str	r3, [fp, #-68]
	b	.L25
.L30:
	mov	r3, #0
	str	r3, [fp, #-64]
	b	.L26
.L29:
	ldr	r3, [fp, #-68]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-80]
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r2, [fp, #-84]
	ldr	r3, [fp, #-68]
	lsl	r3, r3, #2
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	ldr	r2, [fp, #-68]
	lsl	r2, r2, #2
	ldr	r0, [fp, #-80]
	add	r2, r0, r2
	eor	r3, r3, r1
	and	r1, r3, #255
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r1, .L54+4
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	lsl	r1, r3, #1
	ldr	r0, .L54+4
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r0, r3
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r1, r3
	bne	.L27
	ldr	r3, [fp, #-68]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-80]
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-84]
	add	r2, r3, #16
	ldr	r3, [fp, #-68]
	lsl	r3, r3, #2
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	ldr	r2, [fp, #-68]
	lsl	r2, r2, #2
	ldr	r0, [fp, #-80]
	add	r2, r0, r2
	eor	r3, r3, r1
	and	r1, r3, #255
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	b	.L28
.L27:
	ldr	r1, .L54+4
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r2, [r3]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r1, r3, r2
	ldr	r0, .L54+4
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r0, r3
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r1, r3
	bne	.L28
	ldr	r3, [fp, #-68]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-80]
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-84]
	add	r2, r3, #16
	ldr	r3, [fp, #-68]
	lsl	r3, r3, #2
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-84]
	add	r0, r3, #32
	ldr	r3, [fp, #-68]
	lsl	r3, r3, #2
	add	r0, r0, r3
	ldr	r3, [fp, #-64]
	add	r3, r0, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r3, r3, #255
	ldr	r2, [fp, #-68]
	lsl	r2, r2, #2
	ldr	r0, [fp, #-80]
	add	r2, r0, r2
	eor	r3, r3, r1
	and	r1, r3, #255
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
.L28:
	ldr	r3, [fp, #-64]
	add	r3, r3, #1
	str	r3, [fp, #-64]
.L26:
	ldr	r3, [fp, #-64]
	cmp	r3, #3
	ble	.L29
	ldr	r3, [fp, #-68]
	add	r3, r3, #1
	str	r3, [fp, #-68]
.L25:
	ldr	r3, [fp, #-68]
	cmp	r3, #1
	ble	.L30
	mov	r3, #0
	str	r3, [fp, #-60]
	b	.L31
.L36:
	mov	r3, #0
	str	r3, [fp, #-68]
	b	.L32
.L35:
	mov	r3, #0
	str	r3, [fp, #-64]
	b	.L33
.L34:
	ldr	r3, [fp, #-68]
	lsl	r2, r3, #2
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	ldr	r2, .L54+8
	ldrb	r3, [r2, r3]
	strb	r3, [fp, #-69]
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #4
	ldr	r2, [fp, #-84]
	add	r1, r2, r3
	ldrb	r3, [fp, #-69]	@ zero_extendqisi2
	lsr	r3, r3, #2
	and	r3, r3, #255
	mov	r2, r3
	ldrb	r3, [fp, #-69]	@ zero_extendqisi2
	and	r3, r3, #3
	lsl	r2, r2, #2
	add	r2, r1, r2
	add	r3, r2, r3
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-60]
	lsl	r2, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r2, r3
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	sub	r3, r3, #52
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-64]
	add	r3, r3, #1
	str	r3, [fp, #-64]
.L33:
	ldr	r3, [fp, #-64]
	cmp	r3, #3
	ble	.L34
	ldr	r3, [fp, #-68]
	add	r3, r3, #1
	str	r3, [fp, #-68]
.L32:
	ldr	r3, [fp, #-68]
	cmp	r3, #3
	ble	.L35
	ldr	r3, [fp, #-60]
	add	r3, r3, #1
	str	r3, [fp, #-60]
.L31:
	ldr	r1, .L54+4
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #4
	ldr	r0, [r3]
	ldr	r1, .L54+4
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	mov	r1, r3
	bl	__aeabi_idiv
	mov	r3, r0
	mov	r2, r3
	ldr	r3, [fp, #-60]
	cmp	r3, r2
	blt	.L36
	mov	r3, #0
	str	r3, [fp, #-60]
	b	.L37
.L46:
	mov	r3, #0
	str	r3, [fp, #-68]
	b	.L38
.L45:
	mov	r3, #0
	str	r3, [fp, #-64]
	b	.L39
.L44:
	ldr	r3, [fp, #-60]
	cmp	r3, #1
	bne	.L40
	ldr	r1, .L54+4
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	cmp	r3, #64
	bne	.L41
	ldr	r3, [fp, #-60]
	lsl	r2, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r2, r3
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	sub	r3, r3, #52
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #1
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r3, r3, #14
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, [fp, #-60]
	lsl	r1, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r1, r3
	lsl	r3, r3, #2
	sub	r1, fp, #4
	add	r1, r1, r3
	ldr	r3, [fp, #-64]
	add	r3, r1, r3
	sub	r3, r3, #52
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsr	r3, r3, #3
	and	r3, r3, #255
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r3, r3, #1
	lsl	r3, r3, #24
	asr	r3, r3, #24
	orr	r3, r2, r3
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, [fp, #-60]
	lsl	r1, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r1, r3
	lsl	r3, r3, #2
	sub	r1, fp, #4
	add	r1, r1, r3
	ldr	r3, [fp, #-64]
	add	r3, r1, r3
	sub	r3, r3, #52
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsr	r3, r3, #2
	and	r3, r3, #255
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r3, r3, #1
	lsl	r3, r3, #24
	asr	r3, r3, #24
	eor	r3, r3, r2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r1, r3, #255
	ldr	r3, [fp, #-60]
	lsl	r2, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r2, r3
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	sub	r3, r3, #52
	mov	r2, r1
	strb	r2, [r3]
	b	.L42
.L41:
	ldr	r3, [fp, #-60]
	lsl	r2, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r2, r3
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	sub	r3, r3, #52
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #1
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, [fp, #-60]
	lsl	r1, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r1, r3
	lsl	r3, r3, #2
	sub	r1, fp, #4
	add	r1, r1, r3
	ldr	r3, [fp, #-64]
	add	r3, r1, r3
	sub	r3, r3, #52
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsr	r3, r3, #7
	and	r3, r3, #255
	lsl	r3, r3, #24
	asr	r3, r3, #24
	eor	r3, r3, r2
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, [fp, #-60]
	lsl	r1, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r1, r3
	lsl	r3, r3, #2
	sub	r1, fp, #4
	add	r1, r1, r3
	ldr	r3, [fp, #-64]
	add	r3, r1, r3
	sub	r3, r3, #52
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsr	r3, r3, #5
	and	r3, r3, #255
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r3, r3, #1
	lsl	r3, r3, #24
	asr	r3, r3, #24
	eor	r3, r3, r2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r1, r3, #255
	ldr	r3, [fp, #-60]
	lsl	r2, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r2, r3
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	sub	r3, r3, #52
	mov	r2, r1
	strb	r2, [r3]
	b	.L42
.L40:
	ldr	r3, [fp, #-60]
	cmp	r3, #2
	bne	.L42
	ldr	r1, .L54+4
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	cmp	r3, #64
	bne	.L43
	ldr	r3, [fp, #-60]
	lsl	r2, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r2, r3
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	sub	r3, r3, #52
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsr	r3, r3, #1
	and	r3, r3, #255
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r3, r3, #7
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, [fp, #-60]
	lsl	r1, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r1, r3
	lsl	r3, r3, #2
	sub	r1, fp, #4
	add	r1, r1, r3
	ldr	r3, [fp, #-64]
	add	r3, r1, r3
	sub	r3, r3, #52
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r3, r3, #8
	lsl	r3, r3, #24
	asr	r3, r3, #24
	orr	r3, r2, r3
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, [fp, #-60]
	lsl	r1, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r1, r3
	lsl	r3, r3, #2
	sub	r1, fp, #4
	add	r1, r1, r3
	ldr	r3, [fp, #-64]
	add	r3, r1, r3
	sub	r3, r3, #52
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #3
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r3, r3, #8
	lsl	r3, r3, #24
	asr	r3, r3, #24
	eor	r3, r3, r2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r1, r3, #255
	ldr	r3, [fp, #-60]
	lsl	r2, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r2, r3
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	sub	r3, r3, #52
	mov	r2, r1
	strb	r2, [r3]
	b	.L42
.L43:
	ldr	r3, [fp, #-60]
	lsl	r2, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r2, r3
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	sub	r3, r3, #52
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsr	r3, r3, #1
	and	r3, r3, #255
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, [fp, #-60]
	lsl	r1, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r1, r3
	lsl	r3, r3, #2
	sub	r1, fp, #4
	add	r1, r1, r3
	ldr	r3, [fp, #-64]
	add	r3, r1, r3
	sub	r3, r3, #52
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #7
	lsl	r3, r3, #24
	asr	r3, r3, #24
	eor	r3, r3, r2
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, [fp, #-60]
	lsl	r1, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r1, r3
	lsl	r3, r3, #2
	sub	r1, fp, #4
	add	r1, r1, r3
	ldr	r3, [fp, #-64]
	add	r3, r1, r3
	sub	r3, r3, #52
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #1
	lsl	r3, r3, #24
	asr	r3, r3, #24
	bic	r3, r3, #127
	lsl	r3, r3, #24
	asr	r3, r3, #24
	eor	r3, r3, r2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r1, r3, #255
	ldr	r3, [fp, #-60]
	lsl	r2, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r2, r3
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	sub	r3, r3, #52
	mov	r2, r1
	strb	r2, [r3]
.L42:
	ldr	r3, [fp, #-64]
	add	r3, r3, #1
	str	r3, [fp, #-64]
.L39:
	ldr	r3, [fp, #-64]
	cmp	r3, #3
	ble	.L44
	ldr	r3, [fp, #-68]
	add	r3, r3, #1
	str	r3, [fp, #-68]
.L38:
	ldr	r3, [fp, #-68]
	cmp	r3, #1
	ble	.L45
	ldr	r3, [fp, #-60]
	add	r3, r3, #1
	str	r3, [fp, #-60]
.L37:
	ldr	r1, .L54+4
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #4
	ldr	r0, [r3]
	ldr	r1, .L54+4
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	mov	r1, r3
	bl	__aeabi_idiv
	mov	r3, r0
	mov	r2, r3
	ldr	r3, [fp, #-60]
	cmp	r3, r2
	blt	.L46
	mov	r3, #0
	str	r3, [fp, #-60]
	b	.L47
.L52:
	mov	r3, #0
	str	r3, [fp, #-68]
	b	.L48
.L51:
	mov	r3, #0
	str	r3, [fp, #-64]
	b	.L49
.L50:
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #4
	ldr	r2, [fp, #-84]
	add	r2, r2, r3
	ldr	r3, [fp, #-60]
	lsl	r1, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r1, r3
	lsl	r3, r3, #2
	sub	r1, fp, #4
	add	r1, r1, r3
	ldr	r3, [fp, #-64]
	add	r3, r1, r3
	sub	r3, r3, #52
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-68]
	lsl	r3, r3, #2
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-64]
	add	r3, r3, #1
	str	r3, [fp, #-64]
.L49:
	ldr	r3, [fp, #-64]
	cmp	r3, #3
	ble	.L50
	ldr	r3, [fp, #-68]
	add	r3, r3, #1
	str	r3, [fp, #-68]
.L48:
	ldr	r3, [fp, #-68]
	cmp	r3, #3
	ble	.L51
	ldr	r3, [fp, #-60]
	add	r3, r3, #1
	str	r3, [fp, #-60]
.L47:
	ldr	r1, .L54+4
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #4
	ldr	r0, [r3]
	ldr	r1, .L54+4
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	mov	r1, r3
	bl	__aeabi_idiv
	mov	r3, r0
	mov	r2, r3
	ldr	r3, [fp, #-60]
	cmp	r3, r2
	blt	.L52
	nop
	ldr	r3, .L54
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L53
	bl	__stack_chk_fail
.L53:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L55:
	.align	2
.L54:
	.word	.LC5
	.word	versions
	.word	TWEAKEY_P
	.size	AddKey, .-AddKey
	.section	.rodata
	.align	2
.LC6:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	AddKey_inv
	.syntax unified
	.arm
	.fpu softvfp
	.type	AddKey_inv, %function
AddKey_inv:
	@ args = 0, pretend = 0, frame = 88
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #88
	str	r0, [fp, #-80]
	str	r1, [fp, #-84]
	str	r2, [fp, #-88]
	ldr	r3, .L86
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	mov	r3, #0
	str	r3, [fp, #-60]
	b	.L57
.L62:
	mov	r3, #0
	str	r3, [fp, #-68]
	b	.L58
.L61:
	mov	r3, #0
	str	r3, [fp, #-64]
	b	.L59
.L60:
	ldr	r3, [fp, #-68]
	lsl	r2, r3, #2
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	ldr	r2, .L86+4
	ldrb	r3, [r2, r3]
	strb	r3, [fp, #-69]
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #4
	ldr	r2, [fp, #-84]
	add	r1, r2, r3
	ldrb	r3, [fp, #-69]	@ zero_extendqisi2
	lsr	r3, r3, #2
	and	r3, r3, #255
	mov	r2, r3
	ldrb	r3, [fp, #-69]	@ zero_extendqisi2
	and	r3, r3, #3
	lsl	r2, r2, #2
	add	r2, r1, r2
	add	r3, r2, r3
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-60]
	lsl	r2, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r2, r3
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	sub	r3, r3, #52
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-64]
	add	r3, r3, #1
	str	r3, [fp, #-64]
.L59:
	ldr	r3, [fp, #-64]
	cmp	r3, #3
	ble	.L60
	ldr	r3, [fp, #-68]
	add	r3, r3, #1
	str	r3, [fp, #-68]
.L58:
	ldr	r3, [fp, #-68]
	cmp	r3, #3
	ble	.L61
	ldr	r3, [fp, #-60]
	add	r3, r3, #1
	str	r3, [fp, #-60]
.L57:
	ldr	r1, .L86+8
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #4
	ldr	r0, [r3]
	ldr	r1, .L86+8
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	mov	r1, r3
	bl	__aeabi_idiv
	mov	r3, r0
	mov	r2, r3
	ldr	r3, [fp, #-60]
	cmp	r3, r2
	blt	.L62
	mov	r3, #0
	str	r3, [fp, #-60]
	b	.L63
.L72:
	mov	r3, #2
	str	r3, [fp, #-68]
	b	.L64
.L71:
	mov	r3, #0
	str	r3, [fp, #-64]
	b	.L65
.L70:
	ldr	r3, [fp, #-60]
	cmp	r3, #1
	bne	.L66
	ldr	r1, .L86+8
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	cmp	r3, #64
	bne	.L67
	ldr	r3, [fp, #-60]
	lsl	r2, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r2, r3
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	sub	r3, r3, #52
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsr	r3, r3, #1
	and	r3, r3, #255
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r3, r3, #7
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, [fp, #-60]
	lsl	r1, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r1, r3
	lsl	r3, r3, #2
	sub	r1, fp, #4
	add	r1, r1, r3
	ldr	r3, [fp, #-64]
	add	r3, r1, r3
	sub	r3, r3, #52
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #3
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r3, r3, #8
	lsl	r3, r3, #24
	asr	r3, r3, #24
	orr	r3, r2, r3
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, [fp, #-60]
	lsl	r1, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r1, r3
	lsl	r3, r3, #2
	sub	r1, fp, #4
	add	r1, r1, r3
	ldr	r3, [fp, #-64]
	add	r3, r1, r3
	sub	r3, r3, #52
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r3, r3, #8
	lsl	r3, r3, #24
	asr	r3, r3, #24
	eor	r3, r3, r2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r1, r3, #255
	ldr	r3, [fp, #-60]
	lsl	r2, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r2, r3
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	sub	r3, r3, #52
	mov	r2, r1
	strb	r2, [r3]
	b	.L68
.L67:
	ldr	r3, [fp, #-60]
	lsl	r2, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r2, r3
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	sub	r3, r3, #52
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsr	r3, r3, #1
	and	r3, r3, #255
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, [fp, #-60]
	lsl	r1, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r1, r3
	lsl	r3, r3, #2
	sub	r1, fp, #4
	add	r1, r1, r3
	ldr	r3, [fp, #-64]
	add	r3, r1, r3
	sub	r3, r3, #52
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #7
	lsl	r3, r3, #24
	asr	r3, r3, #24
	eor	r3, r3, r2
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, [fp, #-60]
	lsl	r1, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r1, r3
	lsl	r3, r3, #2
	sub	r1, fp, #4
	add	r1, r1, r3
	ldr	r3, [fp, #-64]
	add	r3, r1, r3
	sub	r3, r3, #52
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #1
	lsl	r3, r3, #24
	asr	r3, r3, #24
	bic	r3, r3, #127
	lsl	r3, r3, #24
	asr	r3, r3, #24
	eor	r3, r3, r2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r1, r3, #255
	ldr	r3, [fp, #-60]
	lsl	r2, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r2, r3
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	sub	r3, r3, #52
	mov	r2, r1
	strb	r2, [r3]
	b	.L68
.L66:
	ldr	r3, [fp, #-60]
	cmp	r3, #2
	bne	.L68
	ldr	r1, .L86+8
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	cmp	r3, #64
	bne	.L69
	ldr	r3, [fp, #-60]
	lsl	r2, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r2, r3
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	sub	r3, r3, #52
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #1
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r3, r3, #14
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, [fp, #-60]
	lsl	r1, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r1, r3
	lsl	r3, r3, #2
	sub	r1, fp, #4
	add	r1, r1, r3
	ldr	r3, [fp, #-64]
	add	r3, r1, r3
	sub	r3, r3, #52
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsr	r3, r3, #3
	and	r3, r3, #255
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r3, r3, #1
	lsl	r3, r3, #24
	asr	r3, r3, #24
	orr	r3, r2, r3
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, [fp, #-60]
	lsl	r1, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r1, r3
	lsl	r3, r3, #2
	sub	r1, fp, #4
	add	r1, r1, r3
	ldr	r3, [fp, #-64]
	add	r3, r1, r3
	sub	r3, r3, #52
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsr	r3, r3, #2
	and	r3, r3, #255
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r3, r3, #1
	lsl	r3, r3, #24
	asr	r3, r3, #24
	eor	r3, r3, r2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r1, r3, #255
	ldr	r3, [fp, #-60]
	lsl	r2, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r2, r3
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	sub	r3, r3, #52
	mov	r2, r1
	strb	r2, [r3]
	b	.L68
.L69:
	ldr	r3, [fp, #-60]
	lsl	r2, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r2, r3
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	sub	r3, r3, #52
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #1
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, [fp, #-60]
	lsl	r1, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r1, r3
	lsl	r3, r3, #2
	sub	r1, fp, #4
	add	r1, r1, r3
	ldr	r3, [fp, #-64]
	add	r3, r1, r3
	sub	r3, r3, #52
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsr	r3, r3, #7
	and	r3, r3, #255
	lsl	r3, r3, #24
	asr	r3, r3, #24
	eor	r3, r3, r2
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, [fp, #-60]
	lsl	r1, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r1, r3
	lsl	r3, r3, #2
	sub	r1, fp, #4
	add	r1, r1, r3
	ldr	r3, [fp, #-64]
	add	r3, r1, r3
	sub	r3, r3, #52
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsr	r3, r3, #5
	and	r3, r3, #255
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r3, r3, #1
	lsl	r3, r3, #24
	asr	r3, r3, #24
	eor	r3, r3, r2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r1, r3, #255
	ldr	r3, [fp, #-60]
	lsl	r2, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r2, r3
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	sub	r3, r3, #52
	mov	r2, r1
	strb	r2, [r3]
.L68:
	ldr	r3, [fp, #-64]
	add	r3, r3, #1
	str	r3, [fp, #-64]
.L65:
	ldr	r3, [fp, #-64]
	cmp	r3, #3
	ble	.L70
	ldr	r3, [fp, #-68]
	add	r3, r3, #1
	str	r3, [fp, #-68]
.L64:
	ldr	r3, [fp, #-68]
	cmp	r3, #3
	ble	.L71
	ldr	r3, [fp, #-60]
	add	r3, r3, #1
	str	r3, [fp, #-60]
.L63:
	ldr	r1, .L86+8
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #4
	ldr	r0, [r3]
	ldr	r1, .L86+8
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	mov	r1, r3
	bl	__aeabi_idiv
	mov	r3, r0
	mov	r2, r3
	ldr	r3, [fp, #-60]
	cmp	r3, r2
	blt	.L72
	mov	r3, #0
	str	r3, [fp, #-60]
	b	.L73
.L78:
	mov	r3, #0
	str	r3, [fp, #-68]
	b	.L74
.L77:
	mov	r3, #0
	str	r3, [fp, #-64]
	b	.L75
.L76:
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #4
	ldr	r2, [fp, #-84]
	add	r2, r2, r3
	ldr	r3, [fp, #-60]
	lsl	r1, r3, #2
	ldr	r3, [fp, #-68]
	add	r3, r1, r3
	lsl	r3, r3, #2
	sub	r1, fp, #4
	add	r1, r1, r3
	ldr	r3, [fp, #-64]
	add	r3, r1, r3
	sub	r3, r3, #52
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-68]
	lsl	r3, r3, #2
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-64]
	add	r3, r3, #1
	str	r3, [fp, #-64]
.L75:
	ldr	r3, [fp, #-64]
	cmp	r3, #3
	ble	.L76
	ldr	r3, [fp, #-68]
	add	r3, r3, #1
	str	r3, [fp, #-68]
.L74:
	ldr	r3, [fp, #-68]
	cmp	r3, #3
	ble	.L77
	ldr	r3, [fp, #-60]
	add	r3, r3, #1
	str	r3, [fp, #-60]
.L73:
	ldr	r1, .L86+8
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #4
	ldr	r0, [r3]
	ldr	r1, .L86+8
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	mov	r1, r3
	bl	__aeabi_idiv
	mov	r3, r0
	mov	r2, r3
	ldr	r3, [fp, #-60]
	cmp	r3, r2
	blt	.L78
	mov	r3, #0
	str	r3, [fp, #-68]
	b	.L79
.L84:
	mov	r3, #0
	str	r3, [fp, #-64]
	b	.L80
.L83:
	ldr	r3, [fp, #-68]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-80]
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r2, [fp, #-84]
	ldr	r3, [fp, #-68]
	lsl	r3, r3, #2
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	ldr	r2, [fp, #-68]
	lsl	r2, r2, #2
	ldr	r0, [fp, #-80]
	add	r2, r0, r2
	eor	r3, r3, r1
	and	r1, r3, #255
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r1, .L86+8
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	lsl	r1, r3, #1
	ldr	r0, .L86+8
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r0, r3
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r1, r3
	bne	.L81
	ldr	r3, [fp, #-68]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-80]
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-84]
	add	r2, r3, #16
	ldr	r3, [fp, #-68]
	lsl	r3, r3, #2
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	ldr	r2, [fp, #-68]
	lsl	r2, r2, #2
	ldr	r0, [fp, #-80]
	add	r2, r0, r2
	eor	r3, r3, r1
	and	r1, r3, #255
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	b	.L82
.L81:
	ldr	r1, .L86+8
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r2, [r3]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r1, r3, r2
	ldr	r0, .L86+8
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r0, r3
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r1, r3
	bne	.L82
	ldr	r3, [fp, #-68]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-80]
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-84]
	add	r2, r3, #16
	ldr	r3, [fp, #-68]
	lsl	r3, r3, #2
	add	r2, r2, r3
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-84]
	add	r0, r3, #32
	ldr	r3, [fp, #-68]
	lsl	r3, r3, #2
	add	r0, r0, r3
	ldr	r3, [fp, #-64]
	add	r3, r0, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r3, r3, #255
	ldr	r2, [fp, #-68]
	lsl	r2, r2, #2
	ldr	r0, [fp, #-80]
	add	r2, r0, r2
	eor	r3, r3, r1
	and	r1, r3, #255
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
.L82:
	ldr	r3, [fp, #-64]
	add	r3, r3, #1
	str	r3, [fp, #-64]
.L80:
	ldr	r3, [fp, #-64]
	cmp	r3, #3
	ble	.L83
	ldr	r3, [fp, #-68]
	add	r3, r3, #1
	str	r3, [fp, #-68]
.L79:
	ldr	r3, [fp, #-68]
	cmp	r3, #1
	ble	.L84
	nop
	ldr	r3, .L86
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L85
	bl	__stack_chk_fail
.L85:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L87:
	.align	2
.L86:
	.word	.LC6
	.word	TWEAKEY_P_inv
	.word	versions
	.size	AddKey_inv, .-AddKey_inv
	.align	2
	.global	AddConstants
	.syntax unified
	.arm
	.fpu softvfp
	.type	AddConstants, %function
AddConstants:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-8]
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r1, .L89
	ldr	r3, [fp, #-12]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r3, r3, #15
	lsl	r3, r3, #24
	asr	r3, r3, #24
	eor	r3, r3, r2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r2, r3, #255
	ldr	r3, [fp, #-8]
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	add	r3, r3, #4
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r1, .L89
	ldr	r3, [fp, #-12]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsr	r3, r3, #4
	and	r3, r3, #255
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r3, r3, #3
	lsl	r3, r3, #24
	asr	r3, r3, #24
	eor	r3, r3, r2
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, [fp, #-8]
	add	r3, r3, #4
	and	r2, r2, #255
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	add	r3, r3, #8
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-8]
	add	r3, r3, #8
	eor	r2, r2, #2
	and	r2, r2, #255
	strb	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L90:
	.align	2
.L89:
	.word	RC
	.size	AddConstants, .-AddConstants
	.align	2
	.global	SubCell4
	.syntax unified
	.arm
	.fpu softvfp
	.type	SubCell4, %function
SubCell4:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	mov	r3, #0
	str	r3, [fp, #-12]
	b	.L92
.L95:
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L93
.L94:
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r2, r2, r3
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r2, r2, r3
	ldr	r3, .L96
	ldrb	r1, [r3, r1]	@ zero_extendqisi2
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L93:
	ldr	r3, [fp, #-8]
	cmp	r3, #3
	ble	.L94
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	str	r3, [fp, #-12]
.L92:
	ldr	r3, [fp, #-12]
	cmp	r3, #3
	ble	.L95
	nop
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L97:
	.align	2
.L96:
	.word	sbox_4
	.size	SubCell4, .-SubCell4
	.align	2
	.global	SubCell4_inv
	.syntax unified
	.arm
	.fpu softvfp
	.type	SubCell4_inv, %function
SubCell4_inv:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	mov	r3, #0
	str	r3, [fp, #-12]
	b	.L99
.L102:
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L100
.L101:
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r2, r2, r3
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r2, r2, r3
	ldr	r3, .L103
	ldrb	r1, [r3, r1]	@ zero_extendqisi2
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L100:
	ldr	r3, [fp, #-8]
	cmp	r3, #3
	ble	.L101
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	str	r3, [fp, #-12]
.L99:
	ldr	r3, [fp, #-12]
	cmp	r3, #3
	ble	.L102
	nop
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L104:
	.align	2
.L103:
	.word	sbox_4_inv
	.size	SubCell4_inv, .-SubCell4_inv
	.align	2
	.global	SubCell8
	.syntax unified
	.arm
	.fpu softvfp
	.type	SubCell8, %function
SubCell8:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	mov	r3, #0
	str	r3, [fp, #-12]
	b	.L106
.L109:
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L107
.L108:
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r2, r2, r3
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r2, r2, r3
	ldr	r3, .L110
	ldrb	r1, [r3, r1]	@ zero_extendqisi2
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L107:
	ldr	r3, [fp, #-8]
	cmp	r3, #3
	ble	.L108
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	str	r3, [fp, #-12]
.L106:
	ldr	r3, [fp, #-12]
	cmp	r3, #3
	ble	.L109
	nop
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L111:
	.align	2
.L110:
	.word	sbox_8
	.size	SubCell8, .-SubCell8
	.align	2
	.global	SubCell8_inv
	.syntax unified
	.arm
	.fpu softvfp
	.type	SubCell8_inv, %function
SubCell8_inv:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	mov	r3, #0
	str	r3, [fp, #-12]
	b	.L113
.L116:
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L114
.L115:
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r2, r2, r3
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r2, r2, r3
	ldr	r3, .L117
	ldrb	r1, [r3, r1]	@ zero_extendqisi2
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L114:
	ldr	r3, [fp, #-8]
	cmp	r3, #3
	ble	.L115
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	str	r3, [fp, #-12]
.L113:
	ldr	r3, [fp, #-12]
	cmp	r3, #3
	ble	.L116
	nop
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L118:
	.align	2
.L117:
	.word	sbox_8_inv
	.size	SubCell8_inv, .-SubCell8_inv
	.section	.rodata
	.align	2
.LC7:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	ShiftRows
	.syntax unified
	.arm
	.fpu softvfp
	.type	ShiftRows, %function
ShiftRows:
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #40
	str	r0, [fp, #-40]
	ldr	r3, .L129
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	mov	r3, #0
	str	r3, [fp, #-36]
	b	.L120
.L123:
	mov	r3, #0
	str	r3, [fp, #-32]
	b	.L121
.L122:
	ldr	r3, [fp, #-36]
	lsl	r2, r3, #2
	ldr	r3, [fp, #-32]
	add	r3, r2, r3
	ldr	r2, .L129+4
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	str	r3, [fp, #-28]
	ldr	r3, [fp, #-28]
	asr	r3, r3, #2
	lsl	r3, r3, #2
	ldr	r2, [fp, #-40]
	add	r2, r2, r3
	ldr	r3, [fp, #-28]
	and	r3, r3, #3
	ldrb	r1, [r2, r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r2, r2, r3
	ldr	r3, [fp, #-32]
	add	r3, r2, r3
	sub	r3, r3, #20
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-32]
	add	r3, r3, #1
	str	r3, [fp, #-32]
.L121:
	ldr	r3, [fp, #-32]
	cmp	r3, #3
	ble	.L122
	ldr	r3, [fp, #-36]
	add	r3, r3, #1
	str	r3, [fp, #-36]
.L120:
	ldr	r3, [fp, #-36]
	cmp	r3, #3
	ble	.L123
	mov	r3, #0
	str	r3, [fp, #-36]
	b	.L124
.L127:
	mov	r3, #0
	str	r3, [fp, #-32]
	b	.L125
.L126:
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-40]
	add	r2, r2, r3
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #2
	sub	r1, fp, #4
	add	r1, r1, r3
	ldr	r3, [fp, #-32]
	add	r3, r1, r3
	sub	r3, r3, #20
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-32]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-32]
	add	r3, r3, #1
	str	r3, [fp, #-32]
.L125:
	ldr	r3, [fp, #-32]
	cmp	r3, #3
	ble	.L126
	ldr	r3, [fp, #-36]
	add	r3, r3, #1
	str	r3, [fp, #-36]
.L124:
	ldr	r3, [fp, #-36]
	cmp	r3, #3
	ble	.L127
	nop
	ldr	r3, .L129
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L128
	bl	__stack_chk_fail
.L128:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L130:
	.align	2
.L129:
	.word	.LC7
	.word	P
	.size	ShiftRows, .-ShiftRows
	.section	.rodata
	.align	2
.LC8:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	ShiftRows_inv
	.syntax unified
	.arm
	.fpu softvfp
	.type	ShiftRows_inv, %function
ShiftRows_inv:
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #40
	str	r0, [fp, #-40]
	ldr	r3, .L141
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	mov	r3, #0
	str	r3, [fp, #-36]
	b	.L132
.L135:
	mov	r3, #0
	str	r3, [fp, #-32]
	b	.L133
.L134:
	ldr	r3, [fp, #-36]
	lsl	r2, r3, #2
	ldr	r3, [fp, #-32]
	add	r3, r2, r3
	ldr	r2, .L141+4
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	str	r3, [fp, #-28]
	ldr	r3, [fp, #-28]
	asr	r3, r3, #2
	lsl	r3, r3, #2
	ldr	r2, [fp, #-40]
	add	r2, r2, r3
	ldr	r3, [fp, #-28]
	and	r3, r3, #3
	ldrb	r1, [r2, r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r2, r2, r3
	ldr	r3, [fp, #-32]
	add	r3, r2, r3
	sub	r3, r3, #20
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-32]
	add	r3, r3, #1
	str	r3, [fp, #-32]
.L133:
	ldr	r3, [fp, #-32]
	cmp	r3, #3
	ble	.L134
	ldr	r3, [fp, #-36]
	add	r3, r3, #1
	str	r3, [fp, #-36]
.L132:
	ldr	r3, [fp, #-36]
	cmp	r3, #3
	ble	.L135
	mov	r3, #0
	str	r3, [fp, #-36]
	b	.L136
.L139:
	mov	r3, #0
	str	r3, [fp, #-32]
	b	.L137
.L138:
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-40]
	add	r2, r2, r3
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #2
	sub	r1, fp, #4
	add	r1, r1, r3
	ldr	r3, [fp, #-32]
	add	r3, r1, r3
	sub	r3, r3, #20
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-32]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-32]
	add	r3, r3, #1
	str	r3, [fp, #-32]
.L137:
	ldr	r3, [fp, #-32]
	cmp	r3, #3
	ble	.L138
	ldr	r3, [fp, #-36]
	add	r3, r3, #1
	str	r3, [fp, #-36]
.L136:
	ldr	r3, [fp, #-36]
	cmp	r3, #3
	ble	.L139
	nop
	ldr	r3, .L141
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L140
	bl	__stack_chk_fail
.L140:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L142:
	.align	2
.L141:
	.word	.LC8
	.word	P_inv
	.size	ShiftRows_inv, .-ShiftRows_inv
	.align	2
	.global	MixColumn
	.syntax unified
	.arm
	.fpu softvfp
	.type	MixColumn, %function
MixColumn:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L144
.L145:
	ldr	r3, [fp, #-16]
	add	r2, r3, #4
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-16]
	add	r2, r3, #8
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	ldr	r2, [fp, #-16]
	add	r2, r2, #4
	eor	r3, r3, r1
	and	r1, r3, #255
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r2, r3, #8
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	ldr	r2, [fp, #-16]
	add	r2, r2, #8
	eor	r3, r3, r1
	and	r1, r3, #255
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r2, r3, #12
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-16]
	add	r2, r3, #8
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	ldr	r2, [fp, #-16]
	add	r2, r2, #12
	eor	r3, r3, r1
	and	r1, r3, #255
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r2, r3, #12
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldrb	r3, [r3]
	strb	r3, [fp, #-9]
	ldr	r3, [fp, #-16]
	add	r1, r3, #8
	ldr	r3, [fp, #-16]
	add	r2, r3, #12
	ldr	r3, [fp, #-8]
	add	r3, r1, r3
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r1, r3, #4
	ldr	r3, [fp, #-16]
	add	r2, r3, #8
	ldr	r3, [fp, #-8]
	add	r3, r1, r3
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r2, r3, #4
	ldr	r1, [fp, #-16]
	ldr	r3, [fp, #-8]
	add	r3, r1, r3
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldrb	r2, [fp, #-9]
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L144:
	ldr	r3, [fp, #-8]
	cmp	r3, #3
	ble	.L145
	nop
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	MixColumn, .-MixColumn
	.align	2
	.global	MixColumn_inv
	.syntax unified
	.arm
	.fpu softvfp
	.type	MixColumn_inv, %function
MixColumn_inv:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L147
.L148:
	ldr	r3, [fp, #-16]
	add	r2, r3, #12
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldrb	r3, [r3]
	strb	r3, [fp, #-9]
	ldr	r3, [fp, #-16]
	add	r2, r3, #12
	ldr	r1, [fp, #-16]
	ldr	r3, [fp, #-8]
	add	r3, r1, r3
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r2, r3, #4
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r1, r3, #8
	ldr	r3, [fp, #-16]
	add	r2, r3, #4
	ldr	r3, [fp, #-8]
	add	r3, r1, r3
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r2, r3, #8
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldrb	r2, [fp, #-9]
	strb	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r2, r3, #12
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-16]
	add	r2, r3, #8
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	ldr	r2, [fp, #-16]
	add	r2, r2, #12
	eor	r3, r3, r1
	and	r1, r3, #255
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r2, r3, #8
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	ldr	r2, [fp, #-16]
	add	r2, r2, #8
	eor	r3, r3, r1
	and	r1, r3, #255
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r2, r3, #4
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-16]
	add	r2, r3, #8
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	ldr	r2, [fp, #-16]
	add	r2, r2, #4
	eor	r3, r3, r1
	and	r1, r3, #255
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L147:
	ldr	r3, [fp, #-8]
	cmp	r3, #3
	ble	.L148
	nop
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	MixColumn_inv, .-MixColumn_inv
	.section	.rodata
	.align	2
.LC9:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	dec
	.syntax unified
	.arm
	.fpu softvfp
	.type	dec, %function
dec:
	@ args = 0, pretend = 0, frame = 104
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #104
	str	r0, [fp, #-96]
	str	r1, [fp, #-100]
	str	r2, [fp, #-104]
	str	r3, [fp, #-108]
	ldr	r3, .L172
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	sub	r3, fp, #72
	mov	r2, #0
	str	r2, [r3]
	str	r2, [r3, #4]
	str	r2, [r3, #8]
	str	r2, [r3, #12]
	sub	r3, fp, #56
	mov	r2, #48
	mov	r1, #0
	mov	r0, r3
	bl	memset
	mov	r3, #0
	str	r3, [fp, #-92]
	b	.L150
.L157:
	ldr	r1, .L172+4
	ldr	r2, [fp, #-104]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	cmp	r3, #64
	bne	.L151
	ldr	r3, [fp, #-92]
	and	r3, r3, #1
	cmp	r3, #0
	beq	.L152
	ldr	r3, [fp, #-92]
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, [fp, #-96]
	add	r3, r3, r2
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-92]
	asr	r2, r3, #2
	ldr	r3, [fp, #-92]
	and	r3, r3, #3
	and	r1, r1, #15
	and	r1, r1, #255
	lsl	r2, r2, #2
	sub	r0, fp, #4
	add	r2, r0, r2
	add	r3, r2, r3
	sub	r3, r3, #84
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-92]
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, [fp, #-100]
	add	r3, r3, r2
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-92]
	asr	r2, r3, #2
	ldr	r3, [fp, #-92]
	and	r3, r3, #3
	and	r1, r1, #15
	and	r1, r1, #255
	lsl	r2, r2, #2
	sub	r0, fp, #4
	add	r2, r0, r2
	add	r3, r2, r3
	sub	r3, r3, #52
	mov	r2, r1
	strb	r2, [r3]
	ldr	r1, .L172+4
	ldr	r2, [fp, #-104]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #127
	ble	.L153
	ldr	r3, [fp, #-92]
	add	r3, r3, #16
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, [fp, #-100]
	add	r3, r3, r2
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-92]
	asr	r2, r3, #2
	ldr	r3, [fp, #-92]
	and	r3, r3, #3
	and	r1, r1, #15
	and	r1, r1, #255
	lsl	r2, r2, #2
	sub	r0, fp, #4
	add	r2, r0, r2
	add	r3, r2, r3
	sub	r3, r3, #36
	mov	r2, r1
	strb	r2, [r3]
.L153:
	ldr	r1, .L172+4
	ldr	r2, [fp, #-104]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #191
	ble	.L154
	ldr	r3, [fp, #-92]
	add	r3, r3, #32
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, [fp, #-100]
	add	r3, r3, r2
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-92]
	asr	r2, r3, #2
	ldr	r3, [fp, #-92]
	and	r3, r3, #3
	and	r1, r1, #15
	and	r1, r1, #255
	lsl	r2, r2, #2
	sub	r0, fp, #4
	add	r2, r0, r2
	add	r3, r2, r3
	sub	r3, r3, #20
	mov	r2, r1
	strb	r2, [r3]
	b	.L154
.L152:
	ldr	r3, [fp, #-92]
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, [fp, #-96]
	add	r3, r3, r2
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-92]
	asr	r2, r3, #2
	ldr	r3, [fp, #-92]
	and	r3, r3, #3
	lsr	r1, r1, #4
	and	r1, r1, #255
	lsl	r2, r2, #2
	sub	r0, fp, #4
	add	r2, r0, r2
	add	r3, r2, r3
	sub	r3, r3, #84
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-92]
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, [fp, #-100]
	add	r3, r3, r2
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-92]
	asr	r2, r3, #2
	ldr	r3, [fp, #-92]
	and	r3, r3, #3
	lsr	r1, r1, #4
	and	r1, r1, #255
	lsl	r2, r2, #2
	sub	r0, fp, #4
	add	r2, r0, r2
	add	r3, r2, r3
	sub	r3, r3, #52
	mov	r2, r1
	strb	r2, [r3]
	ldr	r1, .L172+4
	ldr	r2, [fp, #-104]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #127
	ble	.L155
	ldr	r3, [fp, #-92]
	add	r3, r3, #16
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, [fp, #-100]
	add	r3, r3, r2
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-92]
	asr	r2, r3, #2
	ldr	r3, [fp, #-92]
	and	r3, r3, #3
	lsr	r1, r1, #4
	and	r1, r1, #255
	lsl	r2, r2, #2
	sub	r0, fp, #4
	add	r2, r0, r2
	add	r3, r2, r3
	sub	r3, r3, #36
	mov	r2, r1
	strb	r2, [r3]
.L155:
	ldr	r1, .L172+4
	ldr	r2, [fp, #-104]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #191
	ble	.L154
	ldr	r3, [fp, #-92]
	add	r3, r3, #32
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, [fp, #-100]
	add	r3, r3, r2
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-92]
	asr	r2, r3, #2
	ldr	r3, [fp, #-92]
	and	r3, r3, #3
	lsr	r1, r1, #4
	and	r1, r1, #255
	lsl	r2, r2, #2
	sub	r0, fp, #4
	add	r2, r0, r2
	add	r3, r2, r3
	sub	r3, r3, #20
	mov	r2, r1
	strb	r2, [r3]
	b	.L154
.L151:
	ldr	r1, .L172+4
	ldr	r2, [fp, #-104]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	cmp	r3, #128
	bne	.L154
	ldr	r3, [fp, #-92]
	ldr	r2, [fp, #-96]
	add	r1, r2, r3
	ldr	r3, [fp, #-92]
	asr	r2, r3, #2
	ldr	r3, [fp, #-92]
	and	r3, r3, #3
	ldrb	r1, [r1]	@ zero_extendqisi2
	lsl	r2, r2, #2
	sub	r0, fp, #4
	add	r2, r0, r2
	add	r3, r2, r3
	sub	r3, r3, #84
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-92]
	ldr	r2, [fp, #-100]
	add	r1, r2, r3
	ldr	r3, [fp, #-92]
	asr	r2, r3, #2
	ldr	r3, [fp, #-92]
	and	r3, r3, #3
	ldrb	r1, [r1]	@ zero_extendqisi2
	lsl	r2, r2, #2
	sub	r0, fp, #4
	add	r2, r0, r2
	add	r3, r2, r3
	sub	r3, r3, #52
	mov	r2, r1
	strb	r2, [r3]
	ldr	r1, .L172+4
	ldr	r2, [fp, #-104]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #255
	ble	.L156
	ldr	r3, [fp, #-92]
	add	r3, r3, #16
	ldr	r2, [fp, #-100]
	add	r1, r2, r3
	ldr	r3, [fp, #-92]
	asr	r2, r3, #2
	ldr	r3, [fp, #-92]
	and	r3, r3, #3
	ldrb	r1, [r1]	@ zero_extendqisi2
	lsl	r2, r2, #2
	sub	r0, fp, #4
	add	r2, r0, r2
	add	r3, r2, r3
	sub	r3, r3, #36
	mov	r2, r1
	strb	r2, [r3]
.L156:
	ldr	r1, .L172+4
	ldr	r2, [fp, #-104]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #384
	blt	.L154
	ldr	r3, [fp, #-92]
	add	r3, r3, #32
	ldr	r2, [fp, #-100]
	add	r1, r2, r3
	ldr	r3, [fp, #-92]
	asr	r2, r3, #2
	ldr	r3, [fp, #-92]
	and	r3, r3, #3
	ldrb	r1, [r1]	@ zero_extendqisi2
	lsl	r2, r2, #2
	sub	r0, fp, #4
	add	r2, r0, r2
	add	r3, r2, r3
	sub	r3, r3, #20
	mov	r2, r1
	strb	r2, [r3]
.L154:
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	str	r3, [fp, #-92]
.L150:
	ldr	r3, [fp, #-92]
	cmp	r3, #15
	ble	.L157
	ldr	r3, [fp, #-108]
	sub	r3, r3, #1
	str	r3, [fp, #-92]
	b	.L158
.L159:
	sub	r1, fp, #56
	sub	r3, fp, #72
	ldr	r2, [fp, #-104]
	mov	r0, r3
	bl	AddKey
	ldr	r3, [fp, #-92]
	sub	r3, r3, #1
	str	r3, [fp, #-92]
.L158:
	ldr	r3, [fp, #-92]
	cmp	r3, #0
	bge	.L159
	ldr	r3, [fp, #-108]
	sub	r3, r3, #1
	str	r3, [fp, #-92]
	b	.L160
.L163:
	sub	r3, fp, #88
	mov	r0, r3
	bl	MixColumn_inv
	sub	r3, fp, #88
	mov	r0, r3
	bl	ShiftRows_inv
	sub	r1, fp, #56
	sub	r3, fp, #88
	ldr	r2, [fp, #-104]
	mov	r0, r3
	bl	AddKey_inv
	sub	r3, fp, #88
	ldr	r1, [fp, #-92]
	mov	r0, r3
	bl	AddConstants
	ldr	r1, .L172+4
	ldr	r2, [fp, #-104]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	cmp	r3, #64
	bne	.L161
	sub	r3, fp, #88
	mov	r0, r3
	bl	SubCell4_inv
	b	.L162
.L161:
	sub	r3, fp, #88
	mov	r0, r3
	bl	SubCell8_inv
.L162:
	ldr	r3, [fp, #-92]
	sub	r3, r3, #1
	str	r3, [fp, #-92]
.L160:
	ldr	r3, [fp, #-92]
	cmp	r3, #0
	bge	.L163
	ldr	r1, .L172+4
	ldr	r2, [fp, #-104]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	cmp	r3, #64
	bne	.L164
	mov	r3, #0
	str	r3, [fp, #-92]
	b	.L165
.L166:
	ldr	r3, [fp, #-92]
	lsl	r3, r3, #1
	asr	r2, r3, #2
	ldr	r3, [fp, #-92]
	lsl	r3, r3, #1
	and	r3, r3, #2
	lsl	r2, r2, #2
	sub	r1, fp, #4
	add	r2, r1, r2
	add	r3, r2, r3
	sub	r3, r3, #84
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #4
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, [fp, #-92]
	lsl	r3, r3, #1
	add	r3, r3, #1
	asr	r1, r3, #2
	ldr	r3, [fp, #-92]
	lsl	r3, r3, #1
	add	r3, r3, #1
	and	r3, r3, #3
	lsl	r1, r1, #2
	sub	r0, fp, #4
	add	r1, r0, r1
	add	r3, r1, r3
	sub	r3, r3, #84
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r3, r3, #15
	lsl	r3, r3, #24
	asr	r3, r3, #24
	orr	r3, r2, r3
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, [fp, #-92]
	ldr	r1, [fp, #-96]
	add	r3, r1, r3
	and	r2, r2, #255
	strb	r2, [r3]
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	str	r3, [fp, #-92]
.L165:
	ldr	r3, [fp, #-92]
	cmp	r3, #7
	ble	.L166
	b	.L171
.L164:
	ldr	r1, .L172+4
	ldr	r2, [fp, #-104]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	cmp	r3, #128
	bne	.L171
	mov	r3, #0
	str	r3, [fp, #-92]
	b	.L168
.L169:
	ldr	r3, [fp, #-92]
	asr	r1, r3, #2
	ldr	r3, [fp, #-92]
	and	r2, r3, #3
	ldr	r3, [fp, #-92]
	ldr	r0, [fp, #-96]
	add	r3, r0, r3
	lsl	r1, r1, #2
	sub	r0, fp, #4
	add	r1, r0, r1
	add	r2, r1, r2
	sub	r2, r2, #84
	ldrb	r2, [r2]	@ zero_extendqisi2
	strb	r2, [r3]
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	str	r3, [fp, #-92]
.L168:
	ldr	r3, [fp, #-92]
	cmp	r3, #15
	ble	.L169
.L171:
	nop
	ldr	r3, .L172
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L170
	bl	__stack_chk_fail
.L170:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L173:
	.align	2
.L172:
	.word	.LC9
	.word	versions
	.size	dec, .-dec
	.section	.rodata
	.align	2
.LC10:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	enc
	.syntax unified
	.arm
	.fpu softvfp
	.type	enc, %function
enc:
	@ args = 0, pretend = 0, frame = 88
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #88
	str	r0, [fp, #-80]
	str	r1, [fp, #-84]
	str	r2, [fp, #-88]
	str	r3, [fp, #-92]
	ldr	r3, .L195
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	sub	r3, fp, #56
	mov	r2, #48
	mov	r1, #0
	mov	r0, r3
	bl	memset
	mov	r3, #0
	str	r3, [fp, #-76]
	b	.L175
.L182:
	ldr	r1, .L195+4
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	cmp	r3, #64
	bne	.L176
	ldr	r3, [fp, #-76]
	and	r3, r3, #1
	cmp	r3, #0
	beq	.L177
	ldr	r3, [fp, #-76]
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, [fp, #-80]
	add	r3, r3, r2
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-76]
	asr	r2, r3, #2
	ldr	r3, [fp, #-76]
	and	r3, r3, #3
	and	r1, r1, #15
	and	r1, r1, #255
	lsl	r2, r2, #2
	sub	r0, fp, #4
	add	r2, r0, r2
	add	r3, r2, r3
	sub	r3, r3, #68
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-76]
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, [fp, #-84]
	add	r3, r3, r2
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-76]
	asr	r2, r3, #2
	ldr	r3, [fp, #-76]
	and	r3, r3, #3
	and	r1, r1, #15
	and	r1, r1, #255
	lsl	r2, r2, #2
	sub	r0, fp, #4
	add	r2, r0, r2
	add	r3, r2, r3
	sub	r3, r3, #52
	mov	r2, r1
	strb	r2, [r3]
	ldr	r1, .L195+4
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #127
	ble	.L178
	ldr	r3, [fp, #-76]
	add	r3, r3, #16
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, [fp, #-84]
	add	r3, r3, r2
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-76]
	asr	r2, r3, #2
	ldr	r3, [fp, #-76]
	and	r3, r3, #3
	and	r1, r1, #15
	and	r1, r1, #255
	lsl	r2, r2, #2
	sub	r0, fp, #4
	add	r2, r0, r2
	add	r3, r2, r3
	sub	r3, r3, #36
	mov	r2, r1
	strb	r2, [r3]
.L178:
	ldr	r1, .L195+4
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #191
	ble	.L179
	ldr	r3, [fp, #-76]
	add	r3, r3, #32
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, [fp, #-84]
	add	r3, r3, r2
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-76]
	asr	r2, r3, #2
	ldr	r3, [fp, #-76]
	and	r3, r3, #3
	and	r1, r1, #15
	and	r1, r1, #255
	lsl	r2, r2, #2
	sub	r0, fp, #4
	add	r2, r0, r2
	add	r3, r2, r3
	sub	r3, r3, #20
	mov	r2, r1
	strb	r2, [r3]
	b	.L179
.L177:
	ldr	r3, [fp, #-76]
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, [fp, #-80]
	add	r3, r3, r2
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-76]
	asr	r2, r3, #2
	ldr	r3, [fp, #-76]
	and	r3, r3, #3
	lsr	r1, r1, #4
	and	r1, r1, #255
	lsl	r2, r2, #2
	sub	r0, fp, #4
	add	r2, r0, r2
	add	r3, r2, r3
	sub	r3, r3, #68
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-76]
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, [fp, #-84]
	add	r3, r3, r2
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-76]
	asr	r2, r3, #2
	ldr	r3, [fp, #-76]
	and	r3, r3, #3
	lsr	r1, r1, #4
	and	r1, r1, #255
	lsl	r2, r2, #2
	sub	r0, fp, #4
	add	r2, r0, r2
	add	r3, r2, r3
	sub	r3, r3, #52
	mov	r2, r1
	strb	r2, [r3]
	ldr	r1, .L195+4
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #127
	ble	.L180
	ldr	r3, [fp, #-76]
	add	r3, r3, #16
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, [fp, #-84]
	add	r3, r3, r2
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-76]
	asr	r2, r3, #2
	ldr	r3, [fp, #-76]
	and	r3, r3, #3
	lsr	r1, r1, #4
	and	r1, r1, #255
	lsl	r2, r2, #2
	sub	r0, fp, #4
	add	r2, r0, r2
	add	r3, r2, r3
	sub	r3, r3, #36
	mov	r2, r1
	strb	r2, [r3]
.L180:
	ldr	r1, .L195+4
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #191
	ble	.L179
	ldr	r3, [fp, #-76]
	add	r3, r3, #32
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, [fp, #-84]
	add	r3, r3, r2
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-76]
	asr	r2, r3, #2
	ldr	r3, [fp, #-76]
	and	r3, r3, #3
	lsr	r1, r1, #4
	and	r1, r1, #255
	lsl	r2, r2, #2
	sub	r0, fp, #4
	add	r2, r0, r2
	add	r3, r2, r3
	sub	r3, r3, #20
	mov	r2, r1
	strb	r2, [r3]
	b	.L179
.L176:
	ldr	r1, .L195+4
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	cmp	r3, #128
	bne	.L179
	ldr	r3, [fp, #-76]
	ldr	r2, [fp, #-80]
	add	r1, r2, r3
	ldr	r3, [fp, #-76]
	asr	r2, r3, #2
	ldr	r3, [fp, #-76]
	and	r3, r3, #3
	ldrb	r1, [r1]	@ zero_extendqisi2
	lsl	r2, r2, #2
	sub	r0, fp, #4
	add	r2, r0, r2
	add	r3, r2, r3
	sub	r3, r3, #68
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-76]
	ldr	r2, [fp, #-84]
	add	r1, r2, r3
	ldr	r3, [fp, #-76]
	asr	r2, r3, #2
	ldr	r3, [fp, #-76]
	and	r3, r3, #3
	ldrb	r1, [r1]	@ zero_extendqisi2
	lsl	r2, r2, #2
	sub	r0, fp, #4
	add	r2, r0, r2
	add	r3, r2, r3
	sub	r3, r3, #52
	mov	r2, r1
	strb	r2, [r3]
	ldr	r1, .L195+4
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #255
	ble	.L181
	ldr	r3, [fp, #-76]
	add	r3, r3, #16
	ldr	r2, [fp, #-84]
	add	r1, r2, r3
	ldr	r3, [fp, #-76]
	asr	r2, r3, #2
	ldr	r3, [fp, #-76]
	and	r3, r3, #3
	ldrb	r1, [r1]	@ zero_extendqisi2
	lsl	r2, r2, #2
	sub	r0, fp, #4
	add	r2, r0, r2
	add	r3, r2, r3
	sub	r3, r3, #36
	mov	r2, r1
	strb	r2, [r3]
.L181:
	ldr	r1, .L195+4
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #384
	blt	.L179
	ldr	r3, [fp, #-76]
	add	r3, r3, #32
	ldr	r2, [fp, #-84]
	add	r1, r2, r3
	ldr	r3, [fp, #-76]
	asr	r2, r3, #2
	ldr	r3, [fp, #-76]
	and	r3, r3, #3
	ldrb	r1, [r1]	@ zero_extendqisi2
	lsl	r2, r2, #2
	sub	r0, fp, #4
	add	r2, r0, r2
	add	r3, r2, r3
	sub	r3, r3, #20
	mov	r2, r1
	strb	r2, [r3]
.L179:
	ldr	r3, [fp, #-76]
	add	r3, r3, #1
	str	r3, [fp, #-76]
.L175:
	ldr	r3, [fp, #-76]
	cmp	r3, #15
	ble	.L182
	mov	r3, #0
	str	r3, [fp, #-76]
	b	.L183
.L186:
	ldr	r1, .L195+4
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	cmp	r3, #64
	bne	.L184
	sub	r3, fp, #72
	mov	r0, r3
	bl	SubCell4
	b	.L185
.L184:
	sub	r3, fp, #72
	mov	r0, r3
	bl	SubCell8
.L185:
	sub	r3, fp, #72
	ldr	r1, [fp, #-76]
	mov	r0, r3
	bl	AddConstants
	sub	r1, fp, #56
	sub	r3, fp, #72
	ldr	r2, [fp, #-88]
	mov	r0, r3
	bl	AddKey
	sub	r3, fp, #72
	mov	r0, r3
	bl	ShiftRows
	sub	r3, fp, #72
	mov	r0, r3
	bl	MixColumn
	ldr	r3, [fp, #-76]
	add	r3, r3, #1
	str	r3, [fp, #-76]
.L183:
	ldr	r2, [fp, #-76]
	ldr	r3, [fp, #-92]
	cmp	r2, r3
	blt	.L186
	ldr	r1, .L195+4
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	cmp	r3, #64
	bne	.L187
	mov	r3, #0
	str	r3, [fp, #-76]
	b	.L188
.L189:
	ldr	r3, [fp, #-76]
	lsl	r3, r3, #1
	asr	r2, r3, #2
	ldr	r3, [fp, #-76]
	lsl	r3, r3, #1
	and	r3, r3, #2
	lsl	r2, r2, #2
	sub	r1, fp, #4
	add	r2, r1, r2
	add	r3, r2, r3
	sub	r3, r3, #68
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #4
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, [fp, #-76]
	lsl	r3, r3, #1
	add	r3, r3, #1
	asr	r1, r3, #2
	ldr	r3, [fp, #-76]
	lsl	r3, r3, #1
	add	r3, r3, #1
	and	r3, r3, #3
	lsl	r1, r1, #2
	sub	r0, fp, #4
	add	r1, r0, r1
	add	r3, r1, r3
	sub	r3, r3, #68
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r3, r3, #15
	lsl	r3, r3, #24
	asr	r3, r3, #24
	orr	r3, r2, r3
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, [fp, #-76]
	ldr	r1, [fp, #-80]
	add	r3, r1, r3
	and	r2, r2, #255
	strb	r2, [r3]
	ldr	r3, [fp, #-76]
	add	r3, r3, #1
	str	r3, [fp, #-76]
.L188:
	ldr	r3, [fp, #-76]
	cmp	r3, #7
	ble	.L189
	b	.L194
.L187:
	ldr	r1, .L195+4
	ldr	r2, [fp, #-88]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	cmp	r3, #128
	bne	.L194
	mov	r3, #0
	str	r3, [fp, #-76]
	b	.L191
.L192:
	ldr	r3, [fp, #-76]
	asr	r1, r3, #2
	ldr	r3, [fp, #-76]
	and	r2, r3, #3
	ldr	r3, [fp, #-76]
	ldr	r0, [fp, #-80]
	add	r3, r0, r3
	lsl	r1, r1, #2
	sub	r0, fp, #4
	add	r1, r0, r1
	add	r2, r1, r2
	sub	r2, r2, #68
	ldrb	r2, [r2]	@ zero_extendqisi2
	strb	r2, [r3]
	ldr	r3, [fp, #-76]
	add	r3, r3, #1
	str	r3, [fp, #-76]
.L191:
	ldr	r3, [fp, #-76]
	cmp	r3, #15
	ble	.L192
.L194:
	nop
	ldr	r3, .L195
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L193
	bl	__stack_chk_fail
.L193:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L196:
	.align	2
.L195:
	.word	.LC10
	.word	versions
	.size	enc, .-enc
	.section	.rodata
	.align	2
.LC11:
	.ascii	"TK = \000"
	.align	2
.LC12:
	.ascii	"P =  \000"
	.align	2
.LC13:
	.ascii	"C =  \000"
	.align	2
.LC14:
	.ascii	"P' = \000"
	.align	2
.LC15:
	.ascii	"\012\012\000"
	.align	2
.LC16:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	TestVectors
	.syntax unified
	.arm
	.fpu softvfp
	.type	TestVectors, %function
TestVectors:
	@ args = 0, pretend = 0, frame = 104
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #104
	str	r0, [fp, #-104]
	ldr	r3, .L215
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	mov	r3, #1
	str	r3, [fp, #-96]
	b	.L198
.L213:
	mov	r3, #0
	str	r3, [fp, #-92]
	b	.L199
.L200:
	bl	rand
	mov	r3, r0
	and	r1, r3, #255
	sub	r2, fp, #88
	ldr	r3, [fp, #-92]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	sub	r2, fp, #88
	ldr	r3, [fp, #-92]
	add	r3, r2, r3
	ldrb	r1, [r3]	@ zero_extendqisi2
	sub	r2, fp, #72
	ldr	r3, [fp, #-92]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	str	r3, [fp, #-92]
.L199:
	ldr	r1, .L215+4
	ldr	r2, [fp, #-104]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	asr	r3, r3, #3
	ldr	r2, [fp, #-92]
	cmp	r2, r3
	blt	.L200
	mov	r3, #0
	str	r3, [fp, #-92]
	b	.L201
.L202:
	sub	r2, fp, #88
	ldr	r3, [fp, #-92]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r0, .L215+8
	bl	printf
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	str	r3, [fp, #-92]
.L201:
	ldr	r1, .L215+4
	ldr	r2, [fp, #-104]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	asr	r3, r3, #3
	ldr	r2, [fp, #-92]
	cmp	r2, r3
	blt	.L202
	mov	r0, #10
	bl	putchar
	mov	r3, #0
	str	r3, [fp, #-92]
	b	.L203
.L204:
	bl	rand
	mov	r3, r0
	and	r1, r3, #255
	sub	r2, fp, #56
	ldr	r3, [fp, #-92]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	str	r3, [fp, #-92]
.L203:
	ldr	r1, .L215+4
	ldr	r2, [fp, #-104]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #4
	ldr	r3, [r3]
	asr	r3, r3, #3
	ldr	r2, [fp, #-92]
	cmp	r2, r3
	blt	.L204
	ldr	r3, .L215+12
	ldr	r3, [r3]
	mov	r2, #5
	mov	r1, #1
	ldr	r0, .L215+16
	bl	fwrite
	mov	r3, #0
	str	r3, [fp, #-92]
	b	.L205
.L206:
	ldr	r3, .L215+12
	ldr	r0, [r3]
	sub	r2, fp, #56
	ldr	r3, [fp, #-92]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, .L215+8
	bl	fprintf
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	str	r3, [fp, #-92]
.L205:
	ldr	r1, .L215+4
	ldr	r2, [fp, #-104]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #4
	ldr	r3, [r3]
	asr	r3, r3, #3
	ldr	r2, [fp, #-92]
	cmp	r2, r3
	blt	.L206
	ldr	r3, .L215+12
	ldr	r3, [r3]
	mov	r1, r3
	mov	r0, #10
	bl	fputc
	ldr	r3, .L215+12
	ldr	r3, [r3]
	mov	r2, #5
	mov	r1, #1
	ldr	r0, .L215+20
	bl	fwrite
	mov	r3, #0
	str	r3, [fp, #-92]
	b	.L207
.L208:
	ldr	r3, .L215+12
	ldr	r0, [r3]
	sub	r2, fp, #88
	ldr	r3, [fp, #-92]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, .L215+8
	bl	fprintf
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	str	r3, [fp, #-92]
.L207:
	ldr	r1, .L215+4
	ldr	r2, [fp, #-104]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	asr	r3, r3, #3
	ldr	r2, [fp, #-92]
	cmp	r2, r3
	blt	.L208
	ldr	r3, .L215+12
	ldr	r3, [r3]
	mov	r1, r3
	mov	r0, #10
	bl	fputc
	sub	r1, fp, #56
	sub	r0, fp, #72
	mov	r3, #10
	ldr	r2, [fp, #-104]
	bl	enc
	ldr	r3, .L215+12
	ldr	r3, [r3]
	mov	r2, #5
	mov	r1, #1
	ldr	r0, .L215+24
	bl	fwrite
	mov	r3, #0
	str	r3, [fp, #-92]
	b	.L209
.L210:
	ldr	r3, .L215+12
	ldr	r0, [r3]
	sub	r2, fp, #72
	ldr	r3, [fp, #-92]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, .L215+8
	bl	fprintf
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	str	r3, [fp, #-92]
.L209:
	ldr	r1, .L215+4
	ldr	r2, [fp, #-104]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	asr	r3, r3, #3
	ldr	r2, [fp, #-92]
	cmp	r2, r3
	blt	.L210
	ldr	r3, .L215+12
	ldr	r3, [r3]
	mov	r1, r3
	mov	r0, #10
	bl	fputc
	sub	r1, fp, #56
	sub	r0, fp, #72
	mov	r3, #10
	ldr	r2, [fp, #-104]
	bl	dec
	ldr	r3, .L215+12
	ldr	r3, [r3]
	mov	r2, #5
	mov	r1, #1
	ldr	r0, .L215+28
	bl	fwrite
	mov	r3, #0
	str	r3, [fp, #-92]
	b	.L211
.L212:
	ldr	r3, .L215+12
	ldr	r0, [r3]
	sub	r2, fp, #72
	ldr	r3, [fp, #-92]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, .L215+8
	bl	fprintf
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	str	r3, [fp, #-92]
.L211:
	ldr	r1, .L215+4
	ldr	r2, [fp, #-104]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	asr	r3, r3, #3
	ldr	r2, [fp, #-92]
	cmp	r2, r3
	blt	.L212
	ldr	r3, .L215+12
	ldr	r3, [r3]
	mov	r2, #2
	mov	r1, #1
	ldr	r0, .L215+32
	bl	fwrite
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	str	r3, [fp, #-96]
.L198:
	ldr	r3, [fp, #-96]
	cmp	r3, #9
	ble	.L213
	nop
	ldr	r3, .L215
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L214
	bl	__stack_chk_fail
.L214:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L216:
	.align	2
.L215:
	.word	.LC16
	.word	versions
	.word	.LC1
	.word	fic
	.word	.LC11
	.word	.LC12
	.word	.LC13
	.word	.LC14
	.word	.LC15
	.size	TestVectors, .-TestVectors
	.section	.rodata
	.align	2
.LC17:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	boomerang
	.syntax unified
	.arm
	.fpu softvfp
	.type	boomerang, %function
boomerang:
	@ args = 12, pretend = 0, frame = 312
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #312
	str	r0, [fp, #-288]
	str	r1, [fp, #-292]
	str	r2, [fp, #-296]
	str	r3, [fp, #-300]
	ldr	r3, [fp, #4]
	str	r3, [fp, #-304]
	ldr	r3, [fp, #8]
	str	r3, [fp, #-308]
	ldr	r3, [fp, #12]
	str	r3, [fp, #-312]
	ldr	r3, .L242
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	mov	r3, #0
	str	r3, [fp, #-276]
	b	.L218
.L219:
	bl	rand
	mov	r3, r0
	and	r1, r3, #255
	sub	r2, fp, #200
	ldr	r3, [fp, #-276]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-276]
	add	r3, r3, #1
	str	r3, [fp, #-276]
.L218:
	ldr	r1, .L242+4
	ldr	r2, [fp, #-292]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #4
	ldr	r3, [r3]
	asr	r3, r3, #3
	ldr	r2, [fp, #-276]
	cmp	r2, r3
	blt	.L219
	mov	r3, #0
	str	r3, [fp, #-276]
	b	.L220
.L221:
	sub	r2, fp, #200
	ldr	r3, [fp, #-276]
	add	r3, r2, r3
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-276]
	ldr	r1, [fp, #-308]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r1, r3, #255
	sub	r2, fp, #152
	ldr	r3, [fp, #-276]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-276]
	add	r3, r3, #1
	str	r3, [fp, #-276]
.L220:
	ldr	r1, .L242+4
	ldr	r2, [fp, #-292]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #4
	ldr	r3, [r3]
	asr	r3, r3, #3
	ldr	r2, [fp, #-276]
	cmp	r2, r3
	blt	.L221
	mov	r3, #0
	str	r3, [fp, #-276]
	b	.L222
.L223:
	sub	r2, fp, #200
	ldr	r3, [fp, #-276]
	add	r3, r2, r3
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-276]
	ldr	r1, [fp, #-312]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r1, r3, #255
	sub	r2, fp, #104
	ldr	r3, [fp, #-276]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-276]
	add	r3, r3, #1
	str	r3, [fp, #-276]
.L222:
	ldr	r1, .L242+4
	ldr	r2, [fp, #-292]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #4
	ldr	r3, [r3]
	asr	r3, r3, #3
	ldr	r2, [fp, #-276]
	cmp	r2, r3
	blt	.L223
	mov	r3, #0
	str	r3, [fp, #-276]
	b	.L224
.L225:
	sub	r2, fp, #152
	ldr	r3, [fp, #-276]
	add	r3, r2, r3
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-276]
	ldr	r1, [fp, #-312]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r1, r3, #255
	sub	r2, fp, #56
	ldr	r3, [fp, #-276]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-276]
	add	r3, r3, #1
	str	r3, [fp, #-276]
.L224:
	ldr	r1, .L242+4
	ldr	r2, [fp, #-292]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #4
	ldr	r3, [r3]
	asr	r3, r3, #3
	ldr	r2, [fp, #-276]
	cmp	r2, r3
	blt	.L225
	mov	r3, #0
	str	r3, [fp, #-272]
	mov	r3, #0
	str	r3, [fp, #-268]
	b	.L226
.L239:
	mov	r3, #0
	str	r3, [fp, #-276]
	b	.L227
.L228:
	bl	rand
	mov	r3, r0
	lsl	r3, r3, #24
	asr	r2, r3, #24
	sub	r1, fp, #232
	ldr	r3, [fp, #-276]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	eor	r3, r3, r2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r1, r3, #255
	sub	r2, fp, #264
	ldr	r3, [fp, #-276]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-276]
	add	r3, r3, #1
	str	r3, [fp, #-276]
.L227:
	ldr	r1, .L242+4
	ldr	r2, [fp, #-292]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	asr	r3, r3, #3
	ldr	r2, [fp, #-276]
	cmp	r2, r3
	blt	.L228
	mov	r3, #0
	str	r3, [fp, #-276]
	b	.L229
.L230:
	sub	r2, fp, #264
	ldr	r3, [fp, #-276]
	add	r3, r2, r3
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-276]
	ldr	r1, [fp, #-300]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r1, r3, #255
	sub	r2, fp, #248
	ldr	r3, [fp, #-276]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-276]
	add	r3, r3, #1
	str	r3, [fp, #-276]
.L229:
	ldr	r1, .L242+4
	ldr	r2, [fp, #-292]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	asr	r3, r3, #3
	ldr	r2, [fp, #-276]
	cmp	r2, r3
	blt	.L230
	sub	r1, fp, #200
	sub	r0, fp, #264
	ldr	r3, [fp, #-288]
	ldr	r2, [fp, #-292]
	bl	enc
	sub	r1, fp, #152
	sub	r0, fp, #248
	ldr	r3, [fp, #-288]
	ldr	r2, [fp, #-292]
	bl	enc
	mov	r3, #0
	str	r3, [fp, #-276]
	b	.L231
.L232:
	sub	r2, fp, #264
	ldr	r3, [fp, #-276]
	add	r3, r2, r3
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-276]
	ldr	r1, [fp, #-304]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r1, r3, #255
	sub	r2, fp, #232
	ldr	r3, [fp, #-276]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-276]
	add	r3, r3, #1
	str	r3, [fp, #-276]
.L231:
	ldr	r1, .L242+4
	ldr	r2, [fp, #-292]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	asr	r3, r3, #3
	ldr	r2, [fp, #-276]
	cmp	r2, r3
	blt	.L232
	mov	r3, #0
	str	r3, [fp, #-276]
	b	.L233
.L234:
	sub	r2, fp, #248
	ldr	r3, [fp, #-276]
	add	r3, r2, r3
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-276]
	ldr	r1, [fp, #-304]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r1, r3, #255
	sub	r2, fp, #216
	ldr	r3, [fp, #-276]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-276]
	add	r3, r3, #1
	str	r3, [fp, #-276]
.L233:
	ldr	r1, .L242+4
	ldr	r2, [fp, #-292]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	asr	r3, r3, #3
	ldr	r2, [fp, #-276]
	cmp	r2, r3
	blt	.L234
	sub	r1, fp, #104
	sub	r0, fp, #232
	ldr	r3, [fp, #-288]
	ldr	r2, [fp, #-292]
	bl	dec
	sub	r1, fp, #56
	sub	r0, fp, #216
	ldr	r3, [fp, #-288]
	ldr	r2, [fp, #-292]
	bl	dec
	mov	r3, #1
	strb	r3, [fp, #-277]
	mov	r3, #0
	str	r3, [fp, #-276]
	b	.L235
.L237:
	sub	r2, fp, #232
	ldr	r3, [fp, #-276]
	add	r3, r2, r3
	ldrb	r2, [r3]	@ zero_extendqisi2
	sub	r1, fp, #216
	ldr	r3, [fp, #-276]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r2, r3, #255
	ldr	r3, [fp, #-276]
	ldr	r1, [fp, #-300]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r2, r3
	beq	.L236
	mov	r3, #0
	strb	r3, [fp, #-277]
.L236:
	ldr	r3, [fp, #-276]
	add	r3, r3, #1
	str	r3, [fp, #-276]
.L235:
	ldr	r1, .L242+4
	ldr	r2, [fp, #-292]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	asr	r3, r3, #3
	ldr	r2, [fp, #-276]
	cmp	r2, r3
	blt	.L237
	ldrb	r3, [fp, #-277]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L238
	ldr	r3, [fp, #-272]
	add	r3, r3, #1
	str	r3, [fp, #-272]
.L238:
	ldr	r3, [fp, #-268]
	add	r3, r3, #1
	str	r3, [fp, #-268]
.L226:
	ldr	r2, [fp, #-268]
	ldr	r3, [fp, #-296]
	cmp	r2, r3
	blt	.L239
	ldr	r3, [fp, #-272]
	ldr	r2, .L242
	ldr	r1, [r2]
	ldr	r2, [fp, #-8]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L241
	bl	__stack_chk_fail
.L241:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L243:
	.align	2
.L242:
	.word	.LC17
	.word	versions
	.size	boomerang, .-boomerang
	.section	.rodata
	.align	2
.LC18:
	.ascii	"#Rounds: %d rounds\012\000"
	.global	__aeabi_i2d
	.global	__aeabi_ddiv
	.align	2
.LC19:
	.ascii	"#Total Queries = (#Parallel threads) * (#Bunches pe"
	.ascii	"r thread) * (#Queries per bunch) = %d * %d * %d = 2"
	.ascii	"^(%f)\012\000"
	.align	2
.LC20:
	.ascii	"time on clock\000"
	.align	2
.LC21:
	.ascii	"%s: %0.4f\012\000"
	.global	__aeabi_dsub
	.align	2
.LC22:
	.ascii	"time on wall\000"
	.global	__aeabi_dadd
	.align	2
.LC23:
	.ascii	"sum = %f\012\000"
	.align	2
.LC24:
	.ascii	"2^(-%f)\012\012\000"
	.align	2
.LC25:
	.ascii	"##########################\000"
	.align	2
.LC26:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	send_boomerangs
	.syntax unified
	.arm
	.fpu softvfp
	.type	send_boomerangs, %function
send_boomerangs:
	@ args = 20, pretend = 0, frame = 96
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #116
	str	r0, [fp, #-80]
	str	r1, [fp, #-84]
	str	r2, [fp, #-88]
	str	r3, [fp, #-92]
	ldr	r3, [fp, #8]
	str	r3, [fp, #-96]
	ldr	r3, [fp, #12]
	str	r3, [fp, #-100]
	ldr	r3, [fp, #16]
	str	r3, [fp, #-104]
	ldr	r3, [fp, #20]
	str	r3, [fp, #-108]
	ldr	r3, .L253
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	mov	r3,#0
	mov	r3, sp
	mov	r4, r3
	ldr	ip, [fp, #-88]
	sub	r3, ip, #1
	str	r3, [fp, #-60]
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	lsl	r3, r3, #2
	add	r3, r3, #7
	lsr	r3, r3, #3
	lsl	r3, r3, #3
	sub	sp, sp, r3
	add	r3, sp, #16
	add	r3, r3, #3
	lsr	r3, r3, #2
	lsl	r3, r3, #2
	str	r3, [fp, #-56]
	ldr	r1, [fp, #-80]
	ldr	r0, .L253+4
	bl	printf
	ldr	r3, [fp, #-88]
	ldr	r2, [fp, #-92]
	mul	r3, r2, r3
	ldr	r2, [fp, #4]
	mul	r3, r2, r3
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	log
	ldr	r2, .L253+8
	ldr	r3, .L253+12
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	stm	sp, {r2-r3}
	ldr	r3, [fp, #4]
	ldr	r2, [fp, #-92]
	ldr	r1, [fp, #-88]
	ldr	r0, .L253+16
	bl	printf
	bl	clock
	str	r0, [fp, #-52]
	bl	omp_get_wtime
	str	r0, [fp, #-36]
	str	r1, [fp, #-32]
	ldr	r0, [fp, #-88]
	bl	omp_set_num_threads
	mov	r3, #0
	str	r3, [fp, #-64]
	b	.L245
.L248:
	mov	r3, #0
	str	r3, [fp, #-68]
	bl	omp_get_thread_num
	str	r0, [fp, #-48]
	ldr	r0, [fp, #-48]
	bl	init_prng
	mov	r3, #0
	str	r3, [fp, #-72]
	b	.L246
.L247:
	ldr	r3, [fp, #-108]
	str	r3, [sp, #8]
	ldr	r3, [fp, #-104]
	str	r3, [sp, #4]
	ldr	r3, [fp, #-100]
	str	r3, [sp]
	ldr	r3, [fp, #-96]
	ldr	r2, [fp, #4]
	ldr	r1, [fp, #-84]
	ldr	r0, [fp, #-80]
	bl	boomerang
	mov	r2, r0
	ldr	r3, [fp, #-68]
	add	r3, r3, r2
	str	r3, [fp, #-68]
	ldr	r3, [fp, #-72]
	add	r3, r3, #1
	str	r3, [fp, #-72]
.L246:
	ldr	r2, [fp, #-72]
	ldr	r3, [fp, #-92]
	cmp	r2, r3
	blt	.L247
	ldr	r3, [fp, #-56]
	ldr	r2, [fp, #-48]
	ldr	r1, [fp, #-68]
	str	r1, [r3, r2, lsl #2]
	ldr	r3, [fp, #-64]
	add	r3, r3, #1
	str	r3, [fp, #-64]
.L245:
	ldr	r2, [fp, #-64]
	ldr	r3, [fp, #-88]
	cmp	r2, r3
	blt	.L248
	bl	clock
	mov	r2, r0
	ldr	r3, [fp, #-52]
	sub	r3, r2, r3
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, #0
	ldr	r3, .L253+20
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L253+24
	ldr	r0, .L253+28
	bl	printf
	bl	omp_get_wtime
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L253+32
	ldr	r0, .L253+28
	bl	printf
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	mov	r2, #0
	ldr	r3, .L253+36
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	mov	r3, #0
	str	r3, [fp, #-76]
	b	.L249
.L250:
	ldr	r3, [fp, #-56]
	ldr	r2, [fp, #-76]
	ldr	r3, [r3, r2, lsl #2]
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	ldr	r3, [fp, #-76]
	add	r3, r3, #1
	str	r3, [fp, #-76]
.L249:
	ldr	r2, [fp, #-76]
	ldr	r3, [fp, #-88]
	cmp	r2, r3
	blt	.L250
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	ldr	r0, .L253+40
	bl	printf
	ldr	r3, [fp, #-88]
	ldr	r2, [fp, #-92]
	mul	r3, r2, r3
	ldr	r2, [fp, #4]
	mul	r3, r2, r3
	mov	r0, r3
	bl	__aeabi_i2d
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	sub	r1, fp, #28
	ldmia	r1, {r0-r1}
	bl	log
	ldr	r2, .L253+8
	ldr	r3, .L253+12
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L253+44
	bl	printf
	ldr	r0, .L253+48
	bl	puts
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	sp, r4
	ldr	r1, .L253
	ldr	r0, [r1]
	ldr	r1, [fp, #-16]
	eors	r0, r1, r0
	mov	r1, #0
	beq	.L252
	bl	__stack_chk_fail
.L252:
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L254:
	.align	2
.L253:
	.word	.LC26
	.word	.LC18
	.word	-17155601
	.word	1072049730
	.word	.LC19
	.word	1093567616
	.word	.LC20
	.word	.LC21
	.word	.LC22
	.word	1072693248
	.word	.LC23
	.word	.LC24
	.word	.LC25
	.size	send_boomerangs, .-send_boomerangs
	.section	.rodata
	.align	2
.LC27:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	convert_hexstr_to_statearray
	.syntax unified
	.arm
	.fpu softvfp
	.type	convert_hexstr_to_statearray, %function
convert_hexstr_to_statearray:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #32
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	str	r2, [fp, #-32]
	ldr	r3, .L259
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	mov	r3, #0
	str	r3, [fp, #-16]
	b	.L256
.L257:
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #1
	mov	r2, r3
	ldr	r3, [fp, #-28]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	strb	r3, [fp, #-12]
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #1
	add	r3, r3, #1
	ldr	r2, [fp, #-28]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	strb	r3, [fp, #-11]
	sub	r3, fp, #12
	mov	r2, #16
	mov	r1, #0
	mov	r0, r3
	bl	strtol
	mov	r1, r0
	ldr	r3, [fp, #-16]
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	and	r2, r1, #255
	strb	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	str	r3, [fp, #-16]
.L256:
	ldr	r1, .L259+4
	ldr	r2, [fp, #-24]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	asr	r3, r3, #3
	ldr	r2, [fp, #-16]
	cmp	r2, r3
	blt	.L257
	nop
	ldr	r3, .L259
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L258
	bl	__stack_chk_fail
.L258:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L260:
	.align	2
.L259:
	.word	.LC27
	.word	versions
	.size	convert_hexstr_to_statearray, .-convert_hexstr_to_statearray
	.section	.rodata
	.align	2
.LC28:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	convert_hexstr_to_tweakarray
	.syntax unified
	.arm
	.fpu softvfp
	.type	convert_hexstr_to_tweakarray, %function
convert_hexstr_to_tweakarray:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #32
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	str	r2, [fp, #-32]
	ldr	r3, .L265
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	mov	r3, #0
	str	r3, [fp, #-16]
	b	.L262
.L263:
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #1
	mov	r2, r3
	ldr	r3, [fp, #-28]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	strb	r3, [fp, #-12]
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #1
	add	r3, r3, #1
	ldr	r2, [fp, #-28]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	strb	r3, [fp, #-11]
	sub	r3, fp, #12
	mov	r2, #16
	mov	r1, #0
	mov	r0, r3
	bl	strtol
	mov	r1, r0
	ldr	r3, [fp, #-16]
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	and	r2, r1, #255
	strb	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	str	r3, [fp, #-16]
.L262:
	ldr	r1, .L265+4
	ldr	r2, [fp, #-24]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #4
	ldr	r3, [r3]
	asr	r3, r3, #3
	ldr	r2, [fp, #-16]
	cmp	r2, r3
	blt	.L263
	nop
	ldr	r3, .L265
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L264
	bl	__stack_chk_fail
.L264:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L266:
	.align	2
.L265:
	.word	.LC28
	.word	versions
	.size	convert_hexstr_to_tweakarray, .-convert_hexstr_to_tweakarray
	.section	.rodata
	.align	2
.LC33:
	.ascii	"\012Average = 2^(-%0.4f)\012\000"
	.align	2
.LC29:
	.ascii	"0000000000020000\000"
	.align	2
.LC30:
	.ascii	"0000000000000000\000"
	.align	2
.LC31:
	.ascii	"00000000000000B000000000000000A00000000000000030\000"
	.align	2
.LC32:
	.ascii	"000000000004000000000000000B00000000000000090000\000"
	.align	2
.LC34:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 328
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #352
	ldr	r3, .L272
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	mov	r3,#0
	mov	r3, #100
	str	r3, [fp, #-332]
	mov	r3, #6
	str	r3, [fp, #-328]
	mov	r3, #2
	str	r3, [fp, #-324]
	ldr	r3, .L272+4
	sub	ip, fp, #256
	mov	lr, r3
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldr	r3, [lr]
	strb	r3, [ip]
	ldr	r3, .L272+8
	sub	ip, fp, #236
	mov	lr, r3
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldr	r3, [lr]
	strb	r3, [ip]
	ldr	r3, .L272+12
	sub	ip, fp, #120
	mov	lr, r3
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldr	r3, [lr]
	strb	r3, [ip]
	ldr	r3, .L272+16
	sub	ip, fp, #68
	mov	lr, r3
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldr	r3, [lr]
	strb	r3, [ip]
	sub	r2, fp, #288
	sub	r3, fp, #256
	mov	r1, r3
	ldr	r0, [fp, #-324]
	bl	convert_hexstr_to_statearray
	sub	r2, fp, #272
	sub	r3, fp, #236
	mov	r1, r3
	ldr	r0, [fp, #-324]
	bl	convert_hexstr_to_statearray
	sub	r2, fp, #216
	sub	r3, fp, #120
	mov	r1, r3
	ldr	r0, [fp, #-324]
	bl	convert_hexstr_to_tweakarray
	sub	r2, fp, #168
	sub	r3, fp, #68
	mov	r1, r3
	ldr	r0, [fp, #-324]
	bl	convert_hexstr_to_tweakarray
	mov	r3, #16
	str	r3, [fp, #-320]
	mov	r3, #10
	str	r3, [fp, #-316]
	mov	r3, #12
	str	r3, [fp, #-312]
	mov	r2, #1
	ldr	r3, [fp, #-316]
	lsl	r3, r2, r3
	str	r3, [fp, #-308]
	mov	r2, #1
	ldr	r3, [fp, #-312]
	lsl	r3, r2, r3
	str	r3, [fp, #-304]
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-300]
	str	r3, [fp, #-296]
	mov	r3, #0
	str	r3, [fp, #-336]
	b	.L268
.L269:
	sub	r3, fp, #168
	str	r3, [sp, #16]
	sub	r3, fp, #216
	str	r3, [sp, #12]
	sub	r3, fp, #272
	str	r3, [sp, #8]
	sub	r3, fp, #288
	str	r3, [sp, #4]
	ldr	r3, [fp, #-304]
	str	r3, [sp]
	ldr	r3, [fp, #-308]
	ldr	r2, [fp, #-320]
	ldr	r1, [fp, #-324]
	ldr	r0, [fp, #-328]
	bl	send_boomerangs
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #300
	ldmia	r1, {r0-r1}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-300]
	str	r3, [fp, #-296]
	ldr	r3, [fp, #-336]
	add	r3, r3, #1
	str	r3, [fp, #-336]
.L268:
	ldr	r2, [fp, #-336]
	ldr	r3, [fp, #-332]
	cmp	r2, r3
	blt	.L269
	ldr	r0, [fp, #-332]
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	log
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-320]
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	log
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r0, [fp, #-308]
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	log
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r0, [fp, #-304]
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	log
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	sub	r1, fp, #300
	ldmia	r1, {r0-r1}
	bl	log
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	ldr	r2, .L272+20
	ldr	r3, .L272+24
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L272+28
	bl	printf
	mov	r3, #0
	ldr	r2, .L272
	ldr	r1, [r2]
	ldr	r2, [fp, #-16]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L271
	bl	__stack_chk_fail
.L271:
	mov	r0, r3
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L273:
	.align	2
.L272:
	.word	.LC34
	.word	.LC29
	.word	.LC30
	.word	.LC31
	.word	.LC32
	.word	-17155601
	.word	1072049730
	.word	.LC33
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
