	.file	"87327.c"
	.intel_syntax noprefix
	.text
	.globl	datasize
	.data
	.align 4
	.type	datasize, @object
	.size	datasize, 4
datasize:
	.long	-1
	.globl	reps
	.align 4
	.type	reps, @object
	.size	reps, 4
reps:
	.long	-1
	.globl	times
	.bss
	.align 8
	.type	times, @object
	.size	times, 8
times:
	.zero	8
	.globl	testtime
	.align 8
	.type	testtime, @object
	.size	testtime, 8
testtime:
	.zero	8
	.globl	testsd
	.align 8
	.type	testsd, @object
	.size	testsd, 8
testsd:
	.zero	8
	.globl	flag
	.align 4
	.type	flag, @object
	.size	flag, 4
flag:
	.zero	4
	.section	.rodata
	.align 8
.LC0:
	.string	"Usage: %s \n\t--reps <repetitions> (default %d)\n\t--datasize <datasize> (default %d bytes)\n"
	.text
	.globl	usage
	.type	usage, @function
usage:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR [rax]
	mov	ecx, 1048576
	mov	edx, 10
	mov	rsi, rax
	lea	rdi, .LC0[rip]
	mov	eax, 0
	call	printf@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	usage, .-usage
	.section	.rodata
.LC1:
	.string	"--reps"
.LC2:
	.string	"Invalid integer:--reps: %s\n"
.LC3:
	.string	"--datasize"
	.align 8
.LC4:
	.string	"Invalid integer:--datasize: %s\n"
.LC5:
	.string	"-h"
.LC6:
	.string	"Invalid parameters: %s\n"
	.text
	.globl	parse_args
	.type	parse_args, @function
parse_args:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -20[rbp], edi
	mov	QWORD PTR -32[rbp], rsi
	mov	DWORD PTR -4[rbp], 1
	jmp	.L3
.L8:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	mov	rax, QWORD PTR [rax]
	lea	rsi, .LC1[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L4
	add	DWORD PTR -4[rbp], 1
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	mov	rax, QWORD PTR [rax]
	mov	rdi, rax
	call	atoi@PLT
	mov	DWORD PTR reps[rip], eax
	mov	eax, DWORD PTR reps[rip]
	test	eax, eax
	jne	.L5
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	mov	rax, QWORD PTR [rax]
	mov	rsi, rax
	lea	rdi, .LC2[rip]
	mov	eax, 0
	call	printf@PLT
	mov	rax, QWORD PTR -32[rbp]
	mov	rdi, rax
	call	usage
	mov	edi, 1
	call	exit@PLT
.L4:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	mov	rax, QWORD PTR [rax]
	lea	rsi, .LC3[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L6
	add	DWORD PTR -4[rbp], 1
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	mov	rax, QWORD PTR [rax]
	mov	rdi, rax
	call	atoi@PLT
	mov	DWORD PTR datasize[rip], eax
	mov	eax, DWORD PTR datasize[rip]
	test	eax, eax
	jne	.L5
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	mov	rax, QWORD PTR [rax]
	mov	rsi, rax
	lea	rdi, .LC4[rip]
	mov	eax, 0
	call	printf@PLT
	mov	rax, QWORD PTR -32[rbp]
	mov	rdi, rax
	call	usage
	mov	edi, 1
	call	exit@PLT
.L6:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	mov	rax, QWORD PTR [rax]
	lea	rsi, .LC5[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L7
	mov	rax, QWORD PTR -32[rbp]
	mov	rdi, rax
	call	usage
	mov	edi, 0
	call	exit@PLT
.L7:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	mov	rax, QWORD PTR [rax]
	mov	rsi, rax
	lea	rdi, .LC6[rip]
	mov	eax, 0
	call	printf@PLT
	mov	rax, QWORD PTR -32[rbp]
	mov	rdi, rax
	call	usage
	mov	edi, 1
	call	exit@PLT
.L5:
	add	DWORD PTR -4[rbp], 1
.L3:
	mov	eax, DWORD PTR -4[rbp]
	cmp	eax, DWORD PTR -20[rbp]
	jl	.L8
	nop
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	parse_args, .-parse_args
	.globl	stats
	.type	stats, @function
stats:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 80
	mov	QWORD PTR -72[rbp], rdi
	mov	QWORD PTR -80[rbp], rsi
	movsd	xmm0, QWORD PTR .LC7[rip]
	movsd	QWORD PTR -32[rbp], xmm0
	pxor	xmm0, xmm0
	movsd	QWORD PTR -24[rbp], xmm0
	pxor	xmm0, xmm0
	movsd	QWORD PTR -48[rbp], xmm0
	mov	DWORD PTR -52[rbp], 0
	mov	DWORD PTR -56[rbp], 0
	jmp	.L10
.L19:
	mov	rdx, QWORD PTR times[rip]
	mov	eax, DWORD PTR -56[rbp]
	cdqe
	sal	rax, 3
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L24
	pxor	xmm1, xmm1
	comisd	xmm0, xmm1
	je	.L11
.L24:
	mov	rdx, QWORD PTR times[rip]
	mov	eax, DWORD PTR -56[rbp]
	cdqe
	sal	rax, 3
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	comisd	xmm0, QWORD PTR -32[rbp]
	jbe	.L28
	movsd	xmm0, QWORD PTR -32[rbp]
	jmp	.L15
.L28:
	mov	rdx, QWORD PTR times[rip]
	mov	eax, DWORD PTR -56[rbp]
	cdqe
	sal	rax, 3
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
.L15:
	movsd	QWORD PTR -32[rbp], xmm0
	mov	rdx, QWORD PTR times[rip]
	mov	eax, DWORD PTR -56[rbp]
	cdqe
	sal	rax, 3
	add	rax, rdx
	movsd	xmm1, QWORD PTR [rax]
	movsd	xmm0, QWORD PTR -24[rbp]
	comisd	xmm0, xmm1
	jbe	.L29
	movsd	xmm0, QWORD PTR -24[rbp]
	jmp	.L18
.L29:
	mov	rdx, QWORD PTR times[rip]
	mov	eax, DWORD PTR -56[rbp]
	cdqe
	sal	rax, 3
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
.L18:
	movsd	QWORD PTR -24[rbp], xmm0
	mov	rdx, QWORD PTR times[rip]
	mov	eax, DWORD PTR -56[rbp]
	cdqe
	sal	rax, 3
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	movsd	xmm1, QWORD PTR -48[rbp]
	addsd	xmm0, xmm1
	movsd	QWORD PTR -48[rbp], xmm0
	add	DWORD PTR -52[rbp], 1
.L11:
	add	DWORD PTR -56[rbp], 1
.L10:
	mov	eax, DWORD PTR reps[rip]
	cmp	DWORD PTR -56[rbp], eax
	jl	.L19
	pxor	xmm1, xmm1
	cvtsi2sd	xmm1, DWORD PTR -52[rbp]
	movsd	xmm0, QWORD PTR -48[rbp]
	divsd	xmm0, xmm1
	movsd	QWORD PTR -16[rbp], xmm0
	pxor	xmm0, xmm0
	movsd	QWORD PTR -40[rbp], xmm0
	mov	DWORD PTR -56[rbp], 0
	jmp	.L20
.L23:
	mov	rdx, QWORD PTR times[rip]
	mov	eax, DWORD PTR -56[rbp]
	cdqe
	sal	rax, 3
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L27
	pxor	xmm1, xmm1
	comisd	xmm0, xmm1
	je	.L21
.L27:
	mov	rdx, QWORD PTR times[rip]
	mov	eax, DWORD PTR -56[rbp]
	cdqe
	sal	rax, 3
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	movapd	xmm1, xmm0
	subsd	xmm1, QWORD PTR -16[rbp]
	mov	rdx, QWORD PTR times[rip]
	mov	eax, DWORD PTR -56[rbp]
	cdqe
	sal	rax, 3
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	subsd	xmm0, QWORD PTR -16[rbp]
	mulsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR -40[rbp]
	addsd	xmm0, xmm1
	movsd	QWORD PTR -40[rbp], xmm0
.L21:
	add	DWORD PTR -56[rbp], 1
.L20:
	mov	eax, DWORD PTR reps[rip]
	cmp	DWORD PTR -56[rbp], eax
	jl	.L23
	pxor	xmm1, xmm1
	cvtsi2sd	xmm1, DWORD PTR -52[rbp]
	movsd	xmm0, QWORD PTR -40[rbp]
	divsd	xmm0, xmm1
	movq	rax, xmm0
	movq	xmm0, rax
	call	sqrt@PLT
	movq	rax, xmm0
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -72[rbp]
	movsd	xmm0, QWORD PTR -16[rbp]
	movsd	QWORD PTR [rax], xmm0
	mov	rax, QWORD PTR -80[rbp]
	movsd	xmm0, QWORD PTR -8[rbp]
	movsd	QWORD PTR [rax], xmm0
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	stats, .-stats
	.section	.rodata
.LC9:
	.string	"COMPILER"
.LC11:
	.string	"%f\n"
	.text
	.globl	print_results
	.type	print_results, @function
print_results:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 64
	mov	QWORD PTR -40[rbp], rdi
	movsd	QWORD PTR -48[rbp], xmm0
	movsd	QWORD PTR -56[rbp], xmm1
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	lea	rax, -32[rbp]
	lea	rsi, .LC9[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	movsd	xmm1, QWORD PTR -48[rbp]
	movsd	xmm0, QWORD PTR .LC10[rip]
	mulsd	xmm1, xmm0
	movq	rax, xmm1
	movq	xmm0, rax
	lea	rdi, .LC11[rip]
	mov	eax, 1
	call	printf@PLT
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	print_results, .-print_results
	.globl	init
	.type	init, @function
init:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	mov	QWORD PTR -16[rbp], rsi
	mov	rdx, QWORD PTR -16[rbp]
	mov	eax, DWORD PTR -4[rbp]
	mov	rsi, rdx
	mov	edi, eax
	call	parse_args
	mov	eax, DWORD PTR reps[rip]
	cmp	eax, -1
	jne	.L33
	mov	DWORD PTR reps[rip], 10
.L33:
	mov	eax, DWORD PTR datasize[rip]
	cmp	eax, -1
	jne	.L34
	mov	DWORD PTR datasize[rip], 1048576
.L34:
	mov	eax, DWORD PTR reps[rip]
	cdqe
	sal	rax, 3
	mov	rdi, rax
	call	malloc@PLT
	mov	QWORD PTR times[rip], rax
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	init, .-init
	.globl	finalise
	.type	finalise, @function
finalise:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	rax, QWORD PTR times[rip]
	mov	rdi, rax
	call	free@PLT
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	finalise, .-finalise
	.section	.rodata
	.align 8
.LC13:
	.string	"Memory allocation failure in %s\n"
.LC15:
	.string	"CPU/GPU mismatch in %s\n"
	.text
	.globl	benchmark
	.type	benchmark, @function
benchmark:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	QWORD PTR -32[rbp], rsi
	mov	DWORD PTR -12[rbp], 0
	pxor	xmm0, xmm0
	movsd	QWORD PTR -8[rbp], xmm0
	mov	DWORD PTR -12[rbp], 0
	jmp	.L37
.L43:
	mov	rax, QWORD PTR -32[rbp]
	call	rax
	movq	rax, xmm0
	mov	QWORD PTR -8[rbp], rax
	movsd	xmm0, QWORD PTR -8[rbp]
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L38
	movsd	xmm0, QWORD PTR -8[rbp]
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jne	.L38
	mov	rax, QWORD PTR -24[rbp]
	mov	rsi, rax
	lea	rdi, .LC13[rip]
	mov	eax, 0
	call	printf@PLT
	mov	rdx, QWORD PTR times[rip]
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	sal	rax, 3
	add	rax, rdx
	pxor	xmm0, xmm0
	movsd	QWORD PTR [rax], xmm0
	jmp	.L40
.L38:
	movsd	xmm0, QWORD PTR -8[rbp]
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L41
	movsd	xmm0, QWORD PTR -8[rbp]
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jne	.L41
	mov	rax, QWORD PTR -24[rbp]
	mov	rsi, rax
	lea	rdi, .LC15[rip]
	mov	eax, 0
	call	printf@PLT
	mov	rdx, QWORD PTR times[rip]
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	sal	rax, 3
	add	rax, rdx
	pxor	xmm0, xmm0
	movsd	QWORD PTR [rax], xmm0
	jmp	.L40
.L41:
	mov	rdx, QWORD PTR times[rip]
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	sal	rax, 3
	add	rax, rdx
	movsd	xmm0, QWORD PTR -8[rbp]
	movsd	QWORD PTR [rax], xmm0
.L40:
	add	DWORD PTR -12[rbp], 1
.L37:
	mov	eax, DWORD PTR reps[rip]
	cmp	DWORD PTR -12[rbp], eax
	jl	.L43
	lea	rsi, testsd[rip]
	lea	rdi, testtime[rip]
	call	stats
	movsd	xmm0, QWORD PTR testsd[rip]
	mov	rdx, QWORD PTR testtime[rip]
	mov	rax, QWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	movq	xmm0, rdx
	mov	rdi, rax
	call	print_results
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	benchmark, .-benchmark
	.globl	stencil
	.type	stencil, @function
stencil:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 96
	mov	eax, DWORD PTR datasize[rip]
	shr	eax, 4
	mov	eax, eax
	test	rax, rax
	js	.L47
	pxor	xmm2, xmm2
	cvtsi2sd	xmm2, rax
	movq	rax, xmm2
	jmp	.L48
.L47:
	mov	rdx, rax
	shr	rdx
	and	eax, 1
	or	rdx, rax
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rdx
	addsd	xmm0, xmm0
	movq	rax, xmm0
.L48:
	movq	xmm0, rax
	call	cbrt@PLT
	cvttsd2si	eax, xmm0
	mov	DWORD PTR -80[rbp], eax
	mov	eax, DWORD PTR -80[rbp]
	sub	eax, 2
	mov	DWORD PTR -76[rbp], eax
	movsd	xmm0, QWORD PTR .LC16[rip]
	movsd	QWORD PTR -72[rbp], xmm0
	mov	eax, DWORD PTR -80[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -80[rbp]
	cdqe
	imul	rdx, rax
	mov	eax, DWORD PTR -80[rbp]
	cdqe
	imul	rax, rdx
	sal	rax, 3
	mov	rdi, rax
	call	malloc@PLT
	mov	QWORD PTR -64[rbp], rax
	mov	eax, DWORD PTR -80[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -80[rbp]
	cdqe
	imul	rdx, rax
	mov	eax, DWORD PTR -80[rbp]
	cdqe
	imul	rax, rdx
	sal	rax, 3
	mov	rdi, rax
	call	malloc@PLT
	mov	QWORD PTR -56[rbp], rax
	mov	eax, DWORD PTR -80[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -80[rbp]
	cdqe
	imul	rdx, rax
	mov	eax, DWORD PTR -80[rbp]
	cdqe
	imul	rax, rdx
	sal	rax, 3
	mov	rdi, rax
	call	malloc@PLT
	mov	QWORD PTR -48[rbp], rax
	mov	eax, DWORD PTR -80[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -80[rbp]
	cdqe
	imul	rdx, rax
	mov	eax, DWORD PTR -80[rbp]
	cdqe
	imul	rax, rdx
	sal	rax, 3
	mov	rdi, rax
	call	malloc@PLT
	mov	QWORD PTR -40[rbp], rax
	mov	eax, DWORD PTR -80[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -80[rbp]
	cdqe
	imul	rdx, rax
	mov	eax, DWORD PTR -80[rbp]
	cdqe
	imul	rax, rdx
	sal	rax, 3
	mov	rdi, rax
	call	malloc@PLT
	mov	QWORD PTR -32[rbp], rax
	cmp	QWORD PTR -64[rbp], 0
	je	.L49
	cmp	QWORD PTR -56[rbp], 0
	je	.L49
	cmp	QWORD PTR -48[rbp], 0
	je	.L49
	cmp	QWORD PTR -40[rbp], 0
	je	.L49
	cmp	QWORD PTR -32[rbp], 0
	jne	.L50
.L49:
	movsd	xmm0, QWORD PTR .LC12[rip]
	jmp	.L51
.L50:
	mov	DWORD PTR -96[rbp], 0
	jmp	.L52
.L57:
	mov	DWORD PTR -92[rbp], 0
	jmp	.L53
.L56:
	mov	DWORD PTR -88[rbp], 0
	jmp	.L54
.L55:
	mov	eax, DWORD PTR -96[rbp]
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	pxor	xmm0, xmm0
	movsd	QWORD PTR [rax], xmm0
	add	DWORD PTR -88[rbp], 1
.L54:
	mov	eax, DWORD PTR -88[rbp]
	cmp	eax, DWORD PTR -80[rbp]
	jl	.L55
	add	DWORD PTR -92[rbp], 1
.L53:
	mov	eax, DWORD PTR -92[rbp]
	cmp	eax, DWORD PTR -80[rbp]
	jl	.L56
	add	DWORD PTR -96[rbp], 1
.L52:
	mov	eax, DWORD PTR -96[rbp]
	cmp	eax, DWORD PTR -80[rbp]
	jl	.L57
	mov	DWORD PTR -96[rbp], 1
	jmp	.L58
.L63:
	mov	DWORD PTR -92[rbp], 1
	jmp	.L59
.L62:
	mov	DWORD PTR -88[rbp], 1
	jmp	.L60
.L61:
	call	rand@PLT
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, eax
	mov	eax, DWORD PTR -96[rbp]
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm1, QWORD PTR .LC17[rip]
	divsd	xmm0, xmm1
	movsd	QWORD PTR [rax], xmm0
	add	DWORD PTR -88[rbp], 1
.L60:
	mov	eax, DWORD PTR -76[rbp]
	cmp	eax, DWORD PTR -88[rbp]
	jge	.L61
	add	DWORD PTR -92[rbp], 1
.L59:
	mov	eax, DWORD PTR -76[rbp]
	cmp	eax, DWORD PTR -92[rbp]
	jge	.L62
	add	DWORD PTR -96[rbp], 1
.L58:
	mov	eax, DWORD PTR -76[rbp]
	cmp	eax, DWORD PTR -96[rbp]
	jge	.L63
	mov	DWORD PTR -96[rbp], 0
	jmp	.L64
.L69:
	mov	DWORD PTR -92[rbp], 0
	jmp	.L65
.L68:
	mov	DWORD PTR -88[rbp], 0
	jmp	.L66
.L67:
	mov	eax, DWORD PTR -96[rbp]
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rdx, rax
	mov	eax, DWORD PTR -96[rbp]
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	ecx, eax
	mov	eax, DWORD PTR -92[rbp]
	imul	eax, DWORD PTR -80[rbp]
	add	ecx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, ecx
	cdqe
	lea	rcx, 0[0+rax*8]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rcx
	movsd	xmm0, QWORD PTR [rdx]
	movsd	QWORD PTR [rax], xmm0
	add	DWORD PTR -88[rbp], 1
.L66:
	mov	eax, DWORD PTR -88[rbp]
	cmp	eax, DWORD PTR -80[rbp]
	jl	.L67
	add	DWORD PTR -92[rbp], 1
.L65:
	mov	eax, DWORD PTR -92[rbp]
	cmp	eax, DWORD PTR -80[rbp]
	jl	.L68
	add	DWORD PTR -96[rbp], 1
.L64:
	mov	eax, DWORD PTR -96[rbp]
	cmp	eax, DWORD PTR -80[rbp]
	jl	.L69
	mov	DWORD PTR -84[rbp], 0
	jmp	.L70
.L83:
	mov	DWORD PTR -96[rbp], 1
	jmp	.L71
.L76:
	mov	DWORD PTR -92[rbp], 1
	jmp	.L72
.L75:
	mov	DWORD PTR -88[rbp], 1
	jmp	.L73
.L74:
	mov	eax, DWORD PTR -96[rbp]
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm1, QWORD PTR [rax]
	mov	eax, DWORD PTR -96[rbp]
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	sub	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	sub	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	sub	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	sub	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	sub	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	sub	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	sub	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	sub	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	sub	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm0, xmm1
	mov	eax, DWORD PTR -96[rbp]
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -48[rbp]
	add	rax, rdx
	mulsd	xmm0, QWORD PTR -72[rbp]
	movsd	QWORD PTR [rax], xmm0
	add	DWORD PTR -88[rbp], 1
.L73:
	mov	eax, DWORD PTR -76[rbp]
	cmp	eax, DWORD PTR -88[rbp]
	jge	.L74
	add	DWORD PTR -92[rbp], 1
.L72:
	mov	eax, DWORD PTR -76[rbp]
	cmp	eax, DWORD PTR -92[rbp]
	jge	.L75
	add	DWORD PTR -96[rbp], 1
.L71:
	mov	eax, DWORD PTR -76[rbp]
	cmp	eax, DWORD PTR -96[rbp]
	jge	.L76
	mov	DWORD PTR -96[rbp], 1
	jmp	.L77
.L82:
	mov	DWORD PTR -92[rbp], 1
	jmp	.L78
.L81:
	mov	DWORD PTR -88[rbp], 1
	jmp	.L79
.L80:
	mov	eax, DWORD PTR -96[rbp]
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -48[rbp]
	add	rdx, rax
	mov	eax, DWORD PTR -96[rbp]
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	ecx, eax
	mov	eax, DWORD PTR -92[rbp]
	imul	eax, DWORD PTR -80[rbp]
	add	ecx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, ecx
	cdqe
	lea	rcx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rcx
	movsd	xmm0, QWORD PTR [rdx]
	movsd	QWORD PTR [rax], xmm0
	add	DWORD PTR -88[rbp], 1
.L79:
	mov	eax, DWORD PTR -76[rbp]
	cmp	eax, DWORD PTR -88[rbp]
	jge	.L80
	add	DWORD PTR -92[rbp], 1
.L78:
	mov	eax, DWORD PTR -76[rbp]
	cmp	eax, DWORD PTR -92[rbp]
	jge	.L81
	add	DWORD PTR -96[rbp], 1
.L77:
	mov	eax, DWORD PTR -76[rbp]
	cmp	eax, DWORD PTR -96[rbp]
	jge	.L82
	add	DWORD PTR -84[rbp], 1
.L70:
	cmp	DWORD PTR -84[rbp], 9
	jle	.L83
	mov	DWORD PTR -96[rbp], 0
	jmp	.L84
.L89:
	mov	DWORD PTR -92[rbp], 0
	jmp	.L85
.L88:
	mov	DWORD PTR -88[rbp], 0
	jmp	.L86
.L87:
	mov	eax, DWORD PTR -96[rbp]
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rdx, rax
	mov	eax, DWORD PTR -96[rbp]
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	ecx, eax
	mov	eax, DWORD PTR -92[rbp]
	imul	eax, DWORD PTR -80[rbp]
	add	ecx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, ecx
	cdqe
	lea	rcx, 0[0+rax*8]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rcx
	movsd	xmm0, QWORD PTR [rdx]
	movsd	QWORD PTR [rax], xmm0
	add	DWORD PTR -88[rbp], 1
.L86:
	mov	eax, DWORD PTR -88[rbp]
	cmp	eax, DWORD PTR -80[rbp]
	jl	.L87
	add	DWORD PTR -92[rbp], 1
.L85:
	mov	eax, DWORD PTR -92[rbp]
	cmp	eax, DWORD PTR -80[rbp]
	jl	.L88
	add	DWORD PTR -96[rbp], 1
.L84:
	mov	eax, DWORD PTR -96[rbp]
	cmp	eax, DWORD PTR -80[rbp]
	jl	.L89
	mov	DWORD PTR -96[rbp], 0
	jmp	.L90
.L95:
	mov	DWORD PTR -92[rbp], 0
	jmp	.L91
.L94:
	mov	DWORD PTR -88[rbp], 0
	jmp	.L92
.L93:
	mov	eax, DWORD PTR -96[rbp]
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -32[rbp]
	add	rdx, rax
	mov	eax, DWORD PTR -96[rbp]
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	ecx, eax
	mov	eax, DWORD PTR -92[rbp]
	imul	eax, DWORD PTR -80[rbp]
	add	ecx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, ecx
	cdqe
	lea	rcx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rcx
	movsd	xmm0, QWORD PTR [rdx]
	movsd	QWORD PTR [rax], xmm0
	add	DWORD PTR -88[rbp], 1
.L92:
	mov	eax, DWORD PTR -88[rbp]
	cmp	eax, DWORD PTR -80[rbp]
	jl	.L93
	add	DWORD PTR -92[rbp], 1
.L91:
	mov	eax, DWORD PTR -92[rbp]
	cmp	eax, DWORD PTR -80[rbp]
	jl	.L94
	add	DWORD PTR -96[rbp], 1
.L90:
	mov	eax, DWORD PTR -96[rbp]
	cmp	eax, DWORD PTR -80[rbp]
	jl	.L95
	call	omp_get_wtime@PLT
	movq	rax, xmm0
	mov	QWORD PTR -24[rbp], rax
	mov	DWORD PTR -84[rbp], 0
	jmp	.L96
.L109:
	mov	DWORD PTR -96[rbp], 1
	jmp	.L97
.L102:
	mov	DWORD PTR -92[rbp], 1
	jmp	.L98
.L101:
	mov	DWORD PTR -88[rbp], 1
	jmp	.L99
.L100:
	mov	eax, DWORD PTR -96[rbp]
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm1, QWORD PTR [rax]
	mov	eax, DWORD PTR -96[rbp]
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	sub	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	sub	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	sub	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	sub	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	sub	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	sub	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	sub	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	sub	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	sub	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	add	eax, 1
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	sub	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -96[rbp]
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, 1
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm0, xmm1
	mov	eax, DWORD PTR -96[rbp]
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -48[rbp]
	add	rax, rdx
	mulsd	xmm0, QWORD PTR -72[rbp]
	movsd	QWORD PTR [rax], xmm0
	add	DWORD PTR -88[rbp], 1
.L99:
	mov	eax, DWORD PTR -76[rbp]
	cmp	eax, DWORD PTR -88[rbp]
	jge	.L100
	add	DWORD PTR -92[rbp], 1
.L98:
	mov	eax, DWORD PTR -76[rbp]
	cmp	eax, DWORD PTR -92[rbp]
	jge	.L101
	add	DWORD PTR -96[rbp], 1
.L97:
	mov	eax, DWORD PTR -76[rbp]
	cmp	eax, DWORD PTR -96[rbp]
	jge	.L102
	mov	DWORD PTR -96[rbp], 1
	jmp	.L103
.L108:
	mov	DWORD PTR -92[rbp], 1
	jmp	.L104
.L107:
	mov	DWORD PTR -88[rbp], 1
	jmp	.L105
.L106:
	mov	eax, DWORD PTR -96[rbp]
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -92[rbp]
	imul	eax, DWORD PTR -80[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -48[rbp]
	add	rdx, rax
	mov	eax, DWORD PTR -96[rbp]
	imul	eax, DWORD PTR -80[rbp]
	imul	eax, DWORD PTR -80[rbp]
	mov	ecx, eax
	mov	eax, DWORD PTR -92[rbp]
	imul	eax, DWORD PTR -80[rbp]
	add	ecx, eax
	mov	eax, DWORD PTR -88[rbp]
	add	eax, ecx
	cdqe
	lea	rcx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rcx
	movsd	xmm0, QWORD PTR [rdx]
	movsd	QWORD PTR [rax], xmm0
	add	DWORD PTR -88[rbp], 1
.L105:
	mov	eax, DWORD PTR -76[rbp]
	cmp	eax, DWORD PTR -88[rbp]
	jge	.L106
	add	DWORD PTR -92[rbp], 1
.L104:
	mov	eax, DWORD PTR -76[rbp]
	cmp	eax, DWORD PTR -92[rbp]
	jge	.L107
	add	DWORD PTR -96[rbp], 1
.L103:
	mov	eax, DWORD PTR -76[rbp]
	cmp	eax, DWORD PTR -96[rbp]
	jge	.L108
	add	DWORD PTR -84[rbp], 1
.L96:
	cmp	DWORD PTR -84[rbp], 9
	jle	.L109
	call	omp_get_wtime@PLT
	movq	rax, xmm0
	mov	QWORD PTR -16[rbp], rax
	mov	eax, DWORD PTR -80[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -80[rbp]
	cdqe
	imul	rdx, rax
	mov	eax, DWORD PTR -80[rbp]
	cdqe
	imul	rax, rdx
	lea	rdx, 0[0+rax*8]
	mov	rcx, QWORD PTR -64[rbp]
	mov	rax, QWORD PTR -56[rbp]
	mov	rsi, rcx
	mov	rdi, rax
	call	memcpy@PLT
	mov	edx, DWORD PTR -80[rbp]
	mov	rcx, QWORD PTR -56[rbp]
	mov	rax, QWORD PTR -40[rbp]
	mov	rsi, rcx
	mov	rdi, rax
	call	max_diff
	movq	rax, xmm0
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -64[rbp]
	mov	rdi, rax
	call	free@PLT
	mov	rax, QWORD PTR -32[rbp]
	mov	rdi, rax
	call	free@PLT
	mov	rax, QWORD PTR -48[rbp]
	mov	rdi, rax
	call	free@PLT
	mov	rax, QWORD PTR -40[rbp]
	mov	rdi, rax
	call	free@PLT
	mov	rax, QWORD PTR -56[rbp]
	mov	rdi, rax
	call	free@PLT
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, QWORD PTR -8[rbp]
	jbe	.L113
	movsd	xmm0, QWORD PTR -16[rbp]
	subsd	xmm0, QWORD PTR -24[rbp]
	jmp	.L51
.L113:
	movsd	xmm0, QWORD PTR .LC14[rip]
.L51:
	movq	rax, xmm0
	movq	xmm0, rax
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	stencil, .-stencil
	.globl	max_diff
	.type	max_diff, @function
max_diff:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	mov	DWORD PTR -52[rbp], edx
	mov	eax, DWORD PTR -52[rbp]
	sub	eax, 2
	mov	DWORD PTR -20[rbp], eax
	pxor	xmm0, xmm0
	movsd	QWORD PTR -16[rbp], xmm0
	mov	DWORD PTR -32[rbp], 1
	jmp	.L115
.L122:
	mov	DWORD PTR -28[rbp], 1
	jmp	.L116
.L121:
	mov	DWORD PTR -24[rbp], 1
	jmp	.L117
.L120:
	mov	eax, DWORD PTR -32[rbp]
	imul	eax, DWORD PTR -52[rbp]
	imul	eax, DWORD PTR -52[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	imul	eax, DWORD PTR -52[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -24[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	mov	eax, DWORD PTR -32[rbp]
	imul	eax, DWORD PTR -52[rbp]
	imul	eax, DWORD PTR -52[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	imul	eax, DWORD PTR -52[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -24[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -48[rbp]
	add	rax, rdx
	movsd	xmm1, QWORD PTR [rax]
	subsd	xmm0, xmm1
	movq	xmm1, QWORD PTR .LC19[rip]
	andpd	xmm0, xmm1
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	xmm0, QWORD PTR -8[rbp]
	comisd	xmm0, QWORD PTR -16[rbp]
	jbe	.L118
	movsd	xmm0, QWORD PTR -8[rbp]
	movsd	QWORD PTR -16[rbp], xmm0
.L118:
	add	DWORD PTR -24[rbp], 1
.L117:
	mov	eax, DWORD PTR -20[rbp]
	cmp	eax, DWORD PTR -24[rbp]
	jge	.L120
	add	DWORD PTR -28[rbp], 1
.L116:
	mov	eax, DWORD PTR -20[rbp]
	cmp	eax, DWORD PTR -28[rbp]
	jge	.L121
	add	DWORD PTR -32[rbp], 1
.L115:
	mov	eax, DWORD PTR -20[rbp]
	cmp	eax, DWORD PTR -32[rbp]
	jge	.L122
	movsd	xmm0, QWORD PTR -16[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	max_diff, .-max_diff
	.section	.rodata
	.align 8
.LC20:
	.string	"Unable to allocate memory in wul."
.LC21:
	.string	"Error in WUL"
	.text
	.globl	wul
	.type	wul, @function
wul:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -20[rbp], 8192
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	sal	rax, 3
	mov	rdi, rax
	call	malloc@PLT
	mov	QWORD PTR -16[rbp], rax
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	sal	rax, 3
	mov	rdi, rax
	call	malloc@PLT
	mov	QWORD PTR -8[rbp], rax
	mov	DWORD PTR -24[rbp], 0
	cmp	QWORD PTR -16[rbp], 0
	je	.L126
	cmp	QWORD PTR -8[rbp], 0
	jne	.L127
.L126:
	lea	rdi, .LC20[rip]
	call	puts@PLT
.L127:
	mov	DWORD PTR -24[rbp], 0
	jmp	.L128
.L129:
	call	rand@PLT
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, eax
	mov	eax, DWORD PTR -24[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	movsd	xmm1, QWORD PTR .LC17[rip]
	divsd	xmm0, xmm1
	movsd	QWORD PTR [rax], xmm0
	add	DWORD PTR -24[rbp], 1
.L128:
	mov	eax, DWORD PTR -24[rbp]
	cmp	eax, DWORD PTR -20[rbp]
	jl	.L129
	mov	DWORD PTR -24[rbp], 0
	jmp	.L130
.L131:
	mov	eax, DWORD PTR -24[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	mov	eax, DWORD PTR -24[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rdx
	addsd	xmm0, xmm0
	movsd	QWORD PTR [rax], xmm0
	add	DWORD PTR -24[rbp], 1
.L130:
	mov	eax, DWORD PTR -24[rbp]
	cmp	eax, DWORD PTR -20[rbp]
	jl	.L131
	mov	rax, QWORD PTR -16[rbp]
	movsd	xmm1, QWORD PTR [rax]
	pxor	xmm0, xmm0
	comisd	xmm0, xmm1
	jbe	.L132
	lea	rdi, .LC21[rip]
	call	puts@PLT
.L132:
	mov	rax, QWORD PTR -16[rbp]
	mov	rdi, rax
	call	free@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	free@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	wul, .-wul
	.section	.rodata
.LC22:
	.string	"27S"
	.text
	.globl	main
	.type	main, @function
main:
.LFB16:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 64
	mov	DWORD PTR -52[rbp], edi
	mov	QWORD PTR -64[rbp], rsi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	rdx, QWORD PTR -64[rbp]
	mov	eax, DWORD PTR -52[rbp]
	mov	rsi, rdx
	mov	edi, eax
	call	init
	mov	eax, 0
	call	wul
	lea	rax, -48[rbp]
	lea	rsi, .LC22[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	lea	rax, -48[rbp]
	lea	rsi, stencil[rip]
	mov	rdi, rax
	call	benchmark
	call	finalise
	mov	eax, 0
	mov	rcx, QWORD PTR -8[rbp]
	sub	rcx, QWORD PTR fs:40
	je	.L137
	call	__stack_chk_fail@PLT
.L137:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE16:
	.size	main, .-main
	.section	.rodata
	.align 8
.LC7:
	.long	536870912
	.long	1107468383
	.align 8
.LC10:
	.long	0
	.long	1093567616
	.align 8
.LC12:
	.long	0
	.long	-1060927488
	.align 8
.LC14:
	.long	0
	.long	-1060799488
	.align 8
.LC16:
	.long	330382100
	.long	1067692347
	.align 8
.LC17:
	.long	0
	.long	1105199104
	.align 8
.LC18:
	.long	-1629006314
	.long	1020396463
	.align 16
.LC19:
	.long	-1
	.long	2147483647
	.long	0
	.long	0
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"87327.c"
	.text
	.global	datasize
	.data
	.align	2
	.type	datasize, %object
	.size	datasize, 4
datasize:
	.word	-1
	.global	reps
	.align	2
	.type	reps, %object
	.size	reps, 4
reps:
	.word	-1
	.comm	times,4,4
	.comm	testtime,8,8
	.comm	testsd,8,8
	.global	flag
	.bss
	.align	2
	.type	flag, %object
	.size	flag, 4
flag:
	.space	4
	.section	.rodata
	.align	2
.LC0:
	.ascii	"Usage: %s \012\011--reps <repetitions> (default %d)"
	.ascii	"\012\011--datasize <datasize> (default %d bytes)\012"
	.ascii	"\000"
	.text
	.align	2
	.global	usage
	.syntax unified
	.arm
	.fpu softvfp
	.type	usage, %function
usage:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldr	r1, [r3]
	mov	r3, #1048576
	mov	r2, #10
	ldr	r0, .L2
	bl	printf
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L3:
	.align	2
.L2:
	.word	.LC0
	.size	usage, .-usage
	.section	.rodata
	.align	2
.LC1:
	.ascii	"--reps\000"
	.align	2
.LC2:
	.ascii	"Invalid integer:--reps: %s\012\000"
	.align	2
.LC3:
	.ascii	"--datasize\000"
	.align	2
.LC4:
	.ascii	"Invalid integer:--datasize: %s\012\000"
	.align	2
.LC5:
	.ascii	"-h\000"
	.align	2
.LC6:
	.ascii	"Invalid parameters: %s\012\000"
	.text
	.align	2
	.global	parse_args
	.syntax unified
	.arm
	.fpu softvfp
	.type	parse_args, %function
parse_args:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	mov	r3, #1
	str	r3, [fp, #-8]
	b	.L5
.L10:
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-20]
	add	r3, r2, r3
	ldr	r3, [r3]
	ldr	r1, .L11
	mov	r0, r3
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L6
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-20]
	add	r3, r2, r3
	ldr	r3, [r3]
	mov	r0, r3
	bl	atoi
	mov	r3, r0
	ldr	r2, .L11+4
	str	r3, [r2]
	ldr	r3, .L11+4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L7
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-20]
	add	r3, r2, r3
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L11+8
	bl	printf
	ldr	r0, [fp, #-20]
	bl	usage
	mov	r0, #1
	bl	exit
.L6:
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-20]
	add	r3, r2, r3
	ldr	r3, [r3]
	ldr	r1, .L11+12
	mov	r0, r3
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L8
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-20]
	add	r3, r2, r3
	ldr	r3, [r3]
	mov	r0, r3
	bl	atoi
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L11+16
	str	r2, [r3]
	ldr	r3, .L11+16
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L7
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-20]
	add	r3, r2, r3
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L11+20
	bl	printf
	ldr	r0, [fp, #-20]
	bl	usage
	mov	r0, #1
	bl	exit
.L8:
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-20]
	add	r3, r2, r3
	ldr	r3, [r3]
	ldr	r1, .L11+24
	mov	r0, r3
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L9
	ldr	r0, [fp, #-20]
	bl	usage
	mov	r0, #0
	bl	exit
.L9:
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-20]
	add	r3, r2, r3
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L11+28
	bl	printf
	ldr	r0, [fp, #-20]
	bl	usage
	mov	r0, #1
	bl	exit
.L7:
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L5:
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-16]
	cmp	r2, r3
	blt	.L10
	nop
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L12:
	.align	2
.L11:
	.word	.LC1
	.word	reps
	.word	.LC2
	.word	.LC3
	.word	datasize
	.word	.LC4
	.word	.LC5
	.word	.LC6
	.size	parse_args, .-parse_args
	.global	__aeabi_dcmpeq
	.global	__aeabi_dcmplt
	.global	__aeabi_dcmpgt
	.global	__aeabi_dadd
	.global	__aeabi_i2d
	.global	__aeabi_ddiv
	.global	__aeabi_dsub
	.global	__aeabi_dmul
	.align	2
	.global	stats
	.syntax unified
	.arm
	.fpu softvfp
	.type	stats, %function
stats:
	@ args = 0, pretend = 0, frame = 64
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #64
	str	r0, [fp, #-72]
	str	r1, [fp, #-76]
	mov	r2, #536870912
	ldr	r3, .L34
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-60]
	str	r3, [fp, #-56]
	mov	r3, #0
	str	r3, [fp, #-64]
	mov	r3, #0
	str	r3, [fp, #-68]
	b	.L14
.L23:
	ldr	r3, .L34+4
	ldr	r2, [r3]
	ldr	r3, [fp, #-68]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L15
	ldr	r3, .L34+4
	ldr	r2, [r3]
	ldr	r3, [fp, #-68]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	beq	.L32
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	b	.L19
.L32:
	ldr	r3, .L34+4
	ldr	r2, [r3]
	ldr	r3, [fp, #-68]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L19:
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	ldr	r3, .L34+4
	ldr	r2, [r3]
	ldr	r3, [fp, #-68]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmpgt
	mov	r3, r0
	cmp	r3, #0
	beq	.L33
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	b	.L22
.L33:
	ldr	r3, .L34+4
	ldr	r2, [r3]
	ldr	r3, [fp, #-68]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L22:
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	ldr	r3, .L34+4
	ldr	r2, [r3]
	ldr	r3, [fp, #-68]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-60]
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-64]
	add	r3, r3, #1
	str	r3, [fp, #-64]
.L15:
	ldr	r3, [fp, #-68]
	add	r3, r3, #1
	str	r3, [fp, #-68]
.L14:
	ldr	r3, .L34+8
	ldr	r3, [r3]
	ldr	r2, [fp, #-68]
	cmp	r2, r3
	blt	.L23
	ldr	r0, [fp, #-64]
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-52]
	str	r3, [fp, #-48]
	mov	r3, #0
	str	r3, [fp, #-68]
	b	.L24
.L27:
	ldr	r3, .L34+4
	ldr	r2, [r3]
	ldr	r3, [fp, #-68]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L25
	ldr	r3, .L34+4
	ldr	r2, [r3]
	ldr	r3, [fp, #-68]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, .L34+4
	ldr	r2, [r3]
	ldr	r3, [fp, #-68]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #52
	ldmia	r1, {r0-r1}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-52]
	str	r3, [fp, #-48]
.L25:
	ldr	r3, [fp, #-68]
	add	r3, r3, #1
	str	r3, [fp, #-68]
.L24:
	ldr	r3, .L34+8
	ldr	r3, [r3]
	ldr	r2, [fp, #-68]
	cmp	r2, r3
	blt	.L27
	ldr	r0, [fp, #-64]
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #52
	ldmia	r1, {r0-r1}
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	sqrt
	str	r0, [fp, #-20]
	str	r1, [fp, #-16]
	ldr	r1, [fp, #-72]
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	ldr	r1, [fp, #-76]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	nop
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L35:
	.align	2
.L34:
	.word	1107468383
	.word	times
	.word	reps
	.size	stats, .-stats
	.section	.rodata
	.align	2
.LC7:
	.ascii	"COMPILER\000"
	.align	2
.LC8:
	.ascii	"%f\012\000"
	.align	2
.LC9:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	print_results
	.syntax unified
	.arm
	.fpu softvfp
	.type	print_results, %function
print_results:
	@ args = 8, pretend = 0, frame = 40
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #40
	str	r0, [fp, #-32]
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	ldr	r3, .L38
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	sub	r3, fp, #28
	ldr	r1, .L38+4
	mov	r0, r3
	bl	sprintf
	mov	r2, #0
	ldr	r3, .L38+8
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L38+12
	bl	printf
	nop
	ldr	r3, .L38
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L37
	bl	__stack_chk_fail
.L37:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L39:
	.align	2
.L38:
	.word	.LC9
	.word	.LC7
	.word	1093567616
	.word	.LC8
	.size	print_results, .-print_results
	.align	2
	.global	init
	.syntax unified
	.arm
	.fpu softvfp
	.type	init, %function
init:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r1, [fp, #-12]
	ldr	r0, [fp, #-8]
	bl	parse_args
	ldr	r3, .L43
	ldr	r3, [r3]
	cmn	r3, #1
	bne	.L41
	ldr	r3, .L43
	mov	r2, #10
	str	r2, [r3]
.L41:
	ldr	r3, .L43+4
	ldr	r3, [r3]
	cmn	r3, #1
	bne	.L42
	ldr	r3, .L43+4
	mov	r2, #1048576
	str	r2, [r3]
.L42:
	ldr	r3, .L43
	ldr	r3, [r3]
	lsl	r3, r3, #3
	mov	r0, r3
	bl	malloc
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L43+8
	str	r2, [r3]
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L44:
	.align	2
.L43:
	.word	reps
	.word	datasize
	.word	times
	.size	init, .-init
	.align	2
	.global	finalise
	.syntax unified
	.arm
	.fpu softvfp
	.type	finalise, %function
finalise:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L46
	ldr	r3, [r3]
	mov	r0, r3
	bl	free
	nop
	pop	{fp, pc}
.L47:
	.align	2
.L46:
	.word	times
	.size	finalise, .-finalise
	.section	.rodata
	.align	2
.LC10:
	.ascii	"Memory allocation failure in %s\012\000"
	.align	2
.LC11:
	.ascii	"CPU/GPU mismatch in %s\012\000"
	.text
	.align	2
	.global	benchmark
	.syntax unified
	.arm
	.fpu softvfp
	.type	benchmark, %function
benchmark:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #32
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	mov	r3, #0
	str	r3, [fp, #-16]
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	mov	r3, #0
	str	r3, [fp, #-16]
	b	.L49
.L55:
	ldr	r3, [fp, #-28]
	blx	r3
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	mov	r2, #0
	ldr	r3, .L60
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L58
	ldr	r1, [fp, #-24]
	ldr	r0, .L60+4
	bl	printf
	ldr	r3, .L60+8
	ldr	r2, [r3]
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	b	.L52
.L58:
	mov	r2, #0
	ldr	r3, .L60+12
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L59
	ldr	r1, [fp, #-24]
	ldr	r0, .L60+16
	bl	printf
	ldr	r3, .L60+8
	ldr	r2, [r3]
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	b	.L52
.L59:
	ldr	r3, .L60+8
	ldr	r2, [r3]
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #3
	add	r1, r2, r3
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
.L52:
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	str	r3, [fp, #-16]
.L49:
	ldr	r3, .L60+20
	ldr	r3, [r3]
	ldr	r2, [fp, #-16]
	cmp	r2, r3
	blt	.L55
	ldr	r1, .L60+24
	ldr	r0, .L60+28
	bl	stats
	ldr	r3, .L60+28
	ldmia	r3, {r0-r1}
	ldr	r3, .L60+24
	ldmia	r3, {r2-r3}
	stm	sp, {r2-r3}
	mov	r2, r0
	mov	r3, r1
	ldr	r0, [fp, #-24]
	bl	print_results
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L61:
	.align	2
.L60:
	.word	-1060927488
	.word	.LC10
	.word	times
	.word	-1060799488
	.word	.LC11
	.word	reps
	.word	testsd
	.word	testtime
	.size	benchmark, .-benchmark
	.global	__aeabi_ui2d
	.global	__aeabi_d2iz
	.align	2
	.global	stencil
	.syntax unified
	.arm
	.fpu softvfp
	.type	stencil, %function
stencil:
	@ args = 0, pretend = 0, frame = 80
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #80
	ldr	r3, .L128
	ldr	r3, [r3]
	lsr	r3, r3, #4
	mov	r0, r3
	bl	__aeabi_ui2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	cbrt
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2iz
	mov	r3, r0
	str	r3, [fp, #-80]
	ldr	r3, [fp, #-80]
	sub	r3, r3, #2
	str	r3, [fp, #-76]
	ldr	r2, .L128+4
	ldr	r3, .L128+8
	str	r2, [fp, #-52]
	str	r3, [fp, #-48]
	ldr	r3, [fp, #-80]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	lsl	r3, r3, #3
	mov	r0, r3
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-72]
	ldr	r3, [fp, #-80]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	lsl	r3, r3, #3
	mov	r0, r3
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-68]
	ldr	r3, [fp, #-80]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	lsl	r3, r3, #3
	mov	r0, r3
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-64]
	ldr	r3, [fp, #-80]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	lsl	r3, r3, #3
	mov	r0, r3
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-60]
	ldr	r3, [fp, #-80]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	lsl	r3, r3, #3
	mov	r0, r3
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-72]
	cmp	r3, #0
	beq	.L63
	ldr	r3, [fp, #-68]
	cmp	r3, #0
	beq	.L63
	ldr	r3, [fp, #-64]
	cmp	r3, #0
	beq	.L63
	ldr	r3, [fp, #-60]
	cmp	r3, #0
	beq	.L63
	ldr	r3, [fp, #-56]
	cmp	r3, #0
	bne	.L64
.L63:
	mov	r2, #0
	ldr	r3, .L128+12
	b	.L65
.L64:
	mov	r3, #0
	str	r3, [fp, #-96]
	b	.L66
.L71:
	mov	r3, #0
	str	r3, [fp, #-92]
	b	.L67
.L70:
	mov	r3, #0
	str	r3, [fp, #-88]
	b	.L68
.L69:
	ldr	r3, [fp, #-96]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r3, [fp, #-88]
	add	r3, r3, #1
	str	r3, [fp, #-88]
.L68:
	ldr	r2, [fp, #-88]
	ldr	r3, [fp, #-80]
	cmp	r2, r3
	blt	.L69
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	str	r3, [fp, #-92]
.L67:
	ldr	r2, [fp, #-92]
	ldr	r3, [fp, #-80]
	cmp	r2, r3
	blt	.L70
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	str	r3, [fp, #-96]
.L66:
	ldr	r2, [fp, #-96]
	ldr	r3, [fp, #-80]
	cmp	r2, r3
	blt	.L71
	mov	r3, #1
	str	r3, [fp, #-96]
	b	.L72
.L77:
	mov	r3, #1
	str	r3, [fp, #-92]
	b	.L73
.L76:
	mov	r3, #1
	str	r3, [fp, #-88]
	b	.L74
.L75:
	bl	rand
	mov	r3, r0
	mov	r0, r3
	bl	__aeabi_i2d
	ldr	r3, [fp, #-96]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	ldr	ip, [fp, #-80]
	mul	r3, ip, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r4, r2, r3
	mov	r2, #0
	ldr	r3, .L128+16
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	stm	r4, {r2-r3}
	ldr	r3, [fp, #-88]
	add	r3, r3, #1
	str	r3, [fp, #-88]
.L74:
	ldr	r2, [fp, #-76]
	ldr	r3, [fp, #-88]
	cmp	r2, r3
	bge	.L75
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	str	r3, [fp, #-92]
.L73:
	ldr	r2, [fp, #-76]
	ldr	r3, [fp, #-92]
	cmp	r2, r3
	bge	.L76
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	str	r3, [fp, #-96]
.L72:
	ldr	r2, [fp, #-76]
	ldr	r3, [fp, #-96]
	cmp	r2, r3
	bge	.L77
	mov	r3, #0
	str	r3, [fp, #-96]
	b	.L78
.L83:
	mov	r3, #0
	str	r3, [fp, #-92]
	b	.L79
.L82:
	mov	r3, #0
	str	r3, [fp, #-88]
	b	.L80
.L81:
	ldr	r3, [fp, #-96]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldr	r2, [fp, #-96]
	ldr	r1, [fp, #-80]
	mul	r2, r1, r2
	ldr	r1, [fp, #-80]
	mul	r1, r2, r1
	ldr	r2, [fp, #-92]
	ldr	r0, [fp, #-80]
	mul	r2, r0, r2
	add	r1, r1, r2
	ldr	r2, [fp, #-88]
	add	r2, r1, r2
	lsl	r2, r2, #3
	ldr	r1, [fp, #-56]
	add	r1, r1, r2
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	ldr	r3, [fp, #-88]
	add	r3, r3, #1
	str	r3, [fp, #-88]
.L80:
	ldr	r2, [fp, #-88]
	ldr	r3, [fp, #-80]
	cmp	r2, r3
	blt	.L81
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	str	r3, [fp, #-92]
.L79:
	ldr	r2, [fp, #-92]
	ldr	r3, [fp, #-80]
	cmp	r2, r3
	blt	.L82
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	str	r3, [fp, #-96]
.L78:
	ldr	r2, [fp, #-96]
	ldr	r3, [fp, #-80]
	cmp	r2, r3
	blt	.L83
	mov	r3, #0
	str	r3, [fp, #-84]
	b	.L84
.L97:
	mov	r3, #1
	str	r3, [fp, #-96]
	b	.L85
.L90:
	mov	r3, #1
	str	r3, [fp, #-92]
	b	.L86
.L89:
	mov	r3, #1
	str	r3, [fp, #-88]
	b	.L87
.L88:
	ldr	r3, [fp, #-96]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	sub	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-96]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	ldr	ip, [fp, #-80]
	mul	r3, ip, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	sub	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	sub	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	sub	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	sub	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	sub	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	sub	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	sub	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	sub	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	sub	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	sub	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	sub	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	sub	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	sub	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	sub	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	sub	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	sub	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	sub	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	sub	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	sub	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	sub	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	sub	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	sub	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	sub	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	sub	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	sub	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	sub	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r6, r2
	mov	r7, r3
	ldr	r3, [fp, #-96]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-64]
	add	r4, r2, r3
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	stm	r4, {r2-r3}
	ldr	r3, [fp, #-88]
	add	r3, r3, #1
	str	r3, [fp, #-88]
.L87:
	ldr	r2, [fp, #-76]
	ldr	r3, [fp, #-88]
	cmp	r2, r3
	bge	.L88
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	str	r3, [fp, #-92]
.L86:
	ldr	r2, [fp, #-76]
	ldr	r3, [fp, #-92]
	cmp	r2, r3
	bge	.L89
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	str	r3, [fp, #-96]
.L85:
	ldr	r2, [fp, #-76]
	ldr	r3, [fp, #-96]
	cmp	r2, r3
	bge	.L90
	mov	r3, #1
	str	r3, [fp, #-96]
	b	.L91
.L96:
	mov	r3, #1
	str	r3, [fp, #-92]
	b	.L92
.L95:
	mov	r3, #1
	str	r3, [fp, #-88]
	b	.L93
.L129:
	.align	2
.L128:
	.word	datasize
	.word	330382100
	.word	1067692347
	.word	-1060927488
	.word	1105199104
	.word	-1629006314
	.word	1020396463
	.word	-1060799488
.L94:
	ldr	r3, [fp, #-96]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-64]
	add	r3, r2, r3
	ldr	r2, [fp, #-96]
	ldr	r1, [fp, #-80]
	mul	r2, r1, r2
	ldr	r1, [fp, #-80]
	mul	r1, r2, r1
	ldr	r2, [fp, #-92]
	ldr	r0, [fp, #-80]
	mul	r2, r0, r2
	add	r1, r1, r2
	ldr	r2, [fp, #-88]
	add	r2, r1, r2
	lsl	r2, r2, #3
	ldr	r1, [fp, #-72]
	add	r1, r1, r2
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	ldr	r3, [fp, #-88]
	add	r3, r3, #1
	str	r3, [fp, #-88]
.L93:
	ldr	r2, [fp, #-76]
	ldr	r3, [fp, #-88]
	cmp	r2, r3
	bge	.L94
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	str	r3, [fp, #-92]
.L92:
	ldr	r2, [fp, #-76]
	ldr	r3, [fp, #-92]
	cmp	r2, r3
	bge	.L95
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	str	r3, [fp, #-96]
.L91:
	ldr	r2, [fp, #-76]
	ldr	r3, [fp, #-96]
	cmp	r2, r3
	bge	.L96
	ldr	r3, [fp, #-84]
	add	r3, r3, #1
	str	r3, [fp, #-84]
.L84:
	ldr	r3, [fp, #-84]
	cmp	r3, #9
	ble	.L97
	mov	r3, #0
	str	r3, [fp, #-96]
	b	.L98
.L103:
	mov	r3, #0
	str	r3, [fp, #-92]
	b	.L99
.L102:
	mov	r3, #0
	str	r3, [fp, #-88]
	b	.L100
.L101:
	ldr	r3, [fp, #-96]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldr	r2, [fp, #-96]
	ldr	r1, [fp, #-80]
	mul	r2, r1, r2
	ldr	r1, [fp, #-80]
	mul	r1, r2, r1
	ldr	r2, [fp, #-92]
	ldr	r0, [fp, #-80]
	mul	r2, r0, r2
	add	r1, r1, r2
	ldr	r2, [fp, #-88]
	add	r2, r1, r2
	lsl	r2, r2, #3
	ldr	r1, [fp, #-60]
	add	r1, r1, r2
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	ldr	r3, [fp, #-88]
	add	r3, r3, #1
	str	r3, [fp, #-88]
.L100:
	ldr	r2, [fp, #-88]
	ldr	r3, [fp, #-80]
	cmp	r2, r3
	blt	.L101
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	str	r3, [fp, #-92]
.L99:
	ldr	r2, [fp, #-92]
	ldr	r3, [fp, #-80]
	cmp	r2, r3
	blt	.L102
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	str	r3, [fp, #-96]
.L98:
	ldr	r2, [fp, #-96]
	ldr	r3, [fp, #-80]
	cmp	r2, r3
	blt	.L103
	mov	r3, #0
	str	r3, [fp, #-96]
	b	.L104
.L109:
	mov	r3, #0
	str	r3, [fp, #-92]
	b	.L105
.L108:
	mov	r3, #0
	str	r3, [fp, #-88]
	b	.L106
.L107:
	ldr	r3, [fp, #-96]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-56]
	add	r3, r2, r3
	ldr	r2, [fp, #-96]
	ldr	r1, [fp, #-80]
	mul	r2, r1, r2
	ldr	r1, [fp, #-80]
	mul	r1, r2, r1
	ldr	r2, [fp, #-92]
	ldr	r0, [fp, #-80]
	mul	r2, r0, r2
	add	r1, r1, r2
	ldr	r2, [fp, #-88]
	add	r2, r1, r2
	lsl	r2, r2, #3
	ldr	r1, [fp, #-72]
	add	r1, r1, r2
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	ldr	r3, [fp, #-88]
	add	r3, r3, #1
	str	r3, [fp, #-88]
.L106:
	ldr	r2, [fp, #-88]
	ldr	r3, [fp, #-80]
	cmp	r2, r3
	blt	.L107
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	str	r3, [fp, #-92]
.L105:
	ldr	r2, [fp, #-92]
	ldr	r3, [fp, #-80]
	cmp	r2, r3
	blt	.L108
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	str	r3, [fp, #-96]
.L104:
	ldr	r2, [fp, #-96]
	ldr	r3, [fp, #-80]
	cmp	r2, r3
	blt	.L109
	bl	omp_get_wtime
	str	r0, [fp, #-44]
	str	r1, [fp, #-40]
	mov	r3, #0
	str	r3, [fp, #-84]
	b	.L110
.L123:
	mov	r3, #1
	str	r3, [fp, #-96]
	b	.L111
.L116:
	mov	r3, #1
	str	r3, [fp, #-92]
	b	.L112
.L115:
	mov	r3, #1
	str	r3, [fp, #-88]
	b	.L113
.L114:
	ldr	r3, [fp, #-96]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	sub	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-96]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	ldr	ip, [fp, #-80]
	mul	r3, ip, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	sub	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	sub	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	sub	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	sub	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	sub	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	sub	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	sub	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	sub	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	sub	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	sub	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	sub	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	sub	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	sub	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	sub	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	sub	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	sub	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	sub	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	sub	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	sub	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	sub	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	sub	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	sub	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	sub	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	sub	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	sub	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	sub	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-96]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r3, #1
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r6, r2
	mov	r7, r3
	ldr	r3, [fp, #-96]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-64]
	add	r4, r2, r3
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	stm	r4, {r2-r3}
	ldr	r3, [fp, #-88]
	add	r3, r3, #1
	str	r3, [fp, #-88]
.L113:
	ldr	r2, [fp, #-76]
	ldr	r3, [fp, #-88]
	cmp	r2, r3
	bge	.L114
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	str	r3, [fp, #-92]
.L112:
	ldr	r2, [fp, #-76]
	ldr	r3, [fp, #-92]
	cmp	r2, r3
	bge	.L115
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	str	r3, [fp, #-96]
.L111:
	ldr	r2, [fp, #-76]
	ldr	r3, [fp, #-96]
	cmp	r2, r3
	bge	.L116
	mov	r3, #1
	str	r3, [fp, #-96]
	b	.L117
.L122:
	mov	r3, #1
	str	r3, [fp, #-92]
	b	.L118
.L121:
	mov	r3, #1
	str	r3, [fp, #-88]
	b	.L119
.L120:
	ldr	r3, [fp, #-96]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r2, r3, r2
	ldr	r3, [fp, #-92]
	ldr	r1, [fp, #-80]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-88]
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-64]
	add	r3, r2, r3
	ldr	r2, [fp, #-96]
	ldr	r1, [fp, #-80]
	mul	r2, r1, r2
	ldr	r1, [fp, #-80]
	mul	r1, r2, r1
	ldr	r2, [fp, #-92]
	ldr	r0, [fp, #-80]
	mul	r2, r0, r2
	add	r1, r1, r2
	ldr	r2, [fp, #-88]
	add	r2, r1, r2
	lsl	r2, r2, #3
	ldr	r1, [fp, #-72]
	add	r1, r1, r2
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	ldr	r3, [fp, #-88]
	add	r3, r3, #1
	str	r3, [fp, #-88]
.L119:
	ldr	r2, [fp, #-76]
	ldr	r3, [fp, #-88]
	cmp	r2, r3
	bge	.L120
	ldr	r3, [fp, #-92]
	add	r3, r3, #1
	str	r3, [fp, #-92]
.L118:
	ldr	r2, [fp, #-76]
	ldr	r3, [fp, #-92]
	cmp	r2, r3
	bge	.L121
	ldr	r3, [fp, #-96]
	add	r3, r3, #1
	str	r3, [fp, #-96]
.L117:
	ldr	r2, [fp, #-76]
	ldr	r3, [fp, #-96]
	cmp	r2, r3
	bge	.L122
	ldr	r3, [fp, #-84]
	add	r3, r3, #1
	str	r3, [fp, #-84]
.L110:
	ldr	r3, [fp, #-84]
	cmp	r3, #9
	ble	.L123
	bl	omp_get_wtime
	str	r0, [fp, #-36]
	str	r1, [fp, #-32]
	ldr	r3, [fp, #-80]
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	ldr	r2, [fp, #-80]
	mul	r3, r2, r3
	lsl	r3, r3, #3
	mov	r2, r3
	ldr	r1, [fp, #-72]
	ldr	r0, [fp, #-68]
	bl	memcpy
	ldr	r2, [fp, #-80]
	ldr	r1, [fp, #-68]
	ldr	r0, [fp, #-60]
	bl	max_diff
	str	r0, [fp, #-28]
	str	r1, [fp, #-24]
	ldr	r0, [fp, #-72]
	bl	free
	ldr	r0, [fp, #-56]
	bl	free
	ldr	r0, [fp, #-64]
	bl	free
	ldr	r0, [fp, #-60]
	bl	free
	ldr	r0, [fp, #-68]
	bl	free
	ldr	r2, .L128+20
	ldr	r3, .L128+24
	sub	r1, fp, #28
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	beq	.L127
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	b	.L65
.L127:
	mov	r2, #0
	ldr	r3, .L128+28
.L65:
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
	.size	stencil, .-stencil
	.align	2
	.global	max_diff
	.syntax unified
	.arm
	.fpu softvfp
	.type	max_diff, %function
max_diff:
	@ args = 0, pretend = 0, frame = 48
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #48
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	str	r2, [fp, #-48]
	ldr	r3, [fp, #-48]
	sub	r3, r3, #2
	str	r3, [fp, #-24]
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	mov	r3, #1
	str	r3, [fp, #-36]
	b	.L131
.L138:
	mov	r3, #1
	str	r3, [fp, #-32]
	b	.L132
.L137:
	mov	r3, #1
	str	r3, [fp, #-28]
	b	.L133
.L136:
	ldr	r3, [fp, #-36]
	ldr	r2, [fp, #-48]
	mul	r3, r2, r3
	ldr	r2, [fp, #-48]
	mul	r2, r3, r2
	ldr	r3, [fp, #-32]
	ldr	r1, [fp, #-48]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-28]
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-40]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	ldr	r2, [fp, #-48]
	mul	r3, r2, r3
	ldr	r2, [fp, #-48]
	mul	r2, r3, r2
	ldr	r3, [fp, #-32]
	ldr	ip, [fp, #-48]
	mul	r3, ip, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-28]
	add	r3, r2, r3
	lsl	r3, r3, #3
	ldr	r2, [fp, #-44]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r1, r2
	str	r1, [fp, #-12]
	bic	r3, r3, #-2147483648
	str	r3, [fp, #-8]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmpgt
	mov	r3, r0
	cmp	r3, #0
	beq	.L134
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
.L134:
	ldr	r3, [fp, #-28]
	add	r3, r3, #1
	str	r3, [fp, #-28]
.L133:
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	cmp	r2, r3
	bge	.L136
	ldr	r3, [fp, #-32]
	add	r3, r3, #1
	str	r3, [fp, #-32]
.L132:
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-32]
	cmp	r2, r3
	bge	.L137
	ldr	r3, [fp, #-36]
	add	r3, r3, #1
	str	r3, [fp, #-36]
.L131:
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-36]
	cmp	r2, r3
	bge	.L138
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	max_diff, .-max_diff
	.section	.rodata
	.align	2
.LC12:
	.ascii	"Unable to allocate memory in wul.\000"
	.align	2
.LC13:
	.ascii	"Error in WUL\000"
	.text
	.align	2
	.global	wul
	.syntax unified
	.arm
	.fpu softvfp
	.type	wul, %function
wul:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	mov	r3, #8192
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-24]
	lsl	r3, r3, #3
	mov	r0, r3
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	lsl	r3, r3, #3
	mov	r0, r3
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-16]
	mov	r3, #0
	str	r3, [fp, #-28]
	ldr	r3, [fp, #-20]
	cmp	r3, #0
	beq	.L142
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L143
.L142:
	ldr	r0, .L151
	bl	puts
.L143:
	mov	r3, #0
	str	r3, [fp, #-28]
	b	.L144
.L145:
	bl	rand
	mov	r3, r0
	mov	r0, r3
	bl	__aeabi_i2d
	ldr	r3, [fp, #-28]
	lsl	r3, r3, #3
	ldr	r2, [fp, #-20]
	add	r4, r2, r3
	mov	r2, #0
	ldr	r3, .L151+4
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	stm	r4, {r2-r3}
	ldr	r3, [fp, #-28]
	add	r3, r3, #1
	str	r3, [fp, #-28]
.L144:
	ldr	r2, [fp, #-28]
	ldr	r3, [fp, #-24]
	cmp	r2, r3
	blt	.L145
	mov	r3, #0
	str	r3, [fp, #-28]
	b	.L146
.L147:
	ldr	r3, [fp, #-28]
	lsl	r3, r3, #3
	ldr	r2, [fp, #-20]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-28]
	lsl	r3, r3, #3
	ldr	r2, [fp, #-16]
	add	r4, r2, r3
	mov	r2, r0
	mov	r3, r1
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	stm	r4, {r2-r3}
	ldr	r3, [fp, #-28]
	add	r3, r3, #1
	str	r3, [fp, #-28]
.L146:
	ldr	r2, [fp, #-28]
	ldr	r3, [fp, #-24]
	cmp	r2, r3
	blt	.L147
	ldr	r3, [fp, #-20]
	ldmia	r3, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	beq	.L148
	ldr	r0, .L151+8
	bl	puts
.L148:
	ldr	r0, [fp, #-20]
	bl	free
	ldr	r0, [fp, #-16]
	bl	free
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L152:
	.align	2
.L151:
	.word	.LC12
	.word	1105199104
	.word	.LC13
	.size	wul, .-wul
	.section	.rodata
	.align	2
.LC14:
	.ascii	"27S\000"
	.align	2
.LC15:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 48
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #48
	str	r0, [fp, #-48]
	str	r1, [fp, #-52]
	ldr	r3, .L156
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	ldr	r1, [fp, #-52]
	ldr	r0, [fp, #-48]
	bl	init
	bl	wul
	sub	r3, fp, #40
	ldr	r1, .L156+4
	mov	r0, r3
	bl	sprintf
	sub	r3, fp, #40
	ldr	r1, .L156+8
	mov	r0, r3
	bl	benchmark
	bl	finalise
	mov	r3, #0
	ldr	r2, .L156
	ldr	r1, [r2]
	ldr	r2, [fp, #-8]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L155
	bl	__stack_chk_fail
.L155:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L157:
	.align	2
.L156:
	.word	.LC15
	.word	.LC14
	.word	stencil
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
