	.file	"42984.c"
	.intel_syntax noprefix
	.text
	.globl	bitXor
	.type	bitXor, @function
bitXor:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -4[rbp]
	xor	eax, DWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	bitXor, .-bitXor
	.globl	tmin
	.type	tmin, @function
tmin:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, -2147483648
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	tmin, .-tmin
	.globl	isTmax
	.type	isTmax, @function
isTmax:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	cmp	DWORD PTR -20[rbp], -1
	setne	al
	movzx	eax, al
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	add	eax, 1
	xor	eax, DWORD PTR -20[rbp]
	cmp	eax, -1
	sete	al
	movzx	eax, al
	and	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	isTmax, .-isTmax
	.globl	allOddBits
	.type	allOddBits, @function
allOddBits:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -12[rbp], 43690
	mov	eax, DWORD PTR -12[rbp]
	sal	eax, 16
	or	eax, DWORD PTR -12[rbp]
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -8[rbp]
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	sar	eax
	or	eax, DWORD PTR -4[rbp]
	cmp	eax, -1
	sete	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	allOddBits, .-allOddBits
	.globl	negate
	.type	negate, @function
negate:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	neg	eax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	negate, .-negate
	.globl	isAsciiDigit
	.type	isAsciiDigit, @function
isAsciiDigit:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	eax, DWORD PTR -20[rbp]
	sub	eax, 48
	mov	DWORD PTR -12[rbp], eax
	mov	eax, 57
	sub	eax, DWORD PTR -20[rbp]
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	not	eax
	shr	eax, 31
	movzx	eax, al
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -12[rbp]
	cdq
	mov	eax, DWORD PTR -8[rbp]
	sar	eax, 31
	or	eax, edx
	test	eax, eax
	sete	al
	movzx	eax, al
	and	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	isAsciiDigit, .-isAsciiDigit
	.globl	conditional
	.type	conditional, @function
conditional:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	DWORD PTR -28[rbp], edx
	cmp	DWORD PTR -20[rbp], 0
	jne	.L14
	mov	eax, -1
	jmp	.L15
.L14:
	mov	eax, 0
.L15:
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	and	eax, DWORD PTR -28[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	not	eax
	and	eax, DWORD PTR -24[rbp]
	add	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	conditional, .-conditional
	.globl	isLessOrEqual
	.type	isLessOrEqual, @function
isLessOrEqual:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -36[rbp], edi
	mov	DWORD PTR -40[rbp], esi
	mov	eax, DWORD PTR -36[rbp]
	sar	eax, 31
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -40[rbp]
	sar	eax, 31
	mov	DWORD PTR -16[rbp], eax
	cmp	DWORD PTR -16[rbp], 0
	sete	al
	movzx	eax, al
	and	eax, DWORD PTR -20[rbp]
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -36[rbp]
	not	eax
	mov	edx, eax
	mov	eax, DWORD PTR -40[rbp]
	add	eax, edx
	add	eax, 1
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	cmp	eax, DWORD PTR -16[rbp]
	sete	al
	movzx	eax, al
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -8[rbp]
	not	eax
	shr	eax, 31
	movzx	eax, al
	and	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -12[rbp]
	or	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	isLessOrEqual, .-isLessOrEqual
	.globl	logicalNeg
	.type	logicalNeg, @function
logicalNeg:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	eax, DWORD PTR -20[rbp]
	neg	eax
	and	eax, DWORD PTR -20[rbp]
	mov	DWORD PTR -12[rbp], eax
	mov	DWORD PTR -8[rbp], -2147483648
	mov	eax, DWORD PTR -12[rbp]
	sub	eax, 1
	and	eax, DWORD PTR -8[rbp]
	sar	eax, 31
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	and	eax, 1
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	logicalNeg, .-logicalNeg
	.globl	howManyBits
	.type	howManyBits, @function
howManyBits:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	eax, DWORD PTR -20[rbp]
	sar	eax, 31
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	xor	DWORD PTR -20[rbp], eax
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	howManyBits, .-howManyBits
	.globl	floatScale2
	.type	floatScale2, @function
floatScale2:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	eax, DWORD PTR -20[rbp]
	and	eax, 2139095040
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, 8388607
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -8[rbp], 2139095040
	jne	.L24
	mov	eax, DWORD PTR -20[rbp]
	jmp	.L25
.L24:
	cmp	DWORD PTR -8[rbp], 0
	jne	.L26
	mov	eax, DWORD PTR -4[rbp]
	and	eax, 4194304
	test	eax, eax
	jne	.L26
	sal	DWORD PTR -4[rbp]
	jmp	.L27
.L26:
	cmp	DWORD PTR -8[rbp], 0
	jne	.L28
	sal	DWORD PTR -4[rbp]
	and	DWORD PTR -4[rbp], 8388607
.L28:
	add	DWORD PTR -8[rbp], 8388608
.L27:
	mov	eax, DWORD PTR -20[rbp]
	and	eax, -2147483648
	or	eax, DWORD PTR -8[rbp]
	or	eax, DWORD PTR -4[rbp]
.L25:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	floatScale2, .-floatScale2
	.globl	floatFloat2Int
	.type	floatFloat2Int, @function
floatFloat2Int:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -36[rbp], edi
	mov	DWORD PTR -20[rbp], 0
	mov	eax, DWORD PTR -36[rbp]
	shr	eax, 23
	and	eax, 255
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -36[rbp]
	and	eax, 8388607
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -36[rbp]
	and	eax, -2147483648
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	sub	eax, 127
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 0
	jns	.L30
	mov	eax, 0
	jmp	.L31
.L30:
	cmp	DWORD PTR -4[rbp], 30
	jle	.L32
	mov	eax, -2147483648
	jmp	.L31
.L32:
	or	DWORD PTR -12[rbp], 8388608
	cmp	DWORD PTR -4[rbp], 22
	jle	.L33
	mov	eax, DWORD PTR -4[rbp]
	sub	eax, 23
	mov	edx, DWORD PTR -12[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -20[rbp], eax
	jmp	.L34
.L33:
	mov	eax, 23
	sub	eax, DWORD PTR -4[rbp]
	mov	edx, DWORD PTR -12[rbp]
	mov	ecx, eax
	sar	edx, cl
	mov	eax, edx
	mov	DWORD PTR -20[rbp], eax
.L34:
	cmp	DWORD PTR -8[rbp], 0
	jne	.L35
	mov	eax, DWORD PTR -20[rbp]
	jmp	.L31
.L35:
	mov	eax, DWORD PTR -20[rbp]
	neg	eax
.L31:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	floatFloat2Int, .-floatFloat2Int
	.globl	floatPower2
	.type	floatPower2, @function
floatPower2:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -8[rbp], -149
	mov	DWORD PTR -4[rbp], 127
	mov	DWORD PTR -16[rbp], 0
	mov	eax, DWORD PTR -20[rbp]
	add	eax, 127
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	cmp	eax, DWORD PTR -8[rbp]
	jge	.L37
	mov	eax, 0
	jmp	.L38
.L37:
	mov	eax, DWORD PTR -20[rbp]
	cmp	eax, DWORD PTR -4[rbp]
	jle	.L39
	mov	eax, 2139095040
	jmp	.L38
.L39:
	mov	DWORD PTR -16[rbp], 0
	mov	eax, DWORD PTR -20[rbp]
	add	eax, 127
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -20[rbp], -126
	jge	.L40
	mov	eax, -126
	sub	eax, DWORD PTR -20[rbp]
	mov	edx, 8388608
	mov	ecx, eax
	sar	edx, cl
	mov	eax, edx
	mov	DWORD PTR -16[rbp], eax
	mov	DWORD PTR -12[rbp], 0
.L40:
	mov	eax, DWORD PTR -12[rbp]
	sal	eax, 23
	or	eax, DWORD PTR -16[rbp]
.L38:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	floatPower2, .-floatPower2
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"42984.c"
	.text
	.align	2
	.global	bitXor
	.syntax unified
	.arm
	.fpu softvfp
	.type	bitXor, %function
bitXor:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	eor	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	bitXor, .-bitXor
	.align	2
	.global	tmin
	.syntax unified
	.arm
	.fpu softvfp
	.type	tmin, %function
tmin:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	mov	r3, #-2147483648
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	tmin, .-tmin
	.align	2
	.global	isTmax
	.syntax unified
	.arm
	.fpu softvfp
	.type	isTmax, %function
isTmax:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmn	r3, #1
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-16]
	add	r2, r3, #1
	ldr	r3, [fp, #-16]
	eor	r3, r3, r2
	cmn	r3, #1
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, [fp, #-8]
	and	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	isTmax, .-isTmax
	.align	2
	.global	allOddBits
	.syntax unified
	.arm
	.fpu softvfp
	.type	allOddBits, %function
allOddBits:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #28
	str	r0, [fp, #-24]
	ldr	r3, .L9
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #16
	ldr	r2, [fp, #-16]
	orr	r3, r2, r3
	str	r3, [fp, #-12]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-12]
	and	r3, r3, r2
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-24]
	asr	r2, r3, #1
	ldr	r3, [fp, #-8]
	orr	r3, r2, r3
	cmn	r3, #1
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L10:
	.align	2
.L9:
	.word	43690
	.size	allOddBits, .-allOddBits
	.align	2
	.global	negate
	.syntax unified
	.arm
	.fpu softvfp
	.type	negate, %function
negate:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	rsb	r3, r3, #0
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	negate, .-negate
	.align	2
	.global	isAsciiDigit
	.syntax unified
	.arm
	.fpu softvfp
	.type	isAsciiDigit, %function
isAsciiDigit:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #28
	str	r0, [fp, #-24]
	ldr	r3, [fp, #-24]
	sub	r3, r3, #48
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-24]
	rsb	r3, r3, #57
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-24]
	mvn	r3, r3
	lsr	r3, r3, #31
	and	r3, r3, #255
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-16]
	asr	r2, r3, #31
	ldr	r3, [fp, #-12]
	asr	r3, r3, #31
	orr	r3, r2, r3
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, [fp, #-8]
	and	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	isAsciiDigit, .-isAsciiDigit
	.align	2
	.global	conditional
	.syntax unified
	.arm
	.fpu softvfp
	.type	conditional, %function
conditional:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #28
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-24]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L16
	mvn	r3, #0
	b	.L17
.L16:
	mov	r3, #0
.L17:
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-24]
	and	r2, r2, r3
	ldr	r3, [fp, #-8]
	mvn	r1, r3
	ldr	r3, [fp, #-20]
	and	r3, r3, r1
	add	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	conditional, .-conditional
	.align	2
	.global	isLessOrEqual
	.syntax unified
	.arm
	.fpu softvfp
	.type	isLessOrEqual, %function
isLessOrEqual:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #36
	str	r0, [fp, #-32]
	str	r1, [fp, #-36]
	ldr	r3, [fp, #-32]
	asr	r3, r3, #31
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-36]
	asr	r3, r3, #31
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-20]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, [fp, #-24]
	and	r3, r3, r2
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-32]
	mvn	r2, r3
	ldr	r3, [fp, #-36]
	add	r3, r2, r3
	add	r3, r3, #1
	str	r3, [fp, #-12]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-20]
	cmp	r2, r3
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-12]
	mvn	r3, r3
	lsr	r3, r3, #31
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, [fp, #-8]
	and	r3, r3, r2
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-8]
	orr	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	isLessOrEqual, .-isLessOrEqual
	.align	2
	.global	logicalNeg
	.syntax unified
	.arm
	.fpu softvfp
	.type	logicalNeg, %function
logicalNeg:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #28
	str	r0, [fp, #-24]
	ldr	r3, [fp, #-24]
	rsb	r3, r3, #0
	ldr	r2, [fp, #-24]
	and	r3, r3, r2
	str	r3, [fp, #-16]
	mov	r3, #-2147483648
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-16]
	sub	r2, r3, #1
	ldr	r3, [fp, #-12]
	and	r3, r3, r2
	asr	r3, r3, #31
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	and	r3, r3, #1
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	logicalNeg, .-logicalNeg
	.align	2
	.global	howManyBits
	.syntax unified
	.arm
	.fpu softvfp
	.type	howManyBits, %function
howManyBits:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	asr	r3, r3, #31
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-8]
	eor	r3, r3, r2
	str	r3, [fp, #-16]
	mov	r3, #0
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	howManyBits, .-howManyBits
	.align	2
	.global	floatScale2
	.syntax unified
	.arm
	.fpu softvfp
	.type	floatScale2, %function
floatScale2:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	ldr	r2, [fp, #-16]
	ldr	r3, .L31
	and	r3, r3, r2
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-16]
	bic	r3, r3, #-16777216
	bic	r3, r3, #8388608
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-12]
	ldr	r2, .L31
	cmp	r3, r2
	bne	.L26
	ldr	r3, [fp, #-16]
	b	.L27
.L26:
	ldr	r3, [fp, #-12]
	cmp	r3, #0
	bne	.L28
	ldr	r3, [fp, #-8]
	and	r3, r3, #4194304
	cmp	r3, #0
	bne	.L28
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #1
	str	r3, [fp, #-8]
	b	.L29
.L28:
	ldr	r3, [fp, #-12]
	cmp	r3, #0
	bne	.L30
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #1
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	bic	r3, r3, #-16777216
	bic	r3, r3, #8388608
	str	r3, [fp, #-8]
.L30:
	ldr	r3, [fp, #-12]
	add	r3, r3, #8388608
	str	r3, [fp, #-12]
.L29:
	ldr	r3, [fp, #-16]
	and	r2, r3, #-2147483648
	ldr	r3, [fp, #-12]
	orr	r2, r2, r3
	ldr	r3, [fp, #-8]
	orr	r3, r2, r3
.L27:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L32:
	.align	2
.L31:
	.word	2139095040
	.size	floatScale2, .-floatScale2
	.align	2
	.global	floatFloat2Int
	.syntax unified
	.arm
	.fpu softvfp
	.type	floatFloat2Int, %function
floatFloat2Int:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #36
	str	r0, [fp, #-32]
	mov	r3, #0
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-32]
	lsr	r3, r3, #23
	and	r3, r3, #255
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-32]
	bic	r3, r3, #-16777216
	bic	r3, r3, #8388608
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-32]
	and	r3, r3, #-2147483648
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-20]
	sub	r3, r3, #127
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	bge	.L34
	mov	r3, #0
	b	.L35
.L34:
	ldr	r3, [fp, #-8]
	cmp	r3, #30
	ble	.L36
	mov	r3, #-2147483648
	b	.L35
.L36:
	ldr	r3, [fp, #-16]
	orr	r3, r3, #8388608
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-8]
	cmp	r3, #22
	ble	.L37
	ldr	r3, [fp, #-8]
	sub	r3, r3, #23
	ldr	r2, [fp, #-16]
	lsl	r3, r2, r3
	str	r3, [fp, #-24]
	b	.L38
.L37:
	ldr	r3, [fp, #-8]
	rsb	r3, r3, #23
	ldr	r2, [fp, #-16]
	asr	r3, r2, r3
	str	r3, [fp, #-24]
.L38:
	ldr	r3, [fp, #-12]
	cmp	r3, #0
	bne	.L39
	ldr	r3, [fp, #-24]
	b	.L35
.L39:
	ldr	r3, [fp, #-24]
	rsb	r3, r3, #0
.L35:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	floatFloat2Int, .-floatFloat2Int
	.align	2
	.global	floatPower2
	.syntax unified
	.arm
	.fpu softvfp
	.type	floatPower2, %function
floatPower2:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #28
	str	r0, [fp, #-24]
	mvn	r3, #148
	str	r3, [fp, #-12]
	mov	r3, #127
	str	r3, [fp, #-8]
	mov	r3, #0
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	add	r3, r3, #127
	str	r3, [fp, #-16]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-12]
	cmp	r2, r3
	bge	.L41
	mov	r3, #0
	b	.L42
.L41:
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-8]
	cmp	r2, r3
	ble	.L43
	ldr	r3, .L45
	b	.L42
.L43:
	mov	r3, #0
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	add	r3, r3, #127
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-24]
	cmn	r3, #126
	bge	.L44
	ldr	r2, [fp, #-24]
	mvn	r3, #125
	sub	r3, r3, r2
	mov	r2, #8388608
	asr	r3, r2, r3
	str	r3, [fp, #-20]
	mov	r3, #0
	str	r3, [fp, #-16]
.L44:
	ldr	r3, [fp, #-16]
	lsl	r2, r3, #23
	ldr	r3, [fp, #-20]
	orr	r3, r2, r3
.L42:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L46:
	.align	2
.L45:
	.word	2139095040
	.size	floatPower2, .-floatPower2
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
