	.file	"210687.c"
	.intel_syntax noprefix
	.text
	.globl	__cs_active_thread
	.data
	.align 8
	.type	__cs_active_thread, @object
	.size	__cs_active_thread, 12
__cs_active_thread:
	.long	1
	.zero	8
	.globl	__cs_pc
	.bss
	.align 8
	.type	__cs_pc, @object
	.size	__cs_pc, 12
__cs_pc:
	.zero	12
	.globl	__cs_pc_cs
	.align 8
	.type	__cs_pc_cs, @object
	.size	__cs_pc_cs, 12
__cs_pc_cs:
	.zero	12
	.globl	__cs_thread_index
	.align 4
	.type	__cs_thread_index, @object
	.size	__cs_thread_index, 4
__cs_thread_index:
	.zero	4
	.globl	__cs_thread_lines
	.data
	.align 8
	.type	__cs_thread_lines, @object
	.size	__cs_thread_lines, 12
__cs_thread_lines:
	.long	3
	.long	13
	.long	13
	.globl	__cs_threadargs
	.bss
	.align 16
	.type	__cs_threadargs, @object
	.size	__cs_threadargs, 24
__cs_threadargs:
	.zero	24
	.text
	.globl	__CSEQ_message
	.type	__CSEQ_message, @function
__CSEQ_message:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	__CSEQ_message, .-__CSEQ_message
	.globl	__VERIFIER_assert
	.type	__VERIFIER_assert, @function
__VERIFIER_assert:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	cmp	DWORD PTR -4[rbp], 0
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
.L4:
	.cfi_endproc
.LFE7:
	.size	__VERIFIER_assert, .-__VERIFIER_assert
	.globl	__VERIFIER_assume
	.type	__VERIFIER_assume, @function
__VERIFIER_assume:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	__VERIFIER_assume, .-__VERIFIER_assume
	.globl	__VERIFIER_nondet_int
	.type	__VERIFIER_nondet_int, @function
__VERIFIER_nondet_int:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	__VERIFIER_nondet_int, .-__VERIFIER_nondet_int
	.globl	__VERIFIER_nondet_uint
	.type	__VERIFIER_nondet_uint, @function
__VERIFIER_nondet_uint:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	__VERIFIER_nondet_uint, .-__VERIFIER_nondet_uint
	.globl	__cs_cond_init
	.type	__cs_cond_init, @function
__cs_cond_init:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR [rax], -1
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	__cs_cond_init, .-__cs_cond_init
	.section	.rodata
.LC0:
	.string	"conditional variable signal"
	.text
	.globl	__cs_cond_signal
	.type	__cs_cond_signal, @function
__cs_cond_signal:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 8
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR [rax], 1
	lea	rdi, .LC0[rip]
	call	__CSEQ_message
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	__cs_cond_signal, .-__cs_cond_signal
	.section	.rodata
.LC1:
	.string	"lock released"
	.text
	.globl	__cs_mutex_unlock
	.type	__cs_mutex_unlock, @function
__cs_mutex_unlock:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 8
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assert
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	cmp	eax, -2
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assert
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	mov	edx, eax
	mov	eax, DWORD PTR __cs_thread_index[rip]
	add	eax, 1
	cmp	edx, eax
	sete	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assert
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR [rax], -1
	lea	rdi, .LC1[rip]
	call	__CSEQ_message
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	__cs_mutex_unlock, .-__cs_mutex_unlock
	.globl	__cs_cond_wait_1
	.type	__cs_cond_wait_1, @function
__cs_cond_wait_1:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assert
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	cmp	eax, -2
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assert
	mov	rax, QWORD PTR -16[rbp]
	mov	rdi, rax
	call	__cs_mutex_unlock
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	__cs_cond_wait_1, .-__cs_cond_wait_1
	.section	.rodata
.LC2:
	.string	"lock acquired"
	.text
	.globl	__cs_mutex_lock
	.type	__cs_mutex_lock, @function
__cs_mutex_lock:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 8
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assert
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	cmp	eax, -2
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assert
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	cmp	eax, -1
	sete	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_thread_index[rip]
	add	eax, 1
	mov	edx, eax
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR [rax], edx
	lea	rdi, .LC2[rip]
	call	__CSEQ_message
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	__cs_mutex_lock, .-__cs_mutex_lock
	.globl	__cs_cond_wait_2
	.type	__cs_cond_wait_2, @function
__cs_cond_wait_2:
.LFB16:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	cmp	eax, 1
	sete	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	rax, QWORD PTR -16[rbp]
	mov	rdi, rax
	call	__cs_mutex_lock
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE16:
	.size	__cs_cond_wait_2, .-__cs_cond_wait_2
	.section	.rodata
.LC3:
	.string	"thread spawned"
	.text
	.globl	__cs_create
	.type	__cs_create, @function
__cs_create:
.LFB17:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 40
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	QWORD PTR -24[rbp], rdx
	mov	QWORD PTR -32[rbp], rcx
	mov	DWORD PTR -36[rbp], r8d
	cmp	DWORD PTR -36[rbp], 2
	jle	.L20
	mov	eax, 0
	jmp	.L21
.L20:
	mov	rax, QWORD PTR -8[rbp]
	mov	edx, DWORD PTR -36[rbp]
	mov	DWORD PTR [rax], edx
	mov	eax, DWORD PTR -36[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, __cs_active_thread[rip]
	mov	DWORD PTR [rdx+rax], 1
	mov	eax, DWORD PTR -36[rbp]
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rdx, __cs_threadargs[rip]
	mov	rax, QWORD PTR -32[rbp]
	mov	QWORD PTR [rcx+rdx], rax
	lea	rdi, .LC3[rip]
	call	__CSEQ_message
	mov	eax, 0
.L21:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE17:
	.size	__cs_create, .-__cs_create
	.globl	__cs_exit
	.type	__cs_exit, @function
__cs_exit:
.LFB18:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE18:
	.size	__cs_exit, .-__cs_exit
	.globl	__cs_init_scalar
	.type	__cs_init_scalar, @function
__cs_init_scalar:
.LFB19:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	cmp	DWORD PTR -28[rbp], 4
	jne	.L25
	call	__VERIFIER_nondet_int
	mov	rdx, QWORD PTR -24[rbp]
	mov	DWORD PTR [rdx], eax
	jmp	.L27
.L25:
	mov	rax, QWORD PTR -24[rbp]
	mov	QWORD PTR -8[rbp], rax
.L27:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE19:
	.size	__cs_init_scalar, .-__cs_init_scalar
	.globl	__cs_join
	.type	__cs_join, @function
__cs_join:
.LFB20:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	mov	QWORD PTR -16[rbp], rsi
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, __cs_pc[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rcx, 0[0+rax*4]
	lea	rax, __cs_thread_lines[rip]
	mov	eax, DWORD PTR [rcx+rax]
	cmp	edx, eax
	sete	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE20:
	.size	__cs_join, .-__cs_join
	.section	.rodata
.LC4:
	.string	"lock destroyed"
	.text
	.globl	__cs_mutex_destroy
	.type	__cs_mutex_destroy, @function
__cs_mutex_destroy:
.LFB21:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 8
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assert
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	cmp	eax, -2
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assert
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	cmp	eax, -1
	sete	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assert
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR [rax], -2
	lea	rdi, .LC4[rip]
	call	__CSEQ_message
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE21:
	.size	__cs_mutex_destroy, .-__cs_mutex_destroy
	.globl	__cs_mutex_init
	.type	__cs_mutex_init, @function
__cs_mutex_init:
.LFB22:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	DWORD PTR -12[rbp], esi
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR [rax], -1
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE22:
	.size	__cs_mutex_init, .-__cs_mutex_init
	.globl	__cs_safe_malloc
	.type	__cs_safe_malloc, @function
__cs_safe_malloc:
.LFB23:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -20[rbp], edi
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	mov	rdi, rax
	call	malloc@PLT
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	mov	edi, eax
	call	__VERIFIER_assume
	mov	rax, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE23:
	.size	__cs_safe_malloc, .-__cs_safe_malloc
	.globl	i
	.data
	.align 4
	.type	i, @object
	.size	i, 4
i:
	.long	1
	.globl	j
	.align 4
	.type	j, @object
	.size	j, 4
j:
	.long	1
	.text
	.globl	t1_0
	.type	t1_0, @function
t1_0:
.LFB24:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 8
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, DWORD PTR __cs_pc[rip+4]
	test	eax, eax
	setne	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	test	eax, eax
	sete	al
	or	eax, edx
	test	al, al
	jne	.L37
	mov	esi, 4
	lea	rdi, __cs_local_t1_k.4[rip]
	call	__cs_init_scalar
	mov	DWORD PTR __cs_local_t1_k.4[rip], 0
	mov	DWORD PTR __cs_local_t1_k.4[rip], 0
.L37:
	mov	eax, DWORD PTR __cs_pc[rip+4]
	cmp	eax, 1
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	cmp	eax, 1
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L38
	mov	edx, DWORD PTR i[rip]
	mov	eax, DWORD PTR j[rip]
	add	eax, edx
	mov	DWORD PTR i[rip], eax
	mov	eax, DWORD PTR __cs_local_t1_k.4[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_t1_k.4[rip], eax
.L38:
	mov	eax, DWORD PTR __cs_pc[rip+4]
	cmp	eax, 2
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	cmp	eax, 2
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L39
	mov	edx, DWORD PTR i[rip]
	mov	eax, DWORD PTR j[rip]
	add	eax, edx
	mov	DWORD PTR i[rip], eax
	mov	eax, DWORD PTR __cs_local_t1_k.4[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_t1_k.4[rip], eax
.L39:
	mov	eax, DWORD PTR __cs_pc[rip+4]
	cmp	eax, 3
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	cmp	eax, 3
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L40
	mov	edx, DWORD PTR i[rip]
	mov	eax, DWORD PTR j[rip]
	add	eax, edx
	mov	DWORD PTR i[rip], eax
	mov	eax, DWORD PTR __cs_local_t1_k.4[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_t1_k.4[rip], eax
.L40:
	mov	eax, DWORD PTR __cs_pc[rip+4]
	cmp	eax, 4
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	cmp	eax, 4
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L41
	mov	edx, DWORD PTR i[rip]
	mov	eax, DWORD PTR j[rip]
	add	eax, edx
	mov	DWORD PTR i[rip], eax
	mov	eax, DWORD PTR __cs_local_t1_k.4[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_t1_k.4[rip], eax
.L41:
	mov	eax, DWORD PTR __cs_pc[rip+4]
	cmp	eax, 5
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	cmp	eax, 5
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L42
	mov	edx, DWORD PTR i[rip]
	mov	eax, DWORD PTR j[rip]
	add	eax, edx
	mov	DWORD PTR i[rip], eax
	mov	eax, DWORD PTR __cs_local_t1_k.4[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_t1_k.4[rip], eax
.L42:
	mov	eax, DWORD PTR __cs_pc[rip+4]
	cmp	eax, 6
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	cmp	eax, 6
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L43
	mov	edx, DWORD PTR i[rip]
	mov	eax, DWORD PTR j[rip]
	add	eax, edx
	mov	DWORD PTR i[rip], eax
	mov	eax, DWORD PTR __cs_local_t1_k.4[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_t1_k.4[rip], eax
.L43:
	mov	eax, DWORD PTR __cs_pc[rip+4]
	cmp	eax, 7
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	cmp	eax, 7
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L44
	mov	edx, DWORD PTR i[rip]
	mov	eax, DWORD PTR j[rip]
	add	eax, edx
	mov	DWORD PTR i[rip], eax
	mov	eax, DWORD PTR __cs_local_t1_k.4[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_t1_k.4[rip], eax
.L44:
	mov	eax, DWORD PTR __cs_pc[rip+4]
	cmp	eax, 8
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	cmp	eax, 8
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L45
	mov	edx, DWORD PTR i[rip]
	mov	eax, DWORD PTR j[rip]
	add	eax, edx
	mov	DWORD PTR i[rip], eax
	mov	eax, DWORD PTR __cs_local_t1_k.4[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_t1_k.4[rip], eax
.L45:
	mov	eax, DWORD PTR __cs_pc[rip+4]
	cmp	eax, 9
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	cmp	eax, 9
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L46
	mov	edx, DWORD PTR i[rip]
	mov	eax, DWORD PTR j[rip]
	add	eax, edx
	mov	DWORD PTR i[rip], eax
	mov	eax, DWORD PTR __cs_local_t1_k.4[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_t1_k.4[rip], eax
.L46:
	mov	eax, DWORD PTR __cs_pc[rip+4]
	cmp	eax, 10
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	cmp	eax, 10
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L47
	mov	edx, DWORD PTR i[rip]
	mov	eax, DWORD PTR j[rip]
	add	eax, edx
	mov	DWORD PTR i[rip], eax
	mov	eax, DWORD PTR __cs_local_t1_k.4[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_t1_k.4[rip], eax
.L47:
	mov	eax, DWORD PTR __cs_pc[rip+4]
	cmp	eax, 11
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	cmp	eax, 11
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L48
	mov	edx, DWORD PTR i[rip]
	mov	eax, DWORD PTR j[rip]
	add	eax, edx
	mov	DWORD PTR i[rip], eax
	mov	eax, DWORD PTR __cs_local_t1_k.4[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_t1_k.4[rip], eax
.L48:
	mov	eax, DWORD PTR __cs_pc[rip+4]
	cmp	eax, 12
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	cmp	eax, 12
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L49
	mov	eax, DWORD PTR __cs_local_t1_k.4[rip]
	cmp	eax, 10
	setg	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
.L50:
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	cmp	eax, 12
	seta	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
.L51:
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	cmp	eax, 12
	seta	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
.L49:
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE24:
	.size	t1_0, .-t1_0
	.globl	t2_0
	.type	t2_0, @function
t2_0:
.LFB25:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 8
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, DWORD PTR __cs_pc[rip+8]
	test	eax, eax
	setne	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	test	eax, eax
	sete	al
	or	eax, edx
	test	al, al
	jne	.L54
	mov	esi, 4
	lea	rdi, __cs_local_t2_k.3[rip]
	call	__cs_init_scalar
	mov	DWORD PTR __cs_local_t2_k.3[rip], 0
	mov	DWORD PTR __cs_local_t2_k.3[rip], 0
.L54:
	mov	eax, DWORD PTR __cs_pc[rip+8]
	cmp	eax, 1
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	cmp	eax, 1
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L55
	mov	edx, DWORD PTR j[rip]
	mov	eax, DWORD PTR i[rip]
	add	eax, edx
	mov	DWORD PTR j[rip], eax
	mov	eax, DWORD PTR __cs_local_t2_k.3[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_t2_k.3[rip], eax
.L55:
	mov	eax, DWORD PTR __cs_pc[rip+8]
	cmp	eax, 2
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	cmp	eax, 2
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L56
	mov	edx, DWORD PTR j[rip]
	mov	eax, DWORD PTR i[rip]
	add	eax, edx
	mov	DWORD PTR j[rip], eax
	mov	eax, DWORD PTR __cs_local_t2_k.3[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_t2_k.3[rip], eax
.L56:
	mov	eax, DWORD PTR __cs_pc[rip+8]
	cmp	eax, 3
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	cmp	eax, 3
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L57
	mov	edx, DWORD PTR j[rip]
	mov	eax, DWORD PTR i[rip]
	add	eax, edx
	mov	DWORD PTR j[rip], eax
	mov	eax, DWORD PTR __cs_local_t2_k.3[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_t2_k.3[rip], eax
.L57:
	mov	eax, DWORD PTR __cs_pc[rip+8]
	cmp	eax, 4
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	cmp	eax, 4
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L58
	mov	edx, DWORD PTR j[rip]
	mov	eax, DWORD PTR i[rip]
	add	eax, edx
	mov	DWORD PTR j[rip], eax
	mov	eax, DWORD PTR __cs_local_t2_k.3[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_t2_k.3[rip], eax
.L58:
	mov	eax, DWORD PTR __cs_pc[rip+8]
	cmp	eax, 5
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	cmp	eax, 5
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L59
	mov	edx, DWORD PTR j[rip]
	mov	eax, DWORD PTR i[rip]
	add	eax, edx
	mov	DWORD PTR j[rip], eax
	mov	eax, DWORD PTR __cs_local_t2_k.3[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_t2_k.3[rip], eax
.L59:
	mov	eax, DWORD PTR __cs_pc[rip+8]
	cmp	eax, 6
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	cmp	eax, 6
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L60
	mov	edx, DWORD PTR j[rip]
	mov	eax, DWORD PTR i[rip]
	add	eax, edx
	mov	DWORD PTR j[rip], eax
	mov	eax, DWORD PTR __cs_local_t2_k.3[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_t2_k.3[rip], eax
.L60:
	mov	eax, DWORD PTR __cs_pc[rip+8]
	cmp	eax, 7
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	cmp	eax, 7
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L61
	mov	edx, DWORD PTR j[rip]
	mov	eax, DWORD PTR i[rip]
	add	eax, edx
	mov	DWORD PTR j[rip], eax
	mov	eax, DWORD PTR __cs_local_t2_k.3[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_t2_k.3[rip], eax
.L61:
	mov	eax, DWORD PTR __cs_pc[rip+8]
	cmp	eax, 8
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	cmp	eax, 8
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L62
	mov	edx, DWORD PTR j[rip]
	mov	eax, DWORD PTR i[rip]
	add	eax, edx
	mov	DWORD PTR j[rip], eax
	mov	eax, DWORD PTR __cs_local_t2_k.3[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_t2_k.3[rip], eax
.L62:
	mov	eax, DWORD PTR __cs_pc[rip+8]
	cmp	eax, 9
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	cmp	eax, 9
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L63
	mov	edx, DWORD PTR j[rip]
	mov	eax, DWORD PTR i[rip]
	add	eax, edx
	mov	DWORD PTR j[rip], eax
	mov	eax, DWORD PTR __cs_local_t2_k.3[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_t2_k.3[rip], eax
.L63:
	mov	eax, DWORD PTR __cs_pc[rip+8]
	cmp	eax, 10
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	cmp	eax, 10
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L64
	mov	edx, DWORD PTR j[rip]
	mov	eax, DWORD PTR i[rip]
	add	eax, edx
	mov	DWORD PTR j[rip], eax
	mov	eax, DWORD PTR __cs_local_t2_k.3[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_t2_k.3[rip], eax
.L64:
	mov	eax, DWORD PTR __cs_pc[rip+8]
	cmp	eax, 11
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	cmp	eax, 11
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L65
	mov	edx, DWORD PTR j[rip]
	mov	eax, DWORD PTR i[rip]
	add	eax, edx
	mov	DWORD PTR j[rip], eax
	mov	eax, DWORD PTR __cs_local_t2_k.3[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_t2_k.3[rip], eax
.L65:
	mov	eax, DWORD PTR __cs_pc[rip+8]
	cmp	eax, 12
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	cmp	eax, 12
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L66
	mov	eax, DWORD PTR __cs_local_t2_k.3[rip]
	cmp	eax, 10
	setg	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
.L67:
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	cmp	eax, 12
	seta	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
.L68:
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	cmp	eax, 12
	seta	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
.L66:
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE25:
	.size	t2_0, .-t2_0
	.globl	main_thread
	.type	main_thread, @function
main_thread:
.LFB26:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, DWORD PTR __cs_pc[rip]
	test	eax, eax
	setne	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	test	eax, eax
	sete	al
	or	eax, edx
	test	al, al
	jne	.L71
	mov	esi, 4
	lea	rdi, __cs_local_main_id1.2[rip]
	call	__cs_init_scalar
	mov	esi, 4
	lea	rdi, __cs_local_main_id2.1[rip]
	call	__cs_init_scalar
	mov	r8d, 1
	mov	ecx, 0
	lea	rdx, t1_0[rip]
	mov	esi, 0
	lea	rdi, __cs_local_main_id1.2[rip]
	call	__cs_create
.L71:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 1
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 1
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L72
	mov	r8d, 2
	mov	ecx, 0
	lea	rdx, t2_0[rip]
	mov	esi, 0
	lea	rdi, __cs_local_main_id2.1[rip]
	call	__cs_create
	mov	esi, 1
	lea	rdi, __cs_local_main___cs_tmp_if_cond_1.0[rip]
	call	__cs_init_scalar
.L72:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 2
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 2
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L73
	mov	eax, DWORD PTR i[rip]
	cmp	eax, 46367
	jg	.L74
	mov	eax, DWORD PTR j[rip]
	cmp	eax, 46367
	jle	.L75
.L74:
	mov	eax, 1
	jmp	.L76
.L75:
	mov	eax, 0
.L76:
	and	eax, 1
	mov	BYTE PTR __cs_local_main___cs_tmp_if_cond_1.0[rip], al
	movzx	eax, BYTE PTR __cs_local_main___cs_tmp_if_cond_1.0[rip]
	test	al, al
	je	.L79
	mov	edi, 0
	call	__VERIFIER_assert
	jmp	.L77
.L79:
	nop
.L77:
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 2
	seta	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
.L73:
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE26:
	.size	main_thread, .-main_thread
	.globl	main
	.type	main, @function
main:
.LFB27:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 144
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -136[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -132[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -128[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -124[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -120[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -116[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -112[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -108[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -104[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -100[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -96[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -92[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -88[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -84[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -80[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -76[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -72[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -68[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -64[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -60[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -56[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -52[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -48[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -44[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -40[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -36[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -32[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -28[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -24[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -20[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -16[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -12[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -8[rbp], eax
	call	__VERIFIER_nondet_uint
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -136[rbp], 0
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	DWORD PTR __cs_thread_index[rip], 0
	mov	edx, DWORD PTR __cs_pc[rip]
	mov	eax, DWORD PTR -136[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip], eax
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 3
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	call	main_thread
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	mov	DWORD PTR __cs_pc[rip], eax
	mov	eax, DWORD PTR __cs_active_thread[rip+4]
	cmp	eax, 1
	jne	.L81
	mov	DWORD PTR __cs_thread_index[rip], 1
	mov	edx, DWORD PTR __cs_pc[rip+4]
	mov	eax, DWORD PTR -132[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+4], eax
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	cmp	eax, 13
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	rax, QWORD PTR __cs_threadargs[rip+8]
	mov	rdi, rax
	call	t1_0
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	mov	DWORD PTR __cs_pc[rip+4], eax
.L81:
	mov	eax, DWORD PTR __cs_active_thread[rip+8]
	cmp	eax, 1
	jne	.L82
	mov	DWORD PTR __cs_thread_index[rip], 2
	mov	edx, DWORD PTR __cs_pc[rip+8]
	mov	eax, DWORD PTR -128[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+8], eax
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	cmp	eax, 13
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	rax, QWORD PTR __cs_threadargs[rip+16]
	mov	rdi, rax
	call	t2_0
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	mov	DWORD PTR __cs_pc[rip+8], eax
.L82:
	mov	eax, DWORD PTR __cs_active_thread[rip]
	cmp	eax, 1
	jne	.L83
	mov	DWORD PTR __cs_thread_index[rip], 0
	mov	edx, DWORD PTR __cs_pc[rip]
	mov	eax, DWORD PTR -124[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip]
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 3
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	call	main_thread
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	mov	DWORD PTR __cs_pc[rip], eax
.L83:
	mov	eax, DWORD PTR __cs_active_thread[rip+4]
	cmp	eax, 1
	jne	.L84
	mov	DWORD PTR __cs_thread_index[rip], 1
	mov	edx, DWORD PTR __cs_pc[rip+4]
	mov	eax, DWORD PTR -120[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+4], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip+4]
	mov	eax, DWORD PTR __cs_pc[rip+4]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	cmp	eax, 13
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_thread_index[rip]
	mov	eax, eax
	lea	rdx, 0[0+rax*8]
	lea	rax, __cs_threadargs[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	t1_0
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	mov	DWORD PTR __cs_pc[rip+4], eax
.L84:
	mov	eax, DWORD PTR __cs_active_thread[rip+8]
	cmp	eax, 1
	jne	.L85
	mov	DWORD PTR __cs_thread_index[rip], 2
	mov	edx, DWORD PTR __cs_pc[rip+8]
	mov	eax, DWORD PTR -116[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+8], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip+8]
	mov	eax, DWORD PTR __cs_pc[rip+8]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	cmp	eax, 13
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_thread_index[rip]
	mov	eax, eax
	lea	rdx, 0[0+rax*8]
	lea	rax, __cs_threadargs[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	t2_0
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	mov	DWORD PTR __cs_pc[rip+8], eax
.L85:
	mov	eax, DWORD PTR __cs_active_thread[rip]
	cmp	eax, 1
	jne	.L86
	mov	DWORD PTR __cs_thread_index[rip], 0
	mov	edx, DWORD PTR __cs_pc[rip]
	mov	eax, DWORD PTR -112[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip]
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 3
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	call	main_thread
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	mov	DWORD PTR __cs_pc[rip], eax
.L86:
	mov	eax, DWORD PTR __cs_active_thread[rip+4]
	cmp	eax, 1
	jne	.L87
	mov	DWORD PTR __cs_thread_index[rip], 1
	mov	edx, DWORD PTR __cs_pc[rip+4]
	mov	eax, DWORD PTR -108[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+4], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip+4]
	mov	eax, DWORD PTR __cs_pc[rip+4]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	cmp	eax, 13
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_thread_index[rip]
	mov	eax, eax
	lea	rdx, 0[0+rax*8]
	lea	rax, __cs_threadargs[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	t1_0
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	mov	DWORD PTR __cs_pc[rip+4], eax
.L87:
	mov	eax, DWORD PTR __cs_active_thread[rip+8]
	cmp	eax, 1
	jne	.L88
	mov	DWORD PTR __cs_thread_index[rip], 2
	mov	edx, DWORD PTR __cs_pc[rip+8]
	mov	eax, DWORD PTR -104[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+8], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip+8]
	mov	eax, DWORD PTR __cs_pc[rip+8]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	cmp	eax, 13
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_thread_index[rip]
	mov	eax, eax
	lea	rdx, 0[0+rax*8]
	lea	rax, __cs_threadargs[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	t2_0
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	mov	DWORD PTR __cs_pc[rip+8], eax
.L88:
	mov	eax, DWORD PTR __cs_active_thread[rip]
	cmp	eax, 1
	jne	.L89
	mov	DWORD PTR __cs_thread_index[rip], 0
	mov	edx, DWORD PTR __cs_pc[rip]
	mov	eax, DWORD PTR -100[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip]
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 3
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	call	main_thread
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	mov	DWORD PTR __cs_pc[rip], eax
.L89:
	mov	eax, DWORD PTR __cs_active_thread[rip+4]
	cmp	eax, 1
	jne	.L90
	mov	DWORD PTR __cs_thread_index[rip], 1
	mov	edx, DWORD PTR __cs_pc[rip+4]
	mov	eax, DWORD PTR -96[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+4], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip+4]
	mov	eax, DWORD PTR __cs_pc[rip+4]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	cmp	eax, 13
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_thread_index[rip]
	mov	eax, eax
	lea	rdx, 0[0+rax*8]
	lea	rax, __cs_threadargs[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	t1_0
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	mov	DWORD PTR __cs_pc[rip+4], eax
.L90:
	mov	eax, DWORD PTR __cs_active_thread[rip+8]
	cmp	eax, 1
	jne	.L91
	mov	DWORD PTR __cs_thread_index[rip], 2
	mov	edx, DWORD PTR __cs_pc[rip+8]
	mov	eax, DWORD PTR -92[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+8], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip+8]
	mov	eax, DWORD PTR __cs_pc[rip+8]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	cmp	eax, 13
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_thread_index[rip]
	mov	eax, eax
	lea	rdx, 0[0+rax*8]
	lea	rax, __cs_threadargs[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	t2_0
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	mov	DWORD PTR __cs_pc[rip+8], eax
.L91:
	mov	eax, DWORD PTR __cs_active_thread[rip]
	cmp	eax, 1
	jne	.L92
	mov	DWORD PTR __cs_thread_index[rip], 0
	mov	edx, DWORD PTR __cs_pc[rip]
	mov	eax, DWORD PTR -88[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip]
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 3
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	call	main_thread
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	mov	DWORD PTR __cs_pc[rip], eax
.L92:
	mov	eax, DWORD PTR __cs_active_thread[rip+4]
	cmp	eax, 1
	jne	.L93
	mov	DWORD PTR __cs_thread_index[rip], 1
	mov	edx, DWORD PTR __cs_pc[rip+4]
	mov	eax, DWORD PTR -84[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+4], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip+4]
	mov	eax, DWORD PTR __cs_pc[rip+4]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	cmp	eax, 13
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_thread_index[rip]
	mov	eax, eax
	lea	rdx, 0[0+rax*8]
	lea	rax, __cs_threadargs[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	t1_0
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	mov	DWORD PTR __cs_pc[rip+4], eax
.L93:
	mov	eax, DWORD PTR __cs_active_thread[rip+8]
	cmp	eax, 1
	jne	.L94
	mov	DWORD PTR __cs_thread_index[rip], 2
	mov	edx, DWORD PTR __cs_pc[rip+8]
	mov	eax, DWORD PTR -80[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+8], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip+8]
	mov	eax, DWORD PTR __cs_pc[rip+8]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	cmp	eax, 13
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_thread_index[rip]
	mov	eax, eax
	lea	rdx, 0[0+rax*8]
	lea	rax, __cs_threadargs[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	t2_0
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	mov	DWORD PTR __cs_pc[rip+8], eax
.L94:
	mov	eax, DWORD PTR __cs_active_thread[rip]
	cmp	eax, 1
	jne	.L95
	mov	DWORD PTR __cs_thread_index[rip], 0
	mov	edx, DWORD PTR __cs_pc[rip]
	mov	eax, DWORD PTR -76[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip]
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 3
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	call	main_thread
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	mov	DWORD PTR __cs_pc[rip], eax
.L95:
	mov	eax, DWORD PTR __cs_active_thread[rip+4]
	cmp	eax, 1
	jne	.L96
	mov	DWORD PTR __cs_thread_index[rip], 1
	mov	edx, DWORD PTR __cs_pc[rip+4]
	mov	eax, DWORD PTR -72[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+4], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip+4]
	mov	eax, DWORD PTR __cs_pc[rip+4]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	cmp	eax, 13
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_thread_index[rip]
	mov	eax, eax
	lea	rdx, 0[0+rax*8]
	lea	rax, __cs_threadargs[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	t1_0
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	mov	DWORD PTR __cs_pc[rip+4], eax
.L96:
	mov	eax, DWORD PTR __cs_active_thread[rip+8]
	cmp	eax, 1
	jne	.L97
	mov	DWORD PTR __cs_thread_index[rip], 2
	mov	edx, DWORD PTR __cs_pc[rip+8]
	mov	eax, DWORD PTR -68[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+8], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip+8]
	mov	eax, DWORD PTR __cs_pc[rip+8]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	cmp	eax, 13
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_thread_index[rip]
	mov	eax, eax
	lea	rdx, 0[0+rax*8]
	lea	rax, __cs_threadargs[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	t2_0
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	mov	DWORD PTR __cs_pc[rip+8], eax
.L97:
	mov	eax, DWORD PTR __cs_active_thread[rip]
	cmp	eax, 1
	jne	.L98
	mov	DWORD PTR __cs_thread_index[rip], 0
	mov	edx, DWORD PTR __cs_pc[rip]
	mov	eax, DWORD PTR -64[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip]
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 3
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	call	main_thread
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	mov	DWORD PTR __cs_pc[rip], eax
.L98:
	mov	eax, DWORD PTR __cs_active_thread[rip+4]
	cmp	eax, 1
	jne	.L99
	mov	DWORD PTR __cs_thread_index[rip], 1
	mov	edx, DWORD PTR __cs_pc[rip+4]
	mov	eax, DWORD PTR -60[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+4], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip+4]
	mov	eax, DWORD PTR __cs_pc[rip+4]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	cmp	eax, 13
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_thread_index[rip]
	mov	eax, eax
	lea	rdx, 0[0+rax*8]
	lea	rax, __cs_threadargs[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	t1_0
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	mov	DWORD PTR __cs_pc[rip+4], eax
.L99:
	mov	eax, DWORD PTR __cs_active_thread[rip+8]
	cmp	eax, 1
	jne	.L100
	mov	DWORD PTR __cs_thread_index[rip], 2
	mov	edx, DWORD PTR __cs_pc[rip+8]
	mov	eax, DWORD PTR -56[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+8], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip+8]
	mov	eax, DWORD PTR __cs_pc[rip+8]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	cmp	eax, 13
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_thread_index[rip]
	mov	eax, eax
	lea	rdx, 0[0+rax*8]
	lea	rax, __cs_threadargs[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	t2_0
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	mov	DWORD PTR __cs_pc[rip+8], eax
.L100:
	mov	eax, DWORD PTR __cs_active_thread[rip]
	cmp	eax, 1
	jne	.L101
	mov	DWORD PTR __cs_thread_index[rip], 0
	mov	edx, DWORD PTR __cs_pc[rip]
	mov	eax, DWORD PTR -52[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip]
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 3
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	call	main_thread
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	mov	DWORD PTR __cs_pc[rip], eax
.L101:
	mov	eax, DWORD PTR __cs_active_thread[rip+4]
	cmp	eax, 1
	jne	.L102
	mov	DWORD PTR __cs_thread_index[rip], 1
	mov	edx, DWORD PTR __cs_pc[rip+4]
	mov	eax, DWORD PTR -48[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+4], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip+4]
	mov	eax, DWORD PTR __cs_pc[rip+4]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	cmp	eax, 13
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_thread_index[rip]
	mov	eax, eax
	lea	rdx, 0[0+rax*8]
	lea	rax, __cs_threadargs[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	t1_0
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	mov	DWORD PTR __cs_pc[rip+4], eax
.L102:
	mov	eax, DWORD PTR __cs_active_thread[rip+8]
	cmp	eax, 1
	jne	.L103
	mov	DWORD PTR __cs_thread_index[rip], 2
	mov	edx, DWORD PTR __cs_pc[rip+8]
	mov	eax, DWORD PTR -44[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+8], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip+8]
	mov	eax, DWORD PTR __cs_pc[rip+8]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	cmp	eax, 13
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_thread_index[rip]
	mov	eax, eax
	lea	rdx, 0[0+rax*8]
	lea	rax, __cs_threadargs[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	t2_0
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	mov	DWORD PTR __cs_pc[rip+8], eax
.L103:
	mov	eax, DWORD PTR __cs_active_thread[rip]
	cmp	eax, 1
	jne	.L104
	mov	DWORD PTR __cs_thread_index[rip], 0
	mov	edx, DWORD PTR __cs_pc[rip]
	mov	eax, DWORD PTR -40[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip]
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 3
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	call	main_thread
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	mov	DWORD PTR __cs_pc[rip], eax
.L104:
	mov	eax, DWORD PTR __cs_active_thread[rip+4]
	cmp	eax, 1
	jne	.L105
	mov	DWORD PTR __cs_thread_index[rip], 1
	mov	edx, DWORD PTR __cs_pc[rip+4]
	mov	eax, DWORD PTR -36[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+4], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip+4]
	mov	eax, DWORD PTR __cs_pc[rip+4]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	cmp	eax, 13
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_thread_index[rip]
	mov	eax, eax
	lea	rdx, 0[0+rax*8]
	lea	rax, __cs_threadargs[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	t1_0
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	mov	DWORD PTR __cs_pc[rip+4], eax
.L105:
	mov	eax, DWORD PTR __cs_active_thread[rip+8]
	cmp	eax, 1
	jne	.L106
	mov	DWORD PTR __cs_thread_index[rip], 2
	mov	edx, DWORD PTR __cs_pc[rip+8]
	mov	eax, DWORD PTR -32[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+8], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip+8]
	mov	eax, DWORD PTR __cs_pc[rip+8]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	cmp	eax, 13
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_thread_index[rip]
	mov	eax, eax
	lea	rdx, 0[0+rax*8]
	lea	rax, __cs_threadargs[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	t2_0
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	mov	DWORD PTR __cs_pc[rip+8], eax
.L106:
	mov	eax, DWORD PTR __cs_active_thread[rip]
	cmp	eax, 1
	jne	.L107
	mov	DWORD PTR __cs_thread_index[rip], 0
	mov	edx, DWORD PTR __cs_pc[rip]
	mov	eax, DWORD PTR -28[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip]
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 3
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	call	main_thread
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	mov	DWORD PTR __cs_pc[rip], eax
.L107:
	mov	eax, DWORD PTR __cs_active_thread[rip+4]
	cmp	eax, 1
	jne	.L108
	mov	DWORD PTR __cs_thread_index[rip], 1
	mov	edx, DWORD PTR __cs_pc[rip+4]
	mov	eax, DWORD PTR -24[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+4], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip+4]
	mov	eax, DWORD PTR __cs_pc[rip+4]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	cmp	eax, 13
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_thread_index[rip]
	mov	eax, eax
	lea	rdx, 0[0+rax*8]
	lea	rax, __cs_threadargs[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	t1_0
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	mov	DWORD PTR __cs_pc[rip+4], eax
.L108:
	mov	eax, DWORD PTR __cs_active_thread[rip+8]
	cmp	eax, 1
	jne	.L109
	mov	DWORD PTR __cs_thread_index[rip], 2
	mov	edx, DWORD PTR __cs_pc[rip+8]
	mov	eax, DWORD PTR -20[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+8], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip+8]
	mov	eax, DWORD PTR __cs_pc[rip+8]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	cmp	eax, 13
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_thread_index[rip]
	mov	eax, eax
	lea	rdx, 0[0+rax*8]
	lea	rax, __cs_threadargs[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	t2_0
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	mov	DWORD PTR __cs_pc[rip+8], eax
.L109:
	mov	eax, DWORD PTR __cs_active_thread[rip]
	cmp	eax, 1
	jne	.L110
	mov	DWORD PTR __cs_thread_index[rip], 0
	mov	edx, DWORD PTR __cs_pc[rip]
	mov	eax, DWORD PTR -16[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip]
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 3
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	call	main_thread
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	mov	DWORD PTR __cs_pc[rip], eax
.L110:
	mov	eax, DWORD PTR __cs_active_thread[rip+4]
	cmp	eax, 1
	jne	.L111
	mov	DWORD PTR __cs_thread_index[rip], 1
	mov	edx, DWORD PTR __cs_pc[rip+4]
	mov	eax, DWORD PTR -12[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+4], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip+4]
	mov	eax, DWORD PTR __cs_pc[rip+4]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	cmp	eax, 13
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_thread_index[rip]
	mov	eax, eax
	lea	rdx, 0[0+rax*8]
	lea	rax, __cs_threadargs[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	t1_0
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	mov	DWORD PTR __cs_pc[rip+4], eax
.L111:
	mov	eax, DWORD PTR __cs_active_thread[rip+8]
	cmp	eax, 1
	jne	.L112
	mov	DWORD PTR __cs_thread_index[rip], 2
	mov	edx, DWORD PTR __cs_pc[rip+8]
	mov	eax, DWORD PTR -8[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+8], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip+8]
	mov	eax, DWORD PTR __cs_pc[rip+8]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	cmp	eax, 13
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_thread_index[rip]
	mov	eax, eax
	lea	rdx, 0[0+rax*8]
	lea	rax, __cs_threadargs[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	t2_0
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	mov	DWORD PTR __cs_pc[rip+8], eax
.L112:
	mov	eax, DWORD PTR __cs_active_thread[rip]
	cmp	eax, 1
	jne	.L113
	mov	DWORD PTR __cs_thread_index[rip], 0
	mov	edx, DWORD PTR __cs_pc[rip]
	mov	eax, DWORD PTR -4[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip]
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 3
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume
	call	main_thread
.L113:
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE27:
	.size	main, .-main
	.local	__cs_local_t1_k.4
	.comm	__cs_local_t1_k.4,4,4
	.local	__cs_local_t2_k.3
	.comm	__cs_local_t2_k.3,4,4
	.local	__cs_local_main_id1.2
	.comm	__cs_local_main_id1.2,4,4
	.local	__cs_local_main_id2.1
	.comm	__cs_local_main_id2.1,4,4
	.local	__cs_local_main___cs_tmp_if_cond_1.0
	.comm	__cs_local_main___cs_tmp_if_cond_1.0,1,1
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"210687.c"
	.text
	.global	__cs_active_thread
	.data
	.align	2
	.type	__cs_active_thread, %object
	.size	__cs_active_thread, 12
__cs_active_thread:
	.word	1
	.space	8
	.comm	__cs_pc,12,4
	.comm	__cs_pc_cs,12,4
	.comm	__cs_thread_index,4,4
	.global	__cs_thread_lines
	.align	2
	.type	__cs_thread_lines, %object
	.size	__cs_thread_lines, 12
__cs_thread_lines:
	.word	3
	.word	13
	.word	13
	.comm	__cs_threadargs,12,4
	.text
	.align	2
	.global	__CSEQ_message
	.syntax unified
	.arm
	.fpu softvfp
	.type	__CSEQ_message, %function
__CSEQ_message:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	__CSEQ_message, .-__CSEQ_message
	.align	2
	.global	__VERIFIER_assert
	.syntax unified
	.arm
	.fpu softvfp
	.type	__VERIFIER_assert, %function
__VERIFIER_assert:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	nop
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L3:
	.size	__VERIFIER_assert, .-__VERIFIER_assert
	.align	2
	.global	__VERIFIER_assume
	.syntax unified
	.arm
	.fpu softvfp
	.type	__VERIFIER_assume, %function
__VERIFIER_assume:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	__VERIFIER_assume, .-__VERIFIER_assume
	.align	2
	.global	__VERIFIER_nondet_int
	.syntax unified
	.arm
	.fpu softvfp
	.type	__VERIFIER_nondet_int, %function
__VERIFIER_nondet_int:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	__VERIFIER_nondet_int, .-__VERIFIER_nondet_int
	.align	2
	.global	__VERIFIER_nondet_uint
	.syntax unified
	.arm
	.fpu softvfp
	.type	__VERIFIER_nondet_uint, %function
__VERIFIER_nondet_uint:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	__VERIFIER_nondet_uint, .-__VERIFIER_nondet_uint
	.align	2
	.global	__cs_cond_init
	.syntax unified
	.arm
	.fpu softvfp
	.type	__cs_cond_init, %function
__cs_cond_init:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-8]
	mvn	r2, #0
	str	r2, [r3]
	mov	r3, #0
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	__cs_cond_init, .-__cs_cond_init
	.section	.rodata
	.align	2
.LC0:
	.ascii	"conditional variable signal\000"
	.text
	.align	2
	.global	__cs_cond_signal
	.syntax unified
	.arm
	.fpu softvfp
	.type	__cs_cond_signal, %function
__cs_cond_signal:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r2, #1
	str	r2, [r3]
	ldr	r0, .L11
	bl	__CSEQ_message
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L12:
	.align	2
.L11:
	.word	.LC0
	.size	__cs_cond_signal, .-__cs_cond_signal
	.section	.rodata
	.align	2
.LC1:
	.ascii	"lock released\000"
	.text
	.align	2
	.global	__cs_mutex_unlock
	.syntax unified
	.arm
	.fpu softvfp
	.type	__cs_mutex_unlock, %function
__cs_mutex_unlock:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldr	r3, [r3]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assert
	ldr	r3, [fp, #-8]
	ldr	r3, [r3]
	cmn	r3, #2
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assert
	ldr	r3, [fp, #-8]
	ldr	r3, [r3]
	mov	r2, r3
	ldr	r3, .L15
	ldr	r3, [r3]
	add	r3, r3, #1
	cmp	r2, r3
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assert
	ldr	r3, [fp, #-8]
	mvn	r2, #0
	str	r2, [r3]
	ldr	r0, .L15+4
	bl	__CSEQ_message
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L16:
	.align	2
.L15:
	.word	__cs_thread_index
	.word	.LC1
	.size	__cs_mutex_unlock, .-__cs_mutex_unlock
	.align	2
	.global	__cs_cond_wait_1
	.syntax unified
	.arm
	.fpu softvfp
	.type	__cs_cond_wait_1, %function
__cs_cond_wait_1:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-8]
	ldr	r3, [r3]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assert
	ldr	r3, [fp, #-8]
	ldr	r3, [r3]
	cmn	r3, #2
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assert
	ldr	r0, [fp, #-12]
	bl	__cs_mutex_unlock
	nop
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	__cs_cond_wait_1, .-__cs_cond_wait_1
	.section	.rodata
	.align	2
.LC2:
	.ascii	"lock acquired\000"
	.text
	.align	2
	.global	__cs_mutex_lock
	.syntax unified
	.arm
	.fpu softvfp
	.type	__cs_mutex_lock, %function
__cs_mutex_lock:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldr	r3, [r3]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assert
	ldr	r3, [fp, #-8]
	ldr	r3, [r3]
	cmn	r3, #2
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assert
	ldr	r3, [fp, #-8]
	ldr	r3, [r3]
	cmn	r3, #1
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L20
	ldr	r3, [r3]
	add	r3, r3, #1
	mov	r2, r3
	ldr	r3, [fp, #-8]
	str	r2, [r3]
	ldr	r0, .L20+4
	bl	__CSEQ_message
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L21:
	.align	2
.L20:
	.word	__cs_thread_index
	.word	.LC2
	.size	__cs_mutex_lock, .-__cs_mutex_lock
	.align	2
	.global	__cs_cond_wait_2
	.syntax unified
	.arm
	.fpu softvfp
	.type	__cs_cond_wait_2, %function
__cs_cond_wait_2:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-8]
	ldr	r3, [r3]
	cmp	r3, #1
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r0, [fp, #-12]
	bl	__cs_mutex_lock
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	__cs_cond_wait_2, .-__cs_cond_wait_2
	.section	.rodata
	.align	2
.LC3:
	.ascii	"thread spawned\000"
	.text
	.align	2
	.global	__cs_create
	.syntax unified
	.arm
	.fpu softvfp
	.type	__cs_create, %function
__cs_create:
	@ args = 4, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	ldr	r3, [fp, #4]
	cmp	r3, #2
	ble	.L25
	mov	r3, #0
	b	.L26
.L25:
	ldr	r3, [fp, #-8]
	ldr	r2, [fp, #4]
	str	r2, [r3]
	ldr	r2, .L27
	ldr	r3, [fp, #4]
	mov	r1, #1
	str	r1, [r2, r3, lsl #2]
	ldr	r1, .L27+4
	ldr	r3, [fp, #4]
	ldr	r2, [fp, #-20]
	str	r2, [r1, r3, lsl #2]
	ldr	r0, .L27+8
	bl	__CSEQ_message
	mov	r3, #0
.L26:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L28:
	.align	2
.L27:
	.word	__cs_active_thread
	.word	__cs_threadargs
	.word	.LC3
	.size	__cs_create, .-__cs_create
	.align	2
	.global	__cs_exit
	.syntax unified
	.arm
	.fpu softvfp
	.type	__cs_exit, %function
__cs_exit:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	mov	r3, #0
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	__cs_exit, .-__cs_exit
	.align	2
	.global	__cs_init_scalar
	.syntax unified
	.arm
	.fpu softvfp
	.type	__cs_init_scalar, %function
__cs_init_scalar:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	ldr	r3, [fp, #-20]
	cmp	r3, #4
	bne	.L32
	bl	__VERIFIER_nondet_int
	mov	r2, r0
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	b	.L34
.L32:
	ldr	r3, [fp, #-16]
	str	r3, [fp, #-8]
.L34:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	__cs_init_scalar, .-__cs_init_scalar
	.align	2
	.global	__cs_join
	.syntax unified
	.arm
	.fpu softvfp
	.type	__cs_join, %function
__cs_join:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, .L37
	ldr	r3, [fp, #-8]
	ldr	r2, [r2, r3, lsl #2]
	ldr	r1, .L37+4
	ldr	r3, [fp, #-8]
	ldr	r3, [r1, r3, lsl #2]
	cmp	r2, r3
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L38:
	.align	2
.L37:
	.word	__cs_pc
	.word	__cs_thread_lines
	.size	__cs_join, .-__cs_join
	.section	.rodata
	.align	2
.LC4:
	.ascii	"lock destroyed\000"
	.text
	.align	2
	.global	__cs_mutex_destroy
	.syntax unified
	.arm
	.fpu softvfp
	.type	__cs_mutex_destroy, %function
__cs_mutex_destroy:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldr	r3, [r3]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assert
	ldr	r3, [fp, #-8]
	ldr	r3, [r3]
	cmn	r3, #2
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assert
	ldr	r3, [fp, #-8]
	ldr	r3, [r3]
	cmn	r3, #1
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assert
	ldr	r3, [fp, #-8]
	mvn	r2, #1
	str	r2, [r3]
	ldr	r0, .L41
	bl	__CSEQ_message
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L42:
	.align	2
.L41:
	.word	.LC4
	.size	__cs_mutex_destroy, .-__cs_mutex_destroy
	.align	2
	.global	__cs_mutex_init
	.syntax unified
	.arm
	.fpu softvfp
	.type	__cs_mutex_init, %function
__cs_mutex_init:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-8]
	mvn	r2, #0
	str	r2, [r3]
	mov	r3, #0
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	__cs_mutex_init, .-__cs_mutex_init
	.align	2
	.global	__cs_safe_malloc
	.syntax unified
	.arm
	.fpu softvfp
	.type	__cs_safe_malloc, %function
__cs_safe_malloc:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	mov	r0, r3
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, [fp, #-8]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	__cs_safe_malloc, .-__cs_safe_malloc
	.global	i
	.data
	.align	2
	.type	i, %object
	.size	i, 4
i:
	.word	1
	.global	j
	.align	2
	.type	j, %object
	.size	j, 4
j:
	.word	1
	.text
	.align	2
	.global	t1_0
	.syntax unified
	.arm
	.fpu softvfp
	.type	t1_0, %function
t1_0:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, .L64
	ldr	r3, [r3, #4]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r2, r3, #255
	ldr	r3, .L64+4
	ldr	r3, [r3, #4]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L48
	mov	r1, #4
	ldr	r0, .L64+8
	bl	__cs_init_scalar
	ldr	r3, .L64+8
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L64+8
	mov	r2, #0
	str	r2, [r3]
.L48:
	ldr	r3, .L64
	ldr	r3, [r3, #4]
	cmp	r3, #1
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L64+4
	ldr	r3, [r3, #4]
	cmp	r3, #1
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L49
	ldr	r3, .L64+12
	ldr	r2, [r3]
	ldr	r3, .L64+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L64+12
	str	r3, [r2]
	ldr	r3, .L64+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L64+8
	str	r3, [r2]
.L49:
	ldr	r3, .L64
	ldr	r3, [r3, #4]
	cmp	r3, #2
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L64+4
	ldr	r3, [r3, #4]
	cmp	r3, #2
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L50
	ldr	r3, .L64+12
	ldr	r2, [r3]
	ldr	r3, .L64+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L64+12
	str	r3, [r2]
	ldr	r3, .L64+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L64+8
	str	r3, [r2]
.L50:
	ldr	r3, .L64
	ldr	r3, [r3, #4]
	cmp	r3, #3
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L64+4
	ldr	r3, [r3, #4]
	cmp	r3, #3
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L51
	ldr	r3, .L64+12
	ldr	r2, [r3]
	ldr	r3, .L64+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L64+12
	str	r3, [r2]
	ldr	r3, .L64+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L64+8
	str	r3, [r2]
.L51:
	ldr	r3, .L64
	ldr	r3, [r3, #4]
	cmp	r3, #4
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L64+4
	ldr	r3, [r3, #4]
	cmp	r3, #4
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L52
	ldr	r3, .L64+12
	ldr	r2, [r3]
	ldr	r3, .L64+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L64+12
	str	r3, [r2]
	ldr	r3, .L64+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L64+8
	str	r3, [r2]
.L52:
	ldr	r3, .L64
	ldr	r3, [r3, #4]
	cmp	r3, #5
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L64+4
	ldr	r3, [r3, #4]
	cmp	r3, #5
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L53
	ldr	r3, .L64+12
	ldr	r2, [r3]
	ldr	r3, .L64+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L64+12
	str	r3, [r2]
	ldr	r3, .L64+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L64+8
	str	r3, [r2]
.L53:
	ldr	r3, .L64
	ldr	r3, [r3, #4]
	cmp	r3, #6
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L64+4
	ldr	r3, [r3, #4]
	cmp	r3, #6
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L54
	ldr	r3, .L64+12
	ldr	r2, [r3]
	ldr	r3, .L64+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L64+12
	str	r3, [r2]
	ldr	r3, .L64+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L64+8
	str	r3, [r2]
.L54:
	ldr	r3, .L64
	ldr	r3, [r3, #4]
	cmp	r3, #7
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L64+4
	ldr	r3, [r3, #4]
	cmp	r3, #7
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L55
	ldr	r3, .L64+12
	ldr	r2, [r3]
	ldr	r3, .L64+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L64+12
	str	r3, [r2]
	ldr	r3, .L64+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L64+8
	str	r3, [r2]
.L55:
	ldr	r3, .L64
	ldr	r3, [r3, #4]
	cmp	r3, #8
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L64+4
	ldr	r3, [r3, #4]
	cmp	r3, #8
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L56
	ldr	r3, .L64+12
	ldr	r2, [r3]
	ldr	r3, .L64+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L64+12
	str	r3, [r2]
	ldr	r3, .L64+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L64+8
	str	r3, [r2]
.L56:
	ldr	r3, .L64
	ldr	r3, [r3, #4]
	cmp	r3, #9
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L64+4
	ldr	r3, [r3, #4]
	cmp	r3, #9
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L57
	ldr	r3, .L64+12
	ldr	r2, [r3]
	ldr	r3, .L64+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L64+12
	str	r3, [r2]
	ldr	r3, .L64+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L64+8
	str	r3, [r2]
.L57:
	ldr	r3, .L64
	ldr	r3, [r3, #4]
	cmp	r3, #10
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L64+4
	ldr	r3, [r3, #4]
	cmp	r3, #10
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L58
	ldr	r3, .L64+12
	ldr	r2, [r3]
	ldr	r3, .L64+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L64+12
	str	r3, [r2]
	ldr	r3, .L64+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L64+8
	str	r3, [r2]
.L58:
	ldr	r3, .L64
	ldr	r3, [r3, #4]
	cmp	r3, #11
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L64+4
	ldr	r3, [r3, #4]
	cmp	r3, #11
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L59
	ldr	r3, .L64+12
	ldr	r2, [r3]
	ldr	r3, .L64+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L64+12
	str	r3, [r2]
	ldr	r3, .L64+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L64+8
	str	r3, [r2]
.L59:
	ldr	r3, .L64
	ldr	r3, [r3, #4]
	cmp	r3, #12
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L64+4
	ldr	r3, [r3, #4]
	cmp	r3, #12
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L60
	ldr	r3, .L64+8
	ldr	r3, [r3]
	cmp	r3, #10
	movgt	r3, #1
	movle	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
.L61:
	ldr	r3, .L64+4
	ldr	r3, [r3, #4]
	cmp	r3, #12
	movhi	r3, #1
	movls	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
.L62:
	ldr	r3, .L64+4
	ldr	r3, [r3, #4]
	cmp	r3, #12
	movhi	r3, #1
	movls	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
.L60:
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L65:
	.align	2
.L64:
	.word	__cs_pc
	.word	__cs_pc_cs
	.word	__cs_local_t1_k.4862
	.word	i
	.word	j
	.size	t1_0, .-t1_0
	.align	2
	.global	t2_0
	.syntax unified
	.arm
	.fpu softvfp
	.type	t2_0, %function
t2_0:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, .L83
	ldr	r3, [r3, #8]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r2, r3, #255
	ldr	r3, .L83+4
	ldr	r3, [r3, #8]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L67
	mov	r1, #4
	ldr	r0, .L83+8
	bl	__cs_init_scalar
	ldr	r3, .L83+8
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L83+8
	mov	r2, #0
	str	r2, [r3]
.L67:
	ldr	r3, .L83
	ldr	r3, [r3, #8]
	cmp	r3, #1
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L83+4
	ldr	r3, [r3, #8]
	cmp	r3, #1
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L68
	ldr	r3, .L83+12
	ldr	r2, [r3]
	ldr	r3, .L83+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L83+12
	str	r3, [r2]
	ldr	r3, .L83+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L83+8
	str	r3, [r2]
.L68:
	ldr	r3, .L83
	ldr	r3, [r3, #8]
	cmp	r3, #2
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L83+4
	ldr	r3, [r3, #8]
	cmp	r3, #2
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L69
	ldr	r3, .L83+12
	ldr	r2, [r3]
	ldr	r3, .L83+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L83+12
	str	r3, [r2]
	ldr	r3, .L83+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L83+8
	str	r3, [r2]
.L69:
	ldr	r3, .L83
	ldr	r3, [r3, #8]
	cmp	r3, #3
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L83+4
	ldr	r3, [r3, #8]
	cmp	r3, #3
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L70
	ldr	r3, .L83+12
	ldr	r2, [r3]
	ldr	r3, .L83+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L83+12
	str	r3, [r2]
	ldr	r3, .L83+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L83+8
	str	r3, [r2]
.L70:
	ldr	r3, .L83
	ldr	r3, [r3, #8]
	cmp	r3, #4
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L83+4
	ldr	r3, [r3, #8]
	cmp	r3, #4
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L71
	ldr	r3, .L83+12
	ldr	r2, [r3]
	ldr	r3, .L83+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L83+12
	str	r3, [r2]
	ldr	r3, .L83+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L83+8
	str	r3, [r2]
.L71:
	ldr	r3, .L83
	ldr	r3, [r3, #8]
	cmp	r3, #5
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L83+4
	ldr	r3, [r3, #8]
	cmp	r3, #5
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L72
	ldr	r3, .L83+12
	ldr	r2, [r3]
	ldr	r3, .L83+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L83+12
	str	r3, [r2]
	ldr	r3, .L83+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L83+8
	str	r3, [r2]
.L72:
	ldr	r3, .L83
	ldr	r3, [r3, #8]
	cmp	r3, #6
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L83+4
	ldr	r3, [r3, #8]
	cmp	r3, #6
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L73
	ldr	r3, .L83+12
	ldr	r2, [r3]
	ldr	r3, .L83+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L83+12
	str	r3, [r2]
	ldr	r3, .L83+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L83+8
	str	r3, [r2]
.L73:
	ldr	r3, .L83
	ldr	r3, [r3, #8]
	cmp	r3, #7
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L83+4
	ldr	r3, [r3, #8]
	cmp	r3, #7
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L74
	ldr	r3, .L83+12
	ldr	r2, [r3]
	ldr	r3, .L83+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L83+12
	str	r3, [r2]
	ldr	r3, .L83+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L83+8
	str	r3, [r2]
.L74:
	ldr	r3, .L83
	ldr	r3, [r3, #8]
	cmp	r3, #8
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L83+4
	ldr	r3, [r3, #8]
	cmp	r3, #8
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L75
	ldr	r3, .L83+12
	ldr	r2, [r3]
	ldr	r3, .L83+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L83+12
	str	r3, [r2]
	ldr	r3, .L83+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L83+8
	str	r3, [r2]
.L75:
	ldr	r3, .L83
	ldr	r3, [r3, #8]
	cmp	r3, #9
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L83+4
	ldr	r3, [r3, #8]
	cmp	r3, #9
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L76
	ldr	r3, .L83+12
	ldr	r2, [r3]
	ldr	r3, .L83+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L83+12
	str	r3, [r2]
	ldr	r3, .L83+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L83+8
	str	r3, [r2]
.L76:
	ldr	r3, .L83
	ldr	r3, [r3, #8]
	cmp	r3, #10
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L83+4
	ldr	r3, [r3, #8]
	cmp	r3, #10
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L77
	ldr	r3, .L83+12
	ldr	r2, [r3]
	ldr	r3, .L83+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L83+12
	str	r3, [r2]
	ldr	r3, .L83+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L83+8
	str	r3, [r2]
.L77:
	ldr	r3, .L83
	ldr	r3, [r3, #8]
	cmp	r3, #11
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L83+4
	ldr	r3, [r3, #8]
	cmp	r3, #11
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L78
	ldr	r3, .L83+12
	ldr	r2, [r3]
	ldr	r3, .L83+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L83+12
	str	r3, [r2]
	ldr	r3, .L83+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L83+8
	str	r3, [r2]
.L78:
	ldr	r3, .L83
	ldr	r3, [r3, #8]
	cmp	r3, #12
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L83+4
	ldr	r3, [r3, #8]
	cmp	r3, #12
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L79
	ldr	r3, .L83+8
	ldr	r3, [r3]
	cmp	r3, #10
	movgt	r3, #1
	movle	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
.L80:
	ldr	r3, .L83+4
	ldr	r3, [r3, #8]
	cmp	r3, #12
	movhi	r3, #1
	movls	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
.L81:
	ldr	r3, .L83+4
	ldr	r3, [r3, #8]
	cmp	r3, #12
	movhi	r3, #1
	movls	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
.L79:
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L84:
	.align	2
.L83:
	.word	__cs_pc
	.word	__cs_pc_cs
	.word	__cs_local_t2_k.4881
	.word	j
	.word	i
	.size	t2_0, .-t2_0
	.align	2
	.global	main_thread
	.syntax unified
	.arm
	.fpu softvfp
	.type	main_thread, %function
main_thread:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	ldr	r3, .L95
	ldr	r3, [r3]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r2, r3, #255
	ldr	r3, .L95+4
	ldr	r3, [r3]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L86
	mov	r1, #4
	ldr	r0, .L95+8
	bl	__cs_init_scalar
	mov	r1, #4
	ldr	r0, .L95+12
	bl	__cs_init_scalar
	mov	r3, #1
	str	r3, [sp]
	mov	r3, #0
	ldr	r2, .L95+16
	mov	r1, #0
	ldr	r0, .L95+8
	bl	__cs_create
.L86:
	ldr	r3, .L95
	ldr	r3, [r3]
	cmp	r3, #1
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L95+4
	ldr	r3, [r3]
	cmp	r3, #1
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L87
	mov	r3, #2
	str	r3, [sp]
	mov	r3, #0
	ldr	r2, .L95+20
	mov	r1, #0
	ldr	r0, .L95+12
	bl	__cs_create
	mov	r1, #1
	ldr	r0, .L95+24
	bl	__cs_init_scalar
.L87:
	ldr	r3, .L95
	ldr	r3, [r3]
	cmp	r3, #2
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L95+4
	ldr	r3, [r3]
	cmp	r3, #2
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L88
	ldr	r3, .L95+28
	ldr	r3, [r3]
	ldr	r2, .L95+32
	cmp	r3, r2
	bgt	.L89
	ldr	r3, .L95+36
	ldr	r3, [r3]
	ldr	r2, .L95+32
	cmp	r3, r2
	ble	.L90
.L89:
	mov	r3, #1
	b	.L91
.L90:
	mov	r3, #0
.L91:
	and	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L95+24
	strb	r2, [r3]
	ldr	r3, .L95+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L94
	mov	r0, #0
	bl	__VERIFIER_assert
	b	.L92
.L94:
	nop
.L92:
	ldr	r3, .L95+4
	ldr	r3, [r3]
	cmp	r3, #2
	movhi	r3, #1
	movls	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
.L88:
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L96:
	.align	2
.L95:
	.word	__cs_pc
	.word	__cs_pc_cs
	.word	__cs_local_main_id1.4904
	.word	__cs_local_main_id2.4902
	.word	t1_0
	.word	t2_0
	.word	__cs_local_main___cs_tmp_if_cond_1.4903
	.word	i
	.word	46367
	.word	j
	.size	main_thread, .-main_thread
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 136
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #136
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-140]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-136]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-132]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-128]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-124]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-120]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-116]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-112]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-108]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-104]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-100]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-96]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-92]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-88]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-84]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-80]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-76]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-72]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-68]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-64]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-60]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-56]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-52]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-48]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-44]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-40]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-36]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-32]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-28]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-24]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-20]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-16]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-12]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-140]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L132+4
	ldr	r2, [r3]
	ldr	r3, [fp, #-140]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2]
	ldr	r3, .L132+24
	ldr	r3, [r3]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3]
	cmp	r3, #3
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	bl	main_thread
	ldr	r3, .L132+24
	ldr	r3, [r3]
	ldr	r2, .L132+4
	str	r3, [r2]
	ldr	r3, .L132+12
	ldr	r3, [r3, #4]
	cmp	r3, #1
	bne	.L98
	ldr	r3, .L132
	mov	r2, #1
	str	r2, [r3]
	ldr	r3, .L132+4
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-136]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2, #4]
	ldr	r3, .L132+24
	ldr	r3, [r3, #4]
	cmp	r3, #13
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+8
	ldr	r3, [r3, #4]
	mov	r0, r3
	bl	t1_0
	ldr	r3, .L132+24
	ldr	r3, [r3, #4]
	ldr	r2, .L132+4
	str	r3, [r2, #4]
.L98:
	ldr	r3, .L132+12
	ldr	r3, [r3, #8]
	cmp	r3, #1
	bne	.L99
	ldr	r3, .L132
	mov	r2, #2
	str	r2, [r3]
	ldr	r3, .L132+4
	ldr	r2, [r3, #8]
	ldr	r3, [fp, #-132]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2, #8]
	ldr	r3, .L132+24
	ldr	r3, [r3, #8]
	cmp	r3, #13
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+8
	ldr	r3, [r3, #8]
	mov	r0, r3
	bl	t2_0
	ldr	r3, .L132+24
	ldr	r3, [r3, #8]
	ldr	r2, .L132+4
	str	r3, [r2, #8]
.L99:
	ldr	r3, .L132+12
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L100
	ldr	r3, .L132
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L132+4
	ldr	r2, [r3]
	ldr	r3, [fp, #-128]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2]
	ldr	r3, .L132+24
	ldr	r2, [r3]
	ldr	r3, .L132+4
	ldr	r3, [r3]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3]
	cmp	r3, #3
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	bl	main_thread
	ldr	r3, .L132+24
	ldr	r3, [r3]
	ldr	r2, .L132+4
	str	r3, [r2]
.L100:
	ldr	r3, .L132+12
	ldr	r3, [r3, #4]
	cmp	r3, #1
	bne	.L101
	ldr	r3, .L132
	mov	r2, #1
	str	r2, [r3]
	ldr	r3, .L132+4
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-124]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2, #4]
	ldr	r3, .L132+24
	ldr	r2, [r3, #4]
	ldr	r3, .L132+4
	ldr	r3, [r3, #4]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3, #4]
	cmp	r3, #13
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132
	ldr	r3, [r3]
	ldr	r2, .L132+8
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	bl	t1_0
	ldr	r3, .L132+24
	ldr	r3, [r3, #4]
	ldr	r2, .L132+4
	str	r3, [r2, #4]
.L101:
	ldr	r3, .L132+12
	ldr	r3, [r3, #8]
	cmp	r3, #1
	bne	.L102
	ldr	r3, .L132
	mov	r2, #2
	str	r2, [r3]
	ldr	r3, .L132+4
	ldr	r2, [r3, #8]
	ldr	r3, [fp, #-120]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2, #8]
	ldr	r3, .L132+24
	ldr	r2, [r3, #8]
	ldr	r3, .L132+4
	ldr	r3, [r3, #8]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3, #8]
	cmp	r3, #13
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132
	ldr	r3, [r3]
	ldr	r2, .L132+8
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	bl	t2_0
	ldr	r3, .L132+24
	ldr	r3, [r3, #8]
	ldr	r2, .L132+4
	str	r3, [r2, #8]
.L102:
	ldr	r3, .L132+12
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L103
	ldr	r3, .L132
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L132+4
	ldr	r2, [r3]
	ldr	r3, [fp, #-116]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2]
	ldr	r3, .L132+24
	ldr	r2, [r3]
	ldr	r3, .L132+4
	ldr	r3, [r3]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3]
	cmp	r3, #3
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	bl	main_thread
	ldr	r3, .L132+24
	ldr	r3, [r3]
	ldr	r2, .L132+4
	str	r3, [r2]
.L103:
	ldr	r3, .L132+12
	ldr	r3, [r3, #4]
	cmp	r3, #1
	bne	.L104
	ldr	r3, .L132
	mov	r2, #1
	str	r2, [r3]
	ldr	r3, .L132+4
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-112]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2, #4]
	ldr	r3, .L132+24
	ldr	r2, [r3, #4]
	ldr	r3, .L132+4
	ldr	r3, [r3, #4]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3, #4]
	cmp	r3, #13
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132
	ldr	r3, [r3]
	ldr	r2, .L132+8
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	bl	t1_0
	ldr	r3, .L132+24
	ldr	r3, [r3, #4]
	ldr	r2, .L132+4
	str	r3, [r2, #4]
.L104:
	ldr	r3, .L132+12
	ldr	r3, [r3, #8]
	cmp	r3, #1
	bne	.L105
	ldr	r3, .L132
	mov	r2, #2
	str	r2, [r3]
	ldr	r3, .L132+4
	ldr	r2, [r3, #8]
	ldr	r3, [fp, #-108]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2, #8]
	ldr	r3, .L132+24
	ldr	r2, [r3, #8]
	ldr	r3, .L132+4
	ldr	r3, [r3, #8]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3, #8]
	cmp	r3, #13
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132
	ldr	r3, [r3]
	ldr	r2, .L132+8
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	bl	t2_0
	ldr	r3, .L132+24
	ldr	r3, [r3, #8]
	ldr	r2, .L132+4
	str	r3, [r2, #8]
.L105:
	ldr	r3, .L132+12
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L106
	ldr	r3, .L132
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L132+4
	ldr	r2, [r3]
	ldr	r3, [fp, #-104]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2]
	ldr	r3, .L132+24
	ldr	r2, [r3]
	ldr	r3, .L132+4
	ldr	r3, [r3]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3]
	cmp	r3, #3
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	bl	main_thread
	ldr	r3, .L132+24
	ldr	r3, [r3]
	ldr	r2, .L132+4
	str	r3, [r2]
.L106:
	ldr	r3, .L132+12
	ldr	r3, [r3, #4]
	cmp	r3, #1
	bne	.L107
	ldr	r3, .L132
	mov	r2, #1
	str	r2, [r3]
	ldr	r3, .L132+4
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-100]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2, #4]
	ldr	r3, .L132+24
	ldr	r2, [r3, #4]
	ldr	r3, .L132+4
	ldr	r3, [r3, #4]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3, #4]
	cmp	r3, #13
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132
	ldr	r3, [r3]
	ldr	r2, .L132+8
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	bl	t1_0
	ldr	r3, .L132+24
	ldr	r3, [r3, #4]
	ldr	r2, .L132+4
	str	r3, [r2, #4]
.L107:
	ldr	r3, .L132+12
	ldr	r3, [r3, #8]
	cmp	r3, #1
	bne	.L108
	ldr	r3, .L132
	mov	r2, #2
	str	r2, [r3]
	ldr	r3, .L132+4
	ldr	r2, [r3, #8]
	ldr	r3, [fp, #-96]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2, #8]
	ldr	r3, .L132+24
	ldr	r2, [r3, #8]
	ldr	r3, .L132+4
	ldr	r3, [r3, #8]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3, #8]
	cmp	r3, #13
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132
	ldr	r3, [r3]
	ldr	r2, .L132+8
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	bl	t2_0
	ldr	r3, .L132+24
	ldr	r3, [r3, #8]
	ldr	r2, .L132+4
	str	r3, [r2, #8]
.L108:
	ldr	r3, .L132+12
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L109
	ldr	r3, .L132
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L132+4
	ldr	r2, [r3]
	ldr	r3, [fp, #-92]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2]
	ldr	r3, .L132+24
	ldr	r2, [r3]
	ldr	r3, .L132+4
	ldr	r3, [r3]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3]
	cmp	r3, #3
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	bl	main_thread
	ldr	r3, .L132+24
	ldr	r3, [r3]
	ldr	r2, .L132+4
	str	r3, [r2]
.L109:
	ldr	r3, .L132+12
	ldr	r3, [r3, #4]
	cmp	r3, #1
	bne	.L110
	ldr	r3, .L132
	mov	r2, #1
	str	r2, [r3]
	ldr	r3, .L132+4
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-88]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2, #4]
	ldr	r3, .L132+24
	ldr	r2, [r3, #4]
	ldr	r3, .L132+4
	ldr	r3, [r3, #4]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3, #4]
	cmp	r3, #13
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132
	ldr	r3, [r3]
	ldr	r2, .L132+8
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	bl	t1_0
	ldr	r3, .L132+24
	ldr	r3, [r3, #4]
	ldr	r2, .L132+4
	str	r3, [r2, #4]
.L110:
	ldr	r3, .L132+12
	ldr	r3, [r3, #8]
	cmp	r3, #1
	bne	.L111
	ldr	r3, .L132
	mov	r2, #2
	str	r2, [r3]
	ldr	r3, .L132+4
	ldr	r2, [r3, #8]
	ldr	r3, [fp, #-84]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2, #8]
	ldr	r3, .L132+24
	ldr	r2, [r3, #8]
	ldr	r3, .L132+4
	ldr	r3, [r3, #8]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3, #8]
	cmp	r3, #13
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132
	ldr	r3, [r3]
	ldr	r2, .L132+8
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	bl	t2_0
	ldr	r3, .L132+24
	ldr	r3, [r3, #8]
	ldr	r2, .L132+4
	str	r3, [r2, #8]
.L111:
	ldr	r3, .L132+12
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L112
	ldr	r3, .L132
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L132+4
	ldr	r2, [r3]
	ldr	r3, [fp, #-80]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2]
	ldr	r3, .L132+24
	ldr	r2, [r3]
	ldr	r3, .L132+4
	ldr	r3, [r3]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3]
	cmp	r3, #3
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	bl	main_thread
	ldr	r3, .L132+24
	ldr	r3, [r3]
	ldr	r2, .L132+4
	str	r3, [r2]
.L112:
	ldr	r3, .L132+12
	ldr	r3, [r3, #4]
	cmp	r3, #1
	bne	.L113
	ldr	r3, .L132
	mov	r2, #1
	str	r2, [r3]
	ldr	r3, .L132+4
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-76]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2, #4]
	ldr	r3, .L132+24
	ldr	r2, [r3, #4]
	ldr	r3, .L132+4
	ldr	r3, [r3, #4]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3, #4]
	cmp	r3, #13
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132
	ldr	r3, [r3]
	ldr	r2, .L132+8
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	bl	t1_0
	ldr	r3, .L132+24
	ldr	r3, [r3, #4]
	ldr	r2, .L132+4
	str	r3, [r2, #4]
.L113:
	ldr	r3, .L132+12
	ldr	r3, [r3, #8]
	cmp	r3, #1
	bne	.L114
	ldr	r3, .L132
	mov	r2, #2
	str	r2, [r3]
	ldr	r3, .L132+4
	ldr	r2, [r3, #8]
	ldr	r3, [fp, #-72]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2, #8]
	ldr	r3, .L132+24
	ldr	r2, [r3, #8]
	ldr	r3, .L132+4
	ldr	r3, [r3, #8]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3, #8]
	cmp	r3, #13
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132
	ldr	r3, [r3]
	ldr	r2, .L132+8
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	bl	t2_0
	ldr	r3, .L132+24
	ldr	r3, [r3, #8]
	ldr	r2, .L132+4
	str	r3, [r2, #8]
.L114:
	ldr	r3, .L132+12
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L115
	ldr	r3, .L132
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L132+4
	ldr	r2, [r3]
	ldr	r3, [fp, #-68]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2]
	ldr	r3, .L132+24
	ldr	r2, [r3]
	ldr	r3, .L132+4
	ldr	r3, [r3]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3]
	cmp	r3, #3
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	bl	main_thread
	ldr	r3, .L132+24
	ldr	r3, [r3]
	ldr	r2, .L132+4
	str	r3, [r2]
.L115:
	ldr	r3, .L132+12
	ldr	r3, [r3, #4]
	cmp	r3, #1
	bne	.L116
	ldr	r3, .L132
	mov	r2, #1
	str	r2, [r3]
	ldr	r3, .L132+4
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2, #4]
	ldr	r3, .L132+24
	ldr	r2, [r3, #4]
	ldr	r3, .L132+4
	ldr	r3, [r3, #4]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3, #4]
	cmp	r3, #13
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132
	ldr	r3, [r3]
	ldr	r2, .L132+8
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	bl	t1_0
	ldr	r3, .L132+24
	ldr	r3, [r3, #4]
	ldr	r2, .L132+4
	str	r3, [r2, #4]
.L116:
	ldr	r3, .L132+12
	ldr	r3, [r3, #8]
	cmp	r3, #1
	bne	.L117
	ldr	r3, .L132
	mov	r2, #2
	str	r2, [r3]
	ldr	r3, .L132+4
	ldr	r2, [r3, #8]
	ldr	r3, [fp, #-60]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2, #8]
	ldr	r3, .L132+24
	ldr	r2, [r3, #8]
	ldr	r3, .L132+4
	ldr	r3, [r3, #8]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3, #8]
	cmp	r3, #13
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132
	ldr	r3, [r3]
	ldr	r2, .L132+8
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	bl	t2_0
	ldr	r3, .L132+24
	ldr	r3, [r3, #8]
	ldr	r2, .L132+4
	str	r3, [r2, #8]
.L117:
	ldr	r3, .L132+12
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L118
	ldr	r3, .L132
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L132+4
	ldr	r2, [r3]
	ldr	r3, [fp, #-56]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2]
	ldr	r3, .L132+24
	ldr	r2, [r3]
	ldr	r3, .L132+4
	ldr	r3, [r3]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3]
	cmp	r3, #3
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	bl	main_thread
	ldr	r3, .L132+24
	ldr	r3, [r3]
	ldr	r2, .L132+4
	str	r3, [r2]
.L118:
	ldr	r3, .L132+12
	ldr	r3, [r3, #4]
	cmp	r3, #1
	bne	.L119
	ldr	r3, .L132
	mov	r2, #1
	str	r2, [r3]
	ldr	r3, .L132+4
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-52]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2, #4]
	ldr	r3, .L132+24
	ldr	r2, [r3, #4]
	ldr	r3, .L132+4
	ldr	r3, [r3, #4]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3, #4]
	cmp	r3, #13
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132
	ldr	r3, [r3]
	ldr	r2, .L132+8
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	bl	t1_0
	ldr	r3, .L132+24
	ldr	r3, [r3, #4]
	ldr	r2, .L132+4
	str	r3, [r2, #4]
.L119:
	ldr	r3, .L132+12
	ldr	r3, [r3, #8]
	cmp	r3, #1
	bne	.L120
	ldr	r3, .L132
	mov	r2, #2
	str	r2, [r3]
	ldr	r3, .L132+4
	ldr	r2, [r3, #8]
	ldr	r3, [fp, #-48]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2, #8]
	ldr	r3, .L132+24
	ldr	r2, [r3, #8]
	ldr	r3, .L132+4
	ldr	r3, [r3, #8]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3, #8]
	cmp	r3, #13
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132
	ldr	r3, [r3]
	ldr	r2, .L132+8
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	bl	t2_0
	ldr	r3, .L132+24
	ldr	r3, [r3, #8]
	ldr	r2, .L132+4
	str	r3, [r2, #8]
.L120:
	ldr	r3, .L132+12
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L121
	ldr	r3, .L132
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L132+4
	ldr	r2, [r3]
	ldr	r3, [fp, #-44]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2]
	ldr	r3, .L132+24
	ldr	r2, [r3]
	ldr	r3, .L132+4
	ldr	r3, [r3]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3]
	cmp	r3, #3
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	bl	main_thread
	ldr	r3, .L132+24
	ldr	r3, [r3]
	ldr	r2, .L132+4
	str	r3, [r2]
.L121:
	ldr	r3, .L132+12
	ldr	r3, [r3, #4]
	cmp	r3, #1
	bne	.L122
	ldr	r3, .L132
	mov	r2, #1
	str	r2, [r3]
	ldr	r3, .L132+4
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-40]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2, #4]
	ldr	r3, .L132+24
	ldr	r2, [r3, #4]
	ldr	r3, .L132+4
	ldr	r3, [r3, #4]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3, #4]
	cmp	r3, #13
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132
	ldr	r3, [r3]
	ldr	r2, .L132+8
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	bl	t1_0
	ldr	r3, .L132+24
	ldr	r3, [r3, #4]
	ldr	r2, .L132+4
	str	r3, [r2, #4]
.L122:
	ldr	r3, .L132+12
	ldr	r3, [r3, #8]
	cmp	r3, #1
	bne	.L123
	ldr	r3, .L132
	mov	r2, #2
	str	r2, [r3]
	ldr	r3, .L132+4
	ldr	r2, [r3, #8]
	ldr	r3, [fp, #-36]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2, #8]
	ldr	r3, .L132+24
	ldr	r2, [r3, #8]
	ldr	r3, .L132+4
	ldr	r3, [r3, #8]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3, #8]
	cmp	r3, #13
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	b	.L133
.L134:
	.align	2
.L132:
	.word	__cs_thread_index
	.word	__cs_pc
	.word	__cs_threadargs
	.word	__cs_active_thread
	.word	__cs_thread_index
	.word	__cs_pc
	.word	__cs_pc_cs
.L133:
	ldr	r3, .L132+16
	ldr	r3, [r3]
	ldr	r2, .L132+8
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	bl	t2_0
	ldr	r3, .L132+24
	ldr	r3, [r3, #8]
	ldr	r2, .L132+20
	str	r3, [r2, #8]
.L123:
	ldr	r3, .L132+12
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L124
	ldr	r3, .L132+16
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L132+20
	ldr	r2, [r3]
	ldr	r3, [fp, #-32]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2]
	ldr	r3, .L132+24
	ldr	r2, [r3]
	ldr	r3, .L132+20
	ldr	r3, [r3]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3]
	cmp	r3, #3
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	bl	main_thread
	ldr	r3, .L132+24
	ldr	r3, [r3]
	ldr	r2, .L132+20
	str	r3, [r2]
.L124:
	ldr	r3, .L132+12
	ldr	r3, [r3, #4]
	cmp	r3, #1
	bne	.L125
	ldr	r3, .L132+16
	mov	r2, #1
	str	r2, [r3]
	ldr	r3, .L132+20
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-28]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2, #4]
	ldr	r3, .L132+24
	ldr	r2, [r3, #4]
	ldr	r3, .L132+20
	ldr	r3, [r3, #4]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3, #4]
	cmp	r3, #13
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+16
	ldr	r3, [r3]
	ldr	r2, .L132+8
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	bl	t1_0
	ldr	r3, .L132+24
	ldr	r3, [r3, #4]
	ldr	r2, .L132+20
	str	r3, [r2, #4]
.L125:
	ldr	r3, .L132+12
	ldr	r3, [r3, #8]
	cmp	r3, #1
	bne	.L126
	ldr	r3, .L132+16
	mov	r2, #2
	str	r2, [r3]
	ldr	r3, .L132+20
	ldr	r2, [r3, #8]
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2, #8]
	ldr	r3, .L132+24
	ldr	r2, [r3, #8]
	ldr	r3, .L132+20
	ldr	r3, [r3, #8]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3, #8]
	cmp	r3, #13
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+16
	ldr	r3, [r3]
	ldr	r2, .L132+8
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	bl	t2_0
	ldr	r3, .L132+24
	ldr	r3, [r3, #8]
	ldr	r2, .L132+20
	str	r3, [r2, #8]
.L126:
	ldr	r3, .L132+12
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L127
	ldr	r3, .L132+16
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L132+20
	ldr	r2, [r3]
	ldr	r3, [fp, #-20]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2]
	ldr	r3, .L132+24
	ldr	r2, [r3]
	ldr	r3, .L132+20
	ldr	r3, [r3]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3]
	cmp	r3, #3
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	bl	main_thread
	ldr	r3, .L132+24
	ldr	r3, [r3]
	ldr	r2, .L132+20
	str	r3, [r2]
.L127:
	ldr	r3, .L132+12
	ldr	r3, [r3, #4]
	cmp	r3, #1
	bne	.L128
	ldr	r3, .L132+16
	mov	r2, #1
	str	r2, [r3]
	ldr	r3, .L132+20
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-16]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2, #4]
	ldr	r3, .L132+24
	ldr	r2, [r3, #4]
	ldr	r3, .L132+20
	ldr	r3, [r3, #4]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3, #4]
	cmp	r3, #13
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+16
	ldr	r3, [r3]
	ldr	r2, .L132+8
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	bl	t1_0
	ldr	r3, .L132+24
	ldr	r3, [r3, #4]
	ldr	r2, .L132+20
	str	r3, [r2, #4]
.L128:
	ldr	r3, .L132+12
	ldr	r3, [r3, #8]
	cmp	r3, #1
	bne	.L129
	ldr	r3, .L132+16
	mov	r2, #2
	str	r2, [r3]
	ldr	r3, .L132+20
	ldr	r2, [r3, #8]
	ldr	r3, [fp, #-12]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2, #8]
	ldr	r3, .L132+24
	ldr	r2, [r3, #8]
	ldr	r3, .L132+20
	ldr	r3, [r3, #8]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3, #8]
	cmp	r3, #13
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+16
	ldr	r3, [r3]
	ldr	r2, .L132+8
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	bl	t2_0
	ldr	r3, .L132+24
	ldr	r3, [r3, #8]
	ldr	r2, .L132+20
	str	r3, [r2, #8]
.L129:
	ldr	r3, .L132+12
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L130
	ldr	r3, .L132+16
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L132+20
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldr	r2, .L132+24
	str	r3, [r2]
	ldr	r3, .L132+24
	ldr	r2, [r3]
	ldr	r3, .L132+20
	ldr	r3, [r3]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L132+24
	ldr	r3, [r3]
	cmp	r3, #3
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	bl	main_thread
.L130:
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	main, .-main
	.local	__cs_local_t1_k.4862
	.comm	__cs_local_t1_k.4862,4,4
	.local	__cs_local_t2_k.4881
	.comm	__cs_local_t2_k.4881,4,4
	.local	__cs_local_main_id1.4904
	.comm	__cs_local_main_id1.4904,4,4
	.local	__cs_local_main_id2.4902
	.comm	__cs_local_main_id2.4902,4,4
	.local	__cs_local_main___cs_tmp_if_cond_1.4903
	.comm	__cs_local_main___cs_tmp_if_cond_1.4903,1,1
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
