	.file	"588759.c"
	.intel_syntax noprefix
	.text
	.globl	n
	.bss
	.align 4
	.type	n, @object
	.size	n, 4
n:
	.zero	4
	.globl	m
	.align 4
	.type	m, @object
	.size	m, 4
m:
	.zero	4
	.globl	g
	.align 32
	.type	g, @object
	.size	g, 1020100
g:
	.zero	1020100
	.globl	f
	.align 32
	.type	f, @object
	.size	f, 2040200
f:
	.zero	2040200
	.globl	d
	.align 32
	.type	d, @object
	.size	d, 1020100
d:
	.zero	1020100
	.text
	.globl	floyd_warshall
	.type	floyd_warshall, @function
floyd_warshall:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -12[rbp], 0
	jmp	.L2
.L5:
	mov	DWORD PTR -8[rbp], 0
	jmp	.L3
.L4:
	mov	eax, DWORD PTR -8[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -12[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, g[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	movsx	rsi, eax
	mov	eax, DWORD PTR -12[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rsi
	lea	rdx, 0[0+rax*4]
	lea	rax, d[rip]
	mov	DWORD PTR [rdx+rax], ecx
	add	DWORD PTR -8[rbp], 1
.L3:
	mov	eax, DWORD PTR n[rip]
	cmp	DWORD PTR -8[rbp], eax
	jl	.L4
	add	DWORD PTR -12[rbp], 1
.L2:
	mov	eax, DWORD PTR n[rip]
	cmp	DWORD PTR -12[rbp], eax
	jl	.L5
	mov	DWORD PTR -4[rbp], 0
	jmp	.L6
.L12:
	mov	DWORD PTR -12[rbp], 0
	jmp	.L7
.L11:
	mov	DWORD PTR -8[rbp], 0
	jmp	.L8
.L10:
	mov	eax, DWORD PTR -8[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -12[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, d[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -4[rbp]
	movsx	rsi, eax
	mov	eax, DWORD PTR -12[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rsi
	lea	rdx, 0[0+rax*4]
	lea	rax, d[rip]
	mov	esi, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	movsx	rdi, eax
	mov	eax, DWORD PTR -4[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rdi
	lea	rdx, 0[0+rax*4]
	lea	rax, d[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	eax, esi
	cmp	ecx, eax
	jle	.L9
	mov	eax, DWORD PTR -4[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -12[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, d[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	movsx	rsi, eax
	mov	eax, DWORD PTR -4[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rsi
	lea	rdx, 0[0+rax*4]
	lea	rax, d[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	ecx, eax
	mov	eax, DWORD PTR -8[rbp]
	movsx	rsi, eax
	mov	eax, DWORD PTR -12[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rsi
	lea	rdx, 0[0+rax*4]
	lea	rax, d[rip]
	mov	DWORD PTR [rdx+rax], ecx
.L9:
	add	DWORD PTR -8[rbp], 1
.L8:
	mov	eax, DWORD PTR n[rip]
	cmp	DWORD PTR -8[rbp], eax
	jl	.L10
	add	DWORD PTR -12[rbp], 1
.L7:
	mov	eax, DWORD PTR n[rip]
	cmp	DWORD PTR -12[rbp], eax
	jl	.L11
	add	DWORD PTR -4[rbp], 1
.L6:
	mov	eax, DWORD PTR n[rip]
	cmp	DWORD PTR -4[rbp], eax
	jl	.L12
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	floyd_warshall, .-floyd_warshall
	.section	.rodata
.LC0:
	.string	"%d%d"
.LC1:
	.string	"%d%d%d"
.LC2:
	.string	"%d\n"
	.text
	.globl	main
	.type	main, @function
main:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	lea	rdx, m[rip]
	lea	rsi, n[rip]
	lea	rdi, .LC0[rip]
	mov	eax, 0
	call	__isoc99_scanf@PLT
	mov	eax, DWORD PTR n[rip]
	add	eax, 1
	mov	DWORD PTR n[rip], eax
	mov	DWORD PTR -28[rbp], 0
	jmp	.L14
.L17:
	mov	DWORD PTR -24[rbp], 0
	jmp	.L15
.L16:
	mov	eax, DWORD PTR -24[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -28[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, g[rip]
	mov	DWORD PTR [rdx+rax], 1073741823
	add	DWORD PTR -24[rbp], 1
.L15:
	mov	eax, DWORD PTR n[rip]
	cmp	DWORD PTR -24[rbp], eax
	jl	.L16
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	imul	rax, rax, 2024
	lea	rdx, g[rip]
	mov	DWORD PTR [rax+rdx], 0
	add	DWORD PTR -28[rbp], 1
.L14:
	mov	eax, DWORD PTR n[rip]
	cmp	DWORD PTR -28[rbp], eax
	jl	.L17
	mov	DWORD PTR -28[rbp], 0
	jmp	.L18
.L20:
	lea	rcx, -32[rbp]
	lea	rdx, -36[rbp]
	lea	rax, -40[rbp]
	mov	rsi, rax
	lea	rdi, .LC1[rip]
	mov	eax, 0
	call	__isoc99_scanf@PLT
	mov	eax, DWORD PTR -40[rbp]
	mov	edx, DWORD PTR -36[rbp]
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, g[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -32[rbp]
	cmp	edx, eax
	jle	.L19
	mov	ecx, DWORD PTR -36[rbp]
	mov	esi, DWORD PTR -40[rbp]
	mov	edi, DWORD PTR -32[rbp]
	movsx	r8, esi
	movsx	rdx, ecx
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, r8
	lea	rdx, 0[0+rax*4]
	lea	rax, g[rip]
	mov	DWORD PTR [rdx+rax], edi
	mov	edi, DWORD PTR -40[rbp]
	mov	r8d, DWORD PTR -36[rbp]
	movsx	rsi, esi
	movsx	rdx, ecx
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rsi
	lea	rdx, 0[0+rax*4]
	lea	rax, g[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	movsx	rsi, r8d
	movsx	rdx, edi
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rsi
	lea	rdx, 0[0+rax*4]
	lea	rax, g[rip]
	mov	DWORD PTR [rdx+rax], ecx
.L19:
	add	DWORD PTR -28[rbp], 1
.L18:
	mov	eax, DWORD PTR m[rip]
	cmp	DWORD PTR -28[rbp], eax
	jl	.L20
	mov	eax, 0
	call	floyd_warshall
	mov	DWORD PTR -16[rbp], 0
	mov	DWORD PTR -28[rbp], 0
	jmp	.L21
.L24:
	mov	DWORD PTR -24[rbp], 0
	jmp	.L22
.L23:
	mov	eax, DWORD PTR -24[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	mov	edx, DWORD PTR -28[rbp]
	movsx	rdx, edx
	imul	rsi, rax, 255025
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rsi
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, f[rip]
	mov	DWORD PTR [rdx+rax], 1073741823
	add	DWORD PTR -24[rbp], 1
.L22:
	mov	eax, DWORD PTR n[rip]
	cmp	DWORD PTR -24[rbp], eax
	jl	.L23
	add	DWORD PTR -28[rbp], 1
.L21:
	mov	eax, DWORD PTR n[rip]
	cmp	DWORD PTR -28[rbp], eax
	jl	.L24
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	imul	rax, rax, 1020100
	lea	rdx, f[rip]
	mov	DWORD PTR [rax+rdx], 0
	mov	DWORD PTR -20[rbp], 0
	jmp	.L25
.L37:
	mov	DWORD PTR -28[rbp], 0
	jmp	.L26
.L29:
	mov	DWORD PTR -24[rbp], 0
	jmp	.L27
.L28:
	cmp	DWORD PTR -16[rbp], 0
	sete	al
	movzx	eax, al
	mov	edx, DWORD PTR -24[rbp]
	movsx	rcx, edx
	cdqe
	mov	edx, DWORD PTR -28[rbp]
	movsx	rdx, edx
	imul	rsi, rax, 255025
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rsi
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, f[rip]
	mov	DWORD PTR [rdx+rax], 1073741823
	add	DWORD PTR -24[rbp], 1
.L27:
	mov	eax, DWORD PTR n[rip]
	cmp	DWORD PTR -24[rbp], eax
	jl	.L28
	add	DWORD PTR -28[rbp], 1
.L26:
	mov	eax, DWORD PTR n[rip]
	cmp	DWORD PTR -28[rbp], eax
	jl	.L29
	mov	DWORD PTR -28[rbp], 0
	jmp	.L30
.L36:
	mov	eax, DWORD PTR -28[rbp]
	mov	DWORD PTR -24[rbp], eax
	jmp	.L31
.L35:
	cmp	DWORD PTR -16[rbp], 0
	sete	al
	movzx	eax, al
	mov	edx, DWORD PTR -24[rbp]
	movsx	rcx, edx
	cdqe
	mov	edx, DWORD PTR -20[rbp]
	movsx	rdx, edx
	imul	rsi, rax, 255025
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rsi
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, f[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -24[rbp]
	movsx	rsi, eax
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	mov	edx, DWORD PTR -28[rbp]
	movsx	rdx, edx
	imul	rdi, rax, 255025
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rdi
	add	rax, rsi
	lea	rdx, 0[0+rax*4]
	lea	rax, f[rip]
	mov	esi, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -20[rbp]
	add	eax, 1
	movsx	rdi, eax
	mov	eax, DWORD PTR -28[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rdi
	lea	rdx, 0[0+rax*4]
	lea	rax, d[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	eax, esi
	cmp	ecx, eax
	jle	.L32
	mov	eax, DWORD PTR -24[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	mov	edx, DWORD PTR -28[rbp]
	movsx	rdx, edx
	imul	rsi, rax, 255025
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rsi
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, f[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -20[rbp]
	add	eax, 1
	movsx	rsi, eax
	mov	eax, DWORD PTR -28[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rsi
	lea	rdx, 0[0+rax*4]
	lea	rax, d[rip]
	mov	edx, DWORD PTR [rdx+rax]
	cmp	DWORD PTR -16[rbp], 0
	sete	al
	movzx	eax, al
	add	ecx, edx
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	cdqe
	mov	edx, DWORD PTR -20[rbp]
	movsx	rdx, edx
	imul	rdi, rax, 255025
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rdi
	add	rax, rsi
	lea	rdx, 0[0+rax*4]
	lea	rax, f[rip]
	mov	DWORD PTR [rdx+rax], ecx
.L32:
	cmp	DWORD PTR -16[rbp], 0
	sete	al
	movzx	eax, al
	cmp	DWORD PTR -16[rbp], 0
	sete	dl
	movzx	esi, dl
	mov	edx, DWORD PTR -24[rbp]
	movsx	rcx, edx
	cdqe
	mov	edx, DWORD PTR -20[rbp]
	movsx	rdx, edx
	imul	rdi, rax, 255025
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rdi
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, f[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -20[rbp]
	movsx	rdi, eax
	movsx	rax, esi
	mov	edx, DWORD PTR -24[rbp]
	movsx	rdx, edx
	imul	rsi, rax, 255025
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rsi
	add	rax, rdi
	lea	rdx, 0[0+rax*4]
	lea	rax, f[rip]
	mov	DWORD PTR [rdx+rax], ecx
	cmp	DWORD PTR -16[rbp], 0
	sete	al
	movzx	eax, al
	mov	edx, DWORD PTR -20[rbp]
	movsx	rcx, edx
	cdqe
	mov	edx, DWORD PTR -28[rbp]
	movsx	rdx, edx
	imul	rsi, rax, 255025
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rsi
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, f[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -24[rbp]
	movsx	rsi, eax
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	mov	edx, DWORD PTR -28[rbp]
	movsx	rdx, edx
	imul	rdi, rax, 255025
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rdi
	add	rax, rsi
	lea	rdx, 0[0+rax*4]
	lea	rax, f[rip]
	mov	esi, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -20[rbp]
	add	eax, 1
	movsx	rdi, eax
	mov	eax, DWORD PTR -24[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rdi
	lea	rdx, 0[0+rax*4]
	lea	rax, d[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	eax, esi
	cmp	ecx, eax
	jle	.L33
	mov	eax, DWORD PTR -24[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	mov	edx, DWORD PTR -28[rbp]
	movsx	rdx, edx
	imul	rsi, rax, 255025
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rsi
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, f[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -20[rbp]
	add	eax, 1
	movsx	rsi, eax
	mov	eax, DWORD PTR -24[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rsi
	lea	rdx, 0[0+rax*4]
	lea	rax, d[rip]
	mov	edx, DWORD PTR [rdx+rax]
	cmp	DWORD PTR -16[rbp], 0
	sete	al
	movzx	eax, al
	add	ecx, edx
	mov	edx, DWORD PTR -20[rbp]
	movsx	rsi, edx
	cdqe
	mov	edx, DWORD PTR -28[rbp]
	movsx	rdx, edx
	imul	rdi, rax, 255025
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rdi
	add	rax, rsi
	lea	rdx, 0[0+rax*4]
	lea	rax, f[rip]
	mov	DWORD PTR [rdx+rax], ecx
.L33:
	cmp	DWORD PTR -16[rbp], 0
	sete	al
	movzx	eax, al
	cmp	DWORD PTR -16[rbp], 0
	sete	dl
	movzx	esi, dl
	mov	edx, DWORD PTR -20[rbp]
	movsx	rcx, edx
	cdqe
	mov	edx, DWORD PTR -28[rbp]
	movsx	rdx, edx
	imul	rdi, rax, 255025
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rdi
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, f[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -28[rbp]
	movsx	rdi, eax
	movsx	rax, esi
	mov	edx, DWORD PTR -20[rbp]
	movsx	rdx, edx
	imul	rsi, rax, 255025
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rsi
	add	rax, rdi
	lea	rdx, 0[0+rax*4]
	lea	rax, f[rip]
	mov	DWORD PTR [rdx+rax], ecx
	cmp	DWORD PTR -16[rbp], 0
	sete	al
	movzx	eax, al
	mov	edx, DWORD PTR -24[rbp]
	movsx	rcx, edx
	cdqe
	mov	edx, DWORD PTR -28[rbp]
	movsx	rdx, edx
	imul	rsi, rax, 255025
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rsi
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, f[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -24[rbp]
	movsx	rsi, eax
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	mov	edx, DWORD PTR -28[rbp]
	movsx	rdx, edx
	imul	rdi, rax, 255025
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rdi
	add	rax, rsi
	lea	rdx, 0[0+rax*4]
	lea	rax, f[rip]
	mov	esi, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -20[rbp]
	add	eax, 1
	movsx	rdi, eax
	mov	eax, DWORD PTR -20[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rdi
	lea	rdx, 0[0+rax*4]
	lea	rax, d[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	eax, esi
	cmp	ecx, eax
	jle	.L34
	mov	eax, DWORD PTR -24[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	mov	edx, DWORD PTR -28[rbp]
	movsx	rdx, edx
	imul	rsi, rax, 255025
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rsi
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, f[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -20[rbp]
	add	eax, 1
	movsx	rsi, eax
	mov	eax, DWORD PTR -20[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rsi
	lea	rdx, 0[0+rax*4]
	lea	rax, d[rip]
	mov	edx, DWORD PTR [rdx+rax]
	cmp	DWORD PTR -16[rbp], 0
	sete	al
	movzx	eax, al
	add	ecx, edx
	mov	edx, DWORD PTR -24[rbp]
	movsx	rsi, edx
	cdqe
	mov	edx, DWORD PTR -28[rbp]
	movsx	rdx, edx
	imul	rdi, rax, 255025
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rdi
	add	rax, rsi
	lea	rdx, 0[0+rax*4]
	lea	rax, f[rip]
	mov	DWORD PTR [rdx+rax], ecx
.L34:
	cmp	DWORD PTR -16[rbp], 0
	sete	al
	movzx	eax, al
	cmp	DWORD PTR -16[rbp], 0
	sete	dl
	movzx	esi, dl
	mov	edx, DWORD PTR -24[rbp]
	movsx	rcx, edx
	cdqe
	mov	edx, DWORD PTR -28[rbp]
	movsx	rdx, edx
	imul	rdi, rax, 255025
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rdi
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, f[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -28[rbp]
	movsx	rdi, eax
	movsx	rax, esi
	mov	edx, DWORD PTR -24[rbp]
	movsx	rdx, edx
	imul	rsi, rax, 255025
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rsi
	add	rax, rdi
	lea	rdx, 0[0+rax*4]
	lea	rax, f[rip]
	mov	DWORD PTR [rdx+rax], ecx
	add	DWORD PTR -24[rbp], 1
.L31:
	mov	eax, DWORD PTR n[rip]
	cmp	DWORD PTR -24[rbp], eax
	jl	.L35
	add	DWORD PTR -28[rbp], 1
.L30:
	mov	eax, DWORD PTR n[rip]
	cmp	DWORD PTR -28[rbp], eax
	jl	.L36
	cmp	DWORD PTR -16[rbp], 0
	sete	al
	movzx	eax, al
	mov	DWORD PTR -16[rbp], eax
	add	DWORD PTR -20[rbp], 1
.L25:
	mov	eax, DWORD PTR n[rip]
	sub	eax, 1
	cmp	DWORD PTR -20[rbp], eax
	jl	.L37
	mov	DWORD PTR -12[rbp], 1073741823
	mov	DWORD PTR -28[rbp], 0
	jmp	.L38
.L42:
	mov	eax, DWORD PTR -28[rbp]
	mov	DWORD PTR -24[rbp], eax
	jmp	.L39
.L41:
	mov	eax, DWORD PTR -24[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	mov	edx, DWORD PTR -28[rbp]
	movsx	rdx, edx
	imul	rsi, rax, 255025
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rsi
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, f[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 1073741822
	jg	.L40
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, d[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 1073741822
	jg	.L40
	mov	eax, DWORD PTR -24[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, d[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	eax, 1073741822
	jg	.L40
	mov	eax, DWORD PTR -24[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	mov	edx, DWORD PTR -28[rbp]
	movsx	rdx, edx
	imul	rsi, rax, 255025
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rsi
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, f[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, d[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	ecx, eax
	mov	eax, DWORD PTR -24[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, d[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	ecx, eax
	mov	eax, DWORD PTR n[rip]
	sub	eax, 1
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, d[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	eax, ecx
	cmp	DWORD PTR -12[rbp], eax
	jle	.L40
	mov	eax, DWORD PTR -24[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	mov	edx, DWORD PTR -28[rbp]
	movsx	rdx, edx
	imul	rsi, rax, 255025
	mov	rax, rdx
	sal	rax, 6
	sub	rax, rdx
	sal	rax, 3
	add	rax, rdx
	add	rax, rsi
	add	rax, rcx
	lea	rdx, 0[0+rax*4]
	lea	rax, f[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, d[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	ecx, eax
	mov	eax, DWORD PTR -24[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, d[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	ecx, eax
	mov	eax, DWORD PTR n[rip]
	sub	eax, 1
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, d[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	eax, ecx
	mov	DWORD PTR -12[rbp], eax
.L40:
	add	DWORD PTR -24[rbp], 1
.L39:
	mov	eax, DWORD PTR n[rip]
	cmp	DWORD PTR -24[rbp], eax
	jl	.L41
	add	DWORD PTR -28[rbp], 1
.L38:
	mov	eax, DWORD PTR n[rip]
	cmp	DWORD PTR -28[rbp], eax
	jl	.L42
	mov	eax, DWORD PTR -12[rbp]
	mov	esi, eax
	lea	rdi, .LC2[rip]
	mov	eax, 0
	call	printf@PLT
	mov	eax, 0
	mov	rdi, QWORD PTR -8[rbp]
	sub	rdi, QWORD PTR fs:40
	je	.L44
	call	__stack_chk_fail@PLT
.L44:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	main, .-main
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"588759.c"
	.text
	.comm	n,4,4
	.comm	m,4,4
	.comm	g,1020100,4
	.comm	f,2040200,4
	.comm	d,1020100,4
	.align	2
	.global	floyd_warshall
	.syntax unified
	.arm
	.fpu softvfp
	.type	floyd_warshall, %function
floyd_warshall:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	mov	r3, #0
	str	r3, [fp, #-16]
	b	.L2
.L5:
	mov	r3, #0
	str	r3, [fp, #-12]
	b	.L3
.L4:
	ldr	r1, .L13
	ldr	r2, [fp, #-16]
	mov	r3, r2
	lsl	r3, r3, #6
	sub	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	ldr	r2, [fp, #-12]
	add	r3, r3, r2
	ldr	r1, [r1, r3, lsl #2]
	ldr	r0, .L13+4
	ldr	r2, [fp, #-16]
	mov	r3, r2
	lsl	r3, r3, #6
	sub	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	ldr	r2, [fp, #-12]
	add	r3, r3, r2
	str	r1, [r0, r3, lsl #2]
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	str	r3, [fp, #-12]
.L3:
	ldr	r3, .L13+8
	ldr	r3, [r3]
	ldr	r2, [fp, #-12]
	cmp	r2, r3
	blt	.L4
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	str	r3, [fp, #-16]
.L2:
	ldr	r3, .L13+8
	ldr	r3, [r3]
	ldr	r2, [fp, #-16]
	cmp	r2, r3
	blt	.L5
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L6
.L12:
	mov	r3, #0
	str	r3, [fp, #-16]
	b	.L7
.L11:
	mov	r3, #0
	str	r3, [fp, #-12]
	b	.L8
.L10:
	ldr	r1, .L13+4
	ldr	r2, [fp, #-16]
	mov	r3, r2
	lsl	r3, r3, #6
	sub	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	ldr	r2, [fp, #-12]
	add	r3, r3, r2
	ldr	r1, [r1, r3, lsl #2]
	ldr	r0, .L13+4
	ldr	r2, [fp, #-16]
	mov	r3, r2
	lsl	r3, r3, #6
	sub	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	ldr	r2, [fp, #-8]
	add	r3, r3, r2
	ldr	r0, [r0, r3, lsl #2]
	ldr	ip, .L13+4
	ldr	r2, [fp, #-8]
	mov	r3, r2
	lsl	r3, r3, #6
	sub	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	ldr	r2, [fp, #-12]
	add	r3, r3, r2
	ldr	r3, [ip, r3, lsl #2]
	add	r3, r0, r3
	cmp	r1, r3
	ble	.L9
	ldr	r1, .L13+4
	ldr	r2, [fp, #-16]
	mov	r3, r2
	lsl	r3, r3, #6
	sub	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	ldr	r2, [fp, #-8]
	add	r3, r3, r2
	ldr	r1, [r1, r3, lsl #2]
	ldr	r0, .L13+4
	ldr	r2, [fp, #-8]
	mov	r3, r2
	lsl	r3, r3, #6
	sub	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	ldr	r2, [fp, #-12]
	add	r3, r3, r2
	ldr	r3, [r0, r3, lsl #2]
	add	r1, r1, r3
	ldr	r0, .L13+4
	ldr	r2, [fp, #-16]
	mov	r3, r2
	lsl	r3, r3, #6
	sub	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	ldr	r2, [fp, #-12]
	add	r3, r3, r2
	str	r1, [r0, r3, lsl #2]
.L9:
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	str	r3, [fp, #-12]
.L8:
	ldr	r3, .L13+8
	ldr	r3, [r3]
	ldr	r2, [fp, #-12]
	cmp	r2, r3
	blt	.L10
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	str	r3, [fp, #-16]
.L7:
	ldr	r3, .L13+8
	ldr	r3, [r3]
	ldr	r2, [fp, #-16]
	cmp	r2, r3
	blt	.L11
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L6:
	ldr	r3, .L13+8
	ldr	r3, [r3]
	ldr	r2, [fp, #-8]
	cmp	r2, r3
	blt	.L12
	nop
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L14:
	.align	2
.L13:
	.word	g
	.word	d
	.word	n
	.size	floyd_warshall, .-floyd_warshall
	.section	.rodata
	.align	2
.LC0:
	.ascii	"%d%d\000"
	.align	2
.LC1:
	.ascii	"%d%d%d\000"
	.align	2
.LC2:
	.ascii	"%d\012\000"
	.align	2
.LC3:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #40
	ldr	r3, .L47
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	ldr	r2, .L47+4
	ldr	r1, .L47+8
	ldr	r0, .L47+12
	bl	__isoc99_scanf
	ldr	r3, .L47+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L47+8
	str	r3, [r2]
	mov	r3, #0
	str	r3, [fp, #-28]
	b	.L16
.L19:
	mov	r3, #0
	str	r3, [fp, #-24]
	b	.L17
.L18:
	ldr	r1, .L47+16
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #6
	sub	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	ldr	r2, [fp, #-24]
	add	r3, r3, r2
	mvn	r2, #-1073741824
	str	r2, [r1, r3, lsl #2]
	ldr	r3, [fp, #-24]
	add	r3, r3, #1
	str	r3, [fp, #-24]
.L17:
	ldr	r3, .L47+8
	ldr	r3, [r3]
	ldr	r2, [fp, #-24]
	cmp	r2, r3
	blt	.L18
	ldr	r1, .L47+16
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #6
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r1, r3
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, [fp, #-28]
	add	r3, r3, #1
	str	r3, [fp, #-28]
.L16:
	ldr	r3, .L47+8
	ldr	r3, [r3]
	ldr	r2, [fp, #-28]
	cmp	r2, r3
	blt	.L19
	mov	r3, #0
	str	r3, [fp, #-28]
	b	.L20
.L22:
	sub	r3, fp, #32
	sub	r2, fp, #36
	sub	r1, fp, #40
	ldr	r0, .L47+20
	bl	__isoc99_scanf
	ldr	r2, [fp, #-40]
	ldr	r1, [fp, #-36]
	ldr	r0, .L47+16
	mov	r3, r2
	lsl	r3, r3, #6
	sub	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, r1
	ldr	r2, [r0, r3, lsl #2]
	ldr	r3, [fp, #-32]
	cmp	r2, r3
	ble	.L21
	ldr	r2, [fp, #-36]
	ldr	r0, [fp, #-40]
	ldr	r1, [fp, #-32]
	ldr	ip, .L47+16
	mov	r3, r2
	lsl	r3, r3, #6
	sub	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, r0
	str	r1, [ip, r3, lsl #2]
	ldr	r1, [fp, #-40]
	ldr	ip, [fp, #-36]
	ldr	lr, .L47+16
	mov	r3, r2
	lsl	r3, r3, #6
	sub	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, r0
	ldr	r2, [lr, r3, lsl #2]
	ldr	r0, .L47+16
	mov	r3, r1
	lsl	r3, r3, #6
	sub	r3, r3, r1
	lsl	r3, r3, #3
	add	r3, r3, r1
	add	r3, r3, ip
	str	r2, [r0, r3, lsl #2]
.L21:
	ldr	r3, [fp, #-28]
	add	r3, r3, #1
	str	r3, [fp, #-28]
.L20:
	ldr	r3, .L47+4
	ldr	r3, [r3]
	ldr	r2, [fp, #-28]
	cmp	r2, r3
	blt	.L22
	bl	floyd_warshall
	mov	r3, #0
	str	r3, [fp, #-16]
	mov	r3, #0
	str	r3, [fp, #-28]
	b	.L23
.L26:
	mov	r3, #0
	str	r3, [fp, #-24]
	b	.L24
.L25:
	ldr	ip, .L47+24
	ldr	r3, [fp, #-28]
	ldr	r0, [fp, #-16]
	mov	r2, r3
	lsl	r2, r2, #6
	sub	r2, r2, r3
	lsl	r2, r2, #3
	add	r2, r2, r3
	mov	r3, r0
	lsl	r3, r3, #6
	sub	r3, r3, r0
	lsl	r3, r3, #2
	add	r3, r3, r0
	lsl	r1, r3, #6
	sub	r1, r1, r3
	lsl	r1, r1, #4
	add	r1, r1, r0
	add	r2, r2, r1
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	mvn	r2, #-1073741824
	str	r2, [ip, r3, lsl #2]
	ldr	r3, [fp, #-24]
	add	r3, r3, #1
	str	r3, [fp, #-24]
.L24:
	ldr	r3, .L47+8
	ldr	r3, [r3]
	ldr	r2, [fp, #-24]
	cmp	r2, r3
	blt	.L25
	ldr	r3, [fp, #-28]
	add	r3, r3, #1
	str	r3, [fp, #-28]
.L23:
	ldr	r3, .L47+8
	ldr	r3, [r3]
	ldr	r2, [fp, #-28]
	cmp	r2, r3
	blt	.L26
	ldr	r2, .L47+24
	ldr	r3, [fp, #-16]
	ldr	r1, .L47+28
	mul	r3, r1, r3
	add	r3, r2, r3
	mov	r2, #0
	str	r2, [r3]
	mov	r3, #0
	str	r3, [fp, #-20]
	b	.L27
.L39:
	mov	r3, #0
	str	r3, [fp, #-28]
	b	.L28
.L31:
	mov	r3, #0
	str	r3, [fp, #-24]
	b	.L29
.L30:
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	ldr	ip, .L47+24
	ldr	r3, [fp, #-28]
	mov	r2, r3
	lsl	r2, r2, #6
	sub	r2, r2, r3
	lsl	r2, r2, #3
	add	r2, r2, r3
	mov	r3, r0
	lsl	r3, r3, #6
	sub	r3, r3, r0
	lsl	r3, r3, #2
	add	r3, r3, r0
	lsl	r1, r3, #6
	sub	r1, r1, r3
	lsl	r1, r1, #4
	add	r1, r1, r0
	add	r2, r2, r1
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	mvn	r2, #-1073741824
	str	r2, [ip, r3, lsl #2]
	ldr	r3, [fp, #-24]
	add	r3, r3, #1
	str	r3, [fp, #-24]
.L29:
	ldr	r3, .L47+8
	ldr	r3, [r3]
	ldr	r2, [fp, #-24]
	cmp	r2, r3
	blt	.L30
	ldr	r3, [fp, #-28]
	add	r3, r3, #1
	str	r3, [fp, #-28]
.L28:
	ldr	r3, .L47+8
	ldr	r3, [r3]
	ldr	r2, [fp, #-28]
	cmp	r2, r3
	blt	.L31
	mov	r3, #0
	str	r3, [fp, #-28]
	b	.L32
.L38:
	ldr	r3, [fp, #-28]
	str	r3, [fp, #-24]
	b	.L33
.L37:
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	ldr	ip, .L47+24
	ldr	r3, [fp, #-20]
	mov	r2, r3
	lsl	r2, r2, #6
	sub	r2, r2, r3
	lsl	r2, r2, #3
	add	r2, r2, r3
	mov	r3, r0
	lsl	r3, r3, #6
	sub	r3, r3, r0
	lsl	r3, r3, #2
	add	r3, r3, r0
	lsl	r1, r3, #6
	sub	r1, r1, r3
	lsl	r1, r1, #4
	add	r1, r1, r0
	add	r2, r2, r1
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	ldr	ip, [ip, r3, lsl #2]
	ldr	lr, .L47+24
	ldr	r3, [fp, #-28]
	ldr	r0, [fp, #-16]
	mov	r2, r3
	lsl	r2, r2, #6
	sub	r2, r2, r3
	lsl	r2, r2, #3
	add	r2, r2, r3
	mov	r3, r0
	lsl	r3, r3, #6
	sub	r3, r3, r0
	lsl	r3, r3, #2
	add	r3, r3, r0
	lsl	r1, r3, #6
	sub	r1, r1, r3
	lsl	r1, r1, #4
	add	r1, r1, r0
	add	r2, r2, r1
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	ldr	r1, [lr, r3, lsl #2]
	ldr	r3, [fp, #-20]
	add	r0, r3, #1
	ldr	lr, .L47+32
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #6
	sub	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, r0
	ldr	r3, [lr, r3, lsl #2]
	add	r3, r1, r3
	cmp	ip, r3
	ble	.L34
	ldr	ip, .L47+24
	ldr	r3, [fp, #-28]
	ldr	r0, [fp, #-16]
	mov	r2, r3
	lsl	r2, r2, #6
	sub	r2, r2, r3
	lsl	r2, r2, #3
	add	r2, r2, r3
	mov	r3, r0
	lsl	r3, r3, #6
	sub	r3, r3, r0
	lsl	r3, r3, #2
	add	r3, r3, r0
	lsl	r1, r3, #6
	sub	r1, r1, r3
	lsl	r1, r1, #4
	add	r1, r1, r0
	add	r2, r2, r1
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	ldr	r1, [ip, r3, lsl #2]
	ldr	r3, [fp, #-20]
	add	r0, r3, #1
	ldr	ip, .L47+32
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #6
	sub	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, r0
	ldr	r3, [ip, r3, lsl #2]
	ldr	r2, [fp, #-16]
	cmp	r2, #0
	moveq	r2, #1
	movne	r2, #0
	and	r2, r2, #255
	mov	r0, r2
	add	ip, r1, r3
	ldr	lr, .L47+24
	ldr	r3, [fp, #-20]
	mov	r2, r3
	lsl	r2, r2, #6
	sub	r2, r2, r3
	lsl	r2, r2, #3
	add	r2, r2, r3
	mov	r3, r0
	lsl	r3, r3, #6
	sub	r3, r3, r0
	lsl	r3, r3, #2
	add	r3, r3, r0
	lsl	r1, r3, #6
	sub	r1, r1, r3
	lsl	r1, r1, #4
	add	r1, r1, r0
	add	r2, r2, r1
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	str	ip, [lr, r3, lsl #2]
.L34:
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	ip, r3
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	ldr	lr, .L47+24
	ldr	r3, [fp, #-20]
	mov	r2, r3
	lsl	r2, r2, #6
	sub	r2, r2, r3
	lsl	r2, r2, #3
	add	r2, r2, r3
	mov	r3, ip
	lsl	r3, r3, #6
	sub	r3, r3, ip
	lsl	r3, r3, #2
	add	r3, r3, ip
	lsl	r1, r3, #6
	sub	r1, r1, r3
	lsl	r1, r1, #4
	add	r1, r1, ip
	add	r2, r2, r1
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	ldr	ip, [lr, r3, lsl #2]
	ldr	lr, .L47+24
	ldr	r3, [fp, #-24]
	mov	r2, r3
	lsl	r2, r2, #6
	sub	r2, r2, r3
	lsl	r2, r2, #3
	add	r2, r2, r3
	mov	r3, r0
	lsl	r3, r3, #6
	sub	r3, r3, r0
	lsl	r3, r3, #2
	add	r3, r3, r0
	lsl	r1, r3, #6
	sub	r1, r1, r3
	lsl	r1, r1, #4
	add	r1, r1, r0
	add	r2, r2, r1
	ldr	r3, [fp, #-20]
	add	r3, r2, r3
	str	ip, [lr, r3, lsl #2]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	ldr	ip, .L47+24
	ldr	r3, [fp, #-28]
	mov	r2, r3
	lsl	r2, r2, #6
	sub	r2, r2, r3
	lsl	r2, r2, #3
	add	r2, r2, r3
	mov	r3, r0
	lsl	r3, r3, #6
	sub	r3, r3, r0
	lsl	r3, r3, #2
	add	r3, r3, r0
	lsl	r1, r3, #6
	sub	r1, r1, r3
	lsl	r1, r1, #4
	add	r1, r1, r0
	add	r2, r2, r1
	ldr	r3, [fp, #-20]
	add	r3, r2, r3
	ldr	ip, [ip, r3, lsl #2]
	ldr	lr, .L47+24
	ldr	r3, [fp, #-28]
	ldr	r0, [fp, #-16]
	mov	r2, r3
	lsl	r2, r2, #6
	sub	r2, r2, r3
	lsl	r2, r2, #3
	add	r2, r2, r3
	mov	r3, r0
	lsl	r3, r3, #6
	sub	r3, r3, r0
	lsl	r3, r3, #2
	add	r3, r3, r0
	lsl	r1, r3, #6
	sub	r1, r1, r3
	lsl	r1, r1, #4
	add	r1, r1, r0
	add	r2, r2, r1
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	ldr	r1, [lr, r3, lsl #2]
	ldr	r3, [fp, #-20]
	add	r0, r3, #1
	ldr	lr, .L47+32
	ldr	r2, [fp, #-24]
	mov	r3, r2
	lsl	r3, r3, #6
	sub	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, r0
	ldr	r3, [lr, r3, lsl #2]
	add	r3, r1, r3
	cmp	ip, r3
	ble	.L35
	ldr	ip, .L47+24
	ldr	r3, [fp, #-28]
	ldr	r0, [fp, #-16]
	mov	r2, r3
	lsl	r2, r2, #6
	sub	r2, r2, r3
	lsl	r2, r2, #3
	add	r2, r2, r3
	mov	r3, r0
	lsl	r3, r3, #6
	sub	r3, r3, r0
	lsl	r3, r3, #2
	add	r3, r3, r0
	lsl	r1, r3, #6
	sub	r1, r1, r3
	lsl	r1, r1, #4
	add	r1, r1, r0
	add	r2, r2, r1
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	ldr	r1, [ip, r3, lsl #2]
	ldr	r3, [fp, #-20]
	add	r0, r3, #1
	ldr	ip, .L47+32
	ldr	r2, [fp, #-24]
	mov	r3, r2
	lsl	r3, r3, #6
	sub	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, r0
	ldr	r3, [ip, r3, lsl #2]
	ldr	r2, [fp, #-16]
	cmp	r2, #0
	moveq	r2, #1
	movne	r2, #0
	and	r2, r2, #255
	mov	r0, r2
	add	ip, r1, r3
	ldr	lr, .L47+24
	ldr	r3, [fp, #-28]
	mov	r2, r3
	lsl	r2, r2, #6
	sub	r2, r2, r3
	lsl	r2, r2, #3
	add	r2, r2, r3
	mov	r3, r0
	lsl	r3, r3, #6
	sub	r3, r3, r0
	lsl	r3, r3, #2
	add	r3, r3, r0
	lsl	r1, r3, #6
	sub	r1, r1, r3
	lsl	r1, r1, #4
	add	r1, r1, r0
	add	r2, r2, r1
	ldr	r3, [fp, #-20]
	add	r3, r2, r3
	str	ip, [lr, r3, lsl #2]
.L35:
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	ip, r3
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	ldr	lr, .L47+24
	ldr	r3, [fp, #-28]
	mov	r2, r3
	lsl	r2, r2, #6
	sub	r2, r2, r3
	lsl	r2, r2, #3
	add	r2, r2, r3
	mov	r3, ip
	lsl	r3, r3, #6
	sub	r3, r3, ip
	lsl	r3, r3, #2
	add	r3, r3, ip
	lsl	r1, r3, #6
	sub	r1, r1, r3
	lsl	r1, r1, #4
	add	r1, r1, ip
	add	r2, r2, r1
	ldr	r3, [fp, #-20]
	add	r3, r2, r3
	ldr	ip, [lr, r3, lsl #2]
	ldr	lr, .L47+24
	ldr	r3, [fp, #-20]
	mov	r2, r3
	lsl	r2, r2, #6
	sub	r2, r2, r3
	lsl	r2, r2, #3
	add	r2, r2, r3
	mov	r3, r0
	lsl	r3, r3, #6
	sub	r3, r3, r0
	lsl	r3, r3, #2
	add	r3, r3, r0
	lsl	r1, r3, #6
	sub	r1, r1, r3
	lsl	r1, r1, #4
	add	r1, r1, r0
	add	r2, r2, r1
	ldr	r3, [fp, #-28]
	add	r3, r2, r3
	str	ip, [lr, r3, lsl #2]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	ldr	ip, .L47+24
	ldr	r3, [fp, #-28]
	mov	r2, r3
	lsl	r2, r2, #6
	sub	r2, r2, r3
	lsl	r2, r2, #3
	add	r2, r2, r3
	mov	r3, r0
	lsl	r3, r3, #6
	sub	r3, r3, r0
	lsl	r3, r3, #2
	add	r3, r3, r0
	lsl	r1, r3, #6
	sub	r1, r1, r3
	lsl	r1, r1, #4
	add	r1, r1, r0
	add	r2, r2, r1
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	ldr	ip, [ip, r3, lsl #2]
	ldr	lr, .L47+24
	ldr	r3, [fp, #-28]
	ldr	r0, [fp, #-16]
	mov	r2, r3
	lsl	r2, r2, #6
	sub	r2, r2, r3
	lsl	r2, r2, #3
	add	r2, r2, r3
	mov	r3, r0
	lsl	r3, r3, #6
	sub	r3, r3, r0
	lsl	r3, r3, #2
	add	r3, r3, r0
	lsl	r1, r3, #6
	sub	r1, r1, r3
	lsl	r1, r1, #4
	add	r1, r1, r0
	add	r2, r2, r1
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	ldr	r1, [lr, r3, lsl #2]
	ldr	r3, [fp, #-20]
	add	r0, r3, #1
	ldr	lr, .L47+32
	ldr	r2, [fp, #-20]
	mov	r3, r2
	lsl	r3, r3, #6
	sub	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, r0
	ldr	r3, [lr, r3, lsl #2]
	add	r3, r1, r3
	cmp	ip, r3
	ble	.L36
	ldr	ip, .L47+24
	ldr	r3, [fp, #-28]
	ldr	r0, [fp, #-16]
	mov	r2, r3
	lsl	r2, r2, #6
	sub	r2, r2, r3
	lsl	r2, r2, #3
	add	r2, r2, r3
	mov	r3, r0
	lsl	r3, r3, #6
	sub	r3, r3, r0
	lsl	r3, r3, #2
	add	r3, r3, r0
	lsl	r1, r3, #6
	sub	r1, r1, r3
	lsl	r1, r1, #4
	add	r1, r1, r0
	add	r2, r2, r1
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	ldr	r1, [ip, r3, lsl #2]
	ldr	r3, [fp, #-20]
	add	r0, r3, #1
	ldr	ip, .L47+32
	ldr	r2, [fp, #-20]
	mov	r3, r2
	lsl	r3, r3, #6
	sub	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, r0
	ldr	r3, [ip, r3, lsl #2]
	ldr	r2, [fp, #-16]
	cmp	r2, #0
	moveq	r2, #1
	movne	r2, #0
	and	r2, r2, #255
	mov	r0, r2
	add	ip, r1, r3
	ldr	lr, .L47+24
	ldr	r3, [fp, #-28]
	mov	r2, r3
	lsl	r2, r2, #6
	sub	r2, r2, r3
	lsl	r2, r2, #3
	add	r2, r2, r3
	mov	r3, r0
	lsl	r3, r3, #6
	sub	r3, r3, r0
	lsl	r3, r3, #2
	add	r3, r3, r0
	lsl	r1, r3, #6
	sub	r1, r1, r3
	lsl	r1, r1, #4
	add	r1, r1, r0
	add	r2, r2, r1
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	str	ip, [lr, r3, lsl #2]
.L36:
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	ip, r3
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	ldr	lr, .L47+24
	ldr	r3, [fp, #-28]
	mov	r2, r3
	lsl	r2, r2, #6
	sub	r2, r2, r3
	lsl	r2, r2, #3
	add	r2, r2, r3
	mov	r3, ip
	lsl	r3, r3, #6
	sub	r3, r3, ip
	lsl	r3, r3, #2
	add	r3, r3, ip
	lsl	r1, r3, #6
	sub	r1, r1, r3
	lsl	r1, r1, #4
	add	r1, r1, ip
	add	r2, r2, r1
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	ldr	ip, [lr, r3, lsl #2]
	ldr	lr, .L47+24
	ldr	r3, [fp, #-24]
	mov	r2, r3
	lsl	r2, r2, #6
	sub	r2, r2, r3
	lsl	r2, r2, #3
	add	r2, r2, r3
	mov	r3, r0
	lsl	r3, r3, #6
	sub	r3, r3, r0
	lsl	r3, r3, #2
	add	r3, r3, r0
	lsl	r1, r3, #6
	sub	r1, r1, r3
	lsl	r1, r1, #4
	add	r1, r1, r0
	add	r2, r2, r1
	ldr	r3, [fp, #-28]
	add	r3, r2, r3
	str	ip, [lr, r3, lsl #2]
	ldr	r3, [fp, #-24]
	add	r3, r3, #1
	str	r3, [fp, #-24]
.L33:
	ldr	r3, .L47+8
	ldr	r3, [r3]
	ldr	r2, [fp, #-24]
	cmp	r2, r3
	blt	.L37
	ldr	r3, [fp, #-28]
	add	r3, r3, #1
	str	r3, [fp, #-28]
.L32:
	ldr	r3, .L47+8
	ldr	r3, [r3]
	ldr	r2, [fp, #-28]
	cmp	r2, r3
	blt	.L38
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-20]
	add	r3, r3, #1
	str	r3, [fp, #-20]
.L27:
	ldr	r3, .L47+8
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r2, [fp, #-20]
	cmp	r2, r3
	blt	.L39
	mvn	r3, #-1073741824
	str	r3, [fp, #-12]
	mov	r3, #0
	str	r3, [fp, #-28]
	b	.L40
.L44:
	ldr	r3, [fp, #-28]
	str	r3, [fp, #-24]
	b	.L41
.L43:
	ldr	ip, .L47+24
	ldr	r3, [fp, #-28]
	ldr	r0, [fp, #-16]
	mov	r2, r3
	lsl	r2, r2, #6
	sub	r2, r2, r3
	lsl	r2, r2, #3
	add	r2, r2, r3
	mov	r3, r0
	lsl	r3, r3, #6
	sub	r3, r3, r0
	lsl	r3, r3, #2
	add	r3, r3, r0
	lsl	r1, r3, #6
	sub	r1, r1, r3
	lsl	r1, r1, #4
	add	r1, r1, r0
	add	r2, r2, r1
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	ldr	r3, [ip, r3, lsl #2]
	cmn	r3, #-1073741822
	bgt	.L42
	ldr	r2, .L47+32
	ldr	r3, [fp, #-28]
	ldr	r3, [r2, r3, lsl #2]
	cmn	r3, #-1073741822
	bgt	.L42
	ldr	r2, .L47+32
	ldr	r3, [fp, #-24]
	ldr	r3, [r2, r3, lsl #2]
	cmn	r3, #-1073741822
	bgt	.L42
	ldr	ip, .L47+24
	ldr	r3, [fp, #-28]
	ldr	r0, [fp, #-16]
	mov	r2, r3
	lsl	r2, r2, #6
	sub	r2, r2, r3
	lsl	r2, r2, #3
	add	r2, r2, r3
	mov	r3, r0
	lsl	r3, r3, #6
	sub	r3, r3, r0
	lsl	r3, r3, #2
	add	r3, r3, r0
	lsl	r1, r3, #6
	sub	r1, r1, r3
	lsl	r1, r1, #4
	add	r1, r1, r0
	add	r2, r2, r1
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	ldr	r2, [ip, r3, lsl #2]
	ldr	r1, .L47+32
	ldr	r3, [fp, #-28]
	ldr	r3, [r1, r3, lsl #2]
	add	r2, r2, r3
	ldr	r1, .L47+32
	ldr	r3, [fp, #-24]
	ldr	r3, [r1, r3, lsl #2]
	add	r2, r2, r3
	ldr	r3, .L47+8
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r1, .L47+32
	ldr	r3, [r1, r3, lsl #2]
	add	r3, r2, r3
	ldr	r2, [fp, #-12]
	cmp	r2, r3
	ble	.L42
	ldr	ip, .L47+24
	ldr	r3, [fp, #-28]
	ldr	r0, [fp, #-16]
	mov	r2, r3
	lsl	r2, r2, #6
	sub	r2, r2, r3
	lsl	r2, r2, #3
	add	r2, r2, r3
	mov	r3, r0
	lsl	r3, r3, #6
	sub	r3, r3, r0
	lsl	r3, r3, #2
	add	r3, r3, r0
	lsl	r1, r3, #6
	sub	r1, r1, r3
	lsl	r1, r1, #4
	add	r1, r1, r0
	add	r2, r2, r1
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	ldr	r2, [ip, r3, lsl #2]
	ldr	r1, .L47+32
	ldr	r3, [fp, #-28]
	ldr	r3, [r1, r3, lsl #2]
	add	r2, r2, r3
	ldr	r1, .L47+32
	ldr	r3, [fp, #-24]
	ldr	r3, [r1, r3, lsl #2]
	add	r2, r2, r3
	ldr	r3, .L47+8
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r1, .L47+32
	ldr	r3, [r1, r3, lsl #2]
	add	r3, r2, r3
	str	r3, [fp, #-12]
.L42:
	ldr	r3, [fp, #-24]
	add	r3, r3, #1
	str	r3, [fp, #-24]
.L41:
	ldr	r3, .L47+8
	ldr	r3, [r3]
	ldr	r2, [fp, #-24]
	cmp	r2, r3
	blt	.L43
	ldr	r3, [fp, #-28]
	add	r3, r3, #1
	str	r3, [fp, #-28]
.L40:
	ldr	r3, .L47+8
	ldr	r3, [r3]
	ldr	r2, [fp, #-28]
	cmp	r2, r3
	blt	.L44
	ldr	r1, [fp, #-12]
	ldr	r0, .L47+36
	bl	printf
	mov	r3, #0
	ldr	r2, .L47
	ldr	r1, [r2]
	ldr	r2, [fp, #-8]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L46
	bl	__stack_chk_fail
.L46:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L48:
	.align	2
.L47:
	.word	.LC3
	.word	m
	.word	n
	.word	.LC0
	.word	g
	.word	.LC1
	.word	f
	.word	1020100
	.word	d
	.word	.LC2
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
