	.file	"408365.c"
	.intel_syntax noprefix
	.text
	.globl	amode
	.data
	.align 32
	.type	amode, @object
	.size	amode, 208
amode:
	.string	"Implied"
	.zero	8
	.string	"Relative"
	.zero	7
	.string	"Accum"
	.zero	10
	.string	"Immediate"
	.zero	6
	.string	"ZeroPage"
	.zero	7
	.string	"ZeroPage,X"
	.zero	5
	.string	"ZeroPage,Y"
	.zero	5
	.string	"Abs"
	.zero	12
	.string	"Abs,X"
	.zero	10
	.string	"Abs.Y"
	.zero	10
	.string	"(Ind)"
	.zero	10
	.string	"(Ind,X)"
	.zero	8
	.string	"(Ind),Y"
	.zero	8
	.globl	op2i
	.bss
	.align 32
	.type	op2i, @object
	.size	op2i, 6144
op2i:
	.zero	6144
	.text
	.globl	setup
	.type	setup, @function
setup:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	edx, 6144
	mov	esi, 0
	lea	rdi, op2i[rip]
	call	memset@PLT
	mov	QWORD PTR op2i[rip+2616], 4408385
	mov	DWORD PTR op2i[rip+2624], 7
	mov	DWORD PTR op2i[rip+2628], 3
	mov	DWORD PTR op2i[rip+2632], 4
	mov	BYTE PTR op2i[rip+2636], 0
	mov	BYTE PTR op2i[rip+2637], 0
	mov	BYTE PTR op2i[rip+2638], -61
	mov	QWORD PTR op2i[rip+3000], 4408385
	mov	DWORD PTR op2i[rip+3008], 8
	mov	DWORD PTR op2i[rip+3012], 3
	mov	DWORD PTR op2i[rip+3016], 14
	mov	BYTE PTR op2i[rip+3020], 0
	mov	BYTE PTR op2i[rip+3021], 0
	mov	BYTE PTR op2i[rip+3022], -61
	mov	QWORD PTR op2i[rip+2904], 4408385
	mov	DWORD PTR op2i[rip+2912], 9
	mov	DWORD PTR op2i[rip+2916], 3
	mov	DWORD PTR op2i[rip+2920], 14
	mov	BYTE PTR op2i[rip+2924], 0
	mov	BYTE PTR op2i[rip+2925], 0
	mov	BYTE PTR op2i[rip+2926], -61
	mov	QWORD PTR op2i[rip+2520], 4408385
	mov	DWORD PTR op2i[rip+2528], 3
	mov	DWORD PTR op2i[rip+2532], 2
	mov	DWORD PTR op2i[rip+2536], 2
	mov	BYTE PTR op2i[rip+2540], 0
	mov	BYTE PTR op2i[rip+2541], 0
	mov	BYTE PTR op2i[rip+2542], -61
	mov	QWORD PTR op2i[rip+2328], 4408385
	mov	DWORD PTR op2i[rip+2336], 11
	mov	DWORD PTR op2i[rip+2340], 2
	mov	DWORD PTR op2i[rip+2344], 6
	mov	BYTE PTR op2i[rip+2348], 0
	mov	BYTE PTR op2i[rip+2349], 0
	mov	BYTE PTR op2i[rip+2350], -61
	mov	QWORD PTR op2i[rip+2712], 4408385
	mov	DWORD PTR op2i[rip+2720], 12
	mov	DWORD PTR op2i[rip+2724], 2
	mov	DWORD PTR op2i[rip+2728], 15
	mov	BYTE PTR op2i[rip+2732], 0
	mov	BYTE PTR op2i[rip+2733], 0
	mov	BYTE PTR op2i[rip+2734], -61
	mov	QWORD PTR op2i[rip+2424], 4408385
	mov	DWORD PTR op2i[rip+2432], 4
	mov	DWORD PTR op2i[rip+2436], 2
	mov	DWORD PTR op2i[rip+2440], 3
	mov	BYTE PTR op2i[rip+2444], 0
	mov	BYTE PTR op2i[rip+2445], 0
	mov	BYTE PTR op2i[rip+2446], -61
	mov	QWORD PTR op2i[rip+2808], 4408385
	mov	DWORD PTR op2i[rip+2816], 5
	mov	DWORD PTR op2i[rip+2820], 2
	mov	DWORD PTR op2i[rip+2824], 4
	mov	BYTE PTR op2i[rip+2828], 0
	mov	BYTE PTR op2i[rip+2829], 0
	mov	BYTE PTR op2i[rip+2830], -61
	mov	QWORD PTR op2i[rip+1080], 4476481
	mov	DWORD PTR op2i[rip+1088], 7
	mov	DWORD PTR op2i[rip+1092], 3
	mov	DWORD PTR op2i[rip+1096], 4
	mov	BYTE PTR op2i[rip+1100], 0
	mov	BYTE PTR op2i[rip+1101], 0
	mov	BYTE PTR op2i[rip+1102], -126
	mov	QWORD PTR op2i[rip+1464], 4476481
	mov	DWORD PTR op2i[rip+1472], 8
	mov	DWORD PTR op2i[rip+1476], 3
	mov	DWORD PTR op2i[rip+1480], 14
	mov	BYTE PTR op2i[rip+1484], 0
	mov	BYTE PTR op2i[rip+1485], 0
	mov	BYTE PTR op2i[rip+1486], -126
	mov	QWORD PTR op2i[rip+1368], 4476481
	mov	DWORD PTR op2i[rip+1376], 9
	mov	DWORD PTR op2i[rip+1380], 3
	mov	DWORD PTR op2i[rip+1384], 14
	mov	BYTE PTR op2i[rip+1388], 0
	mov	BYTE PTR op2i[rip+1389], 0
	mov	BYTE PTR op2i[rip+1390], -126
	mov	QWORD PTR op2i[rip+984], 4476481
	mov	DWORD PTR op2i[rip+992], 3
	mov	DWORD PTR op2i[rip+996], 2
	mov	DWORD PTR op2i[rip+1000], 2
	mov	BYTE PTR op2i[rip+1004], 0
	mov	BYTE PTR op2i[rip+1005], 0
	mov	BYTE PTR op2i[rip+1006], -126
	mov	QWORD PTR op2i[rip+792], 4476481
	mov	DWORD PTR op2i[rip+800], 11
	mov	DWORD PTR op2i[rip+804], 2
	mov	DWORD PTR op2i[rip+808], 6
	mov	BYTE PTR op2i[rip+812], 0
	mov	BYTE PTR op2i[rip+813], 0
	mov	BYTE PTR op2i[rip+814], -126
	mov	QWORD PTR op2i[rip+1176], 4476481
	mov	DWORD PTR op2i[rip+1184], 12
	mov	DWORD PTR op2i[rip+1188], 2
	mov	DWORD PTR op2i[rip+1192], 15
	mov	BYTE PTR op2i[rip+1196], 0
	mov	BYTE PTR op2i[rip+1197], 0
	mov	BYTE PTR op2i[rip+1198], -126
	mov	QWORD PTR op2i[rip+888], 4476481
	mov	DWORD PTR op2i[rip+896], 4
	mov	DWORD PTR op2i[rip+900], 2
	mov	DWORD PTR op2i[rip+904], 3
	mov	BYTE PTR op2i[rip+908], 0
	mov	BYTE PTR op2i[rip+909], 0
	mov	BYTE PTR op2i[rip+910], -126
	mov	QWORD PTR op2i[rip+1272], 4476481
	mov	DWORD PTR op2i[rip+1280], 5
	mov	DWORD PTR op2i[rip+1284], 2
	mov	DWORD PTR op2i[rip+1288], 4
	mov	BYTE PTR op2i[rip+1292], 0
	mov	BYTE PTR op2i[rip+1293], 0
	mov	BYTE PTR op2i[rip+1294], -126
	mov	QWORD PTR op2i[rip+336], 5002049
	mov	DWORD PTR op2i[rip+344], 7
	mov	DWORD PTR op2i[rip+348], 3
	mov	DWORD PTR op2i[rip+352], 6
	mov	BYTE PTR op2i[rip+356], 0
	mov	BYTE PTR op2i[rip+357], 0
	mov	BYTE PTR op2i[rip+358], -125
	mov	QWORD PTR op2i[rip+720], 5002049
	mov	DWORD PTR op2i[rip+728], 8
	mov	DWORD PTR op2i[rip+732], 3
	mov	DWORD PTR op2i[rip+736], 7
	mov	BYTE PTR op2i[rip+740], 0
	mov	BYTE PTR op2i[rip+741], 0
	mov	BYTE PTR op2i[rip+742], -125
	mov	QWORD PTR op2i[rip+240], 5002049
	mov	DWORD PTR op2i[rip+248], 2
	mov	DWORD PTR op2i[rip+252], 1
	mov	DWORD PTR op2i[rip+256], 2
	mov	BYTE PTR op2i[rip+260], 0
	mov	BYTE PTR op2i[rip+261], 0
	mov	BYTE PTR op2i[rip+262], -125
	mov	QWORD PTR op2i[rip+144], 5002049
	mov	DWORD PTR op2i[rip+152], 4
	mov	DWORD PTR op2i[rip+156], 2
	mov	DWORD PTR op2i[rip+160], 5
	mov	BYTE PTR op2i[rip+164], 0
	mov	BYTE PTR op2i[rip+165], 0
	mov	BYTE PTR op2i[rip+166], -125
	mov	QWORD PTR op2i[rip+528], 5002049
	mov	DWORD PTR op2i[rip+536], 5
	mov	DWORD PTR op2i[rip+540], 2
	mov	DWORD PTR op2i[rip+544], 6
	mov	BYTE PTR op2i[rip+548], 0
	mov	BYTE PTR op2i[rip+549], 0
	mov	BYTE PTR op2i[rip+550], -125
	mov	QWORD PTR op2i[rip+3456], 4408130
	mov	DWORD PTR op2i[rip+3464], 1
	mov	DWORD PTR op2i[rip+3468], 2
	mov	DWORD PTR op2i[rip+3472], 22
	mov	BYTE PTR op2i[rip+3476], 0
	mov	BYTE PTR op2i[rip+3477], 0
	mov	BYTE PTR op2i[rip+3478], 0
	mov	QWORD PTR op2i[rip+4224], 5456706
	mov	DWORD PTR op2i[rip+4232], 1
	mov	DWORD PTR op2i[rip+4236], 2
	mov	DWORD PTR op2i[rip+4240], 22
	mov	BYTE PTR op2i[rip+4244], 0
	mov	BYTE PTR op2i[rip+4245], 0
	mov	BYTE PTR op2i[rip+4246], 0
	mov	QWORD PTR op2i[rip+5760], 5326146
	mov	DWORD PTR op2i[rip+5768], 1
	mov	DWORD PTR op2i[rip+5772], 2
	mov	DWORD PTR op2i[rip+5776], 22
	mov	BYTE PTR op2i[rip+5780], 0
	mov	BYTE PTR op2i[rip+5781], 0
	mov	BYTE PTR op2i[rip+5782], 0
	mov	QWORD PTR op2i[rip+1056], 5523778
	mov	DWORD PTR op2i[rip+1064], 7
	mov	DWORD PTR op2i[rip+1068], 3
	mov	DWORD PTR op2i[rip+1072], 4
	mov	BYTE PTR op2i[rip+1076], 0
	mov	BYTE PTR op2i[rip+1077], 0
	mov	BYTE PTR op2i[rip+1078], -62
	mov	QWORD PTR op2i[rip+864], 5523778
	mov	DWORD PTR op2i[rip+872], 4
	mov	DWORD PTR op2i[rip+876], 2
	mov	DWORD PTR op2i[rip+880], 3
	mov	BYTE PTR op2i[rip+884], 0
	mov	BYTE PTR op2i[rip+885], 0
	mov	BYTE PTR op2i[rip+886], -62
	mov	QWORD PTR op2i[rip+1152], 4803906
	mov	DWORD PTR op2i[rip+1160], 1
	mov	DWORD PTR op2i[rip+1164], 2
	mov	DWORD PTR op2i[rip+1168], 22
	mov	BYTE PTR op2i[rip+1172], 0
	mov	BYTE PTR op2i[rip+1173], 0
	mov	BYTE PTR op2i[rip+1174], 0
	mov	QWORD PTR op2i[rip+4992], 4542018
	mov	DWORD PTR op2i[rip+5000], 1
	mov	DWORD PTR op2i[rip+5004], 2
	mov	DWORD PTR op2i[rip+5008], 22
	mov	BYTE PTR op2i[rip+5012], 0
	mov	BYTE PTR op2i[rip+5013], 0
	mov	BYTE PTR op2i[rip+5014], 0
	mov	QWORD PTR op2i[rip+384], 5001282
	mov	DWORD PTR op2i[rip+392], 1
	mov	DWORD PTR op2i[rip+396], 2
	mov	DWORD PTR op2i[rip+400], 22
	mov	BYTE PTR op2i[rip+404], 0
	mov	BYTE PTR op2i[rip+405], 0
	mov	BYTE PTR op2i[rip+406], 0
	mov	QWORD PTR op2i[rip], 4936258
	mov	DWORD PTR op2i[rip+8], 0
	mov	DWORD PTR op2i[rip+12], 1
	mov	DWORD PTR op2i[rip+16], 7
	mov	BYTE PTR op2i[rip+20], 0
	mov	BYTE PTR op2i[rip+21], 4
	mov	BYTE PTR op2i[rip+22], 0
	mov	QWORD PTR op2i[rip+1920], 4412994
	mov	DWORD PTR op2i[rip+1928], 1
	mov	DWORD PTR op2i[rip+1932], 2
	mov	DWORD PTR op2i[rip+1936], 22
	mov	BYTE PTR op2i[rip+1940], 0
	mov	BYTE PTR op2i[rip+1941], 0
	mov	BYTE PTR op2i[rip+1942], 0
	mov	QWORD PTR op2i[rip+2688], 5461570
	mov	DWORD PTR op2i[rip+2696], 1
	mov	DWORD PTR op2i[rip+2700], 2
	mov	DWORD PTR op2i[rip+2704], 22
	mov	BYTE PTR op2i[rip+2708], 0
	mov	BYTE PTR op2i[rip+2709], 0
	mov	BYTE PTR op2i[rip+2710], 0
	mov	QWORD PTR op2i[rip+576], 4410435
	mov	DWORD PTR op2i[rip+584], 0
	mov	DWORD PTR op2i[rip+588], 1
	mov	DWORD PTR op2i[rip+592], 2
	mov	BYTE PTR op2i[rip+596], 1
	mov	BYTE PTR op2i[rip+597], 0
	mov	BYTE PTR op2i[rip+598], 0
	mov	QWORD PTR op2i[rip+5184], 4475971
	mov	DWORD PTR op2i[rip+5192], 0
	mov	DWORD PTR op2i[rip+5196], 1
	mov	DWORD PTR op2i[rip+5200], 2
	mov	BYTE PTR op2i[rip+5204], 8
	mov	BYTE PTR op2i[rip+5205], 0
	mov	BYTE PTR op2i[rip+5206], 0
	mov	QWORD PTR op2i[rip+2112], 4803651
	mov	DWORD PTR op2i[rip+2120], 0
	mov	DWORD PTR op2i[rip+2124], 1
	mov	DWORD PTR op2i[rip+2128], 2
	mov	BYTE PTR op2i[rip+2132], 4
	mov	BYTE PTR op2i[rip+2133], 0
	mov	BYTE PTR op2i[rip+2134], 0
	mov	QWORD PTR op2i[rip+4416], 5655619
	mov	DWORD PTR op2i[rip+4424], 0
	mov	DWORD PTR op2i[rip+4428], 1
	mov	DWORD PTR op2i[rip+4432], 2
	mov	BYTE PTR op2i[rip+4436], 64
	mov	BYTE PTR op2i[rip+4437], 0
	mov	BYTE PTR op2i[rip+4438], 0
	mov	QWORD PTR op2i[rip+4920], 5262659
	mov	DWORD PTR op2i[rip+4928], 7
	mov	DWORD PTR op2i[rip+4932], 3
	mov	DWORD PTR op2i[rip+4936], 4
	mov	BYTE PTR op2i[rip+4940], 0
	mov	BYTE PTR op2i[rip+4941], 0
	mov	BYTE PTR op2i[rip+4942], -125
	mov	QWORD PTR op2i[rip+5304], 5262659
	mov	DWORD PTR op2i[rip+5312], 8
	mov	DWORD PTR op2i[rip+5316], 3
	mov	DWORD PTR op2i[rip+5320], 14
	mov	BYTE PTR op2i[rip+5324], 0
	mov	BYTE PTR op2i[rip+5325], 0
	mov	BYTE PTR op2i[rip+5326], -125
	mov	QWORD PTR op2i[rip+5208], 5262659
	mov	DWORD PTR op2i[rip+5216], 9
	mov	DWORD PTR op2i[rip+5220], 3
	mov	DWORD PTR op2i[rip+5224], 14
	mov	BYTE PTR op2i[rip+5228], 0
	mov	BYTE PTR op2i[rip+5229], 0
	mov	BYTE PTR op2i[rip+5230], -125
	mov	QWORD PTR op2i[rip+4824], 5262659
	mov	DWORD PTR op2i[rip+4832], 3
	mov	DWORD PTR op2i[rip+4836], 2
	mov	DWORD PTR op2i[rip+4840], 2
	mov	BYTE PTR op2i[rip+4844], 0
	mov	BYTE PTR op2i[rip+4845], 0
	mov	BYTE PTR op2i[rip+4846], -125
	mov	QWORD PTR op2i[rip+4632], 5262659
	mov	DWORD PTR op2i[rip+4640], 11
	mov	DWORD PTR op2i[rip+4644], 2
	mov	DWORD PTR op2i[rip+4648], 6
	mov	BYTE PTR op2i[rip+4652], 0
	mov	BYTE PTR op2i[rip+4653], 0
	mov	BYTE PTR op2i[rip+4654], -125
	mov	QWORD PTR op2i[rip+5016], 5262659
	mov	DWORD PTR op2i[rip+5024], 12
	mov	DWORD PTR op2i[rip+5028], 2
	mov	DWORD PTR op2i[rip+5032], 15
	mov	BYTE PTR op2i[rip+5036], 0
	mov	BYTE PTR op2i[rip+5037], 0
	mov	BYTE PTR op2i[rip+5038], -125
	mov	QWORD PTR op2i[rip+4728], 5262659
	mov	DWORD PTR op2i[rip+4736], 4
	mov	DWORD PTR op2i[rip+4740], 2
	mov	DWORD PTR op2i[rip+4744], 3
	mov	BYTE PTR op2i[rip+4748], 0
	mov	BYTE PTR op2i[rip+4749], 0
	mov	BYTE PTR op2i[rip+4750], -125
	mov	QWORD PTR op2i[rip+5112], 5262659
	mov	DWORD PTR op2i[rip+5120], 5
	mov	DWORD PTR op2i[rip+5124], 2
	mov	DWORD PTR op2i[rip+5128], 4
	mov	BYTE PTR op2i[rip+5132], 0
	mov	BYTE PTR op2i[rip+5133], 0
	mov	BYTE PTR op2i[rip+5134], -125
	mov	QWORD PTR op2i[rip+5664], 5787715
	mov	DWORD PTR op2i[rip+5672], 7
	mov	DWORD PTR op2i[rip+5676], 3
	mov	DWORD PTR op2i[rip+5680], 4
	mov	BYTE PTR op2i[rip+5684], 0
	mov	BYTE PTR op2i[rip+5685], 0
	mov	BYTE PTR op2i[rip+5686], -125
	mov	QWORD PTR op2i[rip+5376], 5787715
	mov	DWORD PTR op2i[rip+5384], 3
	mov	DWORD PTR op2i[rip+5388], 2
	mov	DWORD PTR op2i[rip+5392], 2
	mov	BYTE PTR op2i[rip+5396], 0
	mov	BYTE PTR op2i[rip+5397], 0
	mov	BYTE PTR op2i[rip+5398], -125
	mov	QWORD PTR op2i[rip+5472], 5787715
	mov	DWORD PTR op2i[rip+5480], 4
	mov	DWORD PTR op2i[rip+5484], 2
	mov	DWORD PTR op2i[rip+5488], 3
	mov	BYTE PTR op2i[rip+5492], 0
	mov	BYTE PTR op2i[rip+5493], 0
	mov	BYTE PTR op2i[rip+5494], -125
	mov	QWORD PTR op2i[rip+4896], 5853251
	mov	DWORD PTR op2i[rip+4904], 7
	mov	DWORD PTR op2i[rip+4908], 3
	mov	DWORD PTR op2i[rip+4912], 4
	mov	BYTE PTR op2i[rip+4916], 0
	mov	BYTE PTR op2i[rip+4917], 0
	mov	BYTE PTR op2i[rip+4918], -125
	mov	QWORD PTR op2i[rip+4608], 5853251
	mov	DWORD PTR op2i[rip+4616], 3
	mov	DWORD PTR op2i[rip+4620], 2
	mov	DWORD PTR op2i[rip+4624], 2
	mov	BYTE PTR op2i[rip+4628], 0
	mov	BYTE PTR op2i[rip+4629], 0
	mov	BYTE PTR op2i[rip+4630], -125
	mov	QWORD PTR op2i[rip+4704], 5853251
	mov	DWORD PTR op2i[rip+4712], 4
	mov	DWORD PTR op2i[rip+4716], 2
	mov	DWORD PTR op2i[rip+4720], 3
	mov	BYTE PTR op2i[rip+4724], 0
	mov	BYTE PTR op2i[rip+4725], 0
	mov	BYTE PTR op2i[rip+4726], -125
	mov	QWORD PTR op2i[rip+4944], 4408644
	mov	DWORD PTR op2i[rip+4952], 7
	mov	DWORD PTR op2i[rip+4956], 3
	mov	DWORD PTR op2i[rip+4960], 6
	mov	BYTE PTR op2i[rip+4964], 0
	mov	BYTE PTR op2i[rip+4965], 0
	mov	BYTE PTR op2i[rip+4966], -126
	mov	QWORD PTR op2i[rip+5328], 4408644
	mov	DWORD PTR op2i[rip+5336], 8
	mov	DWORD PTR op2i[rip+5340], 3
	mov	DWORD PTR op2i[rip+5344], 7
	mov	BYTE PTR op2i[rip+5348], 0
	mov	BYTE PTR op2i[rip+5349], 0
	mov	BYTE PTR op2i[rip+5350], -126
	mov	QWORD PTR op2i[rip+4752], 4408644
	mov	DWORD PTR op2i[rip+4760], 4
	mov	DWORD PTR op2i[rip+4764], 2
	mov	DWORD PTR op2i[rip+4768], 5
	mov	BYTE PTR op2i[rip+4772], 0
	mov	BYTE PTR op2i[rip+4773], 0
	mov	BYTE PTR op2i[rip+4774], -126
	mov	QWORD PTR op2i[rip+5136], 4408644
	mov	DWORD PTR op2i[rip+5144], 5
	mov	DWORD PTR op2i[rip+5148], 2
	mov	DWORD PTR op2i[rip+5152], 6
	mov	BYTE PTR op2i[rip+5156], 0
	mov	BYTE PTR op2i[rip+5157], 0
	mov	BYTE PTR op2i[rip+5158], -126
	mov	QWORD PTR op2i[rip+4848], 5784900
	mov	DWORD PTR op2i[rip+4856], 0
	mov	DWORD PTR op2i[rip+4860], 1
	mov	DWORD PTR op2i[rip+4864], 2
	mov	BYTE PTR op2i[rip+4868], 0
	mov	BYTE PTR op2i[rip+4869], 0
	mov	BYTE PTR op2i[rip+4870], -126
	mov	QWORD PTR op2i[rip+3264], 5850436
	mov	DWORD PTR op2i[rip+3272], 0
	mov	DWORD PTR op2i[rip+3276], 1
	mov	DWORD PTR op2i[rip+3280], 2
	mov	BYTE PTR op2i[rip+3284], 0
	mov	BYTE PTR op2i[rip+3285], 0
	mov	BYTE PTR op2i[rip+3286], -126
	mov	QWORD PTR op2i[rip+1848], 5394245
	mov	DWORD PTR op2i[rip+1856], 7
	mov	DWORD PTR op2i[rip+1860], 3
	mov	DWORD PTR op2i[rip+1864], 4
	mov	BYTE PTR op2i[rip+1868], 0
	mov	BYTE PTR op2i[rip+1869], 0
	mov	BYTE PTR op2i[rip+1870], -126
	mov	QWORD PTR op2i[rip+2232], 5394245
	mov	DWORD PTR op2i[rip+2240], 8
	mov	DWORD PTR op2i[rip+2244], 3
	mov	DWORD PTR op2i[rip+2248], 14
	mov	BYTE PTR op2i[rip+2252], 0
	mov	BYTE PTR op2i[rip+2253], 0
	mov	BYTE PTR op2i[rip+2254], -126
	mov	QWORD PTR op2i[rip+2136], 5394245
	mov	DWORD PTR op2i[rip+2144], 9
	mov	DWORD PTR op2i[rip+2148], 3
	mov	DWORD PTR op2i[rip+2152], 14
	mov	BYTE PTR op2i[rip+2156], 0
	mov	BYTE PTR op2i[rip+2157], 0
	mov	BYTE PTR op2i[rip+2158], -126
	mov	QWORD PTR op2i[rip+1752], 5394245
	mov	DWORD PTR op2i[rip+1760], 3
	mov	DWORD PTR op2i[rip+1764], 2
	mov	DWORD PTR op2i[rip+1768], 2
	mov	BYTE PTR op2i[rip+1772], 0
	mov	BYTE PTR op2i[rip+1773], 0
	mov	BYTE PTR op2i[rip+1774], -126
	mov	QWORD PTR op2i[rip+1560], 5394245
	mov	DWORD PTR op2i[rip+1568], 11
	mov	DWORD PTR op2i[rip+1572], 2
	mov	DWORD PTR op2i[rip+1576], 6
	mov	BYTE PTR op2i[rip+1580], 0
	mov	BYTE PTR op2i[rip+1581], 0
	mov	BYTE PTR op2i[rip+1582], -126
	mov	QWORD PTR op2i[rip+1944], 5394245
	mov	DWORD PTR op2i[rip+1952], 12
	mov	DWORD PTR op2i[rip+1956], 2
	mov	DWORD PTR op2i[rip+1960], 15
	mov	BYTE PTR op2i[rip+1964], 0
	mov	BYTE PTR op2i[rip+1965], 0
	mov	BYTE PTR op2i[rip+1966], -126
	mov	QWORD PTR op2i[rip+1656], 5394245
	mov	DWORD PTR op2i[rip+1664], 4
	mov	DWORD PTR op2i[rip+1668], 2
	mov	DWORD PTR op2i[rip+1672], 3
	mov	BYTE PTR op2i[rip+1676], 0
	mov	BYTE PTR op2i[rip+1677], 0
	mov	BYTE PTR op2i[rip+1678], -126
	mov	QWORD PTR op2i[rip+2040], 5394245
	mov	DWORD PTR op2i[rip+2048], 5
	mov	DWORD PTR op2i[rip+2052], 2
	mov	DWORD PTR op2i[rip+2056], 4
	mov	BYTE PTR op2i[rip+2060], 0
	mov	BYTE PTR op2i[rip+2061], 0
	mov	BYTE PTR op2i[rip+2062], -126
	mov	QWORD PTR op2i[rip+5712], 4410953
	mov	DWORD PTR op2i[rip+5720], 7
	mov	DWORD PTR op2i[rip+5724], 3
	mov	DWORD PTR op2i[rip+5728], 6
	mov	BYTE PTR op2i[rip+5732], 0
	mov	BYTE PTR op2i[rip+5733], 0
	mov	BYTE PTR op2i[rip+5734], -126
	mov	QWORD PTR op2i[rip+6096], 4410953
	mov	DWORD PTR op2i[rip+6104], 8
	mov	DWORD PTR op2i[rip+6108], 3
	mov	DWORD PTR op2i[rip+6112], 7
	mov	BYTE PTR op2i[rip+6116], 0
	mov	BYTE PTR op2i[rip+6117], 0
	mov	BYTE PTR op2i[rip+6118], -126
	mov	QWORD PTR op2i[rip+5520], 4410953
	mov	DWORD PTR op2i[rip+5528], 4
	mov	DWORD PTR op2i[rip+5532], 2
	mov	DWORD PTR op2i[rip+5536], 5
	mov	BYTE PTR op2i[rip+5540], 0
	mov	BYTE PTR op2i[rip+5541], 0
	mov	BYTE PTR op2i[rip+5542], -126
	mov	QWORD PTR op2i[rip+5904], 4410953
	mov	DWORD PTR op2i[rip+5912], 5
	mov	DWORD PTR op2i[rip+5916], 2
	mov	DWORD PTR op2i[rip+5920], 6
	mov	BYTE PTR op2i[rip+5924], 0
	mov	BYTE PTR op2i[rip+5925], 0
	mov	BYTE PTR op2i[rip+5926], -126
	mov	QWORD PTR op2i[rip+5568], 5787209
	mov	DWORD PTR op2i[rip+5576], 0
	mov	DWORD PTR op2i[rip+5580], 1
	mov	DWORD PTR op2i[rip+5584], 2
	mov	BYTE PTR op2i[rip+5588], 0
	mov	BYTE PTR op2i[rip+5589], 0
	mov	BYTE PTR op2i[rip+5590], -126
	mov	QWORD PTR op2i[rip+4800], 5852745
	mov	DWORD PTR op2i[rip+4808], 0
	mov	DWORD PTR op2i[rip+4812], 1
	mov	DWORD PTR op2i[rip+4816], 2
	mov	BYTE PTR op2i[rip+4820], 0
	mov	BYTE PTR op2i[rip+4821], 0
	mov	BYTE PTR op2i[rip+4822], -126
	mov	QWORD PTR op2i[rip+1824], 5262666
	mov	DWORD PTR op2i[rip+1832], 7
	mov	DWORD PTR op2i[rip+1836], 3
	mov	DWORD PTR op2i[rip+1840], 3
	mov	BYTE PTR op2i[rip+1844], 0
	mov	BYTE PTR op2i[rip+1845], 0
	mov	BYTE PTR op2i[rip+1846], 0
	mov	QWORD PTR op2i[rip+2592], 5262666
	mov	DWORD PTR op2i[rip+2600], 10
	mov	DWORD PTR op2i[rip+2604], 3
	mov	DWORD PTR op2i[rip+2608], 5
	mov	BYTE PTR op2i[rip+2612], 0
	mov	BYTE PTR op2i[rip+2613], 0
	mov	BYTE PTR op2i[rip+2614], 0
	mov	QWORD PTR op2i[rip+768], 5395274
	mov	DWORD PTR op2i[rip+776], 7
	mov	DWORD PTR op2i[rip+780], 3
	mov	DWORD PTR op2i[rip+784], 6
	mov	BYTE PTR op2i[rip+788], 0
	mov	BYTE PTR op2i[rip+789], 0
	mov	BYTE PTR op2i[rip+790], 0
	mov	QWORD PTR op2i[rip+4152], 4277324
	mov	DWORD PTR op2i[rip+4160], 7
	mov	DWORD PTR op2i[rip+4164], 3
	mov	DWORD PTR op2i[rip+4168], 4
	mov	BYTE PTR op2i[rip+4172], 0
	mov	BYTE PTR op2i[rip+4173], 0
	mov	BYTE PTR op2i[rip+4174], -126
	mov	QWORD PTR op2i[rip+4536], 4277324
	mov	DWORD PTR op2i[rip+4544], 8
	mov	DWORD PTR op2i[rip+4548], 3
	mov	DWORD PTR op2i[rip+4552], 14
	mov	BYTE PTR op2i[rip+4556], 0
	mov	BYTE PTR op2i[rip+4557], 0
	mov	BYTE PTR op2i[rip+4558], -126
	mov	QWORD PTR op2i[rip+4440], 4277324
	mov	DWORD PTR op2i[rip+4448], 9
	mov	DWORD PTR op2i[rip+4452], 3
	mov	DWORD PTR op2i[rip+4456], 14
	mov	BYTE PTR op2i[rip+4460], 0
	mov	BYTE PTR op2i[rip+4461], 0
	mov	BYTE PTR op2i[rip+4462], -126
	mov	QWORD PTR op2i[rip+4056], 4277324
	mov	DWORD PTR op2i[rip+4064], 3
	mov	DWORD PTR op2i[rip+4068], 2
	mov	DWORD PTR op2i[rip+4072], 2
	mov	BYTE PTR op2i[rip+4076], 0
	mov	BYTE PTR op2i[rip+4077], 0
	mov	BYTE PTR op2i[rip+4078], -126
	mov	QWORD PTR op2i[rip+3864], 4277324
	mov	DWORD PTR op2i[rip+3872], 11
	mov	DWORD PTR op2i[rip+3876], 2
	mov	DWORD PTR op2i[rip+3880], 6
	mov	BYTE PTR op2i[rip+3884], 0
	mov	BYTE PTR op2i[rip+3885], 0
	mov	BYTE PTR op2i[rip+3886], -126
	mov	QWORD PTR op2i[rip+4248], 4277324
	mov	DWORD PTR op2i[rip+4256], 12
	mov	DWORD PTR op2i[rip+4260], 2
	mov	DWORD PTR op2i[rip+4264], 15
	mov	BYTE PTR op2i[rip+4268], 0
	mov	BYTE PTR op2i[rip+4269], 0
	mov	BYTE PTR op2i[rip+4270], -126
	mov	QWORD PTR op2i[rip+3960], 4277324
	mov	DWORD PTR op2i[rip+3968], 4
	mov	DWORD PTR op2i[rip+3972], 2
	mov	DWORD PTR op2i[rip+3976], 3
	mov	BYTE PTR op2i[rip+3980], 0
	mov	BYTE PTR op2i[rip+3981], 0
	mov	BYTE PTR op2i[rip+3982], -126
	mov	QWORD PTR op2i[rip+4344], 4277324
	mov	DWORD PTR op2i[rip+4352], 5
	mov	DWORD PTR op2i[rip+4356], 2
	mov	DWORD PTR op2i[rip+4360], 4
	mov	BYTE PTR op2i[rip+4364], 0
	mov	BYTE PTR op2i[rip+4365], 0
	mov	BYTE PTR op2i[rip+4366], -126
	mov	QWORD PTR op2i[rip+4176], 5784652
	mov	DWORD PTR op2i[rip+4184], 7
	mov	DWORD PTR op2i[rip+4188], 3
	mov	DWORD PTR op2i[rip+4192], 4
	mov	BYTE PTR op2i[rip+4196], 0
	mov	BYTE PTR op2i[rip+4197], 0
	mov	BYTE PTR op2i[rip+4198], -126
	mov	QWORD PTR op2i[rip+4560], 5784652
	mov	DWORD PTR op2i[rip+4568], 9
	mov	DWORD PTR op2i[rip+4572], 3
	mov	DWORD PTR op2i[rip+4576], 14
	mov	BYTE PTR op2i[rip+4580], 0
	mov	BYTE PTR op2i[rip+4581], 0
	mov	BYTE PTR op2i[rip+4582], -126
	mov	QWORD PTR op2i[rip+3888], 5784652
	mov	DWORD PTR op2i[rip+3896], 3
	mov	DWORD PTR op2i[rip+3900], 2
	mov	DWORD PTR op2i[rip+3904], 2
	mov	BYTE PTR op2i[rip+3908], 0
	mov	BYTE PTR op2i[rip+3909], 0
	mov	BYTE PTR op2i[rip+3910], -126
	mov	QWORD PTR op2i[rip+3984], 5784652
	mov	DWORD PTR op2i[rip+3992], 4
	mov	DWORD PTR op2i[rip+3996], 2
	mov	DWORD PTR op2i[rip+4000], 3
	mov	BYTE PTR op2i[rip+4004], 0
	mov	BYTE PTR op2i[rip+4005], 0
	mov	BYTE PTR op2i[rip+4006], -126
	mov	QWORD PTR op2i[rip+4368], 5784652
	mov	DWORD PTR op2i[rip+4376], 6
	mov	DWORD PTR op2i[rip+4380], 2
	mov	DWORD PTR op2i[rip+4384], 4
	mov	BYTE PTR op2i[rip+4388], 0
	mov	BYTE PTR op2i[rip+4389], 0
	mov	BYTE PTR op2i[rip+4390], -126
	mov	QWORD PTR op2i[rip+4128], 5850188
	mov	DWORD PTR op2i[rip+4136], 7
	mov	DWORD PTR op2i[rip+4140], 3
	mov	DWORD PTR op2i[rip+4144], 4
	mov	BYTE PTR op2i[rip+4148], 0
	mov	BYTE PTR op2i[rip+4149], 0
	mov	BYTE PTR op2i[rip+4150], -126
	mov	QWORD PTR op2i[rip+4512], 5850188
	mov	DWORD PTR op2i[rip+4520], 8
	mov	DWORD PTR op2i[rip+4524], 3
	mov	DWORD PTR op2i[rip+4528], 14
	mov	BYTE PTR op2i[rip+4532], 0
	mov	BYTE PTR op2i[rip+4533], 0
	mov	BYTE PTR op2i[rip+4534], -126
	mov	QWORD PTR op2i[rip+3840], 5850188
	mov	DWORD PTR op2i[rip+3848], 3
	mov	DWORD PTR op2i[rip+3852], 2
	mov	DWORD PTR op2i[rip+3856], 2
	mov	BYTE PTR op2i[rip+3860], 0
	mov	BYTE PTR op2i[rip+3861], 0
	mov	BYTE PTR op2i[rip+3862], -126
	mov	QWORD PTR op2i[rip+3936], 5850188
	mov	DWORD PTR op2i[rip+3944], 4
	mov	DWORD PTR op2i[rip+3948], 2
	mov	DWORD PTR op2i[rip+3952], 3
	mov	BYTE PTR op2i[rip+3956], 0
	mov	BYTE PTR op2i[rip+3957], 0
	mov	BYTE PTR op2i[rip+3958], -126
	mov	QWORD PTR op2i[rip+4320], 5850188
	mov	DWORD PTR op2i[rip+4328], 5
	mov	DWORD PTR op2i[rip+4332], 2
	mov	DWORD PTR op2i[rip+4336], 4
	mov	BYTE PTR op2i[rip+4340], 0
	mov	BYTE PTR op2i[rip+4341], 0
	mov	BYTE PTR op2i[rip+4342], -126
	mov	QWORD PTR op2i[rip+1872], 5395276
	mov	DWORD PTR op2i[rip+1880], 7
	mov	DWORD PTR op2i[rip+1884], 3
	mov	DWORD PTR op2i[rip+1888], 6
	mov	BYTE PTR op2i[rip+1892], -128
	mov	BYTE PTR op2i[rip+1893], 0
	mov	BYTE PTR op2i[rip+1894], 3
	mov	QWORD PTR op2i[rip+2256], 5395276
	mov	DWORD PTR op2i[rip+2264], 8
	mov	DWORD PTR op2i[rip+2268], 3
	mov	DWORD PTR op2i[rip+2272], 7
	mov	BYTE PTR op2i[rip+2276], -128
	mov	BYTE PTR op2i[rip+2277], 0
	mov	BYTE PTR op2i[rip+2278], 3
	mov	QWORD PTR op2i[rip+1776], 5395276
	mov	DWORD PTR op2i[rip+1784], 2
	mov	DWORD PTR op2i[rip+1788], 1
	mov	DWORD PTR op2i[rip+1792], 2
	mov	BYTE PTR op2i[rip+1796], -128
	mov	BYTE PTR op2i[rip+1797], 0
	mov	BYTE PTR op2i[rip+1798], 3
	mov	QWORD PTR op2i[rip+1680], 5395276
	mov	DWORD PTR op2i[rip+1688], 4
	mov	DWORD PTR op2i[rip+1692], 2
	mov	DWORD PTR op2i[rip+1696], 5
	mov	BYTE PTR op2i[rip+1700], -128
	mov	BYTE PTR op2i[rip+1701], 0
	mov	BYTE PTR op2i[rip+1702], 3
	mov	QWORD PTR op2i[rip+2064], 5395276
	mov	DWORD PTR op2i[rip+2072], 5
	mov	DWORD PTR op2i[rip+2076], 2
	mov	DWORD PTR op2i[rip+2080], 6
	mov	BYTE PTR op2i[rip+2084], -128
	mov	BYTE PTR op2i[rip+2085], 0
	mov	BYTE PTR op2i[rip+2086], 3
	mov	QWORD PTR op2i[rip+5616], 5263182
	mov	DWORD PTR op2i[rip+5624], 0
	mov	DWORD PTR op2i[rip+5628], 1
	mov	DWORD PTR op2i[rip+5632], 2
	mov	BYTE PTR op2i[rip+5636], 0
	mov	BYTE PTR op2i[rip+5637], 0
	mov	BYTE PTR op2i[rip+5638], 0
	mov	QWORD PTR op2i[rip+312], 4280911
	mov	DWORD PTR op2i[rip+320], 7
	mov	DWORD PTR op2i[rip+324], 3
	mov	DWORD PTR op2i[rip+328], 4
	mov	BYTE PTR op2i[rip+332], 0
	mov	BYTE PTR op2i[rip+333], 0
	mov	BYTE PTR op2i[rip+334], -126
	mov	QWORD PTR op2i[rip+696], 4280911
	mov	DWORD PTR op2i[rip+704], 8
	mov	DWORD PTR op2i[rip+708], 3
	mov	DWORD PTR op2i[rip+712], 14
	mov	BYTE PTR op2i[rip+716], 0
	mov	BYTE PTR op2i[rip+717], 0
	mov	BYTE PTR op2i[rip+718], -126
	mov	QWORD PTR op2i[rip+600], 4280911
	mov	DWORD PTR op2i[rip+608], 9
	mov	DWORD PTR op2i[rip+612], 3
	mov	DWORD PTR op2i[rip+616], 14
	mov	BYTE PTR op2i[rip+620], 0
	mov	BYTE PTR op2i[rip+621], 0
	mov	BYTE PTR op2i[rip+622], -126
	mov	QWORD PTR op2i[rip+216], 4280911
	mov	DWORD PTR op2i[rip+224], 3
	mov	DWORD PTR op2i[rip+228], 2
	mov	DWORD PTR op2i[rip+232], 2
	mov	BYTE PTR op2i[rip+236], 0
	mov	BYTE PTR op2i[rip+237], 0
	mov	BYTE PTR op2i[rip+238], -126
	mov	QWORD PTR op2i[rip+24], 4280911
	mov	DWORD PTR op2i[rip+32], 11
	mov	DWORD PTR op2i[rip+36], 2
	mov	DWORD PTR op2i[rip+40], 6
	mov	BYTE PTR op2i[rip+44], 0
	mov	BYTE PTR op2i[rip+45], 0
	mov	BYTE PTR op2i[rip+46], -126
	mov	QWORD PTR op2i[rip+408], 4280911
	mov	DWORD PTR op2i[rip+416], 12
	mov	DWORD PTR op2i[rip+420], 2
	mov	DWORD PTR op2i[rip+424], 15
	mov	BYTE PTR op2i[rip+428], 0
	mov	BYTE PTR op2i[rip+429], 0
	mov	BYTE PTR op2i[rip+430], -126
	mov	QWORD PTR op2i[rip+120], 4280911
	mov	DWORD PTR op2i[rip+128], 4
	mov	DWORD PTR op2i[rip+132], 2
	mov	DWORD PTR op2i[rip+136], 3
	mov	BYTE PTR op2i[rip+140], 0
	mov	BYTE PTR op2i[rip+141], 0
	mov	BYTE PTR op2i[rip+142], -126
	mov	QWORD PTR op2i[rip+504], 4280911
	mov	DWORD PTR op2i[rip+512], 5
	mov	DWORD PTR op2i[rip+516], 2
	mov	DWORD PTR op2i[rip+520], 4
	mov	BYTE PTR op2i[rip+524], 0
	mov	BYTE PTR op2i[rip+525], 0
	mov	BYTE PTR op2i[rip+526], -126
	mov	QWORD PTR op2i[rip+1728], 4278352
	mov	DWORD PTR op2i[rip+1736], 0
	mov	DWORD PTR op2i[rip+1740], 1
	mov	DWORD PTR op2i[rip+1744], 3
	mov	BYTE PTR op2i[rip+1748], 0
	mov	BYTE PTR op2i[rip+1749], 0
	mov	BYTE PTR op2i[rip+1750], 0
	mov	QWORD PTR op2i[rip+192], 5261392
	mov	DWORD PTR op2i[rip+200], 0
	mov	DWORD PTR op2i[rip+204], 1
	mov	DWORD PTR op2i[rip+208], 3
	mov	BYTE PTR op2i[rip+212], 0
	mov	BYTE PTR op2i[rip+213], 0
	mov	BYTE PTR op2i[rip+214], 0
	mov	QWORD PTR op2i[rip+2496], 4279376
	mov	DWORD PTR op2i[rip+2504], 0
	mov	DWORD PTR op2i[rip+2508], 1
	mov	DWORD PTR op2i[rip+2512], 4
	mov	BYTE PTR op2i[rip+2516], 0
	mov	BYTE PTR op2i[rip+2517], 0
	mov	BYTE PTR op2i[rip+2518], -126
	mov	QWORD PTR op2i[rip+960], 5262416
	mov	DWORD PTR op2i[rip+968], 0
	mov	DWORD PTR op2i[rip+972], 1
	mov	DWORD PTR op2i[rip+976], 4
	mov	BYTE PTR op2i[rip+980], 0
	mov	BYTE PTR op2i[rip+981], 0
	mov	BYTE PTR op2i[rip+982], -1
	mov	QWORD PTR op2i[rip+1104], 5001042
	mov	DWORD PTR op2i[rip+1112], 7
	mov	DWORD PTR op2i[rip+1116], 3
	mov	DWORD PTR op2i[rip+1120], 6
	mov	BYTE PTR op2i[rip+1124], 0
	mov	BYTE PTR op2i[rip+1125], 0
	mov	BYTE PTR op2i[rip+1126], -125
	mov	QWORD PTR op2i[rip+1488], 5001042
	mov	DWORD PTR op2i[rip+1496], 8
	mov	DWORD PTR op2i[rip+1500], 3
	mov	DWORD PTR op2i[rip+1504], 7
	mov	BYTE PTR op2i[rip+1508], 0
	mov	BYTE PTR op2i[rip+1509], 0
	mov	BYTE PTR op2i[rip+1510], -125
	mov	QWORD PTR op2i[rip+1008], 5001042
	mov	DWORD PTR op2i[rip+1016], 2
	mov	DWORD PTR op2i[rip+1020], 1
	mov	DWORD PTR op2i[rip+1024], 2
	mov	BYTE PTR op2i[rip+1028], 0
	mov	BYTE PTR op2i[rip+1029], 0
	mov	BYTE PTR op2i[rip+1030], -125
	mov	QWORD PTR op2i[rip+912], 5001042
	mov	DWORD PTR op2i[rip+920], 4
	mov	DWORD PTR op2i[rip+924], 2
	mov	DWORD PTR op2i[rip+928], 5
	mov	BYTE PTR op2i[rip+932], 0
	mov	BYTE PTR op2i[rip+933], 0
	mov	BYTE PTR op2i[rip+934], -125
	mov	QWORD PTR op2i[rip+1296], 5001042
	mov	DWORD PTR op2i[rip+1304], 5
	mov	DWORD PTR op2i[rip+1308], 2
	mov	DWORD PTR op2i[rip+1312], 6
	mov	BYTE PTR op2i[rip+1316], 0
	mov	BYTE PTR op2i[rip+1317], 0
	mov	BYTE PTR op2i[rip+1318], -125
	mov	QWORD PTR op2i[rip+2640], 5394258
	mov	DWORD PTR op2i[rip+2648], 7
	mov	DWORD PTR op2i[rip+2652], 3
	mov	DWORD PTR op2i[rip+2656], 6
	mov	BYTE PTR op2i[rip+2660], 0
	mov	BYTE PTR op2i[rip+2661], 0
	mov	BYTE PTR op2i[rip+2662], -125
	mov	QWORD PTR op2i[rip+3024], 5394258
	mov	DWORD PTR op2i[rip+3032], 8
	mov	DWORD PTR op2i[rip+3036], 3
	mov	DWORD PTR op2i[rip+3040], 7
	mov	BYTE PTR op2i[rip+3044], 0
	mov	BYTE PTR op2i[rip+3045], 0
	mov	BYTE PTR op2i[rip+3046], -125
	mov	QWORD PTR op2i[rip+2544], 5394258
	mov	DWORD PTR op2i[rip+2552], 2
	mov	DWORD PTR op2i[rip+2556], 1
	mov	DWORD PTR op2i[rip+2560], 2
	mov	BYTE PTR op2i[rip+2564], 0
	mov	BYTE PTR op2i[rip+2565], 0
	mov	BYTE PTR op2i[rip+2566], -125
	mov	QWORD PTR op2i[rip+2448], 5394258
	mov	DWORD PTR op2i[rip+2456], 4
	mov	DWORD PTR op2i[rip+2460], 2
	mov	DWORD PTR op2i[rip+2464], 5
	mov	BYTE PTR op2i[rip+2468], 0
	mov	BYTE PTR op2i[rip+2469], 0
	mov	BYTE PTR op2i[rip+2470], -125
	mov	QWORD PTR op2i[rip+2832], 5394258
	mov	DWORD PTR op2i[rip+2840], 5
	mov	DWORD PTR op2i[rip+2844], 2
	mov	DWORD PTR op2i[rip+2848], 6
	mov	BYTE PTR op2i[rip+2852], 0
	mov	BYTE PTR op2i[rip+2853], 0
	mov	BYTE PTR op2i[rip+2854], -125
	mov	QWORD PTR op2i[rip+1536], 4805714
	mov	DWORD PTR op2i[rip+1544], 0
	mov	DWORD PTR op2i[rip+1548], 1
	mov	DWORD PTR op2i[rip+1552], 6
	mov	BYTE PTR op2i[rip+1556], 0
	mov	BYTE PTR op2i[rip+1557], 0
	mov	BYTE PTR op2i[rip+1558], -1
	mov	QWORD PTR op2i[rip+2304], 5461074
	mov	DWORD PTR op2i[rip+2312], 0
	mov	DWORD PTR op2i[rip+2316], 1
	mov	DWORD PTR op2i[rip+2320], 6
	mov	BYTE PTR op2i[rip+2324], 0
	mov	BYTE PTR op2i[rip+2325], 0
	mov	BYTE PTR op2i[rip+2326], 0
	mov	QWORD PTR op2i[rip+5688], 4407891
	mov	DWORD PTR op2i[rip+5696], 7
	mov	DWORD PTR op2i[rip+5700], 3
	mov	DWORD PTR op2i[rip+5704], 4
	mov	BYTE PTR op2i[rip+5708], 0
	mov	BYTE PTR op2i[rip+5709], 0
	mov	BYTE PTR op2i[rip+5710], -61
	mov	QWORD PTR op2i[rip+6072], 4407891
	mov	DWORD PTR op2i[rip+6080], 8
	mov	DWORD PTR op2i[rip+6084], 3
	mov	DWORD PTR op2i[rip+6088], 14
	mov	BYTE PTR op2i[rip+6092], 0
	mov	BYTE PTR op2i[rip+6093], 0
	mov	BYTE PTR op2i[rip+6094], -61
	mov	QWORD PTR op2i[rip+5976], 4407891
	mov	DWORD PTR op2i[rip+5984], 9
	mov	DWORD PTR op2i[rip+5988], 3
	mov	DWORD PTR op2i[rip+5992], 14
	mov	BYTE PTR op2i[rip+5996], 0
	mov	BYTE PTR op2i[rip+5997], 0
	mov	BYTE PTR op2i[rip+5998], -61
	mov	QWORD PTR op2i[rip+5592], 4407891
	mov	DWORD PTR op2i[rip+5600], 3
	mov	DWORD PTR op2i[rip+5604], 2
	mov	DWORD PTR op2i[rip+5608], 2
	mov	BYTE PTR op2i[rip+5612], 0
	mov	BYTE PTR op2i[rip+5613], 0
	mov	BYTE PTR op2i[rip+5614], -61
	mov	QWORD PTR op2i[rip+5400], 4407891
	mov	DWORD PTR op2i[rip+5408], 11
	mov	DWORD PTR op2i[rip+5412], 2
	mov	DWORD PTR op2i[rip+5416], 6
	mov	BYTE PTR op2i[rip+5420], 0
	mov	BYTE PTR op2i[rip+5421], 0
	mov	BYTE PTR op2i[rip+5422], -61
	mov	QWORD PTR op2i[rip+5784], 4407891
	mov	DWORD PTR op2i[rip+5792], 12
	mov	DWORD PTR op2i[rip+5796], 2
	mov	DWORD PTR op2i[rip+5800], 15
	mov	BYTE PTR op2i[rip+5804], 0
	mov	BYTE PTR op2i[rip+5805], 0
	mov	BYTE PTR op2i[rip+5806], -61
	mov	QWORD PTR op2i[rip+5496], 4407891
	mov	DWORD PTR op2i[rip+5504], 4
	mov	DWORD PTR op2i[rip+5508], 2
	mov	DWORD PTR op2i[rip+5512], 3
	mov	BYTE PTR op2i[rip+5516], 0
	mov	BYTE PTR op2i[rip+5517], 0
	mov	BYTE PTR op2i[rip+5518], -61
	mov	QWORD PTR op2i[rip+5880], 4407891
	mov	DWORD PTR op2i[rip+5888], 5
	mov	DWORD PTR op2i[rip+5892], 2
	mov	DWORD PTR op2i[rip+5896], 4
	mov	BYTE PTR op2i[rip+5900], 0
	mov	BYTE PTR op2i[rip+5901], 0
	mov	BYTE PTR op2i[rip+5902], -61
	mov	QWORD PTR op2i[rip+1344], 4408659
	mov	DWORD PTR op2i[rip+1352], 0
	mov	DWORD PTR op2i[rip+1356], 1
	mov	DWORD PTR op2i[rip+1360], 2
	mov	BYTE PTR op2i[rip+1364], 0
	mov	BYTE PTR op2i[rip+1365], 1
	mov	BYTE PTR op2i[rip+1366], 0
	mov	QWORD PTR op2i[rip+5952], 4474195
	mov	DWORD PTR op2i[rip+5960], 0
	mov	DWORD PTR op2i[rip+5964], 1
	mov	DWORD PTR op2i[rip+5968], 2
	mov	BYTE PTR op2i[rip+5972], 0
	mov	BYTE PTR op2i[rip+5973], 8
	mov	BYTE PTR op2i[rip+5974], 0
	mov	QWORD PTR op2i[rip+2880], 4801875
	mov	DWORD PTR op2i[rip+2888], 0
	mov	DWORD PTR op2i[rip+2892], 1
	mov	DWORD PTR op2i[rip+2896], 2
	mov	BYTE PTR op2i[rip+2900], 0
	mov	BYTE PTR op2i[rip+2901], 4
	mov	BYTE PTR op2i[rip+2902], 0
	mov	QWORD PTR op2i[rip+3384], 4281427
	mov	DWORD PTR op2i[rip+3392], 7
	mov	DWORD PTR op2i[rip+3396], 3
	mov	DWORD PTR op2i[rip+3400], 4
	mov	BYTE PTR op2i[rip+3404], 0
	mov	BYTE PTR op2i[rip+3405], 0
	mov	BYTE PTR op2i[rip+3406], 0
	mov	QWORD PTR op2i[rip+3768], 4281427
	mov	DWORD PTR op2i[rip+3776], 8
	mov	DWORD PTR op2i[rip+3780], 3
	mov	DWORD PTR op2i[rip+3784], 5
	mov	BYTE PTR op2i[rip+3788], 0
	mov	BYTE PTR op2i[rip+3789], 0
	mov	BYTE PTR op2i[rip+3790], 0
	mov	QWORD PTR op2i[rip+3672], 4281427
	mov	DWORD PTR op2i[rip+3680], 9
	mov	DWORD PTR op2i[rip+3684], 3
	mov	DWORD PTR op2i[rip+3688], 5
	mov	BYTE PTR op2i[rip+3692], 0
	mov	BYTE PTR op2i[rip+3693], 0
	mov	BYTE PTR op2i[rip+3694], 0
	mov	QWORD PTR op2i[rip+3096], 4281427
	mov	DWORD PTR op2i[rip+3104], 11
	mov	DWORD PTR op2i[rip+3108], 2
	mov	DWORD PTR op2i[rip+3112], 6
	mov	BYTE PTR op2i[rip+3116], 0
	mov	BYTE PTR op2i[rip+3117], 0
	mov	BYTE PTR op2i[rip+3118], 0
	mov	QWORD PTR op2i[rip+3480], 4281427
	mov	DWORD PTR op2i[rip+3488], 12
	mov	DWORD PTR op2i[rip+3492], 2
	mov	DWORD PTR op2i[rip+3496], 6
	mov	BYTE PTR op2i[rip+3500], 0
	mov	BYTE PTR op2i[rip+3501], 0
	mov	BYTE PTR op2i[rip+3502], 0
	mov	QWORD PTR op2i[rip+3192], 4281427
	mov	DWORD PTR op2i[rip+3200], 4
	mov	DWORD PTR op2i[rip+3204], 2
	mov	DWORD PTR op2i[rip+3208], 3
	mov	BYTE PTR op2i[rip+3212], 0
	mov	BYTE PTR op2i[rip+3213], 0
	mov	BYTE PTR op2i[rip+3214], 0
	mov	QWORD PTR op2i[rip+3576], 4281427
	mov	DWORD PTR op2i[rip+3584], 5
	mov	DWORD PTR op2i[rip+3588], 2
	mov	DWORD PTR op2i[rip+3592], 4
	mov	BYTE PTR op2i[rip+3596], 0
	mov	BYTE PTR op2i[rip+3597], 0
	mov	BYTE PTR op2i[rip+3598], 0
	mov	QWORD PTR op2i[rip+3408], 5788755
	mov	DWORD PTR op2i[rip+3416], 7
	mov	DWORD PTR op2i[rip+3420], 3
	mov	DWORD PTR op2i[rip+3424], 4
	mov	BYTE PTR op2i[rip+3428], 0
	mov	BYTE PTR op2i[rip+3429], 0
	mov	BYTE PTR op2i[rip+3430], 0
	mov	QWORD PTR op2i[rip+3216], 5788755
	mov	DWORD PTR op2i[rip+3224], 4
	mov	DWORD PTR op2i[rip+3228], 2
	mov	DWORD PTR op2i[rip+3232], 3
	mov	BYTE PTR op2i[rip+3236], 0
	mov	BYTE PTR op2i[rip+3237], 0
	mov	BYTE PTR op2i[rip+3238], 0
	mov	QWORD PTR op2i[rip+3600], 5788755
	mov	DWORD PTR op2i[rip+3608], 6
	mov	DWORD PTR op2i[rip+3612], 2
	mov	DWORD PTR op2i[rip+3616], 4
	mov	BYTE PTR op2i[rip+3620], 0
	mov	BYTE PTR op2i[rip+3621], 0
	mov	BYTE PTR op2i[rip+3622], 0
	mov	QWORD PTR op2i[rip+3360], 5854291
	mov	DWORD PTR op2i[rip+3368], 7
	mov	DWORD PTR op2i[rip+3372], 3
	mov	DWORD PTR op2i[rip+3376], 4
	mov	BYTE PTR op2i[rip+3380], 0
	mov	BYTE PTR op2i[rip+3381], 0
	mov	BYTE PTR op2i[rip+3382], 0
	mov	QWORD PTR op2i[rip+3168], 5854291
	mov	DWORD PTR op2i[rip+3176], 4
	mov	DWORD PTR op2i[rip+3180], 2
	mov	DWORD PTR op2i[rip+3184], 3
	mov	BYTE PTR op2i[rip+3188], 0
	mov	BYTE PTR op2i[rip+3189], 0
	mov	BYTE PTR op2i[rip+3190], 0
	mov	QWORD PTR op2i[rip+3552], 5854291
	mov	DWORD PTR op2i[rip+3560], 5
	mov	DWORD PTR op2i[rip+3564], 2
	mov	DWORD PTR op2i[rip+3568], 4
	mov	BYTE PTR op2i[rip+3572], 0
	mov	BYTE PTR op2i[rip+3573], 0
	mov	BYTE PTR op2i[rip+3574], 0
	mov	QWORD PTR op2i[rip+4080], 5783892
	mov	DWORD PTR op2i[rip+4088], 0
	mov	DWORD PTR op2i[rip+4092], 1
	mov	DWORD PTR op2i[rip+4096], 2
	mov	BYTE PTR op2i[rip+4100], 0
	mov	BYTE PTR op2i[rip+4101], 0
	mov	BYTE PTR op2i[rip+4102], -126
	mov	QWORD PTR op2i[rip+4032], 5849428
	mov	DWORD PTR op2i[rip+4040], 0
	mov	DWORD PTR op2i[rip+4044], 1
	mov	DWORD PTR op2i[rip+4048], 2
	mov	BYTE PTR op2i[rip+4052], 0
	mov	BYTE PTR op2i[rip+4053], 0
	mov	BYTE PTR op2i[rip+4054], -126
	mov	QWORD PTR op2i[rip+4464], 5788500
	mov	DWORD PTR op2i[rip+4472], 0
	mov	DWORD PTR op2i[rip+4476], 1
	mov	DWORD PTR op2i[rip+4480], 2
	mov	BYTE PTR op2i[rip+4484], 0
	mov	BYTE PTR op2i[rip+4485], 0
	mov	BYTE PTR op2i[rip+4486], -126
	mov	QWORD PTR op2i[rip+3312], 4282452
	mov	DWORD PTR op2i[rip+3320], 0
	mov	DWORD PTR op2i[rip+3324], 1
	mov	DWORD PTR op2i[rip+3328], 2
	mov	BYTE PTR op2i[rip+3332], 0
	mov	BYTE PTR op2i[rip+3333], 0
	mov	BYTE PTR op2i[rip+3334], -126
	mov	QWORD PTR op2i[rip+3696], 5462100
	mov	DWORD PTR op2i[rip+3704], 0
	mov	DWORD PTR op2i[rip+3708], 1
	mov	DWORD PTR op2i[rip+3712], 2
	mov	BYTE PTR op2i[rip+3716], 0
	mov	BYTE PTR op2i[rip+3717], 0
	mov	BYTE PTR op2i[rip+3718], 0
	mov	QWORD PTR op2i[rip+3648], 4282708
	mov	DWORD PTR op2i[rip+3656], 0
	mov	DWORD PTR op2i[rip+3660], 1
	mov	DWORD PTR op2i[rip+3664], 2
	mov	BYTE PTR op2i[rip+3668], 0
	mov	BYTE PTR op2i[rip+3669], 0
	mov	BYTE PTR op2i[rip+3670], -126
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L2
	call	__stack_chk_fail@PLT
.L2:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	setup, .-setup
	.section	.rodata
.LC0:
	.string	""
.LC1:
	.string	"lbl"
.LC2:
	.string	"A"
.LC3:
	.string	"#$%02X"
.LC4:
	.string	"$%02X"
.LC5:
	.string	"$%02X, X"
.LC6:
	.string	"$%02X, Y"
.LC7:
	.string	"$%04X"
.LC8:
	.string	"$%04X, X"
.LC9:
	.string	"$%04X, Y"
.LC10:
	.string	"($%04X)"
.LC11:
	.string	"($%02X, X)"
.LC12:
	.string	"($%02X), Y"
.LC13:
	.string	"???"
	.text
	.globl	decode
	.type	decode, @function
decode:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	QWORD PTR -32[rbp], rsi
	mov	rax, QWORD PTR -24[rbp]
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 3
	lea	rdx, op2i[rip]
	add	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -32[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	strcpy@PLT
	mov	rax, QWORD PTR -32[rbp]
	mov	BYTE PTR 8[rax], 0
	mov	rax, QWORD PTR -8[rbp]
	mov	edx, DWORD PTR 8[rax]
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR 24[rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR 24[rax]
	cmp	eax, 12
	ja	.L4
	mov	eax, eax
	lea	rdx, 0[0+rax*4]
	lea	rax, .L6[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cdqe
	lea	rdx, .L6[rip]
	add	rax, rdx
	notrack jmp	rax
	.section	.rodata
	.align 4
	.align 4
.L6:
	.long	.L18-.L6
	.long	.L17-.L6
	.long	.L16-.L6
	.long	.L15-.L6
	.long	.L14-.L6
	.long	.L13-.L6
	.long	.L12-.L6
	.long	.L11-.L6
	.long	.L10-.L6
	.long	.L9-.L6
	.long	.L8-.L6
	.long	.L7-.L6
	.long	.L5-.L6
	.text
.L18:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 8
	lea	rsi, .LC0[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	jmp	.L19
.L17:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 8
	lea	rsi, .LC1[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	jmp	.L19
.L16:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 8
	lea	rsi, .LC2[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	jmp	.L19
.L15:
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 1
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	mov	rdx, QWORD PTR -32[rbp]
	lea	rcx, 8[rdx]
	mov	edx, eax
	lea	rsi, .LC3[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	jmp	.L19
.L14:
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 1
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	mov	rdx, QWORD PTR -32[rbp]
	lea	rcx, 8[rdx]
	mov	edx, eax
	lea	rsi, .LC4[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	jmp	.L19
.L13:
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 1
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	mov	rdx, QWORD PTR -32[rbp]
	lea	rcx, 8[rdx]
	mov	edx, eax
	lea	rsi, .LC5[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	jmp	.L19
.L12:
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 1
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	mov	rdx, QWORD PTR -32[rbp]
	lea	rcx, 8[rdx]
	mov	edx, eax
	lea	rsi, .LC6[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	jmp	.L19
.L11:
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 1
	movzx	eax, BYTE PTR [rax]
	movzx	edx, al
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 2
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	eax, 8
	or	edx, eax
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 8
	lea	rsi, .LC7[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	jmp	.L19
.L10:
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 1
	movzx	eax, BYTE PTR [rax]
	movzx	edx, al
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 2
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	eax, 8
	or	edx, eax
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 8
	lea	rsi, .LC8[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	jmp	.L19
.L9:
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 1
	movzx	eax, BYTE PTR [rax]
	movzx	edx, al
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 2
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	eax, 8
	or	edx, eax
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 8
	lea	rsi, .LC9[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	jmp	.L19
.L8:
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 1
	movzx	eax, BYTE PTR [rax]
	movzx	edx, al
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 2
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	eax, 8
	or	edx, eax
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 8
	lea	rsi, .LC10[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	jmp	.L19
.L7:
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 1
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	mov	rdx, QWORD PTR -32[rbp]
	lea	rcx, 8[rdx]
	mov	edx, eax
	lea	rsi, .LC11[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	jmp	.L19
.L5:
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 1
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	mov	rdx, QWORD PTR -32[rbp]
	lea	rcx, 8[rdx]
	mov	edx, eax
	lea	rsi, .LC12[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	jmp	.L19
.L4:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 8
	lea	rsi, .LC13[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	nop
.L19:
	mov	rax, QWORD PTR -8[rbp]
	mov	edx, DWORD PTR 12[rax]
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR 28[rax], edx
	mov	rax, QWORD PTR -8[rbp]
	mov	edx, DWORD PTR 16[rax]
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR 32[rax], edx
	mov	rax, QWORD PTR -8[rbp]
	movzx	edx, BYTE PTR 20[rax]
	mov	rax, QWORD PTR -32[rbp]
	mov	BYTE PTR 36[rax], dl
	mov	rax, QWORD PTR -8[rbp]
	movzx	edx, BYTE PTR 21[rax]
	mov	rax, QWORD PTR -32[rbp]
	mov	BYTE PTR 37[rax], dl
	mov	rax, QWORD PTR -8[rbp]
	movzx	edx, BYTE PTR 22[rax]
	mov	rax, QWORD PTR -32[rbp]
	mov	BYTE PTR 38[rax], dl
	mov	rax, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR 28[rax]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	decode, .-decode
	.section	.rodata
	.align 8
.LC14:
	.string	"    <table summary=\"\" border=\"1\" cellpadding=\"0\" width=\"100%\">\n"
.LC15:
	.string	"      <tr align=\"center\">"
	.align 8
.LC16:
	.string	"        <th width=\"5%\">&nbsp;</th>\n"
	.align 8
.LC17:
	.string	"        <th width=\"5%\"><big><big>&#8209;</big></big>0</th>\n"
	.align 8
.LC18:
	.string	"        <th width=\"5%\"><big><big>&#8209;</big></big>1</th>\n"
	.align 8
.LC19:
	.string	"        <th width=\"5%\"><big><big>&#8209;</big></big>2</th>\n"
	.align 8
.LC20:
	.string	"        <th width=\"5%\"><big><big>&#8209;</big></big>3</th>\n"
	.align 8
.LC21:
	.string	"        <th width=\"5%\"><big><big>&#8209;</big></big>4</th>\n"
	.align 8
.LC22:
	.string	"        <th width=\"5%\"><big><big>&#8209;</big></big>5</th>\n"
	.align 8
.LC23:
	.string	"        <th width=\"5%\"><big><big>&#8209;</big></big>6</th>\n"
	.align 8
.LC24:
	.string	"        <th width=\"5%\"><big><big>&#8209;</big></big>7</th>\n"
	.align 8
.LC25:
	.string	"        <th width=\"5%\"><big><big>&#8209;</big></big>8</th>\n"
	.align 8
.LC26:
	.string	"        <th width=\"5%\"><big><big>&#8209;</big></big>9</th>\n"
	.align 8
.LC27:
	.string	"        <th width=\"5%\"><big><big>&#8209;</big></big>A</th>\n"
	.align 8
.LC28:
	.string	"        <th width=\"5%\"><big><big>&#8209;</big></big>B</th>\n"
	.align 8
.LC29:
	.string	"        <th width=\"5%\"><big><big>&#8209;</big></big>C</th>\n"
	.align 8
.LC30:
	.string	"        <th width=\"5%\"><big><big>&#8209;</big></big>D</th>\n"
	.align 8
.LC31:
	.string	"        <th width=\"5%\"><big><big>&#8209;</big></big>E</th>\n"
	.align 8
.LC32:
	.string	"        <th width=\"5%\"><big><big>&#8209;</big></big>F</th>\n"
.LC33:
	.string	"      </tr>"
.LC34:
	.string	"      <tr>"
	.align 8
.LC35:
	.string	"        <th align=\"center\">&nbsp;%X<big><big>&#8209;</big></big>&nbsp;</th>\n"
	.align 8
.LC36:
	.string	"        <td><table summary=\"\" align=\"center\" border=\"0\">"
	.align 8
.LC37:
	.string	"          <tr><td align=\"left\"><small><b>           %d       </b></small></td>\n"
.LC38:
	.string	"  + ++"
	.align 8
.LC39:
	.string	"              <td align=\"right\"><small><b>          %d%.2s    </b></small></td></tr>\n"
	.align 8
.LC40:
	.string	"          <tr><th colspan=\"2\">       <a href=\"#%s\">%s     </a></th></tr>\n"
	.align 8
.LC41:
	.string	"          <tr><td align=\"center\" colspan=\"2\"><small>%s</small></td></tr>\n"
	.align 8
.LC42:
	.string	"          <tr><td align=\"center\" colspan=\"2\"><small>"
.LC43:
	.string	"&#8209;"
.LC46:
	.string	"        </table></td>"
.LC47:
	.string	"        <td>&nbsp;</td>"
	.align 8
.LC48:
	.string	"        <th width=\"7%\">&nbsp;</th>\n"
	.align 8
.LC49:
	.string	"        <th width=\"7%\"><big><big>&#8209;</big></big>0</th>\n"
	.align 8
.LC50:
	.string	"        <th width=\"7%\"><big><big>&#8209;</big></big>1</th>\n"
	.align 8
.LC51:
	.string	"        <th width=\"7%\"><big><big>&#8209;</big></big>2</th>\n"
	.align 8
.LC52:
	.string	"        <th width=\"7%\"><big><big>&#8209;</big></big>3</th>\n"
	.align 8
.LC53:
	.string	"        <th width=\"7%\"><big><big>&#8209;</big></big>4</th>\n"
	.align 8
.LC54:
	.string	"        <th width=\"7%\"><big><big>&#8209;</big></big>5</th>\n"
	.align 8
.LC55:
	.string	"        <th width=\"7%\"><big><big>&#8209;</big></big>6</th>\n"
	.align 8
.LC56:
	.string	"        <th width=\"7%\"><big><big>&#8209;</big></big>7</th>\n"
	.align 8
.LC57:
	.string	"        <th width=\"7%\"><big><big>&#8209;</big></big>8</th>\n"
	.align 8
.LC58:
	.string	"        <th width=\"7%\"><big><big>&#8209;</big></big>9</th>\n"
	.align 8
.LC59:
	.string	"        <th width=\"7%\"><big><big>&#8209;</big></big>A</th>\n"
	.align 8
.LC60:
	.string	"        <th width=\"7%\"><big><big>&#8209;</big></big>B</th>\n"
	.align 8
.LC61:
	.string	"        <th width=\"7%\"><big><big>&#8209;</big></big>C</th>\n"
	.align 8
.LC62:
	.string	"        <th width=\"7%\"><big><big>&#8209;</big></big>D</th>\n"
	.align 8
.LC63:
	.string	"        <th width=\"7%\"><big><big>&#8209;</big></big>E</th>\n"
	.align 8
.LC64:
	.string	"        <th width=\"7%\"><big><big>&#8209;</big></big>F</th>\n"
.LC65:
	.string	"    </table>"
	.align 8
.LC66:
	.string	"    <table summary=\"\" border=\"0\" cellpadding=\"0\" width=\"100%\">\n"
	.align 8
.LC67:
	.string	"      <tr><td align=\"right\">autogenerated from "
	.align 8
.LC68:
	.string	"        <a href=\"https://www.masswerk.at/6502/6502_instruction_set.html\" target=\"extern6502\">6502 Instruction Set</a>"
	.align 8
.LC69:
	.string	"        by <a href=\"https://masswerk.at/\" target=\"extern6502\">mass:werk</a>"
.LC70:
	.string	"      </td></tr>"
.LC44:
	.string	"CZIDB-VN"
.LC45:
	.string	"czidb-vn"
	.text
	.globl	main
	.type	main, @function
main:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 112
	mov	DWORD PTR -84[rbp], edi
	mov	QWORD PTR -96[rbp], rsi
	mov	QWORD PTR -104[rbp], rdx
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	call	setup
	lea	rdi, .LC14[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC15[rip]
	call	puts@PLT
	lea	rdi, .LC16[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC17[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC18[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC19[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC20[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC21[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC22[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC23[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC24[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC25[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC26[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC27[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC28[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC29[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC30[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC31[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC32[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC16[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC33[rip]
	call	puts@PLT
	mov	DWORD PTR -72[rbp], 0
	jmp	.L22
.L32:
	mov	edi, 10
	call	putchar@PLT
	lea	rdi, .LC34[rip]
	call	puts@PLT
	mov	eax, DWORD PTR -72[rbp]
	sar	eax, 4
	mov	esi, eax
	lea	rdi, .LC35[rip]
	mov	eax, 0
	call	printf@PLT
.L31:
	mov	eax, DWORD PTR -72[rbp]
	mov	BYTE PTR -11[rbp], al
	mov	BYTE PTR -10[rbp], -91
	mov	BYTE PTR -9[rbp], -74
	lea	rdx, -64[rbp]
	lea	rax, -11[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	decode
	test	eax, eax
	je	.L23
	lea	rdi, .LC36[rip]
	call	puts@PLT
	mov	eax, DWORD PTR -36[rbp]
	mov	esi, eax
	lea	rdi, .LC37[rip]
	mov	eax, 0
	call	printf@PLT
	mov	eax, DWORD PTR -32[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, 1717986919
	shr	rdx, 32
	sar	edx, 2
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	add	eax, eax
	cdqe
	lea	rdx, .LC38[rip]
	lea	rsi, [rax+rdx]
	mov	edx, DWORD PTR -32[rbp]
	movsx	rax, edx
	imul	rax, rax, 1717986919
	shr	rax, 32
	sar	eax, 2
	mov	edi, edx
	sar	edi, 31
	sub	eax, edi
	mov	ecx, eax
	mov	eax, ecx
	sal	eax, 2
	add	eax, ecx
	add	eax, eax
	mov	ecx, edx
	sub	ecx, eax
	mov	rdx, rsi
	mov	esi, ecx
	lea	rdi, .LC39[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdx, -64[rbp]
	lea	rax, -64[rbp]
	mov	rsi, rax
	lea	rdi, .LC40[rip]
	mov	eax, 0
	call	printf@PLT
	mov	eax, DWORD PTR -40[rbp]
	mov	eax, eax
	sal	rax, 4
	mov	rdx, rax
	lea	rax, amode[rip]
	add	rax, rdx
	mov	rsi, rax
	lea	rdi, .LC41[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC42[rip]
	mov	eax, 0
	call	printf@PLT
	mov	edi, 91
	call	putchar@PLT
	mov	DWORD PTR -68[rbp], 7
	jmp	.L24
.L29:
	cmp	DWORD PTR -68[rbp], 5
	jne	.L25
	lea	rdi, .LC43[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L26
.L25:
	movzx	edx, BYTE PTR -28[rbp]
	movzx	eax, BYTE PTR -27[rbp]
	or	edx, eax
	movzx	eax, BYTE PTR -26[rbp]
	or	eax, edx
	movzx	edx, al
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	sar	edx, cl
	mov	eax, edx
	and	eax, 1
	test	eax, eax
	je	.L27
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	lea	rdx, .LC44[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movsx	eax, al
	jmp	.L28
.L27:
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	lea	rdx, .LC45[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movsx	eax, al
.L28:
	mov	edi, eax
	call	putchar@PLT
.L26:
	sub	DWORD PTR -68[rbp], 1
.L24:
	cmp	DWORD PTR -68[rbp], 0
	jg	.L29
	mov	edi, 93
	call	putchar@PLT
	lea	rdi, .LC46[rip]
	call	puts@PLT
	jmp	.L30
.L23:
	lea	rdi, .LC47[rip]
	call	puts@PLT
.L30:
	add	DWORD PTR -72[rbp], 1
	mov	eax, DWORD PTR -72[rbp]
	and	eax, 15
	test	eax, eax
	jne	.L31
	mov	eax, DWORD PTR -72[rbp]
	sar	eax, 4
	sub	eax, 1
	mov	esi, eax
	lea	rdi, .LC35[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC33[rip]
	call	puts@PLT
.L22:
	cmp	DWORD PTR -72[rbp], 255
	jle	.L32
	lea	rdi, .LC15[rip]
	call	puts@PLT
	lea	rdi, .LC48[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC49[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC50[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC51[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC52[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC53[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC54[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC55[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC56[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC57[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC58[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC59[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC60[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC61[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC62[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC63[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC64[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC48[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC33[rip]
	call	puts@PLT
	lea	rdi, .LC65[rip]
	call	puts@PLT
	mov	edi, 10
	call	putchar@PLT
	lea	rdi, .LC66[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC67[rip]
	call	puts@PLT
	lea	rdi, .LC68[rip]
	call	puts@PLT
	lea	rdi, .LC69[rip]
	call	puts@PLT
	lea	rdi, .LC70[rip]
	call	puts@PLT
	lea	rdi, .LC65[rip]
	call	puts@PLT
	mov	eax, 0
	mov	rsi, QWORD PTR -8[rbp]
	sub	rsi, QWORD PTR fs:40
	je	.L34
	call	__stack_chk_fail@PLT
.L34:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	main, .-main
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"408365.c"
	.text
	.global	amode
	.data
	.align	2
	.type	amode, %object
	.size	amode, 208
amode:
	.ascii	"Implied\000"
	.space	8
	.ascii	"Relative\000"
	.space	7
	.ascii	"Accum\000"
	.space	10
	.ascii	"Immediate\000"
	.space	6
	.ascii	"ZeroPage\000"
	.space	7
	.ascii	"ZeroPage,X\000"
	.space	5
	.ascii	"ZeroPage,Y\000"
	.space	5
	.ascii	"Abs\000"
	.space	12
	.ascii	"Abs,X\000"
	.space	10
	.ascii	"Abs.Y\000"
	.space	10
	.ascii	"(Ind)\000"
	.space	10
	.ascii	"(Ind,X)\000"
	.space	8
	.ascii	"(Ind),Y\000"
	.space	8
	.comm	op2i,6144,4
	.section	.rodata
	.align	2
.LC0:
	.ascii	"ADC\000"
	.space	4
	.word	7
	.word	3
	.word	4
	.byte	0
	.byte	0
	.byte	-61
	.space	1
	.align	2
.LC1:
	.ascii	"ADC\000"
	.space	4
	.word	8
	.word	3
	.word	14
	.byte	0
	.byte	0
	.byte	-61
	.space	1
	.align	2
.LC2:
	.ascii	"ADC\000"
	.space	4
	.word	9
	.word	3
	.word	14
	.byte	0
	.byte	0
	.byte	-61
	.space	1
	.align	2
.LC3:
	.ascii	"ADC\000"
	.space	4
	.word	3
	.word	2
	.word	2
	.byte	0
	.byte	0
	.byte	-61
	.space	1
	.align	2
.LC4:
	.ascii	"ADC\000"
	.space	4
	.word	11
	.word	2
	.word	6
	.byte	0
	.byte	0
	.byte	-61
	.space	1
	.align	2
.LC5:
	.ascii	"ADC\000"
	.space	4
	.word	12
	.word	2
	.word	15
	.byte	0
	.byte	0
	.byte	-61
	.space	1
	.align	2
.LC6:
	.ascii	"ADC\000"
	.space	4
	.word	4
	.word	2
	.word	3
	.byte	0
	.byte	0
	.byte	-61
	.space	1
	.align	2
.LC7:
	.ascii	"ADC\000"
	.space	4
	.word	5
	.word	2
	.word	4
	.byte	0
	.byte	0
	.byte	-61
	.space	1
	.align	2
.LC8:
	.ascii	"AND\000"
	.space	4
	.word	7
	.word	3
	.word	4
	.byte	0
	.byte	0
	.byte	-126
	.space	1
	.align	2
.LC9:
	.ascii	"AND\000"
	.space	4
	.word	8
	.word	3
	.word	14
	.byte	0
	.byte	0
	.byte	-126
	.space	1
	.align	2
.LC10:
	.ascii	"AND\000"
	.space	4
	.word	9
	.word	3
	.word	14
	.byte	0
	.byte	0
	.byte	-126
	.space	1
	.align	2
.LC11:
	.ascii	"AND\000"
	.space	4
	.word	3
	.word	2
	.word	2
	.byte	0
	.byte	0
	.byte	-126
	.space	1
	.align	2
.LC12:
	.ascii	"AND\000"
	.space	4
	.word	11
	.word	2
	.word	6
	.byte	0
	.byte	0
	.byte	-126
	.space	1
	.align	2
.LC13:
	.ascii	"AND\000"
	.space	4
	.word	12
	.word	2
	.word	15
	.byte	0
	.byte	0
	.byte	-126
	.space	1
	.align	2
.LC14:
	.ascii	"AND\000"
	.space	4
	.word	4
	.word	2
	.word	3
	.byte	0
	.byte	0
	.byte	-126
	.space	1
	.align	2
.LC15:
	.ascii	"AND\000"
	.space	4
	.word	5
	.word	2
	.word	4
	.byte	0
	.byte	0
	.byte	-126
	.space	1
	.align	2
.LC16:
	.ascii	"ASL\000"
	.space	4
	.word	7
	.word	3
	.word	6
	.byte	0
	.byte	0
	.byte	-125
	.space	1
	.align	2
.LC17:
	.ascii	"ASL\000"
	.space	4
	.word	8
	.word	3
	.word	7
	.byte	0
	.byte	0
	.byte	-125
	.space	1
	.align	2
.LC18:
	.ascii	"ASL\000"
	.space	4
	.word	2
	.word	1
	.word	2
	.byte	0
	.byte	0
	.byte	-125
	.space	1
	.align	2
.LC19:
	.ascii	"ASL\000"
	.space	4
	.word	4
	.word	2
	.word	5
	.byte	0
	.byte	0
	.byte	-125
	.space	1
	.align	2
.LC20:
	.ascii	"ASL\000"
	.space	4
	.word	5
	.word	2
	.word	6
	.byte	0
	.byte	0
	.byte	-125
	.space	1
	.align	2
.LC21:
	.ascii	"BCC\000"
	.space	4
	.word	1
	.word	2
	.word	22
	.byte	0
	.byte	0
	.byte	0
	.space	1
	.align	2
.LC22:
	.ascii	"BCS\000"
	.space	4
	.word	1
	.word	2
	.word	22
	.byte	0
	.byte	0
	.byte	0
	.space	1
	.align	2
.LC23:
	.ascii	"BEQ\000"
	.space	4
	.word	1
	.word	2
	.word	22
	.byte	0
	.byte	0
	.byte	0
	.space	1
	.align	2
.LC24:
	.ascii	"BIT\000"
	.space	4
	.word	7
	.word	3
	.word	4
	.byte	0
	.byte	0
	.byte	-62
	.space	1
	.align	2
.LC25:
	.ascii	"BIT\000"
	.space	4
	.word	4
	.word	2
	.word	3
	.byte	0
	.byte	0
	.byte	-62
	.space	1
	.align	2
.LC26:
	.ascii	"BMI\000"
	.space	4
	.word	1
	.word	2
	.word	22
	.byte	0
	.byte	0
	.byte	0
	.space	1
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	.space	1
	.align	2
.LC127:
	.ascii	"SBC\000"
	.space	4
	.word	4
	.word	2
	.word	3
	.byte	0
	.byte	0
	.byte	-61
	.space	1
	.align	2
.LC128:
	.ascii	"SBC\000"
	.space	4
	.word	5
	.word	2
	.word	4
	.byte	0
	.byte	0
	.byte	-61
	.space	1
	.align	2
.LC129:
	.ascii	"SEC\000"
	.space	4
	.word	0
	.word	1
	.word	2
	.byte	0
	.byte	1
	.byte	0
	.space	1
	.align	2
.LC130:
	.ascii	"SED\000"
	.space	4
	.word	0
	.word	1
	.word	2
	.byte	0
	.byte	8
	.byte	0
	.space	1
	.align	2
.LC131:
	.ascii	"SEI\000"
	.space	4
	.word	0
	.word	1
	.word	2
	.byte	0
	.byte	4
	.byte	0
	.space	1
	.align	2
.LC132:
	.ascii	"STA\000"
	.space	4
	.word	7
	.word	3
	.word	4
	.byte	0
	.byte	0
	.byte	0
	.space	1
	.align	2
.LC133:
	.ascii	"STA\000"
	.space	4
	.word	8
	.word	3
	.word	5
	.byte	0
	.byte	0
	.byte	0
	.space	1
	.align	2
.LC134:
	.ascii	"STA\000"
	.space	4
	.word	9
	.word	3
	.word	5
	.byte	0
	.byte	0
	.byte	0
	.space	1
	.align	2
.LC135:
	.ascii	"STA\000"
	.space	4
	.word	11
	.word	2
	.word	6
	.byte	0
	.byte	0
	.byte	0
	.space	1
	.align	2
.LC136:
	.ascii	"STA\000"
	.space	4
	.word	12
	.word	2
	.word	6
	.byte	0
	.byte	0
	.byte	0
	.space	1
	.align	2
.LC137:
	.ascii	"STA\000"
	.space	4
	.word	4
	.word	2
	.word	3
	.byte	0
	.byte	0
	.byte	0
	.space	1
	.align	2
.LC138:
	.ascii	"STA\000"
	.space	4
	.word	5
	.word	2
	.word	4
	.byte	0
	.byte	0
	.byte	0
	.space	1
	.align	2
.LC139:
	.ascii	"STX\000"
	.space	4
	.word	7
	.word	3
	.word	4
	.byte	0
	.byte	0
	.byte	0
	.space	1
	.align	2
.LC140:
	.ascii	"STX\000"
	.space	4
	.word	4
	.word	2
	.word	3
	.byte	0
	.byte	0
	.byte	0
	.space	1
	.align	2
.LC141:
	.ascii	"STX\000"
	.space	4
	.word	6
	.word	2
	.word	4
	.byte	0
	.byte	0
	.byte	0
	.space	1
	.align	2
.LC142:
	.ascii	"STY\000"
	.space	4
	.word	7
	.word	3
	.word	4
	.byte	0
	.byte	0
	.byte	0
	.space	1
	.align	2
.LC143:
	.ascii	"STY\000"
	.space	4
	.word	4
	.word	2
	.word	3
	.byte	0
	.byte	0
	.byte	0
	.space	1
	.align	2
.LC144:
	.ascii	"STY\000"
	.space	4
	.word	5
	.word	2
	.word	4
	.byte	0
	.byte	0
	.byte	0
	.space	1
	.align	2
.LC145:
	.ascii	"TAX\000"
	.space	4
	.word	0
	.word	1
	.word	2
	.byte	0
	.byte	0
	.byte	-126
	.space	1
	.align	2
.LC146:
	.ascii	"TAY\000"
	.space	4
	.word	0
	.word	1
	.word	2
	.byte	0
	.byte	0
	.byte	-126
	.space	1
	.align	2
.LC147:
	.ascii	"TSX\000"
	.space	4
	.word	0
	.word	1
	.word	2
	.byte	0
	.byte	0
	.byte	-126
	.space	1
	.align	2
.LC148:
	.ascii	"TXA\000"
	.space	4
	.word	0
	.word	1
	.word	2
	.byte	0
	.byte	0
	.byte	-126
	.space	1
	.align	2
.LC149:
	.ascii	"TXS\000"
	.space	4
	.word	0
	.word	1
	.word	2
	.byte	0
	.byte	0
	.byte	0
	.space	1
	.align	2
.LC150:
	.ascii	"TYA\000"
	.space	4
	.word	0
	.word	1
	.word	2
	.byte	0
	.byte	0
	.byte	-126
	.space	1
	.align	2
.LC151:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	setup
	.syntax unified
	.arm
	.fpu softvfp
	.type	setup, %function
setup:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #32
	ldr	r3, .L3
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	mov	r2, #6144
	mov	r1, #0
	ldr	r0, .L3+4
	bl	memset
	ldr	r3, .L3+4
	ldr	r2, .L3+8
	add	ip, r3, #2608
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+12
	add	ip, r3, #2992
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+16
	add	ip, r3, #2896
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+20
	add	ip, r3, #2512
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+24
	add	ip, r3, #2320
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+28
	add	ip, r3, #2704
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+32
	add	ip, r3, #2416
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+36
	add	ip, r3, #2800
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+40
	add	ip, r3, #1072
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+44
	add	ip, r3, #1456
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+48
	add	ip, r3, #1360
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+52
	add	ip, r3, #984
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+56
	add	ip, r3, #792
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+60
	add	ip, r3, #1168
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+64
	add	ip, r3, #888
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+68
	add	ip, r3, #1264
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+72
	add	ip, r3, #336
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+76
	add	ip, r3, #720
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+80
	add	ip, r3, #240
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+84
	add	ip, r3, #144
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+88
	add	ip, r3, #528
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+92
	add	ip, r3, #3456
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+96
	add	ip, r3, #128
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+100
	add	ip, r3, #1664
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+104
	add	ip, r3, #1056
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+108
	add	ip, r3, #864
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+112
	add	ip, r3, #1152
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+116
	add	ip, r3, #896
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+120
	add	ip, r3, #384
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r2, .L3+4
	ldr	r3, .L3+124
	mov	ip, r2
	mov	lr, r3
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+128
	add	ip, r3, #1920
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+132
	add	ip, r3, #2688
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+136
	add	ip, r3, #576
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+140
	add	ip, r3, #1088
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+144
	add	ip, r3, #2112
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+148
	add	ip, r3, #320
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+152
	add	ip, r3, #824
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+156
	add	ip, r3, #1200
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+160
	add	ip, r3, #1104
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+164
	add	ip, r3, #728
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+168
	add	ip, r3, #536
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+172
	add	ip, r3, #920
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+176
	add	ip, r3, #632
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+180
	add	ip, r3, #1016
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+184
	add	ip, r3, #1568
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+188
	add	ip, r3, #1280
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+192
	add	ip, r3, #1376
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+196
	add	ip, r3, #800
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+200
	add	ip, r3, #512
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+204
	add	ip, r3, #608
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+208
	add	ip, r3, #848
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+212
	add	ip, r3, #1232
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+216
	add	ip, r3, #656
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+220
	add	ip, r3, #1040
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+224
	add	ip, r3, #752
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+228
	add	ip, r3, #3264
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+232
	add	ip, r3, #1840
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+236
	add	ip, r3, #2224
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+240
	add	ip, r3, #2128
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+244
	add	ip, r3, #1744
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+248
	add	ip, r3, #1552
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+252
	add	ip, r3, #1936
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+256
	add	ip, r3, #1648
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+260
	add	ip, r3, #2032
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+264
	add	ip, r3, #1616
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+268
	add	ip, r3, #2000
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+272
	add	ip, r3, #1424
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+276
	add	ip, r3, #1808
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+280
	add	ip, r3, #1472
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+284
	add	ip, r3, #704
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+288
	add	ip, r3, #1824
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+292
	add	ip, r3, #2592
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+296
	add	ip, r3, #768
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+300
	add	ip, r3, #56
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+304
	add	ip, r3, #440
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+308
	add	ip, r3, #344
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+312
	add	ip, r3, #4048
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+316
	add	ip, r3, #3856
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+320
	add	ip, r3, #152
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+324
	add	ip, r3, #3952
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+328
	add	ip, r3, #248
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+332
	add	ip, r3, #80
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+336
	add	ip, r3, #464
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+340
	add	ip, r3, #3888
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+344
	add	ip, r3, #3984
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+348
	add	ip, r3, #272
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+352
	add	ip, r3, #32
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+356
	add	ip, r3, #416
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+360
	add	ip, r3, #3840
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+364
	add	ip, r3, #3936
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+368
	add	ip, r3, #224
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+372
	add	ip, r3, #1872
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+376
	add	ip, r3, #2256
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+380
	add	ip, r3, #1776
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+384
	add	ip, r3, #1680
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+388
	add	ip, r3, #2064
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	add	r3, r3, #4096
	ldr	r2, .L3+392
	add	ip, r3, #1520
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+396
	add	ip, r3, #312
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+400
	add	ip, r3, #696
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+404
	add	ip, r3, #600
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+408
	add	ip, r3, #216
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+412
	add	ip, r3, #24
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+416
	add	ip, r3, #408
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+420
	add	ip, r3, #120
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+424
	add	ip, r3, #504
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+428
	add	ip, r3, #1728
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+432
	add	ip, r3, #192
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+436
	add	ip, r3, #2496
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+440
	add	ip, r3, #960
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+444
	add	ip, r3, #1104
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+448
	add	ip, r3, #1488
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+452
	add	ip, r3, #1008
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+456
	add	ip, r3, #912
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+460
	add	ip, r3, #1296
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+464
	add	ip, r3, #2640
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+468
	add	ip, r3, #3024
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+472
	add	ip, r3, #2544
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+476
	add	ip, r3, #2448
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+4
	ldr	r2, .L3+480
	add	ip, r3, #2832
	b	.L4
.L5:
	.align	2
.L3:
	.word	.LC151
	.word	op2i
	.word	.LC0
	.word	.LC1
	.word	.LC2
	.word	.LC3
	.word	.LC4
	.word	.LC5
	.word	.LC6
	.word	.LC7
	.word	.LC8
	.word	.LC9
	.word	.LC10
	.word	.LC11
	.word	.LC12
	.word	.LC13
	.word	.LC14
	.word	.LC15
	.word	.LC16
	.word	.LC17
	.word	.LC18
	.word	.LC19
	.word	.LC20
	.word	.LC21
	.word	.LC22
	.word	.LC23
	.word	.LC24
	.word	.LC25
	.word	.LC26
	.word	.LC27
	.word	.LC28
	.word	.LC29
	.word	.LC30
	.word	.LC31
	.word	.LC32
	.word	.LC33
	.word	.LC34
	.word	.LC35
	.word	.LC36
	.word	.LC37
	.word	.LC38
	.word	.LC39
	.word	.LC40
	.word	.LC41
	.word	.LC42
	.word	.LC43
	.word	.LC44
	.word	.LC45
	.word	.LC46
	.word	.LC47
	.word	.LC48
	.word	.LC49
	.word	.LC50
	.word	.LC51
	.word	.LC52
	.word	.LC53
	.word	.LC54
	.word	.LC55
	.word	.LC56
	.word	.LC57
	.word	.LC58
	.word	.LC59
	.word	.LC60
	.word	.LC61
	.word	.LC62
	.word	.LC63
	.word	.LC64
	.word	.LC65
	.word	.LC66
	.word	.LC67
	.word	.LC68
	.word	.LC69
	.word	.LC70
	.word	.LC71
	.word	.LC72
	.word	.LC73
	.word	.LC74
	.word	.LC75
	.word	.LC76
	.word	.LC77
	.word	.LC78
	.word	.LC79
	.word	.LC80
	.word	.LC81
	.word	.LC82
	.word	.LC83
	.word	.LC84
	.word	.LC85
	.word	.LC86
	.word	.LC87
	.word	.LC88
	.word	.LC89
	.word	.LC90
	.word	.LC91
	.word	.LC92
	.word	.LC93
	.word	.LC94
	.word	.LC95
	.word	.LC96
	.word	.LC97
	.word	.LC98
	.word	.LC99
	.word	.LC100
	.word	.LC101
	.word	.LC102
	.word	.LC103
	.word	.LC104
	.word	.LC105
	.word	.LC106
	.word	.LC107
	.word	.LC108
	.word	.LC109
	.word	.LC110
	.word	.LC111
	.word	.LC112
	.word	.LC113
	.word	.LC114
	.word	.LC115
	.word	.LC116
	.word	.LC117
	.word	.LC118
	.word	.LC119
	.word	.LC120
	.word	.LC121
	.word	.LC122
	.word	.LC123
	.word	.LC124
	.word	.LC125
	.word	.LC126
	.word	.LC127
	.word	.LC128
	.word	.LC129
	.word	.LC130
	.word	.LC131
	.word	.LC132
	.word	.LC133
	.word	.LC134
	.word	.LC135
	.word	.LC136
	.word	.LC137
	.word	.LC138
	.word	.LC139
	.word	.LC140
	.word	.LC141
	.word	.LC142
	.word	.LC143
	.word	.LC144
	.word	.LC145
	.word	.LC146
	.word	.LC147
	.word	.LC148
	.word	.LC149
	.word	op2i
	.word	.LC150
	.word	.LC151
.L4:
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	ldr	r2, .L3+484
	add	ip, r3, #1536
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	ldr	r2, .L3+488
	add	ip, r3, #2304
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	add	r3, r3, #4096
	ldr	r2, .L3+492
	add	ip, r3, #1584
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	add	r3, r3, #4096
	ldr	r2, .L3+496
	add	ip, r3, #1968
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	add	r3, r3, #4096
	ldr	r2, .L3+500
	add	ip, r3, #1872
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	add	r3, r3, #4096
	ldr	r2, .L3+504
	add	ip, r3, #1488
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	add	r3, r3, #4096
	ldr	r2, .L3+508
	add	ip, r3, #1296
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	add	r3, r3, #4096
	ldr	r2, .L3+512
	add	ip, r3, #1680
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	add	r3, r3, #4096
	ldr	r2, .L3+516
	add	ip, r3, #1392
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	add	r3, r3, #4096
	ldr	r2, .L3+520
	add	ip, r3, #1776
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	ldr	r2, .L3+524
	add	ip, r3, #1344
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	add	r3, r3, #4096
	ldr	r2, .L3+528
	add	ip, r3, #1856
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	ldr	r2, .L3+532
	add	ip, r3, #2880
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	ldr	r2, .L3+536
	add	ip, r3, #3376
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	ldr	r2, .L3+540
	add	ip, r3, #3760
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	ldr	r2, .L3+544
	add	ip, r3, #3664
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	ldr	r2, .L3+548
	add	ip, r3, #3088
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	ldr	r2, .L3+552
	add	ip, r3, #3472
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	ldr	r2, .L3+556
	add	ip, r3, #3184
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	ldr	r2, .L3+560
	add	ip, r3, #3568
	add	ip, ip, #8
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	ldr	r2, .L3+564
	add	ip, r3, #3408
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	ldr	r2, .L3+568
	add	ip, r3, #3216
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	ldr	r2, .L3+572
	add	ip, r3, #3600
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	ldr	r2, .L3+576
	add	ip, r3, #3360
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	ldr	r2, .L3+580
	add	ip, r3, #3168
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	ldr	r2, .L3+584
	add	ip, r3, #3552
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	ldr	r2, .L3+588
	add	ip, r3, #4080
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	ldr	r2, .L3+592
	add	ip, r3, #4032
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	add	r3, r3, #4096
	ldr	r2, .L3+596
	add	ip, r3, #368
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	ldr	r2, .L3+600
	add	ip, r3, #3312
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	ldr	r2, .L3+604
	add	ip, r3, #3696
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	ldr	r3, .L3+608
	ldr	r2, .L3+612
	add	ip, r3, #3648
	mov	lr, r2
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	nop
	ldr	r3, .L3+616
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L2
	bl	__stack_chk_fail
.L2:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	setup, .-setup
	.section	.rodata
	.align	2
.LC152:
	.ascii	"\000"
	.align	2
.LC153:
	.ascii	"lbl\000"
	.align	2
.LC154:
	.ascii	"A\000"
	.align	2
.LC155:
	.ascii	"#$%02X\000"
	.align	2
.LC156:
	.ascii	"$%02X\000"
	.align	2
.LC157:
	.ascii	"$%02X, X\000"
	.align	2
.LC158:
	.ascii	"$%02X, Y\000"
	.align	2
.LC159:
	.ascii	"$%04X\000"
	.align	2
.LC160:
	.ascii	"$%04X, X\000"
	.align	2
.LC161:
	.ascii	"$%04X, Y\000"
	.align	2
.LC162:
	.ascii	"($%04X)\000"
	.align	2
.LC163:
	.ascii	"($%02X, X)\000"
	.align	2
.LC164:
	.ascii	"($%02X), Y\000"
	.align	2
.LC165:
	.ascii	"???\000"
	.text
	.align	2
	.global	decode
	.syntax unified
	.arm
	.fpu softvfp
	.type	decode, %function
decode:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	ldr	r3, [fp, #-16]
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #3
	ldr	r2, .L24
	add	r3, r3, r2
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-20]
	ldr	r2, [fp, #-8]
	mov	r1, r2
	mov	r0, r3
	bl	strcpy
	ldr	r3, [fp, #-20]
	mov	r2, #0
	strb	r2, [r3, #8]
	ldr	r3, [fp, #-8]
	ldr	r2, [r3, #8]
	ldr	r3, [fp, #-20]
	str	r2, [r3, #24]
	ldr	r3, [fp, #-20]
	ldr	r3, [r3, #24]
	cmp	r3, #12
	ldrls	pc, [pc, r3, asl #2]
	b	.L7
.L9:
	.word	.L21
	.word	.L20
	.word	.L19
	.word	.L18
	.word	.L17
	.word	.L16
	.word	.L15
	.word	.L14
	.word	.L13
	.word	.L12
	.word	.L11
	.word	.L10
	.word	.L8
.L21:
	ldr	r3, [fp, #-20]
	add	r3, r3, #8
	ldr	r1, .L24+4
	mov	r0, r3
	bl	sprintf
	b	.L22
.L20:
	ldr	r3, [fp, #-20]
	add	r3, r3, #8
	ldr	r1, .L24+8
	mov	r0, r3
	bl	sprintf
	b	.L22
.L19:
	ldr	r3, [fp, #-20]
	add	r3, r3, #8
	ldr	r1, .L24+12
	mov	r0, r3
	bl	sprintf
	b	.L22
.L18:
	ldr	r3, [fp, #-20]
	add	r0, r3, #8
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, .L24+16
	bl	sprintf
	b	.L22
.L17:
	ldr	r3, [fp, #-20]
	add	r0, r3, #8
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, .L24+20
	bl	sprintf
	b	.L22
.L16:
	ldr	r3, [fp, #-20]
	add	r0, r3, #8
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, .L24+24
	bl	sprintf
	b	.L22
.L15:
	ldr	r3, [fp, #-20]
	add	r0, r3, #8
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, .L24+28
	bl	sprintf
	b	.L22
.L14:
	ldr	r3, [fp, #-20]
	add	r0, r3, #8
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	add	r3, r3, #2
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #8
	orr	r3, r2, r3
	mov	r2, r3
	ldr	r1, .L24+32
	bl	sprintf
	b	.L22
.L13:
	ldr	r3, [fp, #-20]
	add	r0, r3, #8
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	add	r3, r3, #2
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #8
	orr	r3, r2, r3
	mov	r2, r3
	ldr	r1, .L24+36
	bl	sprintf
	b	.L22
.L12:
	ldr	r3, [fp, #-20]
	add	r0, r3, #8
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	add	r3, r3, #2
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #8
	orr	r3, r2, r3
	mov	r2, r3
	ldr	r1, .L24+40
	bl	sprintf
	b	.L22
.L11:
	ldr	r3, [fp, #-20]
	add	r0, r3, #8
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	add	r3, r3, #2
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #8
	orr	r3, r2, r3
	mov	r2, r3
	ldr	r1, .L24+44
	bl	sprintf
	b	.L22
.L10:
	ldr	r3, [fp, #-20]
	add	r0, r3, #8
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, .L24+48
	bl	sprintf
	b	.L22
.L8:
	ldr	r3, [fp, #-20]
	add	r0, r3, #8
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, .L24+52
	bl	sprintf
	b	.L22
.L7:
	ldr	r3, [fp, #-20]
	add	r3, r3, #8
	ldr	r1, .L24+56
	mov	r0, r3
	bl	sprintf
	nop
.L22:
	ldr	r3, [fp, #-8]
	ldr	r2, [r3, #12]
	ldr	r3, [fp, #-20]
	str	r2, [r3, #28]
	ldr	r3, [fp, #-8]
	ldr	r2, [r3, #16]
	ldr	r3, [fp, #-20]
	str	r2, [r3, #32]
	ldr	r3, [fp, #-8]
	ldrb	r2, [r3, #20]	@ zero_extendqisi2
	ldr	r3, [fp, #-20]
	strb	r2, [r3, #36]
	ldr	r3, [fp, #-8]
	ldrb	r2, [r3, #21]	@ zero_extendqisi2
	ldr	r3, [fp, #-20]
	strb	r2, [r3, #37]
	ldr	r3, [fp, #-8]
	ldrb	r2, [r3, #22]	@ zero_extendqisi2
	ldr	r3, [fp, #-20]
	strb	r2, [r3, #38]
	ldr	r3, [fp, #-20]
	ldr	r3, [r3, #28]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L25:
	.align	2
.L24:
	.word	op2i
	.word	.LC152
	.word	.LC153
	.word	.LC154
	.word	.LC155
	.word	.LC156
	.word	.LC157
	.word	.LC158
	.word	.LC159
	.word	.LC160
	.word	.LC161
	.word	.LC162
	.word	.LC163
	.word	.LC164
	.word	.LC165
	.size	decode, .-decode
	.section	.rodata
	.align	2
.LC166:
	.ascii	"    <table summary=\"\" border=\"1\" cellpadding=\""
	.ascii	"0\" width=\"100%\">\012\000"
	.align	2
.LC167:
	.ascii	"      <tr align=\"center\">\000"
	.align	2
.LC168:
	.ascii	"        <th width=\"5%\">&nbsp;</th>\012\000"
	.align	2
.LC169:
	.ascii	"        <th width=\"5%\"><big><big>&#8209;</big></b"
	.ascii	"ig>0</th>\012\000"
	.align	2
.LC170:
	.ascii	"        <th width=\"5%\"><big><big>&#8209;</big></b"
	.ascii	"ig>1</th>\012\000"
	.align	2
.LC171:
	.ascii	"        <th width=\"5%\"><big><big>&#8209;</big></b"
	.ascii	"ig>2</th>\012\000"
	.align	2
.LC172:
	.ascii	"        <th width=\"5%\"><big><big>&#8209;</big></b"
	.ascii	"ig>3</th>\012\000"
	.align	2
.LC173:
	.ascii	"        <th width=\"5%\"><big><big>&#8209;</big></b"
	.ascii	"ig>4</th>\012\000"
	.align	2
.LC174:
	.ascii	"        <th width=\"5%\"><big><big>&#8209;</big></b"
	.ascii	"ig>5</th>\012\000"
	.align	2
.LC175:
	.ascii	"        <th width=\"5%\"><big><big>&#8209;</big></b"
	.ascii	"ig>6</th>\012\000"
	.align	2
.LC176:
	.ascii	"        <th width=\"5%\"><big><big>&#8209;</big></b"
	.ascii	"ig>7</th>\012\000"
	.align	2
.LC177:
	.ascii	"        <th width=\"5%\"><big><big>&#8209;</big></b"
	.ascii	"ig>8</th>\012\000"
	.align	2
.LC178:
	.ascii	"        <th width=\"5%\"><big><big>&#8209;</big></b"
	.ascii	"ig>9</th>\012\000"
	.align	2
.LC179:
	.ascii	"        <th width=\"5%\"><big><big>&#8209;</big></b"
	.ascii	"ig>A</th>\012\000"
	.align	2
.LC180:
	.ascii	"        <th width=\"5%\"><big><big>&#8209;</big></b"
	.ascii	"ig>B</th>\012\000"
	.align	2
.LC181:
	.ascii	"        <th width=\"5%\"><big><big>&#8209;</big></b"
	.ascii	"ig>C</th>\012\000"
	.align	2
.LC182:
	.ascii	"        <th width=\"5%\"><big><big>&#8209;</big></b"
	.ascii	"ig>D</th>\012\000"
	.align	2
.LC183:
	.ascii	"        <th width=\"5%\"><big><big>&#8209;</big></b"
	.ascii	"ig>E</th>\012\000"
	.align	2
.LC184:
	.ascii	"        <th width=\"5%\"><big><big>&#8209;</big></b"
	.ascii	"ig>F</th>\012\000"
	.align	2
.LC185:
	.ascii	"      </tr>\000"
	.align	2
.LC186:
	.ascii	"      <tr>\000"
	.align	2
.LC187:
	.ascii	"        <th align=\"center\">&nbsp;%X<big><big>&#82"
	.ascii	"09;</big></big>&nbsp;</th>\012\000"
	.align	2
.LC188:
	.ascii	"        <td><table summary=\"\" align=\"center\" bo"
	.ascii	"rder=\"0\">\000"
	.align	2
.LC189:
	.ascii	"          <tr><td align=\"left\"><small><b>        "
	.ascii	"   %d       </b></small></td>\012\000"
	.align	2
.LC190:
	.ascii	"  + ++\000"
	.align	2
.LC191:
	.ascii	"              <td align=\"right\"><small><b>       "
	.ascii	"   %d%.2s    </b></small></td></tr>\012\000"
	.align	2
.LC192:
	.ascii	"          <tr><th colspan=\"2\">       <a href=\"#%"
	.ascii	"s\">%s     </a></th></tr>\012\000"
	.align	2
.LC193:
	.ascii	"          <tr><td align=\"center\" colspan=\"2\"><s"
	.ascii	"mall>%s</small></td></tr>\012\000"
	.align	2
.LC194:
	.ascii	"          <tr><td align=\"center\" colspan=\"2\"><s"
	.ascii	"mall>\000"
	.align	2
.LC195:
	.ascii	"&#8209;\000"
	.align	2
.LC198:
	.ascii	"        </table></td>\000"
	.align	2
.LC199:
	.ascii	"        <td>&nbsp;</td>\000"
	.align	2
.LC200:
	.ascii	"        <th width=\"7%\">&nbsp;</th>\012\000"
	.align	2
.LC201:
	.ascii	"        <th width=\"7%\"><big><big>&#8209;</big></b"
	.ascii	"ig>0</th>\012\000"
	.align	2
.LC202:
	.ascii	"        <th width=\"7%\"><big><big>&#8209;</big></b"
	.ascii	"ig>1</th>\012\000"
	.align	2
.LC203:
	.ascii	"        <th width=\"7%\"><big><big>&#8209;</big></b"
	.ascii	"ig>2</th>\012\000"
	.align	2
.LC204:
	.ascii	"        <th width=\"7%\"><big><big>&#8209;</big></b"
	.ascii	"ig>3</th>\012\000"
	.align	2
.LC205:
	.ascii	"        <th width=\"7%\"><big><big>&#8209;</big></b"
	.ascii	"ig>4</th>\012\000"
	.align	2
.LC206:
	.ascii	"        <th width=\"7%\"><big><big>&#8209;</big></b"
	.ascii	"ig>5</th>\012\000"
	.align	2
.LC207:
	.ascii	"        <th width=\"7%\"><big><big>&#8209;</big></b"
	.ascii	"ig>6</th>\012\000"
	.align	2
.LC208:
	.ascii	"        <th width=\"7%\"><big><big>&#8209;</big></b"
	.ascii	"ig>7</th>\012\000"
	.align	2
.LC209:
	.ascii	"        <th width=\"7%\"><big><big>&#8209;</big></b"
	.ascii	"ig>8</th>\012\000"
	.align	2
.LC210:
	.ascii	"        <th width=\"7%\"><big><big>&#8209;</big></b"
	.ascii	"ig>9</th>\012\000"
	.align	2
.LC211:
	.ascii	"        <th width=\"7%\"><big><big>&#8209;</big></b"
	.ascii	"ig>A</th>\012\000"
	.align	2
.LC212:
	.ascii	"        <th width=\"7%\"><big><big>&#8209;</big></b"
	.ascii	"ig>B</th>\012\000"
	.align	2
.LC213:
	.ascii	"        <th width=\"7%\"><big><big>&#8209;</big></b"
	.ascii	"ig>C</th>\012\000"
	.align	2
.LC214:
	.ascii	"        <th width=\"7%\"><big><big>&#8209;</big></b"
	.ascii	"ig>D</th>\012\000"
	.align	2
.LC215:
	.ascii	"        <th width=\"7%\"><big><big>&#8209;</big></b"
	.ascii	"ig>E</th>\012\000"
	.align	2
.LC216:
	.ascii	"        <th width=\"7%\"><big><big>&#8209;</big></b"
	.ascii	"ig>F</th>\012\000"
	.align	2
.LC217:
	.ascii	"    </table>\000"
	.align	2
.LC218:
	.ascii	"    <table summary=\"\" border=\"0\" cellpadding=\""
	.ascii	"0\" width=\"100%\">\012\000"
	.align	2
.LC219:
	.ascii	"      <tr><td align=\"right\">autogenerated from \000"
	.align	2
.LC220:
	.ascii	"        <a href=\"https://www.masswerk.at/6502/6502"
	.ascii	"_instruction_set.html\" target=\"extern6502\">6502 "
	.ascii	"Instruction Set</a>\000"
	.align	2
.LC221:
	.ascii	"        by <a href=\"https://masswerk.at/\" target="
	.ascii	"\"extern6502\">mass:werk</a>\000"
	.align	2
.LC222:
	.ascii	"      </td></tr>\000"
	.align	2
.LC196:
	.ascii	"CZIDB-VN\000"
	.align	2
.LC197:
	.ascii	"czidb-vn\000"
	.align	2
.LC223:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 72
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #72
	str	r0, [fp, #-64]
	str	r1, [fp, #-68]
	str	r2, [fp, #-72]
	ldr	r3, .L40
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	bl	setup
	ldr	r0, .L40+4
	bl	printf
	ldr	r0, .L40+8
	bl	puts
	ldr	r0, .L40+12
	bl	printf
	ldr	r0, .L40+16
	bl	printf
	ldr	r0, .L40+20
	bl	printf
	ldr	r0, .L40+24
	bl	printf
	ldr	r0, .L40+28
	bl	printf
	ldr	r0, .L40+32
	bl	printf
	ldr	r0, .L40+36
	bl	printf
	ldr	r0, .L40+40
	bl	printf
	ldr	r0, .L40+44
	bl	printf
	ldr	r0, .L40+48
	bl	printf
	ldr	r0, .L40+52
	bl	printf
	ldr	r0, .L40+56
	bl	printf
	ldr	r0, .L40+60
	bl	printf
	ldr	r0, .L40+64
	bl	printf
	ldr	r0, .L40+68
	bl	printf
	ldr	r0, .L40+72
	bl	printf
	ldr	r0, .L40+76
	bl	printf
	ldr	r0, .L40+12
	bl	printf
	ldr	r0, .L40+80
	bl	puts
	mov	r3, #0
	str	r3, [fp, #-60]
	b	.L27
.L37:
	mov	r0, #10
	bl	putchar
	ldr	r0, .L40+84
	bl	puts
	ldr	r3, [fp, #-60]
	asr	r3, r3, #4
	mov	r1, r3
	ldr	r0, .L40+88
	bl	printf
.L36:
	ldr	r3, [fp, #-60]
	and	r3, r3, #255
	strb	r3, [fp, #-12]
	mvn	r3, #90
	strb	r3, [fp, #-11]
	mvn	r3, #73
	strb	r3, [fp, #-10]
	sub	r2, fp, #52
	sub	r3, fp, #12
	mov	r1, r2
	mov	r0, r3
	bl	decode
	mov	r3, r0
	cmp	r3, #0
	beq	.L28
	ldr	r0, .L40+92
	bl	puts
	ldr	r3, [fp, #-24]
	mov	r1, r3
	ldr	r0, .L40+96
	bl	printf
	ldr	r2, [fp, #-20]
	ldr	r3, .L40+100
	smull	r1, r3, r2, r3
	asr	r1, r3, #2
	asr	r3, r2, #31
	sub	r1, r1, r3
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r3, r3, #1
	sub	r1, r2, r3
	ldr	r3, [fp, #-20]
	ldr	r2, .L40+100
	smull	r0, r2, r3, r2
	asr	r2, r2, #2
	asr	r3, r3, #31
	sub	r3, r2, r3
	lsl	r3, r3, #1
	ldr	r2, .L40+104
	add	r3, r3, r2
	mov	r2, r3
	ldr	r0, .L40+108
	bl	printf
	sub	r2, fp, #52
	sub	r3, fp, #52
	mov	r1, r3
	ldr	r0, .L40+112
	bl	printf
	ldr	r3, [fp, #-28]
	lsl	r3, r3, #4
	ldr	r2, .L40+116
	add	r3, r3, r2
	mov	r1, r3
	ldr	r0, .L40+120
	bl	printf
	ldr	r0, .L40+124
	bl	printf
	mov	r0, #91
	bl	putchar
	mov	r3, #7
	str	r3, [fp, #-56]
	b	.L29
.L34:
	ldr	r3, [fp, #-56]
	cmp	r3, #5
	bne	.L30
	ldr	r0, .L40+128
	bl	printf
	b	.L31
.L30:
	ldrb	r2, [fp, #-16]	@ zero_extendqisi2
	ldrb	r3, [fp, #-15]	@ zero_extendqisi2
	orr	r3, r2, r3
	and	r2, r3, #255
	ldrb	r3, [fp, #-14]	@ zero_extendqisi2
	orr	r3, r2, r3
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, [fp, #-56]
	asr	r3, r2, r3
	and	r3, r3, #1
	cmp	r3, #0
	beq	.L32
	ldr	r2, .L40+132
	ldr	r3, [fp, #-56]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	b	.L33
.L32:
	ldr	r2, .L40+136
	ldr	r3, [fp, #-56]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
.L33:
	mov	r0, r3
	bl	putchar
.L31:
	ldr	r3, [fp, #-56]
	sub	r3, r3, #1
	str	r3, [fp, #-56]
.L29:
	ldr	r3, [fp, #-56]
	cmp	r3, #0
	bgt	.L34
	mov	r0, #93
	bl	putchar
	ldr	r0, .L40+140
	bl	puts
	b	.L35
.L28:
	ldr	r0, .L40+144
	bl	puts
.L35:
	ldr	r3, [fp, #-60]
	add	r3, r3, #1
	str	r3, [fp, #-60]
	ldr	r3, [fp, #-60]
	and	r3, r3, #15
	cmp	r3, #0
	bne	.L36
	ldr	r3, [fp, #-60]
	asr	r3, r3, #4
	sub	r3, r3, #1
	mov	r1, r3
	ldr	r0, .L40+88
	bl	printf
	ldr	r0, .L40+80
	bl	puts
.L27:
	ldr	r3, [fp, #-60]
	cmp	r3, #255
	ble	.L37
	ldr	r0, .L40+8
	bl	puts
	ldr	r0, .L40+148
	bl	printf
	ldr	r0, .L40+152
	bl	printf
	ldr	r0, .L40+156
	bl	printf
	ldr	r0, .L40+160
	bl	printf
	ldr	r0, .L40+164
	bl	printf
	ldr	r0, .L40+168
	bl	printf
	ldr	r0, .L40+172
	bl	printf
	ldr	r0, .L40+176
	bl	printf
	ldr	r0, .L40+180
	bl	printf
	ldr	r0, .L40+184
	bl	printf
	ldr	r0, .L40+188
	bl	printf
	ldr	r0, .L40+192
	bl	printf
	ldr	r0, .L40+196
	bl	printf
	ldr	r0, .L40+200
	bl	printf
	ldr	r0, .L40+204
	bl	printf
	ldr	r0, .L40+208
	bl	printf
	ldr	r0, .L40+212
	bl	printf
	ldr	r0, .L40+148
	bl	printf
	ldr	r0, .L40+80
	bl	puts
	ldr	r0, .L40+216
	bl	puts
	mov	r0, #10
	bl	putchar
	ldr	r0, .L40+220
	bl	printf
	ldr	r0, .L40+224
	bl	puts
	ldr	r0, .L40+228
	bl	puts
	ldr	r0, .L40+232
	bl	puts
	ldr	r0, .L40+236
	bl	puts
	ldr	r0, .L40+216
	bl	puts
	mov	r3, #0
	ldr	r2, .L40
	ldr	r1, [r2]
	ldr	r2, [fp, #-8]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L39
	bl	__stack_chk_fail
.L39:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L41:
	.align	2
.L40:
	.word	.LC223
	.word	.LC166
	.word	.LC167
	.word	.LC168
	.word	.LC169
	.word	.LC170
	.word	.LC171
	.word	.LC172
	.word	.LC173
	.word	.LC174
	.word	.LC175
	.word	.LC176
	.word	.LC177
	.word	.LC178
	.word	.LC179
	.word	.LC180
	.word	.LC181
	.word	.LC182
	.word	.LC183
	.word	.LC184
	.word	.LC185
	.word	.LC186
	.word	.LC187
	.word	.LC188
	.word	.LC189
	.word	1717986919
	.word	.LC190
	.word	.LC191
	.word	.LC192
	.word	amode
	.word	.LC193
	.word	.LC194
	.word	.LC195
	.word	.LC196
	.word	.LC197
	.word	.LC198
	.word	.LC199
	.word	.LC200
	.word	.LC201
	.word	.LC202
	.word	.LC203
	.word	.LC204
	.word	.LC205
	.word	.LC206
	.word	.LC207
	.word	.LC208
	.word	.LC209
	.word	.LC210
	.word	.LC211
	.word	.LC212
	.word	.LC213
	.word	.LC214
	.word	.LC215
	.word	.LC216
	.word	.LC217
	.word	.LC218
	.word	.LC219
	.word	.LC220
	.word	.LC221
	.word	.LC222
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
