	.file	"418374.c"
	.intel_syntax noprefix
	.text
	.globl	abs
	.type	abs, @function
abs:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	eax, DWORD PTR -20[rbp]
	sar	eax, 31
	mov	DWORD PTR -4[rbp], eax
	mov	edx, DWORD PTR -20[rbp]
	mov	eax, DWORD PTR -4[rbp]
	add	eax, edx
	xor	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	abs, .-abs
	.globl	bitAnd
	.type	bitAnd, @function
bitAnd:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -4[rbp]
	and	eax, DWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	bitAnd, .-bitAnd
	.globl	bitMask
	.type	bitMask, @function
bitMask:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, 2
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	lea	edx, -1[rax]
	mov	eax, DWORD PTR -8[rbp]
	mov	ecx, eax
	sar	edx, cl
	mov	eax, DWORD PTR -8[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	bitMask, .-bitMask
	.globl	bitXor
	.type	bitXor, @function
bitXor:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -4[rbp]
	xor	eax, DWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	bitXor, .-bitXor
	.globl	conditional
	.type	conditional, @function
conditional:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	DWORD PTR -12[rbp], edx
	cmp	DWORD PTR -4[rbp], 0
	jne	.L10
	mov	edx, 0
	jmp	.L11
.L10:
	mov	edx, -1
.L11:
	mov	eax, DWORD PTR -8[rbp]
	xor	eax, DWORD PTR -12[rbp]
	and	eax, edx
	xor	eax, DWORD PTR -12[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	conditional, .-conditional
	.globl	evenBits
	.type	evenBits, @function
evenBits:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], 21845
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 16
	xor	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	evenBits, .-evenBits
	.globl	isEqual
	.type	isEqual, @function
isEqual:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -4[rbp]
	lea	edx, 1[rax]
	mov	eax, DWORD PTR -8[rbp]
	not	eax
	add	eax, edx
	test	eax, eax
	sete	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	isEqual, .-isEqual
	.globl	isLess
	.type	isLess, @function
isLess:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	eax, DWORD PTR -20[rbp]
	not	eax
	mov	edx, eax
	mov	eax, DWORD PTR -24[rbp]
	add	eax, edx
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	xor	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -20[rbp]
	xor	eax, DWORD PTR -24[rbp]
	and	eax, edx
	xor	eax, DWORD PTR -4[rbp]
	not	eax
	shr	eax, 31
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	isLess, .-isLess
	.globl	isNegative
	.type	isNegative, @function
isNegative:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	shr	eax, 31
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	isNegative, .-isNegative
	.globl	isNonZero
	.type	isNonZero, @function
isNonZero:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	neg	eax
	or	eax, DWORD PTR -4[rbp]
	shr	eax, 31
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	isNonZero, .-isNonZero
	.globl	isPower2
	.type	isPower2, @function
isPower2:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	sub	eax, 1
	and	eax, DWORD PTR -4[rbp]
	test	eax, eax
	sete	al
	movzx	edx, al
	mov	eax, DWORD PTR -4[rbp]
	add	eax, eax
	test	eax, eax
	sete	al
	movzx	eax, al
	xor	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	isPower2, .-isPower2
	.globl	leastBitPos
	.type	leastBitPos, @function
leastBitPos:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	neg	eax
	and	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	leastBitPos, .-leastBitPos
	.globl	logicalNeg
	.type	logicalNeg, @function
logicalNeg:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	neg	eax
	or	eax, DWORD PTR -4[rbp]
	sar	eax, 31
	add	eax, 1
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	logicalNeg, .-logicalNeg
	.globl	reverseBytes
	.type	reverseBytes, @function
reverseBytes:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	shr	eax, 24
	mov	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sar	eax, 16
	sal	eax, 8
	movzx	eax, ax
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sar	eax, 8
	sal	eax, 16
	and	eax, 16711680
	xor	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 24
	xor	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	reverseBytes, .-reverseBytes
	.type	sum, @function
sum:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	edx, DWORD PTR -4[rbp]
	mov	eax, DWORD PTR -8[rbp]
	add	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	sum, .-sum
	.globl	sum3
	.type	sum3, @function
sum3:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	DWORD PTR -28[rbp], edx
	mov	DWORD PTR -12[rbp], 0
	mov	DWORD PTR -8[rbp], 0
	mov	eax, DWORD PTR -24[rbp]
	xor	eax, DWORD PTR -28[rbp]
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	xor	eax, DWORD PTR -4[rbp]
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -24[rbp]
	and	eax, DWORD PTR -28[rbp]
	or	eax, edx
	add	eax, eax
	mov	DWORD PTR -8[rbp], eax
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, DWORD PTR -12[rbp]
	mov	esi, edx
	mov	edi, eax
	call	sum
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	sum3, .-sum3
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"418374.c"
	.text
	.align	2
	.global	abs
	.syntax unified
	.arm
	.fpu softvfp
	.type	abs, %function
abs:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	asr	r3, r3, #31
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-8]
	add	r2, r2, r3
	ldr	r3, [fp, #-8]
	eor	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	abs, .-abs
	.align	2
	.global	bitAnd
	.syntax unified
	.arm
	.fpu softvfp
	.type	bitAnd, %function
bitAnd:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	and	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	bitAnd, .-bitAnd
	.align	2
	.global	bitMask
	.syntax unified
	.arm
	.fpu softvfp
	.type	bitMask, %function
bitMask:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	mov	r2, #2
	ldr	r3, [fp, #-8]
	lsl	r3, r2, r3
	sub	r2, r3, #1
	ldr	r3, [fp, #-12]
	asr	r2, r2, r3
	ldr	r3, [fp, #-12]
	lsl	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	bitMask, .-bitMask
	.align	2
	.global	bitXor
	.syntax unified
	.arm
	.fpu softvfp
	.type	bitXor, %function
bitXor:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	eor	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	bitXor, .-bitXor
	.align	2
	.global	conditional
	.syntax unified
	.arm
	.fpu softvfp
	.type	conditional, %function
conditional:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	str	r2, [fp, #-16]
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	bne	.L10
	mov	r2, #0
	b	.L11
.L10:
	mvn	r2, #0
.L11:
	ldr	r1, [fp, #-12]
	ldr	r3, [fp, #-16]
	eor	r3, r3, r1
	and	r2, r2, r3
	ldr	r3, [fp, #-16]
	eor	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	conditional, .-conditional
	.align	2
	.global	evenBits
	.syntax unified
	.arm
	.fpu softvfp
	.type	evenBits, %function
evenBits:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	ldr	r3, .L15
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsl	r2, r3, #16
	ldr	r3, [fp, #-8]
	eor	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L16:
	.align	2
.L15:
	.word	21845
	.size	evenBits, .-evenBits
	.align	2
	.global	isEqual
	.syntax unified
	.arm
	.fpu softvfp
	.type	isEqual, %function
isEqual:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-8]
	add	r2, r3, #1
	ldr	r3, [fp, #-12]
	mvn	r3, r3
	add	r3, r2, r3
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	isEqual, .-isEqual
	.align	2
	.global	isLess
	.syntax unified
	.arm
	.fpu softvfp
	.type	isLess, %function
isLess:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	ldr	r3, [fp, #-16]
	mvn	r3, r3
	ldr	r2, [fp, #-20]
	add	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-20]
	eor	r2, r2, r3
	ldr	r1, [fp, #-16]
	ldr	r3, [fp, #-20]
	eor	r3, r3, r1
	and	r2, r2, r3
	ldr	r3, [fp, #-8]
	eor	r3, r3, r2
	mvn	r3, r3
	lsr	r3, r3, #31
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	isLess, .-isLess
	.align	2
	.global	isNegative
	.syntax unified
	.arm
	.fpu softvfp
	.type	isNegative, %function
isNegative:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsr	r3, r3, #31
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	isNegative, .-isNegative
	.align	2
	.global	isNonZero
	.syntax unified
	.arm
	.fpu softvfp
	.type	isNonZero, %function
isNonZero:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	rsb	r2, r3, #0
	ldr	r3, [fp, #-8]
	orr	r3, r2, r3
	lsr	r3, r3, #31
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	isNonZero, .-isNonZero
	.align	2
	.global	isPower2
	.syntax unified
	.arm
	.fpu softvfp
	.type	isPower2, %function
isPower2:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	sub	r2, r3, #1
	ldr	r3, [fp, #-8]
	and	r3, r3, r2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #1
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	isPower2, .-isPower2
	.align	2
	.global	leastBitPos
	.syntax unified
	.arm
	.fpu softvfp
	.type	leastBitPos, %function
leastBitPos:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	rsb	r2, r3, #0
	ldr	r3, [fp, #-8]
	and	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	leastBitPos, .-leastBitPos
	.align	2
	.global	logicalNeg
	.syntax unified
	.arm
	.fpu softvfp
	.type	logicalNeg, %function
logicalNeg:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	rsb	r2, r3, #0
	ldr	r3, [fp, #-8]
	orr	r3, r2, r3
	asr	r3, r3, #31
	add	r3, r3, #1
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	logicalNeg, .-logicalNeg
	.align	2
	.global	reverseBytes
	.syntax unified
	.arm
	.fpu softvfp
	.type	reverseBytes, %function
reverseBytes:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsr	r3, r3, #24
	mov	r2, r3
	ldr	r3, [fp, #-8]
	asr	r3, r3, #16
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	asr	r3, r3, #8
	lsl	r3, r3, #16
	and	r3, r3, #16711680
	eor	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #24
	eor	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	reverseBytes, .-reverseBytes
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sum, %function
sum:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	add	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	sum, .-sum
	.align	2
	.global	sum3
	.syntax unified
	.arm
	.fpu softvfp
	.type	sum3, %function
sum3:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #32
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	str	r2, [fp, #-32]
	mov	r3, #0
	str	r3, [fp, #-16]
	mov	r3, #0
	str	r3, [fp, #-12]
	ldr	r2, [fp, #-28]
	ldr	r3, [fp, #-32]
	eor	r3, r3, r2
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-8]
	eor	r3, r3, r2
	str	r3, [fp, #-16]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-8]
	and	r2, r2, r3
	ldr	r1, [fp, #-28]
	ldr	r3, [fp, #-32]
	and	r3, r3, r1
	orr	r3, r2, r3
	lsl	r3, r3, #1
	str	r3, [fp, #-12]
	ldr	r1, [fp, #-12]
	ldr	r0, [fp, #-16]
	bl	sum
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sum3, .-sum3
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
