	.file	"370906.c"
	.intel_syntax noprefix
	.text
	.globl	ai1
	.bss
	.align 4
	.type	ai1, @object
	.size	ai1, 4
ai1:
	.zero	4
	.globl	ai2
	.align 4
	.type	ai2, @object
	.size	ai2, 4
ai2:
	.zero	4
	.globl	i1
	.align 4
	.type	i1, @object
	.size	i1, 4
i1:
	.zero	4
	.globl	ald1
	.align 16
	.type	ald1, @object
	.size	ald1, 16
ald1:
	.zero	16
	.globl	ald2
	.section	.rodata
	.align 16
	.type	ald2, @object
	.size	ald2, 16
ald2:
	.zero	16
	.globl	ld1
	.bss
	.align 16
	.type	ld1, @object
	.size	ld1, 16
ld1:
	.zero	16
	.globl	acd1
	.align 16
	.type	acd1, @object
	.size	acd1, 16
acd1:
	.zero	16
	.globl	acd2
	.align 16
	.type	acd2, @object
	.size	acd2, 16
acd2:
	.zero	16
	.globl	d1
	.align 8
	.type	d1, @object
	.size	d1, 16
d1:
	.zero	16
	.globl	ab1
	.type	ab1, @object
	.size	ab1, 1
ab1:
	.zero	1
	.globl	p
	.align 8
	.type	p, @object
	.size	p, 8
p:
	.zero	8
	.globl	ap
	.align 8
	.type	ap, @object
	.size	ap, 8
ap:
	.zero	8
	.globl	as1
	.align 32
	.type	as1, @object
	.size	as1, 1000
as1:
	.zero	1000
	.globl	s1
	.align 32
	.type	s1, @object
	.size	s1, 1000
s1:
	.zero	1000
	.globl	at1
	.align 4
	.type	at1, @object
	.size	at1, 4
at1:
	.zero	4
	.globl	atp1
	.align 8
	.type	atp1, @object
	.size	atp1, 8
atp1:
	.zero	8
	.globl	t1
	.align 4
	.type	t1, @object
	.size	t1, 4
t1:
	.zero	4
	.globl	au1
	.align 32
	.type	au1, @object
	.size	au1, 1000
au1:
	.zero	1000
	.globl	u1
	.align 32
	.type	u1, @object
	.size	u1, 1000
u1:
	.zero	1000
	.globl	av1
	.align 4
	.type	av1, @object
	.size	av1, 4
av1:
	.zero	4
	.globl	v1
	.align 4
	.type	v1, @object
	.size	v1, 4
v1:
	.zero	4
	.text
	.globl	func
	.type	func, @function
func:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r12
	push	rbx
	sub	rsp, 4096
	or	QWORD PTR [rsp], 0
	sub	rsp, 336
	.cfi_offset 12, -24
	.cfi_offset 3, -32
	mov	QWORD PTR -4360[rbp], rdi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -24[rbp], rax
	xor	eax, eax
	mov	eax, DWORD PTR ai2[rip]
	mov	DWORD PTR -4348[rbp], eax
	mov	eax, DWORD PTR -4348[rbp]
	mov	DWORD PTR -4344[rbp], eax
	mov	eax, DWORD PTR -4344[rbp]
	xchg	eax, DWORD PTR ai1[rip]
	mov	eax, DWORD PTR i1[rip]
	mov	DWORD PTR -4340[rbp], eax
	mov	eax, DWORD PTR -4340[rbp]
	xchg	eax, DWORD PTR ai1[rip]
	mov	eax, DWORD PTR ai2[rip]
	mov	DWORD PTR -4336[rbp], eax
	mov	eax, DWORD PTR -4336[rbp]
	mov	DWORD PTR i1[rip], eax
	mov	esi, 5
	lea	rdi, ald2[rip]
	call	__atomic_load_16@PLT
	mov	QWORD PTR -4384[rbp], rax
	mov	QWORD PTR -4376[rbp], rdx
	fld	TBYTE PTR -4384[rbp]
	fstp	TBYTE PTR -4224[rbp]
	fld	TBYTE PTR -4224[rbp]
	fnstcw	WORD PTR -4426[rbp]
	movzx	eax, WORD PTR -4426[rbp]
	or	ah, 12
	mov	WORD PTR -4428[rbp], ax
	fldcw	WORD PTR -4428[rbp]
	fistp	DWORD PTR -4440[rbp]
	fldcw	WORD PTR -4426[rbp]
	mov	eax, DWORD PTR -4440[rbp]
	mov	DWORD PTR -4332[rbp], eax
	mov	eax, DWORD PTR -4332[rbp]
	xchg	eax, DWORD PTR ai1[rip]
	movsd	xmm3, QWORD PTR d1[rip]
	movsd	QWORD PTR -4440[rbp], xmm3
	fld	QWORD PTR -4440[rbp]
	fstp	TBYTE PTR -4208[rbp]
	fld	TBYTE PTR -4208[rbp]
	fstp	TBYTE PTR -4400[rbp]
	mov	rax, QWORD PTR -4400[rbp]
	mov	rdx, QWORD PTR -4392[rbp]
	mov	rcx, rax
	mov	rbx, rdx
	mov	rsi, rcx
	mov	rax, rdx
	mov	ecx, 5
	mov	rdx, rax
	lea	rdi, ald1[rip]
	call	__atomic_store_16@PLT
	mov	esi, 5
	lea	rdi, acd2[rip]
	call	__atomic_load_16@PLT
	movq	xmm1, rax
	movq	xmm0, rdx
	movsd	QWORD PTR -4192[rbp], xmm1
	movsd	QWORD PTR -4184[rbp], xmm0
	movsd	xmm4, QWORD PTR -4192[rbp]
	movsd	QWORD PTR -4440[rbp], xmm4
	fld	QWORD PTR -4440[rbp]
	fstp	TBYTE PTR ld1[rip]
	movzx	eax, BYTE PTR ab1[rip]
	mov	BYTE PTR -4351[rbp], al
	movzx	eax, BYTE PTR -4351[rbp]
	mov	BYTE PTR -4350[rbp], al
	mov	esi, 5
	lea	rdi, acd1[rip]
	call	__atomic_load_16@PLT
	movq	xmm1, rax
	movq	xmm0, rdx
	movsd	QWORD PTR -4176[rbp], xmm1
	movsd	QWORD PTR -4168[rbp], xmm0
	lea	rax, -4112[rbp]
	fnstenv	[rax]
	fnclex
	stmxcsr	DWORD PTR -4404[rbp]
	mov	eax, DWORD PTR -4404[rbp]
	mov	r12d, eax
	mov	eax, r12d
	or	eax, 8064
	and	eax, -64
	mov	ebx, eax
	mov	DWORD PTR -4404[rbp], ebx
	ldmxcsr	DWORD PTR -4404[rbp]
.L3:
	movsd	xmm0, QWORD PTR -4176[rbp]
	movsd	xmm1, QWORD PTR -4168[rbp]
	movapd	xmm2, xmm0
	movzx	eax, BYTE PTR -4350[rbp]
	movzx	eax, al
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, eax
	addsd	xmm0, xmm2
	movq	rax, xmm1
	movapd	xmm1, xmm0
	movq	xmm0, rax
	movsd	QWORD PTR -4160[rbp], xmm1
	movsd	QWORD PTR -4152[rbp], xmm0
	movsd	xmm1, QWORD PTR -4160[rbp]
	movsd	xmm0, QWORD PTR -4152[rbp]
	movsd	QWORD PTR -4424[rbp], xmm1
	movsd	QWORD PTR -4416[rbp], xmm0
	mov	rax, QWORD PTR -4424[rbp]
	mov	rdx, QWORD PTR -4416[rbp]
	lea	rsi, -4176[rbp]
	mov	r9d, 5
	mov	r8d, 5
	mov	rcx, rdx
	mov	rdx, rax
	lea	rdi, acd1[rip]
	call	__atomic_compare_exchange_16@PLT
	test	al, al
	jne	.L2
	fnclex
	mov	DWORD PTR -4404[rbp], ebx
	ldmxcsr	DWORD PTR -4404[rbp]
	jmp	.L3
.L2:
	fnstsw	ax
	movzx	edx, ax
	lea	rax, -4112[rbp]
	fldenv	[rax]
	stmxcsr	DWORD PTR -4404[rbp]
	mov	eax, DWORD PTR -4404[rbp]
	or	eax, edx
	mov	DWORD PTR -4404[rbp], r12d
	ldmxcsr	DWORD PTR -4404[rbp]
	mov	edi, eax
	call	__atomic_feraiseexcept@PLT
	mov	eax, DWORD PTR ai1[rip]
	mov	DWORD PTR -4328[rbp], eax
	mov	eax, DWORD PTR -4328[rbp]
	mov	DWORD PTR -4324[rbp], eax
	mov	esi, 5
	lea	rdi, acd2[rip]
	call	__atomic_load_16@PLT
	movq	xmm1, rax
	movq	xmm0, rdx
	movsd	QWORD PTR -4144[rbp], xmm1
	movsd	QWORD PTR -4136[rbp], xmm0
	lea	rax, -4080[rbp]
	fnstenv	[rax]
	fnclex
	stmxcsr	DWORD PTR -4404[rbp]
	mov	eax, DWORD PTR -4404[rbp]
	mov	r12d, eax
	mov	eax, r12d
	or	eax, 8064
	and	eax, -64
	mov	ebx, eax
	mov	DWORD PTR -4404[rbp], ebx
	ldmxcsr	DWORD PTR -4404[rbp]
.L5:
	movsd	xmm0, QWORD PTR -4144[rbp]
	movsd	xmm2, QWORD PTR -4136[rbp]
	movapd	xmm1, xmm0
	mov	eax, DWORD PTR -4324[rbp]
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, eax
	divsd	xmm1, xmm0
	divsd	xmm2, xmm0
	movapd	xmm0, xmm2
	movsd	QWORD PTR -4128[rbp], xmm1
	movsd	QWORD PTR -4120[rbp], xmm0
	movsd	xmm1, QWORD PTR -4128[rbp]
	movsd	xmm0, QWORD PTR -4120[rbp]
	movsd	QWORD PTR -4424[rbp], xmm1
	movsd	QWORD PTR -4416[rbp], xmm0
	mov	rax, QWORD PTR -4424[rbp]
	mov	rdx, QWORD PTR -4416[rbp]
	lea	rsi, -4144[rbp]
	mov	r9d, 5
	mov	r8d, 5
	mov	rcx, rdx
	mov	rdx, rax
	lea	rdi, acd2[rip]
	call	__atomic_compare_exchange_16@PLT
	test	al, al
	jne	.L4
	fnclex
	mov	DWORD PTR -4404[rbp], ebx
	ldmxcsr	DWORD PTR -4404[rbp]
	jmp	.L5
.L4:
	fnstsw	ax
	movzx	edx, ax
	lea	rax, -4080[rbp]
	fldenv	[rax]
	stmxcsr	DWORD PTR -4404[rbp]
	mov	eax, DWORD PTR -4404[rbp]
	or	eax, edx
	mov	DWORD PTR -4404[rbp], r12d
	ldmxcsr	DWORD PTR -4404[rbp]
	mov	edi, eax
	call	__atomic_feraiseexcept@PLT
	mov	rax, QWORD PTR ap[rip]
	mov	QWORD PTR -4256[rbp], rax
	mov	rax, QWORD PTR -4256[rbp]
	mov	QWORD PTR p[rip], rax
	mov	rax, QWORD PTR p[rip]
	mov	QWORD PTR -4248[rbp], rax
	mov	rax, QWORD PTR -4248[rbp]
	xchg	rax, QWORD PTR ap[rip]
	mov	rax, QWORD PTR p[rip]
	test	rax, rax
	setne	al
	mov	BYTE PTR -4349[rbp], al
	movzx	eax, BYTE PTR -4349[rbp]
	movzx	eax, al
	xchg	al, BYTE PTR ab1[rip]
	lea	rax, -4048[rbp]
	lea	rdx, s1[rip]
	mov	ecx, 125
	mov	rdi, rax
	mov	rsi, rdx
	rep movsq
	lea	rax, -4048[rbp]
	mov	ecx, 5
	mov	rdx, rax
	lea	rsi, as1[rip]
	mov	edi, 1000
	call	__atomic_store@PLT
	lea	rax, -3040[rbp]
	mov	ecx, 5
	mov	rdx, rax
	lea	rsi, as1[rip]
	mov	edi, 1000
	call	__atomic_load@PLT
	lea	rdx, s1[rip]
	lea	rax, -3040[rbp]
	mov	ecx, 125
	mov	rdi, rdx
	mov	rsi, rax
	rep movsq
	mov	eax, DWORD PTR t1[rip]
	mov	DWORD PTR -4320[rbp], eax
	mov	eax, DWORD PTR -4320[rbp]
	xchg	eax, DWORD PTR at1[rip]
	mov	eax, DWORD PTR at1[rip]
	mov	DWORD PTR -4316[rbp], eax
	mov	eax, DWORD PTR -4316[rbp]
	mov	DWORD PTR t1[rip], eax
	mov	eax, DWORD PTR at1[rip]
	mov	DWORD PTR -4312[rbp], eax
	mov	eax, DWORD PTR -4312[rbp]
	mov	DWORD PTR -4308[rbp], eax
	mov	eax, DWORD PTR -4308[rbp]
	xchg	eax, DWORD PTR t1[rip]
	mov	eax, DWORD PTR t1[rip]
	mov	DWORD PTR -4304[rbp], eax
	mov	eax, DWORD PTR -4304[rbp]
	mov	DWORD PTR -4300[rbp], eax
	mov	eax, DWORD PTR -4300[rbp]
	xchg	eax, DWORD PTR at1[rip]
	mov	eax, DWORD PTR t1[rip]
	mov	DWORD PTR -4296[rbp], eax
	mov	eax, DWORD PTR -4296[rbp]
	mov	DWORD PTR -4292[rbp], eax
	mov	eax, DWORD PTR -4292[rbp]
	mov	edx, eax
	mov	rax, QWORD PTR atp1[rip]
	xchg	edx, DWORD PTR [rax]
	lea	rax, -2032[rbp]
	lea	rdx, u1[rip]
	mov	ecx, 125
	mov	rdi, rax
	mov	rsi, rdx
	rep movsq
	lea	rax, -2032[rbp]
	mov	ecx, 5
	mov	rdx, rax
	lea	rsi, au1[rip]
	mov	edi, 1000
	call	__atomic_store@PLT
	lea	rax, -1024[rbp]
	mov	ecx, 5
	mov	rdx, rax
	lea	rsi, au1[rip]
	mov	edi, 1000
	call	__atomic_load@PLT
	lea	rdx, u1[rip]
	lea	rax, -1024[rbp]
	mov	ecx, 125
	mov	rdi, rdx
	mov	rsi, rax
	rep movsq
	mov	eax, DWORD PTR v1[rip]
	mov	DWORD PTR -4288[rbp], eax
	mov	eax, DWORD PTR -4288[rbp]
	xchg	eax, DWORD PTR av1[rip]
	mov	eax, DWORD PTR av1[rip]
	mov	DWORD PTR -4284[rbp], eax
	mov	eax, DWORD PTR -4284[rbp]
	mov	DWORD PTR v1[rip], eax
	mov	eax, DWORD PTR av1[rip]
	mov	DWORD PTR -4280[rbp], eax
	mov	eax, DWORD PTR -4280[rbp]
	mov	DWORD PTR -4276[rbp], eax
	mov	eax, DWORD PTR -4276[rbp]
	xchg	eax, DWORD PTR v1[rip]
	mov	eax, DWORD PTR v1[rip]
	mov	DWORD PTR -4272[rbp], eax
	mov	eax, DWORD PTR -4272[rbp]
	mov	DWORD PTR -4268[rbp], eax
	mov	eax, DWORD PTR -4268[rbp]
	xchg	eax, DWORD PTR av1[rip]
	mov	DWORD PTR -4264[rbp], 1
	mov	DWORD PTR -4260[rbp], 2
	mov	eax, DWORD PTR -4260[rbp]
	mov	DWORD PTR -4264[rbp], eax
	mov	eax, DWORD PTR -4264[rbp]
	mov	DWORD PTR -4260[rbp], eax
	mov	eax, DWORD PTR -4264[rbp]
	cdqe
	mov	QWORD PTR -4240[rbp], rax
	mov	rax, QWORD PTR -4240[rbp]
	xchg	rax, QWORD PTR -4360[rbp]
	mov	rax, QWORD PTR -4360[rbp]
	mov	QWORD PTR -4232[rbp], rax
	mov	rax, QWORD PTR -4232[rbp]
	mov	DWORD PTR -4260[rbp], eax
	nop
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L7
	call	__stack_chk_fail@PLT
.L7:
	add	rsp, 4432
	pop	rbx
	pop	r12
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	func, .-func
	.globl	func2
	.type	func2, @function
func2:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	func2, .-func2
	.globl	func3
	.type	func3, @function
func3:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 8
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	mov	edi, eax
	call	func2
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	func3, .-func3
	.globl	avp
	.bss
	.align 8
	.type	avp, @object
	.size	avp, 8
avp:
	.zero	8
	.globl	aa
	.align 32
	.type	aa, @object
	.size	aa, 40
aa:
	.zero	40
	.text
	.globl	func4
	.type	func4, @function
func4:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	eax, DWORD PTR aa[rip+8]
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -12[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	sub	rdx, QWORD PTR fs:40
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	func4, .-func4
	.globl	func5
	.type	func5, @function
func5:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r12
	push	rbx
	sub	rsp, 496
	.cfi_offset 12, -24
	.cfi_offset 3, -32
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -24[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -432[rbp], 1
	mov	esi, 5
	lea	rdi, ald1[rip]
	call	__atomic_load_16@PLT
	mov	QWORD PTR -464[rbp], rax
	mov	QWORD PTR -456[rbp], rdx
	fld	TBYTE PTR -464[rbp]
	fstp	TBYTE PTR -288[rbp]
	lea	rax, -160[rbp]
	fnstenv	[rax]
	fnclex
	stmxcsr	DWORD PTR -468[rbp]
	mov	eax, DWORD PTR -468[rbp]
	mov	r12d, eax
	mov	eax, r12d
	or	eax, 8064
	and	eax, -64
	mov	ebx, eax
	mov	DWORD PTR -468[rbp], ebx
	ldmxcsr	DWORD PTR -468[rbp]
.L17:
	fld	TBYTE PTR -288[rbp]
	mov	eax, DWORD PTR -432[rbp]
	mov	DWORD PTR -500[rbp], eax
	fild	DWORD PTR -500[rbp]
	faddp	st(1), st
	fstp	TBYTE PTR -272[rbp]
	fld	TBYTE PTR -272[rbp]
	fstp	TBYTE PTR -496[rbp]
	mov	rax, QWORD PTR -496[rbp]
	mov	rdx, QWORD PTR -488[rbp]
	lea	rsi, -288[rbp]
	mov	r9d, 5
	mov	r8d, 5
	mov	rcx, rdx
	mov	rdx, rax
	lea	rdi, ald1[rip]
	call	__atomic_compare_exchange_16@PLT
	test	al, al
	jne	.L16
	fnclex
	mov	DWORD PTR -468[rbp], ebx
	ldmxcsr	DWORD PTR -468[rbp]
	jmp	.L17
.L16:
	fnstsw	ax
	movzx	edx, ax
	lea	rax, -160[rbp]
	fldenv	[rax]
	stmxcsr	DWORD PTR -468[rbp]
	mov	eax, DWORD PTR -468[rbp]
	or	eax, edx
	mov	DWORD PTR -468[rbp], r12d
	ldmxcsr	DWORD PTR -468[rbp]
	mov	edi, eax
	call	__atomic_feraiseexcept@PLT
	mov	DWORD PTR -428[rbp], 1
	mov	esi, 5
	lea	rdi, ald1[rip]
	call	__atomic_load_16@PLT
	mov	QWORD PTR -464[rbp], rax
	mov	QWORD PTR -456[rbp], rdx
	fld	TBYTE PTR -464[rbp]
	fstp	TBYTE PTR -256[rbp]
	lea	rax, -128[rbp]
	fnstenv	[rax]
	fnclex
	stmxcsr	DWORD PTR -468[rbp]
	mov	eax, DWORD PTR -468[rbp]
	mov	r12d, eax
	mov	eax, r12d
	or	eax, 8064
	and	eax, -64
	mov	ebx, eax
	mov	DWORD PTR -468[rbp], ebx
	ldmxcsr	DWORD PTR -468[rbp]
.L19:
	fld	TBYTE PTR -256[rbp]
	mov	eax, DWORD PTR -428[rbp]
	mov	DWORD PTR -500[rbp], eax
	fild	DWORD PTR -500[rbp]
	fsubp	st(1), st
	fstp	TBYTE PTR -240[rbp]
	fld	TBYTE PTR -240[rbp]
	fstp	TBYTE PTR -496[rbp]
	mov	rax, QWORD PTR -496[rbp]
	mov	rdx, QWORD PTR -488[rbp]
	lea	rsi, -256[rbp]
	mov	r9d, 5
	mov	r8d, 5
	mov	rcx, rdx
	mov	rdx, rax
	lea	rdi, ald1[rip]
	call	__atomic_compare_exchange_16@PLT
	test	al, al
	jne	.L18
	fnclex
	mov	DWORD PTR -468[rbp], ebx
	ldmxcsr	DWORD PTR -468[rbp]
	jmp	.L19
.L18:
	fnstsw	ax
	movzx	edx, ax
	lea	rax, -128[rbp]
	fldenv	[rax]
	stmxcsr	DWORD PTR -468[rbp]
	mov	eax, DWORD PTR -468[rbp]
	or	eax, edx
	mov	DWORD PTR -468[rbp], r12d
	ldmxcsr	DWORD PTR -468[rbp]
	mov	edi, eax
	call	__atomic_feraiseexcept@PLT
	mov	DWORD PTR -424[rbp], 1
	mov	esi, 5
	lea	rdi, ald1[rip]
	call	__atomic_load_16@PLT
	mov	QWORD PTR -464[rbp], rax
	mov	QWORD PTR -456[rbp], rdx
	fld	TBYTE PTR -464[rbp]
	fstp	TBYTE PTR -224[rbp]
	lea	rax, -96[rbp]
	fnstenv	[rax]
	fnclex
	stmxcsr	DWORD PTR -468[rbp]
	mov	eax, DWORD PTR -468[rbp]
	mov	r12d, eax
	mov	eax, r12d
	or	eax, 8064
	and	eax, -64
	mov	ebx, eax
	mov	DWORD PTR -468[rbp], ebx
	ldmxcsr	DWORD PTR -468[rbp]
.L21:
	fld	TBYTE PTR -224[rbp]
	mov	eax, DWORD PTR -424[rbp]
	mov	DWORD PTR -500[rbp], eax
	fild	DWORD PTR -500[rbp]
	faddp	st(1), st
	fstp	TBYTE PTR -208[rbp]
	fld	TBYTE PTR -208[rbp]
	fstp	TBYTE PTR -496[rbp]
	mov	rax, QWORD PTR -496[rbp]
	mov	rdx, QWORD PTR -488[rbp]
	lea	rsi, -224[rbp]
	mov	r9d, 5
	mov	r8d, 5
	mov	rcx, rdx
	mov	rdx, rax
	lea	rdi, ald1[rip]
	call	__atomic_compare_exchange_16@PLT
	test	al, al
	jne	.L20
	fnclex
	mov	DWORD PTR -468[rbp], ebx
	ldmxcsr	DWORD PTR -468[rbp]
	jmp	.L21
.L20:
	fnstsw	ax
	movzx	edx, ax
	lea	rax, -96[rbp]
	fldenv	[rax]
	stmxcsr	DWORD PTR -468[rbp]
	mov	eax, DWORD PTR -468[rbp]
	or	eax, edx
	mov	DWORD PTR -468[rbp], r12d
	ldmxcsr	DWORD PTR -468[rbp]
	mov	edi, eax
	call	__atomic_feraiseexcept@PLT
	mov	DWORD PTR -420[rbp], 1
	mov	esi, 5
	lea	rdi, ald1[rip]
	call	__atomic_load_16@PLT
	mov	QWORD PTR -464[rbp], rax
	mov	QWORD PTR -456[rbp], rdx
	fld	TBYTE PTR -464[rbp]
	fstp	TBYTE PTR -192[rbp]
	lea	rax, -64[rbp]
	fnstenv	[rax]
	fnclex
	stmxcsr	DWORD PTR -468[rbp]
	mov	eax, DWORD PTR -468[rbp]
	mov	r12d, eax
	mov	eax, r12d
	or	eax, 8064
	and	eax, -64
	mov	ebx, eax
	mov	DWORD PTR -468[rbp], ebx
	ldmxcsr	DWORD PTR -468[rbp]
.L23:
	fld	TBYTE PTR -192[rbp]
	mov	eax, DWORD PTR -420[rbp]
	mov	DWORD PTR -500[rbp], eax
	fild	DWORD PTR -500[rbp]
	fsubp	st(1), st
	fstp	TBYTE PTR -176[rbp]
	fld	TBYTE PTR -176[rbp]
	fstp	TBYTE PTR -496[rbp]
	mov	rax, QWORD PTR -496[rbp]
	mov	rdx, QWORD PTR -488[rbp]
	lea	rsi, -192[rbp]
	mov	r9d, 5
	mov	r8d, 5
	mov	rcx, rdx
	mov	rdx, rax
	lea	rdi, ald1[rip]
	call	__atomic_compare_exchange_16@PLT
	test	al, al
	jne	.L22
	fnclex
	mov	DWORD PTR -468[rbp], ebx
	ldmxcsr	DWORD PTR -468[rbp]
	jmp	.L23
.L22:
	fnstsw	ax
	movzx	edx, ax
	lea	rax, -64[rbp]
	fldenv	[rax]
	stmxcsr	DWORD PTR -468[rbp]
	mov	eax, DWORD PTR -468[rbp]
	or	eax, edx
	mov	DWORD PTR -468[rbp], r12d
	ldmxcsr	DWORD PTR -468[rbp]
	mov	edi, eax
	call	__atomic_feraiseexcept@PLT
	mov	DWORD PTR -416[rbp], 1
	mov	eax, DWORD PTR -416[rbp]
	lock xadd	DWORD PTR ai1[rip], eax
	mov	DWORD PTR -412[rbp], eax
	mov	DWORD PTR -408[rbp], 1
	mov	eax, DWORD PTR -408[rbp]
	neg	eax
	lock xadd	DWORD PTR ai1[rip], eax
	mov	DWORD PTR -404[rbp], eax
	mov	DWORD PTR -400[rbp], 1
	mov	eax, DWORD PTR -400[rbp]
	mov	edx, eax
	mov	eax, edx
	lock xadd	DWORD PTR ai1[rip], eax
	add	eax, edx
	mov	DWORD PTR -396[rbp], eax
	mov	DWORD PTR -392[rbp], 1
	mov	eax, DWORD PTR -392[rbp]
	neg	eax
	mov	edx, eax
	mov	eax, edx
	lock xadd	DWORD PTR ai1[rip], eax
	add	eax, edx
	mov	DWORD PTR -388[rbp], eax
	mov	DWORD PTR -384[rbp], 1
	movzx	eax, BYTE PTR ab1[rip]
	mov	BYTE PTR -440[rbp], al
.L26:
	movzx	eax, BYTE PTR -440[rbp]
	movzx	edx, al
	mov	eax, DWORD PTR -384[rbp]
	add	eax, edx
	test	eax, eax
	setne	al
	mov	BYTE PTR -439[rbp], al
	movzx	eax, BYTE PTR -439[rbp]
	movzx	ecx, al
	lea	rdx, -440[rbp]
	movzx	eax, BYTE PTR [rdx]
	lock cmpxchg	BYTE PTR ab1[rip], cl
	mov	ecx, eax
	sete	al
	test	al, al
	jne	.L24
	mov	BYTE PTR [rdx], cl
.L24:
	test	al, al
	jne	.L25
	jmp	.L26
.L25:
	mov	DWORD PTR -380[rbp], 1
	movzx	eax, BYTE PTR ab1[rip]
	mov	BYTE PTR -438[rbp], al
.L29:
	movzx	eax, BYTE PTR -438[rbp]
	movzx	eax, al
	mov	edx, DWORD PTR -380[rbp]
	sub	eax, edx
	test	eax, eax
	setne	al
	mov	BYTE PTR -437[rbp], al
	movzx	eax, BYTE PTR -437[rbp]
	movzx	ecx, al
	lea	rdx, -438[rbp]
	movzx	eax, BYTE PTR [rdx]
	lock cmpxchg	BYTE PTR ab1[rip], cl
	mov	ecx, eax
	sete	al
	test	al, al
	jne	.L27
	mov	BYTE PTR [rdx], cl
.L27:
	test	al, al
	jne	.L28
	jmp	.L29
.L28:
	mov	DWORD PTR -376[rbp], 1
	movzx	eax, BYTE PTR ab1[rip]
	mov	BYTE PTR -436[rbp], al
.L32:
	movzx	eax, BYTE PTR -436[rbp]
	movzx	edx, al
	mov	eax, DWORD PTR -376[rbp]
	add	eax, edx
	test	eax, eax
	setne	al
	mov	BYTE PTR -435[rbp], al
	movzx	eax, BYTE PTR -435[rbp]
	movzx	ecx, al
	lea	rdx, -436[rbp]
	movzx	eax, BYTE PTR [rdx]
	lock cmpxchg	BYTE PTR ab1[rip], cl
	mov	ecx, eax
	sete	al
	test	al, al
	jne	.L30
	mov	BYTE PTR [rdx], cl
.L30:
	test	al, al
	jne	.L31
	jmp	.L32
.L31:
	mov	DWORD PTR -372[rbp], 1
	movzx	eax, BYTE PTR ab1[rip]
	mov	BYTE PTR -434[rbp], al
.L35:
	movzx	eax, BYTE PTR -434[rbp]
	movzx	eax, al
	mov	edx, DWORD PTR -372[rbp]
	sub	eax, edx
	test	eax, eax
	setne	al
	mov	BYTE PTR -433[rbp], al
	movzx	eax, BYTE PTR -433[rbp]
	movzx	ecx, al
	lea	rdx, -434[rbp]
	movzx	eax, BYTE PTR [rdx]
	lock cmpxchg	BYTE PTR ab1[rip], cl
	mov	ecx, eax
	sete	al
	test	al, al
	jne	.L33
	mov	BYTE PTR [rdx], cl
.L33:
	test	al, al
	jne	.L34
	jmp	.L35
.L34:
	mov	DWORD PTR -368[rbp], 1
	mov	rax, QWORD PTR ap[rip]
	mov	QWORD PTR -352[rbp], rax
.L38:
	mov	rdx, QWORD PTR -352[rbp]
	mov	eax, DWORD PTR -368[rbp]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	QWORD PTR -344[rbp], rax
	mov	rax, QWORD PTR -344[rbp]
	mov	rcx, rax
	lea	rdx, -352[rbp]
	mov	rax, QWORD PTR [rdx]
	lock cmpxchg	QWORD PTR ap[rip], rcx
	mov	rcx, rax
	sete	al
	test	al, al
	jne	.L36
	mov	QWORD PTR [rdx], rcx
.L36:
	test	al, al
	jne	.L37
	jmp	.L38
.L37:
	mov	DWORD PTR -364[rbp], 1
	mov	rax, QWORD PTR ap[rip]
	mov	QWORD PTR -336[rbp], rax
.L41:
	mov	rdx, QWORD PTR -336[rbp]
	mov	eax, DWORD PTR -364[rbp]
	cdqe
	sal	rax, 2
	neg	rax
	add	rax, rdx
	mov	QWORD PTR -328[rbp], rax
	mov	rax, QWORD PTR -328[rbp]
	mov	rcx, rax
	lea	rdx, -336[rbp]
	mov	rax, QWORD PTR [rdx]
	lock cmpxchg	QWORD PTR ap[rip], rcx
	mov	rcx, rax
	sete	al
	test	al, al
	jne	.L39
	mov	QWORD PTR [rdx], rcx
.L39:
	test	al, al
	jne	.L40
	jmp	.L41
.L40:
	mov	DWORD PTR -360[rbp], 1
	mov	rax, QWORD PTR ap[rip]
	mov	QWORD PTR -320[rbp], rax
.L44:
	mov	rdx, QWORD PTR -320[rbp]
	mov	eax, DWORD PTR -360[rbp]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	QWORD PTR -312[rbp], rax
	mov	rax, QWORD PTR -312[rbp]
	mov	rcx, rax
	lea	rdx, -320[rbp]
	mov	rax, QWORD PTR [rdx]
	lock cmpxchg	QWORD PTR ap[rip], rcx
	mov	rcx, rax
	sete	al
	test	al, al
	jne	.L42
	mov	QWORD PTR [rdx], rcx
.L42:
	test	al, al
	jne	.L43
	jmp	.L44
.L43:
	mov	DWORD PTR -356[rbp], 1
	mov	rax, QWORD PTR ap[rip]
	mov	QWORD PTR -304[rbp], rax
.L47:
	mov	rdx, QWORD PTR -304[rbp]
	mov	eax, DWORD PTR -356[rbp]
	cdqe
	sal	rax, 2
	neg	rax
	add	rax, rdx
	mov	QWORD PTR -296[rbp], rax
	mov	rax, QWORD PTR -296[rbp]
	mov	rcx, rax
	lea	rdx, -304[rbp]
	mov	rax, QWORD PTR [rdx]
	lock cmpxchg	QWORD PTR ap[rip], rcx
	mov	rcx, rax
	sete	al
	test	al, al
	jne	.L45
	mov	QWORD PTR [rdx], rcx
.L45:
	test	al, al
	jne	.L49
	jmp	.L47
.L49:
	nop
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L48
	call	__stack_chk_fail@PLT
.L48:
	add	rsp, 496
	pop	rbx
	pop	r12
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	func5, .-func5
	.data
	.align 4
	.type	__compound_literal.0, @object
	.size	__compound_literal.0, 4
__compound_literal.0:
	.long	1
	.globl	aiclp
	.section	.data.rel.local,"aw"
	.align 8
	.type	aiclp, @object
	.size	aiclp, 8
aiclp:
	.quad	__compound_literal.0
	.text
	.globl	func6
	.type	func6, @function
func6:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	rax, QWORD PTR aiclp[rip]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -20[rbp], eax
	lea	rax, ai2[rip]
	mov	QWORD PTR -16[rbp], rax
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L51
	call	__stack_chk_fail@PLT
.L51:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	func6, .-func6
	.globl	i2
	.data
	.align 4
	.type	i2, @object
	.size	i2, 4
i2:
	.long	1
	.globl	xaip1
	.bss
	.align 8
	.type	xaip1, @object
	.size	xaip1, 8
xaip1:
	.zero	8
	.globl	xaip2
	.align 8
	.type	xaip2, @object
	.size	xaip2, 8
xaip2:
	.zero	8
	.globl	xvp1
	.align 8
	.type	xvp1, @object
	.size	xvp1, 8
xvp1:
	.zero	8
	.text
	.globl	func7
	.type	func7, @function
func7:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	rax, QWORD PTR xaip1[rip]
	mov	rdx, QWORD PTR xaip2[rip]
	sub	rax, rdx
	sar	rax, 2
	mov	DWORD PTR -4[rbp], eax
	mov	rdx, QWORD PTR xaip1[rip]
	mov	rax, QWORD PTR xaip2[rip]
	cmp	rdx, rax
	setb	al
	movzx	eax, al
	mov	DWORD PTR -4[rbp], eax
	mov	rdx, QWORD PTR xaip1[rip]
	mov	rax, QWORD PTR xaip2[rip]
	cmp	rdx, rax
	seta	al
	movzx	eax, al
	mov	DWORD PTR -4[rbp], eax
	mov	rdx, QWORD PTR xaip1[rip]
	mov	rax, QWORD PTR xaip2[rip]
	cmp	rdx, rax
	setbe	al
	movzx	eax, al
	mov	DWORD PTR -4[rbp], eax
	mov	rdx, QWORD PTR xaip1[rip]
	mov	rax, QWORD PTR xaip2[rip]
	cmp	rdx, rax
	setnb	al
	movzx	eax, al
	mov	DWORD PTR -4[rbp], eax
	mov	rdx, QWORD PTR xaip1[rip]
	mov	rax, QWORD PTR xaip2[rip]
	cmp	rdx, rax
	sete	al
	movzx	eax, al
	mov	DWORD PTR -4[rbp], eax
	mov	rdx, QWORD PTR xaip1[rip]
	mov	rax, QWORD PTR xaip2[rip]
	cmp	rdx, rax
	setne	al
	movzx	eax, al
	mov	DWORD PTR -4[rbp], eax
	mov	rdx, QWORD PTR xaip1[rip]
	mov	rax, QWORD PTR xvp1[rip]
	cmp	rdx, rax
	sete	al
	movzx	eax, al
	mov	DWORD PTR -4[rbp], eax
	mov	rdx, QWORD PTR xaip1[rip]
	mov	rax, QWORD PTR xvp1[rip]
	cmp	rdx, rax
	setne	al
	movzx	eax, al
	mov	DWORD PTR -4[rbp], eax
	mov	rdx, QWORD PTR xvp1[rip]
	mov	rax, QWORD PTR xaip1[rip]
	cmp	rdx, rax
	sete	al
	movzx	eax, al
	mov	DWORD PTR -4[rbp], eax
	mov	rdx, QWORD PTR xvp1[rip]
	mov	rax, QWORD PTR xaip1[rip]
	cmp	rdx, rax
	setne	al
	movzx	eax, al
	mov	DWORD PTR -4[rbp], eax
	mov	rax, QWORD PTR xaip1[rip]
	test	rax, rax
	sete	al
	movzx	eax, al
	mov	DWORD PTR -4[rbp], eax
	mov	rax, QWORD PTR xaip2[rip]
	test	rax, rax
	sete	al
	movzx	eax, al
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 0
	cmp	DWORD PTR -4[rbp], 0
	cmp	DWORD PTR -4[rbp], 0
	cmp	DWORD PTR -4[rbp], 0
	cmp	DWORD PTR -4[rbp], 0
	cmp	DWORD PTR -4[rbp], 0
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	func7, .-func7
	.globl	func8
	.type	func8, @function
func8:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 64
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -56[rbp], 1
	mov	eax, DWORD PTR -56[rbp]
	cdqe
	sal	rax, 2
	mov	rdx, rax
	mov	rax, rdx
	lock xadd	QWORD PTR b[rip], rax
	add	rax, rdx
	mov	QWORD PTR -48[rbp], rax
	mov	QWORD PTR -40[rbp], 2
	mov	rax, QWORD PTR -40[rbp]
	sal	rax, 2
	neg	rax
	mov	rdx, rax
	mov	rax, rdx
	lock xadd	QWORD PTR b[rip], rax
	add	rax, rdx
	mov	QWORD PTR -32[rbp], rax
	mov	DWORD PTR -52[rbp], 3
	mov	rax, QWORD PTR ap[rip]
	mov	QWORD PTR -24[rbp], rax
.L68:
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR -52[rbp]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	mov	rcx, rax
	lea	rdx, -24[rbp]
	mov	rax, QWORD PTR [rdx]
	lock cmpxchg	QWORD PTR ap[rip], rcx
	mov	rcx, rax
	sete	al
	test	al, al
	jne	.L66
	mov	QWORD PTR [rdx], rcx
.L66:
	test	al, al
	jne	.L70
	jmp	.L68
.L70:
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L69
	call	__stack_chk_fail@PLT
.L69:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	func8, .-func8
	.globl	func9
	.type	func9, @function
func9:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	QWORD PTR -24[rbp], 0
	mov	rax, QWORD PTR -24[rbp]
	xchg	rax, QWORD PTR ap[rip]
	mov	QWORD PTR -16[rbp], 0
	mov	rax, QWORD PTR -16[rbp]
	xchg	rax, QWORD PTR ap[rip]
	mov	rax, QWORD PTR atp1[rip]
	mov	QWORD PTR xvp1[rip], rax
	mov	rax, QWORD PTR xvp1[rip]
	mov	QWORD PTR atp1[rip], rax
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L72
	call	__stack_chk_fail@PLT
.L72:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	func9, .-func9
	.globl	fc1a
	.type	fc1a, @function
fc1a:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	fc1a, .-fc1a
	.globl	fc1b
	.type	fc1b, @function
fc1b:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	fc1b, .-fc1b
	.globl	fc2a
	.type	fc2a, @function
fc2a:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	fc2a, .-fc2a
	.globl	fc2b
	.type	fc2b, @function
fc2b:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	fc2b, .-fc2b
	.globl	fc3a
	.type	fc3a, @function
fc3a:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	WORD PTR -4[rbp], ax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	fc3a, .-fc3a
	.globl	fc3b
	.type	fc3b, @function
fc3b:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	WORD PTR -4[rbp], ax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	fc3b, .-fc3b
	.globl	fc4a
	.type	fc4a, @function
fc4a:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	WORD PTR -4[rbp], ax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	fc4a, .-fc4a
	.globl	fc4b
	.type	fc4b, @function
fc4b:
.LFB16:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	WORD PTR -4[rbp], ax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE16:
	.size	fc4b, .-fc4b
	.globl	func10
	.type	func10, @function
func10:
.LFB17:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -32[rbp], 1
	mov	eax, DWORD PTR -32[rbp]
	mov	ecx, eax
	mov	eax, 0
	mov	esi, 0
	cdq
	idiv	esi
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rdx
	xchg	ecx, DWORD PTR [rax]
	mov	DWORD PTR -28[rbp], 1
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	mov	eax, 0
	mov	edi, 0
	cdq
	idiv	edi
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -40[rbp]
	add	rdx, rax
	mov	eax, ecx
	lock xadd	DWORD PTR [rdx], eax
	add	eax, ecx
	mov	DWORD PTR -24[rbp], eax
	mov	eax, 0
	mov	esi, 0
	cdq
	idiv	esi
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	mov	edx, eax
	mov	rax, QWORD PTR -40[rbp]
	xchg	edx, DWORD PTR [rax]
	mov	eax, 0
	mov	edi, 0
	cdq
	idiv	edi
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	mov	ecx, eax
	mov	rdx, QWORD PTR -40[rbp]
	mov	eax, ecx
	lock xadd	DWORD PTR [rdx], eax
	add	eax, ecx
	mov	DWORD PTR -12[rbp], eax
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L82
	call	__stack_chk_fail@PLT
.L82:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE17:
	.size	func10, .-func10
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"370906.c"
	.text
	.comm	ai1,4,4
	.comm	ai2,4,4
	.comm	i1,4,4
	.comm	ald1,8,8
	.comm	ald2,8,8
	.comm	ld1,8,8
	.comm	acd1,16,8
	.comm	acd2,16,8
	.comm	d1,16,8
	.comm	ab1,1,1
	.comm	p,4,4
	.comm	ap,4,4
	.comm	as1,1000,4
	.comm	s1,1000,4
	.comm	at1,4,4
	.comm	atp1,4,4
	.comm	t1,4,4
	.comm	au1,1000,4
	.comm	u1,1000,4
	.comm	av1,4,4
	.comm	v1,4,4
	.global	__sync_synchronize
	.global	__aeabi_d2iz
	.global	__aeabi_i2d
	.global	__aeabi_dadd
	.global	__aeabi_ddiv
	.section	.rodata
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	func
	.syntax unified
	.arm
	.fpu softvfp
	.type	func, %function
func:
	@ args = 0, pretend = 0, frame = 4224
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #4224
	sub	sp, sp, #8
	sub	r3, fp, #4096
	sub	r3, r3, #28
	str	r0, [r3, #-124]
	ldr	r3, .L7
	ldr	r3, [r3]
	str	r3, [fp, #-32]
	mov	r3,#0
	ldr	r4, .L7+4
	bl	__sync_synchronize
	ldr	r4, [r4]
	bl	__sync_synchronize
	mov	r2, r4
	sub	r3, fp, #4096
	sub	r3, r3, #28
	str	r2, [r3, #-116]
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldr	r3, [r3, #-116]
	sub	r2, fp, #4096
	sub	r2, r2, #28
	str	r3, [r2, #-112]
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldr	r3, [r3, #-112]
	mov	r5, r3
	ldr	r4, .L7+8
	bl	__sync_synchronize
	str	r5, [r4]
	bl	__sync_synchronize
	ldr	r3, .L7+12
	ldr	r3, [r3]
	sub	r2, fp, #4096
	sub	r2, r2, #28
	str	r3, [r2, #-108]
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldr	r3, [r3, #-108]
	mov	r5, r3
	ldr	r4, .L7+8
	bl	__sync_synchronize
	str	r5, [r4]
	bl	__sync_synchronize
	ldr	r4, .L7+4
	bl	__sync_synchronize
	ldr	r4, [r4]
	bl	__sync_synchronize
	mov	r2, r4
	sub	r3, fp, #4096
	sub	r3, r3, #28
	str	r2, [r3, #-104]
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldr	r3, [r3, #-104]
	ldr	r2, .L7+12
	str	r3, [r2]
	mov	r1, #5
	ldr	r0, .L7+16
	bl	__atomic_load_8
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #4096
	sub	r1, r1, #28
	stmdb	r1, {r2-r3}
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldmdb	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2iz
	mov	r3, r0
	sub	r2, fp, #4096
	sub	r2, r2, #28
	str	r3, [r2, #-100]
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldr	r3, [r3, #-100]
	mov	r5, r3
	ldr	r4, .L7+8
	bl	__sync_synchronize
	str	r5, [r4]
	bl	__sync_synchronize
	ldr	r3, .L7+20
	ldmia	r3, {r2-r3}
	sub	r1, fp, #4096
	sub	r1, r1, #28
	stm	r1, {r2-r3}
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldmia	r3, {r2-r3}
	mov	r1, #5
	str	r1, [sp]
	ldr	r0, .L7+24
	bl	__atomic_store_8
	sub	r2, fp, #4096
	sub	r2, r2, #12
	sub	r2, r2, #8
	mov	r3, #5
	ldr	r1, .L7+28
	mov	r0, #16
	bl	__atomic_load
	sub	r3, fp, #4096
	sub	r3, r3, #20
	ldmia	r3, {r2-r3}
	ldr	r1, .L7+32
	stm	r1, {r2-r3}
	ldr	r4, .L7+36
	bl	__sync_synchronize
	ldrb	r4, [r4]
	bl	__sync_synchronize
	and	r3, r4, #255
	mov	r2, r3
	sub	r3, fp, #4096
	sub	r3, r3, #28
	strb	r2, [r3, #-119]
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldrb	r2, [r3, #-119]	@ zero_extendqisi2
	sub	r3, fp, #4096
	sub	r3, r3, #28
	strb	r2, [r3, #-118]
	sub	r2, fp, #4080
	sub	r2, r2, #12
	sub	r2, r2, #8
	mov	r3, #5
	ldr	r1, .L7+40
	mov	r0, #16
	bl	__atomic_load
.L3:
	sub	r3, fp, #4096
	sub	r3, r3, #4
	ldmia	r3, {r2-r3}
	ldr	r4, [fp, #-4092]
	ldr	r5, [fp, #-4088]
	mov	r6, r2
	mov	r7, r3
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldrb	r3, [r3, #-118]	@ zero_extendqisi2
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, r4
	mov	r3, r5
	str	r0, [fp, #-4084]
	str	r1, [fp, #-4080]
	str	r2, [fp, #-4076]
	str	r3, [fp, #-4072]
	sub	r3, fp, #4064
	sub	r3, r3, #12
	sub	r3, r3, #8
	sub	r2, fp, #4080
	sub	r2, r2, #12
	sub	r2, r2, #8
	mov	r1, #5
	str	r1, [sp, #4]
	mov	r1, #5
	str	r1, [sp]
	ldr	r1, .L7+40
	mov	r0, #16
	bl	__atomic_compare_exchange
	mov	r3, r0
	cmp	r3, #0
	bne	.L2
	b	.L3
.L2:
	ldr	r4, .L7+8
	bl	__sync_synchronize
	ldr	r4, [r4]
	bl	__sync_synchronize
	mov	r2, r4
	sub	r3, fp, #4096
	sub	r3, r3, #28
	str	r2, [r3, #-96]
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldr	r3, [r3, #-96]
	sub	r2, fp, #4096
	sub	r2, r2, #28
	str	r3, [r2, #-92]
	sub	r2, fp, #4048
	sub	r2, r2, #12
	sub	r2, r2, #8
	mov	r3, #5
	ldr	r1, .L7+28
	mov	r0, #16
	bl	__atomic_load
.L5:
	ldr	r2, [fp, #-4068]
	ldr	r3, [fp, #-4064]
	ldr	r6, [fp, #-4060]
	ldr	r7, [fp, #-4056]
	mov	r8, r2
	mov	r9, r3
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldr	r3, [r3, #-92]
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r4, r0
	mov	r5, r1
	mov	r2, r4
	mov	r3, r5
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r8, r2
	mov	r9, r3
	mov	r0, r6
	mov	r1, r7
	mov	r2, r4
	mov	r3, r5
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r8
	mov	r1, r9
	str	r0, [fp, #-4052]
	str	r1, [fp, #-4048]
	str	r2, [fp, #-4044]
	str	r3, [fp, #-4040]
	sub	r3, fp, #4032
	sub	r3, r3, #12
	sub	r3, r3, #8
	sub	r2, fp, #4048
	sub	r2, r2, #12
	sub	r2, r2, #8
	mov	r1, #5
	str	r1, [sp, #4]
	mov	r1, #5
	str	r1, [sp]
	ldr	r1, .L7+28
	mov	r0, #16
	bl	__atomic_compare_exchange
	mov	r3, r0
	cmp	r3, #0
	bne	.L4
	b	.L5
.L4:
	ldr	r4, .L7+44
	bl	__sync_synchronize
	ldr	r4, [r4]
	bl	__sync_synchronize
	mov	r2, r4
	sub	r3, fp, #4096
	sub	r3, r3, #28
	str	r2, [r3, #-88]
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldr	r3, [r3, #-88]
	ldr	r2, .L7+48
	str	r3, [r2]
	ldr	r3, .L7+48
	ldr	r3, [r3]
	sub	r2, fp, #4096
	sub	r2, r2, #28
	str	r3, [r2, #-84]
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldr	r3, [r3, #-84]
	mov	r5, r3
	ldr	r4, .L7+44
	bl	__sync_synchronize
	str	r5, [r4]
	bl	__sync_synchronize
	ldr	r3, .L7+48
	ldr	r3, [r3]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r2, r3, #255
	sub	r3, fp, #4096
	sub	r3, r3, #28
	strb	r2, [r3, #-117]
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldrb	r3, [r3, #-117]	@ zero_extendqisi2
	mov	r5, r3
	ldr	r4, .L7+36
	bl	__sync_synchronize
	mov	r3, r5
	strb	r3, [r4]
	bl	__sync_synchronize
	ldr	r2, .L7+52
	sub	r3, fp, #4016
	sub	r3, r3, #12
	sub	r3, r3, #4
	mov	r1, r2
	mov	r2, #1000
	mov	r0, r3
	bl	memcpy
	sub	r2, fp, #4016
	sub	r2, r2, #12
	sub	r2, r2, #4
	mov	r3, #5
	ldr	r1, .L7+56
	mov	r0, #1000
	bl	__atomic_store
	sub	r2, fp, #3008
	sub	r2, r2, #12
	sub	r2, r2, #12
	mov	r3, #5
	ldr	r1, .L7+56
	mov	r0, #1000
	bl	__atomic_load
	ldr	r3, .L7+52
	mov	r0, r3
	sub	r3, fp, #3008
	sub	r3, r3, #12
	sub	r3, r3, #12
	mov	r2, #1000
	mov	r1, r3
	bl	memcpy
	sub	r3, fp, #4096
	sub	r3, r3, #28
	mov	r2, r3
	ldr	r3, .L7+60
	ldr	r3, [r3]
	str	r3, [r2, #-80]
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldr	r4, [r3, #-80]
	ldr	r5, .L7+64
	bl	__sync_synchronize
	str	r4, [r5]
	bl	__sync_synchronize
	ldr	r4, .L7+64
	bl	__sync_synchronize
	ldr	r4, [r4]
	bl	__sync_synchronize
	sub	r3, fp, #4096
	sub	r3, r3, #28
	str	r4, [r3, #-76]
	ldr	r2, .L7+60
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldr	r3, [r3, #-76]
	str	r3, [r2]
	ldr	r4, .L7+64
	bl	__sync_synchronize
	ldr	r4, [r4]
	bl	__sync_synchronize
	mov	r2, r4
	sub	r3, fp, #4096
	sub	r3, r3, #28
	str	r2, [r3, #-72]
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldr	r3, [r3, #-72]
	sub	r2, fp, #4096
	sub	r2, r2, #28
	str	r3, [r2, #-68]
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldr	r3, [r3, #-68]
	mov	r5, r3
	ldr	r4, .L7+60
	bl	__sync_synchronize
	str	r5, [r4]
	bl	__sync_synchronize
	ldr	r4, .L7+60
	bl	__sync_synchronize
	ldr	r4, [r4]
	bl	__sync_synchronize
	mov	r2, r4
	sub	r3, fp, #4096
	sub	r3, r3, #28
	str	r2, [r3, #-64]
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldr	r3, [r3, #-64]
	sub	r2, fp, #4096
	sub	r2, r2, #28
	str	r3, [r2, #-60]
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldr	r3, [r3, #-60]
	mov	r5, r3
	ldr	r4, .L7+64
	bl	__sync_synchronize
	str	r5, [r4]
	bl	__sync_synchronize
	ldr	r4, .L7+60
	bl	__sync_synchronize
	ldr	r4, [r4]
	bl	__sync_synchronize
	mov	r2, r4
	sub	r3, fp, #4096
	sub	r3, r3, #28
	str	r2, [r3, #-56]
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldr	r3, [r3, #-56]
	sub	r2, fp, #4096
	sub	r2, r2, #28
	str	r3, [r2, #-52]
	ldr	r3, .L7+68
	ldr	r3, [r3]
	mov	r4, r3
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldr	r3, [r3, #-52]
	mov	r5, r3
	bl	__sync_synchronize
	str	r5, [r4]
	bl	__sync_synchronize
	ldr	r2, .L7+72
	sub	r3, fp, #2016
	sub	r3, r3, #12
	sub	r3, r3, #4
	mov	r1, r2
	mov	r2, #1000
	mov	r0, r3
	bl	memcpy
	sub	r2, fp, #2016
	sub	r2, r2, #12
	sub	r2, r2, #4
	mov	r3, #5
	ldr	r1, .L7+76
	mov	r0, #1000
	bl	__atomic_store
	sub	r2, fp, #1024
	sub	r2, r2, #8
	mov	r3, #5
	ldr	r1, .L7+76
	mov	r0, #1000
	bl	__atomic_load
	ldr	r3, .L7+72
	mov	r0, r3
	sub	r3, fp, #1024
	sub	r3, r3, #8
	mov	r2, #1000
	mov	r1, r3
	bl	memcpy
	sub	r3, fp, #4096
	sub	r3, r3, #28
	mov	r2, r3
	ldr	r3, .L7+80
	ldr	r3, [r3]
	str	r3, [r2, #-48]
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldr	r4, [r3, #-48]
	ldr	r5, .L7+84
	bl	__sync_synchronize
	str	r4, [r5]
	bl	__sync_synchronize
	ldr	r4, .L7+84
	bl	__sync_synchronize
	ldr	r4, [r4]
	bl	__sync_synchronize
	sub	r3, fp, #4096
	sub	r3, r3, #28
	str	r4, [r3, #-44]
	ldr	r2, .L7+80
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldr	r3, [r3, #-44]
	str	r3, [r2]
	ldr	r4, .L7+84
	bl	__sync_synchronize
	ldr	r4, [r4]
	bl	__sync_synchronize
	mov	r2, r4
	sub	r3, fp, #4096
	sub	r3, r3, #28
	str	r2, [r3, #-40]
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldr	r3, [r3, #-40]
	sub	r2, fp, #4096
	sub	r2, r2, #28
	str	r3, [r2, #-36]
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldr	r3, [r3, #-36]
	mov	r5, r3
	ldr	r4, .L7+80
	bl	__sync_synchronize
	str	r5, [r4]
	bl	__sync_synchronize
	ldr	r4, .L7+80
	bl	__sync_synchronize
	ldr	r4, [r4]
	bl	__sync_synchronize
	mov	r2, r4
	sub	r3, fp, #4096
	sub	r3, r3, #28
	str	r2, [r3, #-32]
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldr	r3, [r3, #-32]
	sub	r2, fp, #4096
	sub	r2, r2, #28
	str	r3, [r2, #-28]
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldr	r3, [r3, #-28]
	mov	r5, r3
	ldr	r4, .L7+84
	bl	__sync_synchronize
	str	r5, [r4]
	bl	__sync_synchronize
	sub	r3, fp, #4096
	sub	r3, r3, #28
	mov	r2, r3
	mov	r3, #1
	str	r3, [r2, #-24]
	sub	r3, fp, #4096
	sub	r3, r3, #28
	mov	r2, r3
	mov	r3, #2
	str	r3, [r2, #-20]
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldr	r3, [r3, #-20]
	sub	r2, fp, #4096
	sub	r2, r2, #28
	str	r3, [r2, #-24]
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldr	r3, [r3, #-24]
	sub	r2, fp, #4096
	sub	r2, r2, #28
	str	r3, [r2, #-20]
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldr	r3, [r3, #-24]
	sub	r2, fp, #4096
	sub	r2, r2, #28
	str	r3, [r2, #-16]
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldr	r3, [r3, #-16]
	mov	r5, r3
	sub	r3, fp, #4096
	sub	r3, r3, #28
	mov	r4, r3
	bl	__sync_synchronize
	str	r5, [r4, #-124]
	bl	__sync_synchronize
	sub	r3, fp, #4096
	sub	r3, r3, #28
	mov	r4, r3
	bl	__sync_synchronize
	ldr	r4, [r4, #-124]
	bl	__sync_synchronize
	mov	r2, r4
	sub	r3, fp, #4096
	sub	r3, r3, #28
	str	r2, [r3, #-12]
	sub	r3, fp, #4096
	sub	r3, r3, #28
	ldr	r3, [r3, #-12]
	sub	r2, fp, #4096
	sub	r2, r2, #28
	str	r3, [r2, #-20]
	nop
	ldr	r3, .L7
	ldr	r2, [r3]
	ldr	r3, [fp, #-32]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L6
	bl	__stack_chk_fail
.L6:
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L8:
	.align	2
.L7:
	.word	.LC0
	.word	ai2
	.word	ai1
	.word	i1
	.word	ald2
	.word	d1
	.word	ald1
	.word	acd2
	.word	ld1
	.word	ab1
	.word	acd1
	.word	ap
	.word	p
	.word	s1
	.word	as1
	.word	t1
	.word	at1
	.word	atp1
	.word	u1
	.word	au1
	.word	v1
	.word	av1
	.size	func, .-func
	.align	2
	.global	func2
	.syntax unified
	.arm
	.fpu softvfp
	.type	func2, %function
func2:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	func2, .-func2
	.align	2
	.global	func3
	.syntax unified
	.arm
	.fpu softvfp
	.type	func3, %function
func3:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r0, [fp, #-8]
	bl	func2
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	func3, .-func3
	.comm	avp,4,4
	.comm	aa,40,4
	.section	.rodata
	.align	2
.LC1:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	func4
	.syntax unified
	.arm
	.fpu softvfp
	.type	func4, %function
func4:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #12
	ldr	r3, .L16
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	mov	r3,#0
	ldr	r4, .L16+4
	bl	__sync_synchronize
	ldr	r4, [r4]
	bl	__sync_synchronize
	mov	r3, r4
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-20]
	ldr	r2, .L16
	ldr	r1, [r2]
	ldr	r2, [fp, #-16]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L15
	bl	__stack_chk_fail
.L15:
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L17:
	.align	2
.L16:
	.word	.LC1
	.word	aa+8
	.size	func4, .-func4
	.global	__aeabi_dsub
	.global	__sync_fetch_and_add_4
	.global	__sync_fetch_and_sub_4
	.global	__sync_add_and_fetch_4
	.global	__sync_sub_and_fetch_4
	.global	__sync_val_compare_and_swap_1
	.global	__sync_val_compare_and_swap_4
	.section	.rodata
	.align	2
.LC2:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	func5
	.syntax unified
	.arm
	.fpu softvfp
	.type	func5, %function
func5:
	@ args = 0, pretend = 0, frame = 192
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #200
	ldr	r3, .L53
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	mov	r3,#0
	mov	r3, #1
	str	r3, [fp, #-196]
	mov	r1, #5
	ldr	r0, .L53+4
	bl	__atomic_load_8
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-84]
	str	r3, [fp, #-80]
.L20:
	sub	r5, fp, #84
	ldmia	r5, {r4-r5}
	ldr	r3, [fp, #-196]
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	mov	r0, #5
	str	r0, [sp, #4]
	mov	r0, #5
	str	r0, [sp]
	ldr	r0, .L53+4
	bl	__atomic_compare_exchange_8
	mov	r3, r0
	cmp	r3, #0
	bne	.L19
	b	.L20
.L19:
	mov	r3, #1
	str	r3, [fp, #-192]
	mov	r1, #5
	ldr	r0, .L53+4
	bl	__atomic_load_8
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-68]
	str	r3, [fp, #-64]
.L22:
	sub	r5, fp, #68
	ldmia	r5, {r4-r5}
	ldr	r3, [fp, #-192]
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-60]
	str	r3, [fp, #-56]
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	sub	r1, fp, #68
	mov	r0, #5
	str	r0, [sp, #4]
	mov	r0, #5
	str	r0, [sp]
	ldr	r0, .L53+4
	bl	__atomic_compare_exchange_8
	mov	r3, r0
	cmp	r3, #0
	bne	.L21
	b	.L22
.L21:
	mov	r3, #1
	str	r3, [fp, #-188]
	mov	r1, #5
	ldr	r0, .L53+4
	bl	__atomic_load_8
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-52]
	str	r3, [fp, #-48]
.L24:
	sub	r5, fp, #52
	ldmia	r5, {r4-r5}
	ldr	r3, [fp, #-188]
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #52
	mov	r0, #5
	str	r0, [sp, #4]
	mov	r0, #5
	str	r0, [sp]
	ldr	r0, .L53+4
	bl	__atomic_compare_exchange_8
	mov	r3, r0
	cmp	r3, #0
	bne	.L23
	b	.L24
.L23:
	mov	r3, #1
	str	r3, [fp, #-184]
	mov	r1, #5
	ldr	r0, .L53+4
	bl	__atomic_load_8
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
.L26:
	sub	r5, fp, #36
	ldmia	r5, {r4-r5}
	ldr	r3, [fp, #-184]
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	sub	r1, fp, #36
	mov	r0, #5
	str	r0, [sp, #4]
	mov	r0, #5
	str	r0, [sp]
	ldr	r0, .L53+4
	bl	__atomic_compare_exchange_8
	mov	r3, r0
	cmp	r3, #0
	bne	.L25
	b	.L26
.L25:
	mov	r3, #1
	str	r3, [fp, #-180]
	ldr	r3, [fp, #-180]
	mov	r2, r3
	ldr	r3, .L53+8
	mov	r1, r2
	mov	r0, r3
	bl	__sync_fetch_and_add_4
	mov	r3, r0
	str	r3, [fp, #-176]
	mov	r3, #1
	str	r3, [fp, #-172]
	ldr	r3, [fp, #-172]
	mov	r2, r3
	ldr	r3, .L53+8
	mov	r1, r2
	mov	r0, r3
	bl	__sync_fetch_and_sub_4
	mov	r3, r0
	str	r3, [fp, #-168]
	mov	r3, #1
	str	r3, [fp, #-164]
	ldr	r3, [fp, #-164]
	mov	r2, r3
	ldr	r3, .L53+8
	mov	r1, r2
	mov	r0, r3
	bl	__sync_add_and_fetch_4
	mov	r3, r0
	str	r3, [fp, #-160]
	mov	r3, #1
	str	r3, [fp, #-156]
	ldr	r3, [fp, #-156]
	mov	r2, r3
	ldr	r3, .L53+8
	mov	r1, r2
	mov	r0, r3
	bl	__sync_sub_and_fetch_4
	mov	r3, r0
	str	r3, [fp, #-152]
	mov	r3, #1
	str	r3, [fp, #-148]
	ldr	r4, .L53+12
	bl	__sync_synchronize
	ldrb	r4, [r4]
	bl	__sync_synchronize
	and	r3, r4, #255
	strb	r3, [fp, #-204]
.L29:
	ldrb	r3, [fp, #-204]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, [fp, #-148]
	add	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	strb	r3, [fp, #-203]
	ldrb	r3, [fp, #-203]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r0, .L53+12
	sub	r4, fp, #204
	ldrb	r5, [r4]
	lsl	r3, r5, #24
	asr	r1, r3, #24
	lsl	r3, r2, #24
	asr	r3, r3, #24
	mov	r2, r3
	bl	__sync_val_compare_and_swap_1
	mov	r3, r0
	and	r1, r3, #255
	and	r2, r5, #255
	cmp	r1, r2
	moveq	r2, #1
	movne	r2, #0
	cmp	r2, #0
	bne	.L27
	strb	r3, [r4]
.L27:
	mov	r3, r2
	cmp	r3, #0
	bne	.L28
	b	.L29
.L28:
	mov	r3, #1
	str	r3, [fp, #-144]
	ldr	r4, .L53+12
	bl	__sync_synchronize
	ldrb	r4, [r4]
	bl	__sync_synchronize
	and	r3, r4, #255
	strb	r3, [fp, #-202]
.L32:
	ldrb	r3, [fp, #-202]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, [fp, #-144]
	sub	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	strb	r3, [fp, #-201]
	ldrb	r3, [fp, #-201]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r0, .L53+12
	sub	r4, fp, #202
	ldrb	r5, [r4]
	lsl	r3, r5, #24
	asr	r1, r3, #24
	lsl	r3, r2, #24
	asr	r3, r3, #24
	mov	r2, r3
	bl	__sync_val_compare_and_swap_1
	mov	r3, r0
	and	r1, r3, #255
	and	r2, r5, #255
	cmp	r1, r2
	moveq	r2, #1
	movne	r2, #0
	cmp	r2, #0
	bne	.L30
	strb	r3, [r4]
.L30:
	mov	r3, r2
	cmp	r3, #0
	bne	.L31
	b	.L32
.L31:
	mov	r3, #1
	str	r3, [fp, #-140]
	ldr	r4, .L53+12
	bl	__sync_synchronize
	ldrb	r4, [r4]
	bl	__sync_synchronize
	and	r3, r4, #255
	strb	r3, [fp, #-200]
.L35:
	ldrb	r3, [fp, #-200]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, [fp, #-140]
	add	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	strb	r3, [fp, #-199]
	ldrb	r3, [fp, #-199]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r0, .L53+12
	sub	r4, fp, #200
	ldrb	r5, [r4]
	lsl	r3, r5, #24
	asr	r1, r3, #24
	lsl	r3, r2, #24
	asr	r3, r3, #24
	mov	r2, r3
	bl	__sync_val_compare_and_swap_1
	mov	r3, r0
	and	r1, r3, #255
	and	r2, r5, #255
	cmp	r1, r2
	moveq	r2, #1
	movne	r2, #0
	cmp	r2, #0
	bne	.L33
	strb	r3, [r4]
.L33:
	mov	r3, r2
	cmp	r3, #0
	bne	.L34
	b	.L35
.L34:
	mov	r3, #1
	str	r3, [fp, #-136]
	ldr	r4, .L53+12
	bl	__sync_synchronize
	ldrb	r4, [r4]
	bl	__sync_synchronize
	and	r3, r4, #255
	strb	r3, [fp, #-198]
.L38:
	ldrb	r3, [fp, #-198]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, [fp, #-136]
	sub	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	strb	r3, [fp, #-197]
	ldrb	r3, [fp, #-197]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r0, .L53+12
	sub	r4, fp, #198
	ldrb	r5, [r4]
	lsl	r3, r5, #24
	asr	r1, r3, #24
	lsl	r3, r2, #24
	asr	r3, r3, #24
	mov	r2, r3
	bl	__sync_val_compare_and_swap_1
	mov	r3, r0
	and	r1, r3, #255
	and	r2, r5, #255
	cmp	r1, r2
	moveq	r2, #1
	movne	r2, #0
	cmp	r2, #0
	bne	.L36
	strb	r3, [r4]
.L36:
	mov	r3, r2
	cmp	r3, #0
	bne	.L37
	b	.L38
.L37:
	mov	r3, #1
	str	r3, [fp, #-132]
	ldr	r4, .L53+16
	bl	__sync_synchronize
	ldr	r4, [r4]
	bl	__sync_synchronize
	mov	r3, r4
	str	r3, [fp, #-128]
.L41:
	ldr	r2, [fp, #-128]
	ldr	r3, [fp, #-132]
	lsl	r3, r3, #2
	add	r3, r2, r3
	str	r3, [fp, #-124]
	ldr	r3, [fp, #-124]
	mov	r2, r3
	ldr	r3, .L53+16
	sub	r4, fp, #128
	ldr	r5, [r4]
	mov	r1, r5
	mov	r0, r3
	bl	__sync_val_compare_and_swap_4
	mov	r3, r0
	cmp	r3, r5
	moveq	r2, #1
	movne	r2, #0
	cmp	r2, #0
	bne	.L39
	str	r3, [r4]
.L39:
	mov	r3, r2
	cmp	r3, #0
	bne	.L40
	b	.L41
.L40:
	mov	r3, #1
	str	r3, [fp, #-120]
	ldr	r4, .L53+16
	bl	__sync_synchronize
	ldr	r4, [r4]
	bl	__sync_synchronize
	mov	r3, r4
	str	r3, [fp, #-116]
.L44:
	ldr	r2, [fp, #-116]
	ldr	r3, [fp, #-120]
	lsl	r3, r3, #2
	rsb	r3, r3, #0
	add	r3, r2, r3
	str	r3, [fp, #-112]
	ldr	r3, [fp, #-112]
	mov	r2, r3
	ldr	r3, .L53+16
	sub	r4, fp, #116
	ldr	r5, [r4]
	mov	r1, r5
	mov	r0, r3
	bl	__sync_val_compare_and_swap_4
	mov	r3, r0
	cmp	r3, r5
	moveq	r2, #1
	movne	r2, #0
	cmp	r2, #0
	bne	.L42
	str	r3, [r4]
.L42:
	mov	r3, r2
	cmp	r3, #0
	bne	.L43
	b	.L44
.L43:
	mov	r3, #1
	str	r3, [fp, #-108]
	ldr	r4, .L53+16
	bl	__sync_synchronize
	ldr	r4, [r4]
	bl	__sync_synchronize
	mov	r3, r4
	str	r3, [fp, #-104]
.L47:
	ldr	r2, [fp, #-104]
	ldr	r3, [fp, #-108]
	lsl	r3, r3, #2
	add	r3, r2, r3
	str	r3, [fp, #-100]
	ldr	r3, [fp, #-100]
	mov	r2, r3
	ldr	r3, .L53+16
	sub	r4, fp, #104
	ldr	r5, [r4]
	mov	r1, r5
	mov	r0, r3
	bl	__sync_val_compare_and_swap_4
	mov	r3, r0
	cmp	r3, r5
	moveq	r2, #1
	movne	r2, #0
	cmp	r2, #0
	bne	.L45
	str	r3, [r4]
.L45:
	mov	r3, r2
	cmp	r3, #0
	bne	.L46
	b	.L47
.L46:
	mov	r3, #1
	str	r3, [fp, #-96]
	ldr	r4, .L53+16
	bl	__sync_synchronize
	ldr	r4, [r4]
	bl	__sync_synchronize
	mov	r3, r4
	str	r3, [fp, #-92]
.L50:
	ldr	r2, [fp, #-92]
	ldr	r3, [fp, #-96]
	lsl	r3, r3, #2
	rsb	r3, r3, #0
	add	r3, r2, r3
	str	r3, [fp, #-88]
	ldr	r3, [fp, #-88]
	mov	r2, r3
	ldr	r3, .L53+16
	sub	r4, fp, #92
	ldr	r5, [r4]
	mov	r1, r5
	mov	r0, r3
	bl	__sync_val_compare_and_swap_4
	mov	r3, r0
	cmp	r3, r5
	moveq	r2, #1
	movne	r2, #0
	cmp	r2, #0
	bne	.L48
	str	r3, [r4]
.L48:
	mov	r3, r2
	cmp	r3, #0
	bne	.L52
	b	.L50
.L52:
	nop
	ldr	r3, .L53
	ldr	r2, [r3]
	ldr	r3, [fp, #-16]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L51
	bl	__stack_chk_fail
.L51:
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L54:
	.align	2
.L53:
	.word	.LC2
	.word	ald1
	.word	ai1
	.word	ab1
	.word	ap
	.size	func5, .-func5
	.data
	.align	2
	.type	__compound_literal.0, %object
	.size	__compound_literal.0, 4
__compound_literal.0:
	.word	1
	.global	aiclp
	.align	2
	.type	aiclp, %object
	.size	aiclp, 4
aiclp:
	.word	__compound_literal.0
	.section	.rodata
	.align	2
.LC3:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	func6
	.syntax unified
	.arm
	.fpu softvfp
	.type	func6, %function
func6:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	ldr	r3, .L57
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	mov	r3,#0
	ldr	r3, .L57+4
	ldr	r4, [r3]
	bl	__sync_synchronize
	ldr	r4, [r4]
	bl	__sync_synchronize
	mov	r3, r4
	str	r3, [fp, #-28]
	ldr	r3, [fp, #-28]
	str	r3, [fp, #-24]
	ldr	r3, .L57+8
	str	r3, [fp, #-20]
	nop
	ldr	r3, .L57
	ldr	r2, [r3]
	ldr	r3, [fp, #-16]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L56
	bl	__stack_chk_fail
.L56:
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L58:
	.align	2
.L57:
	.word	.LC3
	.word	aiclp
	.word	ai2
	.size	func6, .-func6
	.global	i2
	.data
	.align	2
	.type	i2, %object
	.size	i2, 4
i2:
	.word	1
	.comm	xaip1,4,4
	.comm	xaip2,4,4
	.comm	xvp1,4,4
	.text
	.align	2
	.global	func7
	.syntax unified
	.arm
	.fpu softvfp
	.type	func7, %function
func7:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	ldr	r3, .L72
	ldr	r2, [r3]
	ldr	r3, .L72+4
	ldr	r3, [r3]
	sub	r3, r2, r3
	asr	r3, r3, #2
	str	r3, [fp, #-8]
	ldr	r3, .L72
	ldr	r2, [r3]
	ldr	r3, .L72+4
	ldr	r3, [r3]
	cmp	r2, r3
	movcc	r3, #1
	movcs	r3, #0
	and	r3, r3, #255
	str	r3, [fp, #-8]
	ldr	r3, .L72
	ldr	r2, [r3]
	ldr	r3, .L72+4
	ldr	r3, [r3]
	cmp	r2, r3
	movhi	r3, #1
	movls	r3, #0
	and	r3, r3, #255
	str	r3, [fp, #-8]
	ldr	r3, .L72
	ldr	r2, [r3]
	ldr	r3, .L72+4
	ldr	r3, [r3]
	cmp	r2, r3
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	str	r3, [fp, #-8]
	ldr	r3, .L72
	ldr	r2, [r3]
	ldr	r3, .L72+4
	ldr	r3, [r3]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	str	r3, [fp, #-8]
	ldr	r3, .L72
	ldr	r2, [r3]
	ldr	r3, .L72+4
	ldr	r3, [r3]
	cmp	r2, r3
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	str	r3, [fp, #-8]
	ldr	r3, .L72
	ldr	r2, [r3]
	ldr	r3, .L72+4
	ldr	r3, [r3]
	cmp	r2, r3
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	str	r3, [fp, #-8]
	ldr	r3, .L72
	ldr	r2, [r3]
	ldr	r3, .L72+8
	ldr	r3, [r3]
	cmp	r2, r3
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	str	r3, [fp, #-8]
	ldr	r3, .L72
	ldr	r2, [r3]
	ldr	r3, .L72+8
	ldr	r3, [r3]
	cmp	r2, r3
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	str	r3, [fp, #-8]
	ldr	r3, .L72+8
	ldr	r2, [r3]
	ldr	r3, .L72
	ldr	r3, [r3]
	cmp	r2, r3
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	str	r3, [fp, #-8]
	ldr	r3, .L72+8
	ldr	r2, [r3]
	ldr	r3, .L72
	ldr	r3, [r3]
	cmp	r2, r3
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	str	r3, [fp, #-8]
	ldr	r3, .L72
	ldr	r3, [r3]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	str	r3, [fp, #-8]
	ldr	r3, .L72+4
	ldr	r3, [r3]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L73:
	.align	2
.L72:
	.word	xaip1
	.word	xaip2
	.word	xvp1
	.size	func7, .-func7
	.section	.rodata
	.align	2
.LC4:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	func8
	.syntax unified
	.arm
	.fpu softvfp
	.type	func8, %function
func8:
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #40
	ldr	r3, .L80
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	mov	r3,#0
	mov	r3, #1
	str	r3, [fp, #-52]
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #2
	mov	r2, r3
	ldr	r3, .L80+4
	mov	r1, r2
	mov	r0, r3
	bl	__sync_add_and_fetch_4
	mov	r3, r0
	str	r3, [fp, #-48]
	mov	r2, #2
	mov	r3, #0
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	mov	r3, r2
	lsl	r3, r3, #2
	mov	r2, r3
	ldr	r3, .L80+4
	mov	r1, r2
	mov	r0, r3
	bl	__sync_sub_and_fetch_4
	mov	r3, r0
	str	r3, [fp, #-44]
	mov	r3, #3
	str	r3, [fp, #-40]
	ldr	r4, .L80+8
	bl	__sync_synchronize
	ldr	r4, [r4]
	bl	__sync_synchronize
	mov	r3, r4
	str	r3, [fp, #-36]
.L77:
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #2
	add	r3, r2, r3
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-32]
	mov	r2, r3
	ldr	r3, .L80+8
	sub	r4, fp, #36
	ldr	r5, [r4]
	mov	r1, r5
	mov	r0, r3
	bl	__sync_val_compare_and_swap_4
	mov	r3, r0
	cmp	r3, r5
	moveq	r2, #1
	movne	r2, #0
	cmp	r2, #0
	bne	.L75
	str	r3, [r4]
.L75:
	mov	r3, r2
	cmp	r3, #0
	bne	.L79
	b	.L77
.L79:
	nop
	ldr	r3, .L80
	ldr	r2, [r3]
	ldr	r3, [fp, #-16]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L78
	bl	__stack_chk_fail
.L78:
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L81:
	.align	2
.L80:
	.word	.LC4
	.word	b
	.word	ap
	.size	func8, .-func8
	.section	.rodata
	.align	2
.LC5:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	func9
	.syntax unified
	.arm
	.fpu softvfp
	.type	func9, %function
func9:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #16
	ldr	r3, .L84
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	mov	r3,#0
	mov	r3, #0
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-24]
	mov	r5, r3
	ldr	r4, .L84+4
	bl	__sync_synchronize
	str	r5, [r4]
	bl	__sync_synchronize
	mov	r3, #0
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-20]
	mov	r5, r3
	ldr	r4, .L84+4
	bl	__sync_synchronize
	str	r5, [r4]
	bl	__sync_synchronize
	ldr	r3, .L84+8
	ldr	r3, [r3]
	ldr	r2, .L84+12
	str	r3, [r2]
	ldr	r3, .L84+12
	ldr	r3, [r3]
	ldr	r2, .L84+8
	str	r3, [r2]
	nop
	ldr	r3, .L84
	ldr	r2, [r3]
	ldr	r3, [fp, #-16]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L83
	bl	__stack_chk_fail
.L83:
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L85:
	.align	2
.L84:
	.word	.LC5
	.word	ap
	.word	atp1
	.word	xvp1
	.size	func9, .-func9
	.align	2
	.global	fc1a
	.syntax unified
	.arm
	.fpu softvfp
	.type	fc1a, %function
fc1a:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	fc1a, .-fc1a
	.align	2
	.global	fc1b
	.syntax unified
	.arm
	.fpu softvfp
	.type	fc1b, %function
fc1b:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	fc1b, .-fc1b
	.align	2
	.global	fc2a
	.syntax unified
	.arm
	.fpu softvfp
	.type	fc2a, %function
fc2a:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	fc2a, .-fc2a
	.align	2
	.global	fc2b
	.syntax unified
	.arm
	.fpu softvfp
	.type	fc2b, %function
fc2b:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	fc2b, .-fc2b
	.align	2
	.global	fc3a
	.syntax unified
	.arm
	.fpu softvfp
	.type	fc3a, %function
fc3a:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	strh	r3, [fp, #-8]	@ movhi
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	fc3a, .-fc3a
	.align	2
	.global	fc3b
	.syntax unified
	.arm
	.fpu softvfp
	.type	fc3b, %function
fc3b:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	strh	r3, [fp, #-8]	@ movhi
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	fc3b, .-fc3b
	.align	2
	.global	fc4a
	.syntax unified
	.arm
	.fpu softvfp
	.type	fc4a, %function
fc4a:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	strh	r3, [fp, #-8]	@ movhi
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	fc4a, .-fc4a
	.align	2
	.global	fc4b
	.syntax unified
	.arm
	.fpu softvfp
	.type	fc4b, %function
fc4b:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	strh	r3, [fp, #-8]	@ movhi
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	fc4b, .-fc4b
	.global	__aeabi_idiv
	.section	.rodata
	.align	2
.LC6:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	func10
	.syntax unified
	.arm
	.fpu softvfp
	.type	func10, %function
func10:
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #40
	str	r0, [fp, #-48]
	ldr	r3, .L96
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	mov	r3,#0
	mov	r3, #1
	str	r3, [fp, #-40]
	mov	r3, #0
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_idiv
	mov	r3, r0
	lsl	r3, r3, #2
	ldr	r2, [fp, #-48]
	add	r4, r2, r3
	ldr	r3, [fp, #-40]
	mov	r5, r3
	bl	__sync_synchronize
	str	r5, [r4]
	bl	__sync_synchronize
	mov	r3, #1
	str	r3, [fp, #-36]
	mov	r3, #0
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_idiv
	mov	r3, r0
	lsl	r3, r3, #2
	ldr	r2, [fp, #-48]
	add	r3, r2, r3
	ldr	r2, [fp, #-36]
	mov	r1, r2
	mov	r0, r3
	bl	__sync_add_and_fetch_4
	mov	r3, r0
	str	r3, [fp, #-32]
	mov	r3, #0
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_idiv
	mov	r3, r0
	str	r3, [fp, #-28]
	ldr	r3, [fp, #-28]
	mov	r5, r3
	ldr	r4, [fp, #-48]
	bl	__sync_synchronize
	str	r5, [r4]
	bl	__sync_synchronize
	mov	r3, #0
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_idiv
	mov	r3, r0
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-24]
	mov	r2, r3
	ldr	r3, [fp, #-48]
	mov	r1, r2
	mov	r0, r3
	bl	__sync_add_and_fetch_4
	mov	r3, r0
	str	r3, [fp, #-20]
	nop
	ldr	r3, .L96
	ldr	r2, [r3]
	ldr	r3, [fp, #-16]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L95
	bl	__stack_chk_fail
.L95:
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L97:
	.align	2
.L96:
	.word	.LC6
	.size	func10, .-func10
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
