	.file	"780242.c"
	.intel_syntax noprefix
	.text
	.globl	blk
	.bss
	.align 32
	.type	blk, @object
	.size	blk, 5600
blk:
	.zero	5600
	.globl	val
	.align 32
	.type	val, @object
	.size	val, 800072
val:
	.zero	800072
	.text
	.globl	sss
	.type	sss, @function
sss:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	DWORD PTR -36[rbp], edi
	mov	DWORD PTR -40[rbp], esi
	mov	eax, DWORD PTR -36[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, 1570730897
	shr	rdx, 32
	sar	edx, 7
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, blk[rip]
	mov	eax, DWORD PTR [rdx+rax]
	test	eax, eax
	jne	.L2
	mov	eax, DWORD PTR -36[rbp]
	mov	DWORD PTR -20[rbp], eax
	jmp	.L3
.L5:
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, val[rip]
	mov	rax, QWORD PTR [rdx+rax]
	pxor	xmm1, xmm1
	cvtsi2sd	xmm1, rax
	movq	rax, xmm1
	movq	xmm0, rax
	call	sqrt@PLT
	cvttsd2si	rax, xmm0
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, 1570730897
	shr	rdx, 32
	sar	edx, 7
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	movsx	rdx, eax
	mov	rcx, rdx
	sal	rcx, 4
	lea	rdx, blk[rip+8]
	mov	rdx, QWORD PTR [rcx+rdx]
	mov	ecx, DWORD PTR -20[rbp]
	movsx	rcx, ecx
	lea	rsi, 0[0+rcx*8]
	lea	rcx, val[rip]
	mov	rsi, QWORD PTR [rsi+rcx]
	mov	rcx, rdx
	sub	rcx, rsi
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, blk[rip+8]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -20[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, 1570730897
	shr	rdx, 32
	sar	edx, 7
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	movsx	rdx, eax
	mov	rcx, rdx
	sal	rcx, 4
	lea	rdx, blk[rip+8]
	mov	rcx, QWORD PTR [rcx+rdx]
	mov	edx, DWORD PTR -12[rbp]
	movsx	rdx, edx
	add	rcx, rdx
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, blk[rip+8]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	mov	edx, DWORD PTR -20[rbp]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	lea	rdx, val[rip]
	mov	QWORD PTR [rcx+rdx], rax
	add	DWORD PTR -20[rbp], 1
.L3:
	mov	eax, DWORD PTR -20[rbp]
	cmp	eax, DWORD PTR -40[rbp]
	jg	.L4
	mov	edx, DWORD PTR -20[rbp]
	movsx	rax, edx
	imul	rax, rax, 1570730897
	shr	rax, 32
	sar	eax, 7
	mov	ecx, edx
	sar	ecx, 31
	sub	eax, ecx
	imul	ecx, eax, 350
	mov	eax, edx
	sub	eax, ecx
	test	eax, eax
	jne	.L5
.L4:
	mov	eax, DWORD PTR -36[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, 1570730897
	shr	rdx, 32
	sar	edx, 7
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, blk[rip+8]
	mov	rdx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -36[rbp]
	movsx	rcx, eax
	imul	rcx, rcx, 1570730897
	shr	rcx, 32
	sar	ecx, 7
	sar	eax, 31
	mov	esi, eax
	mov	eax, ecx
	sub	eax, esi
	cdqe
	sal	rax, 4
	mov	rcx, rax
	lea	rax, blk[rip+4]
	mov	eax, DWORD PTR [rcx+rax]
	cdqe
	cmp	rdx, rax
	jne	.L6
	mov	eax, DWORD PTR -36[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, 1570730897
	shr	rdx, 32
	sar	edx, 7
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, blk[rip]
	mov	DWORD PTR [rdx+rax], 1
	jmp	.L6
.L2:
	mov	eax, DWORD PTR -36[rbp]
	sub	eax, 1
	movsx	rdx, eax
	imul	rdx, rdx, 1570730897
	shr	rdx, 32
	sar	edx, 7
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	add	eax, 1
	imul	eax, eax, 350
	mov	DWORD PTR -20[rbp], eax
.L6:
	sub	DWORD PTR -40[rbp], 350
	jmp	.L7
.L11:
	mov	eax, DWORD PTR -20[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, 1570730897
	shr	rdx, 32
	sar	edx, 7
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, blk[rip]
	mov	eax, DWORD PTR [rdx+rax]
	test	eax, eax
	jne	.L8
	mov	DWORD PTR -16[rbp], 0
	jmp	.L9
.L10:
	mov	edx, DWORD PTR -20[rbp]
	mov	eax, DWORD PTR -16[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, val[rip]
	mov	rax, QWORD PTR [rdx+rax]
	pxor	xmm2, xmm2
	cvtsi2sd	xmm2, rax
	movq	rax, xmm2
	movq	xmm0, rax
	call	sqrt@PLT
	cvttsd2si	rax, xmm0
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, 1570730897
	shr	rdx, 32
	sar	edx, 7
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	movsx	rdx, eax
	mov	rcx, rdx
	sal	rcx, 4
	lea	rdx, blk[rip+8]
	mov	rdx, QWORD PTR [rcx+rdx]
	mov	esi, DWORD PTR -20[rbp]
	mov	ecx, DWORD PTR -16[rbp]
	add	ecx, esi
	movsx	rcx, ecx
	lea	rsi, 0[0+rcx*8]
	lea	rcx, val[rip]
	mov	rsi, QWORD PTR [rsi+rcx]
	mov	rcx, rdx
	sub	rcx, rsi
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, blk[rip+8]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -20[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, 1570730897
	shr	rdx, 32
	sar	edx, 7
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	movsx	rdx, eax
	mov	rcx, rdx
	sal	rcx, 4
	lea	rdx, blk[rip+8]
	mov	rcx, QWORD PTR [rcx+rdx]
	mov	edx, DWORD PTR -4[rbp]
	movsx	rdx, edx
	add	rcx, rdx
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, blk[rip+8]
	mov	QWORD PTR [rdx+rax], rcx
	mov	edx, DWORD PTR -20[rbp]
	mov	eax, DWORD PTR -16[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	lea	rdx, val[rip]
	mov	QWORD PTR [rcx+rdx], rax
	add	DWORD PTR -16[rbp], 1
.L9:
	cmp	DWORD PTR -16[rbp], 349
	jle	.L10
	mov	eax, DWORD PTR -20[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, 1570730897
	shr	rdx, 32
	sar	edx, 7
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, blk[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	movsx	rdx, eax
	mov	eax, DWORD PTR -20[rbp]
	movsx	rcx, eax
	imul	rcx, rcx, 1570730897
	shr	rcx, 32
	sar	ecx, 7
	sar	eax, 31
	mov	esi, eax
	mov	eax, ecx
	sub	eax, esi
	cdqe
	sal	rax, 4
	mov	rcx, rax
	lea	rax, blk[rip+8]
	mov	rax, QWORD PTR [rcx+rax]
	cmp	rdx, rax
	jne	.L8
	mov	eax, DWORD PTR -20[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, 1570730897
	shr	rdx, 32
	sar	edx, 7
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, blk[rip]
	mov	DWORD PTR [rdx+rax], 1
.L8:
	add	DWORD PTR -20[rbp], 350
.L7:
	mov	eax, DWORD PTR -20[rbp]
	cmp	eax, DWORD PTR -40[rbp]
	jle	.L11
	add	DWORD PTR -40[rbp], 350
	mov	eax, DWORD PTR -40[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, 1570730897
	shr	rdx, 32
	sar	edx, 7
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, blk[rip]
	mov	eax, DWORD PTR [rdx+rax]
	test	eax, eax
	jne	.L15
	jmp	.L13
.L14:
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, val[rip]
	mov	rax, QWORD PTR [rdx+rax]
	pxor	xmm3, xmm3
	cvtsi2sd	xmm3, rax
	movq	rax, xmm3
	movq	xmm0, rax
	call	sqrt@PLT
	cvttsd2si	rax, xmm0
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, 1570730897
	shr	rdx, 32
	sar	edx, 7
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	movsx	rdx, eax
	mov	rcx, rdx
	sal	rcx, 4
	lea	rdx, blk[rip+8]
	mov	rdx, QWORD PTR [rcx+rdx]
	mov	ecx, DWORD PTR -20[rbp]
	movsx	rcx, ecx
	lea	rsi, 0[0+rcx*8]
	lea	rcx, val[rip]
	mov	rsi, QWORD PTR [rsi+rcx]
	mov	rcx, rdx
	sub	rcx, rsi
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, blk[rip+8]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -20[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, 1570730897
	shr	rdx, 32
	sar	edx, 7
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	movsx	rdx, eax
	mov	rcx, rdx
	sal	rcx, 4
	lea	rdx, blk[rip+8]
	mov	rcx, QWORD PTR [rcx+rdx]
	mov	edx, DWORD PTR -8[rbp]
	movsx	rdx, edx
	add	rcx, rdx
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, blk[rip+8]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -8[rbp]
	cdqe
	mov	edx, DWORD PTR -20[rbp]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	lea	rdx, val[rip]
	mov	QWORD PTR [rcx+rdx], rax
	add	DWORD PTR -20[rbp], 1
.L13:
	mov	eax, DWORD PTR -20[rbp]
	cmp	eax, DWORD PTR -40[rbp]
	jle	.L14
	mov	eax, DWORD PTR -40[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, 1570730897
	shr	rdx, 32
	sar	edx, 7
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, blk[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	movsx	rdx, eax
	mov	eax, DWORD PTR -40[rbp]
	movsx	rcx, eax
	imul	rcx, rcx, 1570730897
	shr	rcx, 32
	sar	ecx, 7
	sar	eax, 31
	mov	esi, eax
	mov	eax, ecx
	sub	eax, esi
	cdqe
	sal	rax, 4
	mov	rcx, rax
	lea	rax, blk[rip+8]
	mov	rax, QWORD PTR [rcx+rax]
	cmp	rdx, rax
	jne	.L15
	mov	eax, DWORD PTR -40[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, 1570730897
	shr	rdx, 32
	sar	edx, 7
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, blk[rip]
	mov	DWORD PTR [rdx+rax], 1
.L15:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	sss, .-sss
	.globl	qry
	.type	qry, @function
qry:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	QWORD PTR -8[rbp], 0
	mov	eax, DWORD PTR -20[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, 1570730897
	shr	rdx, 32
	sar	edx, 7
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, blk[rip]
	mov	eax, DWORD PTR [rdx+rax]
	test	eax, eax
	je	.L17
	mov	eax, DWORD PTR -20[rbp]
	sub	eax, 1
	movsx	rdx, eax
	imul	rdx, rdx, 1570730897
	shr	rdx, 32
	sar	edx, 7
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	add	eax, 1
	imul	eax, eax, 350
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	add	eax, 1
	cmp	DWORD PTR -12[rbp], eax
	jle	.L18
	mov	eax, DWORD PTR -24[rbp]
	add	eax, 1
	mov	DWORD PTR -12[rbp], eax
.L18:
	mov	eax, DWORD PTR -12[rbp]
	sub	eax, DWORD PTR -20[rbp]
	cdqe
	add	QWORD PTR -8[rbp], rax
	jmp	.L19
.L17:
	mov	eax, DWORD PTR -20[rbp]
	mov	DWORD PTR -12[rbp], eax
	jmp	.L20
.L21:
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, val[rip]
	mov	rax, QWORD PTR [rdx+rax]
	add	QWORD PTR -8[rbp], rax
	add	DWORD PTR -12[rbp], 1
.L20:
	mov	eax, DWORD PTR -12[rbp]
	cmp	eax, DWORD PTR -24[rbp]
	jg	.L19
	mov	edx, DWORD PTR -12[rbp]
	movsx	rax, edx
	imul	rax, rax, 1570730897
	shr	rax, 32
	sar	eax, 7
	mov	ecx, edx
	sar	ecx, 31
	sub	eax, ecx
	imul	ecx, eax, 350
	mov	eax, edx
	sub	eax, ecx
	test	eax, eax
	jne	.L21
.L19:
	sub	DWORD PTR -24[rbp], 350
	jmp	.L22
.L23:
	mov	eax, DWORD PTR -12[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, 1570730897
	shr	rdx, 32
	sar	edx, 7
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, blk[rip+8]
	mov	rax, QWORD PTR [rdx+rax]
	add	QWORD PTR -8[rbp], rax
	add	DWORD PTR -12[rbp], 350
.L22:
	mov	eax, DWORD PTR -12[rbp]
	cmp	eax, DWORD PTR -24[rbp]
	jle	.L23
	add	DWORD PTR -24[rbp], 350
	mov	eax, DWORD PTR -24[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, 1570730897
	shr	rdx, 32
	sar	edx, 7
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, blk[rip]
	mov	eax, DWORD PTR [rdx+rax]
	test	eax, eax
	je	.L26
	mov	eax, DWORD PTR -24[rbp]
	sub	eax, DWORD PTR -12[rbp]
	add	eax, 1
	cdqe
	add	QWORD PTR -8[rbp], rax
	jmp	.L25
.L27:
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, val[rip]
	mov	rax, QWORD PTR [rdx+rax]
	add	QWORD PTR -8[rbp], rax
	add	DWORD PTR -12[rbp], 1
.L26:
	mov	eax, DWORD PTR -12[rbp]
	cmp	eax, DWORD PTR -24[rbp]
	jle	.L27
.L25:
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	qry, .-qry
	.section	.rodata
.LC0:
	.string	"%lld"
.LC1:
	.string	"%d"
.LC2:
	.string	"%d%d%d"
.LC3:
	.string	"%lld\n"
	.text
	.globl	solve
	.type	solve, @function
solve:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	DWORD PTR -36[rbp], edi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -16[rbp], 0
	jmp	.L30
.L31:
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, val[rip]
	add	rax, rdx
	mov	rsi, rax
	lea	rdi, .LC0[rip]
	mov	eax, 0
	call	__isoc99_scanf@PLT
	mov	eax, DWORD PTR -16[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, 1570730897
	shr	rdx, 32
	sar	edx, 7
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	movsx	rdx, eax
	mov	rcx, rdx
	sal	rcx, 4
	lea	rdx, blk[rip+4]
	mov	edx, DWORD PTR [rcx+rdx]
	lea	ecx, 1[rdx]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, blk[rip+4]
	mov	DWORD PTR [rdx+rax], ecx
	mov	eax, DWORD PTR -16[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, 1570730897
	shr	rdx, 32
	sar	edx, 7
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	movsx	rdx, eax
	mov	rcx, rdx
	sal	rcx, 4
	lea	rdx, blk[rip+8]
	mov	rsi, QWORD PTR [rcx+rdx]
	mov	edx, DWORD PTR -16[rbp]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	lea	rdx, val[rip]
	mov	rdx, QWORD PTR [rcx+rdx]
	lea	rcx, [rsi+rdx]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, blk[rip+8]
	mov	QWORD PTR [rdx+rax], rcx
	add	DWORD PTR -16[rbp], 1
.L30:
	mov	eax, DWORD PTR -16[rbp]
	cmp	eax, DWORD PTR -36[rbp]
	jl	.L31
	lea	rax, -32[rbp]
	mov	rsi, rax
	lea	rdi, .LC1[rip]
	mov	eax, 0
	call	__isoc99_scanf@PLT
	jmp	.L32
.L36:
	lea	rcx, -20[rbp]
	lea	rdx, -24[rbp]
	lea	rax, -28[rbp]
	mov	rsi, rax
	lea	rdi, .LC2[rip]
	mov	eax, 0
	call	__isoc99_scanf@PLT
	mov	eax, DWORD PTR -24[rbp]
	sub	eax, 1
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	sub	eax, 1
	mov	DWORD PTR -20[rbp], eax
	mov	edx, DWORD PTR -24[rbp]
	mov	eax, DWORD PTR -20[rbp]
	cmp	edx, eax
	jle	.L33
	mov	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -12[rbp]
	mov	DWORD PTR -20[rbp], eax
.L33:
	mov	eax, DWORD PTR -28[rbp]
	test	eax, eax
	jne	.L34
	mov	edx, DWORD PTR -20[rbp]
	mov	eax, DWORD PTR -24[rbp]
	mov	esi, edx
	mov	edi, eax
	call	sss
	jmp	.L32
.L34:
	mov	edx, DWORD PTR -20[rbp]
	mov	eax, DWORD PTR -24[rbp]
	mov	esi, edx
	mov	edi, eax
	call	qry
	mov	rsi, rax
	lea	rdi, .LC3[rip]
	mov	eax, 0
	call	printf@PLT
.L32:
	mov	eax, DWORD PTR -32[rbp]
	lea	edx, -1[rax]
	mov	DWORD PTR -32[rbp], edx
	test	eax, eax
	jne	.L36
	mov	eax, 0
	mov	rdi, QWORD PTR -8[rbp]
	sub	rdi, QWORD PTR fs:40
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	solve, .-solve
	.section	.rodata
.LC4:
	.string	"Case #%d:\n"
	.text
	.globl	main
	.type	main, @function
main:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -12[rbp], 1
	jmp	.L40
.L41:
	mov	eax, DWORD PTR -12[rbp]
	lea	edx, 1[rax]
	mov	DWORD PTR -12[rbp], edx
	mov	esi, eax
	lea	rdi, .LC4[rip]
	mov	eax, 0
	call	printf@PLT
	mov	edx, 5600
	mov	esi, 0
	lea	rdi, blk[rip]
	call	memset@PLT
	mov	edx, 800072
	mov	esi, 0
	lea	rdi, val[rip]
	call	memset@PLT
	mov	eax, DWORD PTR -16[rbp]
	mov	edi, eax
	call	solve
	mov	edi, 10
	call	putchar@PLT
.L40:
	lea	rax, -16[rbp]
	mov	rsi, rax
	lea	rdi, .LC1[rip]
	mov	eax, 0
	call	__isoc99_scanf@PLT
	cmp	eax, 1
	je	.L41
	mov	eax, 0
	mov	rcx, QWORD PTR -8[rbp]
	sub	rcx, QWORD PTR fs:40
	je	.L43
	call	__stack_chk_fail@PLT
.L43:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	main, .-main
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"780242.c"
	.text
	.comm	blk,5600,8
	.comm	val,800072,8
	.global	__aeabi_l2d
	.global	__aeabi_d2lz
	.align	2
	.global	sss
	.syntax unified
	.arm
	.fpu softvfp
	.type	sss, %function
sss:
	@ args = 0, pretend = 0, frame = 56
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #56
	str	r0, [fp, #-56]
	str	r1, [fp, #-60]
	ldr	r1, [fp, #-56]
	ldr	r3, .L16
	smull	r2, r3, r1, r3
	asr	r2, r3, #7
	asr	r3, r1, #31
	sub	r3, r2, r3
	ldr	r2, .L16+4
	ldr	r3, [r2, r3, lsl #4]
	cmp	r3, #0
	bne	.L2
	ldr	r3, [fp, #-56]
	str	r3, [fp, #-48]
	b	.L3
.L5:
	ldr	r2, .L16+8
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_l2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	sqrt
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2lz
	mov	r2, r0
	mov	r3, r1
	mov	r3, r2
	str	r3, [fp, #-40]
	ldr	r1, [fp, #-48]
	ldr	r3, .L16
	smull	r2, r3, r1, r3
	asr	r2, r3, #7
	asr	r3, r1, #31
	sub	ip, r2, r3
	ldr	r2, .L16+4
	lsl	r3, ip, #4
	add	r3, r2, r3
	add	r3, r3, #8
	ldmia	r3, {r0-r1}
	ldr	r2, .L16+8
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	subs	lr, r0, r2
	str	lr, [fp, #-68]
	sbc	r3, r1, r3
	str	r3, [fp, #-64]
	ldr	r2, .L16+4
	lsl	r3, ip, #4
	add	r3, r2, r3
	add	r3, r3, #8
	sub	r2, fp, #68
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r1, [fp, #-48]
	ldr	r3, .L16
	smull	r2, r3, r1, r3
	asr	r2, r3, #7
	asr	r3, r1, #31
	sub	ip, r2, r3
	ldr	r2, .L16+4
	lsl	r3, ip, #4
	add	r3, r2, r3
	add	r3, r3, #8
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-40]
	mov	r2, r3
	asr	r3, r2, #31
	adds	lr, r0, r2
	str	lr, [fp, #-76]
	adc	r3, r1, r3
	str	r3, [fp, #-72]
	ldr	r2, .L16+4
	lsl	r3, ip, #4
	add	r3, r2, r3
	add	r3, r3, #8
	sub	r2, fp, #76
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r3, [fp, #-40]
	mov	r0, r3
	asr	r1, r0, #31
	ldr	r2, .L16+8
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	add	r3, r2, r3
	stm	r3, {r0-r1}
	ldr	r3, [fp, #-48]
	add	r3, r3, #1
	str	r3, [fp, #-48]
.L3:
	ldr	r2, [fp, #-48]
	ldr	r3, [fp, #-60]
	cmp	r2, r3
	bgt	.L4
	ldr	r1, [fp, #-48]
	ldr	r3, .L16
	smull	r2, r3, r1, r3
	asr	r2, r3, #7
	asr	r3, r1, #31
	sub	r2, r2, r3
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #3
	sub	r2, r2, r3
	lsl	r3, r2, #1
	mov	r2, r3
	sub	r2, r1, r2
	cmp	r2, #0
	bne	.L5
.L4:
	ldr	r3, [fp, #-56]
	ldr	r2, .L16
	smull	r1, r2, r3, r2
	asr	r2, r2, #7
	asr	r3, r3, #31
	sub	r3, r2, r3
	ldr	r2, .L16+4
	lsl	r3, r3, #4
	add	r3, r2, r3
	add	r3, r3, #8
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-56]
	ldr	r2, .L16
	smull	ip, r2, r3, r2
	asr	r2, r2, #7
	asr	r3, r3, #31
	sub	r3, r2, r3
	ldr	r2, .L16+4
	lsl	r3, r3, #4
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	mov	r2, r3
	asr	r3, r2, #31
	cmp	r1, r3
	cmpeq	r0, r2
	bne	.L6
	ldr	r3, [fp, #-56]
	ldr	r2, .L16
	smull	r1, r2, r3, r2
	asr	r2, r2, #7
	asr	r3, r3, #31
	sub	r3, r2, r3
	ldr	r2, .L16+4
	mov	r1, #1
	str	r1, [r2, r3, lsl #4]
	b	.L6
.L2:
	ldr	r3, [fp, #-56]
	sub	r3, r3, #1
	ldr	r2, .L16
	smull	r1, r2, r3, r2
	asr	r2, r2, #7
	asr	r3, r3, #31
	sub	r3, r2, r3
	add	r2, r3, #1
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #3
	sub	r2, r2, r3
	lsl	r3, r2, #1
	mov	r2, r3
	str	r2, [fp, #-48]
.L6:
	ldr	r3, [fp, #-60]
	sub	r3, r3, #348
	sub	r3, r3, #2
	str	r3, [fp, #-60]
	b	.L7
.L11:
	ldr	r3, [fp, #-48]
	ldr	r2, .L16
	smull	r1, r2, r3, r2
	asr	r2, r2, #7
	asr	r3, r3, #31
	sub	r3, r2, r3
	ldr	r2, .L16+4
	ldr	r3, [r2, r3, lsl #4]
	cmp	r3, #0
	bne	.L8
	mov	r3, #0
	str	r3, [fp, #-44]
	b	.L9
.L10:
	ldr	r2, [fp, #-48]
	ldr	r3, [fp, #-44]
	add	r3, r2, r3
	ldr	r2, .L16+8
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_l2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	sqrt
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2lz
	mov	r2, r0
	mov	r3, r1
	mov	r3, r2
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-48]
	ldr	r2, .L16
	smull	r1, r2, r3, r2
	asr	r2, r2, #7
	asr	r3, r3, #31
	sub	ip, r2, r3
	ldr	r2, .L16+4
	lsl	r3, ip, #4
	add	r3, r2, r3
	add	r3, r3, #8
	ldmia	r3, {r0-r1}
	ldr	r2, [fp, #-48]
	ldr	r3, [fp, #-44]
	add	r3, r2, r3
	ldr	r2, .L16+8
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	subs	r8, r0, r2
	sbc	r9, r1, r3
	ldr	r2, .L16+4
	lsl	r3, ip, #4
	add	r3, r2, r3
	add	r3, r3, #8
	stm	r3, {r8-r9}
	ldr	r3, [fp, #-48]
	ldr	r2, .L16
	smull	r1, r2, r3, r2
	asr	r2, r2, #7
	asr	r3, r3, #31
	sub	ip, r2, r3
	ldr	r2, .L16+4
	lsl	r3, ip, #4
	add	r3, r2, r3
	add	r3, r3, #8
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-32]
	mov	r2, r3
	asr	r3, r2, #31
	adds	lr, r0, r2
	str	lr, [fp, #-84]
	adc	r3, r1, r3
	str	r3, [fp, #-80]
	ldr	r2, .L16+4
	lsl	r3, ip, #4
	add	r3, r2, r3
	add	r3, r3, #8
	sub	r2, fp, #84
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, [fp, #-48]
	ldr	r3, [fp, #-44]
	add	r1, r2, r3
	ldr	r3, [fp, #-32]
	mov	r2, r3
	asr	r3, r2, #31
	ldr	r0, .L16+8
	lsl	r1, r1, #3
	add	r1, r0, r1
	stm	r1, {r2-r3}
	ldr	r3, [fp, #-44]
	add	r3, r3, #1
	str	r3, [fp, #-44]
.L9:
	ldr	r3, [fp, #-44]
	ldr	r2, .L16+12
	cmp	r3, r2
	ble	.L10
	ldr	r3, [fp, #-48]
	ldr	r2, .L16
	smull	r1, r2, r3, r2
	asr	r2, r2, #7
	asr	r3, r3, #31
	sub	r3, r2, r3
	ldr	r2, .L16+4
	lsl	r3, r3, #4
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	mov	r0, r3
	asr	r1, r0, #31
	ldr	r3, [fp, #-48]
	ldr	r2, .L16
	smull	ip, r2, r3, r2
	asr	r2, r2, #7
	asr	r3, r3, #31
	sub	r3, r2, r3
	ldr	r2, .L16+4
	lsl	r3, r3, #4
	add	r3, r2, r3
	add	r3, r3, #8
	ldmia	r3, {r2-r3}
	cmp	r1, r3
	cmpeq	r0, r2
	bne	.L8
	ldr	r3, [fp, #-48]
	ldr	r2, .L16
	smull	r1, r2, r3, r2
	asr	r2, r2, #7
	asr	r3, r3, #31
	sub	r3, r2, r3
	ldr	r2, .L16+4
	mov	r1, #1
	str	r1, [r2, r3, lsl #4]
.L8:
	ldr	r3, [fp, #-48]
	add	r3, r3, #348
	add	r3, r3, #2
	str	r3, [fp, #-48]
.L7:
	ldr	r2, [fp, #-48]
	ldr	r3, [fp, #-60]
	cmp	r2, r3
	ble	.L11
	ldr	r3, [fp, #-60]
	add	r3, r3, #348
	add	r3, r3, #2
	str	r3, [fp, #-60]
	ldr	r3, [fp, #-60]
	ldr	r2, .L16
	smull	r1, r2, r3, r2
	asr	r2, r2, #7
	asr	r3, r3, #31
	sub	r3, r2, r3
	ldr	r2, .L16+4
	ldr	r3, [r2, r3, lsl #4]
	cmp	r3, #0
	bne	.L15
	b	.L13
.L14:
	ldr	r2, .L16+8
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_l2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	sqrt
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2lz
	mov	r2, r0
	mov	r3, r1
	mov	r3, r2
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-48]
	ldr	r2, .L16
	smull	r1, r2, r3, r2
	asr	r2, r2, #7
	asr	r3, r3, #31
	sub	ip, r2, r3
	ldr	r2, .L16+4
	lsl	r3, ip, #4
	add	r3, r2, r3
	add	r3, r3, #8
	ldmia	r3, {r0-r1}
	ldr	r2, .L16+8
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	subs	r4, r0, r2
	sbc	r5, r1, r3
	ldr	r2, .L16+4
	lsl	r3, ip, #4
	add	r3, r2, r3
	add	r3, r3, #8
	stm	r3, {r4-r5}
	ldr	r3, [fp, #-48]
	ldr	r2, .L16
	smull	r1, r2, r3, r2
	asr	r2, r2, #7
	asr	r3, r3, #31
	sub	ip, r2, r3
	ldr	r2, .L16+4
	lsl	r3, ip, #4
	add	r3, r2, r3
	add	r3, r3, #8
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	mov	r2, r3
	asr	r3, r2, #31
	adds	r6, r0, r2
	adc	r7, r1, r3
	ldr	r2, .L16+4
	lsl	r3, ip, #4
	add	r3, r2, r3
	add	r3, r3, #8
	stm	r3, {r6-r7}
	ldr	r3, [fp, #-36]
	mov	r2, r3
	asr	r3, r2, #31
	ldr	r0, .L16+8
	ldr	r1, [fp, #-48]
	lsl	r1, r1, #3
	add	r1, r0, r1
	stm	r1, {r2-r3}
	ldr	r3, [fp, #-48]
	add	r3, r3, #1
	str	r3, [fp, #-48]
.L13:
	ldr	r2, [fp, #-48]
	ldr	r3, [fp, #-60]
	cmp	r2, r3
	ble	.L14
	ldr	r3, [fp, #-60]
	ldr	r2, .L16
	smull	r1, r2, r3, r2
	asr	r2, r2, #7
	asr	r3, r3, #31
	sub	r3, r2, r3
	ldr	r2, .L16+4
	lsl	r3, r3, #4
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	mov	r0, r3
	asr	r1, r0, #31
	ldr	r3, [fp, #-60]
	ldr	r2, .L16
	smull	ip, r2, r3, r2
	asr	r2, r2, #7
	asr	r3, r3, #31
	sub	r3, r2, r3
	ldr	r2, .L16+4
	lsl	r3, r3, #4
	add	r3, r2, r3
	add	r3, r3, #8
	ldmia	r3, {r2-r3}
	cmp	r1, r3
	cmpeq	r0, r2
	bne	.L15
	ldr	r3, [fp, #-60]
	ldr	r2, .L16
	smull	r1, r2, r3, r2
	asr	r2, r2, #7
	asr	r3, r3, #31
	sub	r3, r2, r3
	ldr	r2, .L16+4
	mov	r1, #1
	str	r1, [r2, r3, lsl #4]
.L15:
	nop
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L17:
	.align	2
.L16:
	.word	1570730897
	.word	blk
	.word	val
	.word	349
	.size	sss, .-sss
	.align	2
	.global	qry
	.syntax unified
	.arm
	.fpu softvfp
	.type	qry, %function
qry:
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #44
	str	r0, [fp, #-48]
	str	r1, [fp, #-52]
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-48]
	ldr	r2, .L31
	smull	r1, r2, r3, r2
	asr	r2, r2, #7
	asr	r3, r3, #31
	sub	r3, r2, r3
	ldr	r2, .L31+4
	ldr	r3, [r2, r3, lsl #4]
	cmp	r3, #0
	beq	.L19
	ldr	r3, [fp, #-48]
	sub	r3, r3, #1
	ldr	r2, .L31
	smull	r1, r2, r3, r2
	asr	r2, r2, #7
	asr	r3, r3, #31
	sub	r3, r2, r3
	add	r2, r3, #1
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #3
	sub	r2, r2, r3
	lsl	r3, r2, #1
	mov	r2, r3
	str	r2, [fp, #-40]
	ldr	r3, [fp, #-52]
	add	r3, r3, #1
	ldr	r2, [fp, #-40]
	cmp	r2, r3
	ble	.L20
	ldr	r3, [fp, #-52]
	add	r3, r3, #1
	str	r3, [fp, #-40]
.L20:
	ldr	r2, [fp, #-40]
	ldr	r3, [fp, #-48]
	sub	r3, r2, r3
	mov	r2, r3
	asr	r3, r2, #31
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	adds	ip, r0, r2
	str	ip, [fp, #-60]
	adc	r3, r1, r3
	str	r3, [fp, #-56]
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	b	.L21
.L19:
	ldr	r3, [fp, #-48]
	str	r3, [fp, #-40]
	b	.L22
.L23:
	ldr	r2, .L31+8
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	adds	ip, r0, r2
	str	ip, [fp, #-68]
	adc	r3, r1, r3
	str	r3, [fp, #-64]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-40]
	add	r3, r3, #1
	str	r3, [fp, #-40]
.L22:
	ldr	r2, [fp, #-40]
	ldr	r3, [fp, #-52]
	cmp	r2, r3
	bgt	.L21
	ldr	r1, [fp, #-40]
	ldr	r3, .L31
	smull	r2, r3, r1, r3
	asr	r2, r3, #7
	asr	r3, r1, #31
	sub	r2, r2, r3
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #3
	sub	r2, r2, r3
	lsl	r3, r2, #1
	mov	r2, r3
	sub	r2, r1, r2
	cmp	r2, #0
	bne	.L23
.L21:
	ldr	r3, [fp, #-52]
	sub	r3, r3, #348
	sub	r3, r3, #2
	str	r3, [fp, #-52]
	b	.L24
.L25:
	ldr	r3, [fp, #-40]
	ldr	r2, .L31
	smull	r1, r2, r3, r2
	asr	r2, r2, #7
	asr	r3, r3, #31
	sub	r3, r2, r3
	ldr	r2, .L31+4
	lsl	r3, r3, #4
	add	r3, r2, r3
	add	r3, r3, #8
	ldmia	r3, {r2-r3}
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	adds	r8, r0, r2
	adc	r9, r1, r3
	str	r8, [fp, #-36]
	str	r9, [fp, #-32]
	ldr	r3, [fp, #-40]
	add	r3, r3, #348
	add	r3, r3, #2
	str	r3, [fp, #-40]
.L24:
	ldr	r2, [fp, #-40]
	ldr	r3, [fp, #-52]
	cmp	r2, r3
	ble	.L25
	ldr	r3, [fp, #-52]
	add	r3, r3, #348
	add	r3, r3, #2
	str	r3, [fp, #-52]
	ldr	r3, [fp, #-52]
	ldr	r2, .L31
	smull	r1, r2, r3, r2
	asr	r2, r2, #7
	asr	r3, r3, #31
	sub	r3, r2, r3
	ldr	r2, .L31+4
	ldr	r3, [r2, r3, lsl #4]
	cmp	r3, #0
	beq	.L28
	ldr	r2, [fp, #-52]
	ldr	r3, [fp, #-40]
	sub	r3, r2, r3
	add	r3, r3, #1
	mov	r2, r3
	asr	r3, r2, #31
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	adds	r6, r0, r2
	adc	r7, r1, r3
	str	r6, [fp, #-36]
	str	r7, [fp, #-32]
	b	.L27
.L29:
	ldr	r2, .L31+8
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	adds	r4, r0, r2
	adc	r5, r1, r3
	str	r4, [fp, #-36]
	str	r5, [fp, #-32]
	ldr	r3, [fp, #-40]
	add	r3, r3, #1
	str	r3, [fp, #-40]
.L28:
	ldr	r2, [fp, #-40]
	ldr	r3, [fp, #-52]
	cmp	r2, r3
	ble	.L29
.L27:
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
.L32:
	.align	2
.L31:
	.word	1570730897
	.word	blk
	.word	val
	.size	qry, .-qry
	.section	.rodata
	.align	2
.LC0:
	.ascii	"%lld\000"
	.align	2
.LC1:
	.ascii	"%d\000"
	.align	2
.LC2:
	.ascii	"%d%d%d\000"
	.align	2
.LC3:
	.ascii	"%lld\012\000"
	.align	2
.LC4:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	solve
	.syntax unified
	.arm
	.fpu softvfp
	.type	solve, %function
solve:
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #40
	str	r0, [fp, #-48]
	ldr	r3, .L43
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	mov	r3,#0
	mov	r3, #0
	str	r3, [fp, #-24]
	b	.L34
.L35:
	ldr	r3, [fp, #-24]
	lsl	r3, r3, #3
	ldr	r2, .L43+4
	add	r3, r3, r2
	mov	r1, r3
	ldr	r0, .L43+8
	bl	__isoc99_scanf
	ldr	r3, [fp, #-24]
	ldr	r2, .L43+12
	smull	r1, r2, r3, r2
	asr	r2, r2, #7
	asr	r3, r3, #31
	sub	r2, r2, r3
	ldr	r1, .L43+16
	lsl	r3, r2, #4
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	add	r1, r3, #1
	ldr	r0, .L43+16
	lsl	r3, r2, #4
	add	r3, r0, r3
	str	r1, [r3, #4]
	ldr	r3, [fp, #-24]
	ldr	r2, .L43+12
	smull	r1, r2, r3, r2
	asr	r2, r2, #7
	asr	r3, r3, #31
	sub	ip, r2, r3
	ldr	r2, .L43+16
	lsl	r3, ip, #4
	add	r3, r2, r3
	add	r3, r3, #8
	ldmia	r3, {r0-r1}
	ldr	r2, .L43+4
	ldr	r3, [fp, #-24]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	adds	r4, r0, r2
	adc	r5, r1, r3
	ldr	r2, .L43+16
	lsl	r3, ip, #4
	add	r3, r2, r3
	add	r3, r3, #8
	stm	r3, {r4-r5}
	ldr	r3, [fp, #-24]
	add	r3, r3, #1
	str	r3, [fp, #-24]
.L34:
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-48]
	cmp	r2, r3
	blt	.L35
	sub	r3, fp, #40
	mov	r1, r3
	ldr	r0, .L43+20
	bl	__isoc99_scanf
	b	.L36
.L40:
	sub	r3, fp, #28
	sub	r2, fp, #32
	sub	r1, fp, #36
	ldr	r0, .L43+24
	bl	__isoc99_scanf
	ldr	r3, [fp, #-32]
	sub	r3, r3, #1
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-28]
	sub	r3, r3, #1
	str	r3, [fp, #-28]
	ldr	r2, [fp, #-32]
	ldr	r3, [fp, #-28]
	cmp	r2, r3
	ble	.L37
	ldr	r3, [fp, #-32]
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-28]
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-20]
	str	r3, [fp, #-28]
.L37:
	ldr	r3, [fp, #-36]
	cmp	r3, #0
	bne	.L38
	ldr	r3, [fp, #-32]
	ldr	r2, [fp, #-28]
	mov	r1, r2
	mov	r0, r3
	bl	sss
	b	.L36
.L38:
	ldr	r3, [fp, #-32]
	ldr	r2, [fp, #-28]
	mov	r1, r2
	mov	r0, r3
	bl	qry
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L43+28
	bl	printf
.L36:
	ldr	r3, [fp, #-40]
	sub	r2, r3, #1
	str	r2, [fp, #-40]
	cmp	r3, #0
	bne	.L40
	mov	r3, #0
	ldr	r2, .L43
	ldr	r1, [r2]
	ldr	r2, [fp, #-16]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L42
	bl	__stack_chk_fail
.L42:
	mov	r0, r3
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L44:
	.align	2
.L43:
	.word	.LC4
	.word	val
	.word	.LC0
	.word	1570730897
	.word	blk
	.word	.LC1
	.word	.LC2
	.word	.LC3
	.size	solve, .-solve
	.section	.rodata
	.align	2
.LC5:
	.ascii	"Case #%d:\012\000"
	.align	2
.LC6:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	ldr	r3, .L50
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	mov	r3, #1
	str	r3, [fp, #-12]
	b	.L46
.L47:
	ldr	r3, [fp, #-12]
	add	r2, r3, #1
	str	r2, [fp, #-12]
	mov	r1, r3
	ldr	r0, .L50+4
	bl	printf
	ldr	r2, .L50+8
	mov	r1, #0
	ldr	r0, .L50+12
	bl	memset
	ldr	r2, .L50+16
	mov	r1, #0
	ldr	r0, .L50+20
	bl	memset
	ldr	r3, [fp, #-16]
	mov	r0, r3
	bl	solve
	mov	r0, #10
	bl	putchar
.L46:
	sub	r3, fp, #16
	mov	r1, r3
	ldr	r0, .L50+24
	bl	__isoc99_scanf
	mov	r3, r0
	cmp	r3, #1
	beq	.L47
	mov	r3, #0
	ldr	r2, .L50
	ldr	r1, [r2]
	ldr	r2, [fp, #-8]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L49
	bl	__stack_chk_fail
.L49:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L51:
	.align	2
.L50:
	.word	.LC6
	.word	.LC5
	.word	5600
	.word	blk
	.word	800072
	.word	val
	.word	.LC1
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
