	.file	"325800.c"
	.intel_syntax noprefix
	.text
	.globl	__VERIFIER_nondet_bool
	.type	__VERIFIER_nondet_bool, @function
__VERIFIER_nondet_bool:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	__VERIFIER_nondet_int@PLT
	test	eax, eax
	setne	al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	__VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
	.globl	_diverge_delta
	.bss
	.align 4
	.type	_diverge_delta, @object
	.size	_diverge_delta, 4
_diverge_delta:
	.zero	4
	.globl	_x__diverge_delta
	.align 4
	.type	_x__diverge_delta, @object
	.size	_x__diverge_delta, 4
_x__diverge_delta:
	.zero	4
	.globl	pc4_x
	.align 4
	.type	pc4_x, @object
	.size	pc4_x, 4
pc4_x:
	.zero	4
	.globl	_x_pc4_x
	.align 4
	.type	_x_pc4_x, @object
	.size	_x_pc4_x, 4
_x_pc4_x:
	.zero	4
	.globl	pc3_l0
	.type	pc3_l0, @object
	.size	pc3_l0, 1
pc3_l0:
	.zero	1
	.globl	_x_pc3_l0
	.type	_x_pc3_l0, @object
	.size	_x_pc3_l0, 1
_x_pc3_l0:
	.zero	1
	.globl	pc3_evt1
	.type	pc3_evt1, @object
	.size	pc3_evt1, 1
pc3_evt1:
	.zero	1
	.globl	_x_pc3_evt1
	.type	_x_pc3_evt1, @object
	.size	_x_pc3_evt1, 1
_x_pc3_evt1:
	.zero	1
	.globl	pc2_l2
	.type	pc2_l2, @object
	.size	pc2_l2, 1
pc2_l2:
	.zero	1
	.globl	_x_pc2_l2
	.type	_x_pc2_l2, @object
	.size	_x_pc2_l2, 1
_x_pc2_l2:
	.zero	1
	.globl	pc2_l1
	.type	pc2_l1, @object
	.size	pc2_l1, 1
pc2_l1:
	.zero	1
	.globl	_x_pc2_l1
	.type	_x_pc2_l1, @object
	.size	_x_pc2_l1, 1
_x_pc2_l1:
	.zero	1
	.globl	pc2_l0
	.type	pc2_l0, @object
	.size	pc2_l0, 1
pc2_l0:
	.zero	1
	.globl	_x_pc2_l0
	.type	_x_pc2_l0, @object
	.size	_x_pc2_l0, 1
_x_pc2_l0:
	.zero	1
	.globl	pc4_l2
	.type	pc4_l2, @object
	.size	pc4_l2, 1
pc4_l2:
	.zero	1
	.globl	_x_pc4_l2
	.type	_x_pc4_l2, @object
	.size	_x_pc4_l2, 1
_x_pc4_l2:
	.zero	1
	.globl	pc2_evt1
	.type	pc2_evt1, @object
	.size	pc2_evt1, 1
pc2_evt1:
	.zero	1
	.globl	_x_pc2_evt1
	.type	_x_pc2_evt1, @object
	.size	_x_pc2_evt1, 1
_x_pc2_evt1:
	.zero	1
	.globl	pc3_evt0
	.type	pc3_evt0, @object
	.size	pc3_evt0, 1
pc3_evt0:
	.zero	1
	.globl	_x_pc3_evt0
	.type	_x_pc3_evt0, @object
	.size	_x_pc3_evt0, 1
_x_pc3_evt0:
	.zero	1
	.globl	pc2_x
	.align 4
	.type	pc2_x, @object
	.size	pc2_x, 4
pc2_x:
	.zero	4
	.globl	_x_pc2_x
	.align 4
	.type	_x_pc2_x, @object
	.size	_x_pc2_x, 4
_x_pc2_x:
	.zero	4
	.globl	pc1_l1
	.type	pc1_l1, @object
	.size	pc1_l1, 1
pc1_l1:
	.zero	1
	.globl	_x_pc1_l1
	.type	_x_pc1_l1, @object
	.size	_x_pc1_l1, 1
_x_pc1_l1:
	.zero	1
	.globl	a2_l
	.type	a2_l, @object
	.size	a2_l, 1
a2_l:
	.zero	1
	.globl	_x_a2_l
	.type	_x_a2_l, @object
	.size	_x_a2_l, 1
_x_a2_l:
	.zero	1
	.globl	pc4_l0
	.type	pc4_l0, @object
	.size	pc4_l0, 1
pc4_l0:
	.zero	1
	.globl	_x_pc4_l0
	.type	_x_pc4_l0, @object
	.size	_x_pc4_l0, 1
_x_pc4_l0:
	.zero	1
	.globl	a2_evt1
	.type	a2_evt1, @object
	.size	a2_evt1, 1
a2_evt1:
	.zero	1
	.globl	_x_a2_evt1
	.type	_x_a2_evt1, @object
	.size	_x_a2_evt1, 1
_x_a2_evt1:
	.zero	1
	.globl	a3_l
	.type	a3_l, @object
	.size	a3_l, 1
a3_l:
	.zero	1
	.globl	_x_a3_l
	.type	_x_a3_l, @object
	.size	_x_a3_l, 1
_x_a3_l:
	.zero	1
	.globl	a2_evt0
	.type	a2_evt0, @object
	.size	a2_evt0, 1
a2_evt0:
	.zero	1
	.globl	_x_a2_evt0
	.type	_x_a2_evt0, @object
	.size	_x_a2_evt0, 1
_x_a2_evt0:
	.zero	1
	.globl	pc0_l1
	.type	pc0_l1, @object
	.size	pc0_l1, 1
pc0_l1:
	.zero	1
	.globl	_x_pc0_l1
	.type	_x_pc0_l1, @object
	.size	_x_pc0_l1, 1
_x_pc0_l1:
	.zero	1
	.globl	pc4_l1
	.type	pc4_l1, @object
	.size	pc4_l1, 1
pc4_l1:
	.zero	1
	.globl	_x_pc4_l1
	.type	_x_pc4_l1, @object
	.size	_x_pc4_l1, 1
_x_pc4_l1:
	.zero	1
	.globl	pc2_evt0
	.type	pc2_evt0, @object
	.size	pc2_evt0, 1
pc2_evt0:
	.zero	1
	.globl	_x_pc2_evt0
	.type	_x_pc2_evt0, @object
	.size	_x_pc2_evt0, 1
_x_pc2_evt0:
	.zero	1
	.globl	pc1_x
	.align 4
	.type	pc1_x, @object
	.size	pc1_x, 4
pc1_x:
	.zero	4
	.globl	_x_pc1_x
	.align 4
	.type	_x_pc1_x, @object
	.size	_x_pc1_x, 4
_x_pc1_x:
	.zero	4
	.globl	pc4_evt0
	.type	pc4_evt0, @object
	.size	pc4_evt0, 1
pc4_evt0:
	.zero	1
	.globl	_x_pc4_evt0
	.type	_x_pc4_evt0, @object
	.size	_x_pc4_evt0, 1
_x_pc4_evt0:
	.zero	1
	.globl	pc3_x
	.align 4
	.type	pc3_x, @object
	.size	pc3_x, 4
pc3_x:
	.zero	4
	.globl	_x_pc3_x
	.align 4
	.type	_x_pc3_x, @object
	.size	_x_pc3_x, 4
_x_pc3_x:
	.zero	4
	.globl	c_initial
	.type	c_initial, @object
	.size	c_initial, 1
c_initial:
	.zero	1
	.globl	_x_c_initial
	.type	_x_c_initial, @object
	.size	_x_c_initial, 1
_x_c_initial:
	.zero	1
	.globl	pc0_x
	.align 4
	.type	pc0_x, @object
	.size	pc0_x, 4
pc0_x:
	.zero	4
	.globl	_x_pc0_x
	.align 4
	.type	_x_pc0_x, @object
	.size	_x_pc0_x, 4
_x_pc0_x:
	.zero	4
	.globl	c_move
	.type	c_move, @object
	.size	c_move, 1
c_move:
	.zero	1
	.globl	_x_c_move
	.type	_x_c_move, @object
	.size	_x_c_move, 1
_x_c_move:
	.zero	1
	.globl	a0_evt0
	.type	a0_evt0, @object
	.size	a0_evt0, 1
a0_evt0:
	.zero	1
	.globl	_x_a0_evt0
	.type	_x_a0_evt0, @object
	.size	_x_a0_evt0, 1
_x_a0_evt0:
	.zero	1
	.globl	a1_l
	.type	a1_l, @object
	.size	a1_l, 1
a1_l:
	.zero	1
	.globl	_x_a1_l
	.type	_x_a1_l, @object
	.size	_x_a1_l, 1
_x_a1_l:
	.zero	1
	.globl	a0_l
	.type	a0_l, @object
	.size	a0_l, 1
a0_l:
	.zero	1
	.globl	_x_a0_l
	.type	_x_a0_l, @object
	.size	_x_a0_l, 1
_x_a0_l:
	.zero	1
	.globl	id
	.align 4
	.type	id, @object
	.size	id, 4
id:
	.zero	4
	.globl	_x_id
	.align 4
	.type	_x_id, @object
	.size	_x_id, 4
_x_id:
	.zero	4
	.globl	pc0_l2
	.type	pc0_l2, @object
	.size	pc0_l2, 1
pc0_l2:
	.zero	1
	.globl	_x_pc0_l2
	.type	_x_pc0_l2, @object
	.size	_x_pc0_l2, 1
_x_pc0_l2:
	.zero	1
	.globl	delta
	.align 4
	.type	delta, @object
	.size	delta, 4
delta:
	.zero	4
	.globl	_x_delta
	.align 4
	.type	_x_delta, @object
	.size	_x_delta, 4
_x_delta:
	.zero	4
	.globl	a3_evt0
	.type	a3_evt0, @object
	.size	a3_evt0, 1
a3_evt0:
	.zero	1
	.globl	_x_a3_evt0
	.type	_x_a3_evt0, @object
	.size	_x_a3_evt0, 1
_x_a3_evt0:
	.zero	1
	.globl	a3_evt1
	.type	a3_evt1, @object
	.size	a3_evt1, 1
a3_evt1:
	.zero	1
	.globl	_x_a3_evt1
	.type	_x_a3_evt1, @object
	.size	_x_a3_evt1, 1
_x_a3_evt1:
	.zero	1
	.globl	pc4_evt1
	.type	pc4_evt1, @object
	.size	pc4_evt1, 1
pc4_evt1:
	.zero	1
	.globl	_x_pc4_evt1
	.type	_x_pc4_evt1, @object
	.size	_x_pc4_evt1, 1
_x_pc4_evt1:
	.zero	1
	.globl	a4_l
	.type	a4_l, @object
	.size	a4_l, 1
a4_l:
	.zero	1
	.globl	_x_a4_l
	.type	_x_a4_l, @object
	.size	_x_a4_l, 1
_x_a4_l:
	.zero	1
	.globl	pc1_l2
	.type	pc1_l2, @object
	.size	pc1_l2, 1
pc1_l2:
	.zero	1
	.globl	_x_pc1_l2
	.type	_x_pc1_l2, @object
	.size	_x_pc1_l2, 1
_x_pc1_l2:
	.zero	1
	.globl	a4_evt0
	.type	a4_evt0, @object
	.size	a4_evt0, 1
a4_evt0:
	.zero	1
	.globl	_x_a4_evt0
	.type	_x_a4_evt0, @object
	.size	_x_a4_evt0, 1
_x_a4_evt0:
	.zero	1
	.globl	a0_evt1
	.type	a0_evt1, @object
	.size	a0_evt1, 1
a0_evt1:
	.zero	1
	.globl	_x_a0_evt1
	.type	_x_a0_evt1, @object
	.size	_x_a0_evt1, 1
_x_a0_evt1:
	.zero	1
	.globl	pc1_l0
	.type	pc1_l0, @object
	.size	pc1_l0, 1
pc1_l0:
	.zero	1
	.globl	_x_pc1_l0
	.type	_x_pc1_l0, @object
	.size	_x_pc1_l0, 1
_x_pc1_l0:
	.zero	1
	.globl	pc0_evt0
	.type	pc0_evt0, @object
	.size	pc0_evt0, 1
pc0_evt0:
	.zero	1
	.globl	_x_pc0_evt0
	.type	_x_pc0_evt0, @object
	.size	_x_pc0_evt0, 1
_x_pc0_evt0:
	.zero	1
	.globl	pc0_evt1
	.type	pc0_evt1, @object
	.size	pc0_evt1, 1
pc0_evt1:
	.zero	1
	.globl	_x_pc0_evt1
	.type	_x_pc0_evt1, @object
	.size	_x_pc0_evt1, 1
_x_pc0_evt1:
	.zero	1
	.globl	a4_evt1
	.type	a4_evt1, @object
	.size	a4_evt1, 1
a4_evt1:
	.zero	1
	.globl	_x_a4_evt1
	.type	_x_a4_evt1, @object
	.size	_x_a4_evt1, 1
_x_a4_evt1:
	.zero	1
	.globl	pc0_l0
	.type	pc0_l0, @object
	.size	pc0_l0, 1
pc0_l0:
	.zero	1
	.globl	_x_pc0_l0
	.type	_x_pc0_l0, @object
	.size	_x_pc0_l0, 1
_x_pc0_l0:
	.zero	1
	.globl	pc3_l1
	.type	pc3_l1, @object
	.size	pc3_l1, 1
pc3_l1:
	.zero	1
	.globl	_x_pc3_l1
	.type	_x_pc3_l1, @object
	.size	_x_pc3_l1, 1
_x_pc3_l1:
	.zero	1
	.globl	a1_evt0
	.type	a1_evt0, @object
	.size	a1_evt0, 1
a1_evt0:
	.zero	1
	.globl	_x_a1_evt0
	.type	_x_a1_evt0, @object
	.size	_x_a1_evt0, 1
_x_a1_evt0:
	.zero	1
	.globl	pc1_evt0
	.type	pc1_evt0, @object
	.size	pc1_evt0, 1
pc1_evt0:
	.zero	1
	.globl	_x_pc1_evt0
	.type	_x_pc1_evt0, @object
	.size	_x_pc1_evt0, 1
_x_pc1_evt0:
	.zero	1
	.globl	pc3_l2
	.type	pc3_l2, @object
	.size	pc3_l2, 1
pc3_l2:
	.zero	1
	.globl	_x_pc3_l2
	.type	_x_pc3_l2, @object
	.size	_x_pc3_l2, 1
_x_pc3_l2:
	.zero	1
	.globl	a1_evt1
	.type	a1_evt1, @object
	.size	a1_evt1, 1
a1_evt1:
	.zero	1
	.globl	_x_a1_evt1
	.type	_x_a1_evt1, @object
	.size	_x_a1_evt1, 1
_x_a1_evt1:
	.zero	1
	.globl	pc1_evt1
	.type	pc1_evt1, @object
	.size	pc1_evt1, 1
pc1_evt1:
	.zero	1
	.globl	_x_pc1_evt1
	.type	_x_pc1_evt1, @object
	.size	_x_pc1_evt1, 1
_x_pc1_evt1:
	.zero	1
	.text
	.globl	main
	.type	main, @function
main:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _diverge_delta[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR pc4_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR pc3_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR pc3_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR pc2_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR pc2_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR pc2_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR pc4_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR pc2_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR pc3_evt0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR pc2_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR pc1_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR a2_l[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR pc4_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR a2_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR a3_l[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR a2_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR pc0_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR pc4_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR pc2_evt0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR pc1_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR pc4_evt0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR pc3_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR c_initial[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR pc0_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR c_move[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR a0_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR a1_l[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR a0_l[rip], al
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR id[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR pc0_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR delta[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR a3_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR a3_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR pc4_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR a4_l[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR pc1_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR a4_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR a0_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR pc1_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR pc0_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR pc0_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR a4_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR pc0_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR pc3_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR a1_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR pc1_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR pc3_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR a1_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR pc1_evt1[rip], al
	movzx	eax, BYTE PTR pc4_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR pc4_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR pc4_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR pc4_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR pc4_evt0[rip]
	test	al, al
	jne	.L6
	movzx	eax, BYTE PTR pc4_evt1[rip]
	test	al, al
	je	.L7
.L6:
	movzx	eax, BYTE PTR pc4_evt1[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR pc4_evt0[rip]
	test	al, al
	je	.L7
.L8:
	movzx	eax, BYTE PTR pc4_evt0[rip]
	test	al, al
	je	.L9
	movzx	eax, BYTE PTR pc4_evt1[rip]
	test	al, al
	je	.L7
.L9:
	movzx	eax, BYTE PTR pc4_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR pc4_evt1[rip]
	test	al, al
	je	.L4
.L7:
	movzx	eax, BYTE PTR pc4_l2[rip]
	test	al, al
	jne	.L10
	movzx	eax, BYTE PTR pc4_l0[rip]
	test	al, al
	je	.L10
	movzx	eax, BYTE PTR pc4_l1[rip]
	test	al, al
	jne	.L11
.L10:
	movzx	eax, BYTE PTR pc4_l2[rip]
	test	al, al
	jne	.L12
	movzx	eax, BYTE PTR pc4_l0[rip]
	test	al, al
	jne	.L12
	movzx	eax, BYTE PTR pc4_l1[rip]
	test	al, al
	je	.L11
.L12:
	movzx	eax, BYTE PTR pc4_l2[rip]
	test	al, al
	je	.L13
	movzx	eax, BYTE PTR pc4_l0[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR pc4_l1[rip]
	test	al, al
	je	.L11
.L13:
	movzx	eax, BYTE PTR pc4_l2[rip]
	test	al, al
	jne	.L14
	movzx	eax, BYTE PTR pc4_l1[rip]
	test	al, al
	je	.L14
	movzx	eax, BYTE PTR pc4_l0[rip]
	test	al, al
	je	.L11
.L14:
	movzx	eax, BYTE PTR pc4_l2[rip]
	test	al, al
	je	.L15
	movzx	eax, BYTE PTR pc4_l1[rip]
	test	al, al
	je	.L15
	movzx	eax, BYTE PTR pc4_l0[rip]
	test	al, al
	je	.L11
.L15:
	movzx	eax, BYTE PTR pc4_l2[rip]
	test	al, al
	jne	.L16
	movzx	eax, BYTE PTR pc4_l0[rip]
	test	al, al
	je	.L16
	movzx	eax, BYTE PTR pc4_l1[rip]
	test	al, al
	je	.L11
.L16:
	movzx	eax, BYTE PTR pc4_l2[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR pc4_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR pc4_l1[rip]
	test	al, al
	jne	.L4
.L11:
	movzx	eax, BYTE PTR pc3_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR pc3_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR pc3_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR pc3_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR pc3_evt0[rip]
	test	al, al
	jne	.L18
	movzx	eax, BYTE PTR pc3_evt1[rip]
	test	al, al
	je	.L19
.L18:
	movzx	eax, BYTE PTR pc3_evt1[rip]
	test	al, al
	je	.L20
	movzx	eax, BYTE PTR pc3_evt0[rip]
	test	al, al
	je	.L19
.L20:
	movzx	eax, BYTE PTR pc3_evt0[rip]
	test	al, al
	je	.L21
	movzx	eax, BYTE PTR pc3_evt1[rip]
	test	al, al
	je	.L19
.L21:
	movzx	eax, BYTE PTR pc3_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR pc3_evt1[rip]
	test	al, al
	je	.L4
.L19:
	movzx	eax, BYTE PTR pc3_l2[rip]
	test	al, al
	jne	.L22
	movzx	eax, BYTE PTR pc3_l0[rip]
	test	al, al
	je	.L22
	movzx	eax, BYTE PTR pc3_l1[rip]
	test	al, al
	jne	.L23
.L22:
	movzx	eax, BYTE PTR pc3_l2[rip]
	test	al, al
	jne	.L24
	movzx	eax, BYTE PTR pc3_l0[rip]
	test	al, al
	jne	.L24
	movzx	eax, BYTE PTR pc3_l1[rip]
	test	al, al
	je	.L23
.L24:
	movzx	eax, BYTE PTR pc3_l2[rip]
	test	al, al
	je	.L25
	movzx	eax, BYTE PTR pc3_l0[rip]
	test	al, al
	jne	.L25
	movzx	eax, BYTE PTR pc3_l1[rip]
	test	al, al
	je	.L23
.L25:
	movzx	eax, BYTE PTR pc3_l2[rip]
	test	al, al
	jne	.L26
	movzx	eax, BYTE PTR pc3_l1[rip]
	test	al, al
	je	.L26
	movzx	eax, BYTE PTR pc3_l0[rip]
	test	al, al
	je	.L23
.L26:
	movzx	eax, BYTE PTR pc3_l2[rip]
	test	al, al
	je	.L27
	movzx	eax, BYTE PTR pc3_l1[rip]
	test	al, al
	je	.L27
	movzx	eax, BYTE PTR pc3_l0[rip]
	test	al, al
	je	.L23
.L27:
	movzx	eax, BYTE PTR pc3_l2[rip]
	test	al, al
	jne	.L28
	movzx	eax, BYTE PTR pc3_l0[rip]
	test	al, al
	je	.L28
	movzx	eax, BYTE PTR pc3_l1[rip]
	test	al, al
	je	.L23
.L28:
	movzx	eax, BYTE PTR pc3_l2[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR pc3_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR pc3_l1[rip]
	test	al, al
	jne	.L4
.L23:
	movzx	eax, BYTE PTR pc2_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR pc2_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR pc2_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR pc2_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR pc2_evt0[rip]
	test	al, al
	jne	.L30
	movzx	eax, BYTE PTR pc2_evt1[rip]
	test	al, al
	je	.L31
.L30:
	movzx	eax, BYTE PTR pc2_evt1[rip]
	test	al, al
	je	.L32
	movzx	eax, BYTE PTR pc2_evt0[rip]
	test	al, al
	je	.L31
.L32:
	movzx	eax, BYTE PTR pc2_evt0[rip]
	test	al, al
	je	.L33
	movzx	eax, BYTE PTR pc2_evt1[rip]
	test	al, al
	je	.L31
.L33:
	movzx	eax, BYTE PTR pc2_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR pc2_evt1[rip]
	test	al, al
	je	.L4
.L31:
	movzx	eax, BYTE PTR pc2_l2[rip]
	test	al, al
	jne	.L34
	movzx	eax, BYTE PTR pc2_l0[rip]
	test	al, al
	je	.L34
	movzx	eax, BYTE PTR pc2_l1[rip]
	test	al, al
	jne	.L35
.L34:
	movzx	eax, BYTE PTR pc2_l2[rip]
	test	al, al
	jne	.L36
	movzx	eax, BYTE PTR pc2_l0[rip]
	test	al, al
	jne	.L36
	movzx	eax, BYTE PTR pc2_l1[rip]
	test	al, al
	je	.L35
.L36:
	movzx	eax, BYTE PTR pc2_l2[rip]
	test	al, al
	je	.L37
	movzx	eax, BYTE PTR pc2_l0[rip]
	test	al, al
	jne	.L37
	movzx	eax, BYTE PTR pc2_l1[rip]
	test	al, al
	je	.L35
.L37:
	movzx	eax, BYTE PTR pc2_l2[rip]
	test	al, al
	jne	.L38
	movzx	eax, BYTE PTR pc2_l1[rip]
	test	al, al
	je	.L38
	movzx	eax, BYTE PTR pc2_l0[rip]
	test	al, al
	je	.L35
.L38:
	movzx	eax, BYTE PTR pc2_l2[rip]
	test	al, al
	je	.L39
	movzx	eax, BYTE PTR pc2_l1[rip]
	test	al, al
	je	.L39
	movzx	eax, BYTE PTR pc2_l0[rip]
	test	al, al
	je	.L35
.L39:
	movzx	eax, BYTE PTR pc2_l2[rip]
	test	al, al
	jne	.L40
	movzx	eax, BYTE PTR pc2_l0[rip]
	test	al, al
	je	.L40
	movzx	eax, BYTE PTR pc2_l1[rip]
	test	al, al
	je	.L35
.L40:
	movzx	eax, BYTE PTR pc2_l2[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR pc2_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR pc2_l1[rip]
	test	al, al
	jne	.L4
.L35:
	movzx	eax, BYTE PTR pc1_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR pc1_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR pc1_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR pc1_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR pc1_evt0[rip]
	test	al, al
	jne	.L42
	movzx	eax, BYTE PTR pc1_evt1[rip]
	test	al, al
	je	.L43
.L42:
	movzx	eax, BYTE PTR pc1_evt1[rip]
	test	al, al
	je	.L44
	movzx	eax, BYTE PTR pc1_evt0[rip]
	test	al, al
	je	.L43
.L44:
	movzx	eax, BYTE PTR pc1_evt0[rip]
	test	al, al
	je	.L45
	movzx	eax, BYTE PTR pc1_evt1[rip]
	test	al, al
	je	.L43
.L45:
	movzx	eax, BYTE PTR pc1_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR pc1_evt1[rip]
	test	al, al
	je	.L4
.L43:
	movzx	eax, BYTE PTR pc1_l2[rip]
	test	al, al
	jne	.L46
	movzx	eax, BYTE PTR pc1_l0[rip]
	test	al, al
	je	.L46
	movzx	eax, BYTE PTR pc1_l1[rip]
	test	al, al
	jne	.L47
.L46:
	movzx	eax, BYTE PTR pc1_l2[rip]
	test	al, al
	jne	.L48
	movzx	eax, BYTE PTR pc1_l0[rip]
	test	al, al
	jne	.L48
	movzx	eax, BYTE PTR pc1_l1[rip]
	test	al, al
	je	.L47
.L48:
	movzx	eax, BYTE PTR pc1_l2[rip]
	test	al, al
	je	.L49
	movzx	eax, BYTE PTR pc1_l0[rip]
	test	al, al
	jne	.L49
	movzx	eax, BYTE PTR pc1_l1[rip]
	test	al, al
	je	.L47
.L49:
	movzx	eax, BYTE PTR pc1_l2[rip]
	test	al, al
	jne	.L50
	movzx	eax, BYTE PTR pc1_l1[rip]
	test	al, al
	je	.L50
	movzx	eax, BYTE PTR pc1_l0[rip]
	test	al, al
	je	.L47
.L50:
	movzx	eax, BYTE PTR pc1_l2[rip]
	test	al, al
	je	.L51
	movzx	eax, BYTE PTR pc1_l1[rip]
	test	al, al
	je	.L51
	movzx	eax, BYTE PTR pc1_l0[rip]
	test	al, al
	je	.L47
.L51:
	movzx	eax, BYTE PTR pc1_l2[rip]
	test	al, al
	jne	.L52
	movzx	eax, BYTE PTR pc1_l0[rip]
	test	al, al
	je	.L52
	movzx	eax, BYTE PTR pc1_l1[rip]
	test	al, al
	je	.L47
.L52:
	movzx	eax, BYTE PTR pc1_l2[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR pc1_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR pc1_l1[rip]
	test	al, al
	jne	.L4
.L47:
	movzx	eax, BYTE PTR pc0_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR pc0_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR pc0_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR pc0_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR pc0_evt0[rip]
	test	al, al
	jne	.L54
	movzx	eax, BYTE PTR pc0_evt1[rip]
	test	al, al
	je	.L55
.L54:
	movzx	eax, BYTE PTR pc0_evt1[rip]
	test	al, al
	je	.L56
	movzx	eax, BYTE PTR pc0_evt0[rip]
	test	al, al
	je	.L55
.L56:
	movzx	eax, BYTE PTR pc0_evt0[rip]
	test	al, al
	je	.L57
	movzx	eax, BYTE PTR pc0_evt1[rip]
	test	al, al
	je	.L55
.L57:
	movzx	eax, BYTE PTR pc0_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR pc0_evt1[rip]
	test	al, al
	je	.L4
.L55:
	movzx	eax, BYTE PTR pc0_l2[rip]
	test	al, al
	jne	.L58
	movzx	eax, BYTE PTR pc0_l0[rip]
	test	al, al
	je	.L58
	movzx	eax, BYTE PTR pc0_l1[rip]
	test	al, al
	jne	.L59
.L58:
	movzx	eax, BYTE PTR pc0_l2[rip]
	test	al, al
	jne	.L60
	movzx	eax, BYTE PTR pc0_l0[rip]
	test	al, al
	jne	.L60
	movzx	eax, BYTE PTR pc0_l1[rip]
	test	al, al
	je	.L59
.L60:
	movzx	eax, BYTE PTR pc0_l2[rip]
	test	al, al
	je	.L61
	movzx	eax, BYTE PTR pc0_l0[rip]
	test	al, al
	jne	.L61
	movzx	eax, BYTE PTR pc0_l1[rip]
	test	al, al
	je	.L59
.L61:
	movzx	eax, BYTE PTR pc0_l2[rip]
	test	al, al
	jne	.L62
	movzx	eax, BYTE PTR pc0_l1[rip]
	test	al, al
	je	.L62
	movzx	eax, BYTE PTR pc0_l0[rip]
	test	al, al
	je	.L59
.L62:
	movzx	eax, BYTE PTR pc0_l2[rip]
	test	al, al
	je	.L63
	movzx	eax, BYTE PTR pc0_l1[rip]
	test	al, al
	je	.L63
	movzx	eax, BYTE PTR pc0_l0[rip]
	test	al, al
	je	.L59
.L63:
	movzx	eax, BYTE PTR pc0_l2[rip]
	test	al, al
	jne	.L64
	movzx	eax, BYTE PTR pc0_l0[rip]
	test	al, al
	je	.L64
	movzx	eax, BYTE PTR pc0_l1[rip]
	test	al, al
	je	.L59
.L64:
	movzx	eax, BYTE PTR pc0_l2[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR pc0_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR pc0_l1[rip]
	test	al, al
	jne	.L4
.L59:
	movzx	eax, BYTE PTR a4_l[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR a4_evt0[rip]
	test	al, al
	jne	.L65
	movzx	eax, BYTE PTR a4_evt1[rip]
	test	al, al
	je	.L66
.L65:
	movzx	eax, BYTE PTR a4_evt1[rip]
	test	al, al
	je	.L67
	movzx	eax, BYTE PTR a4_evt0[rip]
	test	al, al
	je	.L66
.L67:
	movzx	eax, BYTE PTR a4_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR a4_evt1[rip]
	test	al, al
	jne	.L4
.L66:
	movzx	eax, BYTE PTR a3_l[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR a3_evt0[rip]
	test	al, al
	jne	.L68
	movzx	eax, BYTE PTR a3_evt1[rip]
	test	al, al
	je	.L69
.L68:
	movzx	eax, BYTE PTR a3_evt1[rip]
	test	al, al
	je	.L70
	movzx	eax, BYTE PTR a3_evt0[rip]
	test	al, al
	je	.L69
.L70:
	movzx	eax, BYTE PTR a3_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR a3_evt1[rip]
	test	al, al
	jne	.L4
.L69:
	movzx	eax, BYTE PTR a2_l[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR a2_evt0[rip]
	test	al, al
	jne	.L71
	movzx	eax, BYTE PTR a2_evt1[rip]
	test	al, al
	je	.L72
.L71:
	movzx	eax, BYTE PTR a2_evt1[rip]
	test	al, al
	je	.L73
	movzx	eax, BYTE PTR a2_evt0[rip]
	test	al, al
	je	.L72
.L73:
	movzx	eax, BYTE PTR a2_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR a2_evt1[rip]
	test	al, al
	jne	.L4
.L72:
	movzx	eax, BYTE PTR a1_l[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR a1_evt0[rip]
	test	al, al
	jne	.L74
	movzx	eax, BYTE PTR a1_evt1[rip]
	test	al, al
	je	.L75
.L74:
	movzx	eax, BYTE PTR a1_evt1[rip]
	test	al, al
	je	.L76
	movzx	eax, BYTE PTR a1_evt0[rip]
	test	al, al
	je	.L75
.L76:
	movzx	eax, BYTE PTR a1_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR a1_evt1[rip]
	test	al, al
	jne	.L4
.L75:
	movzx	eax, BYTE PTR a0_l[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR a0_evt0[rip]
	test	al, al
	jne	.L77
	movzx	eax, BYTE PTR a0_evt1[rip]
	test	al, al
	je	.L78
.L77:
	movzx	eax, BYTE PTR a0_evt1[rip]
	test	al, al
	je	.L79
	movzx	eax, BYTE PTR a0_evt0[rip]
	test	al, al
	je	.L78
.L79:
	movzx	eax, BYTE PTR a0_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR a0_evt1[rip]
	test	al, al
	jne	.L4
.L78:
	movzx	eax, BYTE PTR c_initial[rip]
	test	al, al
	je	.L4
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jb	.L4
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 4
	je	.L81
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 3
	je	.L81
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 2
	je	.L81
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	je	.L81
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 1
	jne	.L4
.L81:
	movss	xmm0, DWORD PTR delta[rip]
	movss	xmm1, DWORD PTR _diverge_delta[rip]
	ucomiss	xmm0, xmm1
	jp	.L4
	ucomiss	xmm0, xmm1
	jne	.L4
	mov	eax, 1
	jmp	.L83
.L4:
	mov	eax, 0
.L83:
	mov	DWORD PTR -4[rbp], eax
	jmp	.L84
.L457:
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x__diverge_delta[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_pc4_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_pc3_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_pc3_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_pc2_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_pc2_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_pc2_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_pc4_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_pc2_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_pc3_evt0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_pc2_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_pc1_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_a2_l[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_pc4_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_a2_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_a3_l[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_a2_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_pc0_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_pc4_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_pc2_evt0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_pc1_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_pc4_evt0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_pc3_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_c_initial[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_pc0_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_c_move[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_a0_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_a1_l[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_a0_l[rip], al
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR _x_id[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_pc0_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_delta[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_a3_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_a3_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_pc4_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_a4_l[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_pc1_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_a4_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_a0_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_pc1_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_pc0_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_pc0_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_a4_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_pc0_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_pc3_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_a1_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_pc1_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_pc3_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_a1_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_pc1_evt1[rip], al
	movzx	eax, BYTE PTR _x_pc4_evt0[rip]
	test	al, al
	jne	.L85
	movzx	eax, BYTE PTR _x_pc4_evt1[rip]
	test	al, al
	je	.L86
.L85:
	movzx	eax, BYTE PTR _x_pc4_evt1[rip]
	test	al, al
	je	.L87
	movzx	eax, BYTE PTR _x_pc4_evt0[rip]
	test	al, al
	je	.L86
.L87:
	movzx	eax, BYTE PTR _x_pc4_evt0[rip]
	test	al, al
	je	.L88
	movzx	eax, BYTE PTR _x_pc4_evt1[rip]
	test	al, al
	je	.L86
.L88:
	movzx	eax, BYTE PTR _x_pc4_evt0[rip]
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR _x_pc4_evt1[rip]
	test	al, al
	je	.L89
.L86:
	movzx	eax, BYTE PTR _x_pc4_l2[rip]
	test	al, al
	jne	.L90
	movzx	eax, BYTE PTR _x_pc4_l0[rip]
	test	al, al
	je	.L90
	movzx	eax, BYTE PTR _x_pc4_l1[rip]
	test	al, al
	jne	.L91
.L90:
	movzx	eax, BYTE PTR _x_pc4_l2[rip]
	test	al, al
	jne	.L92
	movzx	eax, BYTE PTR _x_pc4_l0[rip]
	test	al, al
	jne	.L92
	movzx	eax, BYTE PTR _x_pc4_l1[rip]
	test	al, al
	je	.L91
.L92:
	movzx	eax, BYTE PTR _x_pc4_l2[rip]
	test	al, al
	je	.L93
	movzx	eax, BYTE PTR _x_pc4_l0[rip]
	test	al, al
	jne	.L93
	movzx	eax, BYTE PTR _x_pc4_l1[rip]
	test	al, al
	je	.L91
.L93:
	movzx	eax, BYTE PTR _x_pc4_l2[rip]
	test	al, al
	jne	.L94
	movzx	eax, BYTE PTR _x_pc4_l1[rip]
	test	al, al
	je	.L94
	movzx	eax, BYTE PTR _x_pc4_l0[rip]
	test	al, al
	je	.L91
.L94:
	movzx	eax, BYTE PTR _x_pc4_l2[rip]
	test	al, al
	je	.L95
	movzx	eax, BYTE PTR _x_pc4_l1[rip]
	test	al, al
	je	.L95
	movzx	eax, BYTE PTR _x_pc4_l0[rip]
	test	al, al
	je	.L91
.L95:
	movzx	eax, BYTE PTR _x_pc4_l2[rip]
	test	al, al
	jne	.L96
	movzx	eax, BYTE PTR _x_pc4_l0[rip]
	test	al, al
	je	.L96
	movzx	eax, BYTE PTR _x_pc4_l1[rip]
	test	al, al
	je	.L91
.L96:
	movzx	eax, BYTE PTR _x_pc4_l2[rip]
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR _x_pc4_l0[rip]
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR _x_pc4_l1[rip]
	test	al, al
	jne	.L89
.L91:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L97
	movzx	eax, BYTE PTR pc4_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_pc4_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR pc4_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_pc4_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR pc4_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_pc4_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L89
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR pc4_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_pc4_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L89
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L89
.L97:
	movzx	eax, BYTE PTR pc4_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_pc4_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L99
	movzx	eax, BYTE PTR pc4_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_pc4_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L99
	movzx	eax, BYTE PTR pc4_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_pc4_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L99
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR pc4_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_pc4_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L99
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L100
.L99:
	movzx	eax, BYTE PTR pc4_evt0[rip]
	test	al, al
	jne	.L100
	movzx	eax, BYTE PTR pc4_evt1[rip]
	test	al, al
	je	.L89
.L100:
	movzx	eax, BYTE PTR pc4_evt0[rip]
	test	al, al
	je	.L102
	movzx	eax, BYTE PTR pc4_evt1[rip]
	test	al, al
	je	.L102
	movss	xmm1, DWORD PTR pc4_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jb	.L102
	movzx	eax, BYTE PTR _x_pc4_l2[rip]
	test	al, al
	je	.L102
	movzx	eax, BYTE PTR _x_pc4_l0[rip]
	test	al, al
	jne	.L102
	movzx	eax, BYTE PTR _x_pc4_l1[rip]
	test	al, al
	jne	.L102
	movss	xmm0, DWORD PTR _x_pc4_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L102
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L104
.L102:
	movzx	eax, BYTE PTR pc4_l2[rip]
	test	al, al
	jne	.L104
	movzx	eax, BYTE PTR pc4_l0[rip]
	test	al, al
	jne	.L104
	movzx	eax, BYTE PTR pc4_l1[rip]
	test	al, al
	jne	.L104
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L104
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L104
	movzx	eax, BYTE PTR pc4_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc4_evt1[rip]
	test	al, al
	jne	.L89
.L104:
	movzx	eax, BYTE PTR pc4_evt0[rip]
	test	al, al
	je	.L106
	movzx	eax, BYTE PTR pc4_evt1[rip]
	test	al, al
	je	.L106
	movzx	eax, BYTE PTR _x_pc4_l2[rip]
	test	al, al
	jne	.L107
	movzx	eax, BYTE PTR _x_pc4_l0[rip]
	test	al, al
	jne	.L107
	movzx	eax, BYTE PTR _x_pc4_l1[rip]
	test	al, al
	je	.L108
.L107:
	movzx	eax, BYTE PTR _x_pc4_l2[rip]
	test	al, al
	jne	.L106
	movzx	eax, BYTE PTR _x_pc4_l1[rip]
	test	al, al
	je	.L106
	movzx	eax, BYTE PTR _x_pc4_l0[rip]
	test	al, al
	je	.L108
.L106:
	movzx	eax, BYTE PTR pc4_l2[rip]
	test	al, al
	je	.L108
	movzx	eax, BYTE PTR pc4_l0[rip]
	test	al, al
	jne	.L108
	movzx	eax, BYTE PTR pc4_l1[rip]
	test	al, al
	jne	.L108
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L108
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L108
	movzx	eax, BYTE PTR pc4_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc4_evt1[rip]
	test	al, al
	jne	.L89
.L108:
	movss	xmm0, DWORD PTR _x_pc4_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L109
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L109
	movss	xmm0, DWORD PTR pc4_x[rip]
	comiss	xmm0, DWORD PTR .LC3[rip]
	jnb	.L111
.L109:
	movzx	eax, BYTE PTR _x_pc4_l2[rip]
	test	al, al
	jne	.L111
	movzx	eax, BYTE PTR _x_pc4_l0[rip]
	test	al, al
	jne	.L111
	movzx	eax, BYTE PTR _x_pc4_l1[rip]
	test	al, al
	jne	.L111
	movzx	eax, BYTE PTR pc4_l2[rip]
	test	al, al
	je	.L111
	movzx	eax, BYTE PTR pc4_l0[rip]
	test	al, al
	jne	.L111
	movzx	eax, BYTE PTR pc4_l1[rip]
	test	al, al
	je	.L89
.L111:
	movss	xmm1, DWORD PTR pc4_x[rip]
	movss	xmm0, DWORD PTR .LC4[rip]
	comiss	xmm0, xmm1
	jb	.L112
	movss	xmm0, DWORD PTR pc4_x[rip]
	movss	xmm1, DWORD PTR _x_pc4_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L112
	ucomiss	xmm0, xmm1
	je	.L114
.L112:
	movzx	eax, BYTE PTR pc4_l2[rip]
	test	al, al
	je	.L114
	movzx	eax, BYTE PTR pc4_l0[rip]
	test	al, al
	jne	.L114
	movzx	eax, BYTE PTR pc4_l1[rip]
	test	al, al
	jne	.L114
	movzx	eax, BYTE PTR _x_pc4_l2[rip]
	test	al, al
	jne	.L114
	movzx	eax, BYTE PTR _x_pc4_l1[rip]
	test	al, al
	je	.L114
	movzx	eax, BYTE PTR _x_pc4_l0[rip]
	test	al, al
	je	.L89
.L114:
	movss	xmm0, DWORD PTR _x_pc4_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L116
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L116
	movzx	eax, BYTE PTR pc4_evt1[rip]
	test	al, al
	je	.L116
	movzx	eax, BYTE PTR pc4_evt0[rip]
	test	al, al
	jne	.L116
	movzx	eax, BYTE PTR _x_pc4_l2[rip]
	test	al, al
	je	.L116
	movzx	eax, BYTE PTR _x_pc4_l1[rip]
	test	al, al
	je	.L116
	movzx	eax, BYTE PTR _x_pc4_l0[rip]
	test	al, al
	je	.L118
.L116:
	movzx	eax, BYTE PTR pc4_l2[rip]
	test	al, al
	jne	.L118
	movzx	eax, BYTE PTR pc4_l1[rip]
	test	al, al
	je	.L118
	movzx	eax, BYTE PTR pc4_l0[rip]
	test	al, al
	jne	.L118
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L118
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L118
	movzx	eax, BYTE PTR pc4_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc4_evt1[rip]
	test	al, al
	jne	.L89
.L118:
	movzx	eax, BYTE PTR _x_pc4_l2[rip]
	test	al, al
	jne	.L119
	movzx	eax, BYTE PTR _x_pc4_l0[rip]
	test	al, al
	je	.L119
	movzx	eax, BYTE PTR _x_pc4_l1[rip]
	test	al, al
	je	.L120
.L119:
	movzx	eax, BYTE PTR _x_pc4_l2[rip]
	test	al, al
	jne	.L121
	movzx	eax, BYTE PTR _x_pc4_l0[rip]
	test	al, al
	je	.L121
	movzx	eax, BYTE PTR _x_pc4_l1[rip]
	test	al, al
	jne	.L120
.L121:
	movzx	eax, BYTE PTR pc4_l2[rip]
	test	al, al
	je	.L120
	movzx	eax, BYTE PTR pc4_l1[rip]
	test	al, al
	je	.L120
	movzx	eax, BYTE PTR pc4_l0[rip]
	test	al, al
	jne	.L120
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L120
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L120
	movzx	eax, BYTE PTR pc4_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc4_evt1[rip]
	test	al, al
	jne	.L89
.L120:
	movss	xmm0, DWORD PTR pc4_x[rip]
	movss	xmm1, DWORD PTR _x_pc4_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L122
	ucomiss	xmm0, xmm1
	jne	.L122
	movzx	eax, BYTE PTR pc4_evt0[rip]
	test	al, al
	je	.L122
	movzx	eax, BYTE PTR pc4_evt1[rip]
	test	al, al
	je	.L122
	movss	xmm0, DWORD PTR pc4_x[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L124
.L122:
	movzx	eax, BYTE PTR pc4_l2[rip]
	test	al, al
	je	.L124
	movzx	eax, BYTE PTR pc4_l1[rip]
	test	al, al
	je	.L124
	movzx	eax, BYTE PTR pc4_l0[rip]
	test	al, al
	jne	.L124
	movzx	eax, BYTE PTR _x_pc4_l2[rip]
	test	al, al
	jne	.L124
	movzx	eax, BYTE PTR _x_pc4_l0[rip]
	test	al, al
	je	.L124
	movzx	eax, BYTE PTR _x_pc4_l1[rip]
	test	al, al
	jne	.L89
.L124:
	movss	xmm0, DWORD PTR _x_pc4_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L125
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L125
	movzx	eax, BYTE PTR pc4_evt0[rip]
	test	al, al
	je	.L125
	movzx	eax, BYTE PTR pc4_evt1[rip]
	test	al, al
	jne	.L125
	movss	xmm1, DWORD PTR pc4_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	jnb	.L127
.L125:
	movzx	eax, BYTE PTR pc4_l2[rip]
	test	al, al
	je	.L127
	movzx	eax, BYTE PTR pc4_l1[rip]
	test	al, al
	je	.L127
	movzx	eax, BYTE PTR pc4_l0[rip]
	test	al, al
	jne	.L127
	movzx	eax, BYTE PTR _x_pc4_l2[rip]
	test	al, al
	jne	.L127
	movzx	eax, BYTE PTR _x_pc4_l0[rip]
	test	al, al
	je	.L127
	movzx	eax, BYTE PTR _x_pc4_l1[rip]
	test	al, al
	je	.L89
.L127:
	movzx	eax, BYTE PTR pc4_evt0[rip]
	test	al, al
	je	.L128
	movzx	eax, BYTE PTR pc4_evt1[rip]
	test	al, al
	je	.L128
	movss	xmm0, DWORD PTR pc4_x[rip]
	movss	xmm1, DWORD PTR _x_pc4_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L128
	ucomiss	xmm0, xmm1
	jne	.L128
	movzx	eax, BYTE PTR _x_pc4_l2[rip]
	test	al, al
	je	.L130
	movzx	eax, BYTE PTR _x_pc4_l0[rip]
	test	al, al
	je	.L130
	movzx	eax, BYTE PTR _x_pc4_l1[rip]
	test	al, al
	je	.L131
.L130:
	movzx	eax, BYTE PTR _x_pc4_l2[rip]
	test	al, al
	jne	.L128
	movzx	eax, BYTE PTR _x_pc4_l0[rip]
	test	al, al
	je	.L128
	movzx	eax, BYTE PTR _x_pc4_l1[rip]
	test	al, al
	jne	.L131
.L128:
	movzx	eax, BYTE PTR pc4_l2[rip]
	test	al, al
	jne	.L131
	movzx	eax, BYTE PTR pc4_l0[rip]
	test	al, al
	je	.L131
	movzx	eax, BYTE PTR pc4_l1[rip]
	test	al, al
	jne	.L131
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L131
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L131
	movzx	eax, BYTE PTR pc4_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc4_evt1[rip]
	test	al, al
	jne	.L89
.L131:
	movss	xmm0, DWORD PTR pc4_x[rip]
	comiss	xmm0, DWORD PTR .LC3[rip]
	jnb	.L132
	movzx	eax, BYTE PTR pc4_l2[rip]
	test	al, al
	jne	.L132
	movzx	eax, BYTE PTR pc4_l0[rip]
	test	al, al
	je	.L132
	movzx	eax, BYTE PTR pc4_l1[rip]
	test	al, al
	jne	.L132
	movzx	eax, BYTE PTR _x_pc4_l2[rip]
	test	al, al
	jne	.L132
	movzx	eax, BYTE PTR _x_pc4_l0[rip]
	test	al, al
	je	.L132
	movzx	eax, BYTE PTR _x_pc4_l1[rip]
	test	al, al
	jne	.L89
.L132:
	movss	xmm1, DWORD PTR pc4_x[rip]
	movss	xmm0, DWORD PTR .LC4[rip]
	comiss	xmm0, xmm1
	jnb	.L133
	movzx	eax, BYTE PTR pc4_l2[rip]
	test	al, al
	jne	.L133
	movzx	eax, BYTE PTR pc4_l0[rip]
	test	al, al
	je	.L133
	movzx	eax, BYTE PTR pc4_l1[rip]
	test	al, al
	jne	.L133
	movzx	eax, BYTE PTR _x_pc4_l2[rip]
	test	al, al
	je	.L133
	movzx	eax, BYTE PTR _x_pc4_l0[rip]
	test	al, al
	je	.L133
	movzx	eax, BYTE PTR _x_pc4_l1[rip]
	test	al, al
	je	.L89
.L133:
	movzx	eax, BYTE PTR _x_pc4_l2[rip]
	test	al, al
	jne	.L134
	movzx	eax, BYTE PTR _x_pc4_l0[rip]
	test	al, al
	je	.L134
	movzx	eax, BYTE PTR _x_pc4_l1[rip]
	test	al, al
	jne	.L135
.L134:
	movzx	eax, BYTE PTR pc4_l2[rip]
	test	al, al
	jne	.L135
	movzx	eax, BYTE PTR pc4_l0[rip]
	test	al, al
	je	.L135
	movzx	eax, BYTE PTR pc4_l1[rip]
	test	al, al
	je	.L135
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L135
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L135
	movzx	eax, BYTE PTR pc4_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc4_evt1[rip]
	test	al, al
	jne	.L89
.L135:
	movzx	eax, BYTE PTR _x_pc4_l2[rip]
	test	al, al
	jne	.L136
	movzx	eax, BYTE PTR _x_pc4_l0[rip]
	test	al, al
	jne	.L136
	movzx	eax, BYTE PTR _x_pc4_l1[rip]
	test	al, al
	je	.L137
.L136:
	movzx	eax, BYTE PTR pc4_l2[rip]
	test	al, al
	je	.L137
	movzx	eax, BYTE PTR pc4_l0[rip]
	test	al, al
	je	.L137
	movzx	eax, BYTE PTR pc4_l1[rip]
	test	al, al
	jne	.L137
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L137
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L137
	movzx	eax, BYTE PTR pc4_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc4_evt1[rip]
	test	al, al
	jne	.L89
.L137:
	movzx	eax, BYTE PTR _x_pc3_evt0[rip]
	test	al, al
	jne	.L138
	movzx	eax, BYTE PTR _x_pc3_evt1[rip]
	test	al, al
	je	.L139
.L138:
	movzx	eax, BYTE PTR _x_pc3_evt1[rip]
	test	al, al
	je	.L140
	movzx	eax, BYTE PTR _x_pc3_evt0[rip]
	test	al, al
	je	.L139
.L140:
	movzx	eax, BYTE PTR _x_pc3_evt0[rip]
	test	al, al
	je	.L141
	movzx	eax, BYTE PTR _x_pc3_evt1[rip]
	test	al, al
	je	.L139
.L141:
	movzx	eax, BYTE PTR _x_pc3_evt0[rip]
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR _x_pc3_evt1[rip]
	test	al, al
	je	.L89
.L139:
	movzx	eax, BYTE PTR _x_pc3_l2[rip]
	test	al, al
	jne	.L142
	movzx	eax, BYTE PTR _x_pc3_l0[rip]
	test	al, al
	je	.L142
	movzx	eax, BYTE PTR _x_pc3_l1[rip]
	test	al, al
	jne	.L143
.L142:
	movzx	eax, BYTE PTR _x_pc3_l2[rip]
	test	al, al
	jne	.L144
	movzx	eax, BYTE PTR _x_pc3_l0[rip]
	test	al, al
	jne	.L144
	movzx	eax, BYTE PTR _x_pc3_l1[rip]
	test	al, al
	je	.L143
.L144:
	movzx	eax, BYTE PTR _x_pc3_l2[rip]
	test	al, al
	je	.L145
	movzx	eax, BYTE PTR _x_pc3_l0[rip]
	test	al, al
	jne	.L145
	movzx	eax, BYTE PTR _x_pc3_l1[rip]
	test	al, al
	je	.L143
.L145:
	movzx	eax, BYTE PTR _x_pc3_l2[rip]
	test	al, al
	jne	.L146
	movzx	eax, BYTE PTR _x_pc3_l1[rip]
	test	al, al
	je	.L146
	movzx	eax, BYTE PTR _x_pc3_l0[rip]
	test	al, al
	je	.L143
.L146:
	movzx	eax, BYTE PTR _x_pc3_l2[rip]
	test	al, al
	je	.L147
	movzx	eax, BYTE PTR _x_pc3_l1[rip]
	test	al, al
	je	.L147
	movzx	eax, BYTE PTR _x_pc3_l0[rip]
	test	al, al
	je	.L143
.L147:
	movzx	eax, BYTE PTR _x_pc3_l2[rip]
	test	al, al
	jne	.L148
	movzx	eax, BYTE PTR _x_pc3_l0[rip]
	test	al, al
	je	.L148
	movzx	eax, BYTE PTR _x_pc3_l1[rip]
	test	al, al
	je	.L143
.L148:
	movzx	eax, BYTE PTR _x_pc3_l2[rip]
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR _x_pc3_l0[rip]
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR _x_pc3_l1[rip]
	test	al, al
	jne	.L89
.L143:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L149
	movzx	eax, BYTE PTR pc3_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_pc3_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR pc3_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_pc3_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR pc3_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_pc3_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L89
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR pc3_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_pc3_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L89
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L89
.L149:
	movzx	eax, BYTE PTR pc3_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_pc3_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L151
	movzx	eax, BYTE PTR pc3_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_pc3_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L151
	movzx	eax, BYTE PTR pc3_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_pc3_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L151
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR pc3_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_pc3_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L151
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L152
.L151:
	movzx	eax, BYTE PTR pc3_evt0[rip]
	test	al, al
	jne	.L152
	movzx	eax, BYTE PTR pc3_evt1[rip]
	test	al, al
	je	.L89
.L152:
	movzx	eax, BYTE PTR pc3_evt0[rip]
	test	al, al
	je	.L154
	movzx	eax, BYTE PTR pc3_evt1[rip]
	test	al, al
	je	.L154
	movss	xmm1, DWORD PTR pc3_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jb	.L154
	movzx	eax, BYTE PTR _x_pc3_l2[rip]
	test	al, al
	je	.L154
	movzx	eax, BYTE PTR _x_pc3_l0[rip]
	test	al, al
	jne	.L154
	movzx	eax, BYTE PTR _x_pc3_l1[rip]
	test	al, al
	jne	.L154
	movss	xmm0, DWORD PTR _x_pc3_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L154
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L156
.L154:
	movzx	eax, BYTE PTR pc3_l2[rip]
	test	al, al
	jne	.L156
	movzx	eax, BYTE PTR pc3_l0[rip]
	test	al, al
	jne	.L156
	movzx	eax, BYTE PTR pc3_l1[rip]
	test	al, al
	jne	.L156
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L156
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L156
	movzx	eax, BYTE PTR pc3_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc3_evt1[rip]
	test	al, al
	jne	.L89
.L156:
	movzx	eax, BYTE PTR pc3_evt0[rip]
	test	al, al
	je	.L158
	movzx	eax, BYTE PTR pc3_evt1[rip]
	test	al, al
	je	.L158
	movzx	eax, BYTE PTR _x_pc3_l2[rip]
	test	al, al
	jne	.L159
	movzx	eax, BYTE PTR _x_pc3_l0[rip]
	test	al, al
	jne	.L159
	movzx	eax, BYTE PTR _x_pc3_l1[rip]
	test	al, al
	je	.L160
.L159:
	movzx	eax, BYTE PTR _x_pc3_l2[rip]
	test	al, al
	jne	.L158
	movzx	eax, BYTE PTR _x_pc3_l1[rip]
	test	al, al
	je	.L158
	movzx	eax, BYTE PTR _x_pc3_l0[rip]
	test	al, al
	je	.L160
.L158:
	movzx	eax, BYTE PTR pc3_l2[rip]
	test	al, al
	je	.L160
	movzx	eax, BYTE PTR pc3_l0[rip]
	test	al, al
	jne	.L160
	movzx	eax, BYTE PTR pc3_l1[rip]
	test	al, al
	jne	.L160
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L160
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L160
	movzx	eax, BYTE PTR pc3_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc3_evt1[rip]
	test	al, al
	jne	.L89
.L160:
	movss	xmm0, DWORD PTR _x_pc3_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L161
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L161
	movss	xmm0, DWORD PTR pc3_x[rip]
	comiss	xmm0, DWORD PTR .LC3[rip]
	jnb	.L163
.L161:
	movzx	eax, BYTE PTR _x_pc3_l2[rip]
	test	al, al
	jne	.L163
	movzx	eax, BYTE PTR _x_pc3_l0[rip]
	test	al, al
	jne	.L163
	movzx	eax, BYTE PTR _x_pc3_l1[rip]
	test	al, al
	jne	.L163
	movzx	eax, BYTE PTR pc3_l2[rip]
	test	al, al
	je	.L163
	movzx	eax, BYTE PTR pc3_l0[rip]
	test	al, al
	jne	.L163
	movzx	eax, BYTE PTR pc3_l1[rip]
	test	al, al
	je	.L89
.L163:
	movss	xmm1, DWORD PTR pc3_x[rip]
	movss	xmm0, DWORD PTR .LC4[rip]
	comiss	xmm0, xmm1
	jb	.L164
	movss	xmm0, DWORD PTR pc3_x[rip]
	movss	xmm1, DWORD PTR _x_pc3_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L164
	ucomiss	xmm0, xmm1
	je	.L166
.L164:
	movzx	eax, BYTE PTR pc3_l2[rip]
	test	al, al
	je	.L166
	movzx	eax, BYTE PTR pc3_l0[rip]
	test	al, al
	jne	.L166
	movzx	eax, BYTE PTR pc3_l1[rip]
	test	al, al
	jne	.L166
	movzx	eax, BYTE PTR _x_pc3_l2[rip]
	test	al, al
	jne	.L166
	movzx	eax, BYTE PTR _x_pc3_l1[rip]
	test	al, al
	je	.L166
	movzx	eax, BYTE PTR _x_pc3_l0[rip]
	test	al, al
	je	.L89
.L166:
	movss	xmm0, DWORD PTR _x_pc3_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L168
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L168
	movzx	eax, BYTE PTR pc3_evt1[rip]
	test	al, al
	je	.L168
	movzx	eax, BYTE PTR pc3_evt0[rip]
	test	al, al
	jne	.L168
	movzx	eax, BYTE PTR _x_pc3_l2[rip]
	test	al, al
	je	.L168
	movzx	eax, BYTE PTR _x_pc3_l1[rip]
	test	al, al
	je	.L168
	movzx	eax, BYTE PTR _x_pc3_l0[rip]
	test	al, al
	je	.L170
.L168:
	movzx	eax, BYTE PTR pc3_l2[rip]
	test	al, al
	jne	.L170
	movzx	eax, BYTE PTR pc3_l1[rip]
	test	al, al
	je	.L170
	movzx	eax, BYTE PTR pc3_l0[rip]
	test	al, al
	jne	.L170
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L170
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L170
	movzx	eax, BYTE PTR pc3_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc3_evt1[rip]
	test	al, al
	jne	.L89
.L170:
	movzx	eax, BYTE PTR _x_pc3_l2[rip]
	test	al, al
	jne	.L171
	movzx	eax, BYTE PTR _x_pc3_l0[rip]
	test	al, al
	je	.L171
	movzx	eax, BYTE PTR _x_pc3_l1[rip]
	test	al, al
	je	.L172
.L171:
	movzx	eax, BYTE PTR _x_pc3_l2[rip]
	test	al, al
	jne	.L173
	movzx	eax, BYTE PTR _x_pc3_l0[rip]
	test	al, al
	je	.L173
	movzx	eax, BYTE PTR _x_pc3_l1[rip]
	test	al, al
	jne	.L172
.L173:
	movzx	eax, BYTE PTR pc3_l2[rip]
	test	al, al
	je	.L172
	movzx	eax, BYTE PTR pc3_l1[rip]
	test	al, al
	je	.L172
	movzx	eax, BYTE PTR pc3_l0[rip]
	test	al, al
	jne	.L172
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L172
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L172
	movzx	eax, BYTE PTR pc3_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc3_evt1[rip]
	test	al, al
	jne	.L89
.L172:
	movss	xmm0, DWORD PTR pc3_x[rip]
	movss	xmm1, DWORD PTR _x_pc3_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L174
	ucomiss	xmm0, xmm1
	jne	.L174
	movzx	eax, BYTE PTR pc3_evt0[rip]
	test	al, al
	je	.L174
	movzx	eax, BYTE PTR pc3_evt1[rip]
	test	al, al
	je	.L174
	movss	xmm0, DWORD PTR pc3_x[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L176
.L174:
	movzx	eax, BYTE PTR pc3_l2[rip]
	test	al, al
	je	.L176
	movzx	eax, BYTE PTR pc3_l1[rip]
	test	al, al
	je	.L176
	movzx	eax, BYTE PTR pc3_l0[rip]
	test	al, al
	jne	.L176
	movzx	eax, BYTE PTR _x_pc3_l2[rip]
	test	al, al
	jne	.L176
	movzx	eax, BYTE PTR _x_pc3_l0[rip]
	test	al, al
	je	.L176
	movzx	eax, BYTE PTR _x_pc3_l1[rip]
	test	al, al
	jne	.L89
.L176:
	movss	xmm0, DWORD PTR _x_pc3_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L177
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L177
	movzx	eax, BYTE PTR pc3_evt0[rip]
	test	al, al
	je	.L177
	movzx	eax, BYTE PTR pc3_evt1[rip]
	test	al, al
	jne	.L177
	movss	xmm1, DWORD PTR pc3_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	jnb	.L179
.L177:
	movzx	eax, BYTE PTR pc3_l2[rip]
	test	al, al
	je	.L179
	movzx	eax, BYTE PTR pc3_l1[rip]
	test	al, al
	je	.L179
	movzx	eax, BYTE PTR pc3_l0[rip]
	test	al, al
	jne	.L179
	movzx	eax, BYTE PTR _x_pc3_l2[rip]
	test	al, al
	jne	.L179
	movzx	eax, BYTE PTR _x_pc3_l0[rip]
	test	al, al
	je	.L179
	movzx	eax, BYTE PTR _x_pc3_l1[rip]
	test	al, al
	je	.L89
.L179:
	movzx	eax, BYTE PTR pc3_evt0[rip]
	test	al, al
	je	.L180
	movzx	eax, BYTE PTR pc3_evt1[rip]
	test	al, al
	je	.L180
	movss	xmm0, DWORD PTR pc3_x[rip]
	movss	xmm1, DWORD PTR _x_pc3_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L180
	ucomiss	xmm0, xmm1
	jne	.L180
	movzx	eax, BYTE PTR _x_pc3_l2[rip]
	test	al, al
	je	.L182
	movzx	eax, BYTE PTR _x_pc3_l0[rip]
	test	al, al
	je	.L182
	movzx	eax, BYTE PTR _x_pc3_l1[rip]
	test	al, al
	je	.L183
.L182:
	movzx	eax, BYTE PTR _x_pc3_l2[rip]
	test	al, al
	jne	.L180
	movzx	eax, BYTE PTR _x_pc3_l0[rip]
	test	al, al
	je	.L180
	movzx	eax, BYTE PTR _x_pc3_l1[rip]
	test	al, al
	jne	.L183
.L180:
	movzx	eax, BYTE PTR pc3_l2[rip]
	test	al, al
	jne	.L183
	movzx	eax, BYTE PTR pc3_l0[rip]
	test	al, al
	je	.L183
	movzx	eax, BYTE PTR pc3_l1[rip]
	test	al, al
	jne	.L183
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L183
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L183
	movzx	eax, BYTE PTR pc3_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc3_evt1[rip]
	test	al, al
	jne	.L89
.L183:
	movss	xmm0, DWORD PTR pc3_x[rip]
	comiss	xmm0, DWORD PTR .LC3[rip]
	jnb	.L184
	movzx	eax, BYTE PTR pc3_l2[rip]
	test	al, al
	jne	.L184
	movzx	eax, BYTE PTR pc3_l0[rip]
	test	al, al
	je	.L184
	movzx	eax, BYTE PTR pc3_l1[rip]
	test	al, al
	jne	.L184
	movzx	eax, BYTE PTR _x_pc3_l2[rip]
	test	al, al
	jne	.L184
	movzx	eax, BYTE PTR _x_pc3_l0[rip]
	test	al, al
	je	.L184
	movzx	eax, BYTE PTR _x_pc3_l1[rip]
	test	al, al
	jne	.L89
.L184:
	movss	xmm1, DWORD PTR pc3_x[rip]
	movss	xmm0, DWORD PTR .LC4[rip]
	comiss	xmm0, xmm1
	jnb	.L185
	movzx	eax, BYTE PTR pc3_l2[rip]
	test	al, al
	jne	.L185
	movzx	eax, BYTE PTR pc3_l0[rip]
	test	al, al
	je	.L185
	movzx	eax, BYTE PTR pc3_l1[rip]
	test	al, al
	jne	.L185
	movzx	eax, BYTE PTR _x_pc3_l2[rip]
	test	al, al
	je	.L185
	movzx	eax, BYTE PTR _x_pc3_l0[rip]
	test	al, al
	je	.L185
	movzx	eax, BYTE PTR _x_pc3_l1[rip]
	test	al, al
	je	.L89
.L185:
	movzx	eax, BYTE PTR _x_pc3_l2[rip]
	test	al, al
	jne	.L186
	movzx	eax, BYTE PTR _x_pc3_l0[rip]
	test	al, al
	je	.L186
	movzx	eax, BYTE PTR _x_pc3_l1[rip]
	test	al, al
	jne	.L187
.L186:
	movzx	eax, BYTE PTR pc3_l2[rip]
	test	al, al
	jne	.L187
	movzx	eax, BYTE PTR pc3_l0[rip]
	test	al, al
	je	.L187
	movzx	eax, BYTE PTR pc3_l1[rip]
	test	al, al
	je	.L187
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L187
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L187
	movzx	eax, BYTE PTR pc3_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc3_evt1[rip]
	test	al, al
	jne	.L89
.L187:
	movzx	eax, BYTE PTR _x_pc3_l2[rip]
	test	al, al
	jne	.L188
	movzx	eax, BYTE PTR _x_pc3_l0[rip]
	test	al, al
	jne	.L188
	movzx	eax, BYTE PTR _x_pc3_l1[rip]
	test	al, al
	je	.L189
.L188:
	movzx	eax, BYTE PTR pc3_l2[rip]
	test	al, al
	je	.L189
	movzx	eax, BYTE PTR pc3_l0[rip]
	test	al, al
	je	.L189
	movzx	eax, BYTE PTR pc3_l1[rip]
	test	al, al
	jne	.L189
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L189
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L189
	movzx	eax, BYTE PTR pc3_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc3_evt1[rip]
	test	al, al
	jne	.L89
.L189:
	movzx	eax, BYTE PTR _x_pc2_evt0[rip]
	test	al, al
	jne	.L190
	movzx	eax, BYTE PTR _x_pc2_evt1[rip]
	test	al, al
	je	.L191
.L190:
	movzx	eax, BYTE PTR _x_pc2_evt1[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_pc2_evt0[rip]
	test	al, al
	je	.L191
.L192:
	movzx	eax, BYTE PTR _x_pc2_evt0[rip]
	test	al, al
	je	.L193
	movzx	eax, BYTE PTR _x_pc2_evt1[rip]
	test	al, al
	je	.L191
.L193:
	movzx	eax, BYTE PTR _x_pc2_evt0[rip]
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR _x_pc2_evt1[rip]
	test	al, al
	je	.L89
.L191:
	movzx	eax, BYTE PTR _x_pc2_l2[rip]
	test	al, al
	jne	.L194
	movzx	eax, BYTE PTR _x_pc2_l0[rip]
	test	al, al
	je	.L194
	movzx	eax, BYTE PTR _x_pc2_l1[rip]
	test	al, al
	jne	.L195
.L194:
	movzx	eax, BYTE PTR _x_pc2_l2[rip]
	test	al, al
	jne	.L196
	movzx	eax, BYTE PTR _x_pc2_l0[rip]
	test	al, al
	jne	.L196
	movzx	eax, BYTE PTR _x_pc2_l1[rip]
	test	al, al
	je	.L195
.L196:
	movzx	eax, BYTE PTR _x_pc2_l2[rip]
	test	al, al
	je	.L197
	movzx	eax, BYTE PTR _x_pc2_l0[rip]
	test	al, al
	jne	.L197
	movzx	eax, BYTE PTR _x_pc2_l1[rip]
	test	al, al
	je	.L195
.L197:
	movzx	eax, BYTE PTR _x_pc2_l2[rip]
	test	al, al
	jne	.L198
	movzx	eax, BYTE PTR _x_pc2_l1[rip]
	test	al, al
	je	.L198
	movzx	eax, BYTE PTR _x_pc2_l0[rip]
	test	al, al
	je	.L195
.L198:
	movzx	eax, BYTE PTR _x_pc2_l2[rip]
	test	al, al
	je	.L199
	movzx	eax, BYTE PTR _x_pc2_l1[rip]
	test	al, al
	je	.L199
	movzx	eax, BYTE PTR _x_pc2_l0[rip]
	test	al, al
	je	.L195
.L199:
	movzx	eax, BYTE PTR _x_pc2_l2[rip]
	test	al, al
	jne	.L200
	movzx	eax, BYTE PTR _x_pc2_l0[rip]
	test	al, al
	je	.L200
	movzx	eax, BYTE PTR _x_pc2_l1[rip]
	test	al, al
	je	.L195
.L200:
	movzx	eax, BYTE PTR _x_pc2_l2[rip]
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR _x_pc2_l0[rip]
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR _x_pc2_l1[rip]
	test	al, al
	jne	.L89
.L195:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L201
	movzx	eax, BYTE PTR pc2_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_pc2_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR pc2_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_pc2_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR pc2_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_pc2_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L89
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR pc2_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_pc2_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L89
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L89
.L201:
	movzx	eax, BYTE PTR pc2_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_pc2_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L203
	movzx	eax, BYTE PTR pc2_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_pc2_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L203
	movzx	eax, BYTE PTR pc2_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_pc2_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L203
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR pc2_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_pc2_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L203
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L204
.L203:
	movzx	eax, BYTE PTR pc2_evt0[rip]
	test	al, al
	jne	.L204
	movzx	eax, BYTE PTR pc2_evt1[rip]
	test	al, al
	je	.L89
.L204:
	movzx	eax, BYTE PTR pc2_evt0[rip]
	test	al, al
	je	.L206
	movzx	eax, BYTE PTR pc2_evt1[rip]
	test	al, al
	je	.L206
	movss	xmm1, DWORD PTR pc2_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jb	.L206
	movzx	eax, BYTE PTR _x_pc2_l2[rip]
	test	al, al
	je	.L206
	movzx	eax, BYTE PTR _x_pc2_l0[rip]
	test	al, al
	jne	.L206
	movzx	eax, BYTE PTR _x_pc2_l1[rip]
	test	al, al
	jne	.L206
	movss	xmm0, DWORD PTR _x_pc2_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L206
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L208
.L206:
	movzx	eax, BYTE PTR pc2_l2[rip]
	test	al, al
	jne	.L208
	movzx	eax, BYTE PTR pc2_l0[rip]
	test	al, al
	jne	.L208
	movzx	eax, BYTE PTR pc2_l1[rip]
	test	al, al
	jne	.L208
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L208
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L208
	movzx	eax, BYTE PTR pc2_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc2_evt1[rip]
	test	al, al
	jne	.L89
.L208:
	movzx	eax, BYTE PTR pc2_evt0[rip]
	test	al, al
	je	.L210
	movzx	eax, BYTE PTR pc2_evt1[rip]
	test	al, al
	je	.L210
	movzx	eax, BYTE PTR _x_pc2_l2[rip]
	test	al, al
	jne	.L211
	movzx	eax, BYTE PTR _x_pc2_l0[rip]
	test	al, al
	jne	.L211
	movzx	eax, BYTE PTR _x_pc2_l1[rip]
	test	al, al
	je	.L212
.L211:
	movzx	eax, BYTE PTR _x_pc2_l2[rip]
	test	al, al
	jne	.L210
	movzx	eax, BYTE PTR _x_pc2_l1[rip]
	test	al, al
	je	.L210
	movzx	eax, BYTE PTR _x_pc2_l0[rip]
	test	al, al
	je	.L212
.L210:
	movzx	eax, BYTE PTR pc2_l2[rip]
	test	al, al
	je	.L212
	movzx	eax, BYTE PTR pc2_l0[rip]
	test	al, al
	jne	.L212
	movzx	eax, BYTE PTR pc2_l1[rip]
	test	al, al
	jne	.L212
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L212
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L212
	movzx	eax, BYTE PTR pc2_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc2_evt1[rip]
	test	al, al
	jne	.L89
.L212:
	movss	xmm0, DWORD PTR _x_pc2_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L213
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L213
	movss	xmm0, DWORD PTR pc2_x[rip]
	comiss	xmm0, DWORD PTR .LC3[rip]
	jnb	.L215
.L213:
	movzx	eax, BYTE PTR _x_pc2_l2[rip]
	test	al, al
	jne	.L215
	movzx	eax, BYTE PTR _x_pc2_l0[rip]
	test	al, al
	jne	.L215
	movzx	eax, BYTE PTR _x_pc2_l1[rip]
	test	al, al
	jne	.L215
	movzx	eax, BYTE PTR pc2_l2[rip]
	test	al, al
	je	.L215
	movzx	eax, BYTE PTR pc2_l0[rip]
	test	al, al
	jne	.L215
	movzx	eax, BYTE PTR pc2_l1[rip]
	test	al, al
	je	.L89
.L215:
	movss	xmm1, DWORD PTR pc2_x[rip]
	movss	xmm0, DWORD PTR .LC4[rip]
	comiss	xmm0, xmm1
	jb	.L216
	movss	xmm0, DWORD PTR pc2_x[rip]
	movss	xmm1, DWORD PTR _x_pc2_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L216
	ucomiss	xmm0, xmm1
	je	.L218
.L216:
	movzx	eax, BYTE PTR pc2_l2[rip]
	test	al, al
	je	.L218
	movzx	eax, BYTE PTR pc2_l0[rip]
	test	al, al
	jne	.L218
	movzx	eax, BYTE PTR pc2_l1[rip]
	test	al, al
	jne	.L218
	movzx	eax, BYTE PTR _x_pc2_l2[rip]
	test	al, al
	jne	.L218
	movzx	eax, BYTE PTR _x_pc2_l1[rip]
	test	al, al
	je	.L218
	movzx	eax, BYTE PTR _x_pc2_l0[rip]
	test	al, al
	je	.L89
.L218:
	movss	xmm0, DWORD PTR _x_pc2_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L220
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L220
	movzx	eax, BYTE PTR pc2_evt1[rip]
	test	al, al
	je	.L220
	movzx	eax, BYTE PTR pc2_evt0[rip]
	test	al, al
	jne	.L220
	movzx	eax, BYTE PTR _x_pc2_l2[rip]
	test	al, al
	je	.L220
	movzx	eax, BYTE PTR _x_pc2_l1[rip]
	test	al, al
	je	.L220
	movzx	eax, BYTE PTR _x_pc2_l0[rip]
	test	al, al
	je	.L222
.L220:
	movzx	eax, BYTE PTR pc2_l2[rip]
	test	al, al
	jne	.L222
	movzx	eax, BYTE PTR pc2_l1[rip]
	test	al, al
	je	.L222
	movzx	eax, BYTE PTR pc2_l0[rip]
	test	al, al
	jne	.L222
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L222
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L222
	movzx	eax, BYTE PTR pc2_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc2_evt1[rip]
	test	al, al
	jne	.L89
.L222:
	movzx	eax, BYTE PTR _x_pc2_l2[rip]
	test	al, al
	jne	.L223
	movzx	eax, BYTE PTR _x_pc2_l0[rip]
	test	al, al
	je	.L223
	movzx	eax, BYTE PTR _x_pc2_l1[rip]
	test	al, al
	je	.L224
.L223:
	movzx	eax, BYTE PTR _x_pc2_l2[rip]
	test	al, al
	jne	.L225
	movzx	eax, BYTE PTR _x_pc2_l0[rip]
	test	al, al
	je	.L225
	movzx	eax, BYTE PTR _x_pc2_l1[rip]
	test	al, al
	jne	.L224
.L225:
	movzx	eax, BYTE PTR pc2_l2[rip]
	test	al, al
	je	.L224
	movzx	eax, BYTE PTR pc2_l1[rip]
	test	al, al
	je	.L224
	movzx	eax, BYTE PTR pc2_l0[rip]
	test	al, al
	jne	.L224
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L224
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L224
	movzx	eax, BYTE PTR pc2_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc2_evt1[rip]
	test	al, al
	jne	.L89
.L224:
	movss	xmm0, DWORD PTR pc2_x[rip]
	movss	xmm1, DWORD PTR _x_pc2_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L226
	ucomiss	xmm0, xmm1
	jne	.L226
	movzx	eax, BYTE PTR pc2_evt0[rip]
	test	al, al
	je	.L226
	movzx	eax, BYTE PTR pc2_evt1[rip]
	test	al, al
	je	.L226
	movss	xmm0, DWORD PTR pc2_x[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L228
.L226:
	movzx	eax, BYTE PTR pc2_l2[rip]
	test	al, al
	je	.L228
	movzx	eax, BYTE PTR pc2_l1[rip]
	test	al, al
	je	.L228
	movzx	eax, BYTE PTR pc2_l0[rip]
	test	al, al
	jne	.L228
	movzx	eax, BYTE PTR _x_pc2_l2[rip]
	test	al, al
	jne	.L228
	movzx	eax, BYTE PTR _x_pc2_l0[rip]
	test	al, al
	je	.L228
	movzx	eax, BYTE PTR _x_pc2_l1[rip]
	test	al, al
	jne	.L89
.L228:
	movss	xmm0, DWORD PTR _x_pc2_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L229
	movzx	eax, BYTE PTR pc2_evt0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR pc2_evt1[rip]
	test	al, al
	jne	.L229
	movss	xmm1, DWORD PTR pc2_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	jnb	.L231
.L229:
	movzx	eax, BYTE PTR pc2_l2[rip]
	test	al, al
	je	.L231
	movzx	eax, BYTE PTR pc2_l1[rip]
	test	al, al
	je	.L231
	movzx	eax, BYTE PTR pc2_l0[rip]
	test	al, al
	jne	.L231
	movzx	eax, BYTE PTR _x_pc2_l2[rip]
	test	al, al
	jne	.L231
	movzx	eax, BYTE PTR _x_pc2_l0[rip]
	test	al, al
	je	.L231
	movzx	eax, BYTE PTR _x_pc2_l1[rip]
	test	al, al
	je	.L89
.L231:
	movzx	eax, BYTE PTR pc2_evt0[rip]
	test	al, al
	je	.L232
	movzx	eax, BYTE PTR pc2_evt1[rip]
	test	al, al
	je	.L232
	movss	xmm0, DWORD PTR pc2_x[rip]
	movss	xmm1, DWORD PTR _x_pc2_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L232
	ucomiss	xmm0, xmm1
	jne	.L232
	movzx	eax, BYTE PTR _x_pc2_l2[rip]
	test	al, al
	je	.L234
	movzx	eax, BYTE PTR _x_pc2_l0[rip]
	test	al, al
	je	.L234
	movzx	eax, BYTE PTR _x_pc2_l1[rip]
	test	al, al
	je	.L235
.L234:
	movzx	eax, BYTE PTR _x_pc2_l2[rip]
	test	al, al
	jne	.L232
	movzx	eax, BYTE PTR _x_pc2_l0[rip]
	test	al, al
	je	.L232
	movzx	eax, BYTE PTR _x_pc2_l1[rip]
	test	al, al
	jne	.L235
.L232:
	movzx	eax, BYTE PTR pc2_l2[rip]
	test	al, al
	jne	.L235
	movzx	eax, BYTE PTR pc2_l0[rip]
	test	al, al
	je	.L235
	movzx	eax, BYTE PTR pc2_l1[rip]
	test	al, al
	jne	.L235
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L235
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L235
	movzx	eax, BYTE PTR pc2_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc2_evt1[rip]
	test	al, al
	jne	.L89
.L235:
	movss	xmm0, DWORD PTR pc2_x[rip]
	comiss	xmm0, DWORD PTR .LC3[rip]
	jnb	.L236
	movzx	eax, BYTE PTR pc2_l2[rip]
	test	al, al
	jne	.L236
	movzx	eax, BYTE PTR pc2_l0[rip]
	test	al, al
	je	.L236
	movzx	eax, BYTE PTR pc2_l1[rip]
	test	al, al
	jne	.L236
	movzx	eax, BYTE PTR _x_pc2_l2[rip]
	test	al, al
	jne	.L236
	movzx	eax, BYTE PTR _x_pc2_l0[rip]
	test	al, al
	je	.L236
	movzx	eax, BYTE PTR _x_pc2_l1[rip]
	test	al, al
	jne	.L89
.L236:
	movss	xmm1, DWORD PTR pc2_x[rip]
	movss	xmm0, DWORD PTR .LC4[rip]
	comiss	xmm0, xmm1
	jnb	.L237
	movzx	eax, BYTE PTR pc2_l2[rip]
	test	al, al
	jne	.L237
	movzx	eax, BYTE PTR pc2_l0[rip]
	test	al, al
	je	.L237
	movzx	eax, BYTE PTR pc2_l1[rip]
	test	al, al
	jne	.L237
	movzx	eax, BYTE PTR _x_pc2_l2[rip]
	test	al, al
	je	.L237
	movzx	eax, BYTE PTR _x_pc2_l0[rip]
	test	al, al
	je	.L237
	movzx	eax, BYTE PTR _x_pc2_l1[rip]
	test	al, al
	je	.L89
.L237:
	movzx	eax, BYTE PTR _x_pc2_l2[rip]
	test	al, al
	jne	.L238
	movzx	eax, BYTE PTR _x_pc2_l0[rip]
	test	al, al
	je	.L238
	movzx	eax, BYTE PTR _x_pc2_l1[rip]
	test	al, al
	jne	.L239
.L238:
	movzx	eax, BYTE PTR pc2_l2[rip]
	test	al, al
	jne	.L239
	movzx	eax, BYTE PTR pc2_l0[rip]
	test	al, al
	je	.L239
	movzx	eax, BYTE PTR pc2_l1[rip]
	test	al, al
	je	.L239
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L239
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L239
	movzx	eax, BYTE PTR pc2_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc2_evt1[rip]
	test	al, al
	jne	.L89
.L239:
	movzx	eax, BYTE PTR _x_pc2_l2[rip]
	test	al, al
	jne	.L240
	movzx	eax, BYTE PTR _x_pc2_l0[rip]
	test	al, al
	jne	.L240
	movzx	eax, BYTE PTR _x_pc2_l1[rip]
	test	al, al
	je	.L241
.L240:
	movzx	eax, BYTE PTR pc2_l2[rip]
	test	al, al
	je	.L241
	movzx	eax, BYTE PTR pc2_l0[rip]
	test	al, al
	je	.L241
	movzx	eax, BYTE PTR pc2_l1[rip]
	test	al, al
	jne	.L241
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L241
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L241
	movzx	eax, BYTE PTR pc2_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc2_evt1[rip]
	test	al, al
	jne	.L89
.L241:
	movzx	eax, BYTE PTR _x_pc1_evt0[rip]
	test	al, al
	jne	.L242
	movzx	eax, BYTE PTR _x_pc1_evt1[rip]
	test	al, al
	je	.L243
.L242:
	movzx	eax, BYTE PTR _x_pc1_evt1[rip]
	test	al, al
	je	.L244
	movzx	eax, BYTE PTR _x_pc1_evt0[rip]
	test	al, al
	je	.L243
.L244:
	movzx	eax, BYTE PTR _x_pc1_evt0[rip]
	test	al, al
	je	.L245
	movzx	eax, BYTE PTR _x_pc1_evt1[rip]
	test	al, al
	je	.L243
.L245:
	movzx	eax, BYTE PTR _x_pc1_evt0[rip]
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR _x_pc1_evt1[rip]
	test	al, al
	je	.L89
.L243:
	movzx	eax, BYTE PTR _x_pc1_l2[rip]
	test	al, al
	jne	.L246
	movzx	eax, BYTE PTR _x_pc1_l0[rip]
	test	al, al
	je	.L246
	movzx	eax, BYTE PTR _x_pc1_l1[rip]
	test	al, al
	jne	.L247
.L246:
	movzx	eax, BYTE PTR _x_pc1_l2[rip]
	test	al, al
	jne	.L248
	movzx	eax, BYTE PTR _x_pc1_l0[rip]
	test	al, al
	jne	.L248
	movzx	eax, BYTE PTR _x_pc1_l1[rip]
	test	al, al
	je	.L247
.L248:
	movzx	eax, BYTE PTR _x_pc1_l2[rip]
	test	al, al
	je	.L249
	movzx	eax, BYTE PTR _x_pc1_l0[rip]
	test	al, al
	jne	.L249
	movzx	eax, BYTE PTR _x_pc1_l1[rip]
	test	al, al
	je	.L247
.L249:
	movzx	eax, BYTE PTR _x_pc1_l2[rip]
	test	al, al
	jne	.L250
	movzx	eax, BYTE PTR _x_pc1_l1[rip]
	test	al, al
	je	.L250
	movzx	eax, BYTE PTR _x_pc1_l0[rip]
	test	al, al
	je	.L247
.L250:
	movzx	eax, BYTE PTR _x_pc1_l2[rip]
	test	al, al
	je	.L251
	movzx	eax, BYTE PTR _x_pc1_l1[rip]
	test	al, al
	je	.L251
	movzx	eax, BYTE PTR _x_pc1_l0[rip]
	test	al, al
	je	.L247
.L251:
	movzx	eax, BYTE PTR _x_pc1_l2[rip]
	test	al, al
	jne	.L252
	movzx	eax, BYTE PTR _x_pc1_l0[rip]
	test	al, al
	je	.L252
	movzx	eax, BYTE PTR _x_pc1_l1[rip]
	test	al, al
	je	.L247
.L252:
	movzx	eax, BYTE PTR _x_pc1_l2[rip]
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR _x_pc1_l0[rip]
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR _x_pc1_l1[rip]
	test	al, al
	jne	.L89
.L247:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L253
	movzx	eax, BYTE PTR pc1_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_pc1_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR pc1_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_pc1_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR pc1_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_pc1_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L89
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR pc1_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_pc1_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L89
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L89
.L253:
	movzx	eax, BYTE PTR pc1_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_pc1_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L255
	movzx	eax, BYTE PTR pc1_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_pc1_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L255
	movzx	eax, BYTE PTR pc1_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_pc1_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L255
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR pc1_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_pc1_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L255
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L256
.L255:
	movzx	eax, BYTE PTR pc1_evt0[rip]
	test	al, al
	jne	.L256
	movzx	eax, BYTE PTR pc1_evt1[rip]
	test	al, al
	je	.L89
.L256:
	movzx	eax, BYTE PTR pc1_evt0[rip]
	test	al, al
	je	.L258
	movzx	eax, BYTE PTR pc1_evt1[rip]
	test	al, al
	je	.L258
	movss	xmm1, DWORD PTR pc1_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jb	.L258
	movzx	eax, BYTE PTR _x_pc1_l2[rip]
	test	al, al
	je	.L258
	movzx	eax, BYTE PTR _x_pc1_l0[rip]
	test	al, al
	jne	.L258
	movzx	eax, BYTE PTR _x_pc1_l1[rip]
	test	al, al
	jne	.L258
	movss	xmm0, DWORD PTR _x_pc1_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L258
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L260
.L258:
	movzx	eax, BYTE PTR pc1_l2[rip]
	test	al, al
	jne	.L260
	movzx	eax, BYTE PTR pc1_l0[rip]
	test	al, al
	jne	.L260
	movzx	eax, BYTE PTR pc1_l1[rip]
	test	al, al
	jne	.L260
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L260
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L260
	movzx	eax, BYTE PTR pc1_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc1_evt1[rip]
	test	al, al
	jne	.L89
.L260:
	movzx	eax, BYTE PTR pc1_evt0[rip]
	test	al, al
	je	.L262
	movzx	eax, BYTE PTR pc1_evt1[rip]
	test	al, al
	je	.L262
	movzx	eax, BYTE PTR _x_pc1_l2[rip]
	test	al, al
	jne	.L263
	movzx	eax, BYTE PTR _x_pc1_l0[rip]
	test	al, al
	jne	.L263
	movzx	eax, BYTE PTR _x_pc1_l1[rip]
	test	al, al
	je	.L264
.L263:
	movzx	eax, BYTE PTR _x_pc1_l2[rip]
	test	al, al
	jne	.L262
	movzx	eax, BYTE PTR _x_pc1_l1[rip]
	test	al, al
	je	.L262
	movzx	eax, BYTE PTR _x_pc1_l0[rip]
	test	al, al
	je	.L264
.L262:
	movzx	eax, BYTE PTR pc1_l2[rip]
	test	al, al
	je	.L264
	movzx	eax, BYTE PTR pc1_l0[rip]
	test	al, al
	jne	.L264
	movzx	eax, BYTE PTR pc1_l1[rip]
	test	al, al
	jne	.L264
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L264
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L264
	movzx	eax, BYTE PTR pc1_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc1_evt1[rip]
	test	al, al
	jne	.L89
.L264:
	movss	xmm0, DWORD PTR _x_pc1_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L265
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L265
	movss	xmm0, DWORD PTR pc1_x[rip]
	comiss	xmm0, DWORD PTR .LC3[rip]
	jnb	.L267
.L265:
	movzx	eax, BYTE PTR _x_pc1_l2[rip]
	test	al, al
	jne	.L267
	movzx	eax, BYTE PTR _x_pc1_l0[rip]
	test	al, al
	jne	.L267
	movzx	eax, BYTE PTR _x_pc1_l1[rip]
	test	al, al
	jne	.L267
	movzx	eax, BYTE PTR pc1_l2[rip]
	test	al, al
	je	.L267
	movzx	eax, BYTE PTR pc1_l0[rip]
	test	al, al
	jne	.L267
	movzx	eax, BYTE PTR pc1_l1[rip]
	test	al, al
	je	.L89
.L267:
	movss	xmm1, DWORD PTR pc1_x[rip]
	movss	xmm0, DWORD PTR .LC4[rip]
	comiss	xmm0, xmm1
	jb	.L268
	movss	xmm0, DWORD PTR pc1_x[rip]
	movss	xmm1, DWORD PTR _x_pc1_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L268
	ucomiss	xmm0, xmm1
	je	.L270
.L268:
	movzx	eax, BYTE PTR pc1_l2[rip]
	test	al, al
	je	.L270
	movzx	eax, BYTE PTR pc1_l0[rip]
	test	al, al
	jne	.L270
	movzx	eax, BYTE PTR pc1_l1[rip]
	test	al, al
	jne	.L270
	movzx	eax, BYTE PTR _x_pc1_l2[rip]
	test	al, al
	jne	.L270
	movzx	eax, BYTE PTR _x_pc1_l1[rip]
	test	al, al
	je	.L270
	movzx	eax, BYTE PTR _x_pc1_l0[rip]
	test	al, al
	je	.L89
.L270:
	movss	xmm0, DWORD PTR _x_pc1_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L272
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L272
	movzx	eax, BYTE PTR pc1_evt1[rip]
	test	al, al
	je	.L272
	movzx	eax, BYTE PTR pc1_evt0[rip]
	test	al, al
	jne	.L272
	movzx	eax, BYTE PTR _x_pc1_l2[rip]
	test	al, al
	je	.L272
	movzx	eax, BYTE PTR _x_pc1_l1[rip]
	test	al, al
	je	.L272
	movzx	eax, BYTE PTR _x_pc1_l0[rip]
	test	al, al
	je	.L274
.L272:
	movzx	eax, BYTE PTR pc1_l2[rip]
	test	al, al
	jne	.L274
	movzx	eax, BYTE PTR pc1_l1[rip]
	test	al, al
	je	.L274
	movzx	eax, BYTE PTR pc1_l0[rip]
	test	al, al
	jne	.L274
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L274
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L274
	movzx	eax, BYTE PTR pc1_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc1_evt1[rip]
	test	al, al
	jne	.L89
.L274:
	movzx	eax, BYTE PTR _x_pc1_l2[rip]
	test	al, al
	jne	.L275
	movzx	eax, BYTE PTR _x_pc1_l0[rip]
	test	al, al
	je	.L275
	movzx	eax, BYTE PTR _x_pc1_l1[rip]
	test	al, al
	je	.L276
.L275:
	movzx	eax, BYTE PTR _x_pc1_l2[rip]
	test	al, al
	jne	.L277
	movzx	eax, BYTE PTR _x_pc1_l0[rip]
	test	al, al
	je	.L277
	movzx	eax, BYTE PTR _x_pc1_l1[rip]
	test	al, al
	jne	.L276
.L277:
	movzx	eax, BYTE PTR pc1_l2[rip]
	test	al, al
	je	.L276
	movzx	eax, BYTE PTR pc1_l1[rip]
	test	al, al
	je	.L276
	movzx	eax, BYTE PTR pc1_l0[rip]
	test	al, al
	jne	.L276
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L276
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L276
	movzx	eax, BYTE PTR pc1_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc1_evt1[rip]
	test	al, al
	jne	.L89
.L276:
	movss	xmm0, DWORD PTR pc1_x[rip]
	movss	xmm1, DWORD PTR _x_pc1_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L278
	ucomiss	xmm0, xmm1
	jne	.L278
	movzx	eax, BYTE PTR pc1_evt0[rip]
	test	al, al
	je	.L278
	movzx	eax, BYTE PTR pc1_evt1[rip]
	test	al, al
	je	.L278
	movss	xmm0, DWORD PTR pc1_x[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L280
.L278:
	movzx	eax, BYTE PTR pc1_l2[rip]
	test	al, al
	je	.L280
	movzx	eax, BYTE PTR pc1_l1[rip]
	test	al, al
	je	.L280
	movzx	eax, BYTE PTR pc1_l0[rip]
	test	al, al
	jne	.L280
	movzx	eax, BYTE PTR _x_pc1_l2[rip]
	test	al, al
	jne	.L280
	movzx	eax, BYTE PTR _x_pc1_l0[rip]
	test	al, al
	je	.L280
	movzx	eax, BYTE PTR _x_pc1_l1[rip]
	test	al, al
	jne	.L89
.L280:
	movss	xmm0, DWORD PTR _x_pc1_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L281
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L281
	movzx	eax, BYTE PTR pc1_evt0[rip]
	test	al, al
	je	.L281
	movzx	eax, BYTE PTR pc1_evt1[rip]
	test	al, al
	jne	.L281
	movss	xmm1, DWORD PTR pc1_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	jnb	.L283
.L281:
	movzx	eax, BYTE PTR pc1_l2[rip]
	test	al, al
	je	.L283
	movzx	eax, BYTE PTR pc1_l1[rip]
	test	al, al
	je	.L283
	movzx	eax, BYTE PTR pc1_l0[rip]
	test	al, al
	jne	.L283
	movzx	eax, BYTE PTR _x_pc1_l2[rip]
	test	al, al
	jne	.L283
	movzx	eax, BYTE PTR _x_pc1_l0[rip]
	test	al, al
	je	.L283
	movzx	eax, BYTE PTR _x_pc1_l1[rip]
	test	al, al
	je	.L89
.L283:
	movzx	eax, BYTE PTR pc1_evt0[rip]
	test	al, al
	je	.L284
	movzx	eax, BYTE PTR pc1_evt1[rip]
	test	al, al
	je	.L284
	movss	xmm0, DWORD PTR pc1_x[rip]
	movss	xmm1, DWORD PTR _x_pc1_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L284
	ucomiss	xmm0, xmm1
	jne	.L284
	movzx	eax, BYTE PTR _x_pc1_l2[rip]
	test	al, al
	je	.L286
	movzx	eax, BYTE PTR _x_pc1_l0[rip]
	test	al, al
	je	.L286
	movzx	eax, BYTE PTR _x_pc1_l1[rip]
	test	al, al
	je	.L287
.L286:
	movzx	eax, BYTE PTR _x_pc1_l2[rip]
	test	al, al
	jne	.L284
	movzx	eax, BYTE PTR _x_pc1_l0[rip]
	test	al, al
	je	.L284
	movzx	eax, BYTE PTR _x_pc1_l1[rip]
	test	al, al
	jne	.L287
.L284:
	movzx	eax, BYTE PTR pc1_l2[rip]
	test	al, al
	jne	.L287
	movzx	eax, BYTE PTR pc1_l0[rip]
	test	al, al
	je	.L287
	movzx	eax, BYTE PTR pc1_l1[rip]
	test	al, al
	jne	.L287
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L287
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L287
	movzx	eax, BYTE PTR pc1_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc1_evt1[rip]
	test	al, al
	jne	.L89
.L287:
	movss	xmm0, DWORD PTR pc1_x[rip]
	comiss	xmm0, DWORD PTR .LC3[rip]
	jnb	.L288
	movzx	eax, BYTE PTR pc1_l2[rip]
	test	al, al
	jne	.L288
	movzx	eax, BYTE PTR pc1_l0[rip]
	test	al, al
	je	.L288
	movzx	eax, BYTE PTR pc1_l1[rip]
	test	al, al
	jne	.L288
	movzx	eax, BYTE PTR _x_pc1_l2[rip]
	test	al, al
	jne	.L288
	movzx	eax, BYTE PTR _x_pc1_l0[rip]
	test	al, al
	je	.L288
	movzx	eax, BYTE PTR _x_pc1_l1[rip]
	test	al, al
	jne	.L89
.L288:
	movss	xmm1, DWORD PTR pc1_x[rip]
	movss	xmm0, DWORD PTR .LC4[rip]
	comiss	xmm0, xmm1
	jnb	.L289
	movzx	eax, BYTE PTR pc1_l2[rip]
	test	al, al
	jne	.L289
	movzx	eax, BYTE PTR pc1_l0[rip]
	test	al, al
	je	.L289
	movzx	eax, BYTE PTR pc1_l1[rip]
	test	al, al
	jne	.L289
	movzx	eax, BYTE PTR _x_pc1_l2[rip]
	test	al, al
	je	.L289
	movzx	eax, BYTE PTR _x_pc1_l0[rip]
	test	al, al
	je	.L289
	movzx	eax, BYTE PTR _x_pc1_l1[rip]
	test	al, al
	je	.L89
.L289:
	movzx	eax, BYTE PTR _x_pc1_l2[rip]
	test	al, al
	jne	.L290
	movzx	eax, BYTE PTR _x_pc1_l0[rip]
	test	al, al
	je	.L290
	movzx	eax, BYTE PTR _x_pc1_l1[rip]
	test	al, al
	jne	.L291
.L290:
	movzx	eax, BYTE PTR pc1_l2[rip]
	test	al, al
	jne	.L291
	movzx	eax, BYTE PTR pc1_l0[rip]
	test	al, al
	je	.L291
	movzx	eax, BYTE PTR pc1_l1[rip]
	test	al, al
	je	.L291
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L291
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L291
	movzx	eax, BYTE PTR pc1_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc1_evt1[rip]
	test	al, al
	jne	.L89
.L291:
	movzx	eax, BYTE PTR _x_pc1_l2[rip]
	test	al, al
	jne	.L292
	movzx	eax, BYTE PTR _x_pc1_l0[rip]
	test	al, al
	jne	.L292
	movzx	eax, BYTE PTR _x_pc1_l1[rip]
	test	al, al
	je	.L293
.L292:
	movzx	eax, BYTE PTR pc1_l2[rip]
	test	al, al
	je	.L293
	movzx	eax, BYTE PTR pc1_l0[rip]
	test	al, al
	je	.L293
	movzx	eax, BYTE PTR pc1_l1[rip]
	test	al, al
	jne	.L293
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L293
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L293
	movzx	eax, BYTE PTR pc1_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc1_evt1[rip]
	test	al, al
	jne	.L89
.L293:
	movzx	eax, BYTE PTR _x_pc0_evt0[rip]
	test	al, al
	jne	.L294
	movzx	eax, BYTE PTR _x_pc0_evt1[rip]
	test	al, al
	je	.L295
.L294:
	movzx	eax, BYTE PTR _x_pc0_evt1[rip]
	test	al, al
	je	.L296
	movzx	eax, BYTE PTR _x_pc0_evt0[rip]
	test	al, al
	je	.L295
.L296:
	movzx	eax, BYTE PTR _x_pc0_evt0[rip]
	test	al, al
	je	.L297
	movzx	eax, BYTE PTR _x_pc0_evt1[rip]
	test	al, al
	je	.L295
.L297:
	movzx	eax, BYTE PTR _x_pc0_evt0[rip]
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR _x_pc0_evt1[rip]
	test	al, al
	je	.L89
.L295:
	movzx	eax, BYTE PTR _x_pc0_l2[rip]
	test	al, al
	jne	.L298
	movzx	eax, BYTE PTR _x_pc0_l0[rip]
	test	al, al
	je	.L298
	movzx	eax, BYTE PTR _x_pc0_l1[rip]
	test	al, al
	jne	.L299
.L298:
	movzx	eax, BYTE PTR _x_pc0_l2[rip]
	test	al, al
	jne	.L300
	movzx	eax, BYTE PTR _x_pc0_l0[rip]
	test	al, al
	jne	.L300
	movzx	eax, BYTE PTR _x_pc0_l1[rip]
	test	al, al
	je	.L299
.L300:
	movzx	eax, BYTE PTR _x_pc0_l2[rip]
	test	al, al
	je	.L301
	movzx	eax, BYTE PTR _x_pc0_l0[rip]
	test	al, al
	jne	.L301
	movzx	eax, BYTE PTR _x_pc0_l1[rip]
	test	al, al
	je	.L299
.L301:
	movzx	eax, BYTE PTR _x_pc0_l2[rip]
	test	al, al
	jne	.L302
	movzx	eax, BYTE PTR _x_pc0_l1[rip]
	test	al, al
	je	.L302
	movzx	eax, BYTE PTR _x_pc0_l0[rip]
	test	al, al
	je	.L299
.L302:
	movzx	eax, BYTE PTR _x_pc0_l2[rip]
	test	al, al
	je	.L303
	movzx	eax, BYTE PTR _x_pc0_l1[rip]
	test	al, al
	je	.L303
	movzx	eax, BYTE PTR _x_pc0_l0[rip]
	test	al, al
	je	.L299
.L303:
	movzx	eax, BYTE PTR _x_pc0_l2[rip]
	test	al, al
	jne	.L304
	movzx	eax, BYTE PTR _x_pc0_l0[rip]
	test	al, al
	je	.L304
	movzx	eax, BYTE PTR _x_pc0_l1[rip]
	test	al, al
	je	.L299
.L304:
	movzx	eax, BYTE PTR _x_pc0_l2[rip]
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR _x_pc0_l0[rip]
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR _x_pc0_l1[rip]
	test	al, al
	jne	.L89
.L299:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L305
	movzx	eax, BYTE PTR pc0_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_pc0_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR pc0_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_pc0_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR pc0_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_pc0_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L89
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR pc0_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_pc0_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L89
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L89
.L305:
	movzx	eax, BYTE PTR pc0_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_pc0_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L307
	movzx	eax, BYTE PTR pc0_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_pc0_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L307
	movzx	eax, BYTE PTR pc0_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_pc0_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L307
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR pc0_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_pc0_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L307
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L308
.L307:
	movzx	eax, BYTE PTR pc0_evt0[rip]
	test	al, al
	jne	.L308
	movzx	eax, BYTE PTR pc0_evt1[rip]
	test	al, al
	je	.L89
.L308:
	movzx	eax, BYTE PTR pc0_evt0[rip]
	test	al, al
	je	.L310
	movzx	eax, BYTE PTR pc0_evt1[rip]
	test	al, al
	je	.L310
	movss	xmm1, DWORD PTR pc0_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jb	.L310
	movzx	eax, BYTE PTR _x_pc0_l2[rip]
	test	al, al
	je	.L310
	movzx	eax, BYTE PTR _x_pc0_l0[rip]
	test	al, al
	jne	.L310
	movzx	eax, BYTE PTR _x_pc0_l1[rip]
	test	al, al
	jne	.L310
	movss	xmm0, DWORD PTR _x_pc0_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L310
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L312
.L310:
	movzx	eax, BYTE PTR pc0_l2[rip]
	test	al, al
	jne	.L312
	movzx	eax, BYTE PTR pc0_l0[rip]
	test	al, al
	jne	.L312
	movzx	eax, BYTE PTR pc0_l1[rip]
	test	al, al
	jne	.L312
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L312
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L312
	movzx	eax, BYTE PTR pc0_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc0_evt1[rip]
	test	al, al
	jne	.L89
.L312:
	movzx	eax, BYTE PTR pc0_evt0[rip]
	test	al, al
	je	.L314
	movzx	eax, BYTE PTR pc0_evt1[rip]
	test	al, al
	je	.L314
	movzx	eax, BYTE PTR _x_pc0_l2[rip]
	test	al, al
	jne	.L315
	movzx	eax, BYTE PTR _x_pc0_l0[rip]
	test	al, al
	jne	.L315
	movzx	eax, BYTE PTR _x_pc0_l1[rip]
	test	al, al
	je	.L316
.L315:
	movzx	eax, BYTE PTR _x_pc0_l2[rip]
	test	al, al
	jne	.L314
	movzx	eax, BYTE PTR _x_pc0_l1[rip]
	test	al, al
	je	.L314
	movzx	eax, BYTE PTR _x_pc0_l0[rip]
	test	al, al
	je	.L316
.L314:
	movzx	eax, BYTE PTR pc0_l2[rip]
	test	al, al
	je	.L316
	movzx	eax, BYTE PTR pc0_l0[rip]
	test	al, al
	jne	.L316
	movzx	eax, BYTE PTR pc0_l1[rip]
	test	al, al
	jne	.L316
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L316
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L316
	movzx	eax, BYTE PTR pc0_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc0_evt1[rip]
	test	al, al
	jne	.L89
.L316:
	movss	xmm0, DWORD PTR _x_pc0_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L317
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L317
	movss	xmm0, DWORD PTR pc0_x[rip]
	comiss	xmm0, DWORD PTR .LC3[rip]
	jnb	.L319
.L317:
	movzx	eax, BYTE PTR _x_pc0_l2[rip]
	test	al, al
	jne	.L319
	movzx	eax, BYTE PTR _x_pc0_l0[rip]
	test	al, al
	jne	.L319
	movzx	eax, BYTE PTR _x_pc0_l1[rip]
	test	al, al
	jne	.L319
	movzx	eax, BYTE PTR pc0_l2[rip]
	test	al, al
	je	.L319
	movzx	eax, BYTE PTR pc0_l0[rip]
	test	al, al
	jne	.L319
	movzx	eax, BYTE PTR pc0_l1[rip]
	test	al, al
	je	.L89
.L319:
	movss	xmm1, DWORD PTR pc0_x[rip]
	movss	xmm0, DWORD PTR .LC4[rip]
	comiss	xmm0, xmm1
	jb	.L320
	movss	xmm0, DWORD PTR pc0_x[rip]
	movss	xmm1, DWORD PTR _x_pc0_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L320
	ucomiss	xmm0, xmm1
	je	.L322
.L320:
	movzx	eax, BYTE PTR pc0_l2[rip]
	test	al, al
	je	.L322
	movzx	eax, BYTE PTR pc0_l0[rip]
	test	al, al
	jne	.L322
	movzx	eax, BYTE PTR pc0_l1[rip]
	test	al, al
	jne	.L322
	movzx	eax, BYTE PTR _x_pc0_l2[rip]
	test	al, al
	jne	.L322
	movzx	eax, BYTE PTR _x_pc0_l1[rip]
	test	al, al
	je	.L322
	movzx	eax, BYTE PTR _x_pc0_l0[rip]
	test	al, al
	je	.L89
.L322:
	movss	xmm0, DWORD PTR _x_pc0_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L324
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L324
	movzx	eax, BYTE PTR pc0_evt1[rip]
	test	al, al
	je	.L324
	movzx	eax, BYTE PTR pc0_evt0[rip]
	test	al, al
	jne	.L324
	movzx	eax, BYTE PTR _x_pc0_l2[rip]
	test	al, al
	je	.L324
	movzx	eax, BYTE PTR _x_pc0_l1[rip]
	test	al, al
	je	.L324
	movzx	eax, BYTE PTR _x_pc0_l0[rip]
	test	al, al
	je	.L326
.L324:
	movzx	eax, BYTE PTR pc0_l2[rip]
	test	al, al
	jne	.L326
	movzx	eax, BYTE PTR pc0_l1[rip]
	test	al, al
	je	.L326
	movzx	eax, BYTE PTR pc0_l0[rip]
	test	al, al
	jne	.L326
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L326
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L326
	movzx	eax, BYTE PTR pc0_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc0_evt1[rip]
	test	al, al
	jne	.L89
.L326:
	movzx	eax, BYTE PTR _x_pc0_l2[rip]
	test	al, al
	jne	.L327
	movzx	eax, BYTE PTR _x_pc0_l0[rip]
	test	al, al
	je	.L327
	movzx	eax, BYTE PTR _x_pc0_l1[rip]
	test	al, al
	je	.L328
.L327:
	movzx	eax, BYTE PTR _x_pc0_l2[rip]
	test	al, al
	jne	.L329
	movzx	eax, BYTE PTR _x_pc0_l0[rip]
	test	al, al
	je	.L329
	movzx	eax, BYTE PTR _x_pc0_l1[rip]
	test	al, al
	jne	.L328
.L329:
	movzx	eax, BYTE PTR pc0_l2[rip]
	test	al, al
	je	.L328
	movzx	eax, BYTE PTR pc0_l1[rip]
	test	al, al
	je	.L328
	movzx	eax, BYTE PTR pc0_l0[rip]
	test	al, al
	jne	.L328
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L328
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L328
	movzx	eax, BYTE PTR pc0_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc0_evt1[rip]
	test	al, al
	jne	.L89
.L328:
	movss	xmm0, DWORD PTR pc0_x[rip]
	movss	xmm1, DWORD PTR _x_pc0_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L330
	ucomiss	xmm0, xmm1
	jne	.L330
	movzx	eax, BYTE PTR pc0_evt0[rip]
	test	al, al
	je	.L330
	movzx	eax, BYTE PTR pc0_evt1[rip]
	test	al, al
	je	.L330
	movss	xmm0, DWORD PTR pc0_x[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L332
.L330:
	movzx	eax, BYTE PTR pc0_l2[rip]
	test	al, al
	je	.L332
	movzx	eax, BYTE PTR pc0_l1[rip]
	test	al, al
	je	.L332
	movzx	eax, BYTE PTR pc0_l0[rip]
	test	al, al
	jne	.L332
	movzx	eax, BYTE PTR _x_pc0_l2[rip]
	test	al, al
	jne	.L332
	movzx	eax, BYTE PTR _x_pc0_l0[rip]
	test	al, al
	je	.L332
	movzx	eax, BYTE PTR _x_pc0_l1[rip]
	test	al, al
	jne	.L89
.L332:
	movss	xmm0, DWORD PTR _x_pc0_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L333
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L333
	movzx	eax, BYTE PTR pc0_evt0[rip]
	test	al, al
	je	.L333
	movzx	eax, BYTE PTR pc0_evt1[rip]
	test	al, al
	jne	.L333
	movss	xmm1, DWORD PTR pc0_x[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	jnb	.L335
.L333:
	movzx	eax, BYTE PTR pc0_l2[rip]
	test	al, al
	je	.L335
	movzx	eax, BYTE PTR pc0_l1[rip]
	test	al, al
	je	.L335
	movzx	eax, BYTE PTR pc0_l0[rip]
	test	al, al
	jne	.L335
	movzx	eax, BYTE PTR _x_pc0_l2[rip]
	test	al, al
	jne	.L335
	movzx	eax, BYTE PTR _x_pc0_l0[rip]
	test	al, al
	je	.L335
	movzx	eax, BYTE PTR _x_pc0_l1[rip]
	test	al, al
	je	.L89
.L335:
	movzx	eax, BYTE PTR pc0_evt0[rip]
	test	al, al
	je	.L336
	movzx	eax, BYTE PTR pc0_evt1[rip]
	test	al, al
	je	.L336
	movss	xmm0, DWORD PTR pc0_x[rip]
	movss	xmm1, DWORD PTR _x_pc0_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L336
	ucomiss	xmm0, xmm1
	jne	.L336
	movzx	eax, BYTE PTR _x_pc0_l2[rip]
	test	al, al
	je	.L338
	movzx	eax, BYTE PTR _x_pc0_l0[rip]
	test	al, al
	je	.L338
	movzx	eax, BYTE PTR _x_pc0_l1[rip]
	test	al, al
	je	.L339
.L338:
	movzx	eax, BYTE PTR _x_pc0_l2[rip]
	test	al, al
	jne	.L336
	movzx	eax, BYTE PTR _x_pc0_l0[rip]
	test	al, al
	je	.L336
	movzx	eax, BYTE PTR _x_pc0_l1[rip]
	test	al, al
	jne	.L339
.L336:
	movzx	eax, BYTE PTR pc0_l2[rip]
	test	al, al
	jne	.L339
	movzx	eax, BYTE PTR pc0_l0[rip]
	test	al, al
	je	.L339
	movzx	eax, BYTE PTR pc0_l1[rip]
	test	al, al
	jne	.L339
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L339
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L339
	movzx	eax, BYTE PTR pc0_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc0_evt1[rip]
	test	al, al
	jne	.L89
.L339:
	movss	xmm0, DWORD PTR pc0_x[rip]
	comiss	xmm0, DWORD PTR .LC3[rip]
	jnb	.L340
	movzx	eax, BYTE PTR pc0_l2[rip]
	test	al, al
	jne	.L340
	movzx	eax, BYTE PTR pc0_l0[rip]
	test	al, al
	je	.L340
	movzx	eax, BYTE PTR pc0_l1[rip]
	test	al, al
	jne	.L340
	movzx	eax, BYTE PTR _x_pc0_l2[rip]
	test	al, al
	jne	.L340
	movzx	eax, BYTE PTR _x_pc0_l0[rip]
	test	al, al
	je	.L340
	movzx	eax, BYTE PTR _x_pc0_l1[rip]
	test	al, al
	jne	.L89
.L340:
	movss	xmm1, DWORD PTR pc0_x[rip]
	movss	xmm0, DWORD PTR .LC4[rip]
	comiss	xmm0, xmm1
	jnb	.L341
	movzx	eax, BYTE PTR pc0_l2[rip]
	test	al, al
	jne	.L341
	movzx	eax, BYTE PTR pc0_l0[rip]
	test	al, al
	je	.L341
	movzx	eax, BYTE PTR pc0_l1[rip]
	test	al, al
	jne	.L341
	movzx	eax, BYTE PTR _x_pc0_l2[rip]
	test	al, al
	je	.L341
	movzx	eax, BYTE PTR _x_pc0_l0[rip]
	test	al, al
	je	.L341
	movzx	eax, BYTE PTR _x_pc0_l1[rip]
	test	al, al
	je	.L89
.L341:
	movzx	eax, BYTE PTR _x_pc0_l2[rip]
	test	al, al
	jne	.L342
	movzx	eax, BYTE PTR _x_pc0_l0[rip]
	test	al, al
	je	.L342
	movzx	eax, BYTE PTR _x_pc0_l1[rip]
	test	al, al
	jne	.L343
.L342:
	movzx	eax, BYTE PTR pc0_l2[rip]
	test	al, al
	jne	.L343
	movzx	eax, BYTE PTR pc0_l0[rip]
	test	al, al
	je	.L343
	movzx	eax, BYTE PTR pc0_l1[rip]
	test	al, al
	je	.L343
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L343
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L343
	movzx	eax, BYTE PTR pc0_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc0_evt1[rip]
	test	al, al
	jne	.L89
.L343:
	movzx	eax, BYTE PTR _x_pc0_l2[rip]
	test	al, al
	jne	.L344
	movzx	eax, BYTE PTR _x_pc0_l0[rip]
	test	al, al
	jne	.L344
	movzx	eax, BYTE PTR _x_pc0_l1[rip]
	test	al, al
	je	.L345
.L344:
	movzx	eax, BYTE PTR pc0_l2[rip]
	test	al, al
	je	.L345
	movzx	eax, BYTE PTR pc0_l0[rip]
	test	al, al
	je	.L345
	movzx	eax, BYTE PTR pc0_l1[rip]
	test	al, al
	jne	.L345
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L345
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L345
	movzx	eax, BYTE PTR pc0_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR pc0_evt1[rip]
	test	al, al
	jne	.L89
.L345:
	movzx	eax, BYTE PTR _x_a4_evt0[rip]
	test	al, al
	jne	.L346
	movzx	eax, BYTE PTR _x_a4_evt1[rip]
	test	al, al
	je	.L347
.L346:
	movzx	eax, BYTE PTR _x_a4_evt1[rip]
	test	al, al
	je	.L348
	movzx	eax, BYTE PTR _x_a4_evt0[rip]
	test	al, al
	je	.L347
.L348:
	movzx	eax, BYTE PTR _x_a4_evt0[rip]
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR _x_a4_evt1[rip]
	test	al, al
	jne	.L89
.L347:
	movzx	eax, BYTE PTR a4_l[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_a4_l[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	jne	.L349
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L89
	movzx	eax, BYTE PTR a4_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR a4_evt1[rip]
	test	al, al
	je	.L89
.L349:
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L351
	movzx	eax, BYTE PTR a4_evt1[rip]
	test	al, al
	je	.L351
	movzx	eax, BYTE PTR a4_evt0[rip]
	test	al, al
	jne	.L351
	movzx	eax, BYTE PTR _x_a4_l[rip]
	test	al, al
	je	.L351
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 5
	je	.L352
.L351:
	movzx	eax, BYTE PTR a4_l[rip]
	test	al, al
	jne	.L352
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L352
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L352
	movzx	eax, BYTE PTR a4_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR a4_evt1[rip]
	test	al, al
	jne	.L89
.L352:
	movzx	eax, BYTE PTR a4_evt0[rip]
	test	al, al
	je	.L353
	movzx	eax, BYTE PTR a4_evt1[rip]
	test	al, al
	jne	.L353
	movzx	eax, BYTE PTR _x_a4_l[rip]
	test	al, al
	jne	.L353
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 5
	je	.L354
.L353:
	movzx	eax, BYTE PTR a4_l[rip]
	test	al, al
	je	.L354
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L354
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L354
	movzx	eax, BYTE PTR a4_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR a4_evt1[rip]
	test	al, al
	jne	.L89
.L354:
	movzx	eax, BYTE PTR _x_a3_evt0[rip]
	test	al, al
	jne	.L355
	movzx	eax, BYTE PTR _x_a3_evt1[rip]
	test	al, al
	je	.L356
.L355:
	movzx	eax, BYTE PTR _x_a3_evt1[rip]
	test	al, al
	je	.L357
	movzx	eax, BYTE PTR _x_a3_evt0[rip]
	test	al, al
	je	.L356
.L357:
	movzx	eax, BYTE PTR _x_a3_evt0[rip]
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR _x_a3_evt1[rip]
	test	al, al
	jne	.L89
.L356:
	movzx	eax, BYTE PTR a3_l[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_a3_l[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	jne	.L358
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L89
	movzx	eax, BYTE PTR a3_evt0[rip]
	test	al, al
	jne	.L358
	movzx	eax, BYTE PTR a3_evt1[rip]
	test	al, al
	je	.L89
.L358:
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L360
	movzx	eax, BYTE PTR a3_evt1[rip]
	test	al, al
	je	.L360
	movzx	eax, BYTE PTR a3_evt0[rip]
	test	al, al
	jne	.L360
	movzx	eax, BYTE PTR _x_a3_l[rip]
	test	al, al
	je	.L360
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 4
	je	.L361
.L360:
	movzx	eax, BYTE PTR a3_l[rip]
	test	al, al
	jne	.L361
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L361
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L361
	movzx	eax, BYTE PTR a3_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR a3_evt1[rip]
	test	al, al
	jne	.L89
.L361:
	movzx	eax, BYTE PTR a3_evt0[rip]
	test	al, al
	je	.L362
	movzx	eax, BYTE PTR a3_evt1[rip]
	test	al, al
	jne	.L362
	movzx	eax, BYTE PTR _x_a3_l[rip]
	test	al, al
	jne	.L362
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 4
	je	.L363
.L362:
	movzx	eax, BYTE PTR a3_l[rip]
	test	al, al
	je	.L363
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L363
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L363
	movzx	eax, BYTE PTR a3_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR a3_evt1[rip]
	test	al, al
	jne	.L89
.L363:
	movzx	eax, BYTE PTR _x_a2_evt0[rip]
	test	al, al
	jne	.L364
	movzx	eax, BYTE PTR _x_a2_evt1[rip]
	test	al, al
	je	.L365
.L364:
	movzx	eax, BYTE PTR _x_a2_evt1[rip]
	test	al, al
	je	.L366
	movzx	eax, BYTE PTR _x_a2_evt0[rip]
	test	al, al
	je	.L365
.L366:
	movzx	eax, BYTE PTR _x_a2_evt0[rip]
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR _x_a2_evt1[rip]
	test	al, al
	jne	.L89
.L365:
	movzx	eax, BYTE PTR a2_l[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_a2_l[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	jne	.L367
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L89
	movzx	eax, BYTE PTR a2_evt0[rip]
	test	al, al
	jne	.L367
	movzx	eax, BYTE PTR a2_evt1[rip]
	test	al, al
	je	.L89
.L367:
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L369
	movzx	eax, BYTE PTR a2_evt1[rip]
	test	al, al
	je	.L369
	movzx	eax, BYTE PTR a2_evt0[rip]
	test	al, al
	jne	.L369
	movzx	eax, BYTE PTR _x_a2_l[rip]
	test	al, al
	je	.L369
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 3
	je	.L370
.L369:
	movzx	eax, BYTE PTR a2_l[rip]
	test	al, al
	jne	.L370
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L370
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L370
	movzx	eax, BYTE PTR a2_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR a2_evt1[rip]
	test	al, al
	jne	.L89
.L370:
	movzx	eax, BYTE PTR a2_evt0[rip]
	test	al, al
	je	.L371
	movzx	eax, BYTE PTR a2_evt1[rip]
	test	al, al
	jne	.L371
	movzx	eax, BYTE PTR _x_a2_l[rip]
	test	al, al
	jne	.L371
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 3
	je	.L372
.L371:
	movzx	eax, BYTE PTR a2_l[rip]
	test	al, al
	je	.L372
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L372
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L372
	movzx	eax, BYTE PTR a2_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR a2_evt1[rip]
	test	al, al
	jne	.L89
.L372:
	movzx	eax, BYTE PTR _x_a1_evt0[rip]
	test	al, al
	jne	.L373
	movzx	eax, BYTE PTR _x_a1_evt1[rip]
	test	al, al
	je	.L374
.L373:
	movzx	eax, BYTE PTR _x_a1_evt1[rip]
	test	al, al
	je	.L375
	movzx	eax, BYTE PTR _x_a1_evt0[rip]
	test	al, al
	je	.L374
.L375:
	movzx	eax, BYTE PTR _x_a1_evt0[rip]
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR _x_a1_evt1[rip]
	test	al, al
	jne	.L89
.L374:
	movzx	eax, BYTE PTR a1_l[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_a1_l[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	jne	.L376
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L89
	movzx	eax, BYTE PTR a1_evt0[rip]
	test	al, al
	jne	.L376
	movzx	eax, BYTE PTR a1_evt1[rip]
	test	al, al
	je	.L89
.L376:
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L378
	movzx	eax, BYTE PTR a1_evt1[rip]
	test	al, al
	je	.L378
	movzx	eax, BYTE PTR a1_evt0[rip]
	test	al, al
	jne	.L378
	movzx	eax, BYTE PTR _x_a1_l[rip]
	test	al, al
	je	.L378
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 2
	je	.L379
.L378:
	movzx	eax, BYTE PTR a1_l[rip]
	test	al, al
	jne	.L379
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L379
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L379
	movzx	eax, BYTE PTR a1_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR a1_evt1[rip]
	test	al, al
	jne	.L89
.L379:
	movzx	eax, BYTE PTR a1_evt0[rip]
	test	al, al
	je	.L380
	movzx	eax, BYTE PTR a1_evt1[rip]
	test	al, al
	jne	.L380
	movzx	eax, BYTE PTR _x_a1_l[rip]
	test	al, al
	jne	.L380
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 2
	je	.L381
.L380:
	movzx	eax, BYTE PTR a1_l[rip]
	test	al, al
	je	.L381
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L381
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L381
	movzx	eax, BYTE PTR a1_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR a1_evt1[rip]
	test	al, al
	jne	.L89
.L381:
	movzx	eax, BYTE PTR _x_a0_evt0[rip]
	test	al, al
	jne	.L382
	movzx	eax, BYTE PTR _x_a0_evt1[rip]
	test	al, al
	je	.L383
.L382:
	movzx	eax, BYTE PTR _x_a0_evt1[rip]
	test	al, al
	je	.L384
	movzx	eax, BYTE PTR _x_a0_evt0[rip]
	test	al, al
	je	.L383
.L384:
	movzx	eax, BYTE PTR _x_a0_evt0[rip]
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR _x_a0_evt1[rip]
	test	al, al
	jne	.L89
.L383:
	movzx	eax, BYTE PTR a0_l[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_a0_l[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	jne	.L385
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L89
	movzx	eax, BYTE PTR a0_evt0[rip]
	test	al, al
	jne	.L385
	movzx	eax, BYTE PTR a0_evt1[rip]
	test	al, al
	je	.L89
.L385:
	movzx	eax, BYTE PTR a0_evt1[rip]
	test	al, al
	je	.L387
	movzx	eax, BYTE PTR a0_evt0[rip]
	test	al, al
	jne	.L387
	movzx	eax, BYTE PTR _x_a0_l[rip]
	test	al, al
	je	.L387
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 1
	jne	.L387
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	je	.L388
.L387:
	movzx	eax, BYTE PTR a0_l[rip]
	test	al, al
	jne	.L388
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L388
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L388
	movzx	eax, BYTE PTR a0_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR a0_evt1[rip]
	test	al, al
	jne	.L89
.L388:
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 1
	jne	.L389
	movzx	eax, BYTE PTR a0_evt0[rip]
	test	al, al
	je	.L389
	movzx	eax, BYTE PTR a0_evt1[rip]
	test	al, al
	jne	.L389
	movzx	eax, BYTE PTR _x_a0_l[rip]
	test	al, al
	je	.L390
.L389:
	movzx	eax, BYTE PTR a0_l[rip]
	test	al, al
	je	.L390
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L390
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L390
	movzx	eax, BYTE PTR a0_evt0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR a0_evt1[rip]
	test	al, al
	jne	.L89
.L390:
	movzx	eax, BYTE PTR c_initial[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_c_initial[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	jne	.L391
	movzx	eax, BYTE PTR c_move[rip]
	test	al, al
	je	.L89
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L89
.L391:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L393
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 1
	jne	.L393
	movzx	eax, BYTE PTR _x_c_initial[rip]
	test	al, al
	je	.L394
.L393:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L394
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L394
	movzx	eax, BYTE PTR c_move[rip]
	test	al, al
	je	.L394
	movzx	eax, BYTE PTR c_initial[rip]
	test	al, al
	jne	.L89
.L394:
	movzx	eax, BYTE PTR _x_c_initial[rip]
	test	al, al
	je	.L395
	movzx	eax, BYTE PTR c_move[rip]
	test	al, al
	je	.L395
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L395
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L395
	movzx	eax, BYTE PTR c_initial[rip]
	test	al, al
	je	.L89
.L395:
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 1
	je	.L396
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L396
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L396
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 4
	jle	.L396
	movzx	eax, BYTE PTR _x_c_initial[rip]
	test	al, al
	jne	.L396
	movzx	eax, BYTE PTR c_initial[rip]
	test	al, al
	je	.L89
.L396:
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 1
	je	.L397
	movzx	eax, BYTE PTR _x_c_initial[rip]
	test	al, al
	jne	.L397
	movzx	eax, BYTE PTR c_initial[rip]
	test	al, al
	jne	.L397
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L397
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L397
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 4
	jle	.L89
.L397:
	movss	xmm0, DWORD PTR _x_delta[rip]
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jb	.L89
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 4
	je	.L399
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 3
	je	.L399
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 2
	je	.L399
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 1
	je	.L399
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L89
.L399:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	je	.L400
	movzx	eax, BYTE PTR pc4_evt0[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR pc4_evt1[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR pc3_evt0[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR pc3_evt1[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR pc2_evt0[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR pc2_evt1[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR pc1_evt0[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR pc1_evt1[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR pc0_evt0[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR pc0_evt1[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR a4_evt0[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR a4_evt1[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR a3_evt0[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR a3_evt1[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR a2_evt0[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR a2_evt1[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR a1_evt0[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR a1_evt1[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR c_move[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR a0_evt0[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR a0_evt1[rip]
	test	al, al
	je	.L89
.L400:
	movzx	eax, BYTE PTR a0_evt1[rip]
	test	al, al
	je	.L401
	movzx	eax, BYTE PTR a0_evt0[rip]
	test	al, al
	jne	.L401
	mov	eax, 1
	jmp	.L402
.L401:
	mov	eax, 0
.L402:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR pc0_evt1[rip]
	test	al, al
	je	.L403
	movzx	eax, BYTE PTR pc0_evt0[rip]
	test	al, al
	jne	.L403
	mov	eax, 1
	jmp	.L404
.L403:
	mov	eax, 0
.L404:
	and	eax, 1
	xor	eax, edx
	test	al, al
	jne	.L405
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L405
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L89
.L405:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L407
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L407
	movzx	eax, BYTE PTR a0_evt0[rip]
	test	al, al
	je	.L408
	movzx	eax, BYTE PTR a0_evt1[rip]
	test	al, al
	jne	.L408
	mov	eax, 1
	jmp	.L409
.L408:
	mov	eax, 0
.L409:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR pc0_evt0[rip]
	test	al, al
	je	.L410
	movzx	eax, BYTE PTR pc0_evt1[rip]
	test	al, al
	jne	.L410
	mov	eax, 1
	jmp	.L411
.L410:
	mov	eax, 0
.L411:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L89
.L407:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L412
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L412
	movzx	eax, BYTE PTR a1_evt1[rip]
	test	al, al
	je	.L413
	movzx	eax, BYTE PTR a1_evt0[rip]
	test	al, al
	jne	.L413
	mov	eax, 1
	jmp	.L414
.L413:
	mov	eax, 0
.L414:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR pc1_evt1[rip]
	test	al, al
	je	.L415
	movzx	eax, BYTE PTR pc1_evt0[rip]
	test	al, al
	jne	.L415
	mov	eax, 1
	jmp	.L416
.L415:
	mov	eax, 0
.L416:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L89
.L412:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L417
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L417
	movzx	eax, BYTE PTR a1_evt0[rip]
	test	al, al
	je	.L418
	movzx	eax, BYTE PTR a1_evt1[rip]
	test	al, al
	jne	.L418
	mov	eax, 1
	jmp	.L419
.L418:
	mov	eax, 0
.L419:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR pc1_evt0[rip]
	test	al, al
	je	.L420
	movzx	eax, BYTE PTR pc1_evt1[rip]
	test	al, al
	jne	.L420
	mov	eax, 1
	jmp	.L421
.L420:
	mov	eax, 0
.L421:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L89
.L417:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L422
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L422
	movzx	eax, BYTE PTR a2_evt1[rip]
	test	al, al
	je	.L423
	movzx	eax, BYTE PTR a2_evt0[rip]
	test	al, al
	jne	.L423
	mov	eax, 1
	jmp	.L424
.L423:
	mov	eax, 0
.L424:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR pc2_evt1[rip]
	test	al, al
	je	.L425
	movzx	eax, BYTE PTR pc2_evt0[rip]
	test	al, al
	jne	.L425
	mov	eax, 1
	jmp	.L426
.L425:
	mov	eax, 0
.L426:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L89
.L422:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L427
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L427
	movzx	eax, BYTE PTR a2_evt0[rip]
	test	al, al
	je	.L428
	movzx	eax, BYTE PTR a2_evt1[rip]
	test	al, al
	jne	.L428
	mov	eax, 1
	jmp	.L429
.L428:
	mov	eax, 0
.L429:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR pc2_evt0[rip]
	test	al, al
	je	.L430
	movzx	eax, BYTE PTR pc2_evt1[rip]
	test	al, al
	jne	.L430
	mov	eax, 1
	jmp	.L431
.L430:
	mov	eax, 0
.L431:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L89
.L427:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L432
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L432
	movzx	eax, BYTE PTR a3_evt1[rip]
	test	al, al
	je	.L433
	movzx	eax, BYTE PTR a3_evt0[rip]
	test	al, al
	jne	.L433
	mov	eax, 1
	jmp	.L434
.L433:
	mov	eax, 0
.L434:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR pc3_evt1[rip]
	test	al, al
	je	.L435
	movzx	eax, BYTE PTR pc3_evt0[rip]
	test	al, al
	jne	.L435
	mov	eax, 1
	jmp	.L436
.L435:
	mov	eax, 0
.L436:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L89
.L432:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L437
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L437
	movzx	eax, BYTE PTR a3_evt0[rip]
	test	al, al
	je	.L438
	movzx	eax, BYTE PTR a3_evt1[rip]
	test	al, al
	jne	.L438
	mov	eax, 1
	jmp	.L439
.L438:
	mov	eax, 0
.L439:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR pc3_evt0[rip]
	test	al, al
	je	.L440
	movzx	eax, BYTE PTR pc3_evt1[rip]
	test	al, al
	jne	.L440
	mov	eax, 1
	jmp	.L441
.L440:
	mov	eax, 0
.L441:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L89
.L437:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L442
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L442
	movzx	eax, BYTE PTR a4_evt1[rip]
	test	al, al
	je	.L443
	movzx	eax, BYTE PTR a4_evt0[rip]
	test	al, al
	jne	.L443
	mov	eax, 1
	jmp	.L444
.L443:
	mov	eax, 0
.L444:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR pc4_evt1[rip]
	test	al, al
	je	.L445
	movzx	eax, BYTE PTR pc4_evt0[rip]
	test	al, al
	jne	.L445
	mov	eax, 1
	jmp	.L446
.L445:
	mov	eax, 0
.L446:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L89
.L442:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L447
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L447
	movzx	eax, BYTE PTR a4_evt0[rip]
	test	al, al
	je	.L448
	movzx	eax, BYTE PTR a4_evt1[rip]
	test	al, al
	jne	.L448
	mov	eax, 1
	jmp	.L449
.L448:
	mov	eax, 0
.L449:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR pc4_evt0[rip]
	test	al, al
	je	.L450
	movzx	eax, BYTE PTR pc4_evt1[rip]
	test	al, al
	jne	.L450
	mov	eax, 1
	jmp	.L451
.L450:
	mov	eax, 0
.L451:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L89
.L447:
	movss	xmm0, DWORD PTR delta[rip]
	movss	xmm1, DWORD PTR _x__diverge_delta[rip]
	ucomiss	xmm0, xmm1
	jp	.L507
	ucomiss	xmm0, xmm1
	je	.L452
.L507:
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	movss	xmm1, DWORD PTR .LC5[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L89
.L452:
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	movss	xmm1, DWORD PTR .LC5[rip]
	comiss	xmm0, xmm1
	jnb	.L454
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x__diverge_delta[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L89
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L89
.L454:
	mov	eax, 1
	jmp	.L456
.L89:
	mov	eax, 0
.L456:
	mov	DWORD PTR -4[rbp], eax
	movss	xmm0, DWORD PTR _x__diverge_delta[rip]
	movss	DWORD PTR _diverge_delta[rip], xmm0
	movss	xmm0, DWORD PTR _x_pc4_x[rip]
	movss	DWORD PTR pc4_x[rip], xmm0
	movzx	eax, BYTE PTR _x_pc3_l0[rip]
	mov	BYTE PTR pc3_l0[rip], al
	movzx	eax, BYTE PTR _x_pc3_evt1[rip]
	mov	BYTE PTR pc3_evt1[rip], al
	movzx	eax, BYTE PTR _x_pc2_l2[rip]
	mov	BYTE PTR pc2_l2[rip], al
	movzx	eax, BYTE PTR _x_pc2_l1[rip]
	mov	BYTE PTR pc2_l1[rip], al
	movzx	eax, BYTE PTR _x_pc2_l0[rip]
	mov	BYTE PTR pc2_l0[rip], al
	movzx	eax, BYTE PTR _x_pc4_l2[rip]
	mov	BYTE PTR pc4_l2[rip], al
	movzx	eax, BYTE PTR _x_pc2_evt1[rip]
	mov	BYTE PTR pc2_evt1[rip], al
	movzx	eax, BYTE PTR _x_pc3_evt0[rip]
	mov	BYTE PTR pc3_evt0[rip], al
	movss	xmm0, DWORD PTR _x_pc2_x[rip]
	movss	DWORD PTR pc2_x[rip], xmm0
	movzx	eax, BYTE PTR _x_pc1_l1[rip]
	mov	BYTE PTR pc1_l1[rip], al
	movzx	eax, BYTE PTR _x_a2_l[rip]
	mov	BYTE PTR a2_l[rip], al
	movzx	eax, BYTE PTR _x_pc4_l0[rip]
	mov	BYTE PTR pc4_l0[rip], al
	movzx	eax, BYTE PTR _x_a2_evt1[rip]
	mov	BYTE PTR a2_evt1[rip], al
	movzx	eax, BYTE PTR _x_a3_l[rip]
	mov	BYTE PTR a3_l[rip], al
	movzx	eax, BYTE PTR _x_a2_evt0[rip]
	mov	BYTE PTR a2_evt0[rip], al
	movzx	eax, BYTE PTR _x_pc0_l1[rip]
	mov	BYTE PTR pc0_l1[rip], al
	movzx	eax, BYTE PTR _x_pc4_l1[rip]
	mov	BYTE PTR pc4_l1[rip], al
	movzx	eax, BYTE PTR _x_pc2_evt0[rip]
	mov	BYTE PTR pc2_evt0[rip], al
	movss	xmm0, DWORD PTR _x_pc1_x[rip]
	movss	DWORD PTR pc1_x[rip], xmm0
	movzx	eax, BYTE PTR _x_pc4_evt0[rip]
	mov	BYTE PTR pc4_evt0[rip], al
	movss	xmm0, DWORD PTR _x_pc3_x[rip]
	movss	DWORD PTR pc3_x[rip], xmm0
	movzx	eax, BYTE PTR _x_c_initial[rip]
	mov	BYTE PTR c_initial[rip], al
	movss	xmm0, DWORD PTR _x_pc0_x[rip]
	movss	DWORD PTR pc0_x[rip], xmm0
	movzx	eax, BYTE PTR _x_c_move[rip]
	mov	BYTE PTR c_move[rip], al
	movzx	eax, BYTE PTR _x_a0_evt0[rip]
	mov	BYTE PTR a0_evt0[rip], al
	movzx	eax, BYTE PTR _x_a1_l[rip]
	mov	BYTE PTR a1_l[rip], al
	movzx	eax, BYTE PTR _x_a0_l[rip]
	mov	BYTE PTR a0_l[rip], al
	mov	eax, DWORD PTR _x_id[rip]
	mov	DWORD PTR id[rip], eax
	movzx	eax, BYTE PTR _x_pc0_l2[rip]
	mov	BYTE PTR pc0_l2[rip], al
	movss	xmm0, DWORD PTR _x_delta[rip]
	movss	DWORD PTR delta[rip], xmm0
	movzx	eax, BYTE PTR _x_a3_evt0[rip]
	mov	BYTE PTR a3_evt0[rip], al
	movzx	eax, BYTE PTR _x_a3_evt1[rip]
	mov	BYTE PTR a3_evt1[rip], al
	movzx	eax, BYTE PTR _x_pc4_evt1[rip]
	mov	BYTE PTR pc4_evt1[rip], al
	movzx	eax, BYTE PTR _x_a4_l[rip]
	mov	BYTE PTR a4_l[rip], al
	movzx	eax, BYTE PTR _x_pc1_l2[rip]
	mov	BYTE PTR pc1_l2[rip], al
	movzx	eax, BYTE PTR _x_a4_evt0[rip]
	mov	BYTE PTR a4_evt0[rip], al
	movzx	eax, BYTE PTR _x_a0_evt1[rip]
	mov	BYTE PTR a0_evt1[rip], al
	movzx	eax, BYTE PTR _x_pc1_l0[rip]
	mov	BYTE PTR pc1_l0[rip], al
	movzx	eax, BYTE PTR _x_pc0_evt0[rip]
	mov	BYTE PTR pc0_evt0[rip], al
	movzx	eax, BYTE PTR _x_pc0_evt1[rip]
	mov	BYTE PTR pc0_evt1[rip], al
	movzx	eax, BYTE PTR _x_a4_evt1[rip]
	mov	BYTE PTR a4_evt1[rip], al
	movzx	eax, BYTE PTR _x_pc0_l0[rip]
	mov	BYTE PTR pc0_l0[rip], al
	movzx	eax, BYTE PTR _x_pc3_l1[rip]
	mov	BYTE PTR pc3_l1[rip], al
	movzx	eax, BYTE PTR _x_a1_evt0[rip]
	mov	BYTE PTR a1_evt0[rip], al
	movzx	eax, BYTE PTR _x_pc1_evt0[rip]
	mov	BYTE PTR pc1_evt0[rip], al
	movzx	eax, BYTE PTR _x_pc3_l2[rip]
	mov	BYTE PTR pc3_l2[rip], al
	movzx	eax, BYTE PTR _x_a1_evt1[rip]
	mov	BYTE PTR a1_evt1[rip], al
	movzx	eax, BYTE PTR _x_pc1_evt1[rip]
	mov	BYTE PTR pc1_evt1[rip], al
.L84:
	cmp	DWORD PTR -4[rbp], 0
	jne	.L457
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	main, .-main
	.section	.rodata
	.align 4
.LC2:
	.long	1112014848
	.align 4
.LC3:
	.long	1103626240
	.align 4
.LC4:
	.long	1103101952
	.align 4
.LC5:
	.long	1065353216
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"325800.c"
	.text
	.align	2
	.global	__VERIFIER_nondet_bool
	.syntax unified
	.arm
	.fpu softvfp
	.type	__VERIFIER_nondet_bool, %function
__VERIFIER_nondet_bool:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	pop	{fp, pc}
	.size	__VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
	.comm	_diverge_delta,4,4
	.comm	_x__diverge_delta,4,4
	.comm	pc4_x,4,4
	.comm	_x_pc4_x,4,4
	.comm	pc3_l0,1,1
	.comm	_x_pc3_l0,1,1
	.comm	pc3_evt1,1,1
	.comm	_x_pc3_evt1,1,1
	.comm	pc2_l2,1,1
	.comm	_x_pc2_l2,1,1
	.comm	pc2_l1,1,1
	.comm	_x_pc2_l1,1,1
	.comm	pc2_l0,1,1
	.comm	_x_pc2_l0,1,1
	.comm	pc4_l2,1,1
	.comm	_x_pc4_l2,1,1
	.comm	pc2_evt1,1,1
	.comm	_x_pc2_evt1,1,1
	.comm	pc3_evt0,1,1
	.comm	_x_pc3_evt0,1,1
	.comm	pc2_x,4,4
	.comm	_x_pc2_x,4,4
	.comm	pc1_l1,1,1
	.comm	_x_pc1_l1,1,1
	.comm	a2_l,1,1
	.comm	_x_a2_l,1,1
	.comm	pc4_l0,1,1
	.comm	_x_pc4_l0,1,1
	.comm	a2_evt1,1,1
	.comm	_x_a2_evt1,1,1
	.comm	a3_l,1,1
	.comm	_x_a3_l,1,1
	.comm	a2_evt0,1,1
	.comm	_x_a2_evt0,1,1
	.comm	pc0_l1,1,1
	.comm	_x_pc0_l1,1,1
	.comm	pc4_l1,1,1
	.comm	_x_pc4_l1,1,1
	.comm	pc2_evt0,1,1
	.comm	_x_pc2_evt0,1,1
	.comm	pc1_x,4,4
	.comm	_x_pc1_x,4,4
	.comm	pc4_evt0,1,1
	.comm	_x_pc4_evt0,1,1
	.comm	pc3_x,4,4
	.comm	_x_pc3_x,4,4
	.comm	c_initial,1,1
	.comm	_x_c_initial,1,1
	.comm	pc0_x,4,4
	.comm	_x_pc0_x,4,4
	.comm	c_move,1,1
	.comm	_x_c_move,1,1
	.comm	a0_evt0,1,1
	.comm	_x_a0_evt0,1,1
	.comm	a1_l,1,1
	.comm	_x_a1_l,1,1
	.comm	a0_l,1,1
	.comm	_x_a0_l,1,1
	.comm	id,4,4
	.comm	_x_id,4,4
	.comm	pc0_l2,1,1
	.comm	_x_pc0_l2,1,1
	.comm	delta,4,4
	.comm	_x_delta,4,4
	.comm	a3_evt0,1,1
	.comm	_x_a3_evt0,1,1
	.comm	a3_evt1,1,1
	.comm	_x_a3_evt1,1,1
	.comm	pc4_evt1,1,1
	.comm	_x_pc4_evt1,1,1
	.comm	a4_l,1,1
	.comm	_x_a4_l,1,1
	.comm	pc1_l2,1,1
	.comm	_x_pc1_l2,1,1
	.comm	a4_evt0,1,1
	.comm	_x_a4_evt0,1,1
	.comm	a0_evt1,1,1
	.comm	_x_a0_evt1,1,1
	.comm	pc1_l0,1,1
	.comm	_x_pc1_l0,1,1
	.comm	pc0_evt0,1,1
	.comm	_x_pc0_evt0,1,1
	.comm	pc0_evt1,1,1
	.comm	_x_pc0_evt1,1,1
	.comm	a4_evt1,1,1
	.comm	_x_a4_evt1,1,1
	.comm	pc0_l0,1,1
	.comm	_x_pc0_l0,1,1
	.comm	pc3_l1,1,1
	.comm	_x_pc3_l1,1,1
	.comm	a1_evt0,1,1
	.comm	_x_a1_evt0,1,1
	.comm	pc1_evt0,1,1
	.comm	_x_pc1_evt0,1,1
	.comm	pc3_l2,1,1
	.comm	_x_pc3_l2,1,1
	.comm	a1_evt1,1,1
	.comm	_x_a1_evt1,1,1
	.comm	pc1_evt1,1,1
	.comm	_x_pc1_evt1,1,1
	.global	__aeabi_fcmpeq
	.global	__aeabi_fcmpge
	.global	__aeabi_fcmple
	.global	__aeabi_f2d
	.global	__aeabi_dsub
	.global	__aeabi_dadd
	.global	__aeabi_dcmpeq
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #8
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L492
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L492+4
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+8
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+12
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+16
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+20
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+24
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+28
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+32
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+36
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L492+40
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+44
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+48
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+52
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+56
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+60
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+64
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+68
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+72
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+76
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L492+80
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+84
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L492+88
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+184
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L492+92
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+96
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+176
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+100
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+172
	strb	r2, [r3]
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L492+188
	str	r3, [r2]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+104
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L492+384
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+108
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+112
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+416
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+116
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+120
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+124
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+180
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+128
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+132
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+136
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+140
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+144
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+148
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+164
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+152
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+156
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+168
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+160
	strb	r2, [r3]
	ldr	r3, .L492+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L492+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L492+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L492+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L492+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L6
	ldr	r3, .L492+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L6:
	ldr	r3, .L492+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L492+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L8:
	ldr	r3, .L492+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L9
	ldr	r3, .L492+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L9:
	ldr	r3, .L492+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L492+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L7:
	ldr	r3, .L492+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L10
	ldr	r3, .L492+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L10
	ldr	r3, .L492+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L11
.L10:
	ldr	r3, .L492+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L12
	ldr	r3, .L492+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L12
	ldr	r3, .L492+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L11
.L12:
	ldr	r3, .L492+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L492+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L492+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L11
.L13:
	ldr	r3, .L492+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L14
	ldr	r3, .L492+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L14
	ldr	r3, .L492+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L11
.L14:
	ldr	r3, .L492+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L15
	ldr	r3, .L492+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L15
	ldr	r3, .L492+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L11
.L15:
	ldr	r3, .L492+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L16
	ldr	r3, .L492+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L16
	ldr	r3, .L492+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L11
.L16:
	ldr	r3, .L492+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L492+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L492+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L11:
	ldr	r3, .L492+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L492+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L492+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L492+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L492+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L18
	ldr	r3, .L492+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L19
.L18:
	ldr	r3, .L492+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L20
	ldr	r3, .L492+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L19
.L20:
	ldr	r3, .L492+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L21
	ldr	r3, .L492+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L19
.L21:
	ldr	r3, .L492+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L492+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L19:
	ldr	r3, .L492+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L22
	ldr	r3, .L492+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L22
	ldr	r3, .L492+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L23
.L22:
	ldr	r3, .L492+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L24
	ldr	r3, .L492+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L24
	ldr	r3, .L492+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L23
.L24:
	ldr	r3, .L492+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L25
	ldr	r3, .L492+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L25
	ldr	r3, .L492+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L23
.L25:
	ldr	r3, .L492+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L26
	ldr	r3, .L492+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L26
	ldr	r3, .L492+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L23
.L26:
	ldr	r3, .L492+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L27
	ldr	r3, .L492+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L27
	ldr	r3, .L492+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L23
.L27:
	ldr	r3, .L492+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L28
	ldr	r3, .L492+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L28
	ldr	r3, .L492+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L23
.L28:
	ldr	r3, .L492+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L492+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L492+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L23:
	ldr	r3, .L492+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L492+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L492+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L492+40
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L492+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L30
	ldr	r3, .L492+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L31
.L30:
	ldr	r3, .L492+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L32
	ldr	r3, .L492+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L31
.L32:
	ldr	r3, .L492+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L33
	ldr	r3, .L492+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L31
.L33:
	ldr	r3, .L492+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L492+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L31:
	ldr	r3, .L492+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L34
	ldr	r3, .L492+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L34
	ldr	r3, .L492+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L35
.L34:
	ldr	r3, .L492+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L36
	ldr	r3, .L492+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L36
	ldr	r3, .L492+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L35
.L36:
	ldr	r3, .L492+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L37
	ldr	r3, .L492+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L37
	ldr	r3, .L492+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L35
.L37:
	ldr	r3, .L492+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L38
	ldr	r3, .L492+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L38
	ldr	r3, .L492+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L35
.L38:
	ldr	r3, .L492+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L39
	ldr	r3, .L492+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L39
	ldr	r3, .L492+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L35
.L39:
	ldr	r3, .L492+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L40
	ldr	r3, .L492+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L40
	ldr	r3, .L492+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L35
.L40:
	ldr	r3, .L492+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L492+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L492+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L35:
	ldr	r3, .L492+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L492+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L492+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L492+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L492+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L42
	ldr	r3, .L492+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L43
.L42:
	ldr	r3, .L492+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L44
	ldr	r3, .L492+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L43
.L44:
	ldr	r3, .L492+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L45
	ldr	r3, .L492+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L43
.L45:
	ldr	r3, .L492+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L492+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L43:
	ldr	r3, .L492+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L46
	ldr	r3, .L492+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L46
	ldr	r3, .L492+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L47
.L46:
	ldr	r3, .L492+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L48
	ldr	r3, .L492+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L48
	ldr	r3, .L492+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L47
.L48:
	ldr	r3, .L492+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L49
	ldr	r3, .L492+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L49
	ldr	r3, .L492+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L47
.L49:
	ldr	r3, .L492+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L50
	ldr	r3, .L492+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L50
	ldr	r3, .L492+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L47
.L50:
	ldr	r3, .L492+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L51
	ldr	r3, .L492+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L51
	ldr	r3, .L492+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L47
.L51:
	ldr	r3, .L492+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L52
	ldr	r3, .L492+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L52
	ldr	r3, .L492+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L47
.L52:
	ldr	r3, .L492+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L492+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L492+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L47:
	ldr	r3, .L492+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L492+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L492+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L492+92
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L492+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L54
	ldr	r3, .L492+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L55
.L54:
	ldr	r3, .L492+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L56
	ldr	r3, .L492+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L55
.L56:
	ldr	r3, .L492+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L57
	ldr	r3, .L492+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L55
.L57:
	ldr	r3, .L492+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L492+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L55:
	ldr	r3, .L492+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L58
	ldr	r3, .L492+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L58
	ldr	r3, .L492+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L59
.L58:
	ldr	r3, .L492+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L60
	ldr	r3, .L492+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L60
	ldr	r3, .L492+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L59
.L60:
	ldr	r3, .L492+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L61
	ldr	r3, .L492+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L61
	ldr	r3, .L492+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L59
.L61:
	ldr	r3, .L492+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L62
	ldr	r3, .L492+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L62
	ldr	r3, .L492+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L59
.L62:
	ldr	r3, .L492+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L63
	ldr	r3, .L492+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L63
	ldr	r3, .L492+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L59
.L63:
	ldr	r3, .L492+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L64
	ldr	r3, .L492+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L64
	ldr	r3, .L492+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L59
.L64:
	ldr	r3, .L492+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L492+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L492+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L59:
	ldr	r3, .L492+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L492+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L65
	ldr	r3, .L492+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L66
.L65:
	ldr	r3, .L492+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L67
	ldr	r3, .L492+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L66
.L67:
	ldr	r3, .L492+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L492+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L66:
	ldr	r3, .L492+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L492+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L68
	ldr	r3, .L492+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L69
.L68:
	ldr	r3, .L492+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L70
	ldr	r3, .L492+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L69
.L70:
	ldr	r3, .L492+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L492+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L69:
	ldr	r3, .L492+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L492+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L71
	ldr	r3, .L492+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L72
.L71:
	ldr	r3, .L492+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L73
	ldr	r3, .L492+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L72
.L73:
	ldr	r3, .L492+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L492+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L72:
	ldr	r3, .L492+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L492+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L74
	ldr	r3, .L492+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L75
.L74:
	ldr	r3, .L492+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L76
	ldr	r3, .L492+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	b	.L493
.L494:
	.align	2
.L492:
	.word	_diverge_delta
	.word	pc4_x
	.word	pc3_l0
	.word	pc3_evt1
	.word	pc2_l2
	.word	pc2_l1
	.word	pc2_l0
	.word	pc4_l2
	.word	pc2_evt1
	.word	pc3_evt0
	.word	pc2_x
	.word	pc1_l1
	.word	a2_l
	.word	pc4_l0
	.word	a2_evt1
	.word	a3_l
	.word	a2_evt0
	.word	pc0_l1
	.word	pc4_l1
	.word	pc2_evt0
	.word	pc1_x
	.word	pc4_evt0
	.word	pc3_x
	.word	pc0_x
	.word	c_move
	.word	a1_l
	.word	pc0_l2
	.word	a3_evt0
	.word	a3_evt1
	.word	a4_l
	.word	pc1_l2
	.word	a4_evt0
	.word	pc1_l0
	.word	pc0_evt0
	.word	pc0_evt1
	.word	a4_evt1
	.word	pc0_l0
	.word	pc3_l1
	.word	pc1_evt0
	.word	pc3_l2
	.word	pc1_evt1
	.word	a1_evt0
	.word	a1_evt1
	.word	a0_l
	.word	a0_evt0
	.word	a0_evt1
	.word	c_initial
	.word	id
	.word	_diverge_delta
	.word	_x__diverge_delta
	.word	_x_pc3_l0
	.word	_x_pc3_evt1
	.word	_x_pc2_l2
	.word	_x_pc2_l1
	.word	_x_pc2_l0
	.word	_x_pc2_evt1
	.word	_x_pc3_evt0
	.word	_x_pc2_x
	.word	_x_pc1_l1
	.word	_x_a2_l
	.word	_x_a2_evt1
	.word	_x_a3_l
	.word	_x_a2_evt0
	.word	_x_pc0_l1
	.word	_x_pc2_evt0
	.word	_x_pc1_x
	.word	_x_pc3_x
	.word	_x_c_initial
	.word	_x_pc0_x
	.word	_x_c_move
	.word	_x_a0_evt0
	.word	_x_a1_l
	.word	_x_a0_l
	.word	_x_id
	.word	_x_pc0_l2
	.word	_x_delta
	.word	_x_a3_evt0
	.word	_x_a3_evt1
	.word	_x_a4_l
	.word	_x_pc1_l2
	.word	_x_a4_evt0
	.word	_x_a0_evt1
	.word	_x_pc1_l0
	.word	_x_pc0_evt0
	.word	_x_pc0_evt1
	.word	_x_a4_evt1
	.word	_x_pc0_l0
	.word	_x_pc3_l1
	.word	_x_a1_evt0
	.word	_x_pc1_evt0
	.word	_x_pc3_l2
	.word	_x_a1_evt1
	.word	_x_pc1_evt1
	.word	_x_pc4_evt0
	.word	_x_pc4_evt1
	.word	1103101952
	.word	delta
	.word	1112014848
	.word	pc4_l0
	.word	_x_pc4_l2
	.word	_x_pc4_l0
	.word	_x_pc4_l1
	.word	_x_pc4_x
	.word	pc4_evt0
	.word	pc4_evt1
	.word	pc4_x
	.word	1103626240
	.word	pc4_l2
	.word	pc4_l1
.L493:
	beq	.L75
.L76:
	ldr	r3, .L492+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L492+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L75:
	ldr	r3, .L492+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L492+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L77
	ldr	r3, .L492+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L78
.L77:
	ldr	r3, .L492+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L79
	ldr	r3, .L492+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L78
.L79:
	ldr	r3, .L492+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L492+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L78:
	ldr	r3, .L492+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L492+384
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L492+188
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L81
	ldr	r3, .L492+188
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L81
	ldr	r3, .L492+188
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L81
	ldr	r3, .L492+188
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L81
	ldr	r3, .L492+188
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L4
.L81:
	ldr	r3, .L492+384
	ldr	r3, [r3]	@ float
	ldr	r2, .L492+192
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	mov	r3, #1
	b	.L83
.L4:
	mov	r3, #0
.L83:
	str	r3, [fp, #-24]
	b	.L84
.L442:
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L492+196
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L492+408
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+200
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+204
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+208
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+212
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+216
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+396
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+220
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+224
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L492+228
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+232
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+236
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+400
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+240
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+244
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+248
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+252
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+404
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+256
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L492+260
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+372
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L492+264
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+268
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L492+272
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+276
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+280
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+284
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+288
	strb	r2, [r3]
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L492+292
	str	r3, [r2]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+296
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L492+300
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+304
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+308
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+376
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+312
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+316
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+320
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+324
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+328
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+332
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+336
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+340
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+344
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+348
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+352
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+356
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+360
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+364
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L492+368
	strb	r2, [r3]
	ldr	r3, .L492+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L85
	ldr	r3, .L492+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L86
.L85:
	ldr	r3, .L492+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L87
	ldr	r3, .L492+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L86
.L87:
	ldr	r3, .L492+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L88
	ldr	r3, .L492+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L86
.L88:
	ldr	r3, .L492+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L492+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L86:
	ldr	r3, .L492+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L90
	ldr	r3, .L492+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L90
	ldr	r3, .L492+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L91
.L90:
	ldr	r3, .L492+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L92
	ldr	r3, .L492+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L92
	ldr	r3, .L492+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L92:
	ldr	r3, .L492+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L93
	ldr	r3, .L492+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L93
	ldr	r3, .L492+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L93:
	ldr	r3, .L492+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L94
	ldr	r3, .L492+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L94
	ldr	r3, .L492+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L94:
	ldr	r3, .L492+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L95
	ldr	r3, .L492+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L95
	ldr	r3, .L492+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L95:
	ldr	r3, .L492+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L96
	ldr	r3, .L492+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L96
	ldr	r3, .L492+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L96:
	ldr	r3, .L492+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L492+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L492+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L91:
	ldr	r3, .L492+384
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L97
	ldr	r3, .L492+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L492+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L492+432
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L492+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L492+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L492+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L492+384
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L492+420
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L492+408
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L89
.L97:
	ldr	r3, .L492+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L492+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L99
	ldr	r3, .L492+432
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L492+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L99
	ldr	r3, .L492+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L492+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L99
	ldr	r3, .L492+384
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L492+420
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L492+408
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L100
.L99:
	ldr	r3, .L492+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L100
	ldr	r3, .L492+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L100:
	ldr	r3, .L492+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L101
	ldr	r3, .L492+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L101
	ldr	r3, .L492+420
	ldr	r3, [r3]	@ float
	ldr	r1, .L492+388
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L101
	ldr	r3, .L492+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L101
	ldr	r3, .L492+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L101
	ldr	r3, .L492+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L101
	ldr	r3, .L492+408
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L103
.L101:
	ldr	r3, .L492+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L103
	ldr	r3, .L492+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L103
	ldr	r3, .L492+432
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L103
	ldr	r3, .L492+384
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L103
	ldr	r3, .L492+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L492+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L103:
	ldr	r3, .L492+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L104
	ldr	r3, .L492+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L104
	ldr	r3, .L492+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L105
	ldr	r3, .L492+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L105
	ldr	r3, .L492+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L106
.L105:
	ldr	r3, .L492+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L104
	ldr	r3, .L492+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L104
	ldr	r3, .L492+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L106
.L104:
	ldr	r3, .L492+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L106
	ldr	r3, .L492+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L106
	ldr	r3, .L492+432
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L106
	ldr	r3, .L492+384
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L106
	ldr	r3, .L492+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L492+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L106:
	ldr	r3, .L492+408
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L107
	ldr	r3, .L492+420
	ldr	r3, [r3]	@ float
	ldr	r1, .L492+424
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L109
.L107:
	ldr	r3, .L492+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L109
	ldr	r3, .L492+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L109
	ldr	r3, .L492+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L109
	ldr	r3, .L492+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L109
	ldr	r3, .L492+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L109
	ldr	r3, .L492+432
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L109:
	ldr	r3, .L492+420
	ldr	r3, [r3]	@ float
	ldr	r1, .L492+380
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L110
	ldr	r3, .L492+420
	ldr	r3, [r3]	@ float
	ldr	r2, .L492+408
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L112
.L110:
	ldr	r3, .L492+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L112
	ldr	r3, .L492+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L112
	ldr	r3, .L492+432
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L112
	ldr	r3, .L492+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L112
	ldr	r3, .L492+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L112
	ldr	r3, .L492+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L112:
	ldr	r3, .L492+408
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L113
	ldr	r3, .L492+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L113
	ldr	r3, .L492+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L113
	ldr	r3, .L492+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L113
	ldr	r3, .L492+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L113
	ldr	r3, .L492+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L115
.L113:
	ldr	r3, .L492+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L115
	ldr	r3, .L492+432
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L115
	ldr	r3, .L492+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L115
	ldr	r3, .L492+384
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L115
	ldr	r3, .L492+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L492+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L115:
	ldr	r3, .L492+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L116
	ldr	r3, .L492+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L116
	ldr	r3, .L492+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L116:
	ldr	r3, .L492+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L118
	ldr	r3, .L492+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L118
	ldr	r3, .L492+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L117
.L118:
	ldr	r3, .L492+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L492+432
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L492+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L117
	ldr	r3, .L492+384
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L492+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L492+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L117:
	ldr	r3, .L492+420
	ldr	r3, [r3]	@ float
	ldr	r2, .L492+408
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L119
	ldr	r3, .L492+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L119
	ldr	r3, .L492+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L119
	ldr	r3, .L492+420
	ldr	r3, [r3]	@ float
	ldr	r1, .L492+388
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L121
.L119:
	ldr	r3, .L492+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L121
	ldr	r3, .L492+432
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L121
	ldr	r3, .L492+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L121
	ldr	r3, .L492+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L121
	ldr	r3, .L492+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L121
	ldr	r3, .L492+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L121:
	ldr	r3, .L492+408
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L122
	ldr	r3, .L492+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L122
	ldr	r3, .L492+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L122
	ldr	r3, .L492+420
	ldr	r3, [r3]	@ float
	ldr	r1, .L492+424
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L124
.L122:
	ldr	r3, .L492+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L124
	ldr	r3, .L492+432
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L124
	ldr	r3, .L495
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L124
	ldr	r3, .L495+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L124
	ldr	r3, .L495+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L124
	ldr	r3, .L495+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L124:
	ldr	r3, .L495+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L125
	ldr	r3, .L495+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L125
	ldr	r3, .L495+24
	ldr	r3, [r3]	@ float
	ldr	r2, .L495+28
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L125
	ldr	r3, .L495+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L127
	ldr	r3, .L495+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L127
	ldr	r3, .L495+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L128
.L127:
	ldr	r3, .L495+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L125
	ldr	r3, .L495+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L125
	ldr	r3, .L495+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L128
.L125:
	ldr	r3, .L495+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L128
	ldr	r3, .L495
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L128
	ldr	r3, .L495+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L128
	ldr	r3, .L495+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L128
	ldr	r3, .L495+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L495+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L128:
	ldr	r3, .L495+24
	ldr	r3, [r3]	@ float
	ldr	r1, .L495+104
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L129
	ldr	r3, .L495+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L129
	ldr	r3, .L495
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L129
	ldr	r3, .L495+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L129
	ldr	r3, .L495+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L129
	ldr	r3, .L495+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L129
	ldr	r3, .L495+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L129:
	ldr	r3, .L495+24
	ldr	r3, [r3]	@ float
	ldr	r1, .L495+112
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L130
	ldr	r3, .L495+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L130
	ldr	r3, .L495
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L130
	ldr	r3, .L495+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L130
	ldr	r3, .L495+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L130
	ldr	r3, .L495+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L130
	ldr	r3, .L495+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L130:
	ldr	r3, .L495+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L131
	ldr	r3, .L495+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L131
	ldr	r3, .L495+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L132
.L131:
	ldr	r3, .L495+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L132
	ldr	r3, .L495
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L132
	ldr	r3, .L495+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L132
	ldr	r3, .L495+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L132
	ldr	r3, .L495+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L495+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L132:
	ldr	r3, .L495+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L133
	ldr	r3, .L495+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L133
	ldr	r3, .L495+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L134
.L133:
	ldr	r3, .L495+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L134
	ldr	r3, .L495
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L134
	ldr	r3, .L495+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L134
	ldr	r3, .L495+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L134
	ldr	r3, .L495+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L495+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L134:
	ldr	r3, .L495+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L135
	ldr	r3, .L495+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L136
.L135:
	ldr	r3, .L495+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L137
	ldr	r3, .L495+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L136
.L137:
	ldr	r3, .L495+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L138
	ldr	r3, .L495+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L136
.L138:
	ldr	r3, .L495+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L495+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L136:
	ldr	r3, .L495+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L139
	ldr	r3, .L495+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L139
	ldr	r3, .L495+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L140
.L139:
	ldr	r3, .L495+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L141
	ldr	r3, .L495+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L141
	ldr	r3, .L495+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L140
.L141:
	ldr	r3, .L495+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L142
	ldr	r3, .L495+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L142
	ldr	r3, .L495+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L140
.L142:
	ldr	r3, .L495+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L143
	ldr	r3, .L495+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L143
	ldr	r3, .L495+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L140
.L143:
	ldr	r3, .L495+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L144
	ldr	r3, .L495+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L144
	ldr	r3, .L495+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L140
.L144:
	ldr	r3, .L495+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L145
	ldr	r3, .L495+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L145
	ldr	r3, .L495+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L140
.L145:
	ldr	r3, .L495+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L495+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L495+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L140:
	ldr	r3, .L495+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L146
	ldr	r3, .L495+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L495+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L495+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L495+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L495+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L495+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L495+136
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L495+52
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L495+48
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L89
.L146:
	ldr	r3, .L495+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L495+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L148
	ldr	r3, .L495+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L495+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L148
	ldr	r3, .L495+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L495+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L148
	ldr	r3, .L495+136
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L495+52
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L495+48
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L149
.L148:
	ldr	r3, .L495+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L495+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L149:
	ldr	r3, .L495+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L150
	ldr	r3, .L495+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L150
	ldr	r3, .L495+52
	ldr	r3, [r3]	@ float
	ldr	r1, .L495+96
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L150
	ldr	r3, .L495+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L150
	ldr	r3, .L495+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L150
	ldr	r3, .L495+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L150
	ldr	r3, .L495+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L152
.L150:
	ldr	r3, .L495+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L152
	ldr	r3, .L495+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L152
	ldr	r3, .L495+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L152
	ldr	r3, .L495+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L152
	ldr	r3, .L495+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L495+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L152:
	ldr	r3, .L495+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L153
	ldr	r3, .L495+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L153
	ldr	r3, .L495+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L154
	ldr	r3, .L495+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L154
	ldr	r3, .L495+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L155
.L154:
	ldr	r3, .L495+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L153
	ldr	r3, .L495+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L153
	ldr	r3, .L495+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L155
.L153:
	ldr	r3, .L495+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L155
	ldr	r3, .L495+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L155
	ldr	r3, .L495+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L155
	ldr	r3, .L495+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L155
	ldr	r3, .L495+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L495+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L155:
	ldr	r3, .L495+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L156
	ldr	r3, .L495+52
	ldr	r3, [r3]	@ float
	ldr	r1, .L495+104
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L158
.L156:
	ldr	r3, .L495+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L158
	ldr	r3, .L495+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L158
	ldr	r3, .L495+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L158
	ldr	r3, .L495+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L158
	ldr	r3, .L495+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L158
	ldr	r3, .L495+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L158:
	ldr	r3, .L495+52
	ldr	r3, [r3]	@ float
	ldr	r1, .L495+112
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L495+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L495+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L161
.L159:
	ldr	r3, .L495+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L161
	ldr	r3, .L495+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L161
	ldr	r3, .L495+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L161
	ldr	r3, .L495+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L161
	ldr	r3, .L495+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L161
	ldr	r3, .L495+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L161:
	ldr	r3, .L495+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L162
	ldr	r3, .L495+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L162
	ldr	r3, .L495+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L162
	ldr	r3, .L495+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L162
	ldr	r3, .L495+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L162
	ldr	r3, .L495+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L164
.L162:
	ldr	r3, .L495+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L164
	ldr	r3, .L495+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L164
	ldr	r3, .L495+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L164
	ldr	r3, .L495+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L164
	ldr	r3, .L495+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L495+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L164:
	ldr	r3, .L495+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L165
	ldr	r3, .L495+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L165
	ldr	r3, .L495+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L166
.L165:
	ldr	r3, .L495+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L167
	ldr	r3, .L495+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L167
	ldr	r3, .L495+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L166
.L167:
	ldr	r3, .L495+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L166
	ldr	r3, .L495+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L166
	ldr	r3, .L495+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L166
	ldr	r3, .L495+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L166
	ldr	r3, .L495+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L495+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L166:
	ldr	r3, .L495+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L495+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L168
	ldr	r3, .L495+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L168
	ldr	r3, .L495+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L168
	ldr	r3, .L495+52
	ldr	r3, [r3]	@ float
	ldr	r1, .L495+96
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L170
.L168:
	ldr	r3, .L495+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L170
	ldr	r3, .L495+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L170
	ldr	r3, .L495+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L170
	ldr	r3, .L495+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L170
	ldr	r3, .L495+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L170
	ldr	r3, .L495+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L170:
	ldr	r3, .L495+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L171
	ldr	r3, .L495+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L171
	ldr	r3, .L495+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L171
	ldr	r3, .L495+52
	ldr	r3, [r3]	@ float
	ldr	r1, .L495+104
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L173
.L171:
	ldr	r3, .L495+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L173
	ldr	r3, .L495+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L173
	ldr	r3, .L495+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L173
	ldr	r3, .L495+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L173
	ldr	r3, .L495+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L173
	ldr	r3, .L495+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L173:
	ldr	r3, .L495+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L174
	ldr	r3, .L495+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L174
	ldr	r3, .L495+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L495+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L174
	ldr	r3, .L495+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L176
	ldr	r3, .L495+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L176
	ldr	r3, .L495+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L177
.L176:
	ldr	r3, .L495+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L174
	ldr	r3, .L495+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L174
	ldr	r3, .L495+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L177
.L174:
	ldr	r3, .L495+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L177
	ldr	r3, .L495+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L177
	ldr	r3, .L495+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L177
	ldr	r3, .L495+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L177
	ldr	r3, .L495+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L495+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L177:
	ldr	r3, .L495+52
	ldr	r3, [r3]	@ float
	ldr	r1, .L495+104
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L178
	ldr	r3, .L495+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	b	.L496
.L497:
	.align	2
.L495:
	.word	pc4_l0
	.word	_x_pc4_l2
	.word	_x_pc4_l0
	.word	_x_pc4_l1
	.word	pc4_evt0
	.word	pc4_evt1
	.word	pc4_x
	.word	_x_pc4_x
	.word	pc4_l2
	.word	pc4_l1
	.word	_x_pc3_evt0
	.word	_x_pc3_evt1
	.word	_x_pc3_x
	.word	pc3_x
	.word	_x_pc3_l2
	.word	_x_pc3_l0
	.word	_x_pc3_l1
	.word	pc3_l2
	.word	pc3_l0
	.word	pc3_l1
	.word	pc3_evt0
	.word	pc3_evt1
	.word	_x_pc2_evt0
	.word	_x_pc2_evt1
	.word	1112014848
	.word	_x_pc2_x
	.word	1103626240
	.word	pc2_x
	.word	1103101952
	.word	_x_pc2_l0
	.word	_x_pc2_l1
	.word	pc2_l2
	.word	pc2_l0
	.word	pc2_l1
	.word	delta
	.word	pc2_evt0
	.word	pc2_evt1
	.word	_x_pc2_l2
.L496:
	bne	.L178
	ldr	r3, .L495+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L178
	ldr	r3, .L495+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L178
	ldr	r3, .L495+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L178
	ldr	r3, .L495+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L178
	ldr	r3, .L495+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L178:
	ldr	r3, .L495+52
	ldr	r3, [r3]	@ float
	ldr	r1, .L495+112
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L179
	ldr	r3, .L495+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L179
	ldr	r3, .L495+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L179
	ldr	r3, .L495+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L179
	ldr	r3, .L495+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L179
	ldr	r3, .L495+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L179
	ldr	r3, .L495+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L179:
	ldr	r3, .L495+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L180
	ldr	r3, .L495+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L180
	ldr	r3, .L495+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L181
.L180:
	ldr	r3, .L495+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L181
	ldr	r3, .L495+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L181
	ldr	r3, .L495+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L181
	ldr	r3, .L495+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L181
	ldr	r3, .L495+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L495+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L181:
	ldr	r3, .L495+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L182
	ldr	r3, .L495+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L182
	ldr	r3, .L495+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L183
.L182:
	ldr	r3, .L495+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L183
	ldr	r3, .L495+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L183
	ldr	r3, .L495+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L183
	ldr	r3, .L495+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L183
	ldr	r3, .L495+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L495+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L183:
	ldr	r3, .L495+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L184
	ldr	r3, .L495+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L185
.L184:
	ldr	r3, .L495+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L186
	ldr	r3, .L495+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L185
.L186:
	ldr	r3, .L495+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L187
	ldr	r3, .L495+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L185
.L187:
	ldr	r3, .L495+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L495+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L185:
	ldr	r3, .L495+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L188
	ldr	r3, .L495+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L188
	ldr	r3, .L495+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L189
.L188:
	ldr	r3, .L495+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L190
	ldr	r3, .L495+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L190
	ldr	r3, .L495+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L189
.L190:
	ldr	r3, .L495+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L191
	ldr	r3, .L495+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L191
	ldr	r3, .L495+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L189
.L191:
	ldr	r3, .L495+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L192
	ldr	r3, .L495+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L192
	ldr	r3, .L495+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L189
.L192:
	ldr	r3, .L495+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L193
	ldr	r3, .L495+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L193
	ldr	r3, .L495+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L189
.L193:
	ldr	r3, .L495+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L194
	ldr	r3, .L495+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L194
	ldr	r3, .L495+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L189
.L194:
	ldr	r3, .L495+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L495+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L495+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L189:
	ldr	r3, .L495+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L195
	ldr	r3, .L495+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L495+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L495+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L495+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L495+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L495+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L495+136
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L495+108
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L495+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L89
.L195:
	ldr	r3, .L495+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L495+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L197
	ldr	r3, .L495+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L495+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L197
	ldr	r3, .L495+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L495+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L197
	ldr	r3, .L495+136
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L495+108
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L495+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L198
.L197:
	ldr	r3, .L495+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L198
	ldr	r3, .L495+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L198:
	ldr	r3, .L495+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L199
	ldr	r3, .L495+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L199
	ldr	r3, .L495+108
	ldr	r3, [r3]	@ float
	ldr	r1, .L495+96
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L199
	ldr	r3, .L495+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L199
	ldr	r3, .L495+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L199
	ldr	r3, .L495+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L199
	ldr	r3, .L495+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L201
.L199:
	ldr	r3, .L495+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L201
	ldr	r3, .L495+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L201
	ldr	r3, .L495+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L201
	ldr	r3, .L495+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L201
	ldr	r3, .L495+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L495+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L201:
	ldr	r3, .L495+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L202
	ldr	r3, .L495+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L202
	ldr	r3, .L495+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L203
	ldr	r3, .L495+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L203
	ldr	r3, .L495+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L204
.L203:
	ldr	r3, .L495+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L202
	ldr	r3, .L495+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L202
	ldr	r3, .L495+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L204
.L202:
	ldr	r3, .L495+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L204
	ldr	r3, .L495+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L204
	ldr	r3, .L495+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L204
	ldr	r3, .L495+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L204
	ldr	r3, .L495+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L495+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L204:
	ldr	r3, .L495+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L205
	ldr	r3, .L495+108
	ldr	r3, [r3]	@ float
	ldr	r1, .L495+104
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
.L205:
	ldr	r3, .L495+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L495+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L495+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L495+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L495+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L495+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L207:
	ldr	r3, .L495+108
	ldr	r3, [r3]	@ float
	ldr	r1, .L495+112
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L208
	ldr	r3, .L495+108
	ldr	r3, [r3]	@ float
	ldr	r2, .L495+100
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L210
.L208:
	ldr	r3, .L495+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L210
	ldr	r3, .L495+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L210
	ldr	r3, .L495+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L210
	ldr	r3, .L495+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L210
	ldr	r3, .L495+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L210
	ldr	r3, .L495+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L210:
	ldr	r3, .L495+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L211
	ldr	r3, .L495+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L211
	ldr	r3, .L495+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L211
	ldr	r3, .L495+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L211
	ldr	r3, .L495+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L211
	ldr	r3, .L495+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L213
.L211:
	ldr	r3, .L495+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L213
	ldr	r3, .L495+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L213
	ldr	r3, .L495+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L213
	ldr	r3, .L495+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L213
	ldr	r3, .L495+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L495+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L213:
	ldr	r3, .L495+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L214
	ldr	r3, .L495+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L214
	ldr	r3, .L495+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L215
.L214:
	ldr	r3, .L495+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L216
	ldr	r3, .L495+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L216
	ldr	r3, .L495+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L215
.L216:
	ldr	r3, .L495+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L215
	ldr	r3, .L495+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L215
	ldr	r3, .L495+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L215
	ldr	r3, .L495+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L215
	ldr	r3, .L495+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L495+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L215:
	ldr	r3, .L495+108
	ldr	r3, [r3]	@ float
	ldr	r2, .L495+100
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L217
	ldr	r3, .L495+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L217
	ldr	r3, .L495+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L217
	ldr	r3, .L495+108
	ldr	r3, [r3]	@ float
	ldr	r1, .L495+96
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L219
.L217:
	ldr	r3, .L495+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L219
	ldr	r3, .L495+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L219
	ldr	r3, .L495+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L219
	ldr	r3, .L495+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L219
	ldr	r3, .L495+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L219
	ldr	r3, .L495+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L219:
	ldr	r3, .L495+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L220
	ldr	r3, .L495+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L220
	ldr	r3, .L495+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L220
	ldr	r3, .L495+108
	ldr	r3, [r3]	@ float
	ldr	r1, .L495+104
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L222
.L220:
	ldr	r3, .L495+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L222
	ldr	r3, .L495+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L222
	ldr	r3, .L495+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L222
	ldr	r3, .L495+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L222
	ldr	r3, .L495+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L222
	ldr	r3, .L495+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L222:
	ldr	r3, .L495+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L223
	ldr	r3, .L495+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L223
	ldr	r3, .L495+108
	ldr	r3, [r3]	@ float
	ldr	r2, .L495+100
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L223
	ldr	r3, .L495+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L225
	ldr	r3, .L495+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L225
	ldr	r3, .L495+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L226
.L225:
	ldr	r3, .L495+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L223
	ldr	r3, .L495+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L223
	ldr	r3, .L495+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L226
.L223:
	ldr	r3, .L495+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L226
	ldr	r3, .L495+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L226
	ldr	r3, .L495+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L226
	ldr	r3, .L495+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L226
	ldr	r3, .L495+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L495+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L226:
	ldr	r3, .L495+108
	ldr	r3, [r3]	@ float
	ldr	r1, .L495+104
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L227
	ldr	r3, .L495+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L227
	ldr	r3, .L495+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L227
	ldr	r3, .L495+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L227
	ldr	r3, .L495+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L227
	ldr	r3, .L495+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L227
	ldr	r3, .L495+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L227:
	ldr	r3, .L495+108
	ldr	r3, [r3]	@ float
	ldr	r1, .L495+112
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L228
	ldr	r3, .L495+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L228
	ldr	r3, .L495+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L228
	ldr	r3, .L495+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L228
	ldr	r3, .L495+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L228
	ldr	r3, .L495+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L228
	ldr	r3, .L495+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L228:
	ldr	r3, .L495+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L495+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L495+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L230
.L229:
	ldr	r3, .L495+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L230
	ldr	r3, .L495+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L230
	ldr	r3, .L495+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L230
	ldr	r3, .L495+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L230
	ldr	r3, .L495+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L495+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L230:
	ldr	r3, .L495+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L231
	ldr	r3, .L498
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L231
	ldr	r3, .L498+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L232
.L231:
	ldr	r3, .L498+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L232
	ldr	r3, .L498+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L232
	ldr	r3, .L498+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L232
	ldr	r3, .L498+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L232
	ldr	r3, .L498+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L498+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L232:
	ldr	r3, .L498+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L233
	ldr	r3, .L498+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L234
.L233:
	ldr	r3, .L498+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L235
	ldr	r3, .L498+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L234
.L235:
	ldr	r3, .L498+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L236
	ldr	r3, .L498+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L234
.L236:
	ldr	r3, .L498+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L498+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L234:
	ldr	r3, .L498+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L237
	ldr	r3, .L498+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L237
	ldr	r3, .L498+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L238
.L237:
	ldr	r3, .L498+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L239
	ldr	r3, .L498+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L239
	ldr	r3, .L498+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L238
.L239:
	ldr	r3, .L498+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L240
	ldr	r3, .L498+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L240
	ldr	r3, .L498+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L238
.L240:
	ldr	r3, .L498+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L241
	ldr	r3, .L498+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L241
	ldr	r3, .L498+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L238
.L241:
	ldr	r3, .L498+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L242
	ldr	r3, .L498+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L242
	ldr	r3, .L498+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L238
.L242:
	ldr	r3, .L498+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L243
	ldr	r3, .L498+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L243
	ldr	r3, .L498+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L238
.L243:
	ldr	r3, .L498+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L498+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L498+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L238:
	ldr	r3, .L498+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L244
	ldr	r3, .L498+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L498+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L498+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L498+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L498+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L498+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L498+20
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L498+64
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L498+68
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L89
.L244:
	ldr	r3, .L498+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L498+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L246
	ldr	r3, .L498+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L498+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L246
	ldr	r3, .L498+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L498+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L246
	ldr	r3, .L498+20
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L498+64
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L498+68
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L247
.L246:
	ldr	r3, .L498+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L247
	ldr	r3, .L498+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L247:
	ldr	r3, .L498+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L248
	ldr	r3, .L498+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L248
	ldr	r3, .L498+64
	ldr	r3, [r3]	@ float
	ldr	r1, .L498+88
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L248
	ldr	r3, .L498+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L248
	ldr	r3, .L498+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L248
	ldr	r3, .L498+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L248
	ldr	r3, .L498+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L250
.L248:
	ldr	r3, .L498+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L250
	ldr	r3, .L498+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L250
	ldr	r3, .L498+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L250
	ldr	r3, .L498+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L250
	ldr	r3, .L498+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L498+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L250:
	ldr	r3, .L498+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L251
	ldr	r3, .L498+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L251
	ldr	r3, .L498+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L252
	ldr	r3, .L498+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L252
	ldr	r3, .L498+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L253
.L252:
	ldr	r3, .L498+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L251
	ldr	r3, .L498+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L251
	ldr	r3, .L498+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L253
.L251:
	ldr	r3, .L498+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L253
	ldr	r3, .L498+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L253
	ldr	r3, .L498+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L253
	ldr	r3, .L498+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L253
	ldr	r3, .L498+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L498+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L253:
	ldr	r3, .L498+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L254
	ldr	r3, .L498+64
	ldr	r3, [r3]	@ float
	ldr	r1, .L498+96
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L256
.L254:
	ldr	r3, .L498+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L256
	ldr	r3, .L498+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L256
	ldr	r3, .L498+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L256
	ldr	r3, .L498+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L256
	ldr	r3, .L498+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L256
	ldr	r3, .L498+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L256:
	ldr	r3, .L498+64
	ldr	r3, [r3]	@ float
	ldr	r1, .L498+104
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L498+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L498+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L259
.L257:
	ldr	r3, .L498+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L259
	ldr	r3, .L498+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L259
	ldr	r3, .L498+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L259
	ldr	r3, .L498+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L259
	ldr	r3, .L498+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L259
	ldr	r3, .L498+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L259:
	ldr	r3, .L498+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L260
	ldr	r3, .L498+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L260
	ldr	r3, .L498+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L260
	ldr	r3, .L498+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L260
	ldr	r3, .L498+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L260
	ldr	r3, .L498+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L262
.L260:
	ldr	r3, .L498+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L262
	ldr	r3, .L498+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L262
	ldr	r3, .L498+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L262
	ldr	r3, .L498+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L262
	ldr	r3, .L498+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L498+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L262:
	ldr	r3, .L498+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L263
	ldr	r3, .L498+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L263
	ldr	r3, .L498+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L264
.L263:
	ldr	r3, .L498+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L265
	ldr	r3, .L498+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L265
	ldr	r3, .L498+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L264
.L265:
	ldr	r3, .L498+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L264
	ldr	r3, .L498+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L264
	ldr	r3, .L498+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L264
	ldr	r3, .L498+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L264
	ldr	r3, .L498+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L498+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L264:
	ldr	r3, .L498+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L498+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L266
	ldr	r3, .L498+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L266
	ldr	r3, .L498+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L266
	ldr	r3, .L498+64
	ldr	r3, [r3]	@ float
	ldr	r1, .L498+88
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L268
.L266:
	ldr	r3, .L498+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L268
	ldr	r3, .L498+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L268
	ldr	r3, .L498+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L268
	ldr	r3, .L498+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L268
	ldr	r3, .L498+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L268
	ldr	r3, .L498+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L268:
	ldr	r3, .L498+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L269
	ldr	r3, .L498+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L269
	ldr	r3, .L498+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L269
	ldr	r3, .L498+64
	ldr	r3, [r3]	@ float
	ldr	r1, .L498+96
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L271
.L269:
	ldr	r3, .L498+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L271
	ldr	r3, .L498+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L271
	ldr	r3, .L498+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L271
	ldr	r3, .L498+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L271
	ldr	r3, .L498+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L271
	ldr	r3, .L498+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L271:
	ldr	r3, .L498+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L272
	ldr	r3, .L498+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L272
	ldr	r3, .L498+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L498+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L272
	ldr	r3, .L498+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L274
	ldr	r3, .L498+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L274
	ldr	r3, .L498+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L275
.L274:
	ldr	r3, .L498+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L272
	ldr	r3, .L498+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L272
	ldr	r3, .L498+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L275
.L272:
	ldr	r3, .L498+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L275
	ldr	r3, .L498+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L275
	ldr	r3, .L498+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L275
	ldr	r3, .L498+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L275
	ldr	r3, .L498+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L498+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L275:
	ldr	r3, .L498+64
	ldr	r3, [r3]	@ float
	ldr	r1, .L498+96
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L276
	ldr	r3, .L498+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L276
	ldr	r3, .L498+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L276
	ldr	r3, .L498+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L276
	ldr	r3, .L498+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L276
	ldr	r3, .L498+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L276
	ldr	r3, .L498+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L276:
	ldr	r3, .L498+64
	ldr	r3, [r3]	@ float
	ldr	r1, .L498+104
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L277
	ldr	r3, .L498+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L277
	ldr	r3, .L498+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L277
	ldr	r3, .L498+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L277
	ldr	r3, .L498+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L277
	ldr	r3, .L498+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L277
	ldr	r3, .L498+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L277:
	ldr	r3, .L498+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L278
	ldr	r3, .L498+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L278
	ldr	r3, .L498+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L279
.L278:
	ldr	r3, .L498+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L279
	ldr	r3, .L498+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L279
	ldr	r3, .L498+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L279
	ldr	r3, .L498+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L279
	ldr	r3, .L498+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L498+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L279:
	ldr	r3, .L498+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L280
	ldr	r3, .L498+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L280
	ldr	r3, .L498+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L281
.L280:
	ldr	r3, .L498+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L281
	ldr	r3, .L498+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L281
	ldr	r3, .L498+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L281
	ldr	r3, .L498+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L281
	ldr	r3, .L498+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L498+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L281:
	ldr	r3, .L498+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L282
	ldr	r3, .L498+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L283
.L282:
	ldr	r3, .L498+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L284
	ldr	r3, .L498+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L283
.L284:
	ldr	r3, .L498+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L285
	ldr	r3, .L498+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L283
.L285:
	ldr	r3, .L498+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L498+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L283:
	ldr	r3, .L498+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L286
	ldr	r3, .L498+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L286
	ldr	r3, .L498+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L287
.L286:
	ldr	r3, .L498+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L288
	ldr	r3, .L498+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L288
	ldr	r3, .L498+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L287
.L288:
	ldr	r3, .L498+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L289
	b	.L499
.L500:
	.align	2
.L498:
	.word	_x_pc2_l0
	.word	_x_pc2_l1
	.word	pc2_l2
	.word	pc2_l0
	.word	pc2_l1
	.word	delta
	.word	pc2_evt0
	.word	pc2_evt1
	.word	_x_pc1_evt0
	.word	_x_pc1_evt1
	.word	_x_pc1_l2
	.word	_x_pc1_l0
	.word	_x_pc1_l1
	.word	pc1_l0
	.word	pc1_l1
	.word	pc1_l2
	.word	pc1_x
	.word	_x_pc1_x
	.word	pc1_evt0
	.word	pc1_evt1
	.word	_x_pc0_evt0
	.word	_x_pc0_evt1
	.word	1112014848
	.word	_x_pc0_x
	.word	1103626240
	.word	pc0_x
	.word	1103101952
	.word	_x_pc0_l2
	.word	_x_pc0_l0
	.word	_x_pc0_l1
	.word	pc0_l2
	.word	pc0_l0
	.word	pc0_l1
	.word	pc0_evt0
	.word	pc0_evt1
	.word	_x_a4_evt0
	.word	_x_a4_evt1
	.word	id
	.word	_x_a4_l
	.word	_x_id
	.word	a4_l
	.word	delta
	.word	a4_evt0
	.word	a4_evt1
	.word	_x_a3_evt0
	.word	_x_a3_evt1
.L499:
	ldr	r3, .L498+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L289
	ldr	r3, .L498+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L287
.L289:
	ldr	r3, .L498+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L290
	ldr	r3, .L498+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L290
	ldr	r3, .L498+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L287
.L290:
	ldr	r3, .L498+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L291
	ldr	r3, .L498+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L291
	ldr	r3, .L498+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L287
.L291:
	ldr	r3, .L498+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L292
	ldr	r3, .L498+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L292
	ldr	r3, .L498+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L287
.L292:
	ldr	r3, .L498+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L498+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L498+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L287:
	ldr	r3, .L498+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L293
	ldr	r3, .L498+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L498+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L498+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L498+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L498+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L498+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L498+164
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L498+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L498+92
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L89
.L293:
	ldr	r3, .L498+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L498+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L295
	ldr	r3, .L498+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L498+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L295
	ldr	r3, .L498+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L498+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L295
	ldr	r3, .L498+164
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L498+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L498+92
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L296
.L295:
	ldr	r3, .L498+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L296
	ldr	r3, .L498+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L296:
	ldr	r3, .L498+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L297
	ldr	r3, .L498+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L297
	ldr	r3, .L498+100
	ldr	r3, [r3]	@ float
	ldr	r1, .L498+88
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L297
	ldr	r3, .L498+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L297
	ldr	r3, .L498+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L297
	ldr	r3, .L498+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L297
	ldr	r3, .L498+92
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L299
.L297:
	ldr	r3, .L498+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L299
	ldr	r3, .L498+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L299
	ldr	r3, .L498+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L299
	ldr	r3, .L498+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L299
	ldr	r3, .L498+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L498+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L299:
	ldr	r3, .L498+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L300
	ldr	r3, .L498+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L300
	ldr	r3, .L498+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L301
	ldr	r3, .L498+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L301
	ldr	r3, .L498+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L302
.L301:
	ldr	r3, .L498+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L300
	ldr	r3, .L498+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L300
	ldr	r3, .L498+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L302
.L300:
	ldr	r3, .L498+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L302
	ldr	r3, .L498+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L302
	ldr	r3, .L498+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L302
	ldr	r3, .L498+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L302
	ldr	r3, .L498+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L498+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L302:
	ldr	r3, .L498+92
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L303
	ldr	r3, .L498+100
	ldr	r3, [r3]	@ float
	ldr	r1, .L498+96
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L305
.L303:
	ldr	r3, .L498+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L305
	ldr	r3, .L498+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L305
	ldr	r3, .L498+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L305
	ldr	r3, .L498+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L305
	ldr	r3, .L498+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L305
	ldr	r3, .L498+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L305:
	ldr	r3, .L498+100
	ldr	r3, [r3]	@ float
	ldr	r1, .L498+104
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L306
	ldr	r3, .L498+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L498+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L308
.L306:
	ldr	r3, .L498+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L308
	ldr	r3, .L498+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L308
	ldr	r3, .L498+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L308
	ldr	r3, .L498+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L308
	ldr	r3, .L498+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L308
	ldr	r3, .L498+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L308:
	ldr	r3, .L498+92
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L309
	ldr	r3, .L498+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L309
	ldr	r3, .L498+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L309
	ldr	r3, .L498+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L309
	ldr	r3, .L498+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L309
	ldr	r3, .L498+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L311
.L309:
	ldr	r3, .L498+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L311
	ldr	r3, .L498+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L311
	ldr	r3, .L498+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L311
	ldr	r3, .L498+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L311
	ldr	r3, .L498+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L498+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L311:
	ldr	r3, .L498+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L312
	ldr	r3, .L498+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L312
	ldr	r3, .L498+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L313
.L312:
	ldr	r3, .L498+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L314
	ldr	r3, .L498+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L314
	ldr	r3, .L498+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L313
.L314:
	ldr	r3, .L498+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L313
	ldr	r3, .L498+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L313
	ldr	r3, .L498+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L313
	ldr	r3, .L498+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L313
	ldr	r3, .L498+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L498+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L313:
	ldr	r3, .L498+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L498+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L315
	ldr	r3, .L498+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L315
	ldr	r3, .L498+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L315
	ldr	r3, .L498+100
	ldr	r3, [r3]	@ float
	ldr	r1, .L498+88
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L317
.L315:
	ldr	r3, .L498+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L317
	ldr	r3, .L498+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L317
	ldr	r3, .L498+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L317
	ldr	r3, .L498+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L317
	ldr	r3, .L498+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L317
	ldr	r3, .L498+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L317:
	ldr	r3, .L498+92
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L318
	ldr	r3, .L498+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L318
	ldr	r3, .L498+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L318
	ldr	r3, .L498+100
	ldr	r3, [r3]	@ float
	ldr	r1, .L498+96
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L320
.L318:
	ldr	r3, .L498+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L320
	ldr	r3, .L498+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L320
	ldr	r3, .L498+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L320
	ldr	r3, .L498+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L320
	ldr	r3, .L498+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L320
	ldr	r3, .L498+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L320:
	ldr	r3, .L498+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L321
	ldr	r3, .L498+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L321
	ldr	r3, .L498+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L498+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L321
	ldr	r3, .L498+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L323
	ldr	r3, .L498+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L323
	ldr	r3, .L498+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L324
.L323:
	ldr	r3, .L498+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L321
	ldr	r3, .L498+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L321
	ldr	r3, .L498+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L324
.L321:
	ldr	r3, .L498+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L324
	ldr	r3, .L498+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L324
	ldr	r3, .L498+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L324
	ldr	r3, .L498+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L324
	ldr	r3, .L498+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L498+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L324:
	ldr	r3, .L498+100
	ldr	r3, [r3]	@ float
	ldr	r1, .L498+96
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L325
	ldr	r3, .L498+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L325
	ldr	r3, .L498+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L325
	ldr	r3, .L498+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L325
	ldr	r3, .L498+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L325
	ldr	r3, .L498+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L325
	ldr	r3, .L498+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L325:
	ldr	r3, .L498+100
	ldr	r3, [r3]	@ float
	ldr	r1, .L498+104
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L326
	ldr	r3, .L498+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L326
	ldr	r3, .L498+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L326
	ldr	r3, .L498+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L326
	ldr	r3, .L498+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L326
	ldr	r3, .L498+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L326
	ldr	r3, .L498+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L326:
	ldr	r3, .L498+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L327
	ldr	r3, .L498+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L327
	ldr	r3, .L498+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L328
.L327:
	ldr	r3, .L498+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L328
	ldr	r3, .L498+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L328
	ldr	r3, .L498+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L328
	ldr	r3, .L498+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L328
	ldr	r3, .L498+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L498+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L328:
	ldr	r3, .L498+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L329
	ldr	r3, .L498+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L329
	ldr	r3, .L498+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L330
.L329:
	ldr	r3, .L498+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L330
	ldr	r3, .L498+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L330
	ldr	r3, .L498+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L330
	ldr	r3, .L498+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L330
	ldr	r3, .L498+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L498+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L330:
	ldr	r3, .L498+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L331
	ldr	r3, .L498+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L332
.L331:
	ldr	r3, .L498+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L333
	ldr	r3, .L498+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L332
.L333:
	ldr	r3, .L498+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L498+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L332:
	ldr	r3, .L498+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L498+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L334
	ldr	r3, .L498+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L498+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L334
	ldr	r3, .L498+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L334:
	ldr	r3, .L498+156
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L336
	ldr	r3, .L498+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L336
	ldr	r3, .L498+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L336
	ldr	r3, .L498+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L336
	ldr	r3, .L498+148
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L337
.L336:
	ldr	r3, .L498+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L337
	ldr	r3, .L498+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L337
	ldr	r3, .L498+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L498+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L337:
	ldr	r3, .L498+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L338
	ldr	r3, .L498+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L338
	ldr	r3, .L498+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L338
	ldr	r3, .L498+156
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L339
.L338:
	ldr	r3, .L498+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L339
	ldr	r3, .L498+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L339
	ldr	r3, .L498+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L498+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L339:
	ldr	r3, .L498+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L340
	ldr	r3, .L498+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L341
.L340:
	ldr	r3, .L498+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L342
	ldr	r3, .L498+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L341
.L342:
	ldr	r3, .L498+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L498+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L341:
	ldr	r3, .L501
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L501+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L343
	ldr	r3, .L501+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L501+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L343
	ldr	r3, .L501+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L343:
	ldr	r3, .L501+20
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L345
	ldr	r3, .L501+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L345
	ldr	r3, .L501+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L345
	ldr	r3, .L501+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L345
	ldr	r3, .L501+24
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L346
.L345:
	ldr	r3, .L501
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L346
	ldr	r3, .L501+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L346
	ldr	r3, .L501+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L501+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L346:
	ldr	r3, .L501+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L347
	ldr	r3, .L501+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L347
	ldr	r3, .L501+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L347
	ldr	r3, .L501+20
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L348
.L347:
	ldr	r3, .L501
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L348
	ldr	r3, .L501+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L348
	ldr	r3, .L501+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L501+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L348:
	ldr	r3, .L501+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L501+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L350
.L349:
	ldr	r3, .L501+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L351
	ldr	r3, .L501+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L350
.L351:
	ldr	r3, .L501+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L501+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L350:
	ldr	r3, .L501+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L501+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L352
	ldr	r3, .L501+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L501+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L352
	ldr	r3, .L501+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L352:
	ldr	r3, .L501+20
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L354
	ldr	r3, .L501+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L354
	ldr	r3, .L501+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L354
	ldr	r3, .L501+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L354
	ldr	r3, .L501+24
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L355
.L354:
	ldr	r3, .L501+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L355
	ldr	r3, .L501+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L355
	ldr	r3, .L501+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L501+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L355:
	ldr	r3, .L501+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L356
	ldr	r3, .L501+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L356
	ldr	r3, .L501+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L356
	ldr	r3, .L501+20
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L357
.L356:
	ldr	r3, .L501+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L357
	ldr	r3, .L501+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L357
	ldr	r3, .L501+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L501+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L357:
	ldr	r3, .L501+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L358
	ldr	r3, .L501+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L359
.L358:
	ldr	r3, .L501+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L360
	ldr	r3, .L501+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L359
.L360:
	ldr	r3, .L501+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L501+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L359:
	ldr	r3, .L501+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L501+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L361
	ldr	r3, .L501+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L501+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L361
	ldr	r3, .L501+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L361:
	ldr	r3, .L501+20
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L363
	ldr	r3, .L501+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L363
	ldr	r3, .L501+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L363
	ldr	r3, .L501+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L363
	ldr	r3, .L501+24
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L364
.L363:
	ldr	r3, .L501+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L364
	ldr	r3, .L501+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L364
	ldr	r3, .L501+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L501+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L364:
	ldr	r3, .L501+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L365
	ldr	r3, .L501+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L365
	ldr	r3, .L501+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L365
	ldr	r3, .L501+20
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L366
.L365:
	ldr	r3, .L501+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L366
	ldr	r3, .L501+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L366
	ldr	r3, .L501+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L501+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L366:
	ldr	r3, .L501+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L367
	ldr	r3, .L501+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L368
.L367:
	ldr	r3, .L501+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L369
	ldr	r3, .L501+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L368
.L369:
	ldr	r3, .L501+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L501+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L368:
	ldr	r3, .L501+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L501+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L370
	ldr	r3, .L501+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L501+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L370
	ldr	r3, .L501+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L370:
	ldr	r3, .L501+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L372
	ldr	r3, .L501+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L372
	ldr	r3, .L501+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L372
	ldr	r3, .L501+24
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L372
	ldr	r3, .L501+20
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L373
.L372:
	ldr	r3, .L501+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L373
	ldr	r3, .L501+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L373
	ldr	r3, .L501+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L501+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L373:
	ldr	r3, .L501+20
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L374
	ldr	r3, .L501+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L374
	ldr	r3, .L501+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L374
	ldr	r3, .L501+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L375
.L374:
	ldr	r3, .L501+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L375
	ldr	r3, .L501+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L375
	ldr	r3, .L501+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L501+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L375:
	ldr	r3, .L501+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L501+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L376
	ldr	r3, .L501+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L501+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L89
.L376:
	ldr	r3, .L501+24
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L501+20
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L378
	ldr	r3, .L501+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L379
.L378:
	ldr	r3, .L501+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L379
	ldr	r3, .L501+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L379
	ldr	r3, .L501+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L379:
	ldr	r3, .L501+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L380
	ldr	r3, .L501+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L380
	ldr	r3, .L501+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L380
	ldr	r3, .L501+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L380:
	ldr	r3, .L501+20
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L381
	ldr	r3, .L501+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L381
	ldr	r3, .L501+24
	ldr	r3, [r3]
	cmp	r3, #4
	ble	.L381
	ldr	r3, .L501+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L381
	ldr	r3, .L501+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L381:
	ldr	r3, .L501+20
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L382
	ldr	r3, .L501+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L382
	ldr	r3, .L501+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L382
	ldr	r3, .L501+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L382
	ldr	r3, .L501+24
	ldr	r3, [r3]
	cmp	r3, #4
	ble	.L89
.L382:
	ldr	r3, .L501+276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L501+20
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L384
	ldr	r3, .L501+20
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L384
	ldr	r3, .L501+20
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L384
	ldr	r3, .L501+20
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L384
	ldr	r3, .L501+20
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L89
.L384:
	ldr	r3, .L501+24
	ldr	r2, [r3]
	ldr	r3, .L501+20
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L385
	ldr	r3, .L501+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L385
	ldr	r3, .L501+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L385
	ldr	r3, .L501+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L385
	ldr	r3, .L501+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L385
	ldr	r3, .L501+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L385
	ldr	r3, .L501+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L385
	ldr	r3, .L501+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L385
	ldr	r3, .L501+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L385
	ldr	r3, .L501+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L385
	ldr	r3, .L501+360
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L385
	ldr	r3, .L501+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L385
	ldr	r3, .L501+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L385
	ldr	r3, .L501+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L385
	ldr	r3, .L501+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L385
	ldr	r3, .L501+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L385
	ldr	r3, .L501+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L385
	ldr	r3, .L501+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L385
	ldr	r3, .L501+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L385
	ldr	r3, .L501+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L385
	ldr	r3, .L501+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L385
	ldr	r3, .L501+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L89
.L385:
	ldr	r3, .L501+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L386
	ldr	r3, .L501+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L386
	mov	r3, #1
	b	.L387
.L386:
	mov	r3, #0
.L387:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L501+360
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L388
	ldr	r3, .L501+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L388
	mov	r3, #1
	b	.L389
.L388:
	mov	r3, #0
.L389:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L390
	ldr	r3, .L501+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L89
.L390:
	ldr	r3, .L501+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L392
	ldr	r3, .L501+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L393
	ldr	r3, .L501+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L393
	mov	r3, #1
	b	.L394
.L393:
	mov	r3, #0
.L394:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L501+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L395
	ldr	r3, .L501+360
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L395
	mov	r3, #1
	b	.L396
.L395:
	mov	r3, #0
.L396:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L89
.L392:
	ldr	r3, .L501+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L397
	ldr	r3, .L501+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L398
	ldr	r3, .L501+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L398
	mov	r3, #1
	b	.L399
.L398:
	mov	r3, #0
.L399:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L501+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L400
	ldr	r3, .L501+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L400
	mov	r3, #1
	b	.L401
.L400:
	mov	r3, #0
.L401:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L89
.L397:
	ldr	r3, .L501+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L402
	ldr	r3, .L501+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L403
	ldr	r3, .L501+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L403
	mov	r3, #1
	b	.L404
.L403:
	mov	r3, #0
.L404:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L501+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L405
	ldr	r3, .L501+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L405
	mov	r3, #1
	b	.L406
.L405:
	mov	r3, #0
.L406:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L89
.L402:
	ldr	r3, .L501+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L407
	ldr	r3, .L501+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L408
	ldr	r3, .L501+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L408
	mov	r3, #1
	b	.L409
.L408:
	mov	r3, #0
.L409:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L501+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L410
	ldr	r3, .L501+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L410
	mov	r3, #1
	b	.L411
.L410:
	mov	r3, #0
.L411:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L89
.L407:
	ldr	r3, .L501+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L412
	ldr	r3, .L501+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L413
	ldr	r3, .L501+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L413
	mov	r3, #1
	b	.L414
.L413:
	mov	r3, #0
.L414:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L501+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L415
	ldr	r3, .L501+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L415
	mov	r3, #1
	b	.L416
.L415:
	mov	r3, #0
.L416:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L89
.L412:
	ldr	r3, .L501+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L417
	ldr	r3, .L501+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L418
	ldr	r3, .L501+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L418
	mov	r3, #1
	b	.L419
.L418:
	mov	r3, #0
.L419:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L501+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L420
	ldr	r3, .L501+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L420
	mov	r3, #1
	b	.L421
.L502:
	.align	2
.L501:
	.word	a3_l
	.word	_x_a3_l
	.word	delta
	.word	a3_evt0
	.word	a3_evt1
	.word	_x_id
	.word	id
	.word	_x__diverge_delta
	.word	_diverge_delta
	.word	_x_pc4_x
	.word	pc4_x
	.word	_x_pc3_l0
	.word	pc3_l0
	.word	_x_pc3_evt1
	.word	pc3_evt1
	.word	_x_pc2_l2
	.word	pc2_l2
	.word	_x_pc2_l1
	.word	pc2_l1
	.word	_x_pc2_l0
	.word	pc2_l0
	.word	_x_pc4_l2
	.word	pc4_l2
	.word	_x_pc2_evt1
	.word	pc2_evt1
	.word	_x_pc3_evt0
	.word	pc3_evt0
	.word	_x_pc2_x
	.word	pc2_x
	.word	_x_pc1_l1
	.word	pc1_l1
	.word	_x_a2_l
	.word	a2_l
	.word	_x_pc4_l0
	.word	pc4_l0
	.word	_x_a2_evt1
	.word	a2_evt1
	.word	_x_a3_l
	.word	a3_l
	.word	_x_a2_evt0
	.word	a2_evt0
	.word	_x_pc0_l1
	.word	pc0_l1
	.word	_x_pc4_l1
	.word	pc4_l1
	.word	_x_pc2_evt0
	.word	pc2_evt0
	.word	_x_pc1_x
	.word	pc1_x
	.word	_x_pc4_evt0
	.word	pc4_evt0
	.word	_x_pc3_x
	.word	pc3_x
	.word	_x_c_initial
	.word	c_initial
	.word	_x_pc0_x
	.word	pc0_x
	.word	_x_c_move
	.word	c_move
	.word	_x_a0_evt0
	.word	a0_evt0
	.word	_x_a1_l
	.word	a1_l
	.word	_x_a0_l
	.word	a0_l
	.word	_x_id
	.word	id
	.word	_x_pc0_l2
	.word	pc0_l2
	.word	_x_delta
	.word	delta
	.word	_x_a3_evt0
	.word	a3_evt0
	.word	_x_a3_evt1
	.word	a3_evt1
	.word	_x_pc4_evt1
	.word	pc4_evt1
	.word	_x_a4_l
	.word	a4_l
	.word	_x_pc1_l2
	.word	pc1_l2
	.word	_x_a4_evt0
	.word	a4_evt0
	.word	_x_a0_evt1
	.word	a0_evt1
	.word	_x_pc1_l0
	.word	pc1_l0
	.word	_x_pc0_evt0
	.word	pc0_evt0
	.word	_x_pc0_evt1
	.word	pc0_evt1
	.word	_x_a4_evt1
	.word	a4_evt1
	.word	_x_pc0_l0
	.word	pc0_l0
	.word	_x_pc3_l1
	.word	pc3_l1
	.word	_x_a1_evt0
	.word	a1_evt0
	.word	_x_pc1_evt0
	.word	pc1_evt0
	.word	_x_pc3_l2
	.word	pc3_l2
	.word	_x_a1_evt1
	.word	a1_evt1
	.word	_x_pc1_evt1
	.word	pc1_evt1
.L420:
	mov	r3, #0
.L421:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L89
.L417:
	ldr	r3, .L501+280
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L422
	ldr	r3, .L501+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L423
	ldr	r3, .L501+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L423
	mov	r3, #1
	b	.L424
.L423:
	mov	r3, #0
.L424:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L501+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L425
	ldr	r3, .L501+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L425
	mov	r3, #1
	b	.L426
.L425:
	mov	r3, #0
.L426:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L89
.L422:
	ldr	r3, .L501+280
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L427
	ldr	r3, .L501+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L428
	ldr	r3, .L501+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L428
	mov	r3, #1
	b	.L429
.L428:
	mov	r3, #0
.L429:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L501+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L430
	ldr	r3, .L501+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L430
	mov	r3, #1
	b	.L431
.L430:
	mov	r3, #0
.L431:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L89
.L427:
	ldr	r3, .L501+280
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L432
	ldr	r3, .L501+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L433
	ldr	r3, .L501+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L433
	mov	r3, #1
	b	.L434
.L433:
	mov	r3, #0
.L434:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L501+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L435
	ldr	r3, .L501+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L435
	mov	r3, #1
	b	.L436
.L435:
	mov	r3, #0
.L436:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L89
.L432:
	ldr	r3, .L501+280
	ldr	r3, [r3]	@ float
	ldr	r2, .L501+28
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L437
	ldr	r3, .L501+32
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L438
	mov	r3, #0
	mov	r4, r3
.L438:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L89
.L437:
	ldr	r3, .L501+32
	ldr	r3, [r3]	@ float
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L439
	ldr	r3, .L501+280
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L501+32
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L501+28
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L89
.L439:
	mov	r3, #1
	b	.L441
.L89:
	mov	r3, #0
.L441:
	str	r3, [fp, #-24]
	ldr	r3, .L501+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L501+32
	str	r3, [r2]	@ float
	ldr	r3, .L501+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L501+40
	str	r3, [r2]	@ float
	ldr	r3, .L501+44
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+48
	strb	r2, [r3]
	ldr	r3, .L501+52
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+56
	strb	r2, [r3]
	ldr	r3, .L501+60
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+64
	strb	r2, [r3]
	ldr	r3, .L501+68
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+72
	strb	r2, [r3]
	ldr	r3, .L501+76
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+80
	strb	r2, [r3]
	ldr	r3, .L501+84
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+88
	strb	r2, [r3]
	ldr	r3, .L501+92
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+96
	strb	r2, [r3]
	ldr	r3, .L501+100
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+104
	strb	r2, [r3]
	ldr	r3, .L501+108
	ldr	r3, [r3]	@ float
	ldr	r2, .L501+112
	str	r3, [r2]	@ float
	ldr	r3, .L501+116
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+120
	strb	r2, [r3]
	ldr	r3, .L501+124
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+128
	strb	r2, [r3]
	ldr	r3, .L501+132
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+136
	strb	r2, [r3]
	ldr	r3, .L501+140
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+144
	strb	r2, [r3]
	ldr	r3, .L501+148
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+152
	strb	r2, [r3]
	ldr	r3, .L501+156
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+160
	strb	r2, [r3]
	ldr	r3, .L501+164
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+168
	strb	r2, [r3]
	ldr	r3, .L501+172
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+176
	strb	r2, [r3]
	ldr	r3, .L501+180
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+184
	strb	r2, [r3]
	ldr	r3, .L501+188
	ldr	r3, [r3]	@ float
	ldr	r2, .L501+192
	str	r3, [r2]	@ float
	ldr	r3, .L501+196
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+200
	strb	r2, [r3]
	ldr	r3, .L501+204
	ldr	r3, [r3]	@ float
	ldr	r2, .L501+208
	str	r3, [r2]	@ float
	ldr	r3, .L501+212
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+216
	strb	r2, [r3]
	ldr	r3, .L501+220
	ldr	r3, [r3]	@ float
	ldr	r2, .L501+224
	str	r3, [r2]	@ float
	ldr	r3, .L501+228
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+232
	strb	r2, [r3]
	ldr	r3, .L501+236
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+240
	strb	r2, [r3]
	ldr	r3, .L501+244
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+248
	strb	r2, [r3]
	ldr	r3, .L501+252
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+256
	strb	r2, [r3]
	ldr	r3, .L501+260
	ldr	r3, [r3]
	ldr	r2, .L501+264
	str	r3, [r2]
	ldr	r3, .L501+268
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+272
	strb	r2, [r3]
	ldr	r3, .L501+276
	ldr	r3, [r3]	@ float
	ldr	r2, .L501+280
	str	r3, [r2]	@ float
	ldr	r3, .L501+284
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+288
	strb	r2, [r3]
	ldr	r3, .L501+292
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+296
	strb	r2, [r3]
	ldr	r3, .L501+300
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+304
	strb	r2, [r3]
	ldr	r3, .L501+308
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+312
	strb	r2, [r3]
	ldr	r3, .L501+316
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+320
	strb	r2, [r3]
	ldr	r3, .L501+324
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+328
	strb	r2, [r3]
	ldr	r3, .L501+332
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+336
	strb	r2, [r3]
	ldr	r3, .L501+340
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+344
	strb	r2, [r3]
	ldr	r3, .L501+348
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+352
	strb	r2, [r3]
	ldr	r3, .L501+356
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+360
	strb	r2, [r3]
	ldr	r3, .L501+364
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+368
	strb	r2, [r3]
	ldr	r3, .L501+372
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+376
	strb	r2, [r3]
	ldr	r3, .L501+380
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+384
	strb	r2, [r3]
	ldr	r3, .L501+388
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+392
	strb	r2, [r3]
	ldr	r3, .L501+396
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+400
	strb	r2, [r3]
	ldr	r3, .L501+404
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+408
	strb	r2, [r3]
	ldr	r3, .L501+412
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+416
	strb	r2, [r3]
	ldr	r3, .L501+420
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L501+424
	strb	r2, [r3]
.L84:
	ldr	r3, [fp, #-24]
	cmp	r3, #0
	bne	.L442
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
