	.file	"217161.c"
	.intel_syntax noprefix
	.text
	.globl	leadingBitPosition
	.type	leadingBitPosition, @function
leadingBitPosition:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	WORD PTR -20[rbp], ax
	movzx	eax, WORD PTR -20[rbp]
	bsr	eax, eax
	xor	eax, 31
	mov	WORD PTR -2[rbp], ax
	mov	eax, 31
	sub	ax, WORD PTR -2[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	leadingBitPosition, .-leadingBitPosition
	.globl	LM
	.type	LM, @function
LM:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 112
	mov	DWORD PTR -100[rbp], edi
	mov	DWORD PTR -104[rbp], esi
	mov	eax, edx
	mov	WORD PTR -108[rbp], ax
	mov	WORD PTR -86[rbp], 16
	cmp	DWORD PTR -100[rbp], 0
	je	.L4
	cmp	DWORD PTR -104[rbp], 0
	jne	.L5
.L4:
	mov	eax, 0
	jmp	.L6
.L5:
	cmp	DWORD PTR -100[rbp], 0
	setle	al
	mov	BYTE PTR -88[rbp], al
	cmp	DWORD PTR -104[rbp], 0
	setle	al
	mov	BYTE PTR -87[rbp], al
	cmp	BYTE PTR -88[rbp], 0
	je	.L7
	mov	eax, DWORD PTR -100[rbp]
	not	eax
	jmp	.L8
.L7:
	mov	eax, DWORD PTR -100[rbp]
.L8:
	mov	DWORD PTR -84[rbp], eax
	cmp	BYTE PTR -87[rbp], 0
	je	.L9
	mov	eax, DWORD PTR -104[rbp]
	not	eax
	jmp	.L10
.L9:
	mov	eax, DWORD PTR -104[rbp]
.L10:
	mov	DWORD PTR -80[rbp], eax
	mov	eax, DWORD PTR -84[rbp]
	mov	DWORD PTR -76[rbp], eax
	mov	eax, DWORD PTR -80[rbp]
	mov	DWORD PTR -72[rbp], eax
	mov	eax, DWORD PTR -76[rbp]
	movzx	eax, ax
	mov	edi, eax
	call	leadingBitPosition
	movzx	eax, ax
	mov	DWORD PTR -68[rbp], eax
	movzx	eax, WORD PTR -86[rbp]
	sub	eax, DWORD PTR -68[rbp]
	sub	eax, 1
	mov	edx, DWORD PTR -76[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -64[rbp], eax
	mov	eax, DWORD PTR -72[rbp]
	movzx	eax, ax
	mov	edi, eax
	call	leadingBitPosition
	movzx	eax, ax
	mov	DWORD PTR -60[rbp], eax
	movzx	eax, WORD PTR -86[rbp]
	sub	eax, DWORD PTR -60[rbp]
	sub	eax, 1
	mov	edx, DWORD PTR -72[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -56[rbp], eax
	movzx	eax, WORD PTR -86[rbp]
	sub	eax, 1
	mov	edx, 1
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	sub	eax, 1
	mov	DWORD PTR -52[rbp], eax
	movzx	eax, WORD PTR -86[rbp]
	sub	eax, 1
	mov	edx, 1
	mov	ecx, eax
	sal	edx, cl
	movzx	eax, WORD PTR -86[rbp]
	movzx	ecx, WORD PTR -108[rbp]
	sub	eax, ecx
	mov	esi, 1
	mov	ecx, eax
	sal	esi, cl
	mov	ecx, esi
	mov	eax, edx
	sub	eax, ecx
	mov	DWORD PTR -48[rbp], eax
	mov	eax, DWORD PTR -64[rbp]
	and	eax, DWORD PTR -52[rbp]
	mov	DWORD PTR -44[rbp], eax
	mov	eax, DWORD PTR -64[rbp]
	and	eax, DWORD PTR -48[rbp]
	mov	DWORD PTR -40[rbp], eax
	movzx	eax, WORD PTR -86[rbp]
	movzx	edx, WORD PTR -108[rbp]
	sub	eax, edx
	sub	eax, 1
	mov	edx, 1
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	or	DWORD PTR -40[rbp], eax
	mov	eax, DWORD PTR -56[rbp]
	and	eax, DWORD PTR -52[rbp]
	mov	DWORD PTR -36[rbp], eax
	mov	eax, DWORD PTR -56[rbp]
	and	eax, DWORD PTR -48[rbp]
	mov	DWORD PTR -32[rbp], eax
	movzx	eax, WORD PTR -86[rbp]
	movzx	edx, WORD PTR -108[rbp]
	sub	eax, edx
	sub	eax, 1
	mov	edx, 1
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	or	DWORD PTR -32[rbp], eax
	mov	edx, DWORD PTR -40[rbp]
	mov	eax, DWORD PTR -32[rbp]
	add	eax, edx
	and	eax, DWORD PTR -52[rbp]
	mov	DWORD PTR -28[rbp], eax
	mov	edx, DWORD PTR -68[rbp]
	mov	eax, DWORD PTR -60[rbp]
	lea	esi, [rdx+rax]
	mov	edx, DWORD PTR -40[rbp]
	mov	eax, DWORD PTR -32[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -52[rbp]
	add	eax, 1
	and	edx, eax
	movzx	eax, WORD PTR -86[rbp]
	sub	eax, 1
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	add	eax, esi
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	test	rax, rax
	js	.L11
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rax
	jmp	.L12
.L11:
	mov	rdx, rax
	shr	rdx
	and	eax, 1
	or	rdx, rax
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rdx
	addsd	xmm0, xmm0
.L12:
	movsd	xmm1, QWORD PTR .LC0[rip]
	divsd	xmm0, xmm1
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	xmm1, QWORD PTR -8[rbp]
	movsd	xmm0, QWORD PTR .LC1[rip]
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -24[rbp]
	mov	edx, 1
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, eax
	mulsd	xmm0, xmm1
	cvttsd2si	rax, xmm0
	mov	DWORD PTR -20[rbp], eax
	cmp	DWORD PTR -100[rbp], 0
	je	.L13
	cmp	DWORD PTR -104[rbp], 0
	jne	.L14
.L13:
	mov	eax, 1
	jmp	.L15
.L14:
	mov	eax, 0
.L15:
	mov	DWORD PTR -16[rbp], eax
	movzx	eax, BYTE PTR -88[rbp]
	cmp	al, BYTE PTR -87[rbp]
	je	.L16
	mov	eax, DWORD PTR -20[rbp]
	not	eax
	jmp	.L17
.L16:
	mov	eax, DWORD PTR -20[rbp]
.L17:
	mov	DWORD PTR -12[rbp], eax
	mov	eax, 1
	sub	eax, DWORD PTR -16[rbp]
	mov	edx, DWORD PTR -12[rbp]
	imul	eax, edx
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -12[rbp]
.L6:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	LM, .-LM
	.globl	ELM
	.type	ELM, @function
ELM:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 64
	mov	DWORD PTR -52[rbp], edi
	mov	DWORD PTR -56[rbp], esi
	mov	DWORD PTR -60[rbp], edx
	mov	DWORD PTR -32[rbp], 0
	mov	eax, DWORD PTR -52[rbp]
	sar	eax, 14
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -52[rbp]
	cdq
	shr	edx, 18
	add	eax, edx
	and	eax, 16383
	sub	eax, edx
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -44[rbp], eax
	cmp	DWORD PTR -24[rbp], -8192
	jge	.L19
	mov	eax, DWORD PTR -24[rbp]
	add	eax, 16384
	mov	DWORD PTR -44[rbp], eax
.L19:
	cmp	DWORD PTR -24[rbp], 8192
	jle	.L20
	mov	eax, DWORD PTR -24[rbp]
	sub	eax, 16384
	mov	DWORD PTR -44[rbp], eax
.L20:
	mov	eax, DWORD PTR -44[rbp]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -44[rbp]
	shr	eax, 31
	movzx	eax, al
	add	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -56[rbp]
	sar	eax, 14
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -56[rbp]
	cdq
	shr	edx, 18
	add	eax, edx
	and	eax, 16383
	sub	eax, edx
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -12[rbp]
	mov	DWORD PTR -40[rbp], eax
	cmp	DWORD PTR -12[rbp], -8192
	jge	.L21
	mov	eax, DWORD PTR -12[rbp]
	add	eax, 16384
	mov	DWORD PTR -40[rbp], eax
.L21:
	cmp	DWORD PTR -12[rbp], 8192
	jle	.L22
	mov	eax, DWORD PTR -12[rbp]
	sub	eax, 16384
	mov	DWORD PTR -40[rbp], eax
.L22:
	mov	eax, DWORD PTR -40[rbp]
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -40[rbp]
	shr	eax, 31
	movzx	eax, al
	add	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	imul	eax, DWORD PTR -56[rbp]
	mov	DWORD PTR -36[rbp], eax
	cmp	DWORD PTR -36[rbp], 0
	jns	.L23
	mov	eax, DWORD PTR -36[rbp]
	sub	eax, 1
	or	eax, 1
	mov	DWORD PTR -36[rbp], eax
.L23:
	mov	eax, DWORD PTR -36[rbp]
	sal	eax, 14
	add	DWORD PTR -32[rbp], eax
	mov	eax, DWORD PTR -60[rbp]
	movzx	edx, ax
	mov	ecx, DWORD PTR -56[rbp]
	mov	eax, DWORD PTR -44[rbp]
	mov	esi, ecx
	mov	edi, eax
	call	LM
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	add	DWORD PTR -32[rbp], eax
	mov	eax, DWORD PTR -32[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	ELM, .-ELM
	.globl	rel_error
	.type	rel_error, @function
rel_error:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	DWORD PTR -28[rbp], edx
	pxor	xmm1, xmm1
	cvtsi2sd	xmm1, DWORD PTR -20[rbp]
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, DWORD PTR -24[rbp]
	mulsd	xmm0, xmm1
	movsd	QWORD PTR -16[rbp], xmm0
	mov	edx, DWORD PTR -28[rbp]
	mov	ecx, DWORD PTR -24[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	esi, ecx
	mov	edi, eax
	call	ELM
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, eax
	movsd	QWORD PTR -8[rbp], xmm0
	cmp	DWORD PTR -20[rbp], 0
	je	.L26
	cmp	DWORD PTR -24[rbp], 0
	jne	.L27
.L26:
	pxor	xmm0, xmm0
	jmp	.L28
.L27:
	movsd	xmm0, QWORD PTR -16[rbp]
	subsd	xmm0, QWORD PTR -8[rbp]
	movq	xmm1, QWORD PTR .LC3[rip]
	andpd	xmm0, xmm1
	movsd	xmm1, QWORD PTR -16[rbp]
	movq	xmm2, QWORD PTR .LC3[rip]
	andpd	xmm2, xmm1
	movapd	xmm1, xmm0
	divsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	mulsd	xmm0, xmm1
.L28:
	movq	rax, xmm0
	movq	xmm0, rax
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	rel_error, .-rel_error
	.globl	PRE
	.type	PRE, @function
PRE:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	mov	QWORD PTR -16[rbp], rdi
	mov	rax, QWORD PTR -16[rbp]
	mov	rdx, QWORD PTR [rax]
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, QWORD PTR -8[rbp]
	seta	al
	movzx	eax, al
	add	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	mov	QWORD PTR [rax], rdx
	mov	rax, QWORD PTR -16[rbp]
	add	rax, 8
	mov	rcx, QWORD PTR [rax]
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, QWORD PTR -8[rbp]
	seta	al
	movzx	edx, al
	mov	rax, QWORD PTR -16[rbp]
	add	rax, 8
	add	rdx, rcx
	mov	QWORD PTR [rax], rdx
	mov	rax, QWORD PTR -16[rbp]
	add	rax, 16
	mov	rcx, QWORD PTR [rax]
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, QWORD PTR -8[rbp]
	seta	al
	movzx	edx, al
	mov	rax, QWORD PTR -16[rbp]
	add	rax, 16
	add	rdx, rcx
	mov	QWORD PTR [rax], rdx
	mov	rax, QWORD PTR -16[rbp]
	add	rax, 24
	mov	rcx, QWORD PTR [rax]
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, QWORD PTR -8[rbp]
	seta	al
	movzx	edx, al
	mov	rax, QWORD PTR -16[rbp]
	add	rax, 24
	add	rdx, rcx
	mov	QWORD PTR [rax], rdx
	mov	rax, QWORD PTR -16[rbp]
	add	rax, 32
	mov	rcx, QWORD PTR [rax]
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, QWORD PTR -8[rbp]
	seta	al
	movzx	edx, al
	mov	rax, QWORD PTR -16[rbp]
	add	rax, 32
	add	rdx, rcx
	mov	QWORD PTR [rax], rdx
	mov	rax, QWORD PTR -16[rbp]
	add	rax, 40
	mov	rcx, QWORD PTR [rax]
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, QWORD PTR -8[rbp]
	seta	al
	movzx	edx, al
	mov	rax, QWORD PTR -16[rbp]
	add	rax, 40
	add	rdx, rcx
	mov	QWORD PTR [rax], rdx
	mov	rax, QWORD PTR -16[rbp]
	add	rax, 48
	mov	rcx, QWORD PTR [rax]
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, QWORD PTR -8[rbp]
	seta	al
	movzx	edx, al
	mov	rax, QWORD PTR -16[rbp]
	add	rax, 48
	add	rdx, rcx
	mov	QWORD PTR [rax], rdx
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	PRE, .-PRE
	.globl	PRE11
	.type	PRE11, @function
PRE11:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	mov	QWORD PTR -16[rbp], rdi
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, QWORD PTR -8[rbp]
	seta	al
	movzx	eax, al
	add	QWORD PTR -16[rbp], rax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	PRE11, .-PRE11
	.section	.rodata
.LC12:
	.string	"a"
.LC13:
	.string	"./log_MRE.txt"
	.align 8
.LC14:
	.string	"w q MRE MAXRE MAXRE_PROB 2 5 10 15 20 25 11\n"
.LC15:
	.string	"%d %d "
.LC17:
	.string	" %2.4g "
.LC18:
	.string	" %e "
.LC19:
	.string	" %02.4g "
.LC20:
	.string	" \n "
	.text
	.globl	main
	.type	main, @function
main:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 288
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -157[rbp], 84148993
	mov	WORD PTR -153[rbp], 1798
	mov	WORD PTR -160[rbp], 1537
	mov	BYTE PTR -158[rbp], 7
	mov	QWORD PTR -264[rbp], 0
	pxor	xmm0, xmm0
	movsd	QWORD PTR -248[rbp], xmm0
	pxor	xmm0, xmm0
	movsd	QWORD PTR -240[rbp], xmm0
	mov	QWORD PTR -224[rbp], 0
	mov	QWORD PTR -216[rbp], 0
	mov	QWORD PTR -208[rbp], 0
	mov	QWORD PTR -200[rbp], 0
	mov	QWORD PTR -192[rbp], 0
	mov	QWORD PTR -184[rbp], 0
	mov	QWORD PTR -176[rbp], 0
	mov	DWORD PTR -151[rbp], 252314882
	mov	WORD PTR -147[rbp], 6420
	mov	BYTE PTR -145[rbp], 11
	lea	rsi, .LC12[rip]
	lea	rdi, .LC13[rip]
	call	fopen@PLT
	mov	QWORD PTR -232[rbp], rax
	cmp	QWORD PTR -232[rbp], 0
	je	.L32
	lea	rax, -96[rbp]
	lea	rsi, .LC14[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rdx, QWORD PTR -232[rbp]
	lea	rax, -96[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	fputs@PLT
	mov	rax, QWORD PTR -232[rbp]
	mov	rdi, rax
	call	fclose@PLT
.L32:
	mov	DWORD PTR -272[rbp], 0
	jmp	.L33
.L53:
	pxor	xmm0, xmm0
	movsd	QWORD PTR -240[rbp], xmm0
	mov	DWORD PTR -268[rbp], 0
	mov	QWORD PTR -264[rbp], 0
	pxor	xmm0, xmm0
	movsd	QWORD PTR -248[rbp], xmm0
	mov	DWORD PTR -268[rbp], 0
	jmp	.L34
.L35:
	mov	eax, DWORD PTR -268[rbp]
	cdqe
	mov	QWORD PTR -224[rbp+rax*8], 0
	add	DWORD PTR -268[rbp], 1
.L34:
	cmp	DWORD PTR -268[rbp], 6
	jle	.L35
	mov	DWORD PTR -284[rbp], -32768
	jmp	.L36
.L45:
	mov	DWORD PTR -280[rbp], -32768
	jmp	.L37
.L44:
	mov	eax, DWORD PTR -272[rbp]
	cdqe
	movzx	eax, BYTE PTR -157[rbp+rax]
	movsx	edx, al
	mov	ecx, DWORD PTR -280[rbp]
	mov	eax, DWORD PTR -284[rbp]
	mov	esi, ecx
	mov	edi, eax
	call	rel_error
	movq	rax, xmm0
	mov	QWORD PTR -256[rbp], rax
	mov	rax, QWORD PTR -256[rbp]
	lea	rdx, -224[rbp]
	mov	rdi, rdx
	movq	xmm0, rax
	call	PRE
	movsd	xmm1, QWORD PTR -256[rbp]
	movsd	xmm0, QWORD PTR -240[rbp]
	addsd	xmm0, xmm1
	movsd	QWORD PTR -240[rbp], xmm0
	movsd	xmm0, QWORD PTR -248[rbp]
	movsd	xmm1, QWORD PTR -256[rbp]
	comisd	xmm0, xmm1
	jbe	.L58
	movsd	xmm0, QWORD PTR -248[rbp]
	jmp	.L40
.L58:
	movsd	xmm0, QWORD PTR -256[rbp]
.L40:
	movsd	QWORD PTR -248[rbp], xmm0
	movsd	xmm0, QWORD PTR -248[rbp]
	movsd	xmm1, QWORD PTR -256[rbp]
	comisd	xmm0, xmm1
	jbe	.L59
	mov	rax, QWORD PTR -264[rbp]
	lea	rdx, 1[rax]
	mov	QWORD PTR -264[rbp], rdx
	jmp	.L43
.L59:
	mov	eax, 1
.L43:
	mov	QWORD PTR -264[rbp], rax
	mov	eax, DWORD PTR -280[rbp]
	add	eax, 1
	mov	DWORD PTR -280[rbp], eax
.L37:
	mov	eax, DWORD PTR -280[rbp]
	cmp	eax, 32766
	jle	.L44
	mov	eax, DWORD PTR -284[rbp]
	add	eax, 1
	mov	DWORD PTR -284[rbp], eax
.L36:
	mov	eax, DWORD PTR -284[rbp]
	cmp	eax, 32766
	jle	.L45
	lea	rsi, .LC12[rip]
	lea	rdi, .LC13[rip]
	call	fopen@PLT
	mov	QWORD PTR -232[rbp], rax
	cmp	QWORD PTR -232[rbp], 0
	je	.L46
	movabs	rax, 3255307777713450285
	movabs	rdx, 3255307777713450285
	mov	QWORD PTR -144[rbp], rax
	mov	QWORD PTR -136[rbp], rdx
	mov	QWORD PTR -128[rbp], rax
	mov	QWORD PTR -120[rbp], rdx
	mov	DWORD PTR -112[rbp], 537534509
	mov	WORD PTR -108[rbp], 10
	mov	eax, DWORD PTR -276[rbp]
	cdqe
	movzx	eax, BYTE PTR -160[rbp+rax]
	movsx	ecx, al
	mov	eax, DWORD PTR -272[rbp]
	cdqe
	movzx	eax, BYTE PTR -157[rbp+rax]
	movsx	edx, al
	lea	rax, -96[rbp]
	lea	rsi, .LC15[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rdx, QWORD PTR -232[rbp]
	lea	rax, -96[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	fputs@PLT
	movsd	xmm0, QWORD PTR -240[rbp]
	movsd	xmm1, QWORD PTR .LC16[rip]
	divsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC16[rip]
	divsd	xmm0, xmm1
	movq	rdx, xmm0
	lea	rax, -96[rbp]
	movq	xmm0, rdx
	lea	rsi, .LC17[rip]
	mov	rdi, rax
	mov	eax, 1
	call	sprintf@PLT
	mov	rdx, QWORD PTR -232[rbp]
	lea	rax, -96[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	fputs@PLT
	mov	rdx, QWORD PTR -248[rbp]
	lea	rax, -96[rbp]
	movq	xmm0, rdx
	lea	rsi, .LC17[rip]
	mov	rdi, rax
	mov	eax, 1
	call	sprintf@PLT
	mov	rdx, QWORD PTR -232[rbp]
	lea	rax, -96[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	fputs@PLT
	mov	rax, QWORD PTR -264[rbp]
	test	rax, rax
	js	.L47
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rax
	jmp	.L48
.L47:
	mov	rdx, rax
	shr	rdx
	and	eax, 1
	or	rdx, rax
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rdx
	addsd	xmm0, xmm0
.L48:
	movsd	xmm1, QWORD PTR .LC16[rip]
	divsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC16[rip]
	divsd	xmm0, xmm1
	movq	rdx, xmm0
	lea	rax, -96[rbp]
	movq	xmm0, rdx
	lea	rsi, .LC18[rip]
	mov	rdi, rax
	mov	eax, 1
	call	sprintf@PLT
	mov	rdx, QWORD PTR -232[rbp]
	lea	rax, -96[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	fputs@PLT
	mov	BYTE PTR -285[rbp], 0
	jmp	.L49
.L52:
	movsx	eax, BYTE PTR -285[rbp]
	cdqe
	mov	rax, QWORD PTR -224[rbp+rax*8]
	test	rax, rax
	js	.L50
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rax
	jmp	.L51
.L50:
	mov	rdx, rax
	shr	rdx
	and	eax, 1
	or	rdx, rax
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rdx
	addsd	xmm0, xmm0
.L51:
	movsd	xmm1, QWORD PTR .LC16[rip]
	divsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC16[rip]
	divsd	xmm0, xmm1
	movq	rdx, xmm0
	lea	rax, -96[rbp]
	movq	xmm0, rdx
	lea	rsi, .LC19[rip]
	mov	rdi, rax
	mov	eax, 1
	call	sprintf@PLT
	mov	rdx, QWORD PTR -232[rbp]
	lea	rax, -96[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	fputs@PLT
	movzx	eax, BYTE PTR -285[rbp]
	add	eax, 1
	mov	BYTE PTR -285[rbp], al
.L49:
	cmp	BYTE PTR -285[rbp], 6
	jle	.L52
	lea	rax, -96[rbp]
	lea	rsi, .LC20[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rdx, QWORD PTR -232[rbp]
	lea	rax, -96[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	fputs@PLT
	mov	rax, QWORD PTR -232[rbp]
	mov	rdi, rax
	call	fclose@PLT
.L46:
	mov	eax, DWORD PTR -272[rbp]
	add	eax, 1
	mov	DWORD PTR -272[rbp], eax
.L33:
	mov	eax, DWORD PTR -272[rbp]
	test	eax, eax
	jle	.L53
	mov	eax, 0
	mov	rcx, QWORD PTR -8[rbp]
	sub	rcx, QWORD PTR fs:40
	je	.L55
	call	__stack_chk_fail@PLT
.L55:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	main, .-main
	.section	.rodata
	.align 8
.LC0:
	.long	0
	.long	1088421888
	.align 8
.LC1:
	.long	0
	.long	1072693248
	.align 16
.LC3:
	.long	-1
	.long	2147483647
	.long	0
	.long	0
	.align 8
.LC4:
	.long	0
	.long	1079574528
	.align 8
.LC5:
	.long	0
	.long	1073741824
	.align 8
.LC6:
	.long	0
	.long	1075052544
	.align 8
.LC7:
	.long	0
	.long	1076101120
	.align 8
.LC8:
	.long	0
	.long	1076756480
	.align 8
.LC9:
	.long	0
	.long	1077149696
	.align 8
.LC10:
	.long	0
	.long	1077477376
	.align 8
.LC11:
	.long	0
	.long	1076232192
	.align 8
.LC16:
	.long	0
	.long	1089470464
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"217161.c"
	.text
	.align	2
	.global	leadingBitPosition
	.syntax unified
	.arm
	.fpu softvfp
	.type	leadingBitPosition, %function
leadingBitPosition:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	mov	r3, r0
	strh	r3, [fp, #-14]	@ movhi
	ldrh	r3, [fp, #-14]
	clz	r3, r3
	strh	r3, [fp, #-6]	@ movhi
	ldrh	r3, [fp, #-6]	@ movhi
	rsb	r3, r3, #31
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	leadingBitPosition, .-leadingBitPosition
	.global	__aeabi_ui2d
	.global	__aeabi_ddiv
	.global	__aeabi_dadd
	.global	__aeabi_i2d
	.global	__aeabi_dmul
	.global	__aeabi_d2uiz
	.align	2
	.global	LM
	.syntax unified
	.arm
	.fpu softvfp
	.type	LM, %function
LM:
	@ args = 0, pretend = 0, frame = 104
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #104
	str	r0, [fp, #-104]
	str	r1, [fp, #-108]
	mov	r3, r2
	strh	r3, [fp, #-110]	@ movhi
	mov	r3, #16
	strh	r3, [fp, #-98]	@ movhi
	ldr	r3, [fp, #-104]
	cmp	r3, #0
	beq	.L4
	ldr	r3, [fp, #-108]
	cmp	r3, #0
	bne	.L5
.L4:
	mov	r3, #0
	b	.L6
.L5:
	ldr	r3, [fp, #-104]
	cmp	r3, #0
	movle	r3, #1
	movgt	r3, #0
	and	r3, r3, #255
	strb	r3, [fp, #-100]
	ldr	r3, [fp, #-108]
	cmp	r3, #0
	movle	r3, #1
	movgt	r3, #0
	and	r3, r3, #255
	strb	r3, [fp, #-99]
	ldrb	r3, [fp, #-100]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
	ldr	r3, [fp, #-104]
	mvn	r3, r3
	b	.L8
.L7:
	ldr	r3, [fp, #-104]
.L8:
	str	r3, [fp, #-96]
	ldrb	r3, [fp, #-99]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L9
	ldr	r3, [fp, #-108]
	mvn	r3, r3
	b	.L10
.L9:
	ldr	r3, [fp, #-108]
.L10:
	str	r3, [fp, #-92]
	ldr	r3, [fp, #-96]
	str	r3, [fp, #-88]
	ldr	r3, [fp, #-92]
	str	r3, [fp, #-84]
	ldr	r3, [fp, #-88]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	bl	leadingBitPosition
	mov	r3, r0
	str	r3, [fp, #-80]
	ldrh	r2, [fp, #-98]
	ldr	r3, [fp, #-80]
	sub	r3, r2, r3
	sub	r3, r3, #1
	ldr	r2, [fp, #-88]
	lsl	r3, r2, r3
	str	r3, [fp, #-76]
	ldr	r3, [fp, #-84]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	bl	leadingBitPosition
	mov	r3, r0
	str	r3, [fp, #-72]
	ldrh	r2, [fp, #-98]
	ldr	r3, [fp, #-72]
	sub	r3, r2, r3
	sub	r3, r3, #1
	ldr	r2, [fp, #-84]
	lsl	r3, r2, r3
	str	r3, [fp, #-68]
	ldrh	r3, [fp, #-98]
	sub	r3, r3, #1
	mov	r2, #1
	lsl	r3, r2, r3
	sub	r3, r3, #1
	str	r3, [fp, #-64]
	ldrh	r3, [fp, #-98]
	sub	r3, r3, #1
	mov	r2, #1
	lsl	r2, r2, r3
	ldrh	r1, [fp, #-98]
	ldrh	r3, [fp, #-110]
	sub	r3, r1, r3
	mov	r1, #1
	lsl	r3, r1, r3
	sub	r3, r2, r3
	str	r3, [fp, #-60]
	ldr	r2, [fp, #-76]
	ldr	r3, [fp, #-64]
	and	r3, r3, r2
	str	r3, [fp, #-56]
	ldr	r2, [fp, #-76]
	ldr	r3, [fp, #-60]
	and	r3, r3, r2
	str	r3, [fp, #-52]
	ldrh	r2, [fp, #-98]
	ldrh	r3, [fp, #-110]
	sub	r3, r2, r3
	sub	r3, r3, #1
	mov	r2, #1
	lsl	r3, r2, r3
	mov	r2, r3
	ldr	r3, [fp, #-52]
	orr	r3, r3, r2
	str	r3, [fp, #-52]
	ldr	r2, [fp, #-68]
	ldr	r3, [fp, #-64]
	and	r3, r3, r2
	str	r3, [fp, #-48]
	ldr	r2, [fp, #-68]
	ldr	r3, [fp, #-60]
	and	r3, r3, r2
	str	r3, [fp, #-44]
	ldrh	r2, [fp, #-98]
	ldrh	r3, [fp, #-110]
	sub	r3, r2, r3
	sub	r3, r3, #1
	mov	r2, #1
	lsl	r3, r2, r3
	mov	r2, r3
	ldr	r3, [fp, #-44]
	orr	r3, r3, r2
	str	r3, [fp, #-44]
	ldr	r2, [fp, #-52]
	ldr	r3, [fp, #-44]
	add	r3, r2, r3
	ldr	r2, [fp, #-64]
	and	r3, r3, r2
	str	r3, [fp, #-40]
	ldr	r2, [fp, #-80]
	ldr	r3, [fp, #-72]
	add	r2, r2, r3
	ldr	r1, [fp, #-52]
	ldr	r3, [fp, #-44]
	add	r1, r1, r3
	ldr	r3, [fp, #-64]
	add	r3, r3, #1
	and	r1, r1, r3
	ldrh	r3, [fp, #-98]
	sub	r3, r3, #1
	lsr	r3, r1, r3
	add	r3, r2, r3
	str	r3, [fp, #-36]
	ldr	r0, [fp, #-40]
	bl	__aeabi_ui2d
	mov	r2, #0
	ldr	r3, .L16
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	mov	r2, #0
	ldr	r3, .L16+4
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	mov	r2, #1
	ldr	r3, [fp, #-36]
	lsl	r3, r2, r3
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2uiz
	mov	r3, r0
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-104]
	cmp	r3, #0
	beq	.L11
	ldr	r3, [fp, #-108]
	cmp	r3, #0
	bne	.L12
.L11:
	mov	r3, #1
	b	.L13
.L12:
	mov	r3, #0
.L13:
	str	r3, [fp, #-28]
	ldrb	r2, [fp, #-100]	@ zero_extendqisi2
	ldrb	r3, [fp, #-99]	@ zero_extendqisi2
	cmp	r2, r3
	beq	.L14
	ldr	r3, [fp, #-32]
	mvn	r3, r3
	b	.L15
.L14:
	ldr	r3, [fp, #-32]
.L15:
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-28]
	rsb	r2, r3, #1
	ldr	r3, [fp, #-24]
	mul	r3, r2, r3
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-24]
.L6:
	mov	r0, r3
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L17:
	.align	2
.L16:
	.word	1088421888
	.word	1072693248
	.size	LM, .-LM
	.align	2
	.global	ELM
	.syntax unified
	.arm
	.fpu softvfp
	.type	ELM, %function
ELM:
	@ args = 0, pretend = 0, frame = 64
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #64
	str	r0, [fp, #-56]
	str	r1, [fp, #-60]
	str	r2, [fp, #-64]
	mov	r3, #0
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-56]
	asr	r3, r3, #14
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-56]
	rsbs	r2, r3, #0
	lsl	r3, r3, #18
	lsr	r3, r3, #18
	lsl	r2, r2, #18
	lsr	r2, r2, #18
	rsbpl	r3, r2, #0
	str	r3, [fp, #-28]
	ldr	r3, [fp, #-28]
	str	r3, [fp, #-48]
	ldr	r3, [fp, #-28]
	cmn	r3, #8192
	bge	.L19
	ldr	r3, [fp, #-28]
	add	r3, r3, #16384
	str	r3, [fp, #-48]
.L19:
	ldr	r3, [fp, #-28]
	cmp	r3, #8192
	ble	.L20
	ldr	r3, [fp, #-28]
	sub	r3, r3, #16384
	str	r3, [fp, #-48]
.L20:
	ldr	r3, [fp, #-48]
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-48]
	lsr	r3, r3, #31
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, [fp, #-32]
	add	r3, r3, r2
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-60]
	asr	r3, r3, #14
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-60]
	rsbs	r2, r3, #0
	lsl	r3, r3, #18
	lsr	r3, r3, #18
	lsl	r2, r2, #18
	lsr	r2, r2, #18
	rsbpl	r3, r2, #0
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-16]
	str	r3, [fp, #-44]
	ldr	r3, [fp, #-16]
	cmn	r3, #8192
	bge	.L21
	ldr	r3, [fp, #-16]
	add	r3, r3, #16384
	str	r3, [fp, #-44]
.L21:
	ldr	r3, [fp, #-16]
	cmp	r3, #8192
	ble	.L22
	ldr	r3, [fp, #-16]
	sub	r3, r3, #16384
	str	r3, [fp, #-44]
.L22:
	ldr	r3, [fp, #-44]
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-44]
	lsr	r3, r3, #31
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, [fp, #-20]
	add	r3, r3, r2
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-32]
	ldr	r2, [fp, #-60]
	mul	r3, r2, r3
	str	r3, [fp, #-40]
	ldr	r3, [fp, #-40]
	cmp	r3, #0
	bge	.L23
	ldr	r3, [fp, #-40]
	sub	r3, r3, #1
	orr	r3, r3, #1
	str	r3, [fp, #-40]
.L23:
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #14
	ldr	r2, [fp, #-36]
	add	r3, r2, r3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-64]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r2, r3
	ldr	r1, [fp, #-60]
	ldr	r0, [fp, #-48]
	bl	LM
	str	r0, [fp, #-8]
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-36]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	ELM, .-ELM
	.global	__aeabi_dsub
	.align	2
	.global	rel_error
	.syntax unified
	.arm
	.fpu softvfp
	.type	rel_error, %function
rel_error:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #32
	str	r0, [fp, #-48]
	str	r1, [fp, #-52]
	str	r2, [fp, #-56]
	ldr	r0, [fp, #-48]
	bl	__aeabi_i2d
	mov	r8, r0
	mov	r9, r1
	ldr	r0, [fp, #-52]
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	ldr	r2, [fp, #-56]
	ldr	r1, [fp, #-52]
	ldr	r0, [fp, #-48]
	bl	ELM
	mov	r3, r0
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-48]
	cmp	r3, #0
	beq	.L26
	ldr	r3, [fp, #-52]
	cmp	r3, #0
	bne	.L27
.L26:
	mov	r2, #0
	mov	r3, #0
	b	.L28
.L27:
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r6, r2
	bic	r7, r3, #-2147483648
	ldr	r4, [fp, #-44]
	ldr	r3, [fp, #-40]
	bic	r5, r3, #-2147483648
	mov	r2, r4
	mov	r3, r5
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L29
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
.L28:
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L30:
	.align	2
.L29:
	.word	1079574528
	.size	rel_error, .-rel_error
	.global	__aeabi_dcmplt
	.align	2
	.global	PRE
	.syntax unified
	.arm
	.fpu softvfp
	.type	PRE, %function
PRE:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #16
	str	r0, [fp, #-20]
	str	r1, [fp, #-16]
	str	r2, [fp, #-24]
	ldr	r3, [fp, #-24]
	ldr	r4, [r3]
	mov	r3, #1
	mov	r5, r3
	mov	r2, #0
	mov	r3, #1073741824
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	bne	.L32
	mov	r3, #0
	mov	r5, r3
.L32:
	and	r3, r5, #255
	add	r2, r4, r3
	ldr	r3, [fp, #-24]
	str	r2, [r3]
	ldr	r3, [fp, #-24]
	add	r3, r3, #4
	ldr	r4, [r3]
	mov	r3, #1
	mov	r5, r3
	mov	r2, #0
	ldr	r3, .L39
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	bne	.L33
	mov	r3, #0
	mov	r5, r3
.L33:
	and	r3, r5, #255
	mov	r2, r3
	ldr	r3, [fp, #-24]
	add	r3, r3, #4
	add	r2, r4, r2
	str	r2, [r3]
	ldr	r3, [fp, #-24]
	add	r3, r3, #8
	ldr	r4, [r3]
	mov	r3, #1
	mov	r5, r3
	mov	r2, #0
	ldr	r3, .L39+4
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	bne	.L34
	mov	r3, #0
	mov	r5, r3
.L34:
	and	r3, r5, #255
	mov	r2, r3
	ldr	r3, [fp, #-24]
	add	r3, r3, #8
	add	r2, r4, r2
	str	r2, [r3]
	ldr	r3, [fp, #-24]
	add	r3, r3, #12
	ldr	r4, [r3]
	mov	r3, #1
	mov	r5, r3
	mov	r2, #0
	ldr	r3, .L39+8
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	bne	.L35
	mov	r3, #0
	mov	r5, r3
.L35:
	and	r3, r5, #255
	mov	r2, r3
	ldr	r3, [fp, #-24]
	add	r3, r3, #12
	add	r2, r4, r2
	str	r2, [r3]
	ldr	r3, [fp, #-24]
	add	r3, r3, #16
	ldr	r4, [r3]
	mov	r3, #1
	mov	r5, r3
	mov	r2, #0
	ldr	r3, .L39+12
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	bne	.L36
	mov	r3, #0
	mov	r5, r3
.L36:
	and	r3, r5, #255
	mov	r2, r3
	ldr	r3, [fp, #-24]
	add	r3, r3, #16
	add	r2, r4, r2
	str	r2, [r3]
	ldr	r3, [fp, #-24]
	add	r3, r3, #20
	ldr	r4, [r3]
	mov	r3, #1
	mov	r5, r3
	mov	r2, #0
	ldr	r3, .L39+16
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	bne	.L37
	mov	r3, #0
	mov	r5, r3
.L37:
	and	r3, r5, #255
	mov	r2, r3
	ldr	r3, [fp, #-24]
	add	r3, r3, #20
	add	r2, r4, r2
	str	r2, [r3]
	ldr	r3, [fp, #-24]
	add	r3, r3, #24
	ldr	r4, [r3]
	mov	r3, #1
	mov	r5, r3
	mov	r2, #0
	ldr	r3, .L39+20
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	bne	.L38
	mov	r3, #0
	mov	r5, r3
.L38:
	and	r3, r5, #255
	mov	r2, r3
	ldr	r3, [fp, #-24]
	add	r3, r3, #24
	add	r2, r4, r2
	str	r2, [r3]
	nop
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L40:
	.align	2
.L39:
	.word	1075052544
	.word	1076101120
	.word	1076756480
	.word	1077149696
	.word	1077477376
	.word	1076232192
	.size	PRE, .-PRE
	.align	2
	.global	PRE11
	.syntax unified
	.arm
	.fpu softvfp
	.type	PRE11, %function
PRE11:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-20]
	str	r1, [fp, #-16]
	str	r2, [fp, #-24]
	mov	r3, #1
	mov	r4, r3
	mov	r2, #0
	ldr	r3, .L43
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	bne	.L42
	mov	r3, #0
	mov	r4, r3
.L42:
	and	r3, r4, #255
	mov	r2, r3
	ldr	r3, [fp, #-24]
	add	r3, r3, r2
	str	r3, [fp, #-24]
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L44:
	.align	2
.L43:
	.word	1076232192
	.size	PRE11, .-PRE11
	.section	.rodata
	.align	2
.LC3:
	.ascii	"a\000"
	.align	2
.LC4:
	.ascii	"./log_MRE.txt\000"
	.align	2
.LC5:
	.ascii	"w q MRE MAXRE MAXRE_PROB 2 5 10 15 20 25 11\012\000"
	.global	__aeabi_dcmpgt
	.align	2
.LC7:
	.ascii	"%d %d \000"
	.align	2
.LC8:
	.ascii	" %2.4g \000"
	.align	2
.LC9:
	.ascii	" %e \000"
	.align	2
.LC10:
	.ascii	" %02.4g \000"
	.align	2
.LC11:
	.ascii	" \012 \000"
	.align	2
.LC0:
	.ascii	"\001\003\004\005\006\007"
	.align	2
.LC1:
	.ascii	"\001\006\007"
	.align	2
.LC2:
	.ascii	"\002\005\012\017\024\031\013"
	.align	2
.LC6:
	.ascii	"--------------------------------- \012 \012\000"
	.align	2
.LC12:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 232
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #232
	ldr	r3, .L70
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	ldr	r2, .L70+4
	sub	r3, fp, #144
	ldm	r2, {r0, r1}
	str	r0, [r3]
	add	r3, r3, #4
	strh	r1, [r3]	@ movhi
	ldr	r2, .L70+8
	sub	r3, fp, #148
	ldr	r2, [r2]
	strh	r2, [r3]	@ movhi
	add	r3, r3, #2
	lsr	r2, r2, #16
	strb	r2, [r3]
	mov	r3, #0
	str	r3, [fp, #-216]
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-196]
	str	r3, [fp, #-192]
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-188]
	str	r3, [fp, #-184]
	sub	r3, fp, #176
	mov	r2, #0
	str	r2, [r3]
	str	r2, [r3, #4]
	str	r2, [r3, #8]
	str	r2, [r3, #12]
	str	r2, [r3, #16]
	str	r2, [r3, #20]
	str	r2, [r3, #24]
	ldr	r2, .L70+12
	sub	r3, fp, #136
	ldm	r2, {r0, r1}
	str	r0, [r3]
	add	r3, r3, #4
	strh	r1, [r3]	@ movhi
	add	r3, r3, #2
	lsr	r2, r1, #16
	strb	r2, [r3]
	ldr	r1, .L70+16
	ldr	r0, .L70+20
	bl	fopen
	str	r0, [fp, #-208]
	ldr	r3, [fp, #-208]
	cmp	r3, #0
	beq	.L46
	sub	r3, fp, #88
	ldr	r1, .L70+24
	mov	r0, r3
	bl	sprintf
	sub	r3, fp, #88
	ldr	r1, [fp, #-208]
	mov	r0, r3
	bl	fputs
	ldr	r0, [fp, #-208]
	bl	fclose
.L46:
	mov	r3, #0
	str	r3, [fp, #-220]
	b	.L47
.L63:
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-188]
	str	r3, [fp, #-184]
	mov	r3, #0
	str	r3, [fp, #-212]
	mov	r3, #0
	str	r3, [fp, #-216]
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-196]
	str	r3, [fp, #-192]
	mov	r3, #0
	str	r3, [fp, #-212]
	b	.L48
.L49:
	ldr	r3, [fp, #-212]
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r3, r2, r3
	mov	r2, #0
	str	r2, [r3, #-172]
	ldr	r3, [fp, #-212]
	add	r3, r3, #1
	str	r3, [fp, #-212]
.L48:
	ldr	r3, [fp, #-212]
	cmp	r3, #6
	ble	.L49
	ldr	r3, .L70+28
	str	r3, [fp, #-232]
	b	.L50
.L59:
	ldr	r3, .L70+28
	str	r3, [fp, #-228]
	b	.L51
.L58:
	ldr	r0, [fp, #-232]
	ldr	r1, [fp, #-228]
	ldr	r3, [fp, #-220]
	sub	r2, fp, #4
	add	r3, r2, r3
	ldrb	r3, [r3, #-140]
	and	r3, r3, #255
	mov	r2, r3
	bl	rel_error
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-204]
	str	r3, [fp, #-200]
	sub	r1, fp, #204
	ldmia	r1, {r0-r1}
	sub	r3, fp, #176
	mov	r2, r3
	bl	PRE
	sub	r1, fp, #204
	ldmia	r1, {r0-r1}
	sub	r3, fp, #188
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-188]
	str	r3, [fp, #-184]
	sub	r1, fp, #196
	ldmia	r1, {r0-r1}
	sub	r3, fp, #204
	ldmia	r3, {r2-r3}
	bl	__aeabi_dcmpgt
	mov	r3, r0
	cmp	r3, #0
	beq	.L68
	sub	r3, fp, #196
	ldmia	r3, {r2-r3}
	b	.L54
.L68:
	sub	r3, fp, #204
	ldmia	r3, {r2-r3}
.L54:
	str	r2, [fp, #-196]
	str	r3, [fp, #-192]
	sub	r1, fp, #196
	ldmia	r1, {r0-r1}
	sub	r3, fp, #204
	ldmia	r3, {r2-r3}
	bl	__aeabi_dcmpgt
	mov	r3, r0
	cmp	r3, #0
	beq	.L69
	ldr	r3, [fp, #-216]
	add	r2, r3, #1
	str	r2, [fp, #-216]
	b	.L57
.L69:
	mov	r3, #1
.L57:
	str	r3, [fp, #-216]
	ldr	r3, [fp, #-228]
	add	r3, r3, #1
	str	r3, [fp, #-228]
.L51:
	ldr	r3, [fp, #-228]
	ldr	r2, .L70+32
	cmp	r3, r2
	ble	.L58
	ldr	r3, [fp, #-232]
	add	r3, r3, #1
	str	r3, [fp, #-232]
.L50:
	ldr	r3, [fp, #-232]
	ldr	r2, .L70+32
	cmp	r3, r2
	ble	.L59
	ldr	r1, .L70+16
	ldr	r0, .L70+20
	bl	fopen
	str	r0, [fp, #-208]
	ldr	r3, [fp, #-208]
	cmp	r3, #0
	beq	.L60
	ldr	r3, .L70+36
	sub	ip, fp, #128
	mov	lr, r3
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	str	r0, [ip]
	add	ip, ip, #4
	strh	r1, [ip]	@ movhi
	ldr	r3, [fp, #-220]
	sub	r2, fp, #4
	add	r3, r2, r3
	ldrb	r3, [r3, #-140]
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, [fp, #-224]
	sub	r1, fp, #4
	add	r3, r1, r3
	ldrb	r3, [r3, #-144]
	and	r3, r3, #255
	sub	r0, fp, #88
	ldr	r1, .L70+40
	bl	sprintf
	sub	r3, fp, #88
	ldr	r1, [fp, #-208]
	mov	r0, r3
	bl	fputs
	sub	r1, fp, #188
	ldmia	r1, {r0-r1}
	mov	r2, #0
	ldr	r3, .L70+44
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L70+44
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	sub	r0, fp, #88
	ldr	r1, .L70+48
	bl	sprintf
	sub	r3, fp, #88
	ldr	r1, [fp, #-208]
	mov	r0, r3
	bl	fputs
	sub	r3, fp, #196
	ldmia	r3, {r2-r3}
	sub	r0, fp, #88
	ldr	r1, .L70+48
	bl	sprintf
	sub	r3, fp, #88
	ldr	r1, [fp, #-208]
	mov	r0, r3
	bl	fputs
	ldr	r3, [fp, #-216]
	mov	r0, r3
	bl	__aeabi_ui2d
	mov	r2, #0
	ldr	r3, .L70+44
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L70+44
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	sub	r0, fp, #88
	ldr	r1, .L70+52
	bl	sprintf
	sub	r3, fp, #88
	ldr	r1, [fp, #-208]
	mov	r0, r3
	bl	fputs
	mov	r3, #0
	strb	r3, [fp, #-233]
	b	.L61
.L62:
	ldrb	r3, [fp, #-233]	@ zero_extendqisi2
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r3, r2, r3
	ldr	r3, [r3, #-172]
	mov	r0, r3
	bl	__aeabi_ui2d
	mov	r2, #0
	ldr	r3, .L70+44
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L70+44
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	sub	r0, fp, #88
	ldr	r1, .L70+56
	bl	sprintf
	sub	r3, fp, #88
	ldr	r1, [fp, #-208]
	mov	r0, r3
	bl	fputs
	ldrb	r3, [fp, #-233]	@ zero_extendqisi2
	add	r3, r3, #1
	strb	r3, [fp, #-233]
.L61:
	ldrb	r3, [fp, #-233]	@ zero_extendqisi2
	cmp	r3, #6
	bls	.L62
	sub	r3, fp, #88
	ldr	r1, .L70+60
	mov	r0, r3
	bl	sprintf
	sub	r3, fp, #88
	ldr	r1, [fp, #-208]
	mov	r0, r3
	bl	fputs
	ldr	r0, [fp, #-208]
	bl	fclose
.L60:
	ldr	r3, [fp, #-220]
	add	r3, r3, #1
	str	r3, [fp, #-220]
.L47:
	ldr	r3, [fp, #-220]
	cmp	r3, #0
	ble	.L63
	mov	r3, #0
	ldr	r2, .L70
	ldr	r1, [r2]
	ldr	r2, [fp, #-8]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L65
	bl	__stack_chk_fail
.L65:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L71:
	.align	2
.L70:
	.word	.LC12
	.word	.LC0
	.word	.LC1
	.word	.LC2
	.word	.LC3
	.word	.LC4
	.word	.LC5
	.word	-32768
	.word	32766
	.word	.LC6
	.word	.LC7
	.word	1089470464
	.word	.LC8
	.word	.LC9
	.word	.LC10
	.word	.LC11
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
