	.file	"487645.c"
	.intel_syntax noprefix
	.text
	.globl	__VERIFIER_nondet_bool
	.type	__VERIFIER_nondet_bool, @function
__VERIFIER_nondet_bool:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	__VERIFIER_nondet_int@PLT
	test	eax, eax
	setne	al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	__VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
	.globl	p14_l3
	.bss
	.type	p14_l3, @object
	.size	p14_l3, 1
p14_l3:
	.zero	1
	.globl	_x_p14_l3
	.type	_x_p14_l3, @object
	.size	_x_p14_l3, 1
_x_p14_l3:
	.zero	1
	.globl	p12_l3
	.type	p12_l3, @object
	.size	p12_l3, 1
p12_l3:
	.zero	1
	.globl	_x_p12_l3
	.type	_x_p12_l3, @object
	.size	_x_p12_l3, 1
_x_p12_l3:
	.zero	1
	.globl	p12_l2
	.type	p12_l2, @object
	.size	p12_l2, 1
p12_l2:
	.zero	1
	.globl	_x_p12_l2
	.type	_x_p12_l2, @object
	.size	_x_p12_l2, 1
_x_p12_l2:
	.zero	1
	.globl	p12_l1
	.type	p12_l1, @object
	.size	p12_l1, 1
p12_l1:
	.zero	1
	.globl	_x_p12_l1
	.type	_x_p12_l1, @object
	.size	_x_p12_l1, 1
_x_p12_l1:
	.zero	1
	.globl	p12_l0
	.type	p12_l0, @object
	.size	p12_l0, 1
p12_l0:
	.zero	1
	.globl	_x_p12_l0
	.type	_x_p12_l0, @object
	.size	_x_p12_l0, 1
_x_p12_l0:
	.zero	1
	.globl	p12_evt
	.type	p12_evt, @object
	.size	p12_evt, 1
p12_evt:
	.zero	1
	.globl	_x_p12_evt
	.type	_x_p12_evt, @object
	.size	_x_p12_evt, 1
_x_p12_evt:
	.zero	1
	.globl	p12_c
	.align 4
	.type	p12_c, @object
	.size	p12_c, 4
p12_c:
	.zero	4
	.globl	_x_p12_c
	.align 4
	.type	_x_p12_c, @object
	.size	_x_p12_c, 4
_x_p12_c:
	.zero	4
	.globl	_diverge_delta
	.align 4
	.type	_diverge_delta, @object
	.size	_diverge_delta, 4
_diverge_delta:
	.zero	4
	.globl	_x__diverge_delta
	.align 4
	.type	_x__diverge_delta, @object
	.size	_x__diverge_delta, 4
_x__diverge_delta:
	.zero	4
	.globl	p10_l3
	.type	p10_l3, @object
	.size	p10_l3, 1
p10_l3:
	.zero	1
	.globl	_x_p10_l3
	.type	_x_p10_l3, @object
	.size	_x_p10_l3, 1
_x_p10_l3:
	.zero	1
	.globl	p10_l2
	.type	p10_l2, @object
	.size	p10_l2, 1
p10_l2:
	.zero	1
	.globl	_x_p10_l2
	.type	_x_p10_l2, @object
	.size	_x_p10_l2, 1
_x_p10_l2:
	.zero	1
	.globl	p10_l1
	.type	p10_l1, @object
	.size	p10_l1, 1
p10_l1:
	.zero	1
	.globl	_x_p10_l1
	.type	_x_p10_l1, @object
	.size	_x_p10_l1, 1
_x_p10_l1:
	.zero	1
	.globl	p10_l0
	.type	p10_l0, @object
	.size	p10_l0, 1
p10_l0:
	.zero	1
	.globl	_x_p10_l0
	.type	_x_p10_l0, @object
	.size	_x_p10_l0, 1
_x_p10_l0:
	.zero	1
	.globl	p10_evt
	.type	p10_evt, @object
	.size	p10_evt, 1
p10_evt:
	.zero	1
	.globl	_x_p10_evt
	.type	_x_p10_evt, @object
	.size	_x_p10_evt, 1
_x_p10_evt:
	.zero	1
	.globl	p10_c
	.align 4
	.type	p10_c, @object
	.size	p10_c, 4
p10_c:
	.zero	4
	.globl	_x_p10_c
	.align 4
	.type	_x_p10_c, @object
	.size	_x_p10_c, 4
_x_p10_c:
	.zero	4
	.globl	p3_l3
	.type	p3_l3, @object
	.size	p3_l3, 1
p3_l3:
	.zero	1
	.globl	_x_p3_l3
	.type	_x_p3_l3, @object
	.size	_x_p3_l3, 1
_x_p3_l3:
	.zero	1
	.globl	p3_evt
	.type	p3_evt, @object
	.size	p3_evt, 1
p3_evt:
	.zero	1
	.globl	_x_p3_evt
	.type	_x_p3_evt, @object
	.size	_x_p3_evt, 1
_x_p3_evt:
	.zero	1
	.globl	p0_l2
	.type	p0_l2, @object
	.size	p0_l2, 1
p0_l2:
	.zero	1
	.globl	_x_p0_l2
	.type	_x_p0_l2, @object
	.size	_x_p0_l2, 1
_x_p0_l2:
	.zero	1
	.globl	p14_l2
	.type	p14_l2, @object
	.size	p14_l2, 1
p14_l2:
	.zero	1
	.globl	_x_p14_l2
	.type	_x_p14_l2, @object
	.size	_x_p14_l2, 1
_x_p14_l2:
	.zero	1
	.globl	p8_l3
	.type	p8_l3, @object
	.size	p8_l3, 1
p8_l3:
	.zero	1
	.globl	_x_p8_l3
	.type	_x_p8_l3, @object
	.size	_x_p8_l3, 1
_x_p8_l3:
	.zero	1
	.globl	p0_l1
	.type	p0_l1, @object
	.size	p0_l1, 1
p0_l1:
	.zero	1
	.globl	_x_p0_l1
	.type	_x_p0_l1, @object
	.size	_x_p0_l1, 1
_x_p0_l1:
	.zero	1
	.globl	p2_l3
	.type	p2_l3, @object
	.size	p2_l3, 1
p2_l3:
	.zero	1
	.globl	_x_p2_l3
	.type	_x_p2_l3, @object
	.size	_x_p2_l3, 1
_x_p2_l3:
	.zero	1
	.globl	p2_evt
	.type	p2_evt, @object
	.size	p2_evt, 1
p2_evt:
	.zero	1
	.globl	_x_p2_evt
	.type	_x_p2_evt, @object
	.size	_x_p2_evt, 1
_x_p2_evt:
	.zero	1
	.globl	p14_evt
	.type	p14_evt, @object
	.size	p14_evt, 1
p14_evt:
	.zero	1
	.globl	_x_p14_evt
	.type	_x_p14_evt, @object
	.size	_x_p14_evt, 1
_x_p14_evt:
	.zero	1
	.globl	delta
	.align 4
	.type	delta, @object
	.size	delta, 4
delta:
	.zero	4
	.globl	_x_delta
	.align 4
	.type	_x_delta, @object
	.size	_x_delta, 4
_x_delta:
	.zero	4
	.globl	v1
	.align 4
	.type	v1, @object
	.size	v1, 4
v1:
	.zero	4
	.globl	_x_v1
	.align 4
	.type	_x_v1, @object
	.size	_x_v1, 4
_x_v1:
	.zero	4
	.globl	v2
	.type	v2, @object
	.size	v2, 1
v2:
	.zero	1
	.globl	_x_v2
	.type	_x_v2, @object
	.size	_x_v2, 1
_x_v2:
	.zero	1
	.globl	p8_c
	.align 4
	.type	p8_c, @object
	.size	p8_c, 4
p8_c:
	.zero	4
	.globl	_x_p8_c
	.align 4
	.type	_x_p8_c, @object
	.size	_x_p8_c, 4
_x_p8_c:
	.zero	4
	.globl	p0_l3
	.type	p0_l3, @object
	.size	p0_l3, 1
p0_l3:
	.zero	1
	.globl	_x_p0_l3
	.type	_x_p0_l3, @object
	.size	_x_p0_l3, 1
_x_p0_l3:
	.zero	1
	.globl	p14_c
	.align 4
	.type	p14_c, @object
	.size	p14_c, 4
p14_c:
	.zero	4
	.globl	_x_p14_c
	.align 4
	.type	_x_p14_c, @object
	.size	_x_p14_c, 4
_x_p14_c:
	.zero	4
	.globl	p8_evt
	.type	p8_evt, @object
	.size	p8_evt, 1
p8_evt:
	.zero	1
	.globl	_x_p8_evt
	.type	_x_p8_evt, @object
	.size	_x_p8_evt, 1
_x_p8_evt:
	.zero	1
	.globl	p14_l1
	.type	p14_l1, @object
	.size	p14_l1, 1
p14_l1:
	.zero	1
	.globl	_x_p14_l1
	.type	_x_p14_l1, @object
	.size	_x_p14_l1, 1
_x_p14_l1:
	.zero	1
	.globl	p8_l2
	.type	p8_l2, @object
	.size	p8_l2, 1
p8_l2:
	.zero	1
	.globl	_x_p8_l2
	.type	_x_p8_l2, @object
	.size	_x_p8_l2, 1
_x_p8_l2:
	.zero	1
	.globl	p13_evt
	.type	p13_evt, @object
	.size	p13_evt, 1
p13_evt:
	.zero	1
	.globl	_x_p13_evt
	.type	_x_p13_evt, @object
	.size	_x_p13_evt, 1
_x_p13_evt:
	.zero	1
	.globl	p4_evt
	.type	p4_evt, @object
	.size	p4_evt, 1
p4_evt:
	.zero	1
	.globl	_x_p4_evt
	.type	_x_p4_evt, @object
	.size	_x_p4_evt, 1
_x_p4_evt:
	.zero	1
	.globl	p1_c
	.align 4
	.type	p1_c, @object
	.size	p1_c, 4
p1_c:
	.zero	4
	.globl	_x_p1_c
	.align 4
	.type	_x_p1_c, @object
	.size	_x_p1_c, 4
_x_p1_c:
	.zero	4
	.globl	p9_l3
	.type	p9_l3, @object
	.size	p9_l3, 1
p9_l3:
	.zero	1
	.globl	_x_p9_l3
	.type	_x_p9_l3, @object
	.size	_x_p9_l3, 1
_x_p9_l3:
	.zero	1
	.globl	p3_l2
	.type	p3_l2, @object
	.size	p3_l2, 1
p3_l2:
	.zero	1
	.globl	_x_p3_l2
	.type	_x_p3_l2, @object
	.size	_x_p3_l2, 1
_x_p3_l2:
	.zero	1
	.globl	p6_l3
	.type	p6_l3, @object
	.size	p6_l3, 1
p6_l3:
	.zero	1
	.globl	_x_p6_l3
	.type	_x_p6_l3, @object
	.size	_x_p6_l3, 1
_x_p6_l3:
	.zero	1
	.globl	p1_l3
	.type	p1_l3, @object
	.size	p1_l3, 1
p1_l3:
	.zero	1
	.globl	_x_p1_l3
	.type	_x_p1_l3, @object
	.size	_x_p1_l3, 1
_x_p1_l3:
	.zero	1
	.globl	p0_l0
	.type	p0_l0, @object
	.size	p0_l0, 1
p0_l0:
	.zero	1
	.globl	_x_p0_l0
	.type	_x_p0_l0, @object
	.size	_x_p0_l0, 1
_x_p0_l0:
	.zero	1
	.globl	p14_l0
	.type	p14_l0, @object
	.size	p14_l0, 1
p14_l0:
	.zero	1
	.globl	_x_p14_l0
	.type	_x_p14_l0, @object
	.size	_x_p14_l0, 1
_x_p14_l0:
	.zero	1
	.globl	p8_l1
	.type	p8_l1, @object
	.size	p8_l1, 1
p8_l1:
	.zero	1
	.globl	_x_p8_l1
	.type	_x_p8_l1, @object
	.size	_x_p8_l1, 1
_x_p8_l1:
	.zero	1
	.globl	p1_evt
	.type	p1_evt, @object
	.size	p1_evt, 1
p1_evt:
	.zero	1
	.globl	_x_p1_evt
	.type	_x_p1_evt, @object
	.size	_x_p1_evt, 1
_x_p1_evt:
	.zero	1
	.globl	p13_l2
	.type	p13_l2, @object
	.size	p13_l2, 1
p13_l2:
	.zero	1
	.globl	_x_p13_l2
	.type	_x_p13_l2, @object
	.size	_x_p13_l2, 1
_x_p13_l2:
	.zero	1
	.globl	p1_l1
	.type	p1_l1, @object
	.size	p1_l1, 1
p1_l1:
	.zero	1
	.globl	_x_p1_l1
	.type	_x_p1_l1, @object
	.size	_x_p1_l1, 1
_x_p1_l1:
	.zero	1
	.globl	p7_l3
	.type	p7_l3, @object
	.size	p7_l3, 1
p7_l3:
	.zero	1
	.globl	_x_p7_l3
	.type	_x_p7_l3, @object
	.size	_x_p7_l3, 1
_x_p7_l3:
	.zero	1
	.globl	p4_l2
	.type	p4_l2, @object
	.size	p4_l2, 1
p4_l2:
	.zero	1
	.globl	_x_p4_l2
	.type	_x_p4_l2, @object
	.size	_x_p4_l2, 1
_x_p4_l2:
	.zero	1
	.globl	p13_l3
	.type	p13_l3, @object
	.size	p13_l3, 1
p13_l3:
	.zero	1
	.globl	_x_p13_l3
	.type	_x_p13_l3, @object
	.size	_x_p13_l3, 1
_x_p13_l3:
	.zero	1
	.globl	p1_l2
	.type	p1_l2, @object
	.size	p1_l2, 1
p1_l2:
	.zero	1
	.globl	_x_p1_l2
	.type	_x_p1_l2, @object
	.size	_x_p1_l2, 1
_x_p1_l2:
	.zero	1
	.globl	p4_l3
	.type	p4_l3, @object
	.size	p4_l3, 1
p4_l3:
	.zero	1
	.globl	_x_p4_l3
	.type	_x_p4_l3, @object
	.size	_x_p4_l3, 1
_x_p4_l3:
	.zero	1
	.globl	p11_c
	.align 4
	.type	p11_c, @object
	.size	p11_c, 4
p11_c:
	.zero	4
	.globl	_x_p11_c
	.align 4
	.type	_x_p11_c, @object
	.size	_x_p11_c, 4
_x_p11_c:
	.zero	4
	.globl	p5_c
	.align 4
	.type	p5_c, @object
	.size	p5_c, 4
p5_c:
	.zero	4
	.globl	_x_p5_c
	.align 4
	.type	_x_p5_c, @object
	.size	_x_p5_c, 4
_x_p5_c:
	.zero	4
	.globl	p11_evt
	.type	p11_evt, @object
	.size	p11_evt, 1
p11_evt:
	.zero	1
	.globl	_x_p11_evt
	.type	_x_p11_evt, @object
	.size	_x_p11_evt, 1
_x_p11_evt:
	.zero	1
	.globl	p2_c
	.align 4
	.type	p2_c, @object
	.size	p2_c, 4
p2_c:
	.zero	4
	.globl	_x_p2_c
	.align 4
	.type	_x_p2_c, @object
	.size	_x_p2_c, 4
_x_p2_c:
	.zero	4
	.globl	p5_evt
	.type	p5_evt, @object
	.size	p5_evt, 1
p5_evt:
	.zero	1
	.globl	_x_p5_evt
	.type	_x_p5_evt, @object
	.size	_x_p5_evt, 1
_x_p5_evt:
	.zero	1
	.globl	p11_l0
	.type	p11_l0, @object
	.size	p11_l0, 1
p11_l0:
	.zero	1
	.globl	_x_p11_l0
	.type	_x_p11_l0, @object
	.size	_x_p11_l0, 1
_x_p11_l0:
	.zero	1
	.globl	p0_c
	.align 4
	.type	p0_c, @object
	.size	p0_c, 4
p0_c:
	.zero	4
	.globl	_x_p0_c
	.align 4
	.type	_x_p0_c, @object
	.size	_x_p0_c, 4
_x_p0_c:
	.zero	4
	.globl	p5_l0
	.type	p5_l0, @object
	.size	p5_l0, 1
p5_l0:
	.zero	1
	.globl	_x_p5_l0
	.type	_x_p5_l0, @object
	.size	_x_p5_l0, 1
_x_p5_l0:
	.zero	1
	.globl	p11_l1
	.type	p11_l1, @object
	.size	p11_l1, 1
p11_l1:
	.zero	1
	.globl	_x_p11_l1
	.type	_x_p11_l1, @object
	.size	_x_p11_l1, 1
_x_p11_l1:
	.zero	1
	.globl	p2_l0
	.type	p2_l0, @object
	.size	p2_l0, 1
p2_l0:
	.zero	1
	.globl	_x_p2_l0
	.type	_x_p2_l0, @object
	.size	_x_p2_l0, 1
_x_p2_l0:
	.zero	1
	.globl	p0_evt
	.type	p0_evt, @object
	.size	p0_evt, 1
p0_evt:
	.zero	1
	.globl	_x_p0_evt
	.type	_x_p0_evt, @object
	.size	_x_p0_evt, 1
_x_p0_evt:
	.zero	1
	.globl	p5_l1
	.type	p5_l1, @object
	.size	p5_l1, 1
p5_l1:
	.zero	1
	.globl	_x_p5_l1
	.type	_x_p5_l1, @object
	.size	_x_p5_l1, 1
_x_p5_l1:
	.zero	1
	.globl	p11_l2
	.type	p11_l2, @object
	.size	p11_l2, 1
p11_l2:
	.zero	1
	.globl	_x_p11_l2
	.type	_x_p11_l2, @object
	.size	_x_p11_l2, 1
_x_p11_l2:
	.zero	1
	.globl	p2_l1
	.type	p2_l1, @object
	.size	p2_l1, 1
p2_l1:
	.zero	1
	.globl	_x_p2_l1
	.type	_x_p2_l1, @object
	.size	_x_p2_l1, 1
_x_p2_l1:
	.zero	1
	.globl	p5_l2
	.type	p5_l2, @object
	.size	p5_l2, 1
p5_l2:
	.zero	1
	.globl	_x_p5_l2
	.type	_x_p5_l2, @object
	.size	_x_p5_l2, 1
_x_p5_l2:
	.zero	1
	.globl	p11_l3
	.type	p11_l3, @object
	.size	p11_l3, 1
p11_l3:
	.zero	1
	.globl	_x_p11_l3
	.type	_x_p11_l3, @object
	.size	_x_p11_l3, 1
_x_p11_l3:
	.zero	1
	.globl	p2_l2
	.type	p2_l2, @object
	.size	p2_l2, 1
p2_l2:
	.zero	1
	.globl	_x_p2_l2
	.type	_x_p2_l2, @object
	.size	_x_p2_l2, 1
_x_p2_l2:
	.zero	1
	.globl	p5_l3
	.type	p5_l3, @object
	.size	p5_l3, 1
p5_l3:
	.zero	1
	.globl	_x_p5_l3
	.type	_x_p5_l3, @object
	.size	_x_p5_l3, 1
_x_p5_l3:
	.zero	1
	.globl	p9_l0
	.type	p9_l0, @object
	.size	p9_l0, 1
p9_l0:
	.zero	1
	.globl	_x_p9_l0
	.type	_x_p9_l0, @object
	.size	_x_p9_l0, 1
_x_p9_l0:
	.zero	1
	.globl	p6_l0
	.type	p6_l0, @object
	.size	p6_l0, 1
p6_l0:
	.zero	1
	.globl	_x_p6_l0
	.type	_x_p6_l0, @object
	.size	_x_p6_l0, 1
_x_p6_l0:
	.zero	1
	.globl	p9_l1
	.type	p9_l1, @object
	.size	p9_l1, 1
p9_l1:
	.zero	1
	.globl	_x_p9_l1
	.type	_x_p9_l1, @object
	.size	_x_p9_l1, 1
_x_p9_l1:
	.zero	1
	.globl	p3_l0
	.type	p3_l0, @object
	.size	p3_l0, 1
p3_l0:
	.zero	1
	.globl	_x_p3_l0
	.type	_x_p3_l0, @object
	.size	_x_p3_l0, 1
_x_p3_l0:
	.zero	1
	.globl	p6_l1
	.type	p6_l1, @object
	.size	p6_l1, 1
p6_l1:
	.zero	1
	.globl	_x_p6_l1
	.type	_x_p6_l1, @object
	.size	_x_p6_l1, 1
_x_p6_l1:
	.zero	1
	.globl	p9_l2
	.type	p9_l2, @object
	.size	p9_l2, 1
p9_l2:
	.zero	1
	.globl	_x_p9_l2
	.type	_x_p9_l2, @object
	.size	_x_p9_l2, 1
_x_p9_l2:
	.zero	1
	.globl	p3_l1
	.type	p3_l1, @object
	.size	p3_l1, 1
p3_l1:
	.zero	1
	.globl	_x_p3_l1
	.type	_x_p3_l1, @object
	.size	_x_p3_l1, 1
_x_p3_l1:
	.zero	1
	.globl	p6_l2
	.type	p6_l2, @object
	.size	p6_l2, 1
p6_l2:
	.zero	1
	.globl	_x_p6_l2
	.type	_x_p6_l2, @object
	.size	_x_p6_l2, 1
_x_p6_l2:
	.zero	1
	.globl	p7_c
	.align 4
	.type	p7_c, @object
	.size	p7_c, 4
p7_c:
	.zero	4
	.globl	_x_p7_c
	.align 4
	.type	_x_p7_c, @object
	.size	_x_p7_c, 4
_x_p7_c:
	.zero	4
	.globl	p13_c
	.align 4
	.type	p13_c, @object
	.size	p13_c, 4
p13_c:
	.zero	4
	.globl	_x_p13_c
	.align 4
	.type	_x_p13_c, @object
	.size	_x_p13_c, 4
_x_p13_c:
	.zero	4
	.globl	p4_c
	.align 4
	.type	p4_c, @object
	.size	p4_c, 4
p4_c:
	.zero	4
	.globl	_x_p4_c
	.align 4
	.type	_x_p4_c, @object
	.size	_x_p4_c, 4
_x_p4_c:
	.zero	4
	.globl	p7_evt
	.type	p7_evt, @object
	.size	p7_evt, 1
p7_evt:
	.zero	1
	.globl	_x_p7_evt
	.type	_x_p7_evt, @object
	.size	_x_p7_evt, 1
_x_p7_evt:
	.zero	1
	.globl	p7_l0
	.type	p7_l0, @object
	.size	p7_l0, 1
p7_l0:
	.zero	1
	.globl	_x_p7_l0
	.type	_x_p7_l0, @object
	.size	_x_p7_l0, 1
_x_p7_l0:
	.zero	1
	.globl	p13_l0
	.type	p13_l0, @object
	.size	p13_l0, 1
p13_l0:
	.zero	1
	.globl	_x_p13_l0
	.type	_x_p13_l0, @object
	.size	_x_p13_l0, 1
_x_p13_l0:
	.zero	1
	.globl	p4_l0
	.type	p4_l0, @object
	.size	p4_l0, 1
p4_l0:
	.zero	1
	.globl	_x_p4_l0
	.type	_x_p4_l0, @object
	.size	_x_p4_l0, 1
_x_p4_l0:
	.zero	1
	.globl	p7_l1
	.type	p7_l1, @object
	.size	p7_l1, 1
p7_l1:
	.zero	1
	.globl	_x_p7_l1
	.type	_x_p7_l1, @object
	.size	_x_p7_l1, 1
_x_p7_l1:
	.zero	1
	.globl	p13_l1
	.type	p13_l1, @object
	.size	p13_l1, 1
p13_l1:
	.zero	1
	.globl	_x_p13_l1
	.type	_x_p13_l1, @object
	.size	_x_p13_l1, 1
_x_p13_l1:
	.zero	1
	.globl	p1_l0
	.type	p1_l0, @object
	.size	p1_l0, 1
p1_l0:
	.zero	1
	.globl	_x_p1_l0
	.type	_x_p1_l0, @object
	.size	_x_p1_l0, 1
_x_p1_l0:
	.zero	1
	.globl	p4_l1
	.type	p4_l1, @object
	.size	p4_l1, 1
p4_l1:
	.zero	1
	.globl	_x_p4_l1
	.type	_x_p4_l1, @object
	.size	_x_p4_l1, 1
_x_p4_l1:
	.zero	1
	.globl	p7_l2
	.type	p7_l2, @object
	.size	p7_l2, 1
p7_l2:
	.zero	1
	.globl	_x_p7_l2
	.type	_x_p7_l2, @object
	.size	_x_p7_l2, 1
_x_p7_l2:
	.zero	1
	.globl	p8_l0
	.type	p8_l0, @object
	.size	p8_l0, 1
p8_l0:
	.zero	1
	.globl	_x_p8_l0
	.type	_x_p8_l0, @object
	.size	_x_p8_l0, 1
_x_p8_l0:
	.zero	1
	.globl	p6_c
	.align 4
	.type	p6_c, @object
	.size	p6_c, 4
p6_c:
	.zero	4
	.globl	_x_p6_c
	.align 4
	.type	_x_p6_c, @object
	.size	_x_p6_c, 4
_x_p6_c:
	.zero	4
	.globl	p9_c
	.align 4
	.type	p9_c, @object
	.size	p9_c, 4
p9_c:
	.zero	4
	.globl	_x_p9_c
	.align 4
	.type	_x_p9_c, @object
	.size	_x_p9_c, 4
_x_p9_c:
	.zero	4
	.globl	p3_c
	.align 4
	.type	p3_c, @object
	.size	p3_c, 4
p3_c:
	.zero	4
	.globl	_x_p3_c
	.align 4
	.type	_x_p3_c, @object
	.size	_x_p3_c, 4
_x_p3_c:
	.zero	4
	.globl	p6_evt
	.type	p6_evt, @object
	.size	p6_evt, 1
p6_evt:
	.zero	1
	.globl	_x_p6_evt
	.type	_x_p6_evt, @object
	.size	_x_p6_evt, 1
_x_p6_evt:
	.zero	1
	.globl	p9_evt
	.type	p9_evt, @object
	.size	p9_evt, 1
p9_evt:
	.zero	1
	.globl	_x_p9_evt
	.type	_x_p9_evt, @object
	.size	_x_p9_evt, 1
_x_p9_evt:
	.zero	1
	.text
	.globl	main
	.type	main, @function
main:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p14_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p12_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p12_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p12_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p12_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p12_evt[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p12_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _diverge_delta[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p10_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p10_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p10_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p10_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p10_evt[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p10_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p3_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p3_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p0_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p14_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p8_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p0_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p2_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p2_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p14_evt[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR delta[rip], eax
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR v1[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR v2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p8_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p0_l3[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p14_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p8_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p14_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p8_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p13_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p4_evt[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p1_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p9_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p3_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p6_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p1_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p0_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p14_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p8_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p1_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p13_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p1_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p7_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p4_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p13_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p1_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p4_l3[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p11_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p5_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p11_evt[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p2_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p5_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p11_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p0_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p5_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p11_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p2_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p0_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p5_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p11_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p2_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p5_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p11_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p2_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p5_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p9_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p6_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p9_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p3_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p6_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p9_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p3_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p6_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p7_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p13_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p4_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p7_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p7_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p13_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p4_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p7_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p13_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p1_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p4_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p7_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p8_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p6_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p9_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p3_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p6_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p9_evt[rip], al
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p14_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	je	.L6
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L6
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L6
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L7
.L6:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L7
.L8:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L9
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L9
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L9
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L7
.L9:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L10
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L10
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L10
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L7
.L10:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L11
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L11
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L11
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L7
.L11:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L12
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L12
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L12
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L7
.L12:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L13
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L7
.L13:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L14
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L14
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L14
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L7
.L14:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L4
.L7:
	movss	xmm1, DWORD PTR p14_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L15
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L16
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L16
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L16
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L4
.L16:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L17
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L17
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L17
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L4
.L17:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L18
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L18
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L18
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L4
.L18:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	je	.L15
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L15
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L15
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L4
.L15:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p13_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	je	.L20
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L20
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L20
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L21
.L20:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L22
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L22
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L22
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L21
.L22:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L23
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L23
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L23
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L21
.L23:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L24
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L24
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L24
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L21
.L24:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L25
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L25
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L25
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L21
.L25:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L26
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L26
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L26
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L21
.L26:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L27
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L27
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L27
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L21
.L27:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L28
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L28
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L28
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L21
.L28:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L4
.L21:
	movss	xmm1, DWORD PTR p13_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L29
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L30
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L30
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L30
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L4
.L30:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L31
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L31
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L31
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L4
.L31:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L32
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L32
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L32
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L4
.L32:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	je	.L29
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L29
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L29
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L4
.L29:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p12_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	je	.L34
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L34
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L34
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L35
.L34:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L36
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L36
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L36
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L35
.L36:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L37
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L37
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L37
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L35
.L37:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L38
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L38
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L38
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L35
.L38:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L39
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L39
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L39
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L35
.L39:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L40
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L40
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L40
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L35
.L40:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L41
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L41
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L41
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L35
.L41:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L42
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L42
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L42
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L35
.L42:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L4
.L35:
	movss	xmm1, DWORD PTR p12_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L43
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L44
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L44
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L44
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L4
.L44:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L45
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L45
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L45
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L4
.L45:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L46
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L46
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L46
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L4
.L46:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	je	.L43
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L43
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L43
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L4
.L43:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p11_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	je	.L48
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L48
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L48
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L49
.L48:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L50
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L50
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L50
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L49
.L50:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L51
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L51
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L51
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L49
.L51:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L52
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L52
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L52
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L49
.L52:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L53
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L53
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L53
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L49
.L53:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L54
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L54
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L54
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L49
.L54:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L55
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L55
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L55
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L49
.L55:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L56
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L56
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L56
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L49
.L56:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L4
.L49:
	movss	xmm1, DWORD PTR p11_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L57
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L58
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L58
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L58
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L4
.L58:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L59
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L59
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L59
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L4
.L59:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L60
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L60
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L60
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L4
.L60:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	je	.L57
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L57
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L57
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L4
.L57:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p10_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	je	.L62
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L62
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L62
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L63
.L62:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L64
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L64
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L64
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L63
.L64:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L65
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L65
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L65
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L63
.L65:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L66
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L66
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L66
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L63
.L66:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L67
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L67
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L67
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L63
.L67:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L68
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L68
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L68
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L63
.L68:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L69
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L69
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L69
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L63
.L69:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L70
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L70
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L70
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L63
.L70:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L4
.L63:
	movss	xmm1, DWORD PTR p10_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L71
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L72
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L72
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L72
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L4
.L72:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L73
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L73
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L73
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L4
.L73:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L74
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L74
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L74
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L4
.L74:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	je	.L71
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L71
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L71
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L4
.L71:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p9_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	je	.L76
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L76
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L76
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L77
.L76:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L78
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L78
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L78
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L77
.L78:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L79
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L79
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L79
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L77
.L79:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L80
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L80
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L80
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L77
.L80:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L81
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L81
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L81
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L77
.L81:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L82
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L82
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L82
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L77
.L82:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L83
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L83
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L83
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L77
.L83:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L84
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L84
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L84
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L77
.L84:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L4
.L77:
	movss	xmm1, DWORD PTR p9_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L85
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L86
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L86
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L86
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L4
.L86:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L87
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L87
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L87
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L4
.L87:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L88
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L88
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L88
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L4
.L88:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	je	.L85
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L85
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L85
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L4
.L85:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p8_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	je	.L90
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L90
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L90
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L91
.L90:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L92
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L92
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L92
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L91
.L92:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L93
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L93
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L93
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L91
.L93:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L94
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L94
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L94
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L91
.L94:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L95
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L95
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L95
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L91
.L95:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L96
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L96
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L96
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L91
.L96:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L97
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L97
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L97
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L91
.L97:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L98
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L98
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L98
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L91
.L98:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L4
.L91:
	movss	xmm1, DWORD PTR p8_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L99
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L100
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L100
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L100
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L4
.L100:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L101
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L101
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L101
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L4
.L101:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L102
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L102
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L102
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L4
.L102:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	je	.L99
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L99
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L99
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L4
.L99:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p7_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	je	.L104
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L104
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L104
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L105
.L104:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L106
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L106
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L106
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L105
.L106:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L107
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L107
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L107
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L105
.L107:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L108
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L108
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L108
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L105
.L108:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L109
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L109
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L109
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L105
.L109:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L110
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L110
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L110
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L105
.L110:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L111
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L111
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L111
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L105
.L111:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L112
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L112
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L112
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L105
.L112:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L4
.L105:
	movss	xmm1, DWORD PTR p7_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L113
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L114
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L114
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L114
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L4
.L114:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L115
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L115
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L115
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L4
.L115:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L116
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L116
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L116
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L4
.L116:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	je	.L113
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L113
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L113
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L4
.L113:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p6_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	je	.L118
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L118
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L118
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L119
.L118:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L120
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L120
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L120
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L119
.L120:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L121
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L121
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L121
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L119
.L121:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L122
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L122
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L122
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L119
.L122:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L123
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L123
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L123
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L119
.L123:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L124
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L124
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L124
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L119
.L124:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L125
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L125
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L125
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L119
.L125:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L126
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L126
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L126
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L119
.L126:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L4
.L119:
	movss	xmm1, DWORD PTR p6_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L127
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L128
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L128
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L128
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L4
.L128:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L129
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L129
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L129
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L4
.L129:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L130
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L130
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L130
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L4
.L130:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	je	.L127
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L127
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L127
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L4
.L127:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p5_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	je	.L132
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L132
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L132
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L133
.L132:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L134
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L134
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L134
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L133
.L134:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L135
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L135
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L135
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L133
.L135:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L136
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L136
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L136
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L133
.L136:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L137
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L137
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L137
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L133
.L137:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L138
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L138
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L138
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L133
.L138:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L139
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L139
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L139
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L133
.L139:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L140
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L140
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L140
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L133
.L140:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L4
.L133:
	movss	xmm1, DWORD PTR p5_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L141
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L142
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L142
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L142
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L4
.L142:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L143
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L143
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L143
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L4
.L143:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L144
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L144
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L144
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L4
.L144:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	je	.L141
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L141
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L141
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L4
.L141:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p4_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	je	.L146
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L146
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L146
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L147
.L146:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L148
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L148
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L148
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L147
.L148:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L147
.L149:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L150
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L150
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L150
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L147
.L150:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L151
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L151
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L151
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L147
.L151:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L152
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L152
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L152
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L147
.L152:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L153
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L153
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L153
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L147
.L153:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L154
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L154
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L154
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L147
.L154:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L4
.L147:
	movss	xmm1, DWORD PTR p4_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L155
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L156
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L156
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L156
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L4
.L156:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L4
.L157:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L158
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L158
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L158
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L4
.L158:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	je	.L155
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L155
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L155
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L4
.L155:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p3_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	je	.L160
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L160
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L160
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L161
.L160:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L162
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L162
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L162
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L161
.L162:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L163
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L163
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L163
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L161
.L163:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L164
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L164
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L164
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L161
.L164:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L165
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L165
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L165
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L161
.L165:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L166
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L166
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L166
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L161
.L166:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L167
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L167
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L167
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L161
.L167:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L168
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L168
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L168
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L161
.L168:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L4
.L161:
	movss	xmm1, DWORD PTR p3_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L169
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L170
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L170
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L170
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L4
.L170:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L171
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L171
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L171
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L4
.L171:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L172
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L172
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L172
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L4
.L172:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	je	.L169
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L169
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L169
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L4
.L169:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p2_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	je	.L174
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L174
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L174
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L175
.L174:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L176
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L176
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L176
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L175
.L176:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L177
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L177
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L177
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L175
.L177:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L178
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L178
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L178
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L175
.L178:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L179
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L179
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L179
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L175
.L179:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L180
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L180
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L180
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L175
.L180:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L181
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L181
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L181
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L175
.L181:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L182
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L182
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L182
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L175
.L182:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L4
.L175:
	movss	xmm1, DWORD PTR p2_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L183
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L184
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L184
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L184
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L4
.L184:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L185
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L185
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L185
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L4
.L185:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L186
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L186
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L186
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L4
.L186:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	je	.L183
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L183
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L183
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L4
.L183:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p1_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	je	.L188
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L188
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L188
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L189
.L188:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L190
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L190
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L190
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L189
.L190:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L191
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L191
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L191
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L189
.L191:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L189
.L192:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L193
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L193
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L193
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L189
.L193:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L194
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L194
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L194
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L189
.L194:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L195
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L195
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L195
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L189
.L195:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L196
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L196
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L196
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L189
.L196:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L4
.L189:
	movss	xmm1, DWORD PTR p1_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L197
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L198
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L198
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L198
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L4
.L198:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L199
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L199
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L199
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L4
.L199:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L200
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L200
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L200
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L4
.L200:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	je	.L197
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L197
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L197
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L4
.L197:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p0_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	je	.L202
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L202
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L202
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L203
.L202:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L204
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L204
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L204
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L203
.L204:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L205
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L205
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L205
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L203
.L205:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L206
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L206
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L206
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L203
.L206:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L207
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L207
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L207
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L203
.L207:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L208
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L208
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L208
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L203
.L208:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L209
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L209
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L209
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L203
.L209:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L210
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L210
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L210
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L203
.L210:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L4
.L203:
	movss	xmm1, DWORD PTR p0_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L211
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L212
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L212
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L212
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L4
.L212:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L213
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L213
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L213
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L4
.L213:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L214
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L214
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L214
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L4
.L214:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	je	.L211
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L211
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L211
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L4
.L211:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jb	.L4
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 15
	je	.L216
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 14
	je	.L216
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 13
	je	.L216
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 12
	je	.L216
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 11
	je	.L216
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 10
	je	.L216
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 9
	je	.L216
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 8
	je	.L216
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 7
	je	.L216
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 6
	je	.L216
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 5
	je	.L216
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 4
	je	.L216
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 3
	je	.L216
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 2
	je	.L216
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	je	.L216
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 1
	jne	.L4
.L216:
	movss	xmm0, DWORD PTR delta[rip]
	movss	xmm1, DWORD PTR _diverge_delta[rip]
	ucomiss	xmm0, xmm1
	jp	.L4
	ucomiss	xmm0, xmm1
	jne	.L4
	mov	eax, 1
	jmp	.L218
.L4:
	mov	eax, 0
.L218:
	mov	DWORD PTR -4[rbp], eax
	jmp	.L219
.L1112:
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p14_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p12_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p12_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p12_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p12_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p12_evt[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p12_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x__diverge_delta[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p10_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p10_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p10_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p10_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p10_evt[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p10_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p3_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p3_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p0_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p14_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p8_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p0_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p2_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p2_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p14_evt[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_delta[rip], eax
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR _x_v1[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_v2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p8_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p0_l3[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p14_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p8_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p14_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p8_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p13_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p4_evt[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p1_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p9_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p3_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p6_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p1_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p0_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p14_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p8_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p1_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p13_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p1_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p7_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p4_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p13_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p1_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p4_l3[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p11_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p5_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p11_evt[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p2_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p5_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p11_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p0_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p5_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p11_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p2_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p0_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p5_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p11_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p2_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p5_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p11_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p2_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p5_l3[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p9_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p6_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p9_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p3_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p6_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p9_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p3_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p6_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p7_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p13_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p4_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p7_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p7_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p13_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p4_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p7_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p13_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p1_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p4_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p7_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p8_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p6_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p9_c[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p3_c[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p6_evt[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p9_evt[rip], al
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	je	.L220
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L220
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L220
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L221
.L220:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L222
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L222
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L222
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L221
.L222:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L223
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L223
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L223
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L221
.L223:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L224
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L224
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L224
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L221
.L224:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L225
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L225
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L225
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L221
.L225:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L226
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L226
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L226
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L221
.L226:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L227
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L227
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L227
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L221
.L227:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L228
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L228
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L228
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L221
.L228:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L229
.L221:
	movss	xmm1, DWORD PTR _x_p14_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L230
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L231
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L231
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L231
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L229
.L231:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L232
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L232
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L232
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L229
.L232:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L233
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L233
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L233
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L229
.L233:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	je	.L230
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L230
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L230
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L229
.L230:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L234
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p14_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p14_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L234:
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L236
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p14_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p14_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L236:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L238
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L238
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L238
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L238
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L238
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L238
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L238
	movss	xmm0, DWORD PTR _x_p14_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L238
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L239
.L238:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L239
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L239
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L239
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L239
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L239
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L239
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L229
.L239:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L241
	movss	xmm0, DWORD PTR _x_p14_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L241
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L241
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L241
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L241
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L241
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L241
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 15
	je	.L243
.L241:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L243
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L243
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L243
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L243
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L243
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L243
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L229
.L243:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L244
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L244
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L245
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L245
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L245
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L246
.L245:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L244
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L244
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L244
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L244
.L246:
	movss	xmm0, DWORD PTR p14_c[rip]
	movss	xmm1, DWORD PTR _x_p14_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L244
	ucomiss	xmm0, xmm1
	je	.L247
.L244:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L247
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L247
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L247
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L247
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L247
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L247
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L229
.L247:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 15
	jne	.L249
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L249
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L249
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L249
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L249
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L249
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L249
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L249
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L249
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L249
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L249
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L229
.L249:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 15
	jne	.L250
	movss	xmm1, DWORD PTR p14_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L251
.L250:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L251
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L251
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L251
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L251
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L251
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L251
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L251
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L251
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L251
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L251
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L229
.L251:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L252
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L252
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L253
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L253
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L253
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L254
.L253:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L252
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L252
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L252
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L254
.L252:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L254
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L254
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L254
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L254
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L254
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L254
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L229
.L254:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L255
	movss	xmm0, DWORD PTR p14_c[rip]
	movss	xmm1, DWORD PTR _x_p14_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L255
	ucomiss	xmm0, xmm1
	je	.L256
.L255:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L256
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L256
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	je	.L256
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L256
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L256
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L256
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L256
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L256
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L256
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L256
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L229
.L256:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L258
	movss	xmm0, DWORD PTR _x_p14_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L258
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L259
.L258:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L259
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L259
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	je	.L259
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L259
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L259
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L259
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L259
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L259
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L259
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L259
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L229
.L259:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L261
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L261
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L261
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L261
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L261
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L261
	movss	xmm0, DWORD PTR _x_p14_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L261
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L262
.L261:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L262
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L262
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L262
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L262
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L262
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L262
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L229
.L262:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L264
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L264
	movss	xmm0, DWORD PTR p14_c[rip]
	movss	xmm1, DWORD PTR _x_p14_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L264
	ucomiss	xmm0, xmm1
	jne	.L264
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L266
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L266
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L266
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L267
.L266:
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L264
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L264
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L264
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L267
.L264:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L267
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L267
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L267
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L267
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L267
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L267
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L229
.L267:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 15
	jne	.L268
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L268
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L268
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	je	.L268
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L268
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L268
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L268
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L268
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L268
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L268
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L268
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L229
.L268:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 15
	je	.L269
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L269
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L269
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	je	.L269
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L269
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L269
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L269
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L269
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L269
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L269
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L269
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L229
.L269:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L270
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L270
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L270
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	je	.L270
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L270
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L270
	movss	xmm0, DWORD PTR _x_p14_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L270
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L271
.L270:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L271
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L271
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L271
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L271
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L271
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L271
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L229
.L271:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L273
	movss	xmm0, DWORD PTR _x_p14_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L273
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L273
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L273
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	je	.L273
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L273
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L273
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L275
.L273:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	jne	.L275
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	je	.L275
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L275
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L275
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L275
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L275
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L229
.L275:
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L276
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	test	al, al
	jne	.L276
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	test	al, al
	jne	.L276
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L276
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L276
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L276
	movss	xmm0, DWORD PTR p14_c[rip]
	movss	xmm1, DWORD PTR _x_p14_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L276
	ucomiss	xmm0, xmm1
	je	.L277
.L276:
	movzx	eax, BYTE PTR p14_l3[rip]
	test	al, al
	je	.L277
	movzx	eax, BYTE PTR p14_l2[rip]
	test	al, al
	jne	.L277
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L277
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L277
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L277
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L277
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L229
.L277:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	je	.L279
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L279
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L279
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L280
.L279:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L281
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L281
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L281
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L280
.L281:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L282
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L282
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L282
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L280
.L282:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L283
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L283
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L283
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L280
.L283:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L284
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L284
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L284
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L280
.L284:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L285
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L285
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L285
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L280
.L285:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L286
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L286
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L286
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L280
.L286:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L287
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L287
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L287
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L280
.L287:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L229
.L280:
	movss	xmm1, DWORD PTR _x_p13_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L288
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L289
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L289
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L289
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L229
.L289:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L290
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L290
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L290
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L229
.L290:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L291
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L291
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L291
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L229
.L291:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	je	.L288
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L288
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L288
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L229
.L288:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L292
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p13_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p13_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L292:
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L294
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p13_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p13_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L294:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L296
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L296
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L296
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L296
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L296
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L296
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L296
	movss	xmm0, DWORD PTR _x_p13_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L296
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L297
.L296:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L297
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L297
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L297
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L297
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L297
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L297
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L229
.L297:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L299
	movss	xmm0, DWORD PTR _x_p13_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L299
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L299
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L299
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L299
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L299
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L299
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 14
	je	.L301
.L299:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L301
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L301
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L301
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L301
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L301
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L301
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L229
.L301:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L302
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L302
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L303
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L303
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L303
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L304
.L303:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L302
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L302
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L302
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L302
.L304:
	movss	xmm0, DWORD PTR p13_c[rip]
	movss	xmm1, DWORD PTR _x_p13_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L302
	ucomiss	xmm0, xmm1
	je	.L305
.L302:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L305
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L305
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L305
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L305
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L305
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L305
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L229
.L305:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 14
	jne	.L307
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L307
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L307
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L307
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L307
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L307
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L307
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L307
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L307
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L307
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L307
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L229
.L307:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 14
	jne	.L308
	movss	xmm1, DWORD PTR p13_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L309
.L308:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L309
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L309
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L309
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L309
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L309
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L309
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L309
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L309
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L309
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L309
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L229
.L309:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L310
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L310
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L311
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L311
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L311
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L312
.L311:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L310
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L310
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L310
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L312
.L310:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L312
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L312
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L312
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L312
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L312
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L312
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L229
.L312:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L313
	movss	xmm0, DWORD PTR p13_c[rip]
	movss	xmm1, DWORD PTR _x_p13_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L313
	ucomiss	xmm0, xmm1
	je	.L314
.L313:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L314
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L314
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	je	.L314
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L314
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L314
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L314
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L314
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L314
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L314
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L314
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L229
.L314:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L316
	movss	xmm0, DWORD PTR _x_p13_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L316
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L317
.L316:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L317
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L317
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	je	.L317
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L317
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L317
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L317
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L317
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L317
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L317
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L317
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L229
.L317:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L319
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L319
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L319
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L319
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L319
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L319
	movss	xmm0, DWORD PTR _x_p13_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L319
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L320
.L319:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L320
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L320
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L320
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L320
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L320
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L320
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L229
.L320:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L322
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L322
	movss	xmm0, DWORD PTR p13_c[rip]
	movss	xmm1, DWORD PTR _x_p13_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L322
	ucomiss	xmm0, xmm1
	jne	.L322
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L324
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L324
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L324
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L325
.L324:
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L322
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L322
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L322
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L325
.L322:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L325
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L325
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L325
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L325
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L325
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L325
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L229
.L325:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 14
	jne	.L326
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L326
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L326
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	je	.L326
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L326
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L326
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L326
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L326
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L326
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L326
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L326
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L229
.L326:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 14
	je	.L327
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L327
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L327
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	je	.L327
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L327
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L327
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L327
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L327
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L327
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L327
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L327
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L229
.L327:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L328
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L328
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L328
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	je	.L328
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L328
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L328
	movss	xmm0, DWORD PTR _x_p13_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L328
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L329
.L328:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L329
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L329
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L329
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L329
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L329
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L329
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L229
.L329:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L331
	movss	xmm0, DWORD PTR _x_p13_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L331
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L331
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L331
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	je	.L331
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L331
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L331
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L333
.L331:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	jne	.L333
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	je	.L333
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L333
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L333
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L333
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L333
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L229
.L333:
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L334
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	test	al, al
	jne	.L334
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	test	al, al
	jne	.L334
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L334
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L334
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L334
	movss	xmm0, DWORD PTR p13_c[rip]
	movss	xmm1, DWORD PTR _x_p13_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L334
	ucomiss	xmm0, xmm1
	je	.L335
.L334:
	movzx	eax, BYTE PTR p13_l3[rip]
	test	al, al
	je	.L335
	movzx	eax, BYTE PTR p13_l2[rip]
	test	al, al
	jne	.L335
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L335
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L335
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L335
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L335
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L229
.L335:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	je	.L337
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L337
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L337
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L338
.L337:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L339
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L339
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L339
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L338
.L339:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L340
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L340
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L340
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L338
.L340:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L341
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L341
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L341
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L338
.L341:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L342
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L342
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L342
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L338
.L342:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L343
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L343
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L343
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L338
.L343:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L344
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L344
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L344
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L338
.L344:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L345
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L345
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L345
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L338
.L345:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L229
.L338:
	movss	xmm1, DWORD PTR _x_p12_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L346
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L347
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L347
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L347
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L229
.L347:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L348
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L348
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L348
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L229
.L348:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L229
.L349:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	je	.L346
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L346
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L346
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L229
.L346:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L350
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p12_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p12_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L350:
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L352
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p12_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p12_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L352:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L354
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L354
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L354
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L354
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L354
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L354
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L354
	movss	xmm0, DWORD PTR _x_p12_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L354
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L355
.L354:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L355
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L355
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L355
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L355
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L355
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L355
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L229
.L355:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L357
	movss	xmm0, DWORD PTR _x_p12_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L357
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L357
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L357
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L357
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L357
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L357
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 13
	je	.L359
.L357:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L359
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L359
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L359
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L359
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L359
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L359
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L229
.L359:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L360
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L360
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L361
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L361
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L361
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L362
.L361:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L360
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L360
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L360
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L360
.L362:
	movss	xmm0, DWORD PTR p12_c[rip]
	movss	xmm1, DWORD PTR _x_p12_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L360
	ucomiss	xmm0, xmm1
	je	.L363
.L360:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L363
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L363
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L363
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L363
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L363
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L363
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L229
.L363:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 13
	jne	.L365
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L365
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L365
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L365
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L365
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L365
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L365
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L365
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L365
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L365
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L365
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L229
.L365:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 13
	jne	.L366
	movss	xmm1, DWORD PTR p12_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L367
.L366:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L367
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L367
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L367
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L367
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L367
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L367
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L367
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L367
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L367
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L367
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L229
.L367:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L368
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L368
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L369
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L369
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L369
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L370
.L369:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L368
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L368
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L368
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L370
.L368:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L370
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L370
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L370
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L370
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L370
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L370
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L229
.L370:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L371
	movss	xmm0, DWORD PTR p12_c[rip]
	movss	xmm1, DWORD PTR _x_p12_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L371
	ucomiss	xmm0, xmm1
	je	.L372
.L371:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L372
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L372
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	je	.L372
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L372
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L372
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L372
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L372
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L372
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L372
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L372
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L229
.L372:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L374
	movss	xmm0, DWORD PTR _x_p12_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L374
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L375
.L374:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L375
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L375
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	je	.L375
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L375
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L375
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L375
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L375
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L375
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L375
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L375
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L229
.L375:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L377
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L377
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L377
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L377
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L377
	movss	xmm0, DWORD PTR _x_p12_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L377
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L378
.L377:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L378
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L378
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L378
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L378
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L378
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L378
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L229
.L378:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L380
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L380
	movss	xmm0, DWORD PTR p12_c[rip]
	movss	xmm1, DWORD PTR _x_p12_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L380
	ucomiss	xmm0, xmm1
	jne	.L380
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L382
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L382
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L382
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L383
.L382:
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L380
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L380
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L380
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L383
.L380:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L383
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L383
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L383
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L383
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L383
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L383
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L229
.L383:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 13
	jne	.L384
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L384
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L384
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	je	.L384
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L384
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L384
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L384
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L384
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L384
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L384
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L384
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L229
.L384:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 13
	je	.L385
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L385
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L385
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	je	.L385
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L385
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L385
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L385
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L385
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L385
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L385
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L385
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L229
.L385:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L386
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L386
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L386
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	je	.L386
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L386
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L386
	movss	xmm0, DWORD PTR _x_p12_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L386
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L387
.L386:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L387
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L387
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L387
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L387
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L387
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L387
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L229
.L387:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L389
	movss	xmm0, DWORD PTR _x_p12_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L389
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L389
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L389
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	je	.L389
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L389
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L389
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L391
.L389:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	jne	.L391
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	je	.L391
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L391
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L391
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L391
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L391
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L229
.L391:
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L392
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	test	al, al
	jne	.L392
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	test	al, al
	jne	.L392
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L392
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L392
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L392
	movss	xmm0, DWORD PTR p12_c[rip]
	movss	xmm1, DWORD PTR _x_p12_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L392
	ucomiss	xmm0, xmm1
	je	.L393
.L392:
	movzx	eax, BYTE PTR p12_l3[rip]
	test	al, al
	je	.L393
	movzx	eax, BYTE PTR p12_l2[rip]
	test	al, al
	jne	.L393
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L393
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L393
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L393
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L393
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L229
.L393:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	je	.L395
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L395
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L395
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L396
.L395:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L397
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L397
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L397
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L396
.L397:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L398
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L398
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L398
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L396
.L398:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L399
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L399
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L399
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L396
.L399:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L400
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L396
.L400:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L401
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L401
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L401
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L396
.L401:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L402
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L402
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L402
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L396
.L402:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L403
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L403
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L403
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L396
.L403:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L229
.L396:
	movss	xmm1, DWORD PTR _x_p11_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L404
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L405
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L405
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L405
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L229
.L405:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L406
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L406
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L406
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L229
.L406:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L407
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L407
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L407
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L229
.L407:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	je	.L404
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L404
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L404
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L229
.L404:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L408
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p11_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p11_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L408:
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L410
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p11_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p11_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L410:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L412
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L412
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L412
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L412
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L412
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L412
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L412
	movss	xmm0, DWORD PTR _x_p11_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L412
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L413
.L412:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L413
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L413
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L413
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L413
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L413
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L413
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L229
.L413:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L415
	movss	xmm0, DWORD PTR _x_p11_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L415
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L415
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L415
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L415
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L415
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L415
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 12
	je	.L417
.L415:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L417
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L417
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L417
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L417
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L417
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L417
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L229
.L417:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L418
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L418
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L419
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L419
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L419
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L420
.L419:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L418
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L418
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L418
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L418
.L420:
	movss	xmm0, DWORD PTR p11_c[rip]
	movss	xmm1, DWORD PTR _x_p11_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L418
	ucomiss	xmm0, xmm1
	je	.L421
.L418:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L421
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L421
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L421
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L421
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L421
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L421
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L229
.L421:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 12
	jne	.L423
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L423
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L423
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L423
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L423
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L423
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L423
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L423
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L423
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L423
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L423
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L229
.L423:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 12
	jne	.L424
	movss	xmm1, DWORD PTR p11_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L425
.L424:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L425
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L425
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L425
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L425
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L425
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L425
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L425
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L425
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L425
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L425
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L229
.L425:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L426
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L426
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L427
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L427
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L427
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L428
.L427:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L426
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L426
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L426
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L428
.L426:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L428
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L428
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L428
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L428
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L428
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L428
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L229
.L428:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L429
	movss	xmm0, DWORD PTR p11_c[rip]
	movss	xmm1, DWORD PTR _x_p11_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L429
	ucomiss	xmm0, xmm1
	je	.L430
.L429:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L430
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L430
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	je	.L430
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L430
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L430
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L430
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L430
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L430
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L430
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L430
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L229
.L430:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L432
	movss	xmm0, DWORD PTR _x_p11_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L432
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L433
.L432:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L433
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L433
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	je	.L433
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L433
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L433
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L433
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L433
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L433
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L433
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L433
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L229
.L433:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L435
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L435
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L435
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L435
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L435
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L435
	movss	xmm0, DWORD PTR _x_p11_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L435
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L436
.L435:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L436
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L436
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L436
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L436
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L436
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L436
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L229
.L436:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L438
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L438
	movss	xmm0, DWORD PTR p11_c[rip]
	movss	xmm1, DWORD PTR _x_p11_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L438
	ucomiss	xmm0, xmm1
	jne	.L438
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L440
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L440
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L440
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L441
.L440:
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L438
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L438
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L438
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L441
.L438:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L441
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L441
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L441
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L441
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L441
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L441
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L229
.L441:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 12
	jne	.L442
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L442
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L442
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	je	.L442
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L442
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L442
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L442
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L442
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L442
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L442
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L442
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L229
.L442:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 12
	je	.L443
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L443
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L443
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	je	.L443
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L443
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L443
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L443
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L443
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L443
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L443
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L443
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L229
.L443:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L444
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L444
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L444
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	je	.L444
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L444
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L444
	movss	xmm0, DWORD PTR _x_p11_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L444
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L445
.L444:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L445
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L445
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L445
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L445
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L445
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L445
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L229
.L445:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L447
	movss	xmm0, DWORD PTR _x_p11_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L447
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L447
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L447
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	je	.L447
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L447
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L447
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L449
.L447:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	jne	.L449
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	je	.L449
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L449
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L449
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L449
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L449
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L229
.L449:
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L450
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	test	al, al
	jne	.L450
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	test	al, al
	jne	.L450
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L450
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L450
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L450
	movss	xmm0, DWORD PTR p11_c[rip]
	movss	xmm1, DWORD PTR _x_p11_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L450
	ucomiss	xmm0, xmm1
	je	.L451
.L450:
	movzx	eax, BYTE PTR p11_l3[rip]
	test	al, al
	je	.L451
	movzx	eax, BYTE PTR p11_l2[rip]
	test	al, al
	jne	.L451
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L451
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L451
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L451
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L451
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L229
.L451:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	je	.L453
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L453
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L453
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L454
.L453:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L455
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L455
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L455
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L454
.L455:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L456
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L456
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L456
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L454
.L456:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L457
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L457
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L457
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L454
.L457:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L458
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L458
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L458
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L454
.L458:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L459
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L459
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L459
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L454
.L459:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L460
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L460
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L460
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L454
.L460:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L461
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L461
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L461
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L454
.L461:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L229
.L454:
	movss	xmm1, DWORD PTR _x_p10_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L462
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L463
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L463
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L463
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L229
.L463:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L464
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L464
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L464
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L229
.L464:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L465
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L465
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L465
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L229
.L465:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	je	.L462
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L462
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L462
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L229
.L462:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L466
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p10_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p10_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L466:
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L468
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p10_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p10_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L468:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L470
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L470
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L470
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L470
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L470
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L470
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L470
	movss	xmm0, DWORD PTR _x_p10_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L470
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L471
.L470:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L471
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L471
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L471
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L471
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L471
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L471
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L229
.L471:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L473
	movss	xmm0, DWORD PTR _x_p10_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L473
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L473
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L473
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L473
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L473
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L473
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 11
	je	.L475
.L473:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L475
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L475
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L475
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L475
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L475
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L475
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L229
.L475:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L476
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L476
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L477
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L477
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L477
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L478
.L477:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L476
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L476
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L476
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L476
.L478:
	movss	xmm0, DWORD PTR p10_c[rip]
	movss	xmm1, DWORD PTR _x_p10_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L476
	ucomiss	xmm0, xmm1
	je	.L479
.L476:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L479
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L479
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L479
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L479
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L479
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L479
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L229
.L479:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 11
	jne	.L481
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L481
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L481
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L481
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L481
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L481
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L481
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L481
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L481
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L481
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L481
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L229
.L481:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 11
	jne	.L482
	movss	xmm1, DWORD PTR p10_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L483
.L482:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L483
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L483
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L483
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L483
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L483
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L483
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L483
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L483
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L483
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L483
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L229
.L483:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L484
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L484
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L485
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L485
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L485
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L486
.L485:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L484
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L484
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L484
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L486
.L484:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L486
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L486
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L486
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L486
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L486
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L486
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L229
.L486:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L487
	movss	xmm0, DWORD PTR p10_c[rip]
	movss	xmm1, DWORD PTR _x_p10_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L487
	ucomiss	xmm0, xmm1
	je	.L488
.L487:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L488
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L488
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	je	.L488
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L488
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L488
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L488
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L488
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L488
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L488
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L488
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L229
.L488:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L490
	movss	xmm0, DWORD PTR _x_p10_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L490
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L491
.L490:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L491
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L491
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	je	.L491
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L491
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L491
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L491
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L491
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L491
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L491
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L491
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L229
.L491:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L493
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L493
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L493
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L493
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L493
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L493
	movss	xmm0, DWORD PTR _x_p10_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L493
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L494
.L493:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L494
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L494
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L494
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L494
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L494
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L494
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L229
.L494:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L496
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L496
	movss	xmm0, DWORD PTR p10_c[rip]
	movss	xmm1, DWORD PTR _x_p10_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L496
	ucomiss	xmm0, xmm1
	jne	.L496
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L498
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L498
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L498
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L499
.L498:
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L496
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L496
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L496
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L499
.L496:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L499
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L499
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L499
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L499
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L499
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L499
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L229
.L499:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 11
	jne	.L500
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L500
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L500
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	je	.L500
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L500
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L500
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L500
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L500
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L500
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L500
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L500
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L229
.L500:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 11
	je	.L501
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L501
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L501
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	je	.L501
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L501
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L501
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L501
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L501
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L501
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L501
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L501
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L229
.L501:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L502
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L502
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L502
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	je	.L502
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L502
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L502
	movss	xmm0, DWORD PTR _x_p10_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L502
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L503
.L502:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L503
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L503
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L503
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L503
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L503
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L503
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L229
.L503:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L505
	movss	xmm0, DWORD PTR _x_p10_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L505
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L505
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L505
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	je	.L505
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L505
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L505
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L507
.L505:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	jne	.L507
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	je	.L507
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L507
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L507
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L507
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L507
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L229
.L507:
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L508
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	test	al, al
	jne	.L508
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	test	al, al
	jne	.L508
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L508
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L508
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L508
	movss	xmm0, DWORD PTR p10_c[rip]
	movss	xmm1, DWORD PTR _x_p10_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L508
	ucomiss	xmm0, xmm1
	je	.L509
.L508:
	movzx	eax, BYTE PTR p10_l3[rip]
	test	al, al
	je	.L509
	movzx	eax, BYTE PTR p10_l2[rip]
	test	al, al
	jne	.L509
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L509
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L509
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L509
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L509
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L229
.L509:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	je	.L511
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L511
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L511
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L512
.L511:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L513
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L513
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L513
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L512
.L513:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L514
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L514
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L514
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L512
.L514:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L515
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L515
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L515
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L512
.L515:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L516
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L516
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L516
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L512
.L516:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L517
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L517
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L517
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L512
.L517:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L518
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L518
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L518
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L512
.L518:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L519
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L519
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L519
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L512
.L519:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L229
.L512:
	movss	xmm1, DWORD PTR _x_p9_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L520
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L521
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L521
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L521
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L229
.L521:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L522
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L522
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L522
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L229
.L522:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L523
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L523
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L523
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L229
.L523:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	je	.L520
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L520
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L520
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L229
.L520:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L524
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p9_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p9_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L524:
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L526
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p9_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p9_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L526:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L528
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L528
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L528
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L528
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L528
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L528
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L528
	movss	xmm0, DWORD PTR _x_p9_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L528
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L529
.L528:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L529
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L529
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L529
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L529
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L529
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L529
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L229
.L529:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L531
	movss	xmm0, DWORD PTR _x_p9_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L531
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L531
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L531
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L531
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L531
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L531
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 10
	je	.L533
.L531:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L533
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L533
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L533
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L533
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L533
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L533
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L229
.L533:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L534
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L534
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L535
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L535
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L535
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L536
.L535:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L534
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L534
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L534
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L534
.L536:
	movss	xmm0, DWORD PTR p9_c[rip]
	movss	xmm1, DWORD PTR _x_p9_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L534
	ucomiss	xmm0, xmm1
	je	.L537
.L534:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L537
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L537
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L537
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L537
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L537
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L537
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L229
.L537:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 10
	jne	.L539
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L539
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L539
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L539
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L539
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L539
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L539
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L539
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L539
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L539
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L539
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L229
.L539:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 10
	jne	.L540
	movss	xmm1, DWORD PTR p9_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L541
.L540:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L541
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L541
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L541
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L541
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L541
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L541
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L541
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L541
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L541
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L541
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L229
.L541:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L542
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L542
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L543
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L543
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L543
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L544
.L543:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L542
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L542
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L542
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L544
.L542:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L544
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L544
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L544
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L544
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L544
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L544
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L229
.L544:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L545
	movss	xmm0, DWORD PTR p9_c[rip]
	movss	xmm1, DWORD PTR _x_p9_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L545
	ucomiss	xmm0, xmm1
	je	.L546
.L545:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L546
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L546
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	je	.L546
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L546
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L546
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L546
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L546
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L546
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L546
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L546
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L229
.L546:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L548
	movss	xmm0, DWORD PTR _x_p9_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L548
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L549
.L548:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L549
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L549
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	je	.L549
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L549
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L549
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L549
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L549
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L549
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L549
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L549
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L229
.L549:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L551
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L551
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L551
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L551
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L551
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L551
	movss	xmm0, DWORD PTR _x_p9_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L551
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L552
.L551:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L552
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L552
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L552
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L552
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L552
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L552
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L229
.L552:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L554
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L554
	movss	xmm0, DWORD PTR p9_c[rip]
	movss	xmm1, DWORD PTR _x_p9_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L554
	ucomiss	xmm0, xmm1
	jne	.L554
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L556
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L556
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L556
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L557
.L556:
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L554
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L554
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L554
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L557
.L554:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L557
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L557
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L557
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L557
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L557
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L557
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L229
.L557:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 10
	jne	.L558
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L558
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L558
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	je	.L558
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L558
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L558
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L558
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L558
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L558
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L558
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L558
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L229
.L558:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 10
	je	.L559
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L559
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L559
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	je	.L559
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L559
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L559
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L559
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L559
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L559
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L559
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L559
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L229
.L559:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L560
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L560
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L560
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	je	.L560
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L560
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L560
	movss	xmm0, DWORD PTR _x_p9_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L560
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L561
.L560:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L561
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L561
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L561
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L561
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L561
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L561
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L229
.L561:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L563
	movss	xmm0, DWORD PTR _x_p9_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L563
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L563
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L563
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	je	.L563
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L563
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L563
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L565
.L563:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	jne	.L565
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	je	.L565
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L565
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L565
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L565
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L565
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L229
.L565:
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L566
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	test	al, al
	jne	.L566
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	test	al, al
	jne	.L566
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L566
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L566
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L566
	movss	xmm0, DWORD PTR p9_c[rip]
	movss	xmm1, DWORD PTR _x_p9_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L566
	ucomiss	xmm0, xmm1
	je	.L567
.L566:
	movzx	eax, BYTE PTR p9_l3[rip]
	test	al, al
	je	.L567
	movzx	eax, BYTE PTR p9_l2[rip]
	test	al, al
	jne	.L567
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L567
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L567
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L567
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L567
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L229
.L567:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	je	.L569
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L569
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L569
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L570
.L569:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L571
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L571
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L571
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L570
.L571:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L572
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L572
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L572
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L570
.L572:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L573
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L573
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L573
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L570
.L573:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L574
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L574
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L574
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L570
.L574:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L575
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L575
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L575
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L570
.L575:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L576
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L576
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L576
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L570
.L576:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L577
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L577
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L577
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L570
.L577:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L229
.L570:
	movss	xmm1, DWORD PTR _x_p8_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L578
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L579
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L579
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L579
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L229
.L579:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L580
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L580
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L580
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L229
.L580:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L581
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L581
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L581
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L229
.L581:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	je	.L578
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L578
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L578
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L229
.L578:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L582
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p8_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p8_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L582:
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L584
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p8_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p8_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L584:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L586
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L586
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L586
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L586
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L586
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L586
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L586
	movss	xmm0, DWORD PTR _x_p8_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L586
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L587
.L586:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L587
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L587
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L587
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L587
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L587
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L587
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L229
.L587:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L589
	movss	xmm0, DWORD PTR _x_p8_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L589
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L589
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L589
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L589
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L589
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L589
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 9
	je	.L591
.L589:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L591
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L591
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L591
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L591
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L591
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L591
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L229
.L591:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L592
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L592
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L593
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L593
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L593
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L594
.L593:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L592
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L592
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L592
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L592
.L594:
	movss	xmm0, DWORD PTR p8_c[rip]
	movss	xmm1, DWORD PTR _x_p8_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L592
	ucomiss	xmm0, xmm1
	je	.L595
.L592:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L595
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L595
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L595
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L595
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L595
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L595
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L229
.L595:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 9
	jne	.L597
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L597
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L597
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L597
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L597
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L597
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L597
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L597
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L597
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L597
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L597
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L229
.L597:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 9
	jne	.L598
	movss	xmm1, DWORD PTR p8_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L599
.L598:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L599
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L599
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L599
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L599
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L599
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L599
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L599
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L599
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L599
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L599
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L229
.L599:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L600
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L600
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L601
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L601
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L601
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L602
.L601:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L600
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L600
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L600
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L602
.L600:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L602
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L602
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L602
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L602
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L602
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L602
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L229
.L602:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L603
	movss	xmm0, DWORD PTR p8_c[rip]
	movss	xmm1, DWORD PTR _x_p8_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L603
	ucomiss	xmm0, xmm1
	je	.L604
.L603:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L604
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L604
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	je	.L604
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L604
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L604
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L604
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L604
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L604
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L604
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L604
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L229
.L604:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L606
	movss	xmm0, DWORD PTR _x_p8_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L606
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L607
.L606:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L607
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L607
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	je	.L607
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L607
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L607
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L607
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L607
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L607
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L607
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L607
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L229
.L607:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L609
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L609
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L609
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L609
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L609
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L609
	movss	xmm0, DWORD PTR _x_p8_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L609
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L610
.L609:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L610
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L610
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L610
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L610
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L610
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L610
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L229
.L610:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L612
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L612
	movss	xmm0, DWORD PTR p8_c[rip]
	movss	xmm1, DWORD PTR _x_p8_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L612
	ucomiss	xmm0, xmm1
	jne	.L612
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L614
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L614
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L614
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L615
.L614:
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L612
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L612
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L612
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L615
.L612:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L615
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L615
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L615
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L615
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L615
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L615
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L229
.L615:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 9
	jne	.L616
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L616
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L616
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	je	.L616
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L616
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L616
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L616
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L616
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L616
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L616
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L616
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L229
.L616:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 9
	je	.L617
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L617
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L617
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	je	.L617
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L617
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L617
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L617
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L617
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L617
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L617
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L617
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L229
.L617:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L618
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L618
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L618
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	je	.L618
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L618
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L618
	movss	xmm0, DWORD PTR _x_p8_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L618
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L619
.L618:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L619
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L619
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L619
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L619
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L619
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L619
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L229
.L619:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L621
	movss	xmm0, DWORD PTR _x_p8_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L621
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L621
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L621
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	je	.L621
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L621
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L621
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L623
.L621:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	jne	.L623
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	je	.L623
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L623
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L623
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L623
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L623
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L229
.L623:
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L624
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	test	al, al
	jne	.L624
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	test	al, al
	jne	.L624
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L624
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L624
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L624
	movss	xmm0, DWORD PTR p8_c[rip]
	movss	xmm1, DWORD PTR _x_p8_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L624
	ucomiss	xmm0, xmm1
	je	.L625
.L624:
	movzx	eax, BYTE PTR p8_l3[rip]
	test	al, al
	je	.L625
	movzx	eax, BYTE PTR p8_l2[rip]
	test	al, al
	jne	.L625
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L625
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L625
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L625
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L625
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L229
.L625:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	je	.L627
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L627
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L627
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L628
.L627:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L629
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L629
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L629
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L628
.L629:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L630
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L630
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L630
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L628
.L630:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L631
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L631
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L631
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L628
.L631:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L632
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L632
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L632
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L628
.L632:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L633
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L633
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L633
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L628
.L633:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L634
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L634
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L634
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L628
.L634:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L635
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L635
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L635
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L628
.L635:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L229
.L628:
	movss	xmm1, DWORD PTR _x_p7_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L636
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L637
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L637
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L637
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L229
.L637:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L638
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L638
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L638
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L229
.L638:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L639
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L639
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L639
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L229
.L639:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	je	.L636
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L636
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L636
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L229
.L636:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L640
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p7_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p7_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L640:
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L642
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p7_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p7_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L642:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L644
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L644
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L644
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L644
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L644
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L644
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L644
	movss	xmm0, DWORD PTR _x_p7_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L644
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L645
.L644:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L645
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L645
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L645
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L645
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L645
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L645
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L229
.L645:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L647
	movss	xmm0, DWORD PTR _x_p7_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L647
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L647
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L647
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L647
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L647
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L647
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 8
	je	.L649
.L647:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L649
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L649
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L649
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L649
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L649
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L649
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L229
.L649:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L650
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L650
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L651
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L651
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L651
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L652
.L651:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L650
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L650
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L650
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L650
.L652:
	movss	xmm0, DWORD PTR p7_c[rip]
	movss	xmm1, DWORD PTR _x_p7_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L650
	ucomiss	xmm0, xmm1
	je	.L653
.L650:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L653
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L653
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L653
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L653
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L653
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L653
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L229
.L653:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 8
	jne	.L655
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L655
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L655
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L655
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L655
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L655
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L655
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L655
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L655
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L655
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L655
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L229
.L655:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 8
	jne	.L656
	movss	xmm1, DWORD PTR p7_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L657
.L656:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L657
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L657
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L657
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L657
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L657
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L657
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L657
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L657
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L657
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L657
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L229
.L657:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L658
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L658
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L659
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L659
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L659
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L660
.L659:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L658
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L658
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L658
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L660
.L658:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L660
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L660
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L660
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L660
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L660
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L660
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L229
.L660:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L661
	movss	xmm0, DWORD PTR p7_c[rip]
	movss	xmm1, DWORD PTR _x_p7_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L661
	ucomiss	xmm0, xmm1
	je	.L662
.L661:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L662
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L662
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	je	.L662
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L662
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L662
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L662
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L662
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L662
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L662
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L662
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L229
.L662:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L664
	movss	xmm0, DWORD PTR _x_p7_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L664
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L665
.L664:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L665
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L665
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	je	.L665
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L665
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L665
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L665
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L665
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L665
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L665
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L665
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L229
.L665:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L667
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L667
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L667
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L667
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L667
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L667
	movss	xmm0, DWORD PTR _x_p7_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L667
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L668
.L667:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L668
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L668
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L668
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L668
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L668
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L668
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L229
.L668:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L670
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L670
	movss	xmm0, DWORD PTR p7_c[rip]
	movss	xmm1, DWORD PTR _x_p7_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L670
	ucomiss	xmm0, xmm1
	jne	.L670
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L672
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L672
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L672
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L673
.L672:
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L670
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L670
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L670
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L673
.L670:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L673
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L673
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L673
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L673
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L673
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L673
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L229
.L673:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 8
	jne	.L674
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L674
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L674
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	je	.L674
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L674
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L674
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L674
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L674
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L674
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L674
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L674
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L229
.L674:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 8
	je	.L675
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L675
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L675
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	je	.L675
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L675
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L675
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L675
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L675
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L675
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L675
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L675
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L229
.L675:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L676
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L676
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L676
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	je	.L676
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L676
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L676
	movss	xmm0, DWORD PTR _x_p7_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L676
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L677
.L676:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L677
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L677
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L677
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L677
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L677
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L677
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L229
.L677:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L679
	movss	xmm0, DWORD PTR _x_p7_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L679
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L679
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L679
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	je	.L679
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L679
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L679
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L681
.L679:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	jne	.L681
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	je	.L681
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L681
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L681
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L681
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L681
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L229
.L681:
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L682
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	test	al, al
	jne	.L682
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	test	al, al
	jne	.L682
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L682
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L682
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L682
	movss	xmm0, DWORD PTR p7_c[rip]
	movss	xmm1, DWORD PTR _x_p7_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L682
	ucomiss	xmm0, xmm1
	je	.L683
.L682:
	movzx	eax, BYTE PTR p7_l3[rip]
	test	al, al
	je	.L683
	movzx	eax, BYTE PTR p7_l2[rip]
	test	al, al
	jne	.L683
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L683
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L683
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L683
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L683
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L229
.L683:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	je	.L685
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L685
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L685
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L686
.L685:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L687
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L687
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L687
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L686
.L687:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L688
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L688
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L688
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L686
.L688:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L689
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L689
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L689
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L686
.L689:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L690
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L690
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L690
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L686
.L690:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L691
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L691
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L691
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L686
.L691:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L692
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L692
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L692
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L686
.L692:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L693
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L693
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L693
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L686
.L693:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L229
.L686:
	movss	xmm1, DWORD PTR _x_p6_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L694
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L695
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L695
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L695
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L229
.L695:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L696
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L696
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L696
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L229
.L696:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L697
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L697
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L697
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L229
.L697:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	je	.L694
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L694
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L694
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L229
.L694:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L698
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p6_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p6_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L698:
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L700
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p6_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p6_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L700:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L702
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L702
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L702
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L702
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L702
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L702
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L702
	movss	xmm0, DWORD PTR _x_p6_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L702
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L703
.L702:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L703
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L703
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L703
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L703
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L703
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L703
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L229
.L703:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L705
	movss	xmm0, DWORD PTR _x_p6_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L705
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L705
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L705
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L705
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L705
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L705
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 7
	je	.L707
.L705:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L707
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L707
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L707
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L707
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L707
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L707
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L229
.L707:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L708
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L708
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L709
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L709
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L709
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L710
.L709:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L708
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L708
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L708
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L708
.L710:
	movss	xmm0, DWORD PTR p6_c[rip]
	movss	xmm1, DWORD PTR _x_p6_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L708
	ucomiss	xmm0, xmm1
	je	.L711
.L708:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L711
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L711
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L711
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L711
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L711
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L711
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L229
.L711:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 7
	jne	.L713
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L713
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L713
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L713
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L713
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L713
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L713
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L713
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L713
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L713
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L713
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L229
.L713:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 7
	jne	.L714
	movss	xmm1, DWORD PTR p6_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L715
.L714:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L715
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L715
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L715
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L715
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L715
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L715
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L715
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L715
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L715
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L715
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L229
.L715:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L716
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L716
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L717
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L717
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L717
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L718
.L717:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L716
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L716
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L716
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L718
.L716:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L718
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L718
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L718
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L718
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L718
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L718
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L229
.L718:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L719
	movss	xmm0, DWORD PTR p6_c[rip]
	movss	xmm1, DWORD PTR _x_p6_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L719
	ucomiss	xmm0, xmm1
	je	.L720
.L719:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L720
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L720
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	je	.L720
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L720
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L720
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L720
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L720
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L720
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L720
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L720
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L229
.L720:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L722
	movss	xmm0, DWORD PTR _x_p6_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L722
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L723
.L722:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L723
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L723
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	je	.L723
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L723
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L723
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L723
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L723
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L723
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L723
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L723
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L229
.L723:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L725
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L725
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L725
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L725
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L725
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L725
	movss	xmm0, DWORD PTR _x_p6_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L725
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L726
.L725:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L726
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L726
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L726
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L726
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L726
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L726
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L229
.L726:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L728
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L728
	movss	xmm0, DWORD PTR p6_c[rip]
	movss	xmm1, DWORD PTR _x_p6_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L728
	ucomiss	xmm0, xmm1
	jne	.L728
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L730
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L730
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L730
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L731
.L730:
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L728
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L728
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L728
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L731
.L728:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L731
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L731
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L731
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L731
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L731
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L731
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L229
.L731:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 7
	jne	.L732
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L732
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L732
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	je	.L732
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L732
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L732
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L732
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L732
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L732
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L732
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L732
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L229
.L732:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 7
	je	.L733
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L733
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L733
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	je	.L733
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L733
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L733
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L733
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L733
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L733
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L733
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L733
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L229
.L733:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L734
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L734
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L734
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	je	.L734
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L734
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L734
	movss	xmm0, DWORD PTR _x_p6_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L734
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L735
.L734:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L735
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L735
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L735
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L735
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L735
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L735
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L229
.L735:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L737
	movss	xmm0, DWORD PTR _x_p6_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L737
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L737
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L737
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	je	.L737
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L737
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L737
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L739
.L737:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	jne	.L739
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	je	.L739
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L739
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L739
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L739
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L739
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L229
.L739:
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L740
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	test	al, al
	jne	.L740
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	test	al, al
	jne	.L740
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L740
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L740
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L740
	movss	xmm0, DWORD PTR p6_c[rip]
	movss	xmm1, DWORD PTR _x_p6_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L740
	ucomiss	xmm0, xmm1
	je	.L741
.L740:
	movzx	eax, BYTE PTR p6_l3[rip]
	test	al, al
	je	.L741
	movzx	eax, BYTE PTR p6_l2[rip]
	test	al, al
	jne	.L741
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L741
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L741
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L741
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L741
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L229
.L741:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	je	.L743
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L743
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L743
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L744
.L743:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L745
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L745
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L745
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L744
.L745:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L746
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L746
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L746
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L744
.L746:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L747
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L747
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L747
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L744
.L747:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L748
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L748
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L748
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L744
.L748:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L749
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L749
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L749
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L744
.L749:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L750
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L750
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L750
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L744
.L750:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L751
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L751
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L751
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L744
.L751:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L229
.L744:
	movss	xmm1, DWORD PTR _x_p5_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L752
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L753
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L753
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L753
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L229
.L753:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L754
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L754
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L754
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L229
.L754:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L755
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L755
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L755
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L229
.L755:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	je	.L752
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L752
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L752
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L229
.L752:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L756
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p5_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p5_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L756:
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L758
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p5_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p5_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L758:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L760
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L760
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L760
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L760
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L760
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L760
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L760
	movss	xmm0, DWORD PTR _x_p5_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L760
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L761
.L760:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L761
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L761
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L761
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L761
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L761
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L761
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L229
.L761:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L763
	movss	xmm0, DWORD PTR _x_p5_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L763
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L763
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L763
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L763
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L763
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L763
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 6
	je	.L765
.L763:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L765
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L765
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L765
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L765
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L765
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L765
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L229
.L765:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L766
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L766
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L767
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L767
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L767
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L768
.L767:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L766
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L766
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L766
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L766
.L768:
	movss	xmm0, DWORD PTR p5_c[rip]
	movss	xmm1, DWORD PTR _x_p5_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L766
	ucomiss	xmm0, xmm1
	je	.L769
.L766:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L769
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L769
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L769
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L769
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L769
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L769
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L229
.L769:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 6
	jne	.L771
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L771
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L771
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L771
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L771
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L771
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L771
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L771
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L771
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L771
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L771
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L229
.L771:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 6
	jne	.L772
	movss	xmm1, DWORD PTR p5_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L773
.L772:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L773
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L773
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L773
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L773
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L773
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L773
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L773
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L773
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L773
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L773
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L229
.L773:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L774
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L774
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L775
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L775
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L775
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L776
.L775:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L774
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L774
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L774
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L776
.L774:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L776
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L776
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L776
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L776
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L776
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L776
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L229
.L776:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L777
	movss	xmm0, DWORD PTR p5_c[rip]
	movss	xmm1, DWORD PTR _x_p5_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L777
	ucomiss	xmm0, xmm1
	je	.L778
.L777:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L778
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L778
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	je	.L778
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L778
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L778
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L778
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L778
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L778
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L778
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L778
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L229
.L778:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L780
	movss	xmm0, DWORD PTR _x_p5_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L780
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L781
.L780:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L781
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L781
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	je	.L781
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L781
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L781
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L781
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L781
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L781
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L781
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L781
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L229
.L781:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L783
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L783
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L783
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L783
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L783
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L783
	movss	xmm0, DWORD PTR _x_p5_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L783
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L784
.L783:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L784
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L784
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L784
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L784
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L784
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L784
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L229
.L784:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L786
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L786
	movss	xmm0, DWORD PTR p5_c[rip]
	movss	xmm1, DWORD PTR _x_p5_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L786
	ucomiss	xmm0, xmm1
	jne	.L786
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L788
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L788
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L788
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L789
.L788:
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L786
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L786
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L786
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L789
.L786:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L789
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L789
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L789
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L789
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L789
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L789
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L229
.L789:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 6
	jne	.L790
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L790
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L790
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	je	.L790
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L790
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L790
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L790
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L790
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L790
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L790
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L790
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L229
.L790:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 6
	je	.L791
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L791
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L791
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	je	.L791
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L791
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L791
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L791
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L791
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L791
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L791
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L791
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L229
.L791:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L792
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L792
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L792
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	je	.L792
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L792
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L792
	movss	xmm0, DWORD PTR _x_p5_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L792
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L793
.L792:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L793
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L793
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L793
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L793
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L793
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L793
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L229
.L793:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L795
	movss	xmm0, DWORD PTR _x_p5_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L795
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L795
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L795
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	je	.L795
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L795
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L795
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L797
.L795:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	jne	.L797
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	je	.L797
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L797
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L797
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L797
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L797
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L229
.L797:
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L798
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	test	al, al
	jne	.L798
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	test	al, al
	jne	.L798
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L798
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L798
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L798
	movss	xmm0, DWORD PTR p5_c[rip]
	movss	xmm1, DWORD PTR _x_p5_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L798
	ucomiss	xmm0, xmm1
	je	.L799
.L798:
	movzx	eax, BYTE PTR p5_l3[rip]
	test	al, al
	je	.L799
	movzx	eax, BYTE PTR p5_l2[rip]
	test	al, al
	jne	.L799
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L799
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L799
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L799
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L799
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L229
.L799:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	je	.L801
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L801
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L801
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L802
.L801:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L803
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L803
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L803
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L802
.L803:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L804
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L804
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L804
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L802
.L804:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L805
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L805
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L805
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L802
.L805:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L806
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L806
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L806
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L802
.L806:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L807
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L807
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L807
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L802
.L807:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L808
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L808
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L808
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L802
.L808:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L809
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L809
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L809
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L802
.L809:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L229
.L802:
	movss	xmm1, DWORD PTR _x_p4_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L810
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L811
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L811
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L811
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L229
.L811:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L812
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L812
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L812
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L229
.L812:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L813
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L813
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L813
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L229
.L813:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	je	.L810
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L810
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L810
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L229
.L810:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L814
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p4_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p4_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L814:
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L816
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p4_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p4_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L816:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L818
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L818
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L818
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L818
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L818
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L818
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L818
	movss	xmm0, DWORD PTR _x_p4_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L818
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L819
.L818:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L819
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L819
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L819
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L819
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L819
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L819
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L229
.L819:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L821
	movss	xmm0, DWORD PTR _x_p4_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L821
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L821
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L821
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L821
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L821
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L821
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 5
	je	.L823
.L821:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L823
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L823
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L823
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L823
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L823
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L823
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L229
.L823:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L824
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L824
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L825
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L825
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L825
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L826
.L825:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L824
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L824
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L824
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L824
.L826:
	movss	xmm0, DWORD PTR p4_c[rip]
	movss	xmm1, DWORD PTR _x_p4_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L824
	ucomiss	xmm0, xmm1
	je	.L827
.L824:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L827
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L827
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L827
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L827
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L827
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L827
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L229
.L827:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 5
	jne	.L829
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L829
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L829
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L829
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L829
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L829
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L829
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L829
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L829
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L829
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L829
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L229
.L829:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 5
	jne	.L830
	movss	xmm1, DWORD PTR p4_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L831
.L830:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L831
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L831
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L831
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L831
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L831
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L831
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L831
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L831
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L831
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L831
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L229
.L831:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L832
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L832
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L833
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L833
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L833
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L834
.L833:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L832
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L832
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L832
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L834
.L832:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L834
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L834
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L834
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L834
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L834
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L834
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L229
.L834:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L835
	movss	xmm0, DWORD PTR p4_c[rip]
	movss	xmm1, DWORD PTR _x_p4_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L835
	ucomiss	xmm0, xmm1
	je	.L836
.L835:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L836
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L836
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	je	.L836
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L836
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L836
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L836
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L836
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L836
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L836
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L836
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L229
.L836:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L838
	movss	xmm0, DWORD PTR _x_p4_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L838
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L839
.L838:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L839
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L839
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	je	.L839
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L839
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L839
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L839
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L839
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L839
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L839
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L839
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L229
.L839:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L841
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L841
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L841
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L841
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L841
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L841
	movss	xmm0, DWORD PTR _x_p4_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L841
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L842
.L841:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L842
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L842
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L842
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L842
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L842
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L842
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L229
.L842:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L844
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L844
	movss	xmm0, DWORD PTR p4_c[rip]
	movss	xmm1, DWORD PTR _x_p4_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L844
	ucomiss	xmm0, xmm1
	jne	.L844
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L846
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L846
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L846
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L847
.L846:
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L844
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L844
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L844
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L847
.L844:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L847
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L847
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L847
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L847
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L847
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L847
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L229
.L847:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 5
	jne	.L848
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L848
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L848
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	je	.L848
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L848
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L848
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L848
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L848
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L848
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L848
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L848
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L229
.L848:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 5
	je	.L849
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L849
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L849
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	je	.L849
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L849
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L849
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L849
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L849
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L849
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L849
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L849
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L229
.L849:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L850
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L850
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L850
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	je	.L850
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L850
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L850
	movss	xmm0, DWORD PTR _x_p4_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L850
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L851
.L850:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L851
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L851
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L851
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L851
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L851
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L851
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L229
.L851:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L853
	movss	xmm0, DWORD PTR _x_p4_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L853
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L853
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L853
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	je	.L853
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L853
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L853
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L855
.L853:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	jne	.L855
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	je	.L855
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L855
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L855
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L855
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L855
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L229
.L855:
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L856
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	test	al, al
	jne	.L856
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	test	al, al
	jne	.L856
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L856
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L856
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L856
	movss	xmm0, DWORD PTR p4_c[rip]
	movss	xmm1, DWORD PTR _x_p4_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L856
	ucomiss	xmm0, xmm1
	je	.L857
.L856:
	movzx	eax, BYTE PTR p4_l3[rip]
	test	al, al
	je	.L857
	movzx	eax, BYTE PTR p4_l2[rip]
	test	al, al
	jne	.L857
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L857
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L857
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L857
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L857
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L229
.L857:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	je	.L859
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L859
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L859
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L860
.L859:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L861
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L861
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L861
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L860
.L861:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L862
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L862
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L862
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L860
.L862:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L863
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L863
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L863
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L860
.L863:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L864
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L864
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L864
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L860
.L864:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L865
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L865
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L865
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L860
.L865:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L866
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L866
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L866
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L860
.L866:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L867
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L867
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L867
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L860
.L867:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L229
.L860:
	movss	xmm1, DWORD PTR _x_p3_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L868
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L869
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L869
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L869
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L229
.L869:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L870
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L870
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L870
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L229
.L870:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L871
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L871
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L871
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L229
.L871:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	je	.L868
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L868
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L868
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L229
.L868:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L872
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p3_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p3_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L872:
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L874
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p3_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p3_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L874:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L876
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L876
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L876
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L876
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L876
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L876
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L876
	movss	xmm0, DWORD PTR _x_p3_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L876
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L877
.L876:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L877
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L877
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L877
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L877
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L877
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L877
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L229
.L877:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L879
	movss	xmm0, DWORD PTR _x_p3_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L879
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L879
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L879
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L879
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L879
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L879
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 4
	je	.L881
.L879:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L881
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L881
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L881
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L881
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L881
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L881
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L229
.L881:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L882
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L882
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L883
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L883
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L883
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L884
.L883:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L882
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L882
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L882
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L882
.L884:
	movss	xmm0, DWORD PTR p3_c[rip]
	movss	xmm1, DWORD PTR _x_p3_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L882
	ucomiss	xmm0, xmm1
	je	.L885
.L882:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L885
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L885
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L885
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L885
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L885
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L885
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L229
.L885:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 4
	jne	.L887
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L887
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L887
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L887
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L887
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L887
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L887
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L887
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L887
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L887
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L887
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L229
.L887:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 4
	jne	.L888
	movss	xmm1, DWORD PTR p3_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L889
.L888:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L889
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L889
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L889
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L889
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L889
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L889
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L889
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L889
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L889
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L889
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L229
.L889:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L890
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L890
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L891
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L891
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L891
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L892
.L891:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L890
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L890
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L890
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L892
.L890:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L892
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L892
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L892
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L892
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L892
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L892
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L229
.L892:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L893
	movss	xmm0, DWORD PTR p3_c[rip]
	movss	xmm1, DWORD PTR _x_p3_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L893
	ucomiss	xmm0, xmm1
	je	.L894
.L893:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L894
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L894
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	je	.L894
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L894
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L894
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L894
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L894
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L894
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L894
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L894
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L229
.L894:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L896
	movss	xmm0, DWORD PTR _x_p3_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L896
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L897
.L896:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L897
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L897
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	je	.L897
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L897
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L897
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L897
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L897
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L897
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L897
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L897
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L229
.L897:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L899
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L899
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L899
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L899
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L899
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L899
	movss	xmm0, DWORD PTR _x_p3_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L899
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L900
.L899:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L900
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L900
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L900
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L900
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L900
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L900
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L229
.L900:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L902
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L902
	movss	xmm0, DWORD PTR p3_c[rip]
	movss	xmm1, DWORD PTR _x_p3_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L902
	ucomiss	xmm0, xmm1
	jne	.L902
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L904
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L904
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L904
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L905
.L904:
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L902
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L902
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L902
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L905
.L902:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L905
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L905
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L905
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L905
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L905
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L905
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L229
.L905:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 4
	jne	.L906
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L906
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L906
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	je	.L906
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L906
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L906
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L906
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L906
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L906
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L906
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L906
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L229
.L906:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 4
	je	.L907
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L907
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L907
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	je	.L907
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L907
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L907
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L907
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L907
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L907
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L907
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L907
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L229
.L907:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L908
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L908
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L908
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	je	.L908
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L908
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L908
	movss	xmm0, DWORD PTR _x_p3_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L908
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L909
.L908:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L909
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L909
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L909
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L909
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L909
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L909
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L229
.L909:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L911
	movss	xmm0, DWORD PTR _x_p3_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L911
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L911
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L911
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	je	.L911
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L911
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L911
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L913
.L911:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	jne	.L913
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	je	.L913
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L913
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L913
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L913
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L913
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L229
.L913:
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L914
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	test	al, al
	jne	.L914
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	test	al, al
	jne	.L914
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L914
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L914
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L914
	movss	xmm0, DWORD PTR p3_c[rip]
	movss	xmm1, DWORD PTR _x_p3_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L914
	ucomiss	xmm0, xmm1
	je	.L915
.L914:
	movzx	eax, BYTE PTR p3_l3[rip]
	test	al, al
	je	.L915
	movzx	eax, BYTE PTR p3_l2[rip]
	test	al, al
	jne	.L915
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L915
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L915
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L915
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L915
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L229
.L915:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	je	.L917
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L917
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L917
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L918
.L917:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L919
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L919
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L919
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L918
.L919:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L920
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L920
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L920
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L918
.L920:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L921
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L921
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L921
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L918
.L921:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L922
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L922
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L922
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L918
.L922:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L923
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L923
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L923
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L918
.L923:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L924
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L924
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L924
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L918
.L924:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L925
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L925
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L925
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L918
.L925:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L229
.L918:
	movss	xmm1, DWORD PTR _x_p2_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L926
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L927
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L927
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L927
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L229
.L927:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L928
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L928
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L928
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L229
.L928:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L929
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L929
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L929
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L229
.L929:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	je	.L926
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L926
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L926
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L229
.L926:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L930
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p2_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p2_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L930:
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L932
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p2_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p2_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L932:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L934
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L934
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L934
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L934
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L934
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L934
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L934
	movss	xmm0, DWORD PTR _x_p2_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L934
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L935
.L934:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L935
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L935
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L935
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L935
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L935
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L935
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L229
.L935:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L937
	movss	xmm0, DWORD PTR _x_p2_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L937
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L937
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L937
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L937
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L937
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L937
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 3
	je	.L939
.L937:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L939
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L939
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L939
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L939
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L939
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L939
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L229
.L939:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L940
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L940
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L941
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L941
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L941
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L942
.L941:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L940
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L940
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L940
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L940
.L942:
	movss	xmm0, DWORD PTR p2_c[rip]
	movss	xmm1, DWORD PTR _x_p2_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L940
	ucomiss	xmm0, xmm1
	je	.L943
.L940:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L943
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L943
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L943
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L943
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L943
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L943
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L229
.L943:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 3
	jne	.L945
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L945
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L945
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L945
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L945
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L945
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L945
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L945
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L945
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L945
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L945
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L229
.L945:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 3
	jne	.L946
	movss	xmm1, DWORD PTR p2_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L947
.L946:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L947
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L947
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L947
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L947
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L947
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L947
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L947
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L947
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L947
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L947
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L229
.L947:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L948
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L948
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L949
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L949
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L949
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L950
.L949:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L948
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L948
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L948
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L950
.L948:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L950
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L950
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L950
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L950
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L950
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L950
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L229
.L950:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L951
	movss	xmm0, DWORD PTR p2_c[rip]
	movss	xmm1, DWORD PTR _x_p2_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L951
	ucomiss	xmm0, xmm1
	je	.L952
.L951:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L952
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L952
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	je	.L952
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L952
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L952
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L952
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L952
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L952
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L952
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L952
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L229
.L952:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L954
	movss	xmm0, DWORD PTR _x_p2_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L954
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L955
.L954:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L955
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L955
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	je	.L955
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L955
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L955
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L955
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L955
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L955
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L955
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L955
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L229
.L955:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L957
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L957
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L957
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L957
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L957
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L957
	movss	xmm0, DWORD PTR _x_p2_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L957
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L958
.L957:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L958
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L958
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L958
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L958
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L958
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L958
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L229
.L958:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L960
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L960
	movss	xmm0, DWORD PTR p2_c[rip]
	movss	xmm1, DWORD PTR _x_p2_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L960
	ucomiss	xmm0, xmm1
	jne	.L960
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L962
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L962
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L962
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L963
.L962:
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L960
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L960
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L960
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L963
.L960:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L963
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L963
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L963
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L963
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L963
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L963
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L229
.L963:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 3
	jne	.L964
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L964
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L964
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	je	.L964
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L964
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L964
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L964
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L964
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L964
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L964
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L964
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L229
.L964:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 3
	je	.L965
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L965
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L965
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	je	.L965
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L965
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L965
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L965
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L965
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L965
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L965
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L965
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L229
.L965:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L966
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L966
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L966
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	je	.L966
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L966
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L966
	movss	xmm0, DWORD PTR _x_p2_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L966
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L967
.L966:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L967
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L967
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L967
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L967
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L967
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L967
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L229
.L967:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L969
	movss	xmm0, DWORD PTR _x_p2_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L969
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L969
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L969
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	je	.L969
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L969
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L969
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L971
.L969:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	jne	.L971
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	je	.L971
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L971
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L971
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L971
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L971
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L229
.L971:
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L972
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	test	al, al
	jne	.L972
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	test	al, al
	jne	.L972
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L972
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L972
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L972
	movss	xmm0, DWORD PTR p2_c[rip]
	movss	xmm1, DWORD PTR _x_p2_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L972
	ucomiss	xmm0, xmm1
	je	.L973
.L972:
	movzx	eax, BYTE PTR p2_l3[rip]
	test	al, al
	je	.L973
	movzx	eax, BYTE PTR p2_l2[rip]
	test	al, al
	jne	.L973
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L973
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L973
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L973
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L973
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L229
.L973:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	je	.L975
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L975
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L975
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L976
.L975:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L977
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L977
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L977
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L976
.L977:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L978
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L978
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L978
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L976
.L978:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L979
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L979
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L979
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L976
.L979:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L980
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L980
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L980
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L976
.L980:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L981
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L981
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L981
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L976
.L981:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L982
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L982
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L982
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L976
.L982:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L983
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L983
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L983
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L976
.L983:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L229
.L976:
	movss	xmm1, DWORD PTR _x_p1_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L984
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L985
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L985
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L985
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L229
.L985:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L986
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L986
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L986
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L229
.L986:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L987
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L987
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L987
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L229
.L987:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	je	.L984
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L984
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L984
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L229
.L984:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L988
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p1_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p1_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L988:
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L990
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p1_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p1_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L990:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L992
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L992
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L992
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L992
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L992
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L992
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L992
	movss	xmm0, DWORD PTR _x_p1_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L992
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L993
.L992:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L993
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L993
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L993
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L993
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L993
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L993
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L229
.L993:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L995
	movss	xmm0, DWORD PTR _x_p1_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L995
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L995
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L995
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L995
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L995
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L995
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 2
	je	.L997
.L995:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L997
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L997
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L997
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L997
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L997
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L997
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L229
.L997:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L998
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L998
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L999
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L999
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L999
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1000
.L999:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L998
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L998
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L998
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L998
.L1000:
	movss	xmm0, DWORD PTR p1_c[rip]
	movss	xmm1, DWORD PTR _x_p1_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L998
	ucomiss	xmm0, xmm1
	je	.L1001
.L998:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1001
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L1001
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L1001
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L1001
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1001
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1001
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L229
.L1001:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 2
	jne	.L1003
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1003
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1003
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1003
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L1003
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1003
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L1003
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L1003
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L1003
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1003
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1003
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L229
.L1003:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 2
	jne	.L1004
	movss	xmm1, DWORD PTR p1_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L1005
.L1004:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1005
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1005
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L1005
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1005
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1005
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L1005
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L1005
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L1005
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1005
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1005
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L229
.L1005:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1006
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1006
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1007
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1007
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1007
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1008
.L1007:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1006
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L1006
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1006
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1008
.L1006:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1008
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L1008
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L1008
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L1008
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1008
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1008
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L229
.L1008:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L1009
	movss	xmm0, DWORD PTR p1_c[rip]
	movss	xmm1, DWORD PTR _x_p1_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1009
	ucomiss	xmm0, xmm1
	je	.L1010
.L1009:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1010
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1010
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	je	.L1010
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1010
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1010
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1010
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L1010
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1010
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L1010
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L1010
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L229
.L1010:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	jne	.L1012
	movss	xmm0, DWORD PTR _x_p1_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1012
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1013
.L1012:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1013
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1013
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	je	.L1013
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1013
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L1013
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L1013
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L1013
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1013
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L1013
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1013
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L229
.L1013:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L1015
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1015
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L1015
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L1015
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L1015
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1015
	movss	xmm0, DWORD PTR _x_p1_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1015
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1016
.L1015:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1016
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L1016
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L1016
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L1016
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1016
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1016
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L229
.L1016:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1018
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1018
	movss	xmm0, DWORD PTR p1_c[rip]
	movss	xmm1, DWORD PTR _x_p1_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1018
	ucomiss	xmm0, xmm1
	jne	.L1018
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1020
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1020
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1020
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1021
.L1020:
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1018
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L1018
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1018
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L1021
.L1018:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1021
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L1021
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L1021
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L1021
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1021
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1021
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L229
.L1021:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 2
	jne	.L1022
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1022
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1022
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	je	.L1022
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1022
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1022
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1022
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L1022
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1022
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L1022
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L1022
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L229
.L1022:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 2
	je	.L1023
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1023
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1023
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	je	.L1023
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1023
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L1023
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L1023
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L1023
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1023
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L1023
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1023
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L229
.L1023:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1024
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1024
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1024
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	je	.L1024
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L1024
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1024
	movss	xmm0, DWORD PTR _x_p1_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1024
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1025
.L1024:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1025
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L1025
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L1025
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L1025
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1025
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1025
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L229
.L1025:
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1027
	movss	xmm0, DWORD PTR _x_p1_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1027
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1027
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	jne	.L1027
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	je	.L1027
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1027
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1027
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L1029
.L1027:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	jne	.L1029
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	je	.L1029
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L1029
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L1029
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1029
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1029
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L229
.L1029:
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L1030
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	test	al, al
	jne	.L1030
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	test	al, al
	jne	.L1030
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L1030
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L1030
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1030
	movss	xmm0, DWORD PTR p1_c[rip]
	movss	xmm1, DWORD PTR _x_p1_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1030
	ucomiss	xmm0, xmm1
	je	.L1031
.L1030:
	movzx	eax, BYTE PTR p1_l3[rip]
	test	al, al
	je	.L1031
	movzx	eax, BYTE PTR p1_l2[rip]
	test	al, al
	jne	.L1031
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L1031
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L1031
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1031
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1031
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L229
.L1031:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	je	.L1033
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1033
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1033
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1034
.L1033:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1035
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1035
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1035
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L1034
.L1035:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1036
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1036
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1036
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1034
.L1036:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1037
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1037
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1037
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1034
.L1037:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1038
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1038
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1038
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1034
.L1038:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1039
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1039
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1039
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L1034
.L1039:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1040
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1040
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1040
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1034
.L1040:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1041
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1041
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1041
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1034
.L1041:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L229
.L1034:
	movss	xmm1, DWORD PTR _x_p0_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L1042
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1043
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1043
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1043
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L229
.L1043:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1044
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1044
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1044
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L229
.L1044:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1045
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1045
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1045
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L229
.L1045:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	je	.L1042
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1042
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1042
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L229
.L1042:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L1046
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p0_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p0_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L1046:
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	jne	.L1048
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p0_c[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p0_c[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L1048:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1050
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1050
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1050
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L1050
	mov	eax, DWORD PTR v1[rip]
	test	eax, eax
	jne	.L1050
	movss	xmm0, DWORD PTR _x_p0_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1050
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1050
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1050
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	je	.L1052
.L1050:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1052
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L1052
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L1052
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L1052
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1052
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1052
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L229
.L1052:
	movss	xmm0, DWORD PTR _x_p0_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1054
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1054
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1054
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1054
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1054
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1054
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1054
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 1
	je	.L1056
.L1054:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1056
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L1056
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L1056
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L1056
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1056
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1056
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L229
.L1056:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1058
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1058
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1058
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1059
.L1058:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1060
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1060
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1060
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1060
.L1059:
	movss	xmm0, DWORD PTR p0_c[rip]
	movss	xmm1, DWORD PTR _x_p0_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1060
	ucomiss	xmm0, xmm1
	jne	.L1060
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1060
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	je	.L1062
.L1060:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1062
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L1062
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L1062
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L1062
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1062
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1062
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L229
.L1062:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 1
	jne	.L1064
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1064
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1064
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1064
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L1064
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1064
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L1064
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L1064
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L1064
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1064
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1064
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L229
.L1064:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 1
	jne	.L1066
	movss	xmm1, DWORD PTR p0_c[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L1067
.L1066:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1067
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1067
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1067
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1067
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1067
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L1067
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L1067
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L1067
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1067
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1067
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L229
.L1067:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1069
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1069
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1070
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1070
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1070
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1071
.L1070:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1069
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1069
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1069
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1071
.L1069:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1071
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L1071
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L1071
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L1071
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1071
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1071
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L229
.L1071:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L1073
	movss	xmm0, DWORD PTR p0_c[rip]
	movss	xmm1, DWORD PTR _x_p0_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1073
	ucomiss	xmm0, xmm1
	je	.L1074
.L1073:
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1074
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1074
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1074
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1074
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1074
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1074
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L1074
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1074
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L1074
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L1074
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L229
.L1074:
	movss	xmm0, DWORD PTR _x_p0_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1076
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1076
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	je	.L1078
.L1076:
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1078
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1078
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1078
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1078
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L1078
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L1078
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L1078
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1078
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1078
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1078
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L229
.L1078:
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L1079
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1079
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1079
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1079
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L1079
	movss	xmm0, DWORD PTR _x_p0_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1079
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1079
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	je	.L1081
.L1079:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1081
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L1081
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L1081
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L1081
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1081
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1081
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L229
.L1081:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1083
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1083
	movss	xmm0, DWORD PTR p0_c[rip]
	movss	xmm1, DWORD PTR _x_p0_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1083
	ucomiss	xmm0, xmm1
	jne	.L1083
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1085
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1085
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1085
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1086
.L1085:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1083
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1083
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1083
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1086
.L1083:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1086
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L1086
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L1086
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L1086
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1086
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1086
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L229
.L1086:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 1
	jne	.L1088
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1088
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1088
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1088
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1088
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1088
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1088
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L1088
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1088
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L1088
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L1088
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L229
.L1088:
	mov	eax, DWORD PTR v1[rip]
	cmp	eax, 1
	je	.L1089
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1089
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1089
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1089
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1089
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L1089
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L1089
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L1089
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1089
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1089
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1089
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L229
.L1089:
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1090
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1090
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1090
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	je	.L1090
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L1090
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L1090
	movss	xmm0, DWORD PTR _x_p0_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1090
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1091
.L1090:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1091
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L1091
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L1091
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L1091
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1091
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1091
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L229
.L1091:
	movss	xmm0, DWORD PTR _x_p0_c[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1094
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1094
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L1094
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	je	.L1094
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1094
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1094
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L1094
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	je	.L1096
.L1094:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	jne	.L1096
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	je	.L1096
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L1096
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L1096
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1096
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1096
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L229
.L1096:
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	test	al, al
	jne	.L1098
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	test	al, al
	jne	.L1098
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L1098
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L1098
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L1098
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L1098
	movss	xmm0, DWORD PTR p0_c[rip]
	movss	xmm1, DWORD PTR _x_p0_c[rip]
	ucomiss	xmm0, xmm1
	jp	.L1098
	ucomiss	xmm0, xmm1
	je	.L1099
.L1098:
	movzx	eax, BYTE PTR p0_l3[rip]
	test	al, al
	je	.L1099
	movzx	eax, BYTE PTR p0_l2[rip]
	test	al, al
	jne	.L1099
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L1099
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L1099
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	je	.L1099
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1099
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L229
.L1099:
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 15
	je	.L1102
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 14
	je	.L1102
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 13
	je	.L1102
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 12
	je	.L1102
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 11
	je	.L1102
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 10
	je	.L1102
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 9
	je	.L1102
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 8
	je	.L1102
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 7
	je	.L1102
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 6
	je	.L1102
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 5
	je	.L1102
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 4
	je	.L1102
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 3
	je	.L1102
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 2
	je	.L1102
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	eax, 1
	je	.L1102
	mov	eax, DWORD PTR _x_v1[rip]
	test	eax, eax
	jne	.L229
.L1102:
	movss	xmm0, DWORD PTR _x_delta[rip]
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jb	.L229
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L1104
	movzx	eax, BYTE PTR v2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_v2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L229
	mov	edx, DWORD PTR v1[rip]
	mov	eax, DWORD PTR _x_v1[rip]
	cmp	edx, eax
	jne	.L229
.L1104:
	movzx	eax, BYTE PTR p14_evt[rip]
	test	al, al
	jne	.L1105
	movzx	eax, BYTE PTR p13_evt[rip]
	test	al, al
	jne	.L1105
	movzx	eax, BYTE PTR p12_evt[rip]
	test	al, al
	jne	.L1105
	movzx	eax, BYTE PTR p11_evt[rip]
	test	al, al
	jne	.L1105
	movzx	eax, BYTE PTR p10_evt[rip]
	test	al, al
	jne	.L1105
	movzx	eax, BYTE PTR p9_evt[rip]
	test	al, al
	jne	.L1105
	movzx	eax, BYTE PTR p8_evt[rip]
	test	al, al
	jne	.L1105
	movzx	eax, BYTE PTR p7_evt[rip]
	test	al, al
	jne	.L1105
	movzx	eax, BYTE PTR p6_evt[rip]
	test	al, al
	jne	.L1105
	movzx	eax, BYTE PTR p5_evt[rip]
	test	al, al
	jne	.L1105
	movzx	eax, BYTE PTR p4_evt[rip]
	test	al, al
	jne	.L1105
	movzx	eax, BYTE PTR p3_evt[rip]
	test	al, al
	jne	.L1105
	movzx	eax, BYTE PTR p2_evt[rip]
	test	al, al
	jne	.L1105
	movzx	eax, BYTE PTR p0_evt[rip]
	test	al, al
	jne	.L1105
	movzx	eax, BYTE PTR p1_evt[rip]
	test	al, al
	jne	.L1105
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1105
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L229
.L1105:
	movss	xmm0, DWORD PTR delta[rip]
	movss	xmm1, DWORD PTR _x__diverge_delta[rip]
	ucomiss	xmm0, xmm1
	jp	.L1181
	ucomiss	xmm0, xmm1
	je	.L1107
.L1181:
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	movss	xmm1, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L229
.L1107:
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	movss	xmm1, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	jnb	.L1109
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x__diverge_delta[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L229
.L1109:
	mov	eax, 1
	jmp	.L1111
.L229:
	mov	eax, 0
.L1111:
	mov	DWORD PTR -4[rbp], eax
	movzx	eax, BYTE PTR _x_p14_l3[rip]
	mov	BYTE PTR p14_l3[rip], al
	movzx	eax, BYTE PTR _x_p12_l3[rip]
	mov	BYTE PTR p12_l3[rip], al
	movzx	eax, BYTE PTR _x_p12_l2[rip]
	mov	BYTE PTR p12_l2[rip], al
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	mov	BYTE PTR p12_l1[rip], al
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	mov	BYTE PTR p12_l0[rip], al
	movzx	eax, BYTE PTR _x_p12_evt[rip]
	mov	BYTE PTR p12_evt[rip], al
	movss	xmm0, DWORD PTR _x_p12_c[rip]
	movss	DWORD PTR p12_c[rip], xmm0
	movss	xmm0, DWORD PTR _x__diverge_delta[rip]
	movss	DWORD PTR _diverge_delta[rip], xmm0
	movzx	eax, BYTE PTR _x_p10_l3[rip]
	mov	BYTE PTR p10_l3[rip], al
	movzx	eax, BYTE PTR _x_p10_l2[rip]
	mov	BYTE PTR p10_l2[rip], al
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	mov	BYTE PTR p10_l1[rip], al
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	mov	BYTE PTR p10_l0[rip], al
	movzx	eax, BYTE PTR _x_p10_evt[rip]
	mov	BYTE PTR p10_evt[rip], al
	movss	xmm0, DWORD PTR _x_p10_c[rip]
	movss	DWORD PTR p10_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p3_l3[rip]
	mov	BYTE PTR p3_l3[rip], al
	movzx	eax, BYTE PTR _x_p3_evt[rip]
	mov	BYTE PTR p3_evt[rip], al
	movzx	eax, BYTE PTR _x_p0_l2[rip]
	mov	BYTE PTR p0_l2[rip], al
	movzx	eax, BYTE PTR _x_p14_l2[rip]
	mov	BYTE PTR p14_l2[rip], al
	movzx	eax, BYTE PTR _x_p8_l3[rip]
	mov	BYTE PTR p8_l3[rip], al
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	mov	BYTE PTR p0_l1[rip], al
	movzx	eax, BYTE PTR _x_p2_l3[rip]
	mov	BYTE PTR p2_l3[rip], al
	movzx	eax, BYTE PTR _x_p2_evt[rip]
	mov	BYTE PTR p2_evt[rip], al
	movzx	eax, BYTE PTR _x_p14_evt[rip]
	mov	BYTE PTR p14_evt[rip], al
	movss	xmm0, DWORD PTR _x_delta[rip]
	movss	DWORD PTR delta[rip], xmm0
	mov	eax, DWORD PTR _x_v1[rip]
	mov	DWORD PTR v1[rip], eax
	movzx	eax, BYTE PTR _x_v2[rip]
	mov	BYTE PTR v2[rip], al
	movss	xmm0, DWORD PTR _x_p8_c[rip]
	movss	DWORD PTR p8_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p0_l3[rip]
	mov	BYTE PTR p0_l3[rip], al
	movss	xmm0, DWORD PTR _x_p14_c[rip]
	movss	DWORD PTR p14_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p8_evt[rip]
	mov	BYTE PTR p8_evt[rip], al
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	mov	BYTE PTR p14_l1[rip], al
	movzx	eax, BYTE PTR _x_p8_l2[rip]
	mov	BYTE PTR p8_l2[rip], al
	movzx	eax, BYTE PTR _x_p13_evt[rip]
	mov	BYTE PTR p13_evt[rip], al
	movzx	eax, BYTE PTR _x_p4_evt[rip]
	mov	BYTE PTR p4_evt[rip], al
	movss	xmm0, DWORD PTR _x_p1_c[rip]
	movss	DWORD PTR p1_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p9_l3[rip]
	mov	BYTE PTR p9_l3[rip], al
	movzx	eax, BYTE PTR _x_p3_l2[rip]
	mov	BYTE PTR p3_l2[rip], al
	movzx	eax, BYTE PTR _x_p6_l3[rip]
	mov	BYTE PTR p6_l3[rip], al
	movzx	eax, BYTE PTR _x_p1_l3[rip]
	mov	BYTE PTR p1_l3[rip], al
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	mov	BYTE PTR p0_l0[rip], al
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	mov	BYTE PTR p14_l0[rip], al
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	mov	BYTE PTR p8_l1[rip], al
	movzx	eax, BYTE PTR _x_p1_evt[rip]
	mov	BYTE PTR p1_evt[rip], al
	movzx	eax, BYTE PTR _x_p13_l2[rip]
	mov	BYTE PTR p13_l2[rip], al
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	mov	BYTE PTR p1_l1[rip], al
	movzx	eax, BYTE PTR _x_p7_l3[rip]
	mov	BYTE PTR p7_l3[rip], al
	movzx	eax, BYTE PTR _x_p4_l2[rip]
	mov	BYTE PTR p4_l2[rip], al
	movzx	eax, BYTE PTR _x_p13_l3[rip]
	mov	BYTE PTR p13_l3[rip], al
	movzx	eax, BYTE PTR _x_p1_l2[rip]
	mov	BYTE PTR p1_l2[rip], al
	movzx	eax, BYTE PTR _x_p4_l3[rip]
	mov	BYTE PTR p4_l3[rip], al
	movss	xmm0, DWORD PTR _x_p11_c[rip]
	movss	DWORD PTR p11_c[rip], xmm0
	movss	xmm0, DWORD PTR _x_p5_c[rip]
	movss	DWORD PTR p5_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p11_evt[rip]
	mov	BYTE PTR p11_evt[rip], al
	movss	xmm0, DWORD PTR _x_p2_c[rip]
	movss	DWORD PTR p2_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p5_evt[rip]
	mov	BYTE PTR p5_evt[rip], al
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	mov	BYTE PTR p11_l0[rip], al
	movss	xmm0, DWORD PTR _x_p0_c[rip]
	movss	DWORD PTR p0_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	mov	BYTE PTR p5_l0[rip], al
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	mov	BYTE PTR p11_l1[rip], al
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	mov	BYTE PTR p2_l0[rip], al
	movzx	eax, BYTE PTR _x_p0_evt[rip]
	mov	BYTE PTR p0_evt[rip], al
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	mov	BYTE PTR p5_l1[rip], al
	movzx	eax, BYTE PTR _x_p11_l2[rip]
	mov	BYTE PTR p11_l2[rip], al
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	mov	BYTE PTR p2_l1[rip], al
	movzx	eax, BYTE PTR _x_p5_l2[rip]
	mov	BYTE PTR p5_l2[rip], al
	movzx	eax, BYTE PTR _x_p11_l3[rip]
	mov	BYTE PTR p11_l3[rip], al
	movzx	eax, BYTE PTR _x_p2_l2[rip]
	mov	BYTE PTR p2_l2[rip], al
	movzx	eax, BYTE PTR _x_p5_l3[rip]
	mov	BYTE PTR p5_l3[rip], al
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	mov	BYTE PTR p9_l0[rip], al
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	mov	BYTE PTR p6_l0[rip], al
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	mov	BYTE PTR p9_l1[rip], al
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	mov	BYTE PTR p3_l0[rip], al
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	mov	BYTE PTR p6_l1[rip], al
	movzx	eax, BYTE PTR _x_p9_l2[rip]
	mov	BYTE PTR p9_l2[rip], al
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	mov	BYTE PTR p3_l1[rip], al
	movzx	eax, BYTE PTR _x_p6_l2[rip]
	mov	BYTE PTR p6_l2[rip], al
	movss	xmm0, DWORD PTR _x_p7_c[rip]
	movss	DWORD PTR p7_c[rip], xmm0
	movss	xmm0, DWORD PTR _x_p13_c[rip]
	movss	DWORD PTR p13_c[rip], xmm0
	movss	xmm0, DWORD PTR _x_p4_c[rip]
	movss	DWORD PTR p4_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p7_evt[rip]
	mov	BYTE PTR p7_evt[rip], al
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	mov	BYTE PTR p7_l0[rip], al
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	mov	BYTE PTR p13_l0[rip], al
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	mov	BYTE PTR p4_l0[rip], al
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	mov	BYTE PTR p7_l1[rip], al
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	mov	BYTE PTR p13_l1[rip], al
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	mov	BYTE PTR p1_l0[rip], al
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	mov	BYTE PTR p4_l1[rip], al
	movzx	eax, BYTE PTR _x_p7_l2[rip]
	mov	BYTE PTR p7_l2[rip], al
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	mov	BYTE PTR p8_l0[rip], al
	movss	xmm0, DWORD PTR _x_p6_c[rip]
	movss	DWORD PTR p6_c[rip], xmm0
	movss	xmm0, DWORD PTR _x_p9_c[rip]
	movss	DWORD PTR p9_c[rip], xmm0
	movss	xmm0, DWORD PTR _x_p3_c[rip]
	movss	DWORD PTR p3_c[rip], xmm0
	movzx	eax, BYTE PTR _x_p6_evt[rip]
	mov	BYTE PTR p6_evt[rip], al
	movzx	eax, BYTE PTR _x_p9_evt[rip]
	mov	BYTE PTR p9_evt[rip], al
.L219:
	cmp	DWORD PTR -4[rbp], 0
	jne	.L1112
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	main, .-main
	.section	.rodata
	.align 4
.LC1:
	.long	1098907648
	.align 4
.LC3:
	.long	1065353216
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"487645.c"
	.text
	.align	2
	.global	__VERIFIER_nondet_bool
	.syntax unified
	.arm
	.fpu softvfp
	.type	__VERIFIER_nondet_bool, %function
__VERIFIER_nondet_bool:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	pop	{fp, pc}
	.size	__VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
	.comm	p14_l3,1,1
	.comm	_x_p14_l3,1,1
	.comm	p12_l3,1,1
	.comm	_x_p12_l3,1,1
	.comm	p12_l2,1,1
	.comm	_x_p12_l2,1,1
	.comm	p12_l1,1,1
	.comm	_x_p12_l1,1,1
	.comm	p12_l0,1,1
	.comm	_x_p12_l0,1,1
	.comm	p12_evt,1,1
	.comm	_x_p12_evt,1,1
	.comm	p12_c,4,4
	.comm	_x_p12_c,4,4
	.comm	_diverge_delta,4,4
	.comm	_x__diverge_delta,4,4
	.comm	p10_l3,1,1
	.comm	_x_p10_l3,1,1
	.comm	p10_l2,1,1
	.comm	_x_p10_l2,1,1
	.comm	p10_l1,1,1
	.comm	_x_p10_l1,1,1
	.comm	p10_l0,1,1
	.comm	_x_p10_l0,1,1
	.comm	p10_evt,1,1
	.comm	_x_p10_evt,1,1
	.comm	p10_c,4,4
	.comm	_x_p10_c,4,4
	.comm	p3_l3,1,1
	.comm	_x_p3_l3,1,1
	.comm	p3_evt,1,1
	.comm	_x_p3_evt,1,1
	.comm	p0_l2,1,1
	.comm	_x_p0_l2,1,1
	.comm	p14_l2,1,1
	.comm	_x_p14_l2,1,1
	.comm	p8_l3,1,1
	.comm	_x_p8_l3,1,1
	.comm	p0_l1,1,1
	.comm	_x_p0_l1,1,1
	.comm	p2_l3,1,1
	.comm	_x_p2_l3,1,1
	.comm	p2_evt,1,1
	.comm	_x_p2_evt,1,1
	.comm	p14_evt,1,1
	.comm	_x_p14_evt,1,1
	.comm	delta,4,4
	.comm	_x_delta,4,4
	.comm	v1,4,4
	.comm	_x_v1,4,4
	.comm	v2,1,1
	.comm	_x_v2,1,1
	.comm	p8_c,4,4
	.comm	_x_p8_c,4,4
	.comm	p0_l3,1,1
	.comm	_x_p0_l3,1,1
	.comm	p14_c,4,4
	.comm	_x_p14_c,4,4
	.comm	p8_evt,1,1
	.comm	_x_p8_evt,1,1
	.comm	p14_l1,1,1
	.comm	_x_p14_l1,1,1
	.comm	p8_l2,1,1
	.comm	_x_p8_l2,1,1
	.comm	p13_evt,1,1
	.comm	_x_p13_evt,1,1
	.comm	p4_evt,1,1
	.comm	_x_p4_evt,1,1
	.comm	p1_c,4,4
	.comm	_x_p1_c,4,4
	.comm	p9_l3,1,1
	.comm	_x_p9_l3,1,1
	.comm	p3_l2,1,1
	.comm	_x_p3_l2,1,1
	.comm	p6_l3,1,1
	.comm	_x_p6_l3,1,1
	.comm	p1_l3,1,1
	.comm	_x_p1_l3,1,1
	.comm	p0_l0,1,1
	.comm	_x_p0_l0,1,1
	.comm	p14_l0,1,1
	.comm	_x_p14_l0,1,1
	.comm	p8_l1,1,1
	.comm	_x_p8_l1,1,1
	.comm	p1_evt,1,1
	.comm	_x_p1_evt,1,1
	.comm	p13_l2,1,1
	.comm	_x_p13_l2,1,1
	.comm	p1_l1,1,1
	.comm	_x_p1_l1,1,1
	.comm	p7_l3,1,1
	.comm	_x_p7_l3,1,1
	.comm	p4_l2,1,1
	.comm	_x_p4_l2,1,1
	.comm	p13_l3,1,1
	.comm	_x_p13_l3,1,1
	.comm	p1_l2,1,1
	.comm	_x_p1_l2,1,1
	.comm	p4_l3,1,1
	.comm	_x_p4_l3,1,1
	.comm	p11_c,4,4
	.comm	_x_p11_c,4,4
	.comm	p5_c,4,4
	.comm	_x_p5_c,4,4
	.comm	p11_evt,1,1
	.comm	_x_p11_evt,1,1
	.comm	p2_c,4,4
	.comm	_x_p2_c,4,4
	.comm	p5_evt,1,1
	.comm	_x_p5_evt,1,1
	.comm	p11_l0,1,1
	.comm	_x_p11_l0,1,1
	.comm	p0_c,4,4
	.comm	_x_p0_c,4,4
	.comm	p5_l0,1,1
	.comm	_x_p5_l0,1,1
	.comm	p11_l1,1,1
	.comm	_x_p11_l1,1,1
	.comm	p2_l0,1,1
	.comm	_x_p2_l0,1,1
	.comm	p0_evt,1,1
	.comm	_x_p0_evt,1,1
	.comm	p5_l1,1,1
	.comm	_x_p5_l1,1,1
	.comm	p11_l2,1,1
	.comm	_x_p11_l2,1,1
	.comm	p2_l1,1,1
	.comm	_x_p2_l1,1,1
	.comm	p5_l2,1,1
	.comm	_x_p5_l2,1,1
	.comm	p11_l3,1,1
	.comm	_x_p11_l3,1,1
	.comm	p2_l2,1,1
	.comm	_x_p2_l2,1,1
	.comm	p5_l3,1,1
	.comm	_x_p5_l3,1,1
	.comm	p9_l0,1,1
	.comm	_x_p9_l0,1,1
	.comm	p6_l0,1,1
	.comm	_x_p6_l0,1,1
	.comm	p9_l1,1,1
	.comm	_x_p9_l1,1,1
	.comm	p3_l0,1,1
	.comm	_x_p3_l0,1,1
	.comm	p6_l1,1,1
	.comm	_x_p6_l1,1,1
	.comm	p9_l2,1,1
	.comm	_x_p9_l2,1,1
	.comm	p3_l1,1,1
	.comm	_x_p3_l1,1,1
	.comm	p6_l2,1,1
	.comm	_x_p6_l2,1,1
	.comm	p7_c,4,4
	.comm	_x_p7_c,4,4
	.comm	p13_c,4,4
	.comm	_x_p13_c,4,4
	.comm	p4_c,4,4
	.comm	_x_p4_c,4,4
	.comm	p7_evt,1,1
	.comm	_x_p7_evt,1,1
	.comm	p7_l0,1,1
	.comm	_x_p7_l0,1,1
	.comm	p13_l0,1,1
	.comm	_x_p13_l0,1,1
	.comm	p4_l0,1,1
	.comm	_x_p4_l0,1,1
	.comm	p7_l1,1,1
	.comm	_x_p7_l1,1,1
	.comm	p13_l1,1,1
	.comm	_x_p13_l1,1,1
	.comm	p1_l0,1,1
	.comm	_x_p1_l0,1,1
	.comm	p4_l1,1,1
	.comm	_x_p4_l1,1,1
	.comm	p7_l2,1,1
	.comm	_x_p7_l2,1,1
	.comm	p8_l0,1,1
	.comm	_x_p8_l0,1,1
	.comm	p6_c,4,4
	.comm	_x_p6_c,4,4
	.comm	p9_c,4,4
	.comm	_x_p9_c,4,4
	.comm	p3_c,4,4
	.comm	_x_p3_c,4,4
	.comm	p6_evt,1,1
	.comm	_x_p6_evt,1,1
	.comm	p9_evt,1,1
	.comm	_x_p9_evt,1,1
	.global	__aeabi_fcmpeq
	.global	__aeabi_fcmple
	.global	__aeabi_fcmpge
	.global	__aeabi_f2d
	.global	__aeabi_dsub
	.global	__aeabi_dadd
	.global	__aeabi_dcmpeq
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #8
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+4
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+8
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+12
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+16
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+20
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1095+24
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1095+28
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+32
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+36
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+40
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+44
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+48
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1095+52
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+56
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+60
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+64
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+68
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+72
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+76
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+80
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+84
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+88
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1095+92
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L1095+96
	str	r3, [r2]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+100
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1095+404
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+104
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1095+108
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+112
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+116
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+408
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+120
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+124
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1095+128
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+388
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+132
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+136
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+140
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+144
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+148
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+416
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+152
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+156
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+160
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+164
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+168
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+172
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+176
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+180
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1095+340
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1095+184
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+188
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1095+192
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+196
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+352
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1095+200
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+204
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+356
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+208
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+212
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+216
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+348
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+220
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+224
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+344
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+228
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+232
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+396
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+236
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+400
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+240
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+244
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+392
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+248
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+252
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1095+256
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1095+260
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1095+264
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+268
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+272
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+276
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+280
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+284
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+288
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+292
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+296
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+300
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+412
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1095+304
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1095+380
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1095+308
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+312
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1095+316
	strb	r2, [r3]
	ldr	r3, .L1095
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1095
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L6
	ldr	r3, .L1095+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L6
	ldr	r3, .L1095+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L6
	ldr	r3, .L1095+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L6:
	ldr	r3, .L1095
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1095+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1095+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1095+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L7
.L8:
	ldr	r3, .L1095
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L9
	ldr	r3, .L1095+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L9
	ldr	r3, .L1095+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L9
	ldr	r3, .L1095+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L9:
	ldr	r3, .L1095
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L10
	ldr	r3, .L1095+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L10
	ldr	r3, .L1095+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L10
	ldr	r3, .L1095+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L10:
	ldr	r3, .L1095
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L11
	ldr	r3, .L1095+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L11
	ldr	r3, .L1095+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L11
	ldr	r3, .L1095+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L11:
	ldr	r3, .L1095
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L12
	ldr	r3, .L1095+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L12
	ldr	r3, .L1095+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L12
	ldr	r3, .L1095+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L7
.L12:
	ldr	r3, .L1095
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L1095+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L1095+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L1095+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L13:
	ldr	r3, .L1095
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L14
	ldr	r3, .L1095+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L14
	ldr	r3, .L1095+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L14
	ldr	r3, .L1095+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L14:
	ldr	r3, .L1095
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1095+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L7:
	ldr	r3, .L1095+108
	ldr	r3, [r3]	@ float
	ldr	r1, .L1095+384
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L15
	ldr	r3, .L1095
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L16
	ldr	r3, .L1095+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L16
	ldr	r3, .L1095+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L16
	ldr	r3, .L1095+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L16:
	ldr	r3, .L1095
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L17
	ldr	r3, .L1095+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L17
	ldr	r3, .L1095+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L17
	ldr	r3, .L1095+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L17:
	ldr	r3, .L1095
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L18
	ldr	r3, .L1095+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L18
	ldr	r3, .L1095+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L18
	ldr	r3, .L1095+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L18:
	ldr	r3, .L1095
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L15
	ldr	r3, .L1095+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L15
	ldr	r3, .L1095+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L15
	ldr	r3, .L1095+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L15:
	ldr	r3, .L1095+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+260
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1095+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L20
	ldr	r3, .L1095+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L20
	ldr	r3, .L1095+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L20
	ldr	r3, .L1095+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L21
.L20:
	ldr	r3, .L1095+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L22
	ldr	r3, .L1095+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L22
	ldr	r3, .L1095+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L22
	ldr	r3, .L1095+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L21
.L22:
	ldr	r3, .L1095+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L23
	ldr	r3, .L1095+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L23
	ldr	r3, .L1095+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L23
	ldr	r3, .L1095+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L21
.L23:
	ldr	r3, .L1095+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L24
	ldr	r3, .L1095+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L24
	ldr	r3, .L1095+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L24
	ldr	r3, .L1095+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L21
.L24:
	ldr	r3, .L1095+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L25
	ldr	r3, .L1095+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L25
	ldr	r3, .L1095+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L25
	ldr	r3, .L1095+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L21
.L25:
	ldr	r3, .L1095+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L26
	ldr	r3, .L1095+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L26
	ldr	r3, .L1095+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L26
	ldr	r3, .L1095+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L21
.L26:
	ldr	r3, .L1095+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L27
	ldr	r3, .L1095+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L27
	ldr	r3, .L1095+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L27
	ldr	r3, .L1095+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L21
.L27:
	ldr	r3, .L1095+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L28
	ldr	r3, .L1095+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L28
	ldr	r3, .L1095+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L28
	ldr	r3, .L1095+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L21
.L28:
	ldr	r3, .L1095+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1095+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L21:
	ldr	r3, .L1095+260
	ldr	r3, [r3]	@ float
	ldr	r1, .L1095+384
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L29
	ldr	r3, .L1095+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L30
	ldr	r3, .L1095+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L30
	ldr	r3, .L1095+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L30
	ldr	r3, .L1095+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L30:
	ldr	r3, .L1095+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L31
	ldr	r3, .L1095+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L31
	ldr	r3, .L1095+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L31
	ldr	r3, .L1095+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L31:
	ldr	r3, .L1095+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L32
	ldr	r3, .L1095+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L32
	ldr	r3, .L1095+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L32
	ldr	r3, .L1095+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L32:
	ldr	r3, .L1095+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L29
	ldr	r3, .L1095+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L29
	ldr	r3, .L1095+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L29
	ldr	r3, .L1095+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L29:
	ldr	r3, .L1095+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+24
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1095+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L34
	ldr	r3, .L1095+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L34
	ldr	r3, .L1095+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L34
	ldr	r3, .L1095+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L35
.L34:
	ldr	r3, .L1095+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L36
	ldr	r3, .L1095+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L36
	ldr	r3, .L1095+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L36
	ldr	r3, .L1095+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L35
.L36:
	ldr	r3, .L1095+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L37
	ldr	r3, .L1095+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L37
	ldr	r3, .L1095+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L37
	ldr	r3, .L1095+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L35
.L37:
	ldr	r3, .L1095+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L38
	ldr	r3, .L1095+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L38
	ldr	r3, .L1095+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L38
	ldr	r3, .L1095+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L35
.L38:
	ldr	r3, .L1095+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L39
	ldr	r3, .L1095+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	b	.L1096
.L1097:
	.align	2
.L1095:
	.word	p14_l3
	.word	p12_l3
	.word	p12_l2
	.word	p12_l1
	.word	p12_l0
	.word	p12_evt
	.word	p12_c
	.word	_diverge_delta
	.word	p10_l3
	.word	p10_l2
	.word	p10_l1
	.word	p10_l0
	.word	p10_evt
	.word	p10_c
	.word	p3_l3
	.word	p3_evt
	.word	p0_l2
	.word	p14_l2
	.word	p8_l3
	.word	p0_l1
	.word	p2_l3
	.word	p2_evt
	.word	p14_evt
	.word	delta
	.word	v1
	.word	v2
	.word	p0_l3
	.word	p14_c
	.word	p8_evt
	.word	p14_l1
	.word	p13_evt
	.word	p4_evt
	.word	p1_c
	.word	p3_l2
	.word	p6_l3
	.word	p1_l3
	.word	p0_l0
	.word	p14_l0
	.word	p1_evt
	.word	p13_l2
	.word	p1_l1
	.word	p7_l3
	.word	p4_l2
	.word	p13_l3
	.word	p1_l2
	.word	p4_l3
	.word	p5_c
	.word	p11_evt
	.word	p2_c
	.word	p5_evt
	.word	p0_c
	.word	p5_l0
	.word	p2_l0
	.word	p0_evt
	.word	p5_l1
	.word	p2_l1
	.word	p5_l2
	.word	p2_l2
	.word	p5_l3
	.word	p6_l0
	.word	p3_l0
	.word	p6_l1
	.word	p3_l1
	.word	p6_l2
	.word	p7_c
	.word	p13_c
	.word	p4_c
	.word	p7_evt
	.word	p7_l0
	.word	p13_l0
	.word	p4_l0
	.word	p7_l1
	.word	p13_l1
	.word	p1_l0
	.word	p4_l1
	.word	p7_l2
	.word	p6_c
	.word	p3_c
	.word	p6_evt
	.word	p9_evt
	.word	p12_c
	.word	p12_l3
	.word	p12_l2
	.word	p12_l0
	.word	p12_l1
	.word	p11_c
	.word	p11_l3
	.word	p11_l2
	.word	p11_l0
	.word	p11_l1
	.word	p10_c
	.word	p10_l3
	.word	p10_l2
	.word	p10_l0
	.word	p10_l1
	.word	p9_c
	.word	1098907648
	.word	p9_l3
	.word	p9_l2
	.word	p9_l0
	.word	p9_l1
	.word	p8_c
	.word	p8_l2
	.word	p8_l0
	.word	p8_l1
	.word	p8_l3
.L1096:
	cmp	r3, #0
	beq	.L39
	ldr	r3, .L1095+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L39
	ldr	r3, .L1095+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L35
.L39:
	ldr	r3, .L1095+324
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L40
	ldr	r3, .L1095+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L40
	ldr	r3, .L1095+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L40
	ldr	r3, .L1095+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L35
.L40:
	ldr	r3, .L1095+324
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L41
	ldr	r3, .L1095+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L41
	ldr	r3, .L1095+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L41
	ldr	r3, .L1095+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L35
.L41:
	ldr	r3, .L1095+324
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L42
	ldr	r3, .L1095+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L42
	ldr	r3, .L1095+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L42
	ldr	r3, .L1095+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L35
.L42:
	ldr	r3, .L1095+324
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1095+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L35:
	ldr	r3, .L1095+320
	ldr	r3, [r3]	@ float
	ldr	r1, .L1095+384
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L43
	ldr	r3, .L1095+324
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L44
	ldr	r3, .L1095+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L44
	ldr	r3, .L1095+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L44
	ldr	r3, .L1095+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L44:
	ldr	r3, .L1095+324
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L45
	ldr	r3, .L1095+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L45
	ldr	r3, .L1095+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L45
	ldr	r3, .L1095+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L45:
	ldr	r3, .L1095+324
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L46
	ldr	r3, .L1095+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L46
	ldr	r3, .L1095+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L46
	ldr	r3, .L1095+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L46:
	ldr	r3, .L1095+324
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L43
	ldr	r3, .L1095+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L43
	ldr	r3, .L1095+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L43
	ldr	r3, .L1095+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L43:
	ldr	r3, .L1095+344
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+356
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+340
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1095+344
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L48
	ldr	r3, .L1095+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L48
	ldr	r3, .L1095+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L48
	ldr	r3, .L1095+356
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L49
.L48:
	ldr	r3, .L1095+344
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L50
	ldr	r3, .L1095+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L50
	ldr	r3, .L1095+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L50
	ldr	r3, .L1095+356
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L49
.L50:
	ldr	r3, .L1095+344
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L51
	ldr	r3, .L1095+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L51
	ldr	r3, .L1095+356
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L51
	ldr	r3, .L1095+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L49
.L51:
	ldr	r3, .L1095+344
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L52
	ldr	r3, .L1095+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L52
	ldr	r3, .L1095+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L52
	ldr	r3, .L1095+356
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L49
.L52:
	ldr	r3, .L1095+344
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L53
	ldr	r3, .L1095+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L53
	ldr	r3, .L1095+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L53
	ldr	r3, .L1095+356
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L49
.L53:
	ldr	r3, .L1095+344
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L54
	ldr	r3, .L1095+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L54
	ldr	r3, .L1095+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L54
	ldr	r3, .L1095+356
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L49
.L54:
	ldr	r3, .L1095+344
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L55
	ldr	r3, .L1095+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L55
	ldr	r3, .L1095+356
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L55
	ldr	r3, .L1095+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L49
.L55:
	ldr	r3, .L1095+344
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L56
	ldr	r3, .L1095+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L56
	ldr	r3, .L1095+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L56
	ldr	r3, .L1095+356
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L49
.L56:
	ldr	r3, .L1095+344
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1095+356
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L49:
	ldr	r3, .L1095+340
	ldr	r3, [r3]	@ float
	ldr	r1, .L1095+384
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L57
	ldr	r3, .L1095+344
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L58
	ldr	r3, .L1095+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L58
	ldr	r3, .L1095+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L58
	ldr	r3, .L1095+356
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L58:
	ldr	r3, .L1095+344
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L59
	ldr	r3, .L1095+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L59
	ldr	r3, .L1095+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L59
	ldr	r3, .L1095+356
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L59:
	ldr	r3, .L1095+344
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L60
	ldr	r3, .L1095+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L60
	ldr	r3, .L1095+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L60
	ldr	r3, .L1095+356
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L60:
	ldr	r3, .L1095+344
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L57
	ldr	r3, .L1095+348
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L57
	ldr	r3, .L1095+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L57
	ldr	r3, .L1095+356
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L57:
	ldr	r3, .L1095+364
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+360
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1095+364
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L62
	ldr	r3, .L1095+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L62
	ldr	r3, .L1095+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L62
	ldr	r3, .L1095+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L63
.L62:
	ldr	r3, .L1095+364
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L64
	ldr	r3, .L1095+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L64
	ldr	r3, .L1095+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L64
	ldr	r3, .L1095+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L63
.L64:
	ldr	r3, .L1095+364
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L65
	ldr	r3, .L1095+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L65
	ldr	r3, .L1095+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L65
	ldr	r3, .L1095+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L63
.L65:
	ldr	r3, .L1095+364
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L66
	ldr	r3, .L1095+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L66
	ldr	r3, .L1095+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L66
	ldr	r3, .L1095+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L63
.L66:
	ldr	r3, .L1095+364
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L67
	ldr	r3, .L1095+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L67
	ldr	r3, .L1095+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L67
	ldr	r3, .L1095+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L63
.L67:
	ldr	r3, .L1095+364
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L68
	ldr	r3, .L1095+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L68
	ldr	r3, .L1095+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L68
	ldr	r3, .L1095+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L63
.L68:
	ldr	r3, .L1095+364
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L69
	ldr	r3, .L1095+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L69
	ldr	r3, .L1095+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L69
	ldr	r3, .L1095+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L63
.L69:
	ldr	r3, .L1095+364
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L70
	ldr	r3, .L1095+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L70
	ldr	r3, .L1095+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L70
	ldr	r3, .L1095+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L63
.L70:
	ldr	r3, .L1095+364
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1095+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L63:
	ldr	r3, .L1095+360
	ldr	r3, [r3]	@ float
	ldr	r1, .L1095+384
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L71
	ldr	r3, .L1095+364
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L72
	ldr	r3, .L1095+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L72
	ldr	r3, .L1095+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L72
	ldr	r3, .L1095+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L72:
	ldr	r3, .L1095+364
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L73
	ldr	r3, .L1095+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L73
	ldr	r3, .L1095+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L73
	ldr	r3, .L1095+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L73:
	ldr	r3, .L1095+364
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L74
	ldr	r3, .L1095+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L74
	ldr	r3, .L1095+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L74
	ldr	r3, .L1095+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L74:
	ldr	r3, .L1095+364
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L71
	ldr	r3, .L1095+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L71
	ldr	r3, .L1095+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L71
	ldr	r3, .L1095+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L71:
	ldr	r3, .L1095+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+380
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1095+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L76
	ldr	r3, .L1095+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L76
	ldr	r3, .L1095+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L76
	ldr	r3, .L1095+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L77
.L76:
	ldr	r3, .L1095+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L78
	ldr	r3, .L1095+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L78
	ldr	r3, .L1095+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L78
	ldr	r3, .L1095+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L77
.L78:
	ldr	r3, .L1095+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L79
	ldr	r3, .L1095+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L79
	ldr	r3, .L1095+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L79
	ldr	r3, .L1095+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L77
.L79:
	ldr	r3, .L1095+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L80
	ldr	r3, .L1095+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L80
	ldr	r3, .L1095+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L80
	ldr	r3, .L1095+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L77
.L80:
	ldr	r3, .L1095+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L81
	ldr	r3, .L1095+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L81
	ldr	r3, .L1095+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L81
	ldr	r3, .L1095+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L77
.L81:
	ldr	r3, .L1095+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L82
	ldr	r3, .L1095+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L82
	ldr	r3, .L1095+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L82
	ldr	r3, .L1095+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L77
.L82:
	ldr	r3, .L1095+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L83
	ldr	r3, .L1095+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L83
	ldr	r3, .L1095+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L83
	ldr	r3, .L1095+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L77
.L83:
	ldr	r3, .L1095+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L84
	ldr	r3, .L1095+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L84
	ldr	r3, .L1095+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L84
	ldr	r3, .L1095+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L77
.L84:
	ldr	r3, .L1095+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1095+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L77:
	ldr	r3, .L1095+380
	ldr	r3, [r3]	@ float
	ldr	r1, .L1095+384
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L85
	ldr	r3, .L1095+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L86
	ldr	r3, .L1095+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L86
	ldr	r3, .L1095+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L86
	ldr	r3, .L1095+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L86:
	ldr	r3, .L1095+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L87
	ldr	r3, .L1095+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L87
	ldr	r3, .L1095+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L87
	ldr	r3, .L1095+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L87:
	ldr	r3, .L1095+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L88
	ldr	r3, .L1095+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L88
	ldr	r3, .L1095+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L88
	ldr	r3, .L1095+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L88:
	ldr	r3, .L1095+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L85
	ldr	r3, .L1095+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L85
	ldr	r3, .L1095+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L85
	ldr	r3, .L1095+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L85:
	ldr	r3, .L1095+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1095+404
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1095+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L90
	ldr	r3, .L1095+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L90
	ldr	r3, .L1095+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L90
	ldr	r3, .L1095+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L90:
	ldr	r3, .L1095+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L92
	ldr	r3, .L1095+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L92
	ldr	r3, .L1095+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L92
	ldr	r3, .L1095+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L91
.L92:
	ldr	r3, .L1095+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L93
	ldr	r3, .L1095+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L93
	ldr	r3, .L1095+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L93
	ldr	r3, .L1095+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L93:
	ldr	r3, .L1095+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L94
	ldr	r3, .L1095+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L94
	ldr	r3, .L1095+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L94
	ldr	r3, .L1095+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L94:
	ldr	r3, .L1095+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L95
	ldr	r3, .L1095+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L95
	ldr	r3, .L1095+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L95
	ldr	r3, .L1095+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L95:
	ldr	r3, .L1095+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L96
	ldr	r3, .L1095+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L96
	ldr	r3, .L1095+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L96
	ldr	r3, .L1095+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L91
.L96:
	ldr	r3, .L1095+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L97
	ldr	r3, .L1095+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L97
	ldr	r3, .L1095+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L97
	ldr	r3, .L1095+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L97:
	ldr	r3, .L1095+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L98
	ldr	r3, .L1095+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L98
	ldr	r3, .L1095+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L98
	ldr	r3, .L1095+416
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L98:
	ldr	r3, .L1095+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1098+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L91:
	ldr	r3, .L1098+12
	ldr	r3, [r3]	@ float
	ldr	r1, .L1098+16
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L99
	ldr	r3, .L1098+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L100
	ldr	r3, .L1098
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L100
	ldr	r3, .L1098+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L100
	ldr	r3, .L1098+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L100:
	ldr	r3, .L1098+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L101
	ldr	r3, .L1098
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L101
	ldr	r3, .L1098+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L101
	ldr	r3, .L1098+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L101:
	ldr	r3, .L1098+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L102
	ldr	r3, .L1098
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L102
	ldr	r3, .L1098+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L102
	ldr	r3, .L1098+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L102:
	ldr	r3, .L1098+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L99
	ldr	r3, .L1098
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L99
	ldr	r3, .L1098+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L99
	ldr	r3, .L1098+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L99:
	ldr	r3, .L1098+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+40
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1098+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L104
	ldr	r3, .L1098+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L104
	ldr	r3, .L1098+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L104
	ldr	r3, .L1098+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L105
.L104:
	ldr	r3, .L1098+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L106
	ldr	r3, .L1098+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L106
	ldr	r3, .L1098+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L106
	ldr	r3, .L1098+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L105
.L106:
	ldr	r3, .L1098+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L107
	ldr	r3, .L1098+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L107
	ldr	r3, .L1098+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L107
	ldr	r3, .L1098+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L105
.L107:
	ldr	r3, .L1098+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L108
	ldr	r3, .L1098+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L108
	ldr	r3, .L1098+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L108
	ldr	r3, .L1098+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L105
.L108:
	ldr	r3, .L1098+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L109
	ldr	r3, .L1098+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L109
	ldr	r3, .L1098+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L109
	ldr	r3, .L1098+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L105
.L109:
	ldr	r3, .L1098+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L110
	ldr	r3, .L1098+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L110
	ldr	r3, .L1098+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L110
	ldr	r3, .L1098+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L105
.L110:
	ldr	r3, .L1098+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L111
	ldr	r3, .L1098+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L111
	ldr	r3, .L1098+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L111
	ldr	r3, .L1098+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L105
.L111:
	ldr	r3, .L1098+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L112
	ldr	r3, .L1098+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L112
	ldr	r3, .L1098+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L112
	ldr	r3, .L1098+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L105
.L112:
	ldr	r3, .L1098+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1098+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L105:
	ldr	r3, .L1098+40
	ldr	r3, [r3]	@ float
	ldr	r1, .L1098+16
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L113
	ldr	r3, .L1098+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L114
	ldr	r3, .L1098+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L114
	ldr	r3, .L1098+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L114
	ldr	r3, .L1098+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L114:
	ldr	r3, .L1098+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L115
	ldr	r3, .L1098+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L115
	ldr	r3, .L1098+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L115
	ldr	r3, .L1098+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L115:
	ldr	r3, .L1098+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L116
	ldr	r3, .L1098+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L116
	ldr	r3, .L1098+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L116
	ldr	r3, .L1098+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L116:
	ldr	r3, .L1098+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L113
	ldr	r3, .L1098+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L113
	ldr	r3, .L1098+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L113
	ldr	r3, .L1098+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L113:
	ldr	r3, .L1098+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+60
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1098+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L118
	ldr	r3, .L1098+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L118
	ldr	r3, .L1098+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L118
	ldr	r3, .L1098+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L119
.L118:
	ldr	r3, .L1098+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L120
	ldr	r3, .L1098+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L120
	ldr	r3, .L1098+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L120
	ldr	r3, .L1098+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L119
.L120:
	ldr	r3, .L1098+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L121
	ldr	r3, .L1098+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L121
	ldr	r3, .L1098+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L121
	ldr	r3, .L1098+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L119
.L121:
	ldr	r3, .L1098+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L122
	ldr	r3, .L1098+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L122
	ldr	r3, .L1098+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L122
	ldr	r3, .L1098+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L119
.L122:
	ldr	r3, .L1098+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L123
	ldr	r3, .L1098+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L123
	ldr	r3, .L1098+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L123
	ldr	r3, .L1098+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L119
.L123:
	ldr	r3, .L1098+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L124
	ldr	r3, .L1098+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L124
	ldr	r3, .L1098+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L124
	ldr	r3, .L1098+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L119
.L124:
	ldr	r3, .L1098+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L125
	ldr	r3, .L1098+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L125
	ldr	r3, .L1098+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L125
	ldr	r3, .L1098+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L119
.L125:
	ldr	r3, .L1098+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L126
	ldr	r3, .L1098+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L126
	ldr	r3, .L1098+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L126
	ldr	r3, .L1098+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L119
.L126:
	ldr	r3, .L1098+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1098+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L119:
	ldr	r3, .L1098+60
	ldr	r3, [r3]	@ float
	ldr	r1, .L1098+16
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L127
	ldr	r3, .L1098+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L128
	ldr	r3, .L1098+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L128
	ldr	r3, .L1098+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L128
	ldr	r3, .L1098+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L128:
	ldr	r3, .L1098+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L129
	ldr	r3, .L1098+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L129
	ldr	r3, .L1098+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L129
	ldr	r3, .L1098+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L129:
	ldr	r3, .L1098+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L130
	ldr	r3, .L1098+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L130
	ldr	r3, .L1098+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L130
	ldr	r3, .L1098+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L130:
	ldr	r3, .L1098+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L127
	ldr	r3, .L1098+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L127
	ldr	r3, .L1098+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L127
	ldr	r3, .L1098+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L127:
	ldr	r3, .L1098+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1098+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L132
	ldr	r3, .L1098+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L132
	ldr	r3, .L1098+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L132
	ldr	r3, .L1098+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L133
.L132:
	ldr	r3, .L1098+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L134
	ldr	r3, .L1098+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L134
	ldr	r3, .L1098+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L134
	ldr	r3, .L1098+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L133
.L134:
	ldr	r3, .L1098+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L135
	ldr	r3, .L1098+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L135
	ldr	r3, .L1098+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L135
	ldr	r3, .L1098+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L133
.L135:
	ldr	r3, .L1098+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L136
	ldr	r3, .L1098+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L136
	ldr	r3, .L1098+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L136
	ldr	r3, .L1098+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L133
.L136:
	ldr	r3, .L1098+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L137
	ldr	r3, .L1098+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L137
	ldr	r3, .L1098+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L137
	ldr	r3, .L1098+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L133
.L137:
	ldr	r3, .L1098+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L138
	ldr	r3, .L1098+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L138
	ldr	r3, .L1098+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L138
	ldr	r3, .L1098+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L133
.L138:
	ldr	r3, .L1098+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L139
	ldr	r3, .L1098+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L139
	ldr	r3, .L1098+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L139
	ldr	r3, .L1098+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L133
.L139:
	ldr	r3, .L1098+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L140
	ldr	r3, .L1098+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L140
	ldr	r3, .L1098+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L140
	ldr	r3, .L1098+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L133
.L140:
	ldr	r3, .L1098+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1098+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L133:
	ldr	r3, .L1098+80
	ldr	r3, [r3]	@ float
	ldr	r1, .L1098+16
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L141
	ldr	r3, .L1098+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L142
	ldr	r3, .L1098+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L142
	ldr	r3, .L1098+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L142
	ldr	r3, .L1098+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L142:
	ldr	r3, .L1098+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L143
	ldr	r3, .L1098+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L143
	ldr	r3, .L1098+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L143
	ldr	r3, .L1098+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L143:
	ldr	r3, .L1098+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L144
	ldr	r3, .L1098+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L144
	ldr	r3, .L1098+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L144
	ldr	r3, .L1098+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L144:
	ldr	r3, .L1098+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L141
	ldr	r3, .L1098+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L141
	ldr	r3, .L1098+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L141
	ldr	r3, .L1098+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L141:
	ldr	r3, .L1098+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1098+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L146
	ldr	r3, .L1098+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L146
	ldr	r3, .L1098+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L146
	ldr	r3, .L1098+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L147
.L146:
	ldr	r3, .L1098+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L148
	ldr	r3, .L1098+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L148
	ldr	r3, .L1098+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L148
	ldr	r3, .L1098+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L147
.L148:
	ldr	r3, .L1098+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1098+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1098+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1098+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L147
.L149:
	ldr	r3, .L1098+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L150
	ldr	r3, .L1098+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L150
	ldr	r3, .L1098+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L150
	ldr	r3, .L1098+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L147
.L150:
	ldr	r3, .L1098+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L151
	ldr	r3, .L1098+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L151
	ldr	r3, .L1098+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L151
	ldr	r3, .L1098+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L147
.L151:
	ldr	r3, .L1098+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L152
	ldr	r3, .L1098+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L152
	ldr	r3, .L1098+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L152
	ldr	r3, .L1098+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L147
.L152:
	ldr	r3, .L1098+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L153
	ldr	r3, .L1098+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L153
	ldr	r3, .L1098+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L153
	ldr	r3, .L1098+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L147
.L153:
	ldr	r3, .L1098+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L154
	ldr	r3, .L1098+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L154
	ldr	r3, .L1098+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L154
	ldr	r3, .L1098+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L147
.L154:
	ldr	r3, .L1098+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1098+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L147:
	ldr	r3, .L1098+84
	ldr	r3, [r3]	@ float
	ldr	r1, .L1098+16
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L155
	ldr	r3, .L1098+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L156
	ldr	r3, .L1098+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L156
	ldr	r3, .L1098+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L156
	ldr	r3, .L1098+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L156:
	ldr	r3, .L1098+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L1098+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L1098+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L1098+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L157:
	ldr	r3, .L1098+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L158
	ldr	r3, .L1098+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L158
	ldr	r3, .L1098+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	b	.L1099
.L1100:
	.align	2
.L1098:
	.word	p8_l2
	.word	p8_l0
	.word	p8_l1
	.word	p8_c
	.word	1098907648
	.word	p8_l3
	.word	p7_l3
	.word	p7_l2
	.word	p7_l0
	.word	p7_l1
	.word	p7_c
	.word	p6_l3
	.word	p6_l2
	.word	p6_l0
	.word	p6_l1
	.word	p6_c
	.word	p5_l3
	.word	p5_l2
	.word	p5_l0
	.word	p5_l1
	.word	p5_c
	.word	p4_c
	.word	p4_l3
	.word	p4_l2
	.word	p4_l0
	.word	p4_l1
	.word	p3_c
	.word	p3_l3
	.word	p3_l2
	.word	p3_l0
	.word	p3_l1
	.word	p2_c
	.word	p2_l3
	.word	p2_l2
	.word	p2_l0
	.word	p2_l1
	.word	p1_c
	.word	p1_l3
	.word	p1_l2
	.word	p1_l0
	.word	p1_l1
	.word	p0_c
	.word	1098907648
	.word	p0_l3
	.word	p0_l2
	.word	p0_l0
	.word	p0_l1
	.word	delta
	.word	v1
.L1099:
	beq	.L158
	ldr	r3, .L1098+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L158:
	ldr	r3, .L1098+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L155
	ldr	r3, .L1098+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L155
	ldr	r3, .L1098+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L155
	ldr	r3, .L1098+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L155:
	ldr	r3, .L1098+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1098+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L160
	ldr	r3, .L1098+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L160
	ldr	r3, .L1098+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L160
	ldr	r3, .L1098+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L161
.L160:
	ldr	r3, .L1098+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L162
	ldr	r3, .L1098+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L162
	ldr	r3, .L1098+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L162
	ldr	r3, .L1098+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L161
.L162:
	ldr	r3, .L1098+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L163
	ldr	r3, .L1098+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L163
	ldr	r3, .L1098+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L163
	ldr	r3, .L1098+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L161
.L163:
	ldr	r3, .L1098+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L164
	ldr	r3, .L1098+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L164
	ldr	r3, .L1098+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L164
	ldr	r3, .L1098+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L161
.L164:
	ldr	r3, .L1098+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L165
	ldr	r3, .L1098+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L165
	ldr	r3, .L1098+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L165
	ldr	r3, .L1098+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L161
.L165:
	ldr	r3, .L1098+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L166
	ldr	r3, .L1098+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L166
	ldr	r3, .L1098+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L166
	ldr	r3, .L1098+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L161
.L166:
	ldr	r3, .L1098+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L167
	ldr	r3, .L1098+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L167
	ldr	r3, .L1098+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L167
	ldr	r3, .L1098+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L161
.L167:
	ldr	r3, .L1098+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L168
	ldr	r3, .L1098+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L168
	ldr	r3, .L1098+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L168
	ldr	r3, .L1098+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L161
.L168:
	ldr	r3, .L1098+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1098+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L161:
	ldr	r3, .L1098+104
	ldr	r3, [r3]	@ float
	ldr	r1, .L1098+168
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L169
	ldr	r3, .L1098+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L170
	ldr	r3, .L1098+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L170
	ldr	r3, .L1098+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L170
	ldr	r3, .L1098+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L170:
	ldr	r3, .L1098+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L171
	ldr	r3, .L1098+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L171
	ldr	r3, .L1098+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L171
	ldr	r3, .L1098+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L171:
	ldr	r3, .L1098+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L172
	ldr	r3, .L1098+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L172
	ldr	r3, .L1098+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L172
	ldr	r3, .L1098+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L172:
	ldr	r3, .L1098+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L169
	ldr	r3, .L1098+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L169
	ldr	r3, .L1098+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L169
	ldr	r3, .L1098+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L169:
	ldr	r3, .L1098+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1098+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L174
	ldr	r3, .L1098+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L174
	ldr	r3, .L1098+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L174
	ldr	r3, .L1098+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L175
.L174:
	ldr	r3, .L1098+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L176
	ldr	r3, .L1098+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L176
	ldr	r3, .L1098+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L176
	ldr	r3, .L1098+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L175
.L176:
	ldr	r3, .L1098+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L177
	ldr	r3, .L1098+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L177
	ldr	r3, .L1098+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L177
	ldr	r3, .L1098+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L175
.L177:
	ldr	r3, .L1098+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L178
	ldr	r3, .L1098+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L178
	ldr	r3, .L1098+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L178
	ldr	r3, .L1098+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L175
.L178:
	ldr	r3, .L1098+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L179
	ldr	r3, .L1098+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L179
	ldr	r3, .L1098+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L179
	ldr	r3, .L1098+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L175
.L179:
	ldr	r3, .L1098+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L180
	ldr	r3, .L1098+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L180
	ldr	r3, .L1098+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L180
	ldr	r3, .L1098+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L175
.L180:
	ldr	r3, .L1098+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L181
	ldr	r3, .L1098+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L181
	ldr	r3, .L1098+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L181
	ldr	r3, .L1098+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L175
.L181:
	ldr	r3, .L1098+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L182
	ldr	r3, .L1098+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L182
	ldr	r3, .L1098+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L182
	ldr	r3, .L1098+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L175
.L182:
	ldr	r3, .L1098+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1098+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L175:
	ldr	r3, .L1098+124
	ldr	r3, [r3]	@ float
	ldr	r1, .L1098+168
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L183
	ldr	r3, .L1098+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L184
	ldr	r3, .L1098+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L184
	ldr	r3, .L1098+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L184
	ldr	r3, .L1098+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L184:
	ldr	r3, .L1098+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L185
	ldr	r3, .L1098+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L185
	ldr	r3, .L1098+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L185
	ldr	r3, .L1098+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L185:
	ldr	r3, .L1098+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L186
	ldr	r3, .L1098+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L186
	ldr	r3, .L1098+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L186
	ldr	r3, .L1098+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L186:
	ldr	r3, .L1098+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L183
	ldr	r3, .L1098+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L183
	ldr	r3, .L1098+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L183
	ldr	r3, .L1098+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L183:
	ldr	r3, .L1098+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1098+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L188
	ldr	r3, .L1098+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L188
	ldr	r3, .L1098+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L188
	ldr	r3, .L1098+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L189
.L188:
	ldr	r3, .L1098+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L190
	ldr	r3, .L1098+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L190
	ldr	r3, .L1098+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L190
	ldr	r3, .L1098+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L189
.L190:
	ldr	r3, .L1098+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L191
	ldr	r3, .L1098+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L191
	ldr	r3, .L1098+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L191
	ldr	r3, .L1098+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L189
.L191:
	ldr	r3, .L1098+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L192
	ldr	r3, .L1098+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L192
	ldr	r3, .L1098+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L192
	ldr	r3, .L1098+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L189
.L192:
	ldr	r3, .L1098+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L193
	ldr	r3, .L1098+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L193
	ldr	r3, .L1098+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L193
	ldr	r3, .L1098+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L189
.L193:
	ldr	r3, .L1098+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L194
	ldr	r3, .L1098+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L194
	ldr	r3, .L1098+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L194
	ldr	r3, .L1098+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L189
.L194:
	ldr	r3, .L1098+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L195
	ldr	r3, .L1098+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L195
	ldr	r3, .L1098+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L195
	ldr	r3, .L1098+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L189
.L195:
	ldr	r3, .L1098+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L196
	ldr	r3, .L1098+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L196
	ldr	r3, .L1098+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L196
	ldr	r3, .L1098+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L189
.L196:
	ldr	r3, .L1098+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1098+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L189:
	ldr	r3, .L1098+144
	ldr	r3, [r3]	@ float
	ldr	r1, .L1098+168
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L197
	ldr	r3, .L1098+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L198
	ldr	r3, .L1098+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L198
	ldr	r3, .L1098+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L198
	ldr	r3, .L1098+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L198:
	ldr	r3, .L1098+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L199
	ldr	r3, .L1098+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L199
	ldr	r3, .L1098+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L199
	ldr	r3, .L1098+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L199:
	ldr	r3, .L1098+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L200
	ldr	r3, .L1098+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L200
	ldr	r3, .L1098+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L200
	ldr	r3, .L1098+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L200:
	ldr	r3, .L1098+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L197
	ldr	r3, .L1098+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L197
	ldr	r3, .L1098+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L197
	ldr	r3, .L1098+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L197:
	ldr	r3, .L1098+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1098+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L202
	ldr	r3, .L1098+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L202
	ldr	r3, .L1098+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L202
	ldr	r3, .L1098+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L203
.L202:
	ldr	r3, .L1098+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L204
	ldr	r3, .L1098+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L204
	ldr	r3, .L1098+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L204
	ldr	r3, .L1098+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L203
.L204:
	ldr	r3, .L1098+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L205
	ldr	r3, .L1098+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L205
	ldr	r3, .L1098+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L205
	ldr	r3, .L1098+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L203
.L205:
	ldr	r3, .L1098+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L206
	ldr	r3, .L1098+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L206
	ldr	r3, .L1098+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L206
	ldr	r3, .L1098+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L203
.L206:
	ldr	r3, .L1098+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1098+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1098+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1098+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L203
.L207:
	ldr	r3, .L1098+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L208
	ldr	r3, .L1098+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L208
	ldr	r3, .L1098+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L208
	ldr	r3, .L1098+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L203
.L208:
	ldr	r3, .L1098+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L209
	ldr	r3, .L1098+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L209
	ldr	r3, .L1098+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L209
	ldr	r3, .L1098+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L203
.L209:
	ldr	r3, .L1098+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L210
	ldr	r3, .L1098+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L210
	ldr	r3, .L1098+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L210
	ldr	r3, .L1098+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L203
.L210:
	ldr	r3, .L1098+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1098+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1098+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L203:
	ldr	r3, .L1098+164
	ldr	r3, [r3]	@ float
	ldr	r1, .L1098+168
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L211
	ldr	r3, .L1098+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L212
	ldr	r3, .L1098+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L212
	ldr	r3, .L1098+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L212
	ldr	r3, .L1098+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L212:
	ldr	r3, .L1098+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L213
	ldr	r3, .L1098+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L213
	ldr	r3, .L1098+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L213
	ldr	r3, .L1098+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L213:
	ldr	r3, .L1098+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L214
	ldr	r3, .L1098+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L214
	ldr	r3, .L1098+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L214
	ldr	r3, .L1098+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L214:
	ldr	r3, .L1098+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L211
	ldr	r3, .L1098+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L211
	ldr	r3, .L1098+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L211
	ldr	r3, .L1098+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L211:
	ldr	r3, .L1098+188
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1098+192
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L216
	ldr	r3, .L1098+192
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L216
	ldr	r3, .L1098+192
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L216
	ldr	r3, .L1098+192
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L216
	ldr	r3, .L1098+192
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L216
	ldr	r3, .L1098+192
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L216
	ldr	r3, .L1098+192
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L216
	ldr	r3, .L1098+192
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L216
	ldr	r3, .L1101+360
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L216
	ldr	r3, .L1101+360
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L216
	ldr	r3, .L1101+360
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L216
	ldr	r3, .L1101+360
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L216
	ldr	r3, .L1101+360
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L216
	ldr	r3, .L1101+360
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L216
	ldr	r3, .L1101+360
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L216
	ldr	r3, .L1101+360
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L4
.L216:
	ldr	r3, .L1101+416
	ldr	r3, [r3]	@ float
	ldr	r2, .L1101
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	mov	r3, #1
	b	.L218
.L4:
	mov	r3, #0
.L218:
	str	r3, [fp, #-24]
	b	.L219
.L1102:
	.align	2
.L1101:
	.word	_diverge_delta
	.word	_x_p12_l3
	.word	_x_p12_l2
	.word	_x_p12_l1
	.word	_x_p12_l0
	.word	_x_p12_evt
	.word	_x_p12_c
	.word	_x__diverge_delta
	.word	_x_p10_l3
	.word	_x_p10_l2
	.word	_x_p10_l1
	.word	_x_p10_l0
	.word	_x_p10_evt
	.word	_x_p10_c
	.word	_x_p3_l3
	.word	_x_p3_evt
	.word	_x_p0_l2
	.word	_x_p8_l3
	.word	_x_p0_l1
	.word	_x_p2_l3
	.word	_x_p2_evt
	.word	_x_p14_evt
	.word	_x_delta
	.word	_x_p8_c
	.word	_x_p0_l3
	.word	_x_p8_evt
	.word	_x_p8_l2
	.word	_x_p13_evt
	.word	_x_p4_evt
	.word	_x_p1_c
	.word	_x_p9_l3
	.word	_x_p3_l2
	.word	_x_p6_l3
	.word	_x_p1_l3
	.word	_x_p0_l0
	.word	_x_p8_l1
	.word	_x_p1_evt
	.word	_x_p13_l2
	.word	_x_p1_l1
	.word	_x_p7_l3
	.word	_x_p4_l2
	.word	_x_p13_l3
	.word	_x_p1_l2
	.word	_x_p4_l3
	.word	_x_p11_c
	.word	_x_p5_c
	.word	_x_p11_evt
	.word	_x_p2_c
	.word	_x_p5_evt
	.word	_x_p11_l0
	.word	_x_p0_c
	.word	_x_p5_l0
	.word	_x_p11_l1
	.word	_x_p2_l0
	.word	_x_p0_evt
	.word	_x_p5_l1
	.word	_x_p11_l2
	.word	_x_p2_l1
	.word	_x_p5_l2
	.word	_x_p11_l3
	.word	_x_p2_l2
	.word	_x_p5_l3
	.word	_x_p9_l0
	.word	_x_p6_l0
	.word	_x_p9_l1
	.word	_x_p3_l0
	.word	_x_p6_l1
	.word	_x_p9_l2
	.word	_x_p3_l1
	.word	_x_p6_l2
	.word	_x_p7_c
	.word	_x_p13_c
	.word	_x_p4_c
	.word	_x_p7_evt
	.word	_x_p7_l0
	.word	_x_p13_l0
	.word	_x_p4_l0
	.word	_x_p7_l1
	.word	_x_p13_l1
	.word	_x_p1_l0
	.word	_x_p4_l1
	.word	_x_p7_l2
	.word	_x_p8_l0
	.word	_x_p6_c
	.word	_x_p9_c
	.word	_x_p3_c
	.word	_x_p6_evt
	.word	_x_p9_evt
	.word	1098907648
	.word	p14_c
	.word	v1
	.word	p14_evt
	.word	v2
	.word	_x_v2
	.word	_x_p14_c
	.word	_x_p14_l3
	.word	_x_p14_l2
	.word	_x_p14_l1
	.word	_x_p14_l0
	.word	_x_v1
	.word	p14_l3
	.word	p14_l2
	.word	p14_l0
	.word	p14_l1
	.word	delta
.L1026:
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+380
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+4
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+8
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+12
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+16
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+20
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1101+24
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1101+28
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+32
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+36
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+40
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+44
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+48
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1101+52
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+56
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+60
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+64
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+384
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+68
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+72
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+76
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+80
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+84
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1101+88
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L1101+396
	str	r3, [r2]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+372
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1101+92
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+96
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1101+376
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+100
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+388
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+104
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+108
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+112
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1101+116
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+120
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+124
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+128
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+132
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+136
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+392
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+140
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+144
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+148
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+152
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+156
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+160
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+164
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+168
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+172
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1101+176
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1101+180
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+184
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1101+188
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+192
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+196
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1101+200
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+204
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+208
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+212
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+216
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+220
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+224
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+228
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+232
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+236
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+240
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+244
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+248
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+252
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+256
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+260
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+264
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+268
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+272
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+276
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1101+280
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1101+284
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1101+288
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+292
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+296
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+300
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+304
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+308
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+312
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+316
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+320
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+324
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+328
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1101+332
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1101+336
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1101+340
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+344
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1101+348
	strb	r2, [r3]
	ldr	r3, .L1101+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L220
	ldr	r3, .L1101+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L220
	ldr	r3, .L1101+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L220
	ldr	r3, .L1101+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L221
.L220:
	ldr	r3, .L1101+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L222
	ldr	r3, .L1101+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L222
	ldr	r3, .L1101+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L222
	ldr	r3, .L1101+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L221
.L222:
	ldr	r3, .L1101+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L223
	ldr	r3, .L1101+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L223
	ldr	r3, .L1101+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L223
	ldr	r3, .L1101+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L221
.L223:
	ldr	r3, .L1101+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L224
	ldr	r3, .L1101+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L224
	ldr	r3, .L1101+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L224
	ldr	r3, .L1101+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L221
.L224:
	ldr	r3, .L1101+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L225
	ldr	r3, .L1101+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L225
	ldr	r3, .L1101+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L225
	ldr	r3, .L1101+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L221
.L225:
	ldr	r3, .L1101+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L226
	ldr	r3, .L1101+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L226
	ldr	r3, .L1101+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L226
	ldr	r3, .L1101+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L221
.L226:
	ldr	r3, .L1101+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L227
	ldr	r3, .L1101+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L227
	ldr	r3, .L1101+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L227
	ldr	r3, .L1101+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L221
.L227:
	ldr	r3, .L1101+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L228
	ldr	r3, .L1101+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L228
	ldr	r3, .L1101+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L228
	ldr	r3, .L1101+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L221
.L228:
	ldr	r3, .L1101+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1101+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1101+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1101+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L221:
	ldr	r3, .L1101+376
	ldr	r3, [r3]	@ float
	ldr	r1, .L1101+352
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L230
	ldr	r3, .L1101+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L231
	ldr	r3, .L1101+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L231
	ldr	r3, .L1101+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L231
	ldr	r3, .L1101+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L231:
	ldr	r3, .L1101+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L232
	ldr	r3, .L1101+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L232
	ldr	r3, .L1101+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L232
	ldr	r3, .L1101+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L232:
	ldr	r3, .L1101+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L233
	ldr	r3, .L1101+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L233
	ldr	r3, .L1101+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L233
	ldr	r3, .L1101+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L233:
	ldr	r3, .L1101+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L230
	ldr	r3, .L1101+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L230
	ldr	r3, .L1101+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L230
	ldr	r3, .L1101+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L230:
	ldr	r3, .L1101+416
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L234
	ldr	r3, .L1101+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1101+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1101+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1101+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1101+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1101+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1101+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1101+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1101+416
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1101+356
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1101+376
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L234:
	ldr	r3, .L1101+364
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L236
	ldr	r3, .L1101+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1101+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1101+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1101+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1101+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1101+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1101+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1101+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1101+416
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1101+356
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1101+376
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L236:
	ldr	r3, .L1101+360
	ldr	r2, [r3]
	ldr	r3, .L1101+396
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L238
	ldr	r3, .L1101+360
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L238
	ldr	r3, .L1101+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L238
	ldr	r3, .L1101+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L238
	ldr	r3, .L1101+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L238
	ldr	r3, .L1101+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L238
	ldr	r3, .L1101+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1101+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L238
	ldr	r3, .L1101+376
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L239
.L238:
	ldr	r3, .L1101+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L239
	ldr	r3, .L1101+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L239
	ldr	r3, .L1101+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L239
	ldr	r3, .L1101+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L239
	ldr	r3, .L1101+416
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L239
	ldr	r3, .L1101+364
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L239:
	ldr	r3, .L1101+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1101+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L240
	ldr	r3, .L1101+376
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L240
	ldr	r3, .L1101+380
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L240
	ldr	r3, .L1101+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L240
	ldr	r3, .L1101+388
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L240
	ldr	r3, .L1101+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L240
	ldr	r3, .L1101+396
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L242
.L240:
	ldr	r3, .L1101+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L242
	ldr	r3, .L1101+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L242
	ldr	r3, .L1101+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L242
	ldr	r3, .L1101+412
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L242
	ldr	r3, .L1101+416
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L242
	ldr	r3, .L1103
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L242:
	ldr	r3, .L1103+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1103+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L243
	ldr	r3, .L1103+12
	ldr	r2, [r3]
	ldr	r3, .L1103+16
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L243
	ldr	r3, .L1103+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L244
	ldr	r3, .L1103+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L244
	ldr	r3, .L1103+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L244
	ldr	r3, .L1103+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L245
.L244:
	ldr	r3, .L1103+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L243
	ldr	r3, .L1103+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L243
	ldr	r3, .L1103+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L243
	ldr	r3, .L1103+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L243
.L245:
	ldr	r3, .L1103+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L1103+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L246
.L243:
	ldr	r3, .L1103+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L246
	ldr	r3, .L1103+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L246
	ldr	r3, .L1103+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L246
	ldr	r3, .L1103+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L246
	ldr	r3, .L1103+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L246
	ldr	r3, .L1103
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L246:
	ldr	r3, .L1103+12
	ldr	r3, [r3]
	cmp	r3, #15
	bne	.L247
	ldr	r3, .L1103+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L247
	ldr	r3, .L1103+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L247
	ldr	r3, .L1103+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L247
	ldr	r3, .L1103+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L247
	ldr	r3, .L1103+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L247
	ldr	r3, .L1103+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L247
	ldr	r3, .L1103+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L247
	ldr	r3, .L1103+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L247
	ldr	r3, .L1103+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L247
	ldr	r3, .L1103
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L247:
	ldr	r3, .L1103+12
	ldr	r3, [r3]
	cmp	r3, #15
	bne	.L248
	ldr	r3, .L1103+36
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1103+60
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L249
	mov	r3, #0
	mov	r4, r3
.L249:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L250
.L248:
	ldr	r3, .L1103+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L250
	ldr	r3, .L1103+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L250
	ldr	r3, .L1103+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L250
	ldr	r3, .L1103+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L250
	ldr	r3, .L1103+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L250
	ldr	r3, .L1103+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L250
	ldr	r3, .L1103+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L250
	ldr	r3, .L1103+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L250
	ldr	r3, .L1103+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L250
	ldr	r3, .L1103
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L250:
	ldr	r3, .L1103+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1103+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L251
	ldr	r3, .L1103+12
	ldr	r2, [r3]
	ldr	r3, .L1103+16
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L251
	ldr	r3, .L1103+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L252
	ldr	r3, .L1103+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L252
	ldr	r3, .L1103+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L252
	ldr	r3, .L1103+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L253
.L252:
	ldr	r3, .L1103+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L251
	ldr	r3, .L1103+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L251
	ldr	r3, .L1103+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L251
	ldr	r3, .L1103+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L253
.L251:
	ldr	r3, .L1103+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L253
	ldr	r3, .L1103+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L253
	ldr	r3, .L1103+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L253
	ldr	r3, .L1103+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L253
	ldr	r3, .L1103+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L253
	ldr	r3, .L1103
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L253:
	ldr	r3, .L1103+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L254
	ldr	r3, .L1103+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L1103+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L255
.L254:
	ldr	r3, .L1103+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L255
	ldr	r3, .L1103
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L255
	ldr	r3, .L1103+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L255
	ldr	r3, .L1103+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L255
	ldr	r3, .L1103+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L255
	ldr	r3, .L1103+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L255
	ldr	r3, .L1103+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L255
	ldr	r3, .L1103+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L255
	ldr	r3, .L1103+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L255
	ldr	r3, .L1103+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L255:
	ldr	r3, .L1103+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L256
	ldr	r3, .L1103+40
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L257
.L256:
	ldr	r3, .L1103+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1103
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1103+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1103+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1103+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1103+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1103+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1103+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1103+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1103+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L257:
	ldr	r3, .L1103+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L258
	ldr	r3, .L1103+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L258
	ldr	r3, .L1103+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L258
	ldr	r3, .L1103+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L258
	ldr	r3, .L1103+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L258
	ldr	r3, .L1103+12
	ldr	r2, [r3]
	ldr	r3, .L1103+16
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L258
	ldr	r3, .L1103+40
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L259
.L258:
	ldr	r3, .L1103+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L259
	ldr	r3, .L1103+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L259
	ldr	r3, .L1103+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L259
	ldr	r3, .L1103+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L259
	ldr	r3, .L1103+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L259
	ldr	r3, .L1103
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L259:
	ldr	r3, .L1103+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1103+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L260
	ldr	r3, .L1103+12
	ldr	r2, [r3]
	ldr	r3, .L1103+16
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L260
	ldr	r3, .L1103+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L1103+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L260
	ldr	r3, .L1103+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L262
	ldr	r3, .L1103+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L262
	ldr	r3, .L1103+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L262
	ldr	r3, .L1103+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L263
.L262:
	ldr	r3, .L1103+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L260
	ldr	r3, .L1103+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L260
	ldr	r3, .L1103+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L260
	ldr	r3, .L1103+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L263
.L260:
	ldr	r3, .L1103+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L263
	ldr	r3, .L1103+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L263
	ldr	r3, .L1103+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L263
	ldr	r3, .L1103+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L263
	ldr	r3, .L1103+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L263
	ldr	r3, .L1103
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L263:
	ldr	r3, .L1103+12
	ldr	r3, [r3]
	cmp	r3, #15
	bne	.L264
	ldr	r3, .L1103+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L264
	ldr	r3, .L1103
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L264
	ldr	r3, .L1103+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L264
	ldr	r3, .L1103+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L264
	ldr	r3, .L1103+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L264
	ldr	r3, .L1103+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L264
	ldr	r3, .L1103+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L264
	ldr	r3, .L1103+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L264
	ldr	r3, .L1103+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L264
	ldr	r3, .L1103+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L264:
	ldr	r3, .L1103+12
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L265
	ldr	r3, .L1103+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L265
	ldr	r3, .L1103
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L265
	ldr	r3, .L1103+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L265
	ldr	r3, .L1103+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L265
	ldr	r3, .L1103+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L265
	ldr	r3, .L1103+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L265
	ldr	r3, .L1103+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L265
	ldr	r3, .L1103+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L265
	ldr	r3, .L1103+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L265
	ldr	r3, .L1103+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L265:
	ldr	r3, .L1103+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1103+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L266
	ldr	r3, .L1103+12
	ldr	r2, [r3]
	ldr	r3, .L1103+16
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L266
	ldr	r3, .L1103+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L266
	ldr	r3, .L1103+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L266
	ldr	r3, .L1103+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L266
	ldr	r3, .L1103+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L266
	ldr	r3, .L1103+40
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L267
.L266:
	ldr	r3, .L1103+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L267
	ldr	r3, .L1103+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L267
	ldr	r3, .L1103+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L267
	ldr	r3, .L1103+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L267
	ldr	r3, .L1103+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L267
	ldr	r3, .L1103
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L267:
	ldr	r3, .L1103+12
	ldr	r2, [r3]
	ldr	r3, .L1103+16
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L268
	ldr	r3, .L1103+40
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L268
	ldr	r3, .L1103+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L268
	ldr	r3, .L1103+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L268
	ldr	r3, .L1103+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L268
	ldr	r3, .L1103+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L268
	ldr	r3, .L1103+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L270
.L268:
	ldr	r3, .L1103+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L270
	ldr	r3, .L1103+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L270
	ldr	r3, .L1103+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L270
	ldr	r3, .L1103+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L270
	ldr	r3, .L1103+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L270
	ldr	r3, .L1103
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L270:
	ldr	r3, .L1103+16
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L271
	ldr	r3, .L1103+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L271
	ldr	r3, .L1103+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L271
	ldr	r3, .L1103+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L271
	ldr	r3, .L1103+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L271
	ldr	r3, .L1103+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1103+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L271
	ldr	r3, .L1103+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L1103+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L272
.L271:
	ldr	r3, .L1103+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L272
	ldr	r3, .L1103+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L272
	ldr	r3, .L1103+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L272
	ldr	r3, .L1103+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L272
	ldr	r3, .L1103+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L272
	ldr	r3, .L1103
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L272:
	ldr	r3, .L1103+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L273
	ldr	r3, .L1103+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L273
	ldr	r3, .L1103+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L273
	ldr	r3, .L1103+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L274
.L273:
	ldr	r3, .L1103+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L275
	ldr	r3, .L1103+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L275
	ldr	r3, .L1103+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L275
	ldr	r3, .L1103+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L274
.L275:
	ldr	r3, .L1103+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L276
	ldr	r3, .L1103+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L276
	ldr	r3, .L1103+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L276
	ldr	r3, .L1103+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L274
.L276:
	ldr	r3, .L1103+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L277
	ldr	r3, .L1103+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L277
	ldr	r3, .L1103+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L277
	ldr	r3, .L1103+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L274
.L277:
	ldr	r3, .L1103+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L278
	ldr	r3, .L1103+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L278
	ldr	r3, .L1103+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L278
	ldr	r3, .L1103+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L274
.L278:
	ldr	r3, .L1103+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L279
	ldr	r3, .L1103+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L279
	ldr	r3, .L1103+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L279
	ldr	r3, .L1103+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L274
.L279:
	ldr	r3, .L1103+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L280
	ldr	r3, .L1103+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L280
	ldr	r3, .L1103+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L280
	ldr	r3, .L1103+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L274
.L280:
	ldr	r3, .L1103+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L281
	ldr	r3, .L1103+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L281
	ldr	r3, .L1103+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L281
	ldr	r3, .L1103+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L274
.L281:
	ldr	r3, .L1103+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1103+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1103+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1103+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L274:
	ldr	r3, .L1103+80
	ldr	r3, [r3]	@ float
	ldr	r1, .L1103+60
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L282
	ldr	r3, .L1103+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L283
	ldr	r3, .L1103+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	b	.L1104
.L1105:
	.align	2
.L1103:
	.word	p14_evt
	.word	v2
	.word	_x_v2
	.word	v1
	.word	_x_v1
	.word	_x_p14_l3
	.word	_x_p14_l2
	.word	_x_p14_l0
	.word	_x_p14_l1
	.word	p14_c
	.word	_x_p14_c
	.word	p14_l3
	.word	p14_l2
	.word	p14_l1
	.word	p14_l0
	.word	1098907648
	.word	v2
	.word	_x_v2
	.word	_x_v1
	.word	p13_c
	.word	_x_p13_c
	.word	v1
	.word	delta
	.word	p13_evt
	.word	_x_p13_l3
	.word	_x_p13_l2
	.word	_x_p13_l0
	.word	_x_p13_l1
	.word	p13_l3
	.word	p13_l2
	.word	p13_l0
	.word	p13_l1
.L1104:
	cmp	r3, #0
	bne	.L283
	ldr	r3, .L1103+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L283
	ldr	r3, .L1103+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L283:
	ldr	r3, .L1103+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L284
	ldr	r3, .L1103+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L284
	ldr	r3, .L1103+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L284
	ldr	r3, .L1103+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L284:
	ldr	r3, .L1103+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L285
	ldr	r3, .L1103+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L285
	ldr	r3, .L1103+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L285
	ldr	r3, .L1103+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L285:
	ldr	r3, .L1103+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L282
	ldr	r3, .L1103+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L282
	ldr	r3, .L1103+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L282
	ldr	r3, .L1103+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L282:
	ldr	r3, .L1103+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L286
	ldr	r3, .L1103+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1103+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1103+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1103+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1103+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1103+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1103+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1103+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1103+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1103+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1103+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L286:
	ldr	r3, .L1103+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L288
	ldr	r3, .L1103+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1103+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1103+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1103+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1103+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1103+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1103+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1103+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1103+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1103+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1103+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L288:
	ldr	r3, .L1103+84
	ldr	r2, [r3]
	ldr	r3, .L1103+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L290
	ldr	r3, .L1103+84
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L290
	ldr	r3, .L1103+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L290
	ldr	r3, .L1103+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L290
	ldr	r3, .L1103+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L290
	ldr	r3, .L1103+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L290
	ldr	r3, .L1103+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1103+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L290
	ldr	r3, .L1103+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L291
.L290:
	ldr	r3, .L1103+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L291
	ldr	r3, .L1103+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L291
	ldr	r3, .L1103+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L291
	ldr	r3, .L1103+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L291
	ldr	r3, .L1103+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L291
	ldr	r3, .L1103+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L291:
	ldr	r3, .L1103+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1103+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L292
	ldr	r3, .L1103+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L292
	ldr	r3, .L1103+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L292
	ldr	r3, .L1103+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L292
	ldr	r3, .L1103+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L292
	ldr	r3, .L1103+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L292
	ldr	r3, .L1103+72
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L294
.L292:
	ldr	r3, .L1103+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L294
	ldr	r3, .L1103+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L294
	ldr	r3, .L1103+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L294
	ldr	r3, .L1103+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L294
	ldr	r3, .L1103+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L294
	ldr	r3, .L1103+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L294:
	ldr	r3, .L1103+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1103+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L295
	ldr	r3, .L1103+84
	ldr	r2, [r3]
	ldr	r3, .L1103+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L295
	ldr	r3, .L1103+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L296
	ldr	r3, .L1103+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L296
	ldr	r3, .L1103+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L296
	ldr	r3, .L1103+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L297
.L296:
	ldr	r3, .L1103+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L295
	ldr	r3, .L1103+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L295
	ldr	r3, .L1103+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L295
	ldr	r3, .L1103+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L295
.L297:
	ldr	r3, .L1103+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1103+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L298
.L295:
	ldr	r3, .L1103+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L298
	ldr	r3, .L1103+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L298
	ldr	r3, .L1103+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L298
	ldr	r3, .L1103+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L298
	ldr	r3, .L1103+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L298
	ldr	r3, .L1103+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L298:
	ldr	r3, .L1103+84
	ldr	r3, [r3]
	cmp	r3, #14
	bne	.L299
	ldr	r3, .L1103+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L299
	ldr	r3, .L1103+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L299
	ldr	r3, .L1103+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L299
	ldr	r3, .L1103+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L299
	ldr	r3, .L1103+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L299
	ldr	r3, .L1103+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L299
	ldr	r3, .L1103+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L299
	ldr	r3, .L1103+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L299
	ldr	r3, .L1103+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L299
	ldr	r3, .L1103+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L299:
	ldr	r3, .L1103+84
	ldr	r3, [r3]
	cmp	r3, #14
	bne	.L300
	ldr	r3, .L1103+76
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1103+60
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L301
	mov	r3, #0
	mov	r4, r3
.L301:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L302
.L300:
	ldr	r3, .L1103+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L302
	ldr	r3, .L1103+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L302
	ldr	r3, .L1103+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L302
	ldr	r3, .L1103+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L302
	ldr	r3, .L1103+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L302
	ldr	r3, .L1103+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L302
	ldr	r3, .L1103+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L302
	ldr	r3, .L1103+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L302
	ldr	r3, .L1103+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L302
	ldr	r3, .L1103+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L302:
	ldr	r3, .L1103+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1103+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L303
	ldr	r3, .L1103+84
	ldr	r2, [r3]
	ldr	r3, .L1103+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L303
	ldr	r3, .L1103+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L304
	ldr	r3, .L1103+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L304
	ldr	r3, .L1103+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L304
	ldr	r3, .L1103+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L305
.L304:
	ldr	r3, .L1103+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L303
	ldr	r3, .L1103+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L303
	ldr	r3, .L1103+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L303
	ldr	r3, .L1103+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L305
.L303:
	ldr	r3, .L1103+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L305
	ldr	r3, .L1103+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L305
	ldr	r3, .L1103+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L305
	ldr	r3, .L1103+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L305
	ldr	r3, .L1103+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L305
	ldr	r3, .L1103+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L305:
	ldr	r3, .L1103+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L306
	ldr	r3, .L1103+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1103+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L307
.L306:
	ldr	r3, .L1103+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L307
	ldr	r3, .L1103+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L307
	ldr	r3, .L1103+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L307
	ldr	r3, .L1103+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L307
	ldr	r3, .L1103+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L307
	ldr	r3, .L1103+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L307
	ldr	r3, .L1103+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L307
	ldr	r3, .L1103+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L307
	ldr	r3, .L1103+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L307
	ldr	r3, .L1103+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L307:
	ldr	r3, .L1103+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L308
	ldr	r3, .L1103+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L309
.L308:
	ldr	r3, .L1103+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L309
	ldr	r3, .L1103+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L309
	ldr	r3, .L1103+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L309
	ldr	r3, .L1103+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L309
	ldr	r3, .L1103+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L309
	ldr	r3, .L1103+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L309
	ldr	r3, .L1103+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L309
	ldr	r3, .L1103+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L309
	ldr	r3, .L1103+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L309
	ldr	r3, .L1103+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L309:
	ldr	r3, .L1103+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L310
	ldr	r3, .L1103+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L310
	ldr	r3, .L1103+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L310
	ldr	r3, .L1103+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L310
	ldr	r3, .L1103+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L310
	ldr	r3, .L1103+84
	ldr	r2, [r3]
	ldr	r3, .L1103+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L310
	ldr	r3, .L1103+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L311
.L310:
	ldr	r3, .L1103+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L311
	ldr	r3, .L1103+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L311
	ldr	r3, .L1103+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L311
	ldr	r3, .L1103+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L311
	ldr	r3, .L1103+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L311
	ldr	r3, .L1103+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L311:
	ldr	r3, .L1103+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1103+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L312
	ldr	r3, .L1103+84
	ldr	r2, [r3]
	ldr	r3, .L1103+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L312
	ldr	r3, .L1103+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1103+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L312
	ldr	r3, .L1103+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L314
	ldr	r3, .L1103+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L314
	ldr	r3, .L1103+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L314
	ldr	r3, .L1103+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L315
.L314:
	ldr	r3, .L1103+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L312
	ldr	r3, .L1103+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L312
	ldr	r3, .L1103+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L312
	ldr	r3, .L1103+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L315
.L312:
	ldr	r3, .L1103+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L315
	ldr	r3, .L1103+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L315
	ldr	r3, .L1103+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L315
	ldr	r3, .L1103+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L315
	ldr	r3, .L1103+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L315
	ldr	r3, .L1103+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L315:
	ldr	r3, .L1103+84
	ldr	r3, [r3]
	cmp	r3, #14
	bne	.L316
	ldr	r3, .L1103+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L316
	ldr	r3, .L1103+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L316
	ldr	r3, .L1103+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L316
	ldr	r3, .L1103+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L316
	ldr	r3, .L1103+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L316
	ldr	r3, .L1103+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L316
	ldr	r3, .L1103+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L316
	ldr	r3, .L1103+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L316
	ldr	r3, .L1103+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L316
	ldr	r3, .L1103+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L316:
	ldr	r3, .L1106
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L317
	ldr	r3, .L1106+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L317
	ldr	r3, .L1106+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L317
	ldr	r3, .L1106+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L317
	ldr	r3, .L1106+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L317
	ldr	r3, .L1106+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L317
	ldr	r3, .L1106+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L317
	ldr	r3, .L1106+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L317
	ldr	r3, .L1106+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L317
	ldr	r3, .L1106+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L317
	ldr	r3, .L1106+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L317:
	ldr	r3, .L1106+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1106+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L318
	ldr	r3, .L1106
	ldr	r2, [r3]
	ldr	r3, .L1106+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L318
	ldr	r3, .L1106+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L318
	ldr	r3, .L1106+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L318
	ldr	r3, .L1106+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L318
	ldr	r3, .L1106+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L318
	ldr	r3, .L1106+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L319
.L318:
	ldr	r3, .L1106+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L319
	ldr	r3, .L1106+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L319
	ldr	r3, .L1106+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L319
	ldr	r3, .L1106+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L319
	ldr	r3, .L1106+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L319
	ldr	r3, .L1106+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L319:
	ldr	r3, .L1106
	ldr	r2, [r3]
	ldr	r3, .L1106+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L320
	ldr	r3, .L1106+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L320
	ldr	r3, .L1106+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L320
	ldr	r3, .L1106+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L320
	ldr	r3, .L1106+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L320
	ldr	r3, .L1106+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L320
	ldr	r3, .L1106+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L322
.L320:
	ldr	r3, .L1106+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L322
	ldr	r3, .L1106+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L322
	ldr	r3, .L1106+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L322
	ldr	r3, .L1106+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L322
	ldr	r3, .L1106+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L322
	ldr	r3, .L1106+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L322:
	ldr	r3, .L1106+56
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L323
	ldr	r3, .L1106+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L323
	ldr	r3, .L1106+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L323
	ldr	r3, .L1106+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L323
	ldr	r3, .L1106+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L323
	ldr	r3, .L1106+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1106+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L323
	ldr	r3, .L1106+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L1106+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L324
.L323:
	ldr	r3, .L1106+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L324
	ldr	r3, .L1106+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L324
	ldr	r3, .L1106+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L324
	ldr	r3, .L1106+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L324
	ldr	r3, .L1106+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L324
	ldr	r3, .L1106+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L324:
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L325
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L325
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L325
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L326
.L325:
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L327
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L327
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L327
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L326
.L327:
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L328
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L328
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L328
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L326
.L328:
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L329
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L329
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L329
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L326
.L329:
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L330
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L330
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L330
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L326
.L330:
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L331
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L331
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L331
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L326
.L331:
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L332
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L332
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L332
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L326
.L332:
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L333
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L333
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L333
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L326
.L333:
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L326:
	ldr	r3, .L1106+88
	ldr	r3, [r3]	@ float
	ldr	r1, .L1106+112
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L334
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L335
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L335
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L335
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L335:
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L336
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L336
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L336
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L336:
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L337
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L337
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L337
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L337:
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L334
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L334
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L334
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L334:
	ldr	r3, .L1106+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L338
	ldr	r3, .L1106+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1106+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1106+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1106+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1106+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1106+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1106+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L338:
	ldr	r3, .L1106+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L340
	ldr	r3, .L1106+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1106+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1106+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1106+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1106+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1106+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1106+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L340:
	ldr	r3, .L1106
	ldr	r2, [r3]
	ldr	r3, .L1106+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L342
	ldr	r3, .L1106
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L342
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L342
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L342
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L342
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L342
	ldr	r3, .L1106+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1106+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L342
	ldr	r3, .L1106+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L343
.L342:
	ldr	r3, .L1106+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L343
	ldr	r3, .L1106+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L343
	ldr	r3, .L1106+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L343
	ldr	r3, .L1106+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L343
	ldr	r3, .L1106+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L343
	ldr	r3, .L1106+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L343:
	ldr	r3, .L1106+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1106+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L344
	ldr	r3, .L1106+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L344
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L344
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L344
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L344
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L344
	ldr	r3, .L1106+56
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L346
.L344:
	ldr	r3, .L1106+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L346
	ldr	r3, .L1106+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L346
	ldr	r3, .L1106+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L346
	ldr	r3, .L1106+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L346
	ldr	r3, .L1106+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L346
	ldr	r3, .L1106+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L346:
	ldr	r3, .L1106+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1106+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L347
	ldr	r3, .L1106
	ldr	r2, [r3]
	ldr	r3, .L1106+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L347
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L348
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L348
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L348
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L348:
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L347
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L347
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L347
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L347
.L349:
	ldr	r3, .L1106+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1106+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L350
.L347:
	ldr	r3, .L1106+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L350
	ldr	r3, .L1106+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L350
	ldr	r3, .L1106+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L350
	ldr	r3, .L1106+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L350
	ldr	r3, .L1106+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L350
	ldr	r3, .L1106+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L350:
	ldr	r3, .L1106
	ldr	r3, [r3]
	cmp	r3, #13
	bne	.L351
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L351
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L351
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L351
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L351
	ldr	r3, .L1106+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L351
	ldr	r3, .L1106+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L351
	ldr	r3, .L1106+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L351
	ldr	r3, .L1106+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L351
	ldr	r3, .L1106+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L351
	ldr	r3, .L1106+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L351:
	ldr	r3, .L1106
	ldr	r3, [r3]
	cmp	r3, #13
	bne	.L352
	ldr	r3, .L1106+84
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1106+112
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L353
	mov	r3, #0
	mov	r4, r3
.L353:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L354
.L352:
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L354
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L354
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L354
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L354
	ldr	r3, .L1106+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L354
	ldr	r3, .L1106+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L354
	ldr	r3, .L1106+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	b	.L1107
.L1108:
	.align	2
.L1106:
	.word	v1
	.word	delta
	.word	p13_evt
	.word	p13_l3
	.word	p13_l2
	.word	p13_l0
	.word	p13_l1
	.word	_x_p13_l3
	.word	_x_p13_l2
	.word	_x_p13_l1
	.word	_x_p13_l0
	.word	_x_p13_c
	.word	p13_c
	.word	v1
	.word	_x_v1
	.word	_x_p12_l3
	.word	_x_p12_l2
	.word	_x_p12_l0
	.word	_x_p12_l1
	.word	v2
	.word	_x_v2
	.word	p12_c
	.word	_x_p12_c
	.word	p12_l3
	.word	p12_l2
	.word	p12_l0
	.word	p12_l1
	.word	p12_evt
	.word	1098907648
	.word	_x_p11_l1
	.word	p11_l2
	.word	_x_p11_l2
	.word	p11_l3
	.word	_x_p11_l3
	.word	delta
	.word	p11_c
	.word	_x_p11_c
	.word	p11_evt
	.word	p11_l0
	.word	_x_p11_l0
	.word	p11_l1
.L1107:
	cmp	r3, #0
	beq	.L354
	ldr	r3, .L1106+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L354
	ldr	r3, .L1106+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L354
	ldr	r3, .L1106+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L354:
	ldr	r3, .L1106+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1106+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L355
	ldr	r3, .L1106+52
	ldr	r2, [r3]
	ldr	r3, .L1106+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L355
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L356
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L356
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L356
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L357
.L356:
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L355
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L355
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L355
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L357
.L355:
	ldr	r3, .L1106+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L357
	ldr	r3, .L1106+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L357
	ldr	r3, .L1106+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L357
	ldr	r3, .L1106+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L357
	ldr	r3, .L1106+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L357
	ldr	r3, .L1106+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L357:
	ldr	r3, .L1106+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L358
	ldr	r3, .L1106+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1106+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L359
.L358:
	ldr	r3, .L1106+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L359
	ldr	r3, .L1106+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L359
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L359
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L359
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L359
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L359
	ldr	r3, .L1106+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L359
	ldr	r3, .L1106+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L359
	ldr	r3, .L1106+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L359
	ldr	r3, .L1106+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L359:
	ldr	r3, .L1106+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L360
	ldr	r3, .L1106+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L361
.L360:
	ldr	r3, .L1106+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L361
	ldr	r3, .L1106+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L361
	ldr	r3, .L1106+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L361
	ldr	r3, .L1106+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L361
	ldr	r3, .L1106+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L361
	ldr	r3, .L1106+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L361
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L361
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L361
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L361
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L361:
	ldr	r3, .L1106+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L362
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L362
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L362
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L362
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L362
	ldr	r3, .L1106+52
	ldr	r2, [r3]
	ldr	r3, .L1106+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L362
	ldr	r3, .L1106+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L363
.L362:
	ldr	r3, .L1106+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L363
	ldr	r3, .L1106+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L363
	ldr	r3, .L1106+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L363
	ldr	r3, .L1106+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L363
	ldr	r3, .L1106+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L363
	ldr	r3, .L1106+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L363:
	ldr	r3, .L1106+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1106+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L364
	ldr	r3, .L1106+52
	ldr	r2, [r3]
	ldr	r3, .L1106+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L364
	ldr	r3, .L1106+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1106+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L364
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L366
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L366
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L366
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L367
.L366:
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L364
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L364
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L364
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L367
.L364:
	ldr	r3, .L1106+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L367
	ldr	r3, .L1106+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L367
	ldr	r3, .L1106+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L367
	ldr	r3, .L1106+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L367
	ldr	r3, .L1106+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L367
	ldr	r3, .L1106+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L367:
	ldr	r3, .L1106+52
	ldr	r3, [r3]
	cmp	r3, #13
	bne	.L368
	ldr	r3, .L1106+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L368
	ldr	r3, .L1106+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L368
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L368
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L368
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L368
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L368
	ldr	r3, .L1106+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L368
	ldr	r3, .L1106+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L368
	ldr	r3, .L1106+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L368
	ldr	r3, .L1106+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L368:
	ldr	r3, .L1106+52
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L369
	ldr	r3, .L1106+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L369
	ldr	r3, .L1106+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L369
	ldr	r3, .L1106+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L369
	ldr	r3, .L1106+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L369
	ldr	r3, .L1106+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L369
	ldr	r3, .L1106+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L369
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L369
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L369
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L369
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L369:
	ldr	r3, .L1106+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1106+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L370
	ldr	r3, .L1106+52
	ldr	r2, [r3]
	ldr	r3, .L1106+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L370
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L370
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L370
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L370
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L370
	ldr	r3, .L1106+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L371
.L370:
	ldr	r3, .L1106+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L371
	ldr	r3, .L1106+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L371
	ldr	r3, .L1106+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L371
	ldr	r3, .L1106+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L371
	ldr	r3, .L1106+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L371
	ldr	r3, .L1106+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L371:
	ldr	r3, .L1106+52
	ldr	r2, [r3]
	ldr	r3, .L1106+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L372
	ldr	r3, .L1106+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L372
	ldr	r3, .L1106+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L372
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L372
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L372
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L372
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L374
.L372:
	ldr	r3, .L1106+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L374
	ldr	r3, .L1106+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L374
	ldr	r3, .L1106+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L374
	ldr	r3, .L1106+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L374
	ldr	r3, .L1106+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L374
	ldr	r3, .L1106+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L374:
	ldr	r3, .L1106+56
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L375
	ldr	r3, .L1106+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L375
	ldr	r3, .L1106+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L375
	ldr	r3, .L1106+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L375
	ldr	r3, .L1106+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L375
	ldr	r3, .L1106+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1106+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L375
	ldr	r3, .L1106+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1106+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L376
.L375:
	ldr	r3, .L1106+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L376
	ldr	r3, .L1106+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L376
	ldr	r3, .L1106+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L376
	ldr	r3, .L1106+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L376
	ldr	r3, .L1106+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L376
	ldr	r3, .L1106+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L376:
	ldr	r3, .L1106+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L377
	ldr	r3, .L1106+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L377
	ldr	r3, .L1106+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L377
	ldr	r3, .L1106+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L377:
	ldr	r3, .L1106+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L379
	ldr	r3, .L1106+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L379
	ldr	r3, .L1106+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L379
	ldr	r3, .L1106+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L379:
	ldr	r3, .L1106+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L380
	ldr	r3, .L1106+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L380
	ldr	r3, .L1106+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L380
	ldr	r3, .L1106+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L380:
	ldr	r3, .L1106+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L381
	ldr	r3, .L1106+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L381
	ldr	r3, .L1106+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L381
	ldr	r3, .L1106+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L381:
	ldr	r3, .L1106+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L382
	ldr	r3, .L1106+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L382
	ldr	r3, .L1106+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L382
	ldr	r3, .L1106+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L382:
	ldr	r3, .L1106+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L383
	ldr	r3, .L1106+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L383
	ldr	r3, .L1106+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L383
	ldr	r3, .L1106+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
.L383:
	ldr	r3, .L1106+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L384
	ldr	r3, .L1106+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L384
	ldr	r3, .L1106+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L384
	ldr	r3, .L1106+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L384:
	ldr	r3, .L1106+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L385
	ldr	r3, .L1106+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L385
	ldr	r3, .L1106+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L385
	ldr	r3, .L1106+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L385:
	ldr	r3, .L1106+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1106+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1106+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1106+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L378:
	ldr	r3, .L1106+144
	ldr	r3, [r3]	@ float
	ldr	r1, .L1106+112
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L386
	ldr	r3, .L1106+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L387
	ldr	r3, .L1106+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L387
	ldr	r3, .L1106+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L387
	ldr	r3, .L1106+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L387:
	ldr	r3, .L1106+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L388
	ldr	r3, .L1106+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L388
	ldr	r3, .L1106+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L388
	ldr	r3, .L1106+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L388:
	ldr	r3, .L1106+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L389
	ldr	r3, .L1106+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L389
	ldr	r3, .L1106+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L389
	ldr	r3, .L1106+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L389:
	ldr	r3, .L1106+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L386
	ldr	r3, .L1106+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L386
	ldr	r3, .L1106+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L386
	ldr	r3, .L1106+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L386:
	ldr	r3, .L1106+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L390
	ldr	r3, .L1106+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1106+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1106+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1106+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1106+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1106+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1106+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1106+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1106+136
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1106+140
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1106+144
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L390:
	ldr	r3, .L1106+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L392
	ldr	r3, .L1106+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1106+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1106+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1109
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1109+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1109+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1109+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1109+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1109+108
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1109+28
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1109+32
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L392:
	ldr	r3, .L1109+64
	ldr	r2, [r3]
	ldr	r3, .L1109+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L394
	ldr	r3, .L1109+64
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L394
	ldr	r3, .L1109+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L394
	ldr	r3, .L1109+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L394
	ldr	r3, .L1109+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L394
	ldr	r3, .L1109
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L394
	ldr	r3, .L1109+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1109+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L394
	ldr	r3, .L1109+32
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L395
.L394:
	ldr	r3, .L1109+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L395
	ldr	r3, .L1109+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L395
	ldr	r3, .L1109+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L395
	ldr	r3, .L1109+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L395
	ldr	r3, .L1109+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L395
	ldr	r3, .L1109+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L395:
	ldr	r3, .L1109+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1109+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L396
	ldr	r3, .L1109+32
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L396
	ldr	r3, .L1109+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L396
	ldr	r3, .L1109+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L396
	ldr	r3, .L1109
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L396
	ldr	r3, .L1109+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L396
	ldr	r3, .L1109+68
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L398
.L396:
	ldr	r3, .L1109+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L398
	ldr	r3, .L1109+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L398
	ldr	r3, .L1109+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L398
	ldr	r3, .L1109+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L398
	ldr	r3, .L1109+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L398
	ldr	r3, .L1109+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L398:
	ldr	r3, .L1109+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1109+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L399
	ldr	r3, .L1109+64
	ldr	r2, [r3]
	ldr	r3, .L1109+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L399
	ldr	r3, .L1109+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L400
	ldr	r3, .L1109+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L400
	ldr	r3, .L1109+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L400
	ldr	r3, .L1109
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L401
.L400:
	ldr	r3, .L1109+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L399
	ldr	r3, .L1109+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L399
	ldr	r3, .L1109+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L399
	ldr	r3, .L1109
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L399
.L401:
	ldr	r3, .L1109+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L1109+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L402
.L399:
	ldr	r3, .L1109+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L402
	ldr	r3, .L1109+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L402
	ldr	r3, .L1109+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L402
	ldr	r3, .L1109+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L402
	ldr	r3, .L1109+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L402
	ldr	r3, .L1109+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L402:
	ldr	r3, .L1109+64
	ldr	r3, [r3]
	cmp	r3, #12
	bne	.L403
	ldr	r3, .L1109+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L403
	ldr	r3, .L1109+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L403
	ldr	r3, .L1109+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L403
	ldr	r3, .L1109
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L403
	ldr	r3, .L1109+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L403
	ldr	r3, .L1109+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L403
	ldr	r3, .L1109+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L403
	ldr	r3, .L1109+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L403
	ldr	r3, .L1109+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L403
	ldr	r3, .L1109+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L403:
	ldr	r3, .L1109+64
	ldr	r3, [r3]
	cmp	r3, #12
	bne	.L404
	ldr	r3, .L1109+28
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1109+56
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	mov	r3, #0
	mov	r4, r3
.L405:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L406
.L404:
	ldr	r3, .L1109+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L406
	ldr	r3, .L1109+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L406
	ldr	r3, .L1109+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L406
	ldr	r3, .L1109
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L406
	ldr	r3, .L1109+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L406
	ldr	r3, .L1109+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L406
	ldr	r3, .L1109+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L406
	ldr	r3, .L1109+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L406
	ldr	r3, .L1109+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L406
	ldr	r3, .L1109+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L406:
	ldr	r3, .L1109+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1109+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L407
	ldr	r3, .L1109+64
	ldr	r2, [r3]
	ldr	r3, .L1109+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L407
	ldr	r3, .L1109+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L408
	ldr	r3, .L1109+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L408
	ldr	r3, .L1109+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L408
	ldr	r3, .L1109
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L409
.L408:
	ldr	r3, .L1109+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L407
	ldr	r3, .L1109+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L407
	ldr	r3, .L1109+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L407
	ldr	r3, .L1109
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L409
.L407:
	ldr	r3, .L1109+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L409
	ldr	r3, .L1109+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L409
	ldr	r3, .L1109+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L409
	ldr	r3, .L1109+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L409
	ldr	r3, .L1109+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L409
	ldr	r3, .L1109+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L409:
	ldr	r3, .L1109+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L410
	ldr	r3, .L1109+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L1109+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L411
.L410:
	ldr	r3, .L1109+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L411
	ldr	r3, .L1109+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L411
	ldr	r3, .L1109+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L411
	ldr	r3, .L1109+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L411
	ldr	r3, .L1109+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L411
	ldr	r3, .L1109
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L411
	ldr	r3, .L1109+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L411
	ldr	r3, .L1109+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L411
	ldr	r3, .L1109+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L411
	ldr	r3, .L1109+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L411:
	ldr	r3, .L1109+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L412
	ldr	r3, .L1109+32
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L413
.L412:
	ldr	r3, .L1109+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L413
	ldr	r3, .L1109+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L413
	ldr	r3, .L1109+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L413
	ldr	r3, .L1109+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L413
	ldr	r3, .L1109+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L413
	ldr	r3, .L1109+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L413
	ldr	r3, .L1109+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L413
	ldr	r3, .L1109+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L413
	ldr	r3, .L1109+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L413
	ldr	r3, .L1109
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L413:
	ldr	r3, .L1109+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L414
	ldr	r3, .L1109+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L414
	ldr	r3, .L1109+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L414
	ldr	r3, .L1109+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L414
	ldr	r3, .L1109
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L414
	ldr	r3, .L1109+64
	ldr	r2, [r3]
	ldr	r3, .L1109+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L414
	ldr	r3, .L1109+32
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L415
.L414:
	ldr	r3, .L1109+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L415
	ldr	r3, .L1109+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L415
	ldr	r3, .L1109+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L415
	ldr	r3, .L1109+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L415
	ldr	r3, .L1109+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L415
	ldr	r3, .L1109+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L415:
	ldr	r3, .L1109+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1109+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L416
	ldr	r3, .L1109+64
	ldr	r2, [r3]
	ldr	r3, .L1109+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L416
	ldr	r3, .L1109+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L1109+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L416
	ldr	r3, .L1109+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L418
	ldr	r3, .L1109+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L418
	ldr	r3, .L1109+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L418
	ldr	r3, .L1109
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L419
.L418:
	ldr	r3, .L1109+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L416
	ldr	r3, .L1109+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L416
	ldr	r3, .L1109
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L416
	ldr	r3, .L1109+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L419
.L416:
	ldr	r3, .L1109+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L419
	ldr	r3, .L1109+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L419
	ldr	r3, .L1109+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L419
	ldr	r3, .L1109+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L419
	ldr	r3, .L1109+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L419
	ldr	r3, .L1109+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L419:
	ldr	r3, .L1109+64
	ldr	r3, [r3]
	cmp	r3, #12
	bne	.L420
	ldr	r3, .L1109+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L420
	ldr	r3, .L1109+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L420
	ldr	r3, .L1109+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L420
	ldr	r3, .L1109+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L420
	ldr	r3, .L1109+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L420
	ldr	r3, .L1109
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L420
	ldr	r3, .L1109+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L420
	ldr	r3, .L1109+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L420
	ldr	r3, .L1109+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L420
	ldr	r3, .L1109+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L420:
	ldr	r3, .L1109+64
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L421
	ldr	r3, .L1109+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L421
	ldr	r3, .L1109+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L421
	ldr	r3, .L1109+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L421
	ldr	r3, .L1109+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L421
	ldr	r3, .L1109+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L421
	ldr	r3, .L1109+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L421
	ldr	r3, .L1109+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L421
	ldr	r3, .L1109+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L421
	ldr	r3, .L1109
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L421
	ldr	r3, .L1109+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L421:
	ldr	r3, .L1109+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1109+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L422
	ldr	r3, .L1109+64
	ldr	r2, [r3]
	ldr	r3, .L1109+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L422
	ldr	r3, .L1109+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L422
	ldr	r3, .L1109+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L422
	ldr	r3, .L1109+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L422
	ldr	r3, .L1109
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L422
	ldr	r3, .L1109+32
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L423
.L422:
	ldr	r3, .L1109+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L423
	ldr	r3, .L1109+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L423
	ldr	r3, .L1109+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L423
	ldr	r3, .L1109+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L423
	ldr	r3, .L1109+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L423
	ldr	r3, .L1109+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L423:
	ldr	r3, .L1109+64
	ldr	r2, [r3]
	ldr	r3, .L1109+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L424
	ldr	r3, .L1109+32
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L424
	ldr	r3, .L1109+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L424
	ldr	r3, .L1109+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L424
	ldr	r3, .L1109+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L424
	ldr	r3, .L1109+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L424
	ldr	r3, .L1109
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L426
.L424:
	ldr	r3, .L1109+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L426
	ldr	r3, .L1109+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L426
	ldr	r3, .L1109+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L426
	ldr	r3, .L1109+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L426
	ldr	r3, .L1109+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L426
	ldr	r3, .L1109+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L426:
	ldr	r3, .L1109+68
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L427
	ldr	r3, .L1109+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L427
	b	.L1110
.L1111:
	.align	2
.L1109:
	.word	_x_p11_l1
	.word	p11_l2
	.word	_x_p11_l2
	.word	_x_p11_l3
	.word	_x_p11_l2
	.word	_x_p11_l0
	.word	_x_p11_l1
	.word	p11_c
	.word	_x_p11_c
	.word	p11_l3
	.word	p11_l2
	.word	p11_l0
	.word	p11_l1
	.word	p11_evt
	.word	1098907648
	.word	_x_v2
	.word	v1
	.word	_x_v1
	.word	p10_c
	.word	_x_p10_l3
	.word	_x_p10_l2
	.word	_x_p10_l0
	.word	_x_p10_l1
	.word	p10_l0
	.word	p10_l1
	.word	v2
	.word	_x_p10_c
	.word	delta
	.word	p10_evt
	.word	p10_l3
	.word	p10_l2
.L1110:
	ldr	r3, .L1109+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L427
	ldr	r3, .L1109+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L427
	ldr	r3, .L1109+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L427
	ldr	r3, .L1109+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1109+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L427
	ldr	r3, .L1109+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L1109+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L428
.L427:
	ldr	r3, .L1109+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L428
	ldr	r3, .L1109+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L428
	ldr	r3, .L1109+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L428
	ldr	r3, .L1109+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L428
	ldr	r3, .L1109+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L428
	ldr	r3, .L1109+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L428:
	ldr	r3, .L1109+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L429
	ldr	r3, .L1109+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L429
	ldr	r3, .L1109+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L429
	ldr	r3, .L1109+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L430
.L429:
	ldr	r3, .L1109+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L431
	ldr	r3, .L1109+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L431
	ldr	r3, .L1109+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L431
	ldr	r3, .L1109+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L430
.L431:
	ldr	r3, .L1109+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L432
	ldr	r3, .L1109+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L432
	ldr	r3, .L1109+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L432
	ldr	r3, .L1109+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L430
.L432:
	ldr	r3, .L1109+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L433
	ldr	r3, .L1109+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L433
	ldr	r3, .L1109+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L433
	ldr	r3, .L1109+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L430
.L433:
	ldr	r3, .L1109+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L434
	ldr	r3, .L1109+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L434
	ldr	r3, .L1109+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L434
	ldr	r3, .L1109+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L430
.L434:
	ldr	r3, .L1109+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L435
	ldr	r3, .L1109+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L435
	ldr	r3, .L1109+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L435
	ldr	r3, .L1109+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L430
.L435:
	ldr	r3, .L1109+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L436
	ldr	r3, .L1109+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L436
	ldr	r3, .L1109+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L436
	ldr	r3, .L1109+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L430
.L436:
	ldr	r3, .L1109+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L437
	ldr	r3, .L1109+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L437
	ldr	r3, .L1109+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L437
	ldr	r3, .L1109+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L430
.L437:
	ldr	r3, .L1109+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1109+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1109+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1109+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L430:
	ldr	r3, .L1109+104
	ldr	r3, [r3]	@ float
	ldr	r1, .L1109+56
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L438
	ldr	r3, .L1109+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L439
	ldr	r3, .L1109+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L439
	ldr	r3, .L1109+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L439
	ldr	r3, .L1109+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L439:
	ldr	r3, .L1109+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L440
	ldr	r3, .L1109+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L440
	ldr	r3, .L1109+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L440
	ldr	r3, .L1109+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L440:
	ldr	r3, .L1109+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L441
	ldr	r3, .L1109+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L441
	ldr	r3, .L1109+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L441
	ldr	r3, .L1109+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L441:
	ldr	r3, .L1109+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L438
	ldr	r3, .L1109+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L438
	ldr	r3, .L1109+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L438
	ldr	r3, .L1109+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L438:
	ldr	r3, .L1109+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L442
	ldr	r3, .L1109+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1109+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1109+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1109+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1109+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1109+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1109+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1109+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1109+108
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1109+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1109+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L442:
	ldr	r3, .L1109+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L444
	ldr	r3, .L1109+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1109+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1109+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1109+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1109+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1109+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1109+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1109+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1109+108
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1109+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1109+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L444:
	ldr	r3, .L1109+64
	ldr	r2, [r3]
	ldr	r3, .L1109+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L446
	ldr	r3, .L1109+64
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L446
	ldr	r3, .L1109+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L446
	ldr	r3, .L1109+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L446
	ldr	r3, .L1109+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L446
	ldr	r3, .L1109+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L446
	ldr	r3, .L1109+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1109+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L446
	ldr	r3, .L1109+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L447
.L446:
	ldr	r3, .L1109+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L447
	ldr	r3, .L1109+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L447
	ldr	r3, .L1109+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L447
	ldr	r3, .L1109+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L447
	ldr	r3, .L1109+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L447
	ldr	r3, .L1109+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L447:
	ldr	r3, .L1109+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1109+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L448
	ldr	r3, .L1109+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L448
	ldr	r3, .L1109+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L448
	ldr	r3, .L1109+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L448
	ldr	r3, .L1109+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L448
	ldr	r3, .L1109+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L448
	ldr	r3, .L1109+68
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L450
.L448:
	ldr	r3, .L1109+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L450
	ldr	r3, .L1109+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L450
	ldr	r3, .L1109+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L450
	ldr	r3, .L1109+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L450
	ldr	r3, .L1109+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L450
	ldr	r3, .L1109+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L450:
	ldr	r3, .L1109+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1109+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L451
	ldr	r3, .L1109+64
	ldr	r2, [r3]
	ldr	r3, .L1109+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L451
	ldr	r3, .L1109+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L452
	ldr	r3, .L1109+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L452
	ldr	r3, .L1109+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L452
	ldr	r3, .L1109+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L453
.L452:
	ldr	r3, .L1109+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L451
	ldr	r3, .L1109+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L451
	ldr	r3, .L1109+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L451
	ldr	r3, .L1109+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L451
.L453:
	ldr	r3, .L1109+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1109+104
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L454
.L451:
	ldr	r3, .L1109+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L454
	ldr	r3, .L1109+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L454
	ldr	r3, .L1109+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L454
	ldr	r3, .L1109+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L454
	ldr	r3, .L1109+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L454
	ldr	r3, .L1109+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L454:
	ldr	r3, .L1109+64
	ldr	r3, [r3]
	cmp	r3, #11
	bne	.L455
	ldr	r3, .L1109+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L455
	ldr	r3, .L1109+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L455
	ldr	r3, .L1109+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L455
	ldr	r3, .L1109+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L455
	ldr	r3, .L1109+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L455
	ldr	r3, .L1109+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L455
	ldr	r3, .L1109+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L455
	ldr	r3, .L1109+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L455
	ldr	r3, .L1109+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L455
	ldr	r3, .L1109+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L455:
	ldr	r3, .L1109+64
	ldr	r3, [r3]
	cmp	r3, #11
	bne	.L456
	ldr	r3, .L1109+72
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1109+56
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L457
	mov	r3, #0
	mov	r4, r3
.L457:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L458
.L456:
	ldr	r3, .L1109+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L458
	ldr	r3, .L1109+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L458
	ldr	r3, .L1109+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L458
	ldr	r3, .L1109+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L458
	ldr	r3, .L1109+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L458
	ldr	r3, .L1109+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L458
	ldr	r3, .L1109+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L458
	ldr	r3, .L1109+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L458
	ldr	r3, .L1109+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L458
	ldr	r3, .L1109+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L458:
	ldr	r3, .L1109+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1109+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L459
	ldr	r3, .L1109+64
	ldr	r2, [r3]
	ldr	r3, .L1109+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L459
	ldr	r3, .L1109+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L460
	ldr	r3, .L1109+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L460
	ldr	r3, .L1109+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L460
	ldr	r3, .L1109+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L461
.L460:
	ldr	r3, .L1109+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L459
	ldr	r3, .L1109+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L459
	ldr	r3, .L1109+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L459
	ldr	r3, .L1109+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L461
.L459:
	ldr	r3, .L1109+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L461
	ldr	r3, .L1109+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L461
	ldr	r3, .L1109+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L461
	ldr	r3, .L1109+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L461
	ldr	r3, .L1109+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L461
	ldr	r3, .L1109+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L461:
	ldr	r3, .L1109+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L462
	ldr	r3, .L1109+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1109+104
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L463
.L462:
	ldr	r3, .L1109+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L463
	ldr	r3, .L1109+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L463
	ldr	r3, .L1109+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L463
	ldr	r3, .L1109+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L463
	ldr	r3, .L1109+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L463
	ldr	r3, .L1109+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L463
	ldr	r3, .L1109+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L463
	ldr	r3, .L1109+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L463
	ldr	r3, .L1109+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L463
	ldr	r3, .L1109+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L463:
	ldr	r3, .L1109+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L464
	ldr	r3, .L1109+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L465
.L464:
	ldr	r3, .L1109+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L465
	ldr	r3, .L1109+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L465
	ldr	r3, .L1109+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L465
	ldr	r3, .L1109+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L465
	ldr	r3, .L1112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L465
	ldr	r3, .L1112+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L465
	ldr	r3, .L1112+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L465
	ldr	r3, .L1112+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L465
	ldr	r3, .L1112+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L465
	ldr	r3, .L1112+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L465:
	ldr	r3, .L1112+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L466
	ldr	r3, .L1112+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L466
	ldr	r3, .L1112+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L466
	ldr	r3, .L1112+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L466
	ldr	r3, .L1112+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L466
	ldr	r3, .L1112+52
	ldr	r2, [r3]
	ldr	r3, .L1112+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L466
	ldr	r3, .L1112+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L467
.L466:
	ldr	r3, .L1112+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L467
	ldr	r3, .L1112+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L467
	ldr	r3, .L1112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L467
	ldr	r3, .L1112+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L467
	ldr	r3, .L1112+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L467
	ldr	r3, .L1112+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L467:
	ldr	r3, .L1112+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1112+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L468
	ldr	r3, .L1112+52
	ldr	r2, [r3]
	ldr	r3, .L1112+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L468
	ldr	r3, .L1112+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1112+28
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L468
	ldr	r3, .L1112+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L470
	ldr	r3, .L1112+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L470
	ldr	r3, .L1112+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L470
	ldr	r3, .L1112+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L471
.L470:
	ldr	r3, .L1112+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L468
	ldr	r3, .L1112+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L468
	ldr	r3, .L1112+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L468
	ldr	r3, .L1112+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L471
.L468:
	ldr	r3, .L1112+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L471
	ldr	r3, .L1112+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L471
	ldr	r3, .L1112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L471
	ldr	r3, .L1112+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L471
	ldr	r3, .L1112+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L471
	ldr	r3, .L1112+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L471:
	ldr	r3, .L1112+52
	ldr	r3, [r3]
	cmp	r3, #11
	bne	.L472
	ldr	r3, .L1112+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L472
	ldr	r3, .L1112+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L472
	ldr	r3, .L1112+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L472
	ldr	r3, .L1112+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L472
	ldr	r3, .L1112+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L472
	ldr	r3, .L1112+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L472
	ldr	r3, .L1112+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L472
	ldr	r3, .L1112+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L472
	ldr	r3, .L1112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L472
	ldr	r3, .L1112+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L472:
	ldr	r3, .L1112+52
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L473
	ldr	r3, .L1112+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L473
	ldr	r3, .L1112+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L473
	ldr	r3, .L1112+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L473
	ldr	r3, .L1112+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L473
	ldr	r3, .L1112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L473
	ldr	r3, .L1112+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L473
	ldr	r3, .L1112+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L473
	ldr	r3, .L1112+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L473
	ldr	r3, .L1112+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L473
	ldr	r3, .L1112+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L473:
	ldr	r3, .L1112+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1112+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L474
	ldr	r3, .L1112+52
	ldr	r2, [r3]
	ldr	r3, .L1112+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L474
	ldr	r3, .L1112+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L474
	ldr	r3, .L1112+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L474
	ldr	r3, .L1112+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L474
	ldr	r3, .L1112+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L474
	ldr	r3, .L1112+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L475
.L474:
	ldr	r3, .L1112+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L475
	ldr	r3, .L1112+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L475
	ldr	r3, .L1112+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L475
	ldr	r3, .L1112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L475
	ldr	r3, .L1112+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L475
	ldr	r3, .L1112+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L475:
	ldr	r3, .L1112+52
	ldr	r2, [r3]
	ldr	r3, .L1112+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L476
	ldr	r3, .L1112+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L476
	ldr	r3, .L1112+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L476
	ldr	r3, .L1112+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L476
	ldr	r3, .L1112+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L476
	ldr	r3, .L1112+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L476
	ldr	r3, .L1112+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L478
.L476:
	ldr	r3, .L1112+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L478
	ldr	r3, .L1112+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L478
	ldr	r3, .L1112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L478
	ldr	r3, .L1112+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L478
	ldr	r3, .L1112+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L478
	ldr	r3, .L1112+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L478:
	ldr	r3, .L1112+56
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L479
	ldr	r3, .L1112+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L479
	ldr	r3, .L1112+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L479
	ldr	r3, .L1112+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L479
	ldr	r3, .L1112+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L479
	ldr	r3, .L1112+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1112+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L479
	ldr	r3, .L1112+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1112+28
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L480
.L479:
	ldr	r3, .L1112+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L480
	ldr	r3, .L1112+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L480
	ldr	r3, .L1112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L480
	ldr	r3, .L1112+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L480
	ldr	r3, .L1112+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L480
	ldr	r3, .L1112+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L480:
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L481
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L481
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L481
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L482
.L481:
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L483
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L483
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L483
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L482
.L483:
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L484
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L484
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L484
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L482
.L484:
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L485
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L485
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L485
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L482
.L485:
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L486
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L486
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L486
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L482
.L486:
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L487
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L487
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L487
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L482
.L487:
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L488
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L488
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L488
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L482
.L488:
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L489
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L489
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L489
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L482
.L489:
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L482:
	ldr	r3, .L1112+88
	ldr	r3, [r3]	@ float
	ldr	r1, .L1112+48
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L490
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L491
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L491
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L491
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L491:
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L492
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L492
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L492
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L492:
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L493
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L493
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L493
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L493:
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L490
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L490
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L490
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L490:
	ldr	r3, .L1112+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L494
	ldr	r3, .L1112+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1112+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1112+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1112+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1112+108
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1112+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1112+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L494:
	ldr	r3, .L1112+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L496
	ldr	r3, .L1112+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1112+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1112+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1112+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1112+108
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1112+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1112+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L496:
	ldr	r3, .L1112+52
	ldr	r2, [r3]
	ldr	r3, .L1112+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L498
	ldr	r3, .L1112+52
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L498
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L498
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L498
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L498
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L498
	ldr	r3, .L1112+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1112+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L498
	ldr	r3, .L1112+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L499
.L498:
	ldr	r3, .L1112+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L499
	ldr	r3, .L1112+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L499
	ldr	r3, .L1112+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L499
	ldr	r3, .L1112+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L499
	ldr	r3, .L1112+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L499
	ldr	r3, .L1112+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L499:
	ldr	r3, .L1112+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1112+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L500
	ldr	r3, .L1112+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L500
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L500
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L500
	b	.L1113
.L1114:
	.align	2
.L1112:
	.word	p10_l0
	.word	p10_l1
	.word	_x_p10_l3
	.word	_x_p10_l2
	.word	_x_p10_l0
	.word	_x_p10_l1
	.word	_x_v2
	.word	_x_p10_c
	.word	p10_l3
	.word	p10_l2
	.word	p10_evt
	.word	p10_c
	.word	1098907648
	.word	v1
	.word	_x_v1
	.word	_x_p9_l3
	.word	_x_p9_l2
	.word	_x_p9_l0
	.word	_x_p9_l1
	.word	v2
	.word	_x_v2
	.word	p9_c
	.word	_x_p9_c
	.word	p9_l3
	.word	p9_l2
	.word	p9_l0
	.word	p9_l1
	.word	delta
	.word	p9_evt
	.word	_x_p8_l1
	.word	_x_p8_l0
	.word	_x_p8_l3
	.word	_x_p8_l2
.L1113:
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L500
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L500
	ldr	r3, .L1112+56
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L502
.L500:
	ldr	r3, .L1112+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L502
	ldr	r3, .L1112+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L502
	ldr	r3, .L1112+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L502
	ldr	r3, .L1112+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L502
	ldr	r3, .L1112+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L502
	ldr	r3, .L1112+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L502:
	ldr	r3, .L1112+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1112+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L503
	ldr	r3, .L1112+52
	ldr	r2, [r3]
	ldr	r3, .L1112+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L503
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L504
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L504
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L504
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L505
.L504:
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L503
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L503
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L503
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L503
.L505:
	ldr	r3, .L1112+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1112+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L506
.L503:
	ldr	r3, .L1112+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L506
	ldr	r3, .L1112+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L506
	ldr	r3, .L1112+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L506
	ldr	r3, .L1112+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L506
	ldr	r3, .L1112+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L506
	ldr	r3, .L1112+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L506:
	ldr	r3, .L1112+52
	ldr	r3, [r3]
	cmp	r3, #10
	bne	.L507
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L507
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L507
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L507
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L507
	ldr	r3, .L1112+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L507
	ldr	r3, .L1112+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L507
	ldr	r3, .L1112+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L507
	ldr	r3, .L1112+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L507
	ldr	r3, .L1112+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L507
	ldr	r3, .L1112+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L507:
	ldr	r3, .L1112+52
	ldr	r3, [r3]
	cmp	r3, #10
	bne	.L508
	ldr	r3, .L1112+84
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1112+48
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L509
	mov	r3, #0
	mov	r4, r3
.L509:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L510
.L508:
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L510
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L510
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L510
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L510
	ldr	r3, .L1112+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L510
	ldr	r3, .L1112+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L510
	ldr	r3, .L1112+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L510
	ldr	r3, .L1112+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L510
	ldr	r3, .L1112+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L510
	ldr	r3, .L1112+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L510:
	ldr	r3, .L1112+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1112+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L511
	ldr	r3, .L1112+52
	ldr	r2, [r3]
	ldr	r3, .L1112+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L511
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L512
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L512
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L512
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L513
.L512:
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L511
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L511
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L511
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L513
.L511:
	ldr	r3, .L1112+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L513
	ldr	r3, .L1112+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L513
	ldr	r3, .L1112+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L513
	ldr	r3, .L1112+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L513
	ldr	r3, .L1112+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L513
	ldr	r3, .L1112+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L513:
	ldr	r3, .L1112+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L514
	ldr	r3, .L1112+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1112+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L515
.L514:
	ldr	r3, .L1112+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L515
	ldr	r3, .L1112+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L515
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L515
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L515
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L515
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L515
	ldr	r3, .L1112+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L515
	ldr	r3, .L1112+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L515
	ldr	r3, .L1112+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L515
	ldr	r3, .L1112+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L515:
	ldr	r3, .L1112+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L516
	ldr	r3, .L1112+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L517
.L516:
	ldr	r3, .L1112+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L517
	ldr	r3, .L1112+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L517
	ldr	r3, .L1112+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L517
	ldr	r3, .L1112+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L517
	ldr	r3, .L1112+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L517
	ldr	r3, .L1112+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L517
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L517
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L517
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L517
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L517:
	ldr	r3, .L1112+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L518
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L518
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L518
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L518
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L518
	ldr	r3, .L1112+52
	ldr	r2, [r3]
	ldr	r3, .L1112+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L518
	ldr	r3, .L1112+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L519
.L518:
	ldr	r3, .L1112+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L519
	ldr	r3, .L1112+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L519
	ldr	r3, .L1112+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L519
	ldr	r3, .L1112+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L519
	ldr	r3, .L1112+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L519
	ldr	r3, .L1112+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L519:
	ldr	r3, .L1112+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1112+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L520
	ldr	r3, .L1112+52
	ldr	r2, [r3]
	ldr	r3, .L1112+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L520
	ldr	r3, .L1112+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1112+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L520
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L522
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L522
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L522
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L523
.L522:
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L520
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L520
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L520
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L523
.L520:
	ldr	r3, .L1112+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L523
	ldr	r3, .L1112+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L523
	ldr	r3, .L1112+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L523
	ldr	r3, .L1112+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L523
	ldr	r3, .L1112+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L523
	ldr	r3, .L1112+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L523:
	ldr	r3, .L1112+52
	ldr	r3, [r3]
	cmp	r3, #10
	bne	.L524
	ldr	r3, .L1112+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L524
	ldr	r3, .L1112+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L524
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L524
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L524
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L524
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L524
	ldr	r3, .L1112+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L524
	ldr	r3, .L1112+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L524
	ldr	r3, .L1112+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L524
	ldr	r3, .L1112+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L524:
	ldr	r3, .L1112+52
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L525
	ldr	r3, .L1112+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L525
	ldr	r3, .L1112+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L525
	ldr	r3, .L1112+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L525
	ldr	r3, .L1112+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L525
	ldr	r3, .L1112+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L525
	ldr	r3, .L1112+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L525
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L525
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L525
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L525
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L525:
	ldr	r3, .L1112+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1112+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L526
	ldr	r3, .L1112+52
	ldr	r2, [r3]
	ldr	r3, .L1112+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L526
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L526
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L526
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L526
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L526
	ldr	r3, .L1112+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L527
.L526:
	ldr	r3, .L1112+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L527
	ldr	r3, .L1112+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L527
	ldr	r3, .L1112+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L527
	ldr	r3, .L1112+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L527
	ldr	r3, .L1112+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L527
	ldr	r3, .L1112+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L527:
	ldr	r3, .L1112+52
	ldr	r2, [r3]
	ldr	r3, .L1112+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L528
	ldr	r3, .L1112+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L528
	ldr	r3, .L1112+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L528
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L528
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L528
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L528
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L530
.L528:
	ldr	r3, .L1112+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L530
	ldr	r3, .L1112+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L530
	ldr	r3, .L1112+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L530
	ldr	r3, .L1112+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L530
	ldr	r3, .L1112+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L530
	ldr	r3, .L1112+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L530:
	ldr	r3, .L1112+56
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L531
	ldr	r3, .L1112+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L531
	ldr	r3, .L1112+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L531
	ldr	r3, .L1112+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L531
	ldr	r3, .L1112+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L531
	ldr	r3, .L1112+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1112+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L531
	ldr	r3, .L1112+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1112+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L532
.L531:
	ldr	r3, .L1112+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L532
	ldr	r3, .L1112+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L532
	ldr	r3, .L1112+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L532
	ldr	r3, .L1112+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L532
	ldr	r3, .L1112+108
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L532
	ldr	r3, .L1112+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L532:
	ldr	r3, .L1112+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L533
	ldr	r3, .L1112+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L533
	ldr	r3, .L1112+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L533
	ldr	r3, .L1112+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L534
.L533:
	ldr	r3, .L1112+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L535
	ldr	r3, .L1112+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L535
	ldr	r3, .L1112+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L535
	ldr	r3, .L1112+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L534
.L535:
	ldr	r3, .L1112+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L536
	ldr	r3, .L1112+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L536
	ldr	r3, .L1112+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L536
	ldr	r3, .L1112+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L534
.L536:
	ldr	r3, .L1112+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L537
	ldr	r3, .L1112+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L537
	ldr	r3, .L1112+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L537
	ldr	r3, .L1112+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L534
.L537:
	ldr	r3, .L1112+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L538
	ldr	r3, .L1112+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L538
	ldr	r3, .L1112+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L538
	ldr	r3, .L1112+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L534
.L538:
	ldr	r3, .L1112+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L539
	ldr	r3, .L1112+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L539
	ldr	r3, .L1112+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L539
	ldr	r3, .L1112+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L534
.L539:
	ldr	r3, .L1112+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L540
	ldr	r3, .L1112+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L540
	ldr	r3, .L1112+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L540
	ldr	r3, .L1112+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L534
.L540:
	ldr	r3, .L1112+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L541
	ldr	r3, .L1112+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L541
	ldr	r3, .L1115
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L541
	ldr	r3, .L1115+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L534
.L541:
	ldr	r3, .L1115+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1115+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1115
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1115+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L534:
	ldr	r3, .L1115+36
	ldr	r3, [r3]	@ float
	ldr	r1, .L1115+60
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L542
	ldr	r3, .L1115+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L543
	ldr	r3, .L1115+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L543
	ldr	r3, .L1115
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L543
	ldr	r3, .L1115+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L543:
	ldr	r3, .L1115+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L544
	ldr	r3, .L1115+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L544
	ldr	r3, .L1115
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L544
	ldr	r3, .L1115+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L544:
	ldr	r3, .L1115+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L545
	ldr	r3, .L1115+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L545
	ldr	r3, .L1115
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L545
	ldr	r3, .L1115+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L545:
	ldr	r3, .L1115+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L542
	ldr	r3, .L1115+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L542
	ldr	r3, .L1115
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L542
	ldr	r3, .L1115+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L542:
	ldr	r3, .L1115+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L546
	ldr	r3, .L1115+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1115
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1115+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1115+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1115+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1115+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1115+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1115+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1115+112
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1115+32
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1115+36
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L546:
	ldr	r3, .L1115+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L548
	ldr	r3, .L1115+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1115
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1115+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1115+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1115+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1115+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1115+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1115+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1115+112
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1115+32
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1115+36
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L548:
	ldr	r3, .L1115+120
	ldr	r2, [r3]
	ldr	r3, .L1115+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L550
	ldr	r3, .L1115+120
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L550
	ldr	r3, .L1115+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L550
	ldr	r3, .L1115+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L550
	ldr	r3, .L1115
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L550
	ldr	r3, .L1115+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L550
	ldr	r3, .L1115+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1115+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L550
	ldr	r3, .L1115+36
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L551
.L550:
	ldr	r3, .L1115+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L551
	ldr	r3, .L1115+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L551
	ldr	r3, .L1115+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L551
	ldr	r3, .L1115+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L551
	ldr	r3, .L1115+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L551
	ldr	r3, .L1115+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L551:
	ldr	r3, .L1115+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1115+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L552
	ldr	r3, .L1115+36
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L552
	ldr	r3, .L1115+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L552
	ldr	r3, .L1115+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L552
	ldr	r3, .L1115+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L552
	ldr	r3, .L1115
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L552
	ldr	r3, .L1115+72
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L554
.L552:
	ldr	r3, .L1115+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L554
	ldr	r3, .L1115+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L554
	ldr	r3, .L1115+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L554
	ldr	r3, .L1115+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L554
	ldr	r3, .L1115+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L554
	ldr	r3, .L1115+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L554:
	ldr	r3, .L1115+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1115+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L555
	ldr	r3, .L1115+120
	ldr	r2, [r3]
	ldr	r3, .L1115+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L555
	ldr	r3, .L1115+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L556
	ldr	r3, .L1115+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L556
	ldr	r3, .L1115
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L556
	ldr	r3, .L1115+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L557
.L556:
	ldr	r3, .L1115+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L555
	ldr	r3, .L1115+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L555
	ldr	r3, .L1115
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L555
	ldr	r3, .L1115+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L555
.L557:
	ldr	r3, .L1115+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L1115+36
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L558
.L555:
	ldr	r3, .L1115+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L558
	ldr	r3, .L1115+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L558
	ldr	r3, .L1115+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L558
	ldr	r3, .L1115+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L558
	ldr	r3, .L1115+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L558
	ldr	r3, .L1115+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L558:
	ldr	r3, .L1115+120
	ldr	r3, [r3]
	cmp	r3, #9
	bne	.L559
	ldr	r3, .L1115+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L559
	ldr	r3, .L1115+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L559
	ldr	r3, .L1115
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L559
	ldr	r3, .L1115+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L559
	ldr	r3, .L1115+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L559
	ldr	r3, .L1115+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L559
	ldr	r3, .L1115+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L559
	ldr	r3, .L1115+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L559
	ldr	r3, .L1115+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L559
	ldr	r3, .L1115+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L559:
	ldr	r3, .L1115+120
	ldr	r3, [r3]
	cmp	r3, #9
	bne	.L560
	ldr	r3, .L1115+32
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1115+60
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L561
	mov	r3, #0
	mov	r4, r3
.L561:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L562
.L560:
	ldr	r3, .L1115+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L562
	ldr	r3, .L1115+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L562
	ldr	r3, .L1115
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L562
	ldr	r3, .L1115+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L562
	ldr	r3, .L1115+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L562
	ldr	r3, .L1115+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L562
	ldr	r3, .L1115+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L562
	ldr	r3, .L1115+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L562
	ldr	r3, .L1115+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L562
	ldr	r3, .L1115+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L562:
	ldr	r3, .L1115+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1115+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L563
	ldr	r3, .L1115+120
	ldr	r2, [r3]
	ldr	r3, .L1115+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L563
	ldr	r3, .L1115+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L564
	ldr	r3, .L1115+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L564
	ldr	r3, .L1115
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L564
	ldr	r3, .L1115+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L565
.L564:
	ldr	r3, .L1115+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L563
	ldr	r3, .L1115+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L563
	ldr	r3, .L1115
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L563
	ldr	r3, .L1115+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L565
.L563:
	ldr	r3, .L1115+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L565
	ldr	r3, .L1115+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L565
	ldr	r3, .L1115+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L565
	ldr	r3, .L1115+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L565
	ldr	r3, .L1115+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L565
	ldr	r3, .L1115+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L565:
	ldr	r3, .L1115+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L566
	ldr	r3, .L1115+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L1115+36
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L567
.L566:
	ldr	r3, .L1115+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L567
	ldr	r3, .L1115+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L567
	ldr	r3, .L1115+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L567
	ldr	r3, .L1115+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L567
	ldr	r3, .L1115
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L567
	ldr	r3, .L1115+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L567
	ldr	r3, .L1115+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L567
	ldr	r3, .L1115+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L567
	ldr	r3, .L1115+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L567
	ldr	r3, .L1115+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L567:
	ldr	r3, .L1115+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L568
	ldr	r3, .L1115+36
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L569
.L568:
	ldr	r3, .L1115+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L569
	ldr	r3, .L1115+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L569
	ldr	r3, .L1115+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L569
	ldr	r3, .L1115+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L569
	ldr	r3, .L1115+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L569
	ldr	r3, .L1115+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L569
	ldr	r3, .L1115+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L569
	ldr	r3, .L1115+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L569
	ldr	r3, .L1115
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L569
	ldr	r3, .L1115+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L569:
	ldr	r3, .L1115+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L570
	ldr	r3, .L1115+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L570
	ldr	r3, .L1115+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L570
	ldr	r3, .L1115
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L570
	ldr	r3, .L1115+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L570
	ldr	r3, .L1115+120
	ldr	r2, [r3]
	ldr	r3, .L1115+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L570
	ldr	r3, .L1115+36
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L571
.L570:
	ldr	r3, .L1115+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L571
	ldr	r3, .L1115+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L571
	ldr	r3, .L1115+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L571
	ldr	r3, .L1115+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L571
	ldr	r3, .L1115+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L571
	ldr	r3, .L1115+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L571:
	ldr	r3, .L1115+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1115+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L572
	ldr	r3, .L1115+120
	ldr	r2, [r3]
	ldr	r3, .L1115+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L572
	ldr	r3, .L1115+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L1115+36
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L572
	ldr	r3, .L1115+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L574
	ldr	r3, .L1115+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L574
	ldr	r3, .L1115
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L574
	ldr	r3, .L1115+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L575
.L574:
	ldr	r3, .L1115+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L572
	ldr	r3, .L1115+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L572
	ldr	r3, .L1115+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L572
	ldr	r3, .L1115
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L575
.L572:
	ldr	r3, .L1115+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L575
	ldr	r3, .L1115+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L575
	ldr	r3, .L1115+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L575
	ldr	r3, .L1115+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L575
	ldr	r3, .L1115+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L575
	ldr	r3, .L1115+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L575:
	ldr	r3, .L1115+120
	ldr	r3, [r3]
	cmp	r3, #9
	bne	.L576
	ldr	r3, .L1115+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	b	.L1116
.L1117:
	.align	2
.L1115:
	.word	_x_p8_l0
	.word	_x_p8_l1
	.word	_x_p8_l3
	.word	_x_p8_l2
	.word	_x_p8_l3
	.word	_x_p8_l2
	.word	_x_p8_l0
	.word	_x_p8_l1
	.word	p8_c
	.word	_x_p8_c
	.word	p8_l3
	.word	p8_l2
	.word	p8_l0
	.word	p8_l1
	.word	p8_evt
	.word	1098907648
	.word	v2
	.word	_x_v2
	.word	_x_v1
	.word	_x_p7_c
	.word	_x_p7_l3
	.word	_x_p7_l2
	.word	_x_p7_l0
	.word	_x_p7_l1
	.word	p7_l3
	.word	p7_l2
	.word	p7_l1
	.word	p7_l0
	.word	delta
	.word	p7_evt
	.word	v1
	.word	p7_c
.L1116:
	cmp	r3, #0
	beq	.L576
	ldr	r3, .L1115+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L576
	ldr	r3, .L1115+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L576
	ldr	r3, .L1115+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L576
	ldr	r3, .L1115+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L576
	ldr	r3, .L1115+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L576
	ldr	r3, .L1115+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L576
	ldr	r3, .L1115+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L576
	ldr	r3, .L1115+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L576
	ldr	r3, .L1115+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L576:
	ldr	r3, .L1115+120
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L577
	ldr	r3, .L1115+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L577
	ldr	r3, .L1115+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L577
	ldr	r3, .L1115+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L577
	ldr	r3, .L1115+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L577
	ldr	r3, .L1115+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L577
	ldr	r3, .L1115+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L577
	ldr	r3, .L1115+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L577
	ldr	r3, .L1115+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L577
	ldr	r3, .L1115+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L577
	ldr	r3, .L1115+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L577:
	ldr	r3, .L1115+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1115+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L578
	ldr	r3, .L1115+120
	ldr	r2, [r3]
	ldr	r3, .L1115+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L578
	ldr	r3, .L1115+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L578
	ldr	r3, .L1115+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L578
	ldr	r3, .L1115+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L578
	ldr	r3, .L1115+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L578
	ldr	r3, .L1115+36
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L579
.L578:
	ldr	r3, .L1115+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L579
	ldr	r3, .L1115+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L579
	ldr	r3, .L1115+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L579
	ldr	r3, .L1115+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L579
	ldr	r3, .L1115+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L579
	ldr	r3, .L1115+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L579:
	ldr	r3, .L1115+120
	ldr	r2, [r3]
	ldr	r3, .L1115+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L580
	ldr	r3, .L1115+36
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L580
	ldr	r3, .L1115+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L580
	ldr	r3, .L1115+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L580
	ldr	r3, .L1115+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L580
	ldr	r3, .L1115+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L580
	ldr	r3, .L1115+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L582
.L580:
	ldr	r3, .L1115+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L582
	ldr	r3, .L1115+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L582
	ldr	r3, .L1115+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L582
	ldr	r3, .L1115+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L582
	ldr	r3, .L1115+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L582
	ldr	r3, .L1115+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L582:
	ldr	r3, .L1115+72
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L583
	ldr	r3, .L1115+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L583
	ldr	r3, .L1115+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L583
	ldr	r3, .L1115+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L583
	ldr	r3, .L1115+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L583
	ldr	r3, .L1115+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1115+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L583
	ldr	r3, .L1115+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L1115+36
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L584
.L583:
	ldr	r3, .L1115+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L584
	ldr	r3, .L1115+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L584
	ldr	r3, .L1115+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L584
	ldr	r3, .L1115+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L584
	ldr	r3, .L1115+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L584
	ldr	r3, .L1115+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L584:
	ldr	r3, .L1115+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L585
	ldr	r3, .L1115+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L585
	ldr	r3, .L1115+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L585
	ldr	r3, .L1115+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L586
.L585:
	ldr	r3, .L1115+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L587
	ldr	r3, .L1115+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L587
	ldr	r3, .L1115+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L587
	ldr	r3, .L1115+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L586
.L587:
	ldr	r3, .L1115+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L588
	ldr	r3, .L1115+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L588
	ldr	r3, .L1115+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L588
	ldr	r3, .L1115+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L586
.L588:
	ldr	r3, .L1115+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L589
	ldr	r3, .L1115+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L589
	ldr	r3, .L1115+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L589
	ldr	r3, .L1115+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L586
.L589:
	ldr	r3, .L1115+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L590
	ldr	r3, .L1115+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L590
	ldr	r3, .L1115+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L590
	ldr	r3, .L1115+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L586
.L590:
	ldr	r3, .L1115+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L591
	ldr	r3, .L1115+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L591
	ldr	r3, .L1115+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L591
	ldr	r3, .L1115+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L586
.L591:
	ldr	r3, .L1115+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L592
	ldr	r3, .L1115+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L592
	ldr	r3, .L1115+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L592
	ldr	r3, .L1115+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L586
.L592:
	ldr	r3, .L1115+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L593
	ldr	r3, .L1115+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L593
	ldr	r3, .L1115+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L593
	ldr	r3, .L1115+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L586
.L593:
	ldr	r3, .L1115+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1115+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1115+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1115+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L586:
	ldr	r3, .L1115+76
	ldr	r3, [r3]	@ float
	ldr	r1, .L1115+60
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L594
	ldr	r3, .L1115+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L595
	ldr	r3, .L1115+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L595
	ldr	r3, .L1115+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L595
	ldr	r3, .L1115+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L595:
	ldr	r3, .L1115+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L596
	ldr	r3, .L1115+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L596
	ldr	r3, .L1115+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L596
	ldr	r3, .L1115+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L596:
	ldr	r3, .L1115+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L597
	ldr	r3, .L1115+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L597
	ldr	r3, .L1115+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L597
	ldr	r3, .L1115+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L597:
	ldr	r3, .L1115+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L594
	ldr	r3, .L1115+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L594
	ldr	r3, .L1115+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L594
	ldr	r3, .L1115+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L594:
	ldr	r3, .L1115+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L598
	ldr	r3, .L1115+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1115+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1115+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1115+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1115+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1115+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1115+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1115+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1115+112
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1115+124
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1115+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L598:
	ldr	r3, .L1115+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L600
	ldr	r3, .L1115+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1115+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1115+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1115+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1115+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1115+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1115+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1115+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1115+112
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1115+124
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1115+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L600:
	ldr	r3, .L1115+120
	ldr	r2, [r3]
	ldr	r3, .L1115+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L602
	ldr	r3, .L1115+120
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L602
	ldr	r3, .L1115+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L602
	ldr	r3, .L1115+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L602
	ldr	r3, .L1115+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L602
	ldr	r3, .L1115+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L602
	ldr	r3, .L1115+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1115+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L602
	ldr	r3, .L1115+76
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L603
.L602:
	ldr	r3, .L1115+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L603
	ldr	r3, .L1115+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L603
	ldr	r3, .L1115+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L603
	ldr	r3, .L1115+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L603
	ldr	r3, .L1115+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L603
	ldr	r3, .L1115+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L603:
	ldr	r3, .L1115+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1115+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L604
	ldr	r3, .L1115+76
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L604
	ldr	r3, .L1115+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L604
	ldr	r3, .L1115+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L604
	ldr	r3, .L1115+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L604
	ldr	r3, .L1115+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L604
	ldr	r3, .L1115+72
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L606
.L604:
	ldr	r3, .L1115+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L606
	ldr	r3, .L1115+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L606
	ldr	r3, .L1115+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L606
	ldr	r3, .L1115+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L606
	ldr	r3, .L1115+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L606
	ldr	r3, .L1115+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L606:
	ldr	r3, .L1115+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1115+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L607
	ldr	r3, .L1115+120
	ldr	r2, [r3]
	ldr	r3, .L1115+72
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L607
	ldr	r3, .L1115+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L608
	ldr	r3, .L1115+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L608
	ldr	r3, .L1115+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L608
	ldr	r3, .L1115+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L609
.L608:
	ldr	r3, .L1115+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L607
	ldr	r3, .L1115+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L607
	ldr	r3, .L1115+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L607
	ldr	r3, .L1115+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L607
.L609:
	ldr	r3, .L1115+124
	ldr	r3, [r3]	@ float
	ldr	r2, .L1115+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L610
.L607:
	ldr	r3, .L1115+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L610
	ldr	r3, .L1115+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L610
	ldr	r3, .L1115+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L610
	ldr	r3, .L1115+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L610
	ldr	r3, .L1115+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L610
	ldr	r3, .L1115+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L610:
	ldr	r3, .L1115+120
	ldr	r3, [r3]
	cmp	r3, #8
	bne	.L611
	ldr	r3, .L1115+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L611
	ldr	r3, .L1115+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L611
	ldr	r3, .L1115+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L611
	ldr	r3, .L1115+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L611
	ldr	r3, .L1115+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L611
	ldr	r3, .L1115+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L611
	ldr	r3, .L1115+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L611
	ldr	r3, .L1115+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L611
	ldr	r3, .L1115+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L611
	ldr	r3, .L1115+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L611:
	ldr	r3, .L1115+120
	ldr	r3, [r3]
	cmp	r3, #8
	bne	.L612
	ldr	r3, .L1115+124
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1118
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L613
	mov	r3, #0
	mov	r4, r3
.L613:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L614
.L612:
	ldr	r3, .L1118+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L614
	ldr	r3, .L1118+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L614
	ldr	r3, .L1118+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L614
	ldr	r3, .L1118+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L614
	ldr	r3, .L1118+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L614
	ldr	r3, .L1118+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L614
	ldr	r3, .L1118+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L614
	ldr	r3, .L1118+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L614
	ldr	r3, .L1118+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L614
	ldr	r3, .L1118+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L614:
	ldr	r3, .L1118+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1118+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L615
	ldr	r3, .L1118+88
	ldr	r2, [r3]
	ldr	r3, .L1118+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L615
	ldr	r3, .L1118+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L616
	ldr	r3, .L1118+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L616
	ldr	r3, .L1118+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L616
	ldr	r3, .L1118+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L617
.L616:
	ldr	r3, .L1118+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L615
	ldr	r3, .L1118+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L615
	ldr	r3, .L1118+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L615
	ldr	r3, .L1118+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L617
.L615:
	ldr	r3, .L1118+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L617
	ldr	r3, .L1118+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L617
	ldr	r3, .L1118+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L617
	ldr	r3, .L1118+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L617
	ldr	r3, .L1118+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L617
	ldr	r3, .L1118+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L617:
	ldr	r3, .L1118+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L618
	ldr	r3, .L1118+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L1118+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L619
.L618:
	ldr	r3, .L1118+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L619
	ldr	r3, .L1118+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L619
	ldr	r3, .L1118+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L619
	ldr	r3, .L1118+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L619
	ldr	r3, .L1118+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L619
	ldr	r3, .L1118+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L619
	ldr	r3, .L1118+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L619
	ldr	r3, .L1118+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L619
	ldr	r3, .L1118+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L619
	ldr	r3, .L1118+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L619:
	ldr	r3, .L1118+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L620
	ldr	r3, .L1118+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L621
.L620:
	ldr	r3, .L1118+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L621
	ldr	r3, .L1118+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L621
	ldr	r3, .L1118+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L621
	ldr	r3, .L1118+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L621
	ldr	r3, .L1118+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L621
	ldr	r3, .L1118+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L621
	ldr	r3, .L1118+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L621
	ldr	r3, .L1118+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L621
	ldr	r3, .L1118+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L621
	ldr	r3, .L1118+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L621:
	ldr	r3, .L1118+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L622
	ldr	r3, .L1118+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L622
	ldr	r3, .L1118+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L622
	ldr	r3, .L1118+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L622
	ldr	r3, .L1118+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L622
	ldr	r3, .L1118+88
	ldr	r2, [r3]
	ldr	r3, .L1118+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L622
	ldr	r3, .L1118+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L623
.L622:
	ldr	r3, .L1118+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L623
	ldr	r3, .L1118+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L623
	ldr	r3, .L1118+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L623
	ldr	r3, .L1118+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L623
	ldr	r3, .L1118+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L623
	ldr	r3, .L1118+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L623:
	ldr	r3, .L1118+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1118+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L624
	ldr	r3, .L1118+88
	ldr	r2, [r3]
	ldr	r3, .L1118+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L624
	ldr	r3, .L1118+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L1118+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L624
	ldr	r3, .L1118+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L626
	ldr	r3, .L1118+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L626
	ldr	r3, .L1118+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L626
	ldr	r3, .L1118+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L627
.L626:
	ldr	r3, .L1118+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L624
	ldr	r3, .L1118+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L624
	ldr	r3, .L1118+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L624
	ldr	r3, .L1118+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L627
.L624:
	ldr	r3, .L1118+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L627
	ldr	r3, .L1118+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L627
	ldr	r3, .L1118+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L627
	ldr	r3, .L1118+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L627
	ldr	r3, .L1118+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L627
	ldr	r3, .L1118+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L627:
	ldr	r3, .L1118+88
	ldr	r3, [r3]
	cmp	r3, #8
	bne	.L628
	ldr	r3, .L1118+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L628
	ldr	r3, .L1118+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L628
	ldr	r3, .L1118+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L628
	ldr	r3, .L1118+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L628
	ldr	r3, .L1118+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L628
	ldr	r3, .L1118+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L628
	ldr	r3, .L1118+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L628
	ldr	r3, .L1118+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L628
	ldr	r3, .L1118+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L628
	ldr	r3, .L1118+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L628:
	ldr	r3, .L1118+88
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L629
	ldr	r3, .L1118+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L629
	ldr	r3, .L1118+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L629
	ldr	r3, .L1118+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L629
	ldr	r3, .L1118+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L629
	ldr	r3, .L1118+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L629
	ldr	r3, .L1118+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L629
	ldr	r3, .L1118+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L629
	ldr	r3, .L1118+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L629
	ldr	r3, .L1118+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L629
	ldr	r3, .L1118+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L629:
	ldr	r3, .L1118+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1118+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L630
	ldr	r3, .L1118+88
	ldr	r2, [r3]
	ldr	r3, .L1118+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L630
	ldr	r3, .L1118+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L630
	ldr	r3, .L1118+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L630
	ldr	r3, .L1118+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L630
	ldr	r3, .L1118+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L630
	ldr	r3, .L1118+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L631
.L630:
	ldr	r3, .L1118+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L631
	ldr	r3, .L1118+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L631
	ldr	r3, .L1118+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L631
	ldr	r3, .L1118+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L631
	ldr	r3, .L1118+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L631
	ldr	r3, .L1118+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L631:
	ldr	r3, .L1118+88
	ldr	r2, [r3]
	ldr	r3, .L1118+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L632
	ldr	r3, .L1118+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L632
	ldr	r3, .L1118+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L632
	ldr	r3, .L1118+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L632
	ldr	r3, .L1118+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L632
	ldr	r3, .L1118+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L632
	ldr	r3, .L1118+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L634
.L632:
	ldr	r3, .L1118+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L634
	ldr	r3, .L1118+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L634
	ldr	r3, .L1118+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L634
	ldr	r3, .L1118+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L634
	ldr	r3, .L1118+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L634
	ldr	r3, .L1118+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L634:
	ldr	r3, .L1118+92
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L635
	ldr	r3, .L1118+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L635
	ldr	r3, .L1118+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L635
	ldr	r3, .L1118+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L635
	ldr	r3, .L1118+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L635
	ldr	r3, .L1118+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1118+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L635
	ldr	r3, .L1118+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L1118+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L636
.L635:
	ldr	r3, .L1118+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L636
	ldr	r3, .L1118+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L636
	ldr	r3, .L1118+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L636
	ldr	r3, .L1118+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L636
	ldr	r3, .L1118+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L636
	ldr	r3, .L1118+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L636:
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L637
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L637
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L637
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L638
.L637:
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L639
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L639
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L639
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L638
.L639:
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L640
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L640
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L640
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L638
.L640:
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L641
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L641
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L641
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L638
.L641:
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L642
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L642
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L642
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L638
.L642:
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L643
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L643
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L643
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L638
.L643:
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L644
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L644
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L644
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L638
.L644:
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L645
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L645
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L645
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L638
.L645:
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L638:
	ldr	r3, .L1118+96
	ldr	r3, [r3]	@ float
	ldr	r1, .L1118
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L646
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L647
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L647
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L647
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L647:
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L648
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L648
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L648
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L648:
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L649
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L649
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L649
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L649:
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L646
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L646
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L646
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L646:
	ldr	r3, .L1118+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L650
	ldr	r3, .L1118+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1118+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1118+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1118+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1118+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1118+52
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1118+96
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	b	.L1119
.L1120:
	.align	2
.L1118:
	.word	1098907648
	.word	_x_p7_l3
	.word	_x_p7_l2
	.word	_x_p7_l0
	.word	_x_p7_l1
	.word	p7_l3
	.word	p7_l2
	.word	p7_l1
	.word	p7_l0
	.word	p7_evt
	.word	p7_c
	.word	_x_p7_c
	.word	1098907648
	.word	p6_c
	.word	v2
	.word	_x_p6_l1
	.word	p6_l3
	.word	p6_l2
	.word	p6_l1
	.word	p6_l0
	.word	delta
	.word	p6_evt
	.word	v1
	.word	_x_v1
	.word	_x_p6_c
	.word	_x_v2
	.word	_x_p6_l3
	.word	_x_p6_l2
	.word	_x_p6_l0
.L1119:
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L650:
	ldr	r3, .L1118+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L652
	ldr	r3, .L1118+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1118+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1118+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1118+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1118+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1118+52
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1118+96
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L652:
	ldr	r3, .L1118+88
	ldr	r2, [r3]
	ldr	r3, .L1118+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L654
	ldr	r3, .L1118+88
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L654
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L654
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L654
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L654
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L654
	ldr	r3, .L1118+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1118+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L654
	ldr	r3, .L1118+96
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L655
.L654:
	ldr	r3, .L1118+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L655
	ldr	r3, .L1118+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L655
	ldr	r3, .L1118+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L655
	ldr	r3, .L1118+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L655
	ldr	r3, .L1118+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L655
	ldr	r3, .L1118+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L655:
	ldr	r3, .L1118+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1118+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L656
	ldr	r3, .L1118+96
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L656
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L656
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L656
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L656
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L656
	ldr	r3, .L1118+92
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L658
.L656:
	ldr	r3, .L1118+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L658
	ldr	r3, .L1118+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L658
	ldr	r3, .L1118+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L658
	ldr	r3, .L1118+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L658
	ldr	r3, .L1118+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L658
	ldr	r3, .L1118+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L658:
	ldr	r3, .L1118+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1118+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L659
	ldr	r3, .L1118+88
	ldr	r2, [r3]
	ldr	r3, .L1118+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L659
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L660
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L660
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L660
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L661
.L660:
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L659
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L659
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L659
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L659
.L661:
	ldr	r3, .L1118+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L1118+96
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L662
.L659:
	ldr	r3, .L1118+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L662
	ldr	r3, .L1118+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L662
	ldr	r3, .L1118+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L662
	ldr	r3, .L1118+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L662
	ldr	r3, .L1118+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L662
	ldr	r3, .L1118+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L662:
	ldr	r3, .L1118+88
	ldr	r3, [r3]
	cmp	r3, #7
	bne	.L663
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L663
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L663
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L663
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L663
	ldr	r3, .L1118+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L663
	ldr	r3, .L1118+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L663
	ldr	r3, .L1118+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L663
	ldr	r3, .L1118+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L663
	ldr	r3, .L1118+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L663
	ldr	r3, .L1118+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L663:
	ldr	r3, .L1118+88
	ldr	r3, [r3]
	cmp	r3, #7
	bne	.L664
	ldr	r3, .L1118+52
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1118+48
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L665
	mov	r3, #0
	mov	r4, r3
.L665:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L666
.L664:
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L666
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L666
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L666
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L666
	ldr	r3, .L1118+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L666
	ldr	r3, .L1118+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L666
	ldr	r3, .L1118+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L666
	ldr	r3, .L1118+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L666
	ldr	r3, .L1118+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L666
	ldr	r3, .L1118+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L666:
	ldr	r3, .L1118+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1118+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L667
	ldr	r3, .L1118+88
	ldr	r2, [r3]
	ldr	r3, .L1118+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L667
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L668
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L668
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L668
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L669
.L668:
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L667
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L667
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L667
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L669
.L667:
	ldr	r3, .L1118+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L669
	ldr	r3, .L1118+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L669
	ldr	r3, .L1118+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L669
	ldr	r3, .L1118+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L669
	ldr	r3, .L1118+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L669
	ldr	r3, .L1118+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L669:
	ldr	r3, .L1118+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L670
	ldr	r3, .L1118+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L1118+96
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L671
.L670:
	ldr	r3, .L1118+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L671
	ldr	r3, .L1118+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L671
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L671
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L671
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L671
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L671
	ldr	r3, .L1118+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L671
	ldr	r3, .L1118+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L671
	ldr	r3, .L1118+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L671
	ldr	r3, .L1118+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L671:
	ldr	r3, .L1118+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L672
	ldr	r3, .L1118+96
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L673
.L672:
	ldr	r3, .L1118+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L673
	ldr	r3, .L1118+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L673
	ldr	r3, .L1118+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L673
	ldr	r3, .L1118+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L673
	ldr	r3, .L1118+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L673
	ldr	r3, .L1118+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L673
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L673
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L673
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L673
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L673:
	ldr	r3, .L1118+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L674
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L674
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L674
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L674
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L674
	ldr	r3, .L1118+88
	ldr	r2, [r3]
	ldr	r3, .L1118+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L674
	ldr	r3, .L1118+96
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L675
.L674:
	ldr	r3, .L1118+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L675
	ldr	r3, .L1118+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L675
	ldr	r3, .L1118+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L675
	ldr	r3, .L1118+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L675
	ldr	r3, .L1118+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L675
	ldr	r3, .L1118+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L675:
	ldr	r3, .L1118+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1118+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L676
	ldr	r3, .L1118+88
	ldr	r2, [r3]
	ldr	r3, .L1118+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L676
	ldr	r3, .L1118+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L1118+96
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L676
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L678
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L678
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L678
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L679
.L678:
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L676
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L676
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L676
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L679
.L676:
	ldr	r3, .L1118+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L679
	ldr	r3, .L1118+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L679
	ldr	r3, .L1118+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L679
	ldr	r3, .L1118+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L679
	ldr	r3, .L1118+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L679
	ldr	r3, .L1118+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L679:
	ldr	r3, .L1118+88
	ldr	r3, [r3]
	cmp	r3, #7
	bne	.L680
	ldr	r3, .L1118+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L680
	ldr	r3, .L1118+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L680
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L680
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L680
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L680
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L680
	ldr	r3, .L1118+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L680
	ldr	r3, .L1118+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L680
	ldr	r3, .L1118+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L680
	ldr	r3, .L1118+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L680:
	ldr	r3, .L1118+88
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L681
	ldr	r3, .L1118+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L681
	ldr	r3, .L1118+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L681
	ldr	r3, .L1118+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L681
	ldr	r3, .L1118+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L681
	ldr	r3, .L1118+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L681
	ldr	r3, .L1118+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L681
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L681
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L681
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L681
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L681:
	ldr	r3, .L1118+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1118+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L682
	ldr	r3, .L1118+88
	ldr	r2, [r3]
	ldr	r3, .L1118+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L682
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L682
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L682
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L682
	ldr	r3, .L1118+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L682
	ldr	r3, .L1118+96
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L683
.L682:
	ldr	r3, .L1118+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L683
	ldr	r3, .L1118+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L683
	ldr	r3, .L1118+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L683
	ldr	r3, .L1118+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L683
	ldr	r3, .L1118+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L683
	ldr	r3, .L1118+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L683:
	ldr	r3, .L1118+88
	ldr	r2, [r3]
	ldr	r3, .L1118+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L684
	ldr	r3, .L1118+96
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L684
	ldr	r3, .L1118+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L684
	ldr	r3, .L1118+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L684
	ldr	r3, .L1118+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L684
	ldr	r3, .L1118+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L684
	ldr	r3, .L1121
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L686
.L684:
	ldr	r3, .L1121+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L686
	ldr	r3, .L1121+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L686
	ldr	r3, .L1121+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L686
	ldr	r3, .L1121+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L686
	ldr	r3, .L1121+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L686
	ldr	r3, .L1121+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L686:
	ldr	r3, .L1121+48
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L687
	ldr	r3, .L1121+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L687
	ldr	r3, .L1121+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L687
	ldr	r3, .L1121+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L687
	ldr	r3, .L1121
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L687
	ldr	r3, .L1121+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1121+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L687
	ldr	r3, .L1121+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L1121+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L688
.L687:
	ldr	r3, .L1121+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L688
	ldr	r3, .L1121+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L688
	ldr	r3, .L1121+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L688
	ldr	r3, .L1121+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L688
	ldr	r3, .L1121+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L688
	ldr	r3, .L1121+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L688:
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L689
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L689
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L689
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L690
.L689:
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L691
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L691
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L691
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L690
.L691:
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L692
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L692
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L692
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L690
.L692:
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L693
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L693
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L693
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L690
.L693:
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L694
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L694
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L694
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L690
.L694:
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L695
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L695
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L695
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L690
.L695:
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L696
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L696
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L696
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L690
.L696:
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L697
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L697
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L697
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L690
.L697:
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L690:
	ldr	r3, .L1121+72
	ldr	r3, [r3]	@ float
	ldr	r1, .L1121+96
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L698
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L699
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L699
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L699
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L699:
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L700
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L700
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L700
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L700:
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L701
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L701
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L701
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L701:
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L698
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L698
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L698
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L698:
	ldr	r3, .L1121+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L702
	ldr	r3, .L1121+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1121+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1121+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1121+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1121+20
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1121+68
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1121+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L702:
	ldr	r3, .L1121+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L704
	ldr	r3, .L1121+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1121+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1121+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1121+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1121+20
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1121+68
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1121+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L704:
	ldr	r3, .L1121+112
	ldr	r2, [r3]
	ldr	r3, .L1121+48
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L706
	ldr	r3, .L1121+112
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L706
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L706
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L706
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L706
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L706
	ldr	r3, .L1121+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1121+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L706
	ldr	r3, .L1121+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L707
.L706:
	ldr	r3, .L1121+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L707
	ldr	r3, .L1121+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L707
	ldr	r3, .L1121+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L707
	ldr	r3, .L1121+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L707
	ldr	r3, .L1121+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L707
	ldr	r3, .L1121+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L707:
	ldr	r3, .L1121+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1121+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L708
	ldr	r3, .L1121+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L708
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L708
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L708
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L708
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L708
	ldr	r3, .L1121+48
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L710
.L708:
	ldr	r3, .L1121+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L710
	ldr	r3, .L1121+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L710
	ldr	r3, .L1121+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L710
	ldr	r3, .L1121+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L710
	ldr	r3, .L1121+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L710
	ldr	r3, .L1121+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L710:
	ldr	r3, .L1121+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1121+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L711
	ldr	r3, .L1121+112
	ldr	r2, [r3]
	ldr	r3, .L1121+48
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L711
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L712
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L712
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L712
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L713
.L712:
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L711
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L711
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L711
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L711
.L713:
	ldr	r3, .L1121+68
	ldr	r3, [r3]	@ float
	ldr	r2, .L1121+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L714
.L711:
	ldr	r3, .L1121+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L714
	ldr	r3, .L1121+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L714
	ldr	r3, .L1121+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L714
	ldr	r3, .L1121+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L714
	ldr	r3, .L1121+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L714
	ldr	r3, .L1121+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L714:
	ldr	r3, .L1121+112
	ldr	r3, [r3]
	cmp	r3, #6
	bne	.L715
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L715
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L715
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L715
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L715
	ldr	r3, .L1121+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L715
	ldr	r3, .L1121+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L715
	ldr	r3, .L1121+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L715
	ldr	r3, .L1121+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L715
	ldr	r3, .L1121+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L715
	ldr	r3, .L1121+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L715:
	ldr	r3, .L1121+112
	ldr	r3, [r3]
	cmp	r3, #6
	bne	.L716
	ldr	r3, .L1121+68
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1121+96
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L717
	mov	r3, #0
	mov	r4, r3
.L717:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L718
.L716:
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L718
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L718
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L718
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L718
	ldr	r3, .L1121+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L718
	ldr	r3, .L1121+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L718
	ldr	r3, .L1121+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L718
	ldr	r3, .L1121+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L718
	ldr	r3, .L1121+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L718
	ldr	r3, .L1121+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L718:
	ldr	r3, .L1121+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1121+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L719
	ldr	r3, .L1121+112
	ldr	r2, [r3]
	ldr	r3, .L1121+48
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L719
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L720
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L720
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L720
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L721
.L720:
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L719
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L719
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L719
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L721
.L719:
	ldr	r3, .L1121+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L721
	ldr	r3, .L1121+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L721
	ldr	r3, .L1121+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L721
	ldr	r3, .L1121+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L721
	ldr	r3, .L1121+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L721
	ldr	r3, .L1121+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L721:
	ldr	r3, .L1121+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L722
	ldr	r3, .L1121+68
	ldr	r3, [r3]	@ float
	ldr	r2, .L1121+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L723
.L722:
	ldr	r3, .L1121+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L723
	ldr	r3, .L1121+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L723
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L723
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L723
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L723
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L723
	ldr	r3, .L1121+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L723
	ldr	r3, .L1121+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L723
	ldr	r3, .L1121+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	b	.L1122
.L1123:
	.align	2
.L1121:
	.word	_x_p6_l1
	.word	p6_l3
	.word	p6_l2
	.word	p6_l0
	.word	p6_l1
	.word	delta
	.word	p6_evt
	.word	_x_p6_l3
	.word	_x_p6_l2
	.word	_x_p6_l0
	.word	p6_c
	.word	_x_p6_c
	.word	_x_v1
	.word	_x_p5_l3
	.word	_x_p5_l2
	.word	_x_p5_l0
	.word	_x_p5_l1
	.word	p5_c
	.word	_x_p5_c
	.word	p5_l3
	.word	p5_l2
	.word	p5_l0
	.word	p5_l1
	.word	p5_evt
	.word	1098907648
	.word	p4_evt
	.word	p4_c
	.word	_x_v1
	.word	v1
	.word	_x_p4_l3
	.word	_x_p4_l2
	.word	_x_p4_l0
	.word	_x_p4_l1
	.word	v2
	.word	_x_v2
	.word	_x_p4_c
	.word	p4_l3
	.word	p4_l2
	.word	p4_l0
	.word	p4_l1
	.word	delta
.L1122:
	cmp	r3, #0
	beq	.L723
	ldr	r3, .L1121+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L723:
	ldr	r3, .L1121+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L724
	ldr	r3, .L1121+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L725
.L724:
	ldr	r3, .L1121+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L725
	ldr	r3, .L1121+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L725
	ldr	r3, .L1121+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L725
	ldr	r3, .L1121+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L725
	ldr	r3, .L1121+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L725
	ldr	r3, .L1121+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L725
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L725
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L725
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L725
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L725:
	ldr	r3, .L1121+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L726
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L726
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L726
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L726
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L726
	ldr	r3, .L1121+112
	ldr	r2, [r3]
	ldr	r3, .L1121+48
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L726
	ldr	r3, .L1121+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L727
.L726:
	ldr	r3, .L1121+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L727
	ldr	r3, .L1121+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L727
	ldr	r3, .L1121+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L727
	ldr	r3, .L1121+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L727
	ldr	r3, .L1121+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L727
	ldr	r3, .L1121+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L727:
	ldr	r3, .L1121+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1121+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L728
	ldr	r3, .L1121+112
	ldr	r2, [r3]
	ldr	r3, .L1121+48
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L728
	ldr	r3, .L1121+68
	ldr	r3, [r3]	@ float
	ldr	r2, .L1121+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L728
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L730
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L730
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L730
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L731
.L730:
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L728
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L728
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L728
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L731
.L728:
	ldr	r3, .L1121+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L731
	ldr	r3, .L1121+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L731
	ldr	r3, .L1121+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L731
	ldr	r3, .L1121+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L731
	ldr	r3, .L1121+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L731
	ldr	r3, .L1121+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L731:
	ldr	r3, .L1121+112
	ldr	r3, [r3]
	cmp	r3, #6
	bne	.L732
	ldr	r3, .L1121+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L732
	ldr	r3, .L1121+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L732
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L732
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L732
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L732
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L732
	ldr	r3, .L1121+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L732
	ldr	r3, .L1121+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L732
	ldr	r3, .L1121+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L732
	ldr	r3, .L1121+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L732:
	ldr	r3, .L1121+112
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L733
	ldr	r3, .L1121+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L733
	ldr	r3, .L1121+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L733
	ldr	r3, .L1121+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L733
	ldr	r3, .L1121+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L733
	ldr	r3, .L1121+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L733
	ldr	r3, .L1121+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L733
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L733
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L733
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L733
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L733:
	ldr	r3, .L1121+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1121+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L734
	ldr	r3, .L1121+112
	ldr	r2, [r3]
	ldr	r3, .L1121+48
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L734
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L734
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L734
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L734
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L734
	ldr	r3, .L1121+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L735
.L734:
	ldr	r3, .L1121+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L735
	ldr	r3, .L1121+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L735
	ldr	r3, .L1121+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L735
	ldr	r3, .L1121+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L735
	ldr	r3, .L1121+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L735
	ldr	r3, .L1121+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L735:
	ldr	r3, .L1121+112
	ldr	r2, [r3]
	ldr	r3, .L1121+48
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L736
	ldr	r3, .L1121+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L736
	ldr	r3, .L1121+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L736
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L736
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L736
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L736
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L738
.L736:
	ldr	r3, .L1121+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L738
	ldr	r3, .L1121+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L738
	ldr	r3, .L1121+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L738
	ldr	r3, .L1121+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L738
	ldr	r3, .L1121+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L738
	ldr	r3, .L1121+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L738:
	ldr	r3, .L1121+48
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L739
	ldr	r3, .L1121+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L739
	ldr	r3, .L1121+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L739
	ldr	r3, .L1121+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L739
	ldr	r3, .L1121+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L739
	ldr	r3, .L1121+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1121+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L739
	ldr	r3, .L1121+68
	ldr	r3, [r3]	@ float
	ldr	r2, .L1121+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L740
.L739:
	ldr	r3, .L1121+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L740
	ldr	r3, .L1121+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L740
	ldr	r3, .L1121+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L740
	ldr	r3, .L1121+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L740
	ldr	r3, .L1121+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L740
	ldr	r3, .L1121+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L740:
	ldr	r3, .L1121+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L741
	ldr	r3, .L1121+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L741
	ldr	r3, .L1121+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L741
	ldr	r3, .L1121+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L742
.L741:
	ldr	r3, .L1121+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L743
	ldr	r3, .L1121+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L743
	ldr	r3, .L1121+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L743
	ldr	r3, .L1121+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L742
.L743:
	ldr	r3, .L1121+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L744
	ldr	r3, .L1121+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L744
	ldr	r3, .L1121+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L744
	ldr	r3, .L1121+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L742
.L744:
	ldr	r3, .L1121+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L745
	ldr	r3, .L1121+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L745
	ldr	r3, .L1121+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L745
	ldr	r3, .L1121+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L742
.L745:
	ldr	r3, .L1121+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L746
	ldr	r3, .L1121+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L746
	ldr	r3, .L1121+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L746
	ldr	r3, .L1121+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L742
.L746:
	ldr	r3, .L1121+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L747
	ldr	r3, .L1121+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L747
	ldr	r3, .L1121+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L747
	ldr	r3, .L1121+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L742
.L747:
	ldr	r3, .L1121+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L748
	ldr	r3, .L1121+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L748
	ldr	r3, .L1121+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L748
	ldr	r3, .L1121+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L742
.L748:
	ldr	r3, .L1121+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L749
	ldr	r3, .L1121+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L749
	ldr	r3, .L1121+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L749
	ldr	r3, .L1121+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L742
.L749:
	ldr	r3, .L1121+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1121+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1121+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1121+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L742:
	ldr	r3, .L1121+140
	ldr	r3, [r3]	@ float
	ldr	r1, .L1121+96
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L750
	ldr	r3, .L1121+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L751
	ldr	r3, .L1121+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L751
	ldr	r3, .L1121+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L751
	ldr	r3, .L1121+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L751:
	ldr	r3, .L1121+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L752
	ldr	r3, .L1121+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L752
	ldr	r3, .L1121+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L752
	ldr	r3, .L1121+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L752:
	ldr	r3, .L1121+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L753
	ldr	r3, .L1121+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L753
	ldr	r3, .L1121+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L753
	ldr	r3, .L1121+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L753:
	ldr	r3, .L1121+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L750
	ldr	r3, .L1121+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L750
	ldr	r3, .L1121+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L750
	ldr	r3, .L1121+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L750:
	ldr	r3, .L1121+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L754
	ldr	r3, .L1121+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1121+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1121+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1121+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1121+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1121+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1121+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1121+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1121+160
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1121+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1121+140
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L754:
	ldr	r3, .L1121+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L756
	ldr	r3, .L1121+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1121+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1121+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1121+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1121+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1121+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1121+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1121+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1121+160
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1121+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1121+140
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L756:
	ldr	r3, .L1121+112
	ldr	r2, [r3]
	ldr	r3, .L1121+108
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L758
	ldr	r3, .L1121+112
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L758
	ldr	r3, .L1121+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L758
	ldr	r3, .L1121+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L758
	ldr	r3, .L1121+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L758
	ldr	r3, .L1121+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L758
	ldr	r3, .L1121+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1121+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L758
	ldr	r3, .L1121+140
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L759
.L758:
	ldr	r3, .L1121+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L759
	ldr	r3, .L1121+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L759
	ldr	r3, .L1121+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L759
	ldr	r3, .L1121+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L759
	ldr	r3, .L1121+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L759
	ldr	r3, .L1124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L759:
	ldr	r3, .L1124+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1124+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L760
	ldr	r3, .L1124+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L760
	ldr	r3, .L1124+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L760
	ldr	r3, .L1124+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L760
	ldr	r3, .L1124+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L760
	ldr	r3, .L1124+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L760
	ldr	r3, .L1124+88
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L762
.L760:
	ldr	r3, .L1124+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L762
	ldr	r3, .L1124+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L762
	ldr	r3, .L1124+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L762
	ldr	r3, .L1124+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L762
	ldr	r3, .L1124+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L762
	ldr	r3, .L1124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L762:
	ldr	r3, .L1124+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1124+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L763
	ldr	r3, .L1124+84
	ldr	r2, [r3]
	ldr	r3, .L1124+88
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L763
	ldr	r3, .L1124+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L764
	ldr	r3, .L1124+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L764
	ldr	r3, .L1124+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L764
	ldr	r3, .L1124+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L765
.L764:
	ldr	r3, .L1124+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L763
	ldr	r3, .L1124+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L763
	ldr	r3, .L1124+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L763
	ldr	r3, .L1124+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L763
.L765:
	ldr	r3, .L1124+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L1124+12
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L766
.L763:
	ldr	r3, .L1124+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L766
	ldr	r3, .L1124+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L766
	ldr	r3, .L1124+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L766
	ldr	r3, .L1124+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L766
	ldr	r3, .L1124+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L766
	ldr	r3, .L1124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L766:
	ldr	r3, .L1124+84
	ldr	r3, [r3]
	cmp	r3, #5
	bne	.L767
	ldr	r3, .L1124+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L767
	ldr	r3, .L1124+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L767
	ldr	r3, .L1124+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L767
	ldr	r3, .L1124+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L767
	ldr	r3, .L1124+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L767
	ldr	r3, .L1124+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L767
	ldr	r3, .L1124+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L767
	ldr	r3, .L1124+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L767
	ldr	r3, .L1124+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L767
	ldr	r3, .L1124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L767:
	ldr	r3, .L1124+84
	ldr	r3, [r3]
	cmp	r3, #5
	bne	.L768
	ldr	r3, .L1124+48
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1124+52
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L769
	mov	r3, #0
	mov	r4, r3
.L769:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L770
.L768:
	ldr	r3, .L1124+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L770
	ldr	r3, .L1124+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L770
	ldr	r3, .L1124+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L770
	ldr	r3, .L1124+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L770
	ldr	r3, .L1124+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L770
	ldr	r3, .L1124+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L770
	ldr	r3, .L1124+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L770
	ldr	r3, .L1124+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L770
	ldr	r3, .L1124+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L770
	ldr	r3, .L1124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L770:
	ldr	r3, .L1124+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1124+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L771
	ldr	r3, .L1124+84
	ldr	r2, [r3]
	ldr	r3, .L1124+88
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L771
	ldr	r3, .L1124+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L772
	ldr	r3, .L1124+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L772
	ldr	r3, .L1124+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L772
	ldr	r3, .L1124+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L773
.L772:
	ldr	r3, .L1124+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L771
	ldr	r3, .L1124+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L771
	ldr	r3, .L1124+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L771
	ldr	r3, .L1124+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L773
.L771:
	ldr	r3, .L1124+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L773
	ldr	r3, .L1124+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L773
	ldr	r3, .L1124+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L773
	ldr	r3, .L1124+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L773
	ldr	r3, .L1124+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L773
	ldr	r3, .L1124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L773:
	ldr	r3, .L1124+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L774
	ldr	r3, .L1124+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L1124+12
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L775
.L774:
	ldr	r3, .L1124+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L775
	ldr	r3, .L1124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L775
	ldr	r3, .L1124+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L775
	ldr	r3, .L1124+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L775
	ldr	r3, .L1124+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L775
	ldr	r3, .L1124+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L775
	ldr	r3, .L1124+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L775
	ldr	r3, .L1124+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L775
	ldr	r3, .L1124+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L775
	ldr	r3, .L1124+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L775:
	ldr	r3, .L1124+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L776
	ldr	r3, .L1124+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L777
.L776:
	ldr	r3, .L1124+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L777
	ldr	r3, .L1124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L777
	ldr	r3, .L1124+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L777
	ldr	r3, .L1124+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L777
	ldr	r3, .L1124+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L777
	ldr	r3, .L1124+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L777
	ldr	r3, .L1124+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L777
	ldr	r3, .L1124+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L777
	ldr	r3, .L1124+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L777
	ldr	r3, .L1124+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L777:
	ldr	r3, .L1124+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L778
	ldr	r3, .L1124+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L778
	ldr	r3, .L1124+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L778
	ldr	r3, .L1124+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L778
	ldr	r3, .L1124+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L778
	ldr	r3, .L1124+84
	ldr	r2, [r3]
	ldr	r3, .L1124+88
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L778
	ldr	r3, .L1124+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L779
.L778:
	ldr	r3, .L1124+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L779
	ldr	r3, .L1124+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L779
	ldr	r3, .L1124+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L779
	ldr	r3, .L1124+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L779
	ldr	r3, .L1124+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L779
	ldr	r3, .L1124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L779:
	ldr	r3, .L1124+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1124+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L780
	ldr	r3, .L1124+84
	ldr	r2, [r3]
	ldr	r3, .L1124+88
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L780
	ldr	r3, .L1124+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L1124+12
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L780
	ldr	r3, .L1124+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L782
	ldr	r3, .L1124+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L782
	ldr	r3, .L1124+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L782
	ldr	r3, .L1124+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L783
.L782:
	ldr	r3, .L1124+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L780
	ldr	r3, .L1124+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L780
	ldr	r3, .L1124+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L780
	ldr	r3, .L1124+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L783
.L780:
	ldr	r3, .L1124+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L783
	ldr	r3, .L1124+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L783
	ldr	r3, .L1124+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L783
	ldr	r3, .L1124+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L783
	ldr	r3, .L1124+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L783
	ldr	r3, .L1124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L783:
	ldr	r3, .L1124+84
	ldr	r3, [r3]
	cmp	r3, #5
	bne	.L784
	ldr	r3, .L1124+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L784
	ldr	r3, .L1124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L784
	ldr	r3, .L1124+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L784
	ldr	r3, .L1124+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L784
	ldr	r3, .L1124+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L784
	ldr	r3, .L1124+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L784
	ldr	r3, .L1124+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L784
	ldr	r3, .L1124+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L784
	ldr	r3, .L1124+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L784
	ldr	r3, .L1124+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L784:
	ldr	r3, .L1124+84
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L785
	ldr	r3, .L1124+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L785
	ldr	r3, .L1124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L785
	ldr	r3, .L1124+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L785
	ldr	r3, .L1124+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L785
	ldr	r3, .L1124+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L785
	ldr	r3, .L1124+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L785
	ldr	r3, .L1124+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L785
	ldr	r3, .L1124+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L785
	ldr	r3, .L1124+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L785
	ldr	r3, .L1124+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L785:
	ldr	r3, .L1124+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1124+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L786
	ldr	r3, .L1124+84
	ldr	r2, [r3]
	ldr	r3, .L1124+88
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L786
	ldr	r3, .L1124+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L786
	ldr	r3, .L1124+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L786
	ldr	r3, .L1124+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L786
	ldr	r3, .L1124+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L786
	ldr	r3, .L1124+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L787
.L786:
	ldr	r3, .L1124+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L787
	ldr	r3, .L1124+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L787
	ldr	r3, .L1124+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L787
	ldr	r3, .L1124+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L787
	ldr	r3, .L1124+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L787
	ldr	r3, .L1124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L787:
	ldr	r3, .L1124+84
	ldr	r2, [r3]
	ldr	r3, .L1124+88
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L788
	ldr	r3, .L1124+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L788
	ldr	r3, .L1124+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L788
	ldr	r3, .L1124+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L788
	ldr	r3, .L1124+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L788
	ldr	r3, .L1124+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L788
	ldr	r3, .L1124+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L790
.L788:
	ldr	r3, .L1124+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L790
	ldr	r3, .L1124+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L790
	ldr	r3, .L1124+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L790
	ldr	r3, .L1124+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L790
	ldr	r3, .L1124+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L790
	ldr	r3, .L1124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L790:
	ldr	r3, .L1124+88
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L791
	ldr	r3, .L1124+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L791
	ldr	r3, .L1124+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L791
	ldr	r3, .L1124+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L791
	ldr	r3, .L1124+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L791
	ldr	r3, .L1124+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1124+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L791
	ldr	r3, .L1124+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L1124+12
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L792
.L791:
	ldr	r3, .L1124+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L792
	ldr	r3, .L1124+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L792
	ldr	r3, .L1124+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L792
	ldr	r3, .L1124+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L792
	ldr	r3, .L1124+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L792
	ldr	r3, .L1124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L792:
	ldr	r3, .L1124+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L793
	ldr	r3, .L1124+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L793
	ldr	r3, .L1124+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L793
	ldr	r3, .L1124+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L794
.L793:
	ldr	r3, .L1124+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L795
	ldr	r3, .L1124+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L795
	ldr	r3, .L1124+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L795
	ldr	r3, .L1124+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L794
.L795:
	ldr	r3, .L1124+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L796
	ldr	r3, .L1124+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L796
	ldr	r3, .L1124+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L796
	ldr	r3, .L1124+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L794
.L796:
	ldr	r3, .L1124+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L797
	ldr	r3, .L1124+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L797
	ldr	r3, .L1124+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L797
	ldr	r3, .L1124+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L794
.L797:
	ldr	r3, .L1124+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L798
	ldr	r3, .L1124+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L798
	ldr	r3, .L1124+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L798
	ldr	r3, .L1124+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L794
.L798:
	ldr	r3, .L1124+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L799
	ldr	r3, .L1124+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	b	.L1125
.L1126:
	.align	2
.L1124:
	.word	p4_evt
	.word	v2
	.word	_x_v2
	.word	_x_p4_c
	.word	_x_p4_l3
	.word	_x_p4_l2
	.word	_x_p4_l1
	.word	_x_p4_l0
	.word	p4_l3
	.word	p4_l2
	.word	p4_l0
	.word	p4_l1
	.word	p4_c
	.word	1098907648
	.word	p3_l2
	.word	p3_l0
	.word	p3_l1
	.word	delta
	.word	p3_evt
	.word	v2
	.word	_x_v2
	.word	v1
	.word	_x_v1
	.word	p3_c
	.word	_x_p3_c
	.word	_x_p3_l3
	.word	_x_p3_l2
	.word	_x_p3_l1
	.word	_x_p3_l0
	.word	p3_l3
.L1125:
	cmp	r3, #0
	bne	.L799
	ldr	r3, .L1124+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L799
	ldr	r3, .L1124+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L794
.L799:
	ldr	r3, .L1124+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L800
	ldr	r3, .L1124+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L800
	ldr	r3, .L1124+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L800
	ldr	r3, .L1124+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L794
.L800:
	ldr	r3, .L1124+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L801
	ldr	r3, .L1124+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L801
	ldr	r3, .L1124+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L801
	ldr	r3, .L1124+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L794
.L801:
	ldr	r3, .L1124+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1124+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1124+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1124+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L794:
	ldr	r3, .L1124+96
	ldr	r3, [r3]	@ float
	ldr	r1, .L1124+52
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L802
	ldr	r3, .L1124+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L803
	ldr	r3, .L1124+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L803
	ldr	r3, .L1124+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L803
	ldr	r3, .L1124+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L803:
	ldr	r3, .L1124+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L804
	ldr	r3, .L1124+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L804
	ldr	r3, .L1124+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L804
	ldr	r3, .L1124+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L804:
	ldr	r3, .L1124+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L805
	ldr	r3, .L1124+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L805
	ldr	r3, .L1124+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L805
	ldr	r3, .L1124+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L805:
	ldr	r3, .L1124+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L802
	ldr	r3, .L1124+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L802
	ldr	r3, .L1124+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L802
	ldr	r3, .L1124+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L802:
	ldr	r3, .L1124+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L806
	ldr	r3, .L1124+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1124+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1124+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1124+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1124+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1124+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1124+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1124+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1124+68
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1124+92
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1124+96
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L806:
	ldr	r3, .L1124+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L808
	ldr	r3, .L1124+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1124+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1124+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1124+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1124+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1124+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1124+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1124+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1124+68
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1124+92
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1124+96
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L808:
	ldr	r3, .L1124+84
	ldr	r2, [r3]
	ldr	r3, .L1124+88
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L810
	ldr	r3, .L1124+84
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L810
	ldr	r3, .L1124+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L810
	ldr	r3, .L1124+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L810
	ldr	r3, .L1124+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L810
	ldr	r3, .L1124+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L810
	ldr	r3, .L1124+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1124+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L810
	ldr	r3, .L1124+96
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L811
.L810:
	ldr	r3, .L1124+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L811
	ldr	r3, .L1124+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L811
	ldr	r3, .L1124+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L811
	ldr	r3, .L1124+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L811
	ldr	r3, .L1124+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L811
	ldr	r3, .L1124+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L811:
	ldr	r3, .L1124+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1124+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L812
	ldr	r3, .L1124+96
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L812
	ldr	r3, .L1124+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L812
	ldr	r3, .L1124+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L812
	ldr	r3, .L1124+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L812
	ldr	r3, .L1124+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L812
	ldr	r3, .L1124+88
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L814
.L812:
	ldr	r3, .L1124+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L814
	ldr	r3, .L1124+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L814
	ldr	r3, .L1124+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L814
	ldr	r3, .L1124+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L814
	ldr	r3, .L1124+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L814
	ldr	r3, .L1124+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L814:
	ldr	r3, .L1124+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1124+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L815
	ldr	r3, .L1124+84
	ldr	r2, [r3]
	ldr	r3, .L1124+88
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L815
	ldr	r3, .L1124+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L816
	ldr	r3, .L1124+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L816
	ldr	r3, .L1124+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L816
	ldr	r3, .L1124+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L817
.L816:
	ldr	r3, .L1124+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L815
	ldr	r3, .L1124+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L815
	ldr	r3, .L1124+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L815
	ldr	r3, .L1124+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L815
.L817:
	ldr	r3, .L1124+92
	ldr	r3, [r3]	@ float
	ldr	r2, .L1124+96
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L818
.L815:
	ldr	r3, .L1124+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L818
	ldr	r3, .L1124+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L818
	ldr	r3, .L1124+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L818
	ldr	r3, .L1124+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L818
	ldr	r3, .L1124+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L818
	ldr	r3, .L1124+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L818:
	ldr	r3, .L1124+84
	ldr	r3, [r3]
	cmp	r3, #4
	bne	.L819
	ldr	r3, .L1124+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L819
	ldr	r3, .L1124+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L819
	ldr	r3, .L1124+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L819
	ldr	r3, .L1124+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L819
	ldr	r3, .L1124+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L819
	ldr	r3, .L1124+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L819
	ldr	r3, .L1124+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L819
	ldr	r3, .L1124+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L819
	ldr	r3, .L1124+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L819
	ldr	r3, .L1124+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L819:
	ldr	r3, .L1124+84
	ldr	r3, [r3]
	cmp	r3, #4
	bne	.L820
	ldr	r3, .L1124+92
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1124+52
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L821
	mov	r3, #0
	mov	r4, r3
.L821:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L822
.L820:
	ldr	r3, .L1124+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L822
	ldr	r3, .L1124+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L822
	ldr	r3, .L1124+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L822
	ldr	r3, .L1124+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L822
	ldr	r3, .L1124+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L822
	ldr	r3, .L1124+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L822
	ldr	r3, .L1124+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L822
	ldr	r3, .L1124+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L822
	ldr	r3, .L1124+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L822
	ldr	r3, .L1124+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L822:
	ldr	r3, .L1124+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1124+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L823
	ldr	r3, .L1124+84
	ldr	r2, [r3]
	ldr	r3, .L1124+88
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L823
	ldr	r3, .L1124+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L824
	ldr	r3, .L1124+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L824
	ldr	r3, .L1124+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L824
	ldr	r3, .L1124+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L825
.L824:
	ldr	r3, .L1124+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L823
	ldr	r3, .L1124+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L823
	ldr	r3, .L1124+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L823
	ldr	r3, .L1124+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L825
.L823:
	ldr	r3, .L1124+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L825
	ldr	r3, .L1124+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L825
	ldr	r3, .L1124+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L825
	ldr	r3, .L1124+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L825
	ldr	r3, .L1124+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L825
	ldr	r3, .L1124+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L825:
	ldr	r3, .L1124+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L826
	ldr	r3, .L1124+92
	ldr	r3, [r3]	@ float
	ldr	r2, .L1124+96
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L827
.L826:
	ldr	r3, .L1124+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L827
	ldr	r3, .L1124+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L827
	ldr	r3, .L1124+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L827
	ldr	r3, .L1124+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L827
	ldr	r3, .L1124+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L827
	ldr	r3, .L1124+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L827
	ldr	r3, .L1124+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L827
	ldr	r3, .L1124+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L827
	ldr	r3, .L1124+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L827
	ldr	r3, .L1124+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L827:
	ldr	r3, .L1124+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L828
	ldr	r3, .L1124+96
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L829
.L828:
	ldr	r3, .L1124+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L829
	ldr	r3, .L1124+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L829
	ldr	r3, .L1124+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L829
	ldr	r3, .L1124+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L829
	ldr	r3, .L1124+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L829
	ldr	r3, .L1124+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L829
	ldr	r3, .L1124+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L829
	ldr	r3, .L1124+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L829
	ldr	r3, .L1124+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L829
	ldr	r3, .L1124+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L829:
	ldr	r3, .L1124+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L830
	ldr	r3, .L1124+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L830
	ldr	r3, .L1124+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L830
	ldr	r3, .L1124+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L830
	ldr	r3, .L1124+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L830
	ldr	r3, .L1124+84
	ldr	r2, [r3]
	ldr	r3, .L1124+88
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L830
	ldr	r3, .L1124+96
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L831
.L830:
	ldr	r3, .L1124+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L831
	ldr	r3, .L1124+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L831
	ldr	r3, .L1124+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L831
	ldr	r3, .L1124+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L831
	ldr	r3, .L1124+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L831
	ldr	r3, .L1124+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L831:
	ldr	r3, .L1124+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1124+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L832
	ldr	r3, .L1124+84
	ldr	r2, [r3]
	ldr	r3, .L1124+88
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L832
	ldr	r3, .L1124+92
	ldr	r3, [r3]	@ float
	ldr	r2, .L1124+96
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L832
	ldr	r3, .L1124+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L834
	ldr	r3, .L1124+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L834
	ldr	r3, .L1124+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L834
	ldr	r3, .L1124+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L835
.L834:
	ldr	r3, .L1124+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L832
	ldr	r3, .L1124+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L832
	ldr	r3, .L1124+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L832
	ldr	r3, .L1124+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L835
.L832:
	ldr	r3, .L1124+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L835
	ldr	r3, .L1127
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L835
	ldr	r3, .L1127+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L835
	ldr	r3, .L1127+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L835
	ldr	r3, .L1127+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L835
	ldr	r3, .L1127+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L835:
	ldr	r3, .L1127+20
	ldr	r3, [r3]
	cmp	r3, #4
	bne	.L836
	ldr	r3, .L1127+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L836
	ldr	r3, .L1127+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L836
	ldr	r3, .L1127+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L836
	ldr	r3, .L1127+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L836
	ldr	r3, .L1127+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L836
	ldr	r3, .L1127+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L836
	ldr	r3, .L1127+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L836
	ldr	r3, .L1127
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L836
	ldr	r3, .L1127+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L836
	ldr	r3, .L1127+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L836:
	ldr	r3, .L1127+20
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L837
	ldr	r3, .L1127+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L837
	ldr	r3, .L1127+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L837
	ldr	r3, .L1127+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L837
	ldr	r3, .L1127
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L837
	ldr	r3, .L1127+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L837
	ldr	r3, .L1127+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L837
	ldr	r3, .L1127+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L837
	ldr	r3, .L1127+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L837
	ldr	r3, .L1127+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L837
	ldr	r3, .L1127+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L837:
	ldr	r3, .L1127+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1127+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L838
	ldr	r3, .L1127+20
	ldr	r2, [r3]
	ldr	r3, .L1127+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L838
	ldr	r3, .L1127+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L838
	ldr	r3, .L1127+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L838
	ldr	r3, .L1127+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L838
	ldr	r3, .L1127+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L838
	ldr	r3, .L1127+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L839
.L838:
	ldr	r3, .L1127+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L839
	ldr	r3, .L1127
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L839
	ldr	r3, .L1127+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L839
	ldr	r3, .L1127+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L839
	ldr	r3, .L1127+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L839
	ldr	r3, .L1127+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L839:
	ldr	r3, .L1127+20
	ldr	r2, [r3]
	ldr	r3, .L1127+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L840
	ldr	r3, .L1127+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L840
	ldr	r3, .L1127+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L840
	ldr	r3, .L1127+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L840
	ldr	r3, .L1127+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L840
	ldr	r3, .L1127+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L840
	ldr	r3, .L1127+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L842
.L840:
	ldr	r3, .L1127+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L842
	ldr	r3, .L1127
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L842
	ldr	r3, .L1127+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L842
	ldr	r3, .L1127+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L842
	ldr	r3, .L1127+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L842
	ldr	r3, .L1127+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L842:
	ldr	r3, .L1127+56
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L843
	ldr	r3, .L1127+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L843
	ldr	r3, .L1127+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L843
	ldr	r3, .L1127+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L843
	ldr	r3, .L1127+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L843
	ldr	r3, .L1127+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1127+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L843
	ldr	r3, .L1127+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L1127+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L844
.L843:
	ldr	r3, .L1127+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L844
	ldr	r3, .L1127
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L844
	ldr	r3, .L1127+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L844
	ldr	r3, .L1127+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L844
	ldr	r3, .L1127+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L844
	ldr	r3, .L1127+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L844:
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L845
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L845
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L845
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L846
.L845:
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L847
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L847
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L847
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L846
.L847:
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L848
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L848
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L848
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L846
.L848:
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L849
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L849
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L849
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L846
.L849:
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L850
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L850
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L850
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L846
.L850:
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L851
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L851
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L851
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L846
.L851:
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L852
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L852
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L852
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L846
.L852:
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L853
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L853
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L853
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L846
.L853:
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L846:
	ldr	r3, .L1127+88
	ldr	r3, [r3]	@ float
	ldr	r1, .L1127+116
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L854
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L855
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L855
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L855
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L855:
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L856
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L856
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L856
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L856:
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L857
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L857
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L857
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L857:
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L854
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L854
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L854
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L854:
	ldr	r3, .L1127+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L858
	ldr	r3, .L1127+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1127+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1127+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1127+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1127+12
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1127+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1127+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L858:
	ldr	r3, .L1127+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L860
	ldr	r3, .L1127+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1127+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1127+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1127+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1127+12
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1127+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1127+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L860:
	ldr	r3, .L1127+20
	ldr	r2, [r3]
	ldr	r3, .L1127+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L862
	ldr	r3, .L1127+20
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L862
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L862
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L862
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L862
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L862
	ldr	r3, .L1127+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1127+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L862
	ldr	r3, .L1127+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L863
.L862:
	ldr	r3, .L1127+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L863
	ldr	r3, .L1127+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L863
	ldr	r3, .L1127+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L863
	ldr	r3, .L1127+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L863
	ldr	r3, .L1127+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L863
	ldr	r3, .L1127+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L863:
	ldr	r3, .L1127+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1127+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L864
	ldr	r3, .L1127+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L864
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L864
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L864
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L864
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L864
	ldr	r3, .L1127+56
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L866
.L864:
	ldr	r3, .L1127+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L866
	ldr	r3, .L1127+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L866
	ldr	r3, .L1127+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L866
	ldr	r3, .L1127+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L866
	ldr	r3, .L1127+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L866
	ldr	r3, .L1127+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L866:
	ldr	r3, .L1127+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1127+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L867
	ldr	r3, .L1127+20
	ldr	r2, [r3]
	ldr	r3, .L1127+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L867
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L868
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L868
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L868
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L869
.L868:
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L867
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L867
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L867
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L867
.L869:
	ldr	r3, .L1127+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1127+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L870
.L867:
	ldr	r3, .L1127+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L870
	ldr	r3, .L1127+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L870
	ldr	r3, .L1127+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L870
	ldr	r3, .L1127+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L870
	ldr	r3, .L1127+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L870
	ldr	r3, .L1127+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L870:
	ldr	r3, .L1127+20
	ldr	r3, [r3]
	cmp	r3, #3
	bne	.L871
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L871
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L871
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L871
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L871
	ldr	r3, .L1127+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	b	.L1128
.L1129:
	.align	2
.L1127:
	.word	p3_l2
	.word	p3_l0
	.word	p3_l1
	.word	delta
	.word	p3_evt
	.word	v1
	.word	_x_p3_l3
	.word	_x_p3_l2
	.word	_x_p3_l0
	.word	_x_p3_l1
	.word	p3_l3
	.word	_x_p3_c
	.word	p3_c
	.word	v1
	.word	_x_v1
	.word	_x_p2_l3
	.word	_x_p2_l2
	.word	_x_p2_l0
	.word	_x_p2_l1
	.word	v2
	.word	_x_v2
	.word	p2_c
	.word	_x_p2_c
	.word	p2_l3
	.word	p2_l2
	.word	p2_l0
	.word	p2_l1
	.word	p2_evt
	.word	_x_p1_c
	.word	1098907648
	.word	_x_p1_l3
	.word	delta
	.word	p1_l0
	.word	_x_p1_l0
	.word	p1_l1
	.word	_x_p1_l1
	.word	p1_l2
	.word	_x_p1_l2
	.word	p1_l3
.L1128:
	bne	.L871
	ldr	r3, .L1127+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L871
	ldr	r3, .L1127+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L871
	ldr	r3, .L1127+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L871
	ldr	r3, .L1127+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L871
	ldr	r3, .L1127+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L871:
	ldr	r3, .L1127+52
	ldr	r3, [r3]
	cmp	r3, #3
	bne	.L872
	ldr	r3, .L1127+84
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1127+116
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L873
	mov	r3, #0
	mov	r4, r3
.L873:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L874
.L872:
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L874
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L874
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L874
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L874
	ldr	r3, .L1127+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L874
	ldr	r3, .L1127+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L874
	ldr	r3, .L1127+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L874
	ldr	r3, .L1127+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L874
	ldr	r3, .L1127+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L874
	ldr	r3, .L1127+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L874:
	ldr	r3, .L1127+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1127+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L875
	ldr	r3, .L1127+52
	ldr	r2, [r3]
	ldr	r3, .L1127+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L875
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L876
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L876
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L876
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L877
.L876:
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L875
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L875
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L875
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L877
.L875:
	ldr	r3, .L1127+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L877
	ldr	r3, .L1127+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L877
	ldr	r3, .L1127+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L877
	ldr	r3, .L1127+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L877
	ldr	r3, .L1127+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L877
	ldr	r3, .L1127+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L877:
	ldr	r3, .L1127+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L878
	ldr	r3, .L1127+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1127+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L879
.L878:
	ldr	r3, .L1127+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L879
	ldr	r3, .L1127+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L879
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L879
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L879
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L879
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L879
	ldr	r3, .L1127+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L879
	ldr	r3, .L1127+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L879
	ldr	r3, .L1127+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L879
	ldr	r3, .L1127+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L879:
	ldr	r3, .L1127+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L880
	ldr	r3, .L1127+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L881
.L880:
	ldr	r3, .L1127+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L881
	ldr	r3, .L1127+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L881
	ldr	r3, .L1127+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L881
	ldr	r3, .L1127+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L881
	ldr	r3, .L1127+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L881
	ldr	r3, .L1127+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L881
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L881
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L881
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L881
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L881:
	ldr	r3, .L1127+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L882
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L882
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L882
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L882
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L882
	ldr	r3, .L1127+52
	ldr	r2, [r3]
	ldr	r3, .L1127+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L882
	ldr	r3, .L1127+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L883
.L882:
	ldr	r3, .L1127+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L883
	ldr	r3, .L1127+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L883
	ldr	r3, .L1127+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L883
	ldr	r3, .L1127+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L883
	ldr	r3, .L1127+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L883
	ldr	r3, .L1127+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L883:
	ldr	r3, .L1127+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1127+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L884
	ldr	r3, .L1127+52
	ldr	r2, [r3]
	ldr	r3, .L1127+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L884
	ldr	r3, .L1127+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1127+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L884
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L886
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L886
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L886
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L887
.L886:
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L884
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L884
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L884
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L887
.L884:
	ldr	r3, .L1127+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L887
	ldr	r3, .L1127+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L887
	ldr	r3, .L1127+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L887
	ldr	r3, .L1127+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L887
	ldr	r3, .L1127+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L887
	ldr	r3, .L1127+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L887:
	ldr	r3, .L1127+52
	ldr	r3, [r3]
	cmp	r3, #3
	bne	.L888
	ldr	r3, .L1127+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L888
	ldr	r3, .L1127+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L888
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L888
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L888
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L888
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L888
	ldr	r3, .L1127+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L888
	ldr	r3, .L1127+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L888
	ldr	r3, .L1127+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L888
	ldr	r3, .L1127+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L888:
	ldr	r3, .L1127+52
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L889
	ldr	r3, .L1127+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L889
	ldr	r3, .L1127+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L889
	ldr	r3, .L1127+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L889
	ldr	r3, .L1127+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L889
	ldr	r3, .L1127+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L889
	ldr	r3, .L1127+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L889
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L889
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L889
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L889
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L889:
	ldr	r3, .L1127+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1127+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L890
	ldr	r3, .L1127+52
	ldr	r2, [r3]
	ldr	r3, .L1127+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L890
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L890
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L890
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L890
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L890
	ldr	r3, .L1127+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L891
.L890:
	ldr	r3, .L1127+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L891
	ldr	r3, .L1127+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L891
	ldr	r3, .L1127+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L891
	ldr	r3, .L1127+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L891
	ldr	r3, .L1127+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L891
	ldr	r3, .L1127+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L891:
	ldr	r3, .L1127+52
	ldr	r2, [r3]
	ldr	r3, .L1127+56
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L892
	ldr	r3, .L1127+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L892
	ldr	r3, .L1127+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L892
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L892
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L892
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L892
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L894
.L892:
	ldr	r3, .L1127+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L894
	ldr	r3, .L1127+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L894
	ldr	r3, .L1127+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L894
	ldr	r3, .L1127+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L894
	ldr	r3, .L1127+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L894
	ldr	r3, .L1127+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L894:
	ldr	r3, .L1127+56
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L895
	ldr	r3, .L1127+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L895
	ldr	r3, .L1127+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L895
	ldr	r3, .L1127+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L895
	ldr	r3, .L1127+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L895
	ldr	r3, .L1127+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1127+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L895
	ldr	r3, .L1127+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1127+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L896
.L895:
	ldr	r3, .L1127+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L896
	ldr	r3, .L1127+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L896
	ldr	r3, .L1127+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L896
	ldr	r3, .L1127+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L896
	ldr	r3, .L1127+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L896
	ldr	r3, .L1127+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L896:
	ldr	r3, .L1127+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L897
	ldr	r3, .L1127+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L897
	ldr	r3, .L1127+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L897
	ldr	r3, .L1127+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L898
.L897:
	ldr	r3, .L1127+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L899
	ldr	r3, .L1127+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L899
	ldr	r3, .L1127+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L899
	ldr	r3, .L1127+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L898
.L899:
	ldr	r3, .L1127+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L900
	ldr	r3, .L1127+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L900
	ldr	r3, .L1127+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L900
	ldr	r3, .L1127+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L898
.L900:
	ldr	r3, .L1127+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L901
	ldr	r3, .L1127+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L901
	ldr	r3, .L1127+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L901
	ldr	r3, .L1127+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L898
.L901:
	ldr	r3, .L1127+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L902
	ldr	r3, .L1127+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L902
	ldr	r3, .L1127+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L902
	ldr	r3, .L1127+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L898
.L902:
	ldr	r3, .L1127+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L903
	ldr	r3, .L1127+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L903
	ldr	r3, .L1127+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L903
	ldr	r3, .L1127+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L898
.L903:
	ldr	r3, .L1127+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L904
	ldr	r3, .L1127+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L904
	ldr	r3, .L1127+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L904
	ldr	r3, .L1127+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L898
.L904:
	ldr	r3, .L1127+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L905
	ldr	r3, .L1127+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L905
	ldr	r3, .L1127+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L905
	ldr	r3, .L1127+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L898
.L905:
	ldr	r3, .L1127+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1127+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1127+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1127+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L898:
	ldr	r3, .L1127+112
	ldr	r3, [r3]	@ float
	ldr	r1, .L1127+116
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L906
	ldr	r3, .L1127+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L907
	ldr	r3, .L1127+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L907
	ldr	r3, .L1127+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L907
	ldr	r3, .L1127+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L907:
	ldr	r3, .L1127+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L908
	ldr	r3, .L1127+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L908
	ldr	r3, .L1127+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L908
	ldr	r3, .L1127+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L908:
	ldr	r3, .L1127+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L909
	ldr	r3, .L1127+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L909
	ldr	r3, .L1127+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L909
	ldr	r3, .L1127+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L909:
	ldr	r3, .L1127+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L906
	ldr	r3, .L1127+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L906
	ldr	r3, .L1127+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L906
	ldr	r3, .L1127+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L906:
	ldr	r3, .L1127+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L910
	ldr	r3, .L1127+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1127+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1127+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1127+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1127+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1127+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1127+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1130
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1130+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1130+8
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1130+32
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L910:
	ldr	r3, .L1130+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L912
	ldr	r3, .L1130+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1130+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1130+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1130+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1130+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1130+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1130+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1130
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1130+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1130+8
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1130+32
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L912:
	ldr	r3, .L1130+64
	ldr	r2, [r3]
	ldr	r3, .L1130+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L914
	ldr	r3, .L1130+64
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L914
	ldr	r3, .L1130
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L914
	ldr	r3, .L1130+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L914
	ldr	r3, .L1130+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L914
	ldr	r3, .L1130+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L914
	ldr	r3, .L1130+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1130+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L914
	ldr	r3, .L1130+32
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L915
.L914:
	ldr	r3, .L1130+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L915
	ldr	r3, .L1130+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L915
	ldr	r3, .L1130+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L915
	ldr	r3, .L1130+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L915
	ldr	r3, .L1130+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L915
	ldr	r3, .L1130+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L915:
	ldr	r3, .L1130+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1130+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L916
	ldr	r3, .L1130+32
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L916
	ldr	r3, .L1130
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L916
	ldr	r3, .L1130+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L916
	ldr	r3, .L1130+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L916
	ldr	r3, .L1130+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L916
	ldr	r3, .L1130+68
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L918
.L916:
	ldr	r3, .L1130+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L918
	ldr	r3, .L1130+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L918
	ldr	r3, .L1130+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L918
	ldr	r3, .L1130+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L918
	ldr	r3, .L1130+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L918
	ldr	r3, .L1130+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L918:
	ldr	r3, .L1130+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1130+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L919
	ldr	r3, .L1130+64
	ldr	r2, [r3]
	ldr	r3, .L1130+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L919
	ldr	r3, .L1130
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L920
	ldr	r3, .L1130+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L920
	ldr	r3, .L1130+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L920
	ldr	r3, .L1130+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L921
.L920:
	ldr	r3, .L1130
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L919
	ldr	r3, .L1130+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L919
	ldr	r3, .L1130+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L919
	ldr	r3, .L1130+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L919
.L921:
	ldr	r3, .L1130+8
	ldr	r3, [r3]	@ float
	ldr	r2, .L1130+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L922
.L919:
	ldr	r3, .L1130+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L922
	ldr	r3, .L1130+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L922
	ldr	r3, .L1130+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L922
	ldr	r3, .L1130+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L922
	ldr	r3, .L1130+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L922
	ldr	r3, .L1130+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L922:
	ldr	r3, .L1130+64
	ldr	r3, [r3]
	cmp	r3, #2
	bne	.L923
	ldr	r3, .L1130
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L923
	ldr	r3, .L1130+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L923
	ldr	r3, .L1130+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L923
	ldr	r3, .L1130+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L923
	ldr	r3, .L1130+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L923
	ldr	r3, .L1130+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L923
	ldr	r3, .L1130+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L923
	ldr	r3, .L1130+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L923
	ldr	r3, .L1130+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L923
	ldr	r3, .L1130+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L923:
	ldr	r3, .L1130+64
	ldr	r3, [r3]
	cmp	r3, #2
	bne	.L924
	ldr	r3, .L1130+8
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1130+56
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L925
	mov	r3, #0
	mov	r4, r3
.L925:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L926
.L924:
	ldr	r3, .L1130
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L926
	ldr	r3, .L1130+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L926
	ldr	r3, .L1130+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L926
	ldr	r3, .L1130+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L926
	ldr	r3, .L1130+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L926
	ldr	r3, .L1130+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L926
	ldr	r3, .L1130+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L926
	ldr	r3, .L1130+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L926
	ldr	r3, .L1130+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L926
	ldr	r3, .L1130+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L926:
	ldr	r3, .L1130+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1130+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L927
	ldr	r3, .L1130+64
	ldr	r2, [r3]
	ldr	r3, .L1130+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L927
	ldr	r3, .L1130
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L928
	ldr	r3, .L1130+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L928
	ldr	r3, .L1130+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L928
	ldr	r3, .L1130+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L929
.L928:
	ldr	r3, .L1130
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L927
	ldr	r3, .L1130+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L927
	ldr	r3, .L1130+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L927
	ldr	r3, .L1130+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L929
.L927:
	ldr	r3, .L1130+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L929
	ldr	r3, .L1130+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L929
	ldr	r3, .L1130+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L929
	ldr	r3, .L1130+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L929
	ldr	r3, .L1130+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L929
	ldr	r3, .L1130+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L929:
	ldr	r3, .L1130+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L930
	ldr	r3, .L1130+8
	ldr	r3, [r3]	@ float
	ldr	r2, .L1130+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L931
.L930:
	ldr	r3, .L1130+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L931
	ldr	r3, .L1130+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L931
	ldr	r3, .L1130
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L931
	ldr	r3, .L1130+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L931
	ldr	r3, .L1130+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L931
	ldr	r3, .L1130+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L931
	ldr	r3, .L1130+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L931
	ldr	r3, .L1130+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L931
	ldr	r3, .L1130+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L931
	ldr	r3, .L1130+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L931:
	ldr	r3, .L1130+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L932
	ldr	r3, .L1130+32
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L933
.L932:
	ldr	r3, .L1130+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L933
	ldr	r3, .L1130+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L933
	ldr	r3, .L1130+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L933
	ldr	r3, .L1130+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L933
	ldr	r3, .L1130+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L933
	ldr	r3, .L1130+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L933
	ldr	r3, .L1130
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L933
	ldr	r3, .L1130+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L933
	ldr	r3, .L1130+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L933
	ldr	r3, .L1130+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L933:
	ldr	r3, .L1130+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L934
	ldr	r3, .L1130
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L934
	ldr	r3, .L1130+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L934
	ldr	r3, .L1130+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L934
	ldr	r3, .L1130+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L934
	ldr	r3, .L1130+64
	ldr	r2, [r3]
	ldr	r3, .L1130+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L934
	ldr	r3, .L1130+32
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L935
.L934:
	ldr	r3, .L1130+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L935
	ldr	r3, .L1130+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L935
	ldr	r3, .L1130+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L935
	ldr	r3, .L1130+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L935
	ldr	r3, .L1130+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L935
	ldr	r3, .L1130+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L935:
	ldr	r3, .L1130+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1130+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L936
	ldr	r3, .L1130+64
	ldr	r2, [r3]
	ldr	r3, .L1130+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L936
	ldr	r3, .L1130+8
	ldr	r3, [r3]	@ float
	ldr	r2, .L1130+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L936
	ldr	r3, .L1130
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L938
	ldr	r3, .L1130+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L938
	ldr	r3, .L1130+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L938
	ldr	r3, .L1130+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L939
.L938:
	ldr	r3, .L1130
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L936
	ldr	r3, .L1130+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L936
	ldr	r3, .L1130+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L936
	ldr	r3, .L1130+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L939
.L936:
	ldr	r3, .L1130+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L939
	ldr	r3, .L1130+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L939
	ldr	r3, .L1130+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L939
	ldr	r3, .L1130+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L939
	ldr	r3, .L1130+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L939
	ldr	r3, .L1130+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L939:
	ldr	r3, .L1130+64
	ldr	r3, [r3]
	cmp	r3, #2
	bne	.L940
	ldr	r3, .L1130+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L940
	ldr	r3, .L1130+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L940
	ldr	r3, .L1130
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L940
	ldr	r3, .L1130+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L940
	ldr	r3, .L1130+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L940
	ldr	r3, .L1130+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L940
	ldr	r3, .L1130+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L940
	ldr	r3, .L1130+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L940
	ldr	r3, .L1130+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L940
	ldr	r3, .L1130+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L940:
	ldr	r3, .L1130+64
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L941
	ldr	r3, .L1130+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L941
	ldr	r3, .L1130+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L941
	ldr	r3, .L1130+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L941
	ldr	r3, .L1130+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L941
	ldr	r3, .L1130+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L941
	ldr	r3, .L1130+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L941
	ldr	r3, .L1130
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L941
	ldr	r3, .L1130+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L941
	ldr	r3, .L1130+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L941
	ldr	r3, .L1130+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L941:
	ldr	r3, .L1130+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1130+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L942
	ldr	r3, .L1130+64
	ldr	r2, [r3]
	ldr	r3, .L1130+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L942
	ldr	r3, .L1130
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L942
	ldr	r3, .L1130+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L942
	ldr	r3, .L1130+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L942
	ldr	r3, .L1130+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L942
	ldr	r3, .L1130+32
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L943
.L942:
	ldr	r3, .L1130+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L943
	ldr	r3, .L1130+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L943
	ldr	r3, .L1130+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L943
	ldr	r3, .L1130+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L943
	ldr	r3, .L1130+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L943
	ldr	r3, .L1130+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	b	.L1131
.L1132:
	.align	2
.L1130:
	.word	_x_p1_l3
	.word	delta
	.word	p1_c
	.word	_x_p1_l3
	.word	_x_p1_l2
	.word	_x_p1_l0
	.word	_x_p1_l1
	.word	p1_c
	.word	_x_p1_c
	.word	p1_l3
	.word	p1_l2
	.word	p1_l0
	.word	p1_l1
	.word	p1_evt
	.word	1098907648
	.word	_x_v2
	.word	v1
	.word	_x_v1
	.word	_x_p0_l3
	.word	_x_p0_l2
	.word	_x_p0_l0
	.word	_x_p0_l1
	.word	p0_l3
	.word	p0_l2
	.word	p0_l0
	.word	p0_l1
	.word	delta
	.word	v2
	.word	p0_c
	.word	_x_p0_c
	.word	p0_evt
.L1131:
	cmp	r3, #0
	bne	.L229
.L943:
	ldr	r3, .L1130+64
	ldr	r2, [r3]
	ldr	r3, .L1130+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L944
	ldr	r3, .L1130+32
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L944
	ldr	r3, .L1130+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L944
	ldr	r3, .L1130+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L944
	ldr	r3, .L1130+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L944
	ldr	r3, .L1130+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L944
	ldr	r3, .L1130+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L946
.L944:
	ldr	r3, .L1130+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L946
	ldr	r3, .L1130+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L946
	ldr	r3, .L1130+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L946
	ldr	r3, .L1130+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L946
	ldr	r3, .L1130+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L946
	ldr	r3, .L1130+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L946:
	ldr	r3, .L1130+68
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L947
	ldr	r3, .L1130+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L947
	ldr	r3, .L1130+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L947
	ldr	r3, .L1130+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L947
	ldr	r3, .L1130+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L947
	ldr	r3, .L1130+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1130+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L947
	ldr	r3, .L1130+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L1130+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L948
.L947:
	ldr	r3, .L1130+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L948
	ldr	r3, .L1130+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L948
	ldr	r3, .L1130+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L948
	ldr	r3, .L1130+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L948
	ldr	r3, .L1130+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L948
	ldr	r3, .L1130+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L948:
	ldr	r3, .L1130+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L949
	ldr	r3, .L1130+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L949
	ldr	r3, .L1130+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L949
	ldr	r3, .L1130+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L950
.L949:
	ldr	r3, .L1130+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L951
	ldr	r3, .L1130+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L951
	ldr	r3, .L1130+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L951
	ldr	r3, .L1130+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L950
.L951:
	ldr	r3, .L1130+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L952
	ldr	r3, .L1130+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L952
	ldr	r3, .L1130+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L952
	ldr	r3, .L1130+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L950
.L952:
	ldr	r3, .L1130+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L953
	ldr	r3, .L1130+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L953
	ldr	r3, .L1130+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L953
	ldr	r3, .L1130+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L950
.L953:
	ldr	r3, .L1130+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L954
	ldr	r3, .L1130+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L954
	ldr	r3, .L1130+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L954
	ldr	r3, .L1130+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L950
.L954:
	ldr	r3, .L1130+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L955
	ldr	r3, .L1130+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L955
	ldr	r3, .L1130+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L955
	ldr	r3, .L1130+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L950
.L955:
	ldr	r3, .L1130+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L956
	ldr	r3, .L1130+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L956
	ldr	r3, .L1130+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L956
	ldr	r3, .L1130+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L950
.L956:
	ldr	r3, .L1130+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L957
	ldr	r3, .L1130+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L957
	ldr	r3, .L1130+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L957
	ldr	r3, .L1130+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L950
.L957:
	ldr	r3, .L1130+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1130+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1130+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1130+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L950:
	ldr	r3, .L1130+116
	ldr	r3, [r3]	@ float
	ldr	r1, .L1130+56
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L958
	ldr	r3, .L1130+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L959
	ldr	r3, .L1130+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L959
	ldr	r3, .L1130+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L959
	ldr	r3, .L1130+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L959:
	ldr	r3, .L1130+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L960
	ldr	r3, .L1130+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L960
	ldr	r3, .L1130+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L960
	ldr	r3, .L1130+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L960:
	ldr	r3, .L1130+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L961
	ldr	r3, .L1130+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L961
	ldr	r3, .L1130+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L961
	ldr	r3, .L1130+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L961:
	ldr	r3, .L1130+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L958
	ldr	r3, .L1130+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L958
	ldr	r3, .L1130+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L958
	ldr	r3, .L1130+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L958:
	ldr	r3, .L1130+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L962
	ldr	r3, .L1130+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1130+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1130+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1130+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1130+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1130+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1130+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1130+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1130+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1130+112
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1130+116
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L962:
	ldr	r3, .L1130+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L964
	ldr	r3, .L1130+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1130+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1130+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1130+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1130+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1130+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1130+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1130+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1130+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1130+112
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1130+116
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L964:
	ldr	r3, .L1130+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L966
	ldr	r3, .L1130+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L966
	ldr	r3, .L1130+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L966
	ldr	r3, .L1130+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L966
	ldr	r3, .L1130+64
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L966
	ldr	r3, .L1130+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L966
	ldr	r3, .L1130+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1130+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L966
	ldr	r3, .L1130+64
	ldr	r2, [r3]
	ldr	r3, .L1130+68
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L968
.L966:
	ldr	r3, .L1130+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L968
	ldr	r3, .L1130+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L968
	ldr	r3, .L1130+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L968
	ldr	r3, .L1130+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L968
	ldr	r3, .L1130+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L968
	ldr	r3, .L1130+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
.L968:
	ldr	r3, .L1130+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L970
	ldr	r3, .L1130+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1130+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L970
	ldr	r3, .L1130+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L970
	ldr	r3, .L1130+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L970
	ldr	r3, .L1130+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L970
	ldr	r3, .L1130+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L970
	ldr	r3, .L1130+68
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L972
.L970:
	ldr	r3, .L1130+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L972
	ldr	r3, .L1130+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L972
	ldr	r3, .L1130+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L972
	ldr	r3, .L1130+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L972
	ldr	r3, .L1130+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L972
	ldr	r3, .L1130+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
.L972:
	ldr	r3, .L1130+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L974
	ldr	r3, .L1130+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L974
	ldr	r3, .L1130+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L974
	ldr	r3, .L1130+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L975
.L974:
	ldr	r3, .L1130+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L976
	ldr	r3, .L1130+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L976
	ldr	r3, .L1130+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L976
	ldr	r3, .L1130+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L976
.L975:
	ldr	r3, .L1130+112
	ldr	r3, [r3]	@ float
	ldr	r2, .L1130+116
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L976
	ldr	r3, .L1130+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1130+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L976
	ldr	r3, .L1130+64
	ldr	r2, [r3]
	ldr	r3, .L1130+68
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L978
.L976:
	ldr	r3, .L1130+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L978
	ldr	r3, .L1130+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L978
	ldr	r3, .L1130+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L978
	ldr	r3, .L1130+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L978
	ldr	r3, .L1130+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L978
	ldr	r3, .L1130+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
.L978:
	ldr	r3, .L1130+64
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L980
	ldr	r3, .L1130+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L980
	ldr	r3, .L1130+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L980
	ldr	r3, .L1130+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L980
	ldr	r3, .L1130+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L980
	ldr	r3, .L1130+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L980
	ldr	r3, .L1130+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L980
	ldr	r3, .L1130+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L980
	ldr	r3, .L1130+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L980
	ldr	r3, .L1130+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L980
	ldr	r3, .L1130+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
.L980:
	ldr	r3, .L1130+64
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L982
	ldr	r3, .L1130+112
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1130+56
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L983
	mov	r3, #0
	mov	r4, r3
.L983:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L984
.L982:
	ldr	r3, .L1130+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L984
	ldr	r3, .L1130+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L984
	ldr	r3, .L1130+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L984
	ldr	r3, .L1130+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L984
	ldr	r3, .L1130+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L984
	ldr	r3, .L1130+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L984
	ldr	r3, .L1130+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L984
	ldr	r3, .L1130+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L984
	ldr	r3, .L1130+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L984
	ldr	r3, .L1130+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
.L984:
	ldr	r3, .L1130+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1130+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L986
	ldr	r3, .L1130+64
	ldr	r2, [r3]
	ldr	r3, .L1130+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L986
	ldr	r3, .L1130+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L987
	ldr	r3, .L1130+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L987
	ldr	r3, .L1130+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L987
	ldr	r3, .L1130+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L988
.L987:
	ldr	r3, .L1130+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L986
	ldr	r3, .L1130+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L986
	ldr	r3, .L1130+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L986
	ldr	r3, .L1130+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L988
.L986:
	ldr	r3, .L1130+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L988
	ldr	r3, .L1130+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L988
	ldr	r3, .L1130+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L988
	ldr	r3, .L1130+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L988
	ldr	r3, .L1130+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L988
	ldr	r3, .L1130+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
.L988:
	ldr	r3, .L1130+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L990
	ldr	r3, .L1130+112
	ldr	r3, [r3]	@ float
	ldr	r2, .L1130+116
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L991
.L990:
	ldr	r3, .L1130+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L991
	ldr	r3, .L1133+188
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L991
	ldr	r3, .L1133+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L991
	ldr	r3, .L1133+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L991
	ldr	r3, .L1133+312
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L991
	ldr	r3, .L1133+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L991
	ldr	r3, .L1133+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L991
	ldr	r3, .L1133+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L991
	ldr	r3, .L1133+316
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L991
	ldr	r3, .L1133+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
.L991:
	ldr	r3, .L1133+448
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L992
	ldr	r3, .L1133+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L994
.L992:
	ldr	r3, .L1133+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L994
	ldr	r3, .L1133+188
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L994
	ldr	r3, .L1133+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L994
	ldr	r3, .L1133+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L994
	ldr	r3, .L1133+316
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L994
	ldr	r3, .L1133+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L994
	ldr	r3, .L1133+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L994
	ldr	r3, .L1133+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L994
	ldr	r3, .L1133+312
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L994
	ldr	r3, .L1133+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L994:
	ldr	r3, .L1133+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L995
	ldr	r3, .L1133+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L995
	ldr	r3, .L1133+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L995
	ldr	r3, .L1133+312
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L995
	ldr	r3, .L1133+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L995
	ldr	r3, .L1133+448
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L995
	ldr	r3, .L1133+196
	ldr	r2, [r3]
	ldr	r3, .L1133+192
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L997
.L995:
	ldr	r3, .L1133+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L997
	ldr	r3, .L1133+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L997
	ldr	r3, .L1133+316
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L997
	ldr	r3, .L1133+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L997
	ldr	r3, .L1133+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L997
	ldr	r3, .L1133+188
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
.L997:
	ldr	r3, .L1133+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1133+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L999
	ldr	r3, .L1133+196
	ldr	r2, [r3]
	ldr	r3, .L1133+192
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L999
	ldr	r3, .L1133+452
	ldr	r3, [r3]	@ float
	ldr	r2, .L1133+448
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L999
	ldr	r3, .L1133+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1001
	ldr	r3, .L1133+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1001
	ldr	r3, .L1133+312
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1001
	ldr	r3, .L1133+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1002
.L1001:
	ldr	r3, .L1133+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L999
	ldr	r3, .L1133+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L999
	ldr	r3, .L1133+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L999
	ldr	r3, .L1133+312
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1002
.L999:
	ldr	r3, .L1133+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1133+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1002
	ldr	r3, .L1133+316
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1002
	ldr	r3, .L1133+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1133+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1002
	ldr	r3, .L1133+188
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
.L1002:
	ldr	r3, .L1133+196
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L1004
	ldr	r3, .L1133+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1004
	ldr	r3, .L1133+188
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1004
	ldr	r3, .L1133+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1004
	ldr	r3, .L1133+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1004
	ldr	r3, .L1133+312
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1004
	ldr	r3, .L1133+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1004
	ldr	r3, .L1133+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1004
	ldr	r3, .L1133+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1004
	ldr	r3, .L1133+316
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1004
	ldr	r3, .L1133+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L1004:
	ldr	r3, .L1133+196
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L1005
	ldr	r3, .L1133+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1005
	ldr	r3, .L1133+188
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1005
	ldr	r3, .L1133+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1005
	ldr	r3, .L1133+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1005
	ldr	r3, .L1133+316
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1005
	ldr	r3, .L1133+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1005
	ldr	r3, .L1133+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1005
	ldr	r3, .L1133+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1005
	ldr	r3, .L1133+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1005
	ldr	r3, .L1133+312
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
.L1005:
	ldr	r3, .L1133+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1133+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1006
	ldr	r3, .L1133+196
	ldr	r2, [r3]
	ldr	r3, .L1133+192
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1006
	ldr	r3, .L1133+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1006
	ldr	r3, .L1133+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1006
	ldr	r3, .L1133+312
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1006
	ldr	r3, .L1133+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1006
	ldr	r3, .L1133+448
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1007
.L1006:
	ldr	r3, .L1133+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1007
	ldr	r3, .L1133+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1007
	ldr	r3, .L1133+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1007
	ldr	r3, .L1133+316
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1007
	ldr	r3, .L1133+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1007
	ldr	r3, .L1133+188
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
.L1007:
	ldr	r3, .L1133+448
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1009
	ldr	r3, .L1133+196
	ldr	r2, [r3]
	ldr	r3, .L1133+192
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L1009
	ldr	r3, .L1133+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1009
	ldr	r3, .L1133+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1009
	ldr	r3, .L1133+312
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1009
	ldr	r3, .L1133+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1009
	ldr	r3, .L1133+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1011
.L1009:
	ldr	r3, .L1133+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1011
	ldr	r3, .L1133+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1011
	ldr	r3, .L1133+316
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1011
	ldr	r3, .L1133+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1011
	ldr	r3, .L1133+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1011
	ldr	r3, .L1133+188
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
.L1011:
	ldr	r3, .L1133+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1013
	ldr	r3, .L1133+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1013
	ldr	r3, .L1133+312
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1013
	ldr	r3, .L1133+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1013
	ldr	r3, .L1133+192
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1013
	ldr	r3, .L1133+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1133+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1013
	ldr	r3, .L1133+452
	ldr	r3, [r3]	@ float
	ldr	r2, .L1133+448
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1014
.L1013:
	ldr	r3, .L1133+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1014
	ldr	r3, .L1133+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1014
	ldr	r3, .L1133+316
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1014
	ldr	r3, .L1133+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1014
	ldr	r3, .L1133+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1014
	ldr	r3, .L1133+188
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
.L1014:
	ldr	r3, .L1133+192
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L1016
	ldr	r3, .L1133+192
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L1016
	ldr	r3, .L1133+192
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L1016
	ldr	r3, .L1133+192
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L1016
	ldr	r3, .L1133+192
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L1016
	ldr	r3, .L1133+192
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L1016
	ldr	r3, .L1133+192
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L1016
	ldr	r3, .L1133+192
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L1016
	ldr	r3, .L1133+192
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L1016
	ldr	r3, .L1133+192
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L1016
	ldr	r3, .L1133+192
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L1016
	ldr	r3, .L1133+192
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L1016
	ldr	r3, .L1133+192
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L1016
	ldr	r3, .L1133+192
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L1016
	ldr	r3, .L1133+192
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L1016
	ldr	r3, .L1133+192
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L229
.L1016:
	ldr	r3, .L1133+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1133+188
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L1018
	ldr	r3, .L1133+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1133+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1133+196
	ldr	r2, [r3]
	ldr	r3, .L1133+192
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L229
.L1018:
	ldr	r3, .L1133+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1019
	ldr	r3, .L1133+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1019
	ldr	r3, .L1133+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1019
	ldr	r3, .L1133+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1019
	ldr	r3, .L1133+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1019
	ldr	r3, .L1133+748
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1019
	ldr	r3, .L1133+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1019
	ldr	r3, .L1133+636
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1019
	ldr	r3, .L1133+740
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1019
	ldr	r3, .L1133+436
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1019
	ldr	r3, .L1133+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1019
	ldr	r3, .L1133+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1019
	ldr	r3, .L1133+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1019
	ldr	r3, .L1133+484
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1019
	ldr	r3, .L1133+340
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1019
	ldr	r3, .L1133+188
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
.L1019:
	ldr	r3, .L1133+188
	ldr	r3, [r3]	@ float
	ldr	r2, .L1133+56
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1021
	ldr	r3, .L1133+60
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L1022
	mov	r3, #0
	mov	r4, r3
.L1022:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L229
.L1021:
	ldr	r3, .L1133+60
	ldr	r3, [r3]	@ float
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L1023
	ldr	r3, .L1133+188
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1133+60
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1133+56
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
.L1023:
	mov	r3, #1
	b	.L1025
.L1134:
	.align	2
.L1133:
	.word	_x_p14_l3
	.word	p14_l3
	.word	_x_p12_l3
	.word	p12_l3
	.word	_x_p12_l2
	.word	p12_l2
	.word	_x_p12_l1
	.word	p12_l1
	.word	_x_p12_l0
	.word	p12_l0
	.word	_x_p12_evt
	.word	p12_evt
	.word	_x_p12_c
	.word	p12_c
	.word	_x__diverge_delta
	.word	_diverge_delta
	.word	_x_p10_l3
	.word	p10_l3
	.word	_x_p10_l2
	.word	p10_l2
	.word	_x_p10_l1
	.word	p10_l1
	.word	_x_p10_l0
	.word	p10_l0
	.word	_x_p10_evt
	.word	p10_evt
	.word	_x_p10_c
	.word	p10_c
	.word	_x_p3_l3
	.word	p3_l3
	.word	_x_p3_evt
	.word	p3_evt
	.word	_x_p0_l2
	.word	p0_l2
	.word	_x_p14_l2
	.word	p14_l2
	.word	_x_p8_l3
	.word	p8_l3
	.word	_x_p0_l1
	.word	p0_l1
	.word	_x_p2_l3
	.word	p2_l3
	.word	_x_p2_evt
	.word	p2_evt
	.word	_x_p14_evt
	.word	p14_evt
	.word	_x_delta
	.word	delta
	.word	_x_v1
	.word	v1
	.word	_x_v2
	.word	v2
	.word	_x_p8_c
	.word	p8_c
	.word	_x_p0_l3
	.word	p0_l3
	.word	_x_p14_c
	.word	p14_c
	.word	_x_p8_evt
	.word	p8_evt
	.word	_x_p14_l1
	.word	p14_l1
	.word	_x_p8_l2
	.word	p8_l2
	.word	_x_p13_evt
	.word	p13_evt
	.word	_x_p4_evt
	.word	p4_evt
	.word	_x_p1_c
	.word	p1_c
	.word	_x_p9_l3
	.word	p9_l3
	.word	_x_p3_l2
	.word	p3_l2
	.word	_x_p6_l3
	.word	p6_l3
	.word	_x_p1_l3
	.word	p1_l3
	.word	_x_p0_l0
	.word	p0_l0
	.word	_x_p14_l0
	.word	p14_l0
	.word	_x_p8_l1
	.word	p8_l1
	.word	_x_p1_evt
	.word	p1_evt
	.word	_x_p13_l2
	.word	p13_l2
	.word	_x_p1_l1
	.word	p1_l1
	.word	_x_p7_l3
	.word	p7_l3
	.word	_x_p4_l2
	.word	p4_l2
	.word	_x_p13_l3
	.word	p13_l3
	.word	_x_p1_l2
	.word	p1_l2
	.word	_x_p4_l3
	.word	p4_l3
	.word	_x_p11_c
	.word	p11_c
	.word	_x_p5_c
	.word	p5_c
	.word	_x_p11_evt
	.word	p11_evt
	.word	_x_p2_c
	.word	p2_c
	.word	_x_p5_evt
	.word	p5_evt
	.word	_x_p11_l0
	.word	p11_l0
	.word	_x_p0_c
	.word	p0_c
	.word	_x_p5_l0
	.word	p5_l0
	.word	_x_p11_l1
	.word	p11_l1
	.word	_x_p2_l0
	.word	p2_l0
	.word	_x_p0_evt
	.word	p0_evt
	.word	_x_p5_l1
	.word	p5_l1
	.word	_x_p11_l2
	.word	p11_l2
	.word	_x_p2_l1
	.word	p2_l1
	.word	_x_p5_l2
	.word	p5_l2
	.word	_x_p11_l3
	.word	p11_l3
	.word	_x_p2_l2
	.word	p2_l2
	.word	_x_p5_l3
	.word	p5_l3
	.word	_x_p9_l0
	.word	p9_l0
	.word	_x_p6_l0
	.word	p6_l0
	.word	_x_p9_l1
	.word	p9_l1
	.word	_x_p3_l0
	.word	p3_l0
	.word	_x_p6_l1
	.word	p6_l1
	.word	_x_p9_l2
	.word	p9_l2
	.word	_x_p3_l1
	.word	p3_l1
	.word	_x_p6_l2
	.word	p6_l2
	.word	_x_p7_c
	.word	p7_c
	.word	_x_p13_c
	.word	p13_c
	.word	_x_p4_c
	.word	p4_c
	.word	_x_p7_evt
	.word	p7_evt
	.word	_x_p7_l0
	.word	p7_l0
	.word	_x_p13_l0
	.word	p13_l0
	.word	_x_p4_l0
	.word	p4_l0
	.word	_x_p7_l1
	.word	p7_l1
	.word	_x_p13_l1
	.word	p13_l1
	.word	_x_p1_l0
	.word	p1_l0
	.word	_x_p4_l1
	.word	p4_l1
	.word	_x_p7_l2
	.word	p7_l2
	.word	_x_p8_l0
	.word	p8_l0
	.word	_x_p6_c
	.word	p6_c
	.word	_x_p9_c
	.word	p9_c
	.word	_x_p3_c
	.word	p3_c
	.word	_x_p6_evt
	.word	p6_evt
	.word	_x_p9_evt
	.word	p9_evt
.L229:
	mov	r3, #0
.L1025:
	str	r3, [fp, #-24]
	ldr	r3, .L1133
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+4
	strb	r2, [r3]
	ldr	r3, .L1133+8
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+12
	strb	r2, [r3]
	ldr	r3, .L1133+16
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+20
	strb	r2, [r3]
	ldr	r3, .L1133+24
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+28
	strb	r2, [r3]
	ldr	r3, .L1133+32
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+36
	strb	r2, [r3]
	ldr	r3, .L1133+40
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+44
	strb	r2, [r3]
	ldr	r3, .L1133+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L1133+52
	str	r3, [r2]	@ float
	ldr	r3, .L1133+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L1133+60
	str	r3, [r2]	@ float
	ldr	r3, .L1133+64
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+68
	strb	r2, [r3]
	ldr	r3, .L1133+72
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+76
	strb	r2, [r3]
	ldr	r3, .L1133+80
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+84
	strb	r2, [r3]
	ldr	r3, .L1133+88
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+92
	strb	r2, [r3]
	ldr	r3, .L1133+96
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+100
	strb	r2, [r3]
	ldr	r3, .L1133+104
	ldr	r3, [r3]	@ float
	ldr	r2, .L1133+108
	str	r3, [r2]	@ float
	ldr	r3, .L1133+112
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+116
	strb	r2, [r3]
	ldr	r3, .L1133+120
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+124
	strb	r2, [r3]
	ldr	r3, .L1133+128
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+132
	strb	r2, [r3]
	ldr	r3, .L1133+136
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+140
	strb	r2, [r3]
	ldr	r3, .L1133+144
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+148
	strb	r2, [r3]
	ldr	r3, .L1133+152
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+156
	strb	r2, [r3]
	ldr	r3, .L1133+160
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+164
	strb	r2, [r3]
	ldr	r3, .L1133+168
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+172
	strb	r2, [r3]
	ldr	r3, .L1133+176
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+180
	strb	r2, [r3]
	ldr	r3, .L1133+184
	ldr	r3, [r3]	@ float
	ldr	r2, .L1133+188
	str	r3, [r2]	@ float
	ldr	r3, .L1133+192
	ldr	r3, [r3]
	ldr	r2, .L1133+196
	str	r3, [r2]
	ldr	r3, .L1133+200
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+204
	strb	r2, [r3]
	ldr	r3, .L1133+208
	ldr	r3, [r3]	@ float
	ldr	r2, .L1133+212
	str	r3, [r2]	@ float
	ldr	r3, .L1133+216
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+220
	strb	r2, [r3]
	ldr	r3, .L1133+224
	ldr	r3, [r3]	@ float
	ldr	r2, .L1133+228
	str	r3, [r2]	@ float
	ldr	r3, .L1133+232
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+236
	strb	r2, [r3]
	ldr	r3, .L1133+240
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+244
	strb	r2, [r3]
	ldr	r3, .L1133+248
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+252
	strb	r2, [r3]
	ldr	r3, .L1133+256
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+260
	strb	r2, [r3]
	ldr	r3, .L1133+264
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+268
	strb	r2, [r3]
	ldr	r3, .L1133+272
	ldr	r3, [r3]	@ float
	ldr	r2, .L1133+276
	str	r3, [r2]	@ float
	ldr	r3, .L1133+280
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+284
	strb	r2, [r3]
	ldr	r3, .L1133+288
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+292
	strb	r2, [r3]
	ldr	r3, .L1133+296
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+300
	strb	r2, [r3]
	ldr	r3, .L1133+304
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+308
	strb	r2, [r3]
	ldr	r3, .L1133+312
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+316
	strb	r2, [r3]
	ldr	r3, .L1133+320
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+324
	strb	r2, [r3]
	ldr	r3, .L1133+328
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+332
	strb	r2, [r3]
	ldr	r3, .L1133+336
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+340
	strb	r2, [r3]
	ldr	r3, .L1133+344
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+348
	strb	r2, [r3]
	ldr	r3, .L1133+352
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+356
	strb	r2, [r3]
	ldr	r3, .L1133+360
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+364
	strb	r2, [r3]
	ldr	r3, .L1133+368
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+372
	strb	r2, [r3]
	ldr	r3, .L1133+376
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+380
	strb	r2, [r3]
	ldr	r3, .L1133+384
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+388
	strb	r2, [r3]
	ldr	r3, .L1133+392
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+396
	strb	r2, [r3]
	ldr	r3, .L1133+400
	ldr	r3, [r3]	@ float
	ldr	r2, .L1133+404
	str	r3, [r2]	@ float
	ldr	r3, .L1133+408
	ldr	r3, [r3]	@ float
	ldr	r2, .L1133+412
	str	r3, [r2]	@ float
	ldr	r3, .L1133+416
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+420
	strb	r2, [r3]
	ldr	r3, .L1133+424
	ldr	r3, [r3]	@ float
	ldr	r2, .L1133+428
	str	r3, [r2]	@ float
	ldr	r3, .L1133+432
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+436
	strb	r2, [r3]
	ldr	r3, .L1133+440
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+444
	strb	r2, [r3]
	ldr	r3, .L1133+448
	ldr	r3, [r3]	@ float
	ldr	r2, .L1133+452
	str	r3, [r2]	@ float
	ldr	r3, .L1133+456
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+460
	strb	r2, [r3]
	ldr	r3, .L1133+464
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+468
	strb	r2, [r3]
	ldr	r3, .L1133+472
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+476
	strb	r2, [r3]
	ldr	r3, .L1133+480
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+484
	strb	r2, [r3]
	ldr	r3, .L1133+488
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+492
	strb	r2, [r3]
	ldr	r3, .L1133+496
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+500
	strb	r2, [r3]
	ldr	r3, .L1133+504
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+508
	strb	r2, [r3]
	ldr	r3, .L1133+512
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+516
	strb	r2, [r3]
	ldr	r3, .L1133+520
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+524
	strb	r2, [r3]
	ldr	r3, .L1133+528
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+532
	strb	r2, [r3]
	ldr	r3, .L1133+536
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+540
	strb	r2, [r3]
	ldr	r3, .L1133+544
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+548
	strb	r2, [r3]
	ldr	r3, .L1133+552
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+556
	strb	r2, [r3]
	ldr	r3, .L1133+560
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+564
	strb	r2, [r3]
	ldr	r3, .L1133+568
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+572
	strb	r2, [r3]
	ldr	r3, .L1133+576
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+580
	strb	r2, [r3]
	ldr	r3, .L1133+584
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+588
	strb	r2, [r3]
	ldr	r3, .L1133+592
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+596
	strb	r2, [r3]
	ldr	r3, .L1133+600
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+604
	strb	r2, [r3]
	ldr	r3, .L1133+608
	ldr	r3, [r3]	@ float
	ldr	r2, .L1133+612
	str	r3, [r2]	@ float
	ldr	r3, .L1133+616
	ldr	r3, [r3]	@ float
	ldr	r2, .L1133+620
	str	r3, [r2]	@ float
	ldr	r3, .L1133+624
	ldr	r3, [r3]	@ float
	ldr	r2, .L1133+628
	str	r3, [r2]	@ float
	ldr	r3, .L1133+632
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+636
	strb	r2, [r3]
	ldr	r3, .L1133+640
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+644
	strb	r2, [r3]
	ldr	r3, .L1133+648
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+652
	strb	r2, [r3]
	ldr	r3, .L1133+656
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+660
	strb	r2, [r3]
	ldr	r3, .L1133+664
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+668
	strb	r2, [r3]
	ldr	r3, .L1133+672
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+676
	strb	r2, [r3]
	ldr	r3, .L1133+680
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+684
	strb	r2, [r3]
	ldr	r3, .L1133+688
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+692
	strb	r2, [r3]
	ldr	r3, .L1133+696
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+700
	strb	r2, [r3]
	ldr	r3, .L1133+704
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+708
	strb	r2, [r3]
	ldr	r3, .L1133+712
	ldr	r3, [r3]	@ float
	ldr	r2, .L1133+716
	str	r3, [r2]	@ float
	ldr	r3, .L1133+720
	ldr	r3, [r3]	@ float
	ldr	r2, .L1133+724
	str	r3, [r2]	@ float
	ldr	r3, .L1133+728
	ldr	r3, [r3]	@ float
	ldr	r2, .L1133+732
	str	r3, [r2]	@ float
	ldr	r3, .L1133+736
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+740
	strb	r2, [r3]
	ldr	r3, .L1133+744
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1133+748
	strb	r2, [r3]
.L219:
	ldr	r3, [fp, #-24]
	cmp	r3, #0
	bne	.L1026
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
