	.file	"425689.c"
	.intel_syntax noprefix
	.text
	.globl	i
	.data
	.align 16
	.type	i, @object
	.size	i, 16
i:
	.long	150
	.long	100
	.long	150
	.long	200
	.globl	j
	.align 16
	.type	j, @object
	.size	j, 16
j:
	.long	10
	.long	13
	.long	20
	.long	30
	.globl	k
	.bss
	.align 16
	.type	k, @object
	.size	k, 16
k:
	.zero	16
	.globl	res
	.align 16
	.type	res, @object
	.size	res, 16
res:
	.zero	16
	.text
	.globl	verify
	.type	verify, @function
verify:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	DWORD PTR -20[rbp], r8d
	mov	DWORD PTR -24[rbp], r9d
	mov	eax, DWORD PTR -4[rbp]
	cmp	eax, DWORD PTR -20[rbp]
	jne	.L2
	mov	eax, DWORD PTR -8[rbp]
	cmp	eax, DWORD PTR -24[rbp]
	jne	.L2
	mov	eax, DWORD PTR -12[rbp]
	cmp	eax, DWORD PTR 16[rbp]
	jne	.L2
	mov	eax, DWORD PTR -16[rbp]
	cmp	eax, DWORD PTR 24[rbp]
	je	.L4
.L2:
	call	abort@PLT
.L4:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	verify, .-verify
	.globl	main
	.type	main, @function
main:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movdqa	xmm1, XMMWORD PTR i[rip]
	movdqa	xmm0, XMMWORD PTR j[rip]
	paddd	xmm0, xmm1
	movaps	XMMWORD PTR k[rip], xmm0
	movdqa	xmm0, XMMWORD PTR k[rip]
	movaps	XMMWORD PTR res[rip], xmm0
	mov	ecx, DWORD PTR res[rip+12]
	mov	edx, DWORD PTR res[rip+8]
	mov	esi, DWORD PTR res[rip+4]
	mov	eax, DWORD PTR res[rip]
	push	230
	push	170
	mov	r9d, 113
	mov	r8d, 160
	mov	edi, eax
	call	verify
	add	rsp, 16
	movdqa	xmm1, XMMWORD PTR i[rip]
	movdqa	xmm0, XMMWORD PTR j[rip]
	movdqa	xmm2, xmm1
	pmuludq	xmm2, xmm0
	psrlq	xmm1, 32
	psrlq	xmm0, 32
	pmuludq	xmm1, xmm0
	pshufd	xmm0, xmm2, 8
	pshufd	xmm1, xmm1, 8
	punpckldq	xmm0, xmm1
	movaps	XMMWORD PTR k[rip], xmm0
	movdqa	xmm0, XMMWORD PTR k[rip]
	movaps	XMMWORD PTR res[rip], xmm0
	mov	ecx, DWORD PTR res[rip+12]
	mov	edx, DWORD PTR res[rip+8]
	mov	esi, DWORD PTR res[rip+4]
	mov	eax, DWORD PTR res[rip]
	push	6000
	push	3000
	mov	r9d, 1300
	mov	r8d, 1500
	mov	edi, eax
	call	verify
	add	rsp, 16
	movdqa	xmm1, XMMWORD PTR i[rip]
	movdqa	xmm0, XMMWORD PTR j[rip]
	movd	eax, xmm1
	movd	edi, xmm0
	cdq
	idiv	edi
	mov	edi, eax
	pshufd	xmm2, xmm1, 85
	movd	eax, xmm2
	pshufd	xmm2, xmm0, 85
	movd	ecx, xmm2
	cdq
	idiv	ecx
	mov	esi, eax
	movdqa	xmm2, xmm1
	punpckhdq	xmm2, xmm1
	movd	eax, xmm2
	movdqa	xmm2, xmm0
	punpckhdq	xmm2, xmm0
	movd	ecx, xmm2
	cdq
	idiv	ecx
	mov	r8d, eax
	pshufd	xmm1, xmm1, 255
	movd	eax, xmm1
	pshufd	xmm0, xmm0, 255
	movd	ecx, xmm0
	cdq
	idiv	ecx
	movd	xmm1, r8d
	movd	xmm3, eax
	punpckldq	xmm1, xmm3
	movd	xmm0, edi
	movd	xmm4, esi
	punpckldq	xmm0, xmm4
	punpcklqdq	xmm0, xmm1
	movaps	XMMWORD PTR k[rip], xmm0
	movdqa	xmm0, XMMWORD PTR k[rip]
	movaps	XMMWORD PTR res[rip], xmm0
	mov	ecx, DWORD PTR res[rip+12]
	mov	edx, DWORD PTR res[rip+8]
	mov	esi, DWORD PTR res[rip+4]
	mov	eax, DWORD PTR res[rip]
	push	6
	push	7
	mov	r9d, 7
	mov	r8d, 15
	mov	edi, eax
	call	verify
	add	rsp, 16
	movdqa	xmm1, XMMWORD PTR i[rip]
	movdqa	xmm0, XMMWORD PTR j[rip]
	pand	xmm0, xmm1
	movaps	XMMWORD PTR k[rip], xmm0
	movdqa	xmm0, XMMWORD PTR k[rip]
	movaps	XMMWORD PTR res[rip], xmm0
	mov	ecx, DWORD PTR res[rip+12]
	mov	edx, DWORD PTR res[rip+8]
	mov	esi, DWORD PTR res[rip+4]
	mov	eax, DWORD PTR res[rip]
	push	8
	push	20
	mov	r9d, 4
	mov	r8d, 2
	mov	edi, eax
	call	verify
	add	rsp, 16
	movdqa	xmm1, XMMWORD PTR i[rip]
	movdqa	xmm0, XMMWORD PTR j[rip]
	por	xmm0, xmm1
	movaps	XMMWORD PTR k[rip], xmm0
	movdqa	xmm0, XMMWORD PTR k[rip]
	movaps	XMMWORD PTR res[rip], xmm0
	mov	ecx, DWORD PTR res[rip+12]
	mov	edx, DWORD PTR res[rip+8]
	mov	esi, DWORD PTR res[rip+4]
	mov	eax, DWORD PTR res[rip]
	push	222
	push	150
	mov	r9d, 109
	mov	r8d, 158
	mov	edi, eax
	call	verify
	add	rsp, 16
	movdqa	xmm1, XMMWORD PTR i[rip]
	movdqa	xmm0, XMMWORD PTR j[rip]
	pxor	xmm0, xmm1
	movaps	XMMWORD PTR k[rip], xmm0
	movdqa	xmm0, XMMWORD PTR k[rip]
	movaps	XMMWORD PTR res[rip], xmm0
	mov	ecx, DWORD PTR res[rip+12]
	mov	edx, DWORD PTR res[rip+8]
	mov	esi, DWORD PTR res[rip+4]
	mov	eax, DWORD PTR res[rip]
	push	214
	push	130
	mov	r9d, 105
	mov	r8d, 156
	mov	edi, eax
	call	verify
	add	rsp, 16
	movdqa	xmm1, XMMWORD PTR i[rip]
	pxor	xmm0, xmm0
	psubd	xmm0, xmm1
	movaps	XMMWORD PTR k[rip], xmm0
	movdqa	xmm0, XMMWORD PTR k[rip]
	movaps	XMMWORD PTR res[rip], xmm0
	mov	ecx, DWORD PTR res[rip+12]
	mov	edx, DWORD PTR res[rip+8]
	mov	esi, DWORD PTR res[rip+4]
	mov	eax, DWORD PTR res[rip]
	push	-200
	push	-150
	mov	r9d, -100
	mov	r8d, -150
	mov	edi, eax
	call	verify
	add	rsp, 16
	movdqa	xmm1, XMMWORD PTR i[rip]
	pcmpeqd	xmm0, xmm0
	pxor	xmm0, xmm1
	movaps	XMMWORD PTR k[rip], xmm0
	movdqa	xmm0, XMMWORD PTR k[rip]
	movaps	XMMWORD PTR res[rip], xmm0
	mov	ecx, DWORD PTR res[rip+12]
	mov	edx, DWORD PTR res[rip+8]
	mov	esi, DWORD PTR res[rip+4]
	mov	eax, DWORD PTR res[rip]
	push	-201
	push	-151
	mov	r9d, -101
	mov	r8d, -151
	mov	edi, eax
	call	verify
	add	rsp, 16
	mov	edi, 0
	call	exit@PLT
	.cfi_endproc
.LFE1:
	.size	main, .-main
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"425689.c"
	.text
	.global	i
	.data
	.align	3
	.type	i, %object
	.size	i, 16
i:
	.word	150
	.word	100
	.word	150
	.word	200
	.global	j
	.align	3
	.type	j, %object
	.size	j, 16
j:
	.word	10
	.word	13
	.word	20
	.word	30
	.comm	k,16,8
	.comm	res,16,8
	.text
	.align	2
	.global	verify
	.syntax unified
	.arm
	.fpu softvfp
	.type	verify, %function
verify:
	@ args = 16, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #4]
	cmp	r2, r3
	bne	.L2
	ldr	r2, [fp, #-12]
	ldr	r3, [fp, #8]
	cmp	r2, r3
	bne	.L2
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #12]
	cmp	r2, r3
	bne	.L2
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #16]
	cmp	r2, r3
	beq	.L4
.L2:
	bl	abort
.L4:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	verify, .-verify
	.global	__aeabi_idiv
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	add	fp, sp, #32
	sub	sp, sp, #36
	ldr	r3, .L6
	ldr	r4, [r3]
	ldr	r5, [r3, #4]
	ldr	r6, [r3, #8]
	ldr	r7, [r3, #12]
	ldr	ip, .L6+4
	ldr	r0, [ip]
	ldr	r1, [ip, #4]
	ldr	r2, [ip, #8]
	ldr	r3, [ip, #12]
	mov	lr, r4
	mov	ip, r0
	add	r9, lr, ip
	mov	lr, r5
	mov	ip, r1
	add	r8, lr, ip
	mov	lr, r6
	mov	ip, r2
	add	lr, lr, ip
	mov	ip, r7
	add	ip, ip, r3
	mov	r0, #0
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	mov	r0, r9
	mov	r1, r8
	mov	r2, lr
	mov	r3, ip
	mov	r4, r0
	mov	r5, r1
	mov	r6, r2
	mov	r7, r3
	ldr	r3, .L6+8
	mov	r2, r4
	str	r2, [r3]
	mov	r2, r5
	str	r2, [r3, #4]
	mov	r2, r6
	str	r2, [r3, #8]
	mov	r2, r7
	str	r2, [r3, #12]
	ldr	ip, .L6+8
	ldr	r0, [ip]
	ldr	r1, [ip, #4]
	ldr	r2, [ip, #8]
	ldr	r3, [ip, #12]
	ldr	ip, .L6+12
	mov	lr, r0
	str	lr, [ip]
	mov	lr, r1
	str	lr, [ip, #4]
	mov	lr, r2
	str	lr, [ip, #8]
	str	r3, [ip, #12]
	ldr	r3, .L6+12
	ldr	r0, [r3]
	ldr	r3, .L6+12
	ldr	r1, [r3, #4]
	ldr	r3, .L6+12
	ldr	r2, [r3, #8]
	ldr	r3, .L6+12
	ldr	r3, [r3, #12]
	mov	ip, #230
	str	ip, [sp, #12]
	mov	ip, #170
	str	ip, [sp, #8]
	mov	ip, #113
	str	ip, [sp, #4]
	mov	ip, #160
	str	ip, [sp]
	bl	verify
	ldr	r3, .L6
	ldr	r4, [r3]
	ldr	r5, [r3, #4]
	ldr	r6, [r3, #8]
	ldr	r7, [r3, #12]
	ldr	ip, .L6+4
	ldr	r0, [ip]
	ldr	r1, [ip, #4]
	ldr	r2, [ip, #8]
	ldr	r3, [ip, #12]
	mov	ip, r4
	mov	lr, r0
	mul	r9, lr, ip
	mov	ip, r5
	mov	lr, r1
	mul	r8, lr, ip
	mov	ip, r6
	mov	lr, r2
	mul	lr, ip, lr
	mov	ip, r7
	mul	ip, r3, ip
	mov	r0, #0
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	mov	r0, r9
	mov	r1, r8
	mov	r2, lr
	mov	r3, ip
	mov	r4, r0
	mov	r5, r1
	mov	r6, r2
	mov	r7, r3
	ldr	r3, .L6+8
	mov	r2, r4
	str	r2, [r3]
	mov	r2, r5
	str	r2, [r3, #4]
	mov	r2, r6
	str	r2, [r3, #8]
	mov	r2, r7
	str	r2, [r3, #12]
	ldr	ip, .L6+8
	ldr	r0, [ip]
	ldr	r1, [ip, #4]
	ldr	r2, [ip, #8]
	ldr	r3, [ip, #12]
	ldr	ip, .L6+12
	mov	lr, r0
	str	lr, [ip]
	mov	lr, r1
	str	lr, [ip, #4]
	mov	lr, r2
	str	lr, [ip, #8]
	str	r3, [ip, #12]
	ldr	r3, .L6+12
	ldr	r0, [r3]
	ldr	r3, .L6+12
	ldr	r1, [r3, #4]
	ldr	r3, .L6+12
	ldr	r2, [r3, #8]
	ldr	r3, .L6+12
	ldr	r3, [r3, #12]
	ldr	ip, .L6+16
	str	ip, [sp, #12]
	ldr	ip, .L6+20
	str	ip, [sp, #8]
	ldr	ip, .L6+24
	str	ip, [sp, #4]
	ldr	ip, .L6+28
	str	ip, [sp]
	bl	verify
	ldr	r3, .L6
	ldr	r2, [r3]
	str	r2, [fp, #-52]
	ldr	r2, [r3, #4]
	str	r2, [fp, #-48]
	ldr	r2, [r3, #8]
	str	r2, [fp, #-44]
	ldr	r3, [r3, #12]
	str	r3, [fp, #-40]
	ldr	r3, .L6+4
	ldr	r4, [r3]
	ldr	r5, [r3, #4]
	ldr	r6, [r3, #8]
	ldr	r7, [r3, #12]
	ldr	r3, [fp, #-52]
	mov	r2, r4
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_idiv
	mov	r3, r0
	mov	r10, r3
	ldr	r3, [fp, #-48]
	mov	r2, r5
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_idiv
	mov	r3, r0
	mov	r9, r3
	ldr	r3, [fp, #-44]
	mov	r2, r6
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_idiv
	mov	r3, r0
	mov	r8, r3
	ldr	r3, [fp, #-40]
	mov	r2, r7
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_idiv
	mov	r3, r0
	mov	ip, r3
	mov	r0, #0
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	mov	r0, r10
	mov	r1, r9
	mov	r2, r8
	mov	r3, ip
	mov	r4, r0
	mov	r5, r1
	mov	r6, r2
	mov	r7, r3
	ldr	r3, .L6+8
	mov	r2, r4
	str	r2, [r3]
	mov	r2, r5
	str	r2, [r3, #4]
	mov	r2, r6
	str	r2, [r3, #8]
	mov	r2, r7
	str	r2, [r3, #12]
	ldr	ip, .L6+8
	ldr	r0, [ip]
	ldr	r1, [ip, #4]
	ldr	r2, [ip, #8]
	ldr	r3, [ip, #12]
	ldr	ip, .L6+12
	mov	lr, r0
	str	lr, [ip]
	mov	lr, r1
	str	lr, [ip, #4]
	mov	lr, r2
	str	lr, [ip, #8]
	str	r3, [ip, #12]
	ldr	r3, .L6+12
	ldr	r0, [r3]
	ldr	r3, .L6+12
	ldr	r1, [r3, #4]
	ldr	r3, .L6+12
	ldr	r2, [r3, #8]
	ldr	r3, .L6+12
	ldr	r3, [r3, #12]
	mov	ip, #6
	str	ip, [sp, #12]
	mov	ip, #7
	str	ip, [sp, #8]
	mov	ip, #7
	str	ip, [sp, #4]
	mov	ip, #15
	str	ip, [sp]
	bl	verify
	ldr	r3, .L6
	ldr	r4, [r3]
	ldr	r5, [r3, #4]
	ldr	r6, [r3, #8]
	ldr	r7, [r3, #12]
	ldr	ip, .L6+4
	ldr	r0, [ip]
	ldr	r1, [ip, #4]
	ldr	r2, [ip, #8]
	ldr	r3, [ip, #12]
	mov	lr, r4
	mov	ip, r0
	and	r9, lr, ip
	mov	lr, r5
	mov	ip, r1
	and	r8, lr, ip
	mov	lr, r6
	mov	ip, r2
	and	lr, lr, ip
	mov	ip, r7
	and	ip, ip, r3
	mov	r0, #0
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	mov	r0, r9
	mov	r1, r8
	mov	r2, lr
	mov	r3, ip
	mov	r4, r0
	mov	r5, r1
	mov	r6, r2
	mov	r7, r3
	ldr	r3, .L6+8
	mov	r2, r4
	str	r2, [r3]
	mov	r2, r5
	str	r2, [r3, #4]
	mov	r2, r6
	str	r2, [r3, #8]
	mov	r2, r7
	str	r2, [r3, #12]
	ldr	ip, .L6+8
	ldr	r0, [ip]
	ldr	r1, [ip, #4]
	ldr	r2, [ip, #8]
	ldr	r3, [ip, #12]
	ldr	ip, .L6+12
	mov	lr, r0
	str	lr, [ip]
	mov	lr, r1
	str	lr, [ip, #4]
	mov	lr, r2
	str	lr, [ip, #8]
	str	r3, [ip, #12]
	ldr	r3, .L6+12
	ldr	r0, [r3]
	ldr	r3, .L6+12
	ldr	r1, [r3, #4]
	ldr	r3, .L6+12
	ldr	r2, [r3, #8]
	ldr	r3, .L6+12
	ldr	r3, [r3, #12]
	mov	ip, #8
	str	ip, [sp, #12]
	mov	ip, #20
	str	ip, [sp, #8]
	mov	ip, #4
	str	ip, [sp, #4]
	mov	ip, #2
	str	ip, [sp]
	bl	verify
	ldr	r3, .L6
	ldr	r4, [r3]
	ldr	r5, [r3, #4]
	ldr	r6, [r3, #8]
	ldr	r7, [r3, #12]
	ldr	ip, .L6+4
	ldr	r0, [ip]
	ldr	r1, [ip, #4]
	ldr	r2, [ip, #8]
	ldr	r3, [ip, #12]
	mov	lr, r4
	mov	ip, r0
	orr	r9, lr, ip
	mov	lr, r5
	mov	ip, r1
	orr	r8, lr, ip
	mov	lr, r6
	mov	ip, r2
	orr	lr, lr, ip
	mov	ip, r7
	orr	ip, ip, r3
	mov	r0, #0
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	mov	r0, r9
	mov	r1, r8
	mov	r2, lr
	mov	r3, ip
	mov	r4, r0
	mov	r5, r1
	mov	r6, r2
	mov	r7, r3
	ldr	r3, .L6+8
	mov	r2, r4
	str	r2, [r3]
	mov	r2, r5
	str	r2, [r3, #4]
	mov	r2, r6
	str	r2, [r3, #8]
	mov	r2, r7
	str	r2, [r3, #12]
	ldr	ip, .L6+8
	ldr	r0, [ip]
	ldr	r1, [ip, #4]
	ldr	r2, [ip, #8]
	ldr	r3, [ip, #12]
	ldr	ip, .L6+12
	mov	lr, r0
	str	lr, [ip]
	mov	lr, r1
	str	lr, [ip, #4]
	mov	lr, r2
	str	lr, [ip, #8]
	str	r3, [ip, #12]
	ldr	r3, .L6+12
	ldr	r0, [r3]
	ldr	r3, .L6+12
	ldr	r1, [r3, #4]
	ldr	r3, .L6+12
	ldr	r2, [r3, #8]
	ldr	r3, .L6+12
	ldr	r3, [r3, #12]
	mov	ip, #222
	str	ip, [sp, #12]
	mov	ip, #150
	str	ip, [sp, #8]
	mov	ip, #109
	str	ip, [sp, #4]
	mov	ip, #158
	str	ip, [sp]
	bl	verify
	ldr	r3, .L6
	ldr	r4, [r3]
	ldr	r5, [r3, #4]
	ldr	r6, [r3, #8]
	ldr	r7, [r3, #12]
	ldr	ip, .L6+4
	ldr	r0, [ip]
	ldr	r1, [ip, #4]
	ldr	r2, [ip, #8]
	ldr	r3, [ip, #12]
	mov	lr, r4
	mov	ip, r0
	eor	r9, lr, ip
	mov	lr, r5
	mov	ip, r1
	eor	r8, lr, ip
	mov	lr, r6
	mov	ip, r2
	eor	lr, lr, ip
	mov	ip, r7
	eor	ip, ip, r3
	mov	r0, #0
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	mov	r0, r9
	mov	r1, r8
	mov	r2, lr
	mov	r3, ip
	mov	r4, r0
	mov	r5, r1
	mov	r6, r2
	mov	r7, r3
	ldr	r3, .L6+8
	mov	r2, r4
	str	r2, [r3]
	mov	r2, r5
	str	r2, [r3, #4]
	mov	r2, r6
	str	r2, [r3, #8]
	mov	r2, r7
	str	r2, [r3, #12]
	ldr	ip, .L6+8
	ldr	r0, [ip]
	ldr	r1, [ip, #4]
	ldr	r2, [ip, #8]
	ldr	r3, [ip, #12]
	ldr	ip, .L6+12
	mov	lr, r0
	str	lr, [ip]
	mov	lr, r1
	str	lr, [ip, #4]
	mov	lr, r2
	str	lr, [ip, #8]
	str	r3, [ip, #12]
	ldr	r3, .L6+12
	ldr	r0, [r3]
	ldr	r3, .L6+12
	ldr	r1, [r3, #4]
	ldr	r3, .L6+12
	ldr	r2, [r3, #8]
	ldr	r3, .L6+12
	ldr	r3, [r3, #12]
	mov	ip, #214
	str	ip, [sp, #12]
	mov	ip, #130
	str	ip, [sp, #8]
	mov	ip, #105
	str	ip, [sp, #4]
	mov	ip, #156
	str	ip, [sp]
	bl	verify
	ldr	ip, .L6
	ldr	r0, [ip]
	ldr	r1, [ip, #4]
	ldr	r2, [ip, #8]
	ldr	r3, [ip, #12]
	mov	ip, r0
	rsb	r5, ip, #0
	mov	ip, r1
	rsb	r4, ip, #0
	mov	ip, r2
	rsb	lr, ip, #0
	rsb	ip, r3, #0
	mov	r0, #0
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	mov	r0, r5
	mov	r1, r4
	mov	r2, lr
	mov	r3, ip
	mov	r4, r0
	mov	r5, r1
	mov	r6, r2
	mov	r7, r3
	ldr	r3, .L6+8
	mov	r2, r4
	str	r2, [r3]
	mov	r2, r5
	str	r2, [r3, #4]
	mov	r2, r6
	str	r2, [r3, #8]
	mov	r2, r7
	str	r2, [r3, #12]
	ldr	ip, .L6+8
	ldr	r0, [ip]
	ldr	r1, [ip, #4]
	ldr	r2, [ip, #8]
	ldr	r3, [ip, #12]
	ldr	ip, .L6+12
	mov	lr, r0
	str	lr, [ip]
	mov	lr, r1
	str	lr, [ip, #4]
	mov	lr, r2
	str	lr, [ip, #8]
	str	r3, [ip, #12]
	ldr	r3, .L6+12
	ldr	r0, [r3]
	ldr	r3, .L6+12
	ldr	r1, [r3, #4]
	ldr	r3, .L6+12
	ldr	r2, [r3, #8]
	ldr	r3, .L6+12
	ldr	r3, [r3, #12]
	mvn	ip, #199
	str	ip, [sp, #12]
	mvn	ip, #149
	str	ip, [sp, #8]
	mvn	ip, #99
	str	ip, [sp, #4]
	mvn	ip, #149
	str	ip, [sp]
	bl	verify
	ldr	ip, .L6
	ldr	r0, [ip]
	ldr	r1, [ip, #4]
	ldr	r2, [ip, #8]
	ldr	r3, [ip, #12]
	mov	ip, r0
	mvn	r5, ip
	mov	ip, r1
	mvn	r4, ip
	mov	ip, r2
	mvn	lr, ip
	mvn	ip, r3
	mov	r0, #0
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	mov	r0, r5
	mov	r1, r4
	mov	r2, lr
	mov	r3, ip
	mov	r4, r0
	mov	r5, r1
	mov	r6, r2
	mov	r7, r3
	ldr	r3, .L6+8
	mov	r2, r4
	str	r2, [r3]
	mov	r2, r5
	str	r2, [r3, #4]
	mov	r2, r6
	str	r2, [r3, #8]
	mov	r2, r7
	str	r2, [r3, #12]
	ldr	ip, .L6+8
	ldr	r0, [ip]
	ldr	r1, [ip, #4]
	ldr	r2, [ip, #8]
	ldr	r3, [ip, #12]
	ldr	ip, .L6+12
	mov	lr, r0
	str	lr, [ip]
	mov	lr, r1
	str	lr, [ip, #4]
	mov	lr, r2
	str	lr, [ip, #8]
	str	r3, [ip, #12]
	ldr	r3, .L6+12
	ldr	r0, [r3]
	ldr	r3, .L6+12
	ldr	r1, [r3, #4]
	ldr	r3, .L6+12
	ldr	r2, [r3, #8]
	ldr	r3, .L6+12
	ldr	r3, [r3, #12]
	mvn	ip, #200
	str	ip, [sp, #12]
	mvn	ip, #150
	str	ip, [sp, #8]
	mvn	ip, #100
	str	ip, [sp, #4]
	mvn	ip, #150
	str	ip, [sp]
	bl	verify
	mov	r0, #0
	bl	exit
.L7:
	.align	2
.L6:
	.word	i
	.word	j
	.word	k
	.word	res
	.word	6000
	.word	3000
	.word	1300
	.word	1500
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
