	.file	"742668.c"
	.intel_syntax noprefix
	.text
	.data
	.align 32
	.type	SBOX, @object
	.size	SBOX, 256
SBOX:
	.string	"c|w{\362ko\3050\001g+\376\327\253v\312\202\311}\372YG\360\255\324\242\257\234\244r\300\267\375\223&6?\367\3144\245\345\361q\3301\025\004\307#\303\030\226\005\232\007\022\200\342\353'\262u\t\203,\032\033nZ\240R;\326\263)\343/\204S\321"
	.ascii	"\355 \374\261[j\313\2769JLX\317\320\357\252\373CM3\205E\371\002"
	.ascii	"\177P<\237\250Q\243@\217\222\2358\365\274\266\332!\020\377\363"
	.ascii	"\322\315\f\023\354_\227D\027\304\247~=d]\031s`\201O\334\"*\220"
	.ascii	"\210F\356\270\024\336^\013\333\3402:\nI\006$\\\302\323\254b\221"
	.ascii	"\225\344y\347\3107m\215\325N\251lV\364\352ez\256\b\272x%.\034"
	.ascii	"\246\264\306\350\335t\037K\275\213\212p>\265fH\003\366\016a5"
	.ascii	"W\271\206\301\035\236\341\370\230\021i\331\216\224\233\036\207"
	.ascii	"\351\316U(\337\214\241\211\r\277\346BhA\231-\017\260T\273\026"
	.align 16
	.type	shifts, @object
	.size	shifts, 16
shifts:
	.string	""
	.ascii	"\005\n\017\004\t\016\003\b\r\002\007\f\001\006\013"
	.text
	.type	add_round_key, @function
add_round_key:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	QWORD PTR -32[rbp], rsi
	mov	BYTE PTR -1[rbp], 0
	jmp	.L2
.L3:
	movzx	edx, BYTE PTR -1[rbp]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	movzx	ecx, BYTE PTR [rax]
	movzx	edx, BYTE PTR -1[rbp]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	movzx	edx, BYTE PTR [rax]
	movzx	esi, BYTE PTR -1[rbp]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rsi
	xor	edx, ecx
	mov	BYTE PTR [rax], dl
	movzx	eax, BYTE PTR -1[rbp]
	add	eax, 1
	mov	BYTE PTR -1[rbp], al
.L2:
	cmp	BYTE PTR -1[rbp], 15
	jbe	.L3
	nop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	add_round_key, .-add_round_key
	.type	sub_bytes, @function
sub_bytes:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	BYTE PTR -1[rbp], 0
	jmp	.L5
.L6:
	movzx	edx, BYTE PTR -1[rbp]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	movzx	ecx, BYTE PTR -1[rbp]
	mov	rdx, QWORD PTR -24[rbp]
	add	rdx, rcx
	cdqe
	lea	rcx, SBOX[rip]
	movzx	eax, BYTE PTR [rax+rcx]
	mov	BYTE PTR [rdx], al
	movzx	eax, BYTE PTR -1[rbp]
	add	eax, 1
	mov	BYTE PTR -1[rbp], al
.L5:
	cmp	BYTE PTR -1[rbp], 15
	jbe	.L6
	nop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	sub_bytes, .-sub_bytes
	.type	shift_rows, @function
shift_rows:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 64
	mov	QWORD PTR -56[rbp], rdi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	BYTE PTR -33[rbp], 0
	jmp	.L8
.L9:
	movzx	eax, BYTE PTR -33[rbp]
	cdqe
	lea	rdx, shifts[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	edx, al
	mov	rax, QWORD PTR -56[rbp]
	add	rdx, rax
	movzx	eax, BYTE PTR -33[rbp]
	movzx	edx, BYTE PTR [rdx]
	cdqe
	mov	BYTE PTR -32[rbp+rax], dl
	movzx	eax, BYTE PTR -33[rbp]
	add	eax, 1
	mov	BYTE PTR -33[rbp], al
.L8:
	cmp	BYTE PTR -33[rbp], 15
	jbe	.L9
	mov	BYTE PTR -33[rbp], 0
	jmp	.L10
.L11:
	movzx	eax, BYTE PTR -33[rbp]
	movzx	ecx, BYTE PTR -33[rbp]
	mov	rdx, QWORD PTR -56[rbp]
	add	rdx, rcx
	cdqe
	movzx	eax, BYTE PTR -32[rbp+rax]
	mov	BYTE PTR [rdx], al
	movzx	eax, BYTE PTR -33[rbp]
	add	eax, 1
	mov	BYTE PTR -33[rbp], al
.L10:
	cmp	BYTE PTR -33[rbp], 15
	jbe	.L11
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	shift_rows, .-shift_rows
	.type	mix_columns, @function
mix_columns:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	BYTE PTR -18[rbp], 0
	jmp	.L14
.L18:
	mov	BYTE PTR -19[rbp], 0
	jmp	.L15
.L17:
	movzx	edx, BYTE PTR -19[rbp]
	movzx	eax, BYTE PTR -18[rbp]
	sal	eax, 2
	add	eax, edx
	movsx	rdx, eax
	mov	rax, QWORD PTR -40[rbp]
	add	rdx, rax
	movzx	eax, BYTE PTR -19[rbp]
	movzx	edx, BYTE PTR [rdx]
	cdqe
	mov	BYTE PTR -16[rbp+rax], dl
	movzx	edx, BYTE PTR -19[rbp]
	movzx	eax, BYTE PTR -18[rbp]
	sal	eax, 2
	add	eax, edx
	movsx	rdx, eax
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	and	eax, -128
	mov	BYTE PTR -17[rbp], al
	movzx	edx, BYTE PTR -19[rbp]
	movzx	eax, BYTE PTR -18[rbp]
	sal	eax, 2
	add	eax, edx
	movsx	rdx, eax
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rdx
	movzx	edx, BYTE PTR [rax]
	movzx	eax, BYTE PTR -19[rbp]
	add	edx, edx
	cdqe
	mov	BYTE PTR -12[rbp+rax], dl
	cmp	BYTE PTR -17[rbp], -128
	jne	.L16
	movzx	eax, BYTE PTR -19[rbp]
	cdqe
	movzx	edx, BYTE PTR -12[rbp+rax]
	movzx	eax, BYTE PTR -19[rbp]
	xor	edx, 27
	cdqe
	mov	BYTE PTR -12[rbp+rax], dl
.L16:
	movzx	eax, BYTE PTR -19[rbp]
	add	eax, 1
	mov	BYTE PTR -19[rbp], al
.L15:
	cmp	BYTE PTR -19[rbp], 3
	jbe	.L17
	movzx	edx, BYTE PTR -12[rbp]
	movzx	eax, BYTE PTR -13[rbp]
	xor	edx, eax
	movzx	eax, BYTE PTR -14[rbp]
	xor	edx, eax
	movzx	eax, BYTE PTR -11[rbp]
	mov	esi, edx
	xor	esi, eax
	movzx	edx, BYTE PTR -15[rbp]
	movzx	eax, BYTE PTR -18[rbp]
	sal	eax, 2
	movsx	rcx, eax
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rcx
	xor	edx, esi
	mov	BYTE PTR [rax], dl
	movzx	edx, BYTE PTR -11[rbp]
	movzx	eax, BYTE PTR -16[rbp]
	xor	edx, eax
	movzx	eax, BYTE PTR -13[rbp]
	xor	edx, eax
	movzx	eax, BYTE PTR -10[rbp]
	mov	esi, edx
	xor	esi, eax
	movzx	edx, BYTE PTR -14[rbp]
	movzx	eax, BYTE PTR -18[rbp]
	sal	eax, 2
	add	eax, 1
	movsx	rcx, eax
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rcx
	xor	edx, esi
	mov	BYTE PTR [rax], dl
	movzx	edx, BYTE PTR -10[rbp]
	movzx	eax, BYTE PTR -15[rbp]
	xor	edx, eax
	movzx	eax, BYTE PTR -16[rbp]
	xor	edx, eax
	movzx	eax, BYTE PTR -9[rbp]
	mov	esi, edx
	xor	esi, eax
	movzx	edx, BYTE PTR -13[rbp]
	movzx	eax, BYTE PTR -18[rbp]
	sal	eax, 2
	add	eax, 2
	movsx	rcx, eax
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rcx
	xor	edx, esi
	mov	BYTE PTR [rax], dl
	movzx	edx, BYTE PTR -9[rbp]
	movzx	eax, BYTE PTR -14[rbp]
	xor	edx, eax
	movzx	eax, BYTE PTR -15[rbp]
	xor	edx, eax
	movzx	eax, BYTE PTR -12[rbp]
	mov	esi, edx
	xor	esi, eax
	movzx	edx, BYTE PTR -16[rbp]
	movzx	eax, BYTE PTR -18[rbp]
	sal	eax, 2
	add	eax, 3
	movsx	rcx, eax
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rcx
	xor	edx, esi
	mov	BYTE PTR [rax], dl
	movzx	eax, BYTE PTR -18[rbp]
	add	eax, 1
	mov	BYTE PTR -18[rbp], al
.L14:
	cmp	BYTE PTR -18[rbp], 3
	jbe	.L18
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	mix_columns, .-mix_columns
	.type	rotate32, @function
rotate32:
.LFB10:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	ror	DWORD PTR -4[rbp], 8
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	rotate32, .-rotate32
	.type	sbox, @function
sbox:
.LFB11:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, esi
	mov	BYTE PTR -8[rbp], al
	mov	eax, DWORD PTR -4[rbp]
	movzx	eax, al
	mov	edx, eax
	lea	rax, SBOX[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	eax, DWORD PTR -4[rbp]
	shr	eax, 8
	movzx	eax, al
	mov	ecx, eax
	lea	rax, SBOX[rip]
	movzx	eax, BYTE PTR [rcx+rax]
	movzx	eax, al
	sal	eax, 8
	mov	ecx, edx
	or	ecx, eax
	mov	eax, DWORD PTR -4[rbp]
	shr	eax, 16
	movzx	eax, al
	mov	edx, eax
	lea	rax, SBOX[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	eax, al
	sal	eax, 16
	or	ecx, eax
	mov	eax, DWORD PTR -4[rbp]
	shr	eax, 24
	mov	edx, eax
	lea	rax, SBOX[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	eax, al
	sal	eax, 24
	or	eax, ecx
	mov	DWORD PTR -4[rbp], eax
	movzx	eax, BYTE PTR -8[rbp]
	xor	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	sbox, .-sbox
	.type	aes2r_encrypt, @function
aes2r_encrypt:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 96
	mov	QWORD PTR -88[rbp], rdi
	mov	QWORD PTR -96[rbp], rsi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	rax, QWORD PTR -96[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -64[rbp], eax
	mov	rax, QWORD PTR -96[rbp]
	mov	eax, DWORD PTR 4[rax]
	mov	DWORD PTR -60[rbp], eax
	mov	rax, QWORD PTR -96[rbp]
	mov	eax, DWORD PTR 8[rax]
	mov	DWORD PTR -56[rbp], eax
	mov	rax, QWORD PTR -96[rbp]
	mov	eax, DWORD PTR 12[rax]
	mov	DWORD PTR -52[rbp], eax
	mov	eax, DWORD PTR -52[rbp]
	mov	DWORD PTR -68[rbp], eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edi, eax
	call	rotate32
	mov	DWORD PTR -68[rbp], eax
	mov	eax, DWORD PTR -68[rbp]
	mov	esi, 1
	mov	edi, eax
	call	sbox
	mov	DWORD PTR -68[rbp], eax
	mov	eax, DWORD PTR -64[rbp]
	xor	eax, DWORD PTR -68[rbp]
	mov	DWORD PTR -48[rbp], eax
	mov	eax, DWORD PTR -48[rbp]
	mov	DWORD PTR -68[rbp], eax
	mov	eax, DWORD PTR -60[rbp]
	xor	eax, DWORD PTR -68[rbp]
	mov	DWORD PTR -44[rbp], eax
	mov	eax, DWORD PTR -44[rbp]
	mov	DWORD PTR -68[rbp], eax
	mov	eax, DWORD PTR -56[rbp]
	xor	eax, DWORD PTR -68[rbp]
	mov	DWORD PTR -40[rbp], eax
	mov	eax, DWORD PTR -40[rbp]
	mov	DWORD PTR -68[rbp], eax
	mov	eax, DWORD PTR -52[rbp]
	xor	eax, DWORD PTR -68[rbp]
	mov	DWORD PTR -36[rbp], eax
	mov	eax, DWORD PTR -36[rbp]
	mov	DWORD PTR -68[rbp], eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edi, eax
	call	rotate32
	mov	DWORD PTR -68[rbp], eax
	mov	eax, DWORD PTR -68[rbp]
	mov	esi, 2
	mov	edi, eax
	call	sbox
	mov	DWORD PTR -68[rbp], eax
	mov	eax, DWORD PTR -48[rbp]
	xor	eax, DWORD PTR -68[rbp]
	mov	DWORD PTR -32[rbp], eax
	mov	eax, DWORD PTR -32[rbp]
	mov	DWORD PTR -68[rbp], eax
	mov	eax, DWORD PTR -44[rbp]
	xor	eax, DWORD PTR -68[rbp]
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	DWORD PTR -68[rbp], eax
	mov	eax, DWORD PTR -40[rbp]
	xor	eax, DWORD PTR -68[rbp]
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -68[rbp], eax
	mov	eax, DWORD PTR -36[rbp]
	xor	eax, DWORD PTR -68[rbp]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	mov	DWORD PTR -68[rbp], eax
	lea	rdx, -64[rbp]
	mov	rax, QWORD PTR -88[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	add_round_key
	mov	rax, QWORD PTR -88[rbp]
	mov	rdi, rax
	call	sub_bytes
	mov	rax, QWORD PTR -88[rbp]
	mov	rdi, rax
	call	shift_rows
	mov	rax, QWORD PTR -88[rbp]
	mov	rdi, rax
	call	mix_columns
	lea	rax, -64[rbp]
	lea	rdx, 16[rax]
	mov	rax, QWORD PTR -88[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	add_round_key
	mov	rax, QWORD PTR -88[rbp]
	mov	rdi, rax
	call	sub_bytes
	mov	rax, QWORD PTR -88[rbp]
	mov	rdi, rax
	call	shift_rows
	lea	rax, -64[rbp]
	lea	rdx, 32[rax]
	mov	rax, QWORD PTR -88[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	add_round_key
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	aes2r_encrypt, .-aes2r_encrypt
	.globl	rf_table
	.section	.rodata
	.align 32
	.type	rf_table, @object
	.size	rf_table, 518
rf_table:
	.string	"\216\301\250\0048x|T)#\033x\237\371'T\021x\225\266\257xE\026+\236\221\350\227%\370c\202V\317Ho\202\024\ra\276G\3217\3560\251(\036K\277\007\315A\337#!\022\270\201\231\035\346h\317\372-\216\271\210\247\025\316\236/\353\033\017g hl\251]\301|v\337\275\230a\264\024e@\036rQt\223\323\255\276F\n%\373j^\036\212Z\003<\253\022\302\324\007\221\253\311\337\222,\205j\246%\036fP&N\250\275\332\210\033\225\324"
	.ascii	"\353\r\034\233<\206\307\262\337\264Z6\025\216\004\322Ty\322>"
	.ascii	"=\231P\246\022L2\310Q\024MK\016\273\027\200\217\244\304\231r"
	.ascii	"\327\024K\357\355\024\351\027\372\233]7\326/\357\002\326q\n\275"
	.ascii	"\305@\021\220\220N"
	.string	"\264LrQz\330\2720M\214\342\021\273mK\274o\024\f\237\372^f@E\313}\033:\305^\234\036\314\275\026;\317\373*\322\b*\370=F\223\220\263f\2014\177m\233\214\231\003\305'\243\331\316\220\210\017U\303\241`S\310\r%\256a\331rH\035la\322\207\335=#\365\336\2239LC\232\3717\362a\327\370\352e\360\361\336?\005W\203\201\336\002bI\3242~J\324\237@~\271\221\2615\367b?e\236M+\020\336\324wd\017\204\255\222\347\243\212\020\301\024\353W\304\255\216\302\3072\243~P\037|\273._\365\030\"\352\354\235\244w\315\205\004/ ar\247\f\222\006M\001p\2335\241'2n\271x\340\252_\221\246Q\343c\370\227/`\331\373\025\345Y\3171<a\307\265a*k\335\321\tp\300\317\224z\3141\224\261\242\366\225\3008=\357\0310p\335b2\217|0\271\030\370\347\217\n\252\266"
	.string	"\206\362\3400_\242\350"
	.ascii	"\216\005\240\"\030\237\203\324:\205\020\271Q\215\007\360\263"
	.ascii	"\315\233U\241\024\316\017\262\317\270\316-\346\35052\037\"\265"
	.ascii	"\354\320\271r\250\264\227"
	.globl	rf256_iv
	.align 32
	.type	rf256_iv, @object
	.size	rf256_iv, 32
rf256_iv:
	.ascii	"x\351\220\323\263\310\233{\n\304\206nN8\263k3h|\355s5K\n\227"
	.ascii	"%Lwz\252a\033"
	.globl	rf_crc32_table
	.align 32
	.type	rf_crc32_table, @object
	.size	rf_crc32_table, 1024
rf_crc32_table:
	.long	0
	.long	1996959894
	.long	-301047508
	.long	-1727442502
	.long	124634137
	.long	1886057615
	.long	-379345611
	.long	-1637575261
	.long	249268274
	.long	2044508324
	.long	-522852066
	.long	-1747789432
	.long	162941995
	.long	2125561021
	.long	-407360249
	.long	-1866523247
	.long	498536548
	.long	1789927666
	.long	-205950648
	.long	-2067906082
	.long	450548861
	.long	1843258603
	.long	-187386543
	.long	-2083289657
	.long	325883990
	.long	1684777152
	.long	-43845254
	.long	-1973040660
	.long	335633487
	.long	1661365465
	.long	-99664541
	.long	-1928851979
	.long	997073096
	.long	1281953886
	.long	-715111964
	.long	-1570279054
	.long	1006888145
	.long	1258607687
	.long	-770865667
	.long	-1526024853
	.long	901097722
	.long	1119000684
	.long	-608450090
	.long	-1396901568
	.long	853044451
	.long	1172266101
	.long	-589951537
	.long	-1412350631
	.long	651767980
	.long	1373503546
	.long	-925412992
	.long	-1076862698
	.long	565507253
	.long	1454621731
	.long	-809855591
	.long	-1195530993
	.long	671266974
	.long	1594198024
	.long	-972236366
	.long	-1324619484
	.long	795835527
	.long	1483230225
	.long	-1050600021
	.long	-1234817731
	.long	1994146192
	.long	31158534
	.long	-1731059524
	.long	-271249366
	.long	1907459465
	.long	112637215
	.long	-1614814043
	.long	-390540237
	.long	2013776290
	.long	251722036
	.long	-1777751922
	.long	-519137256
	.long	2137656763
	.long	141376813
	.long	-1855689577
	.long	-429695999
	.long	1802195444
	.long	476864866
	.long	-2056965928
	.long	-228458418
	.long	1812370925
	.long	453092731
	.long	-2113342271
	.long	-183516073
	.long	1706088902
	.long	314042704
	.long	-1950435094
	.long	-54949764
	.long	1658658271
	.long	366619977
	.long	-1932296973
	.long	-69972891
	.long	1303535960
	.long	984961486
	.long	-1547960204
	.long	-725929758
	.long	1256170817
	.long	1037604311
	.long	-1529756563
	.long	-740887301
	.long	1131014506
	.long	879679996
	.long	-1385723834
	.long	-631195440
	.long	1141124467
	.long	855842277
	.long	-1442165665
	.long	-586318647
	.long	1342533948
	.long	654459306
	.long	-1106571248
	.long	-921952122
	.long	1466479909
	.long	544179635
	.long	-1184443383
	.long	-832445281
	.long	1591671054
	.long	702138776
	.long	-1328506846
	.long	-942167884
	.long	1504918807
	.long	783551873
	.long	-1212326853
	.long	-1061524307
	.long	-306674912
	.long	-1698712650
	.long	62317068
	.long	1957810842
	.long	-355121351
	.long	-1647151185
	.long	81470997
	.long	1943803523
	.long	-480048366
	.long	-1805370492
	.long	225274430
	.long	2053790376
	.long	-468791541
	.long	-1828061283
	.long	167816743
	.long	2097651377
	.long	-267414716
	.long	-2029476910
	.long	503444072
	.long	1762050814
	.long	-144550051
	.long	-2140837941
	.long	426522225
	.long	1852507879
	.long	-19653770
	.long	-1982649376
	.long	282753626
	.long	1742555852
	.long	-105259153
	.long	-1900089351
	.long	397917763
	.long	1622183637
	.long	-690576408
	.long	-1580100738
	.long	953729732
	.long	1340076626
	.long	-776247311
	.long	-1497606297
	.long	1068828381
	.long	1219638859
	.long	-670225446
	.long	-1358292148
	.long	906185462
	.long	1090812512
	.long	-547295293
	.long	-1469587627
	.long	829329135
	.long	1181335161
	.long	-882789492
	.long	-1134132454
	.long	628085408
	.long	1382605366
	.long	-871598187
	.long	-1156888829
	.long	570562233
	.long	1426400815
	.long	-977650754
	.long	-1296233688
	.long	733239954
	.long	1555261956
	.long	-1026031705
	.long	-1244606671
	.long	752459403
	.long	1541320221
	.long	-1687895376
	.long	-328994266
	.long	1969922972
	.long	40735498
	.long	-1677130071
	.long	-351390145
	.long	1913087877
	.long	83908371
	.long	-1782625662
	.long	-491226604
	.long	2075208622
	.long	213261112
	.long	-1831694693
	.long	-438977011
	.long	2094854071
	.long	198958881
	.long	-2032938284
	.long	-237706686
	.long	1759359992
	.long	534414190
	.long	-2118248755
	.long	-155638181
	.long	1873836001
	.long	414664567
	.long	-2012718362
	.long	-15766928
	.long	1711684554
	.long	285281116
	.long	-1889165569
	.long	-127750551
	.long	1634467795
	.long	376229701
	.long	-1609899400
	.long	-686959890
	.long	1308918612
	.long	956543938
	.long	-1486412191
	.long	-799009033
	.long	1231636301
	.long	1047427035
	.long	-1362007478
	.long	-640263460
	.long	1088359270
	.long	936918000
	.long	-1447252397
	.long	-558129467
	.long	1202900863
	.long	817233897
	.long	-1111625188
	.long	-893730166
	.long	1404277552
	.long	615818150
	.long	-1160759803
	.long	-841546093
	.long	1423857449
	.long	601450431
	.long	-1285129682
	.long	-1000256840
	.long	1567103746
	.long	711928724
	.long	-1274298825
	.long	-1022587231
	.long	1510334235
	.long	755167117
	.text
	.type	rf_crc32_32, @function
rf_crc32_32:
.LFB13:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -8[rbp]
	xor	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	movzx	eax, al
	mov	eax, eax
	lea	rdx, 0[0+rax*4]
	lea	rax, rf_crc32_table[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -4[rbp]
	shr	eax, 8
	xor	eax, edx
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	movzx	eax, al
	mov	eax, eax
	lea	rdx, 0[0+rax*4]
	lea	rax, rf_crc32_table[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -4[rbp]
	shr	eax, 8
	xor	eax, edx
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	movzx	eax, al
	mov	eax, eax
	lea	rdx, 0[0+rax*4]
	lea	rax, rf_crc32_table[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -4[rbp]
	shr	eax, 8
	xor	eax, edx
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	movzx	eax, al
	mov	eax, eax
	lea	rdx, 0[0+rax*4]
	lea	rax, rf_crc32_table[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -4[rbp]
	shr	eax, 8
	xor	eax, edx
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	rf_crc32_32, .-rf_crc32_32
	.type	rf_add64_crc32, @function
rf_add64_crc32:
.LFB14:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	QWORD PTR -8[rbp], 0
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, eax
	xor	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	movzx	eax, al
	lea	rdx, 0[0+rax*4]
	lea	rax, rf_crc32_table[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	edx, eax
	mov	rax, QWORD PTR -8[rbp]
	shr	rax, 8
	xor	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	movzx	eax, al
	lea	rdx, 0[0+rax*4]
	lea	rax, rf_crc32_table[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	edx, eax
	mov	rax, QWORD PTR -8[rbp]
	shr	rax, 8
	xor	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	movzx	eax, al
	lea	rdx, 0[0+rax*4]
	lea	rax, rf_crc32_table[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	edx, eax
	mov	rax, QWORD PTR -8[rbp]
	shr	rax, 8
	xor	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	movzx	eax, al
	lea	rdx, 0[0+rax*4]
	lea	rax, rf_crc32_table[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	edx, eax
	mov	rax, QWORD PTR -8[rbp]
	shr	rax, 8
	xor	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	shr	rax, 32
	xor	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	movzx	eax, al
	lea	rdx, 0[0+rax*4]
	lea	rax, rf_crc32_table[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	edx, eax
	mov	rax, QWORD PTR -8[rbp]
	shr	rax, 8
	xor	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	movzx	eax, al
	lea	rdx, 0[0+rax*4]
	lea	rax, rf_crc32_table[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	edx, eax
	mov	rax, QWORD PTR -8[rbp]
	shr	rax, 8
	xor	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	movzx	eax, al
	lea	rdx, 0[0+rax*4]
	lea	rax, rf_crc32_table[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	edx, eax
	mov	rax, QWORD PTR -8[rbp]
	shr	rax, 8
	xor	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	movzx	eax, al
	lea	rdx, 0[0+rax*4]
	lea	rax, rf_crc32_table[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	edx, eax
	mov	rax, QWORD PTR -8[rbp]
	shr	rax, 8
	xor	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rdx, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rdx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	rf_add64_crc32, .-rf_add64_crc32
	.type	rf_crc32x4, @function
rf_crc32x4:
.LFB15:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 16
	.cfi_offset 3, -24
	mov	QWORD PTR -16[rbp], rdi
	mov	DWORD PTR -20[rbp], esi
	mov	rax, QWORD PTR -16[rbp]
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	call	rf_crc32_32
	mov	rdx, QWORD PTR -16[rbp]
	mov	DWORD PTR [rdx], eax
	mov	rax, QWORD PTR -16[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -20[rbp], eax
	mov	rax, QWORD PTR -16[rbp]
	add	rax, 4
	mov	edx, DWORD PTR [rax]
	mov	rax, QWORD PTR -16[rbp]
	lea	rbx, 4[rax]
	mov	eax, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	call	rf_crc32_32
	mov	DWORD PTR [rbx], eax
	mov	eax, DWORD PTR [rbx]
	mov	DWORD PTR -20[rbp], eax
	mov	rax, QWORD PTR -16[rbp]
	add	rax, 8
	mov	edx, DWORD PTR [rax]
	mov	rax, QWORD PTR -16[rbp]
	lea	rbx, 8[rax]
	mov	eax, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	call	rf_crc32_32
	mov	DWORD PTR [rbx], eax
	mov	eax, DWORD PTR [rbx]
	mov	DWORD PTR -20[rbp], eax
	mov	rax, QWORD PTR -16[rbp]
	add	rax, 12
	mov	edx, DWORD PTR [rax]
	mov	rax, QWORD PTR -16[rbp]
	lea	rbx, 12[rax]
	mov	eax, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	call	rf_crc32_32
	mov	DWORD PTR [rbx], eax
	mov	eax, DWORD PTR [rbx]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	rf_crc32x4, .-rf_crc32x4
	.type	rf_memr64, @function
rf_memr64:
.LFB16:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR [rax]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE16:
	.size	rf_memr64, .-rf_memr64
	.type	rf_wltable, @function
rf_wltable:
.LFB17:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 8
	mov	eax, edi
	mov	BYTE PTR -4[rbp], al
	movzx	eax, BYTE PTR -4[rbp]
	cdqe
	lea	rdx, rf_table[rip]
	add	rax, rdx
	mov	rdi, rax
	call	rf_memr64
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE17:
	.size	rf_wltable, .-rf_wltable
	.type	rf_whtable, @function
rf_whtable:
.LFB18:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 8
	mov	eax, edi
	mov	BYTE PTR -4[rbp], al
	movzx	eax, BYTE PTR -4[rbp]
	add	eax, eax
	cdqe
	lea	rdx, rf_table[rip]
	add	rax, rdx
	mov	rdi, rax
	call	rf_memr64
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE18:
	.size	rf_whtable, .-rf_whtable
	.type	rf_rotl64, @function
rf_rotl64:
.LFB19:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -12[rbp], al
	and	BYTE PTR -12[rbp], 63
	movzx	eax, BYTE PTR -12[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	ecx, eax
	rol	rdx, cl
	mov	rax, rdx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE19:
	.size	rf_rotl64, .-rf_rotl64
	.type	rf_rotr64, @function
rf_rotr64:
.LFB20:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -12[rbp], al
	and	BYTE PTR -12[rbp], 63
	movzx	eax, BYTE PTR -12[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	ecx, eax
	ror	rdx, cl
	mov	rax, rdx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE20:
	.size	rf_rotr64, .-rf_rotr64
	.type	rf_bswap64, @function
rf_bswap64:
.LFB21:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
#APP
# 511 "the_stack_data/742668.c" 1
	bswap rax
# 0 "" 2
#NO_APP
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE21:
	.size	rf_bswap64, .-rf_bswap64
	.type	rf_rambox, @function
rf_rambox:
.LFB22:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	QWORD PTR -32[rbp], rsi
	mov	DWORD PTR -12[rbp], 0
	jmp	.L45
.L47:
	mov	rax, QWORD PTR -32[rbp]
	mov	rdi, rax
	call	rf_add64_crc32
	mov	QWORD PTR -32[rbp], rax
	mov	rax, QWORD PTR -32[rbp]
	and	eax, 2047
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -32[rbp]
	shr	rax, 11
	movzx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR [rax]
	mov	esi, edx
	mov	rdi, rax
	call	rf_rotr64
	add	QWORD PTR -32[rbp], rax
	mov	rax, QWORD PTR -32[rbp]
	shr	rax, 56
	cmp	rax, 127
	ja	.L46
	mov	rax, QWORD PTR -8[rbp]
	mov	rdx, QWORD PTR -32[rbp]
	mov	QWORD PTR [rax], rdx
.L46:
	add	DWORD PTR -12[rbp], 1
.L45:
	cmp	DWORD PTR -12[rbp], 3
	jle	.L47
	mov	rax, QWORD PTR -32[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE22:
	.size	rf_rambox, .-rf_rambox
	.type	rf_w128, @function
rf_w128:
.LFB23:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	QWORD PTR -24[rbp], rdx
	mov	QWORD PTR -32[rbp], rcx
	mov	rax, QWORD PTR -16[rbp]
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -8[rbp]
	add	rdx, rax
	mov	rax, QWORD PTR -24[rbp]
	mov	QWORD PTR [rdx], rax
	mov	rax, QWORD PTR -16[rbp]
	add	rax, 1
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -8[rbp]
	add	rdx, rax
	mov	rax, QWORD PTR -32[rbp]
	mov	QWORD PTR [rdx], rax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE23:
	.size	rf_w128, .-rf_w128
	.type	rf_raminit, @function
rf_raminit:
.LFB24:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 40
	mov	QWORD PTR -40[rbp], rdi
	movabs	rax, 81985529216486895
	mov	QWORD PTR -24[rbp], rax
	movabs	rax, -81985529216486896
	mov	QWORD PTR -16[rbp], rax
	mov	DWORD PTR -28[rbp], 0
	jmp	.L51
.L52:
	mov	rax, QWORD PTR -24[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	movzx	edx, al
	mov	rax, QWORD PTR -16[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	rf_rotr64
	add	rax, 273
	mov	QWORD PTR -24[rbp], rax
	mov	eax, DWORD PTR -28[rbp]
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -40[rbp]
	lea	rdi, [rdx+rax]
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -24[rbp]
	mov	rcx, rdx
	mov	rdx, rax
	mov	esi, 0
	call	rf_w128
	mov	rax, QWORD PTR -16[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	movzx	edx, al
	mov	rax, QWORD PTR -24[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	rf_rotr64
	add	rax, 546
	mov	QWORD PTR -16[rbp], rax
	mov	eax, DWORD PTR -28[rbp]
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -40[rbp]
	lea	rdi, [rdx+rax]
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	mov	rcx, rdx
	mov	rdx, rax
	mov	esi, 2
	call	rf_w128
	mov	rax, QWORD PTR -24[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	movzx	edx, al
	mov	rax, QWORD PTR -16[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	rf_rotr64
	add	rax, 819
	mov	QWORD PTR -24[rbp], rax
	mov	eax, DWORD PTR -28[rbp]
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -40[rbp]
	lea	rdi, [rdx+rax]
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -24[rbp]
	mov	rcx, rdx
	mov	rdx, rax
	mov	esi, 4
	call	rf_w128
	mov	rax, QWORD PTR -16[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	movzx	edx, al
	mov	rax, QWORD PTR -24[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	rf_rotr64
	add	rax, 1092
	mov	QWORD PTR -16[rbp], rax
	mov	eax, DWORD PTR -28[rbp]
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -40[rbp]
	lea	rdi, [rdx+rax]
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	mov	rcx, rdx
	mov	rdx, rax
	mov	esi, 6
	call	rf_w128
	mov	rax, QWORD PTR -24[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	movzx	edx, al
	mov	rax, QWORD PTR -16[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	rf_rotr64
	add	rax, 1365
	mov	QWORD PTR -24[rbp], rax
	mov	eax, DWORD PTR -28[rbp]
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -40[rbp]
	lea	rdi, [rdx+rax]
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -24[rbp]
	mov	rcx, rdx
	mov	rdx, rax
	mov	esi, 8
	call	rf_w128
	mov	rax, QWORD PTR -16[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	movzx	edx, al
	mov	rax, QWORD PTR -24[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	rf_rotr64
	add	rax, 1638
	mov	QWORD PTR -16[rbp], rax
	mov	eax, DWORD PTR -28[rbp]
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -40[rbp]
	lea	rdi, [rdx+rax]
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	mov	rcx, rdx
	mov	rdx, rax
	mov	esi, 10
	call	rf_w128
	mov	rax, QWORD PTR -24[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	movzx	edx, al
	mov	rax, QWORD PTR -16[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	rf_rotr64
	add	rax, 1911
	mov	QWORD PTR -24[rbp], rax
	mov	eax, DWORD PTR -28[rbp]
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -40[rbp]
	lea	rdi, [rdx+rax]
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -24[rbp]
	mov	rcx, rdx
	mov	rdx, rax
	mov	esi, 12
	call	rf_w128
	mov	rax, QWORD PTR -16[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	movzx	edx, al
	mov	rax, QWORD PTR -24[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	rf_rotr64
	add	rax, 2184
	mov	QWORD PTR -16[rbp], rax
	mov	eax, DWORD PTR -28[rbp]
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -40[rbp]
	lea	rdi, [rdx+rax]
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	mov	rcx, rdx
	mov	rdx, rax
	mov	esi, 14
	call	rf_w128
	add	DWORD PTR -28[rbp], 16
.L51:
	cmp	DWORD PTR -28[rbp], 2047
	jbe	.L52
	nop
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE24:
	.size	rf_raminit, .-rf_raminit
	.type	rf256_divbox, @function
rf256_divbox:
.LFB25:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 80
	mov	QWORD PTR -72[rbp], rdi
	mov	QWORD PTR -80[rbp], rsi
	mov	rax, QWORD PTR -72[rbp]
	mov	rax, QWORD PTR [rax]
	not	rax
	mov	QWORD PTR -64[rbp], rax
	mov	rax, QWORD PTR -80[rbp]
	mov	rax, QWORD PTR [rax]
	not	rax
	mov	QWORD PTR -48[rbp], rax
	mov	rax, QWORD PTR -72[rbp]
	mov	rax, QWORD PTR [rax]
	mov	rdi, rax
	call	rf_bswap64
	mov	QWORD PTR -56[rbp], rax
	mov	rax, QWORD PTR -80[rbp]
	mov	rax, QWORD PTR [rax]
	mov	rdi, rax
	call	rf_bswap64
	mov	QWORD PTR -40[rbp], rax
	cmp	QWORD PTR -64[rbp], 0
	je	.L54
	cmp	QWORD PTR -56[rbp], 0
	jne	.L55
.L54:
	mov	QWORD PTR -56[rbp], 0
	mov	rax, QWORD PTR -56[rbp]
	mov	QWORD PTR -64[rbp], rax
	jmp	.L56
.L55:
	mov	rax, QWORD PTR -64[rbp]
	cmp	rax, QWORD PTR -56[rbp]
	jbe	.L57
	mov	rax, QWORD PTR -64[rbp]
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	mov	edx, 0
	div	QWORD PTR -56[rbp]
	mov	QWORD PTR -64[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	mov	edx, 0
	div	QWORD PTR -56[rbp]
	mov	QWORD PTR -56[rbp], rdx
	jmp	.L56
.L57:
	mov	rax, QWORD PTR -64[rbp]
	mov	QWORD PTR -32[rbp], rax
	mov	rax, QWORD PTR -56[rbp]
	mov	edx, 0
	div	QWORD PTR -32[rbp]
	mov	QWORD PTR -64[rbp], rax
	mov	rax, QWORD PTR -56[rbp]
	mov	edx, 0
	div	QWORD PTR -32[rbp]
	mov	QWORD PTR -56[rbp], rdx
.L56:
	cmp	QWORD PTR -48[rbp], 0
	je	.L58
	cmp	QWORD PTR -40[rbp], 0
	jne	.L59
.L58:
	mov	QWORD PTR -40[rbp], 0
	mov	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -48[rbp], rax
	jmp	.L60
.L59:
	mov	rax, QWORD PTR -48[rbp]
	cmp	rax, QWORD PTR -40[rbp]
	jbe	.L61
	mov	rax, QWORD PTR -48[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	mov	edx, 0
	div	QWORD PTR -40[rbp]
	mov	QWORD PTR -48[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	mov	edx, 0
	div	QWORD PTR -40[rbp]
	mov	QWORD PTR -40[rbp], rdx
	jmp	.L60
.L61:
	mov	rax, QWORD PTR -48[rbp]
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	mov	edx, 0
	div	QWORD PTR -16[rbp]
	mov	QWORD PTR -48[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	mov	edx, 0
	div	QWORD PTR -16[rbp]
	mov	QWORD PTR -40[rbp], rdx
.L60:
	mov	rax, QWORD PTR -40[rbp]
	add	QWORD PTR -64[rbp], rax
	mov	rax, QWORD PTR -56[rbp]
	add	QWORD PTR -48[rbp], rax
	mov	rax, QWORD PTR -72[rbp]
	mov	rax, QWORD PTR [rax]
	sub	rax, QWORD PTR -64[rbp]
	mov	rdx, rax
	mov	rax, QWORD PTR -72[rbp]
	mov	QWORD PTR [rax], rdx
	mov	rax, QWORD PTR -80[rbp]
	mov	rax, QWORD PTR [rax]
	sub	rax, QWORD PTR -48[rbp]
	mov	rdx, rax
	mov	rax, QWORD PTR -80[rbp]
	mov	QWORD PTR [rax], rdx
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE25:
	.size	rf256_divbox, .-rf256_divbox
	.type	rf256_rotbox, @function
rf256_rotbox:
.LFB26:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 40
	mov	QWORD PTR -24[rbp], rdi
	mov	QWORD PTR -32[rbp], rsi
	mov	eax, ecx
	mov	BYTE PTR -36[rbp], dl
	mov	BYTE PTR -40[rbp], al
	mov	rax, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR [rax]
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -32[rbp]
	mov	rax, QWORD PTR [rax]
	mov	QWORD PTR -8[rbp], rax
	movzx	edx, BYTE PTR -36[rbp]
	mov	rax, QWORD PTR -16[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	rf_rotr64
	mov	QWORD PTR -16[rbp], rax
	movzx	edx, BYTE PTR -40[rbp]
	mov	rax, QWORD PTR -8[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	rf_rotl64
	mov	QWORD PTR -8[rbp], rax
	movzx	eax, BYTE PTR -36[rbp]
	mov	edi, eax
	call	rf_wltable
	add	QWORD PTR -16[rbp], rax
	movzx	eax, BYTE PTR -40[rbp]
	mov	edi, eax
	call	rf_whtable
	add	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	mov	BYTE PTR -36[rbp], al
	mov	rax, QWORD PTR -8[rbp]
	mov	BYTE PTR -40[rbp], al
	movzx	edx, BYTE PTR -40[rbp]
	mov	rax, QWORD PTR -16[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	rf_rotl64
	mov	QWORD PTR -16[rbp], rax
	movzx	edx, BYTE PTR -36[rbp]
	mov	rax, QWORD PTR -8[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	rf_rotr64
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	mov	BYTE PTR -36[rbp], al
	mov	rax, QWORD PTR -8[rbp]
	mov	BYTE PTR -40[rbp], al
	movzx	edx, BYTE PTR -40[rbp]
	mov	rax, QWORD PTR -16[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	rf_rotr64
	mov	QWORD PTR -16[rbp], rax
	movzx	edx, BYTE PTR -36[rbp]
	mov	rax, QWORD PTR -8[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	rf_rotl64
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, QWORD PTR -16[rbp]
	mov	QWORD PTR [rax], rdx
	mov	rax, QWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	QWORD PTR [rax], rdx
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE26:
	.size	rf256_rotbox, .-rf256_rotbox
	.type	rf256_scramble, @function
rf256_scramble:
.LFB27:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 8
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 16416[rax]
	mov	rdx, QWORD PTR -8[rbp]
	add	rdx, 16384
	mov	esi, eax
	mov	rdi, rdx
	call	rf_crc32x4
	mov	rdx, QWORD PTR -8[rbp]
	mov	DWORD PTR 16416[rdx], eax
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 16416[rax]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE27:
	.size	rf256_scramble, .-rf256_scramble
	.type	rf256_inject, @function
rf256_inject:
.LFB28:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 8
	.cfi_offset 3, -24
	mov	QWORD PTR -16[rbp], rdi
	mov	rax, QWORD PTR -16[rbp]
	mov	ebx, DWORD PTR 16420[rax]
	mov	rax, QWORD PTR -16[rbp]
	mov	rdi, rax
	call	rf256_scramble
	mov	esi, ebx
	mov	edi, eax
	call	rf_crc32_32
	mov	rdx, QWORD PTR -16[rbp]
	mov	DWORD PTR 16416[rdx], eax
	mov	rax, QWORD PTR -16[rbp]
	mov	DWORD PTR 16420[rax], 0
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE28:
	.size	rf256_inject, .-rf256_inject
	.type	rf256_rot32x256, @function
rf256_rot32x256:
.LFB29:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -12[rbp], eax
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 4[rax]
	mov	DWORD PTR -8[rbp], eax
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 8[rax]
	mov	DWORD PTR -4[rbp], eax
	mov	rax, QWORD PTR -24[rbp]
	mov	edx, DWORD PTR -12[rbp]
	mov	DWORD PTR 4[rax], edx
	mov	rax, QWORD PTR -24[rbp]
	mov	edx, DWORD PTR -8[rbp]
	mov	DWORD PTR 8[rax], edx
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 12[rax]
	mov	DWORD PTR -12[rbp], eax
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 16[rax]
	mov	DWORD PTR -8[rbp], eax
	mov	rax, QWORD PTR -24[rbp]
	mov	edx, DWORD PTR -4[rbp]
	mov	DWORD PTR 12[rax], edx
	mov	rax, QWORD PTR -24[rbp]
	mov	edx, DWORD PTR -12[rbp]
	mov	DWORD PTR 16[rax], edx
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 20[rax]
	mov	DWORD PTR -4[rbp], eax
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 24[rax]
	mov	DWORD PTR -12[rbp], eax
	mov	rax, QWORD PTR -24[rbp]
	mov	edx, DWORD PTR -8[rbp]
	mov	DWORD PTR 20[rax], edx
	mov	rax, QWORD PTR -24[rbp]
	mov	edx, DWORD PTR -4[rbp]
	mov	DWORD PTR 24[rax], edx
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 28[rax]
	mov	DWORD PTR -8[rbp], eax
	mov	rax, QWORD PTR -24[rbp]
	mov	edx, DWORD PTR -12[rbp]
	mov	DWORD PTR 28[rax], edx
	mov	rax, QWORD PTR -24[rbp]
	mov	edx, DWORD PTR -8[rbp]
	mov	DWORD PTR [rax], edx
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE29:
	.size	rf256_rot32x256, .-rf256_rot32x256
	.type	rf256_aesenc, @function
rf256_aesenc:
.LFB30:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 16384
	lea	rdx, 16[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 16384
	mov	rsi, rdx
	mov	rdi, rax
	call	aes2r_encrypt
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE30:
	.size	rf256_aesenc, .-rf256_aesenc
	.type	rf256_one_round, @function
rf256_one_round:
.LFB31:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 16384
	mov	rdi, rax
	call	rf256_rot32x256
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 16424[rax]
	mov	eax, eax
	sal	rax, 32
	mov	rdx, rax
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 16416[rax]
	mov	eax, eax
	add	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	rf256_scramble
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 16384
	lea	rdx, 8[rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 16384
	mov	rsi, rdx
	mov	rdi, rax
	call	rf256_divbox
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	rf256_scramble
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	rf_rambox
	mov	eax, eax
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	shr	rax, 56
	movzx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	movzx	eax, al
	mov	rcx, QWORD PTR -24[rbp]
	add	rcx, 16384
	lea	rsi, 8[rcx]
	mov	rcx, QWORD PTR -24[rbp]
	lea	rdi, 16384[rcx]
	mov	ecx, edx
	mov	edx, eax
	call	rf256_rotbox
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	rf256_scramble
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 16384
	lea	rdx, 8[rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 16384
	mov	rsi, rdx
	mov	rdi, rax
	call	rf256_divbox
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	rf256_scramble
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 16384
	lea	rdx, 8[rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 16384
	mov	rsi, rdx
	mov	rdi, rax
	call	rf256_divbox
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	rf256_scramble
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	rf_rambox
	mov	eax, eax
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	shr	rax, 48
	movzx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	shr	rax, 8
	movzx	eax, al
	mov	rcx, QWORD PTR -24[rbp]
	add	rcx, 16384
	lea	rsi, 8[rcx]
	mov	rcx, QWORD PTR -24[rbp]
	lea	rdi, 16384[rcx]
	mov	ecx, edx
	mov	edx, eax
	call	rf256_rotbox
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	rf256_scramble
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 16384
	lea	rdx, 8[rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 16384
	mov	rsi, rdx
	mov	rdi, rax
	call	rf256_divbox
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	rf256_scramble
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 16384
	lea	rdx, 8[rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 16384
	mov	rsi, rdx
	mov	rdi, rax
	call	rf256_divbox
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	rf256_scramble
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	rf_rambox
	mov	eax, eax
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	shr	rax, 40
	movzx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	shr	rax, 16
	movzx	eax, al
	mov	rcx, QWORD PTR -24[rbp]
	add	rcx, 16384
	lea	rsi, 8[rcx]
	mov	rcx, QWORD PTR -24[rbp]
	lea	rdi, 16384[rcx]
	mov	ecx, edx
	mov	edx, eax
	call	rf256_rotbox
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	rf256_scramble
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 16384
	lea	rdx, 8[rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 16384
	mov	rsi, rdx
	mov	rdi, rax
	call	rf256_divbox
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	rf256_scramble
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 16384
	lea	rdx, 8[rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 16384
	mov	rsi, rdx
	mov	rdi, rax
	call	rf256_divbox
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	rf256_scramble
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	rf_rambox
	mov	eax, eax
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	shr	rax, 32
	movzx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	shr	rax, 24
	movzx	eax, al
	mov	rcx, QWORD PTR -24[rbp]
	add	rcx, 16384
	lea	rsi, 8[rcx]
	mov	rcx, QWORD PTR -24[rbp]
	lea	rdi, 16384[rcx]
	mov	ecx, edx
	mov	edx, eax
	call	rf256_rotbox
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	rf256_scramble
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 16384
	lea	rdx, 8[rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 16384
	mov	rsi, rdx
	mov	rdi, rax
	call	rf256_divbox
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	rf256_inject
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	rf256_aesenc
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	rf256_scramble
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE31:
	.size	rf256_one_round, .-rf256_one_round
	.type	rf256_init, @function
rf256_init:
.LFB32:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 8
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	rf_raminit
	mov	rax, QWORD PTR -8[rbp]
	lea	rcx, 16384[rax]
	mov	rax, QWORD PTR rf256_iv[rip]
	mov	rdx, QWORD PTR rf256_iv[rip+8]
	mov	QWORD PTR [rcx], rax
	mov	QWORD PTR 8[rcx], rdx
	mov	rax, QWORD PTR rf256_iv[rip+16]
	mov	rdx, QWORD PTR rf256_iv[rip+24]
	mov	QWORD PTR 16[rcx], rax
	mov	QWORD PTR 24[rcx], rdx
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR 16416[rax], 20180213
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR 16424[rax], 0
	mov	rax, QWORD PTR -8[rbp]
	mov	edx, DWORD PTR 16424[rax]
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR 16420[rax], edx
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE32:
	.size	rf256_init, .-rf256_init
	.type	rf256_update, @function
rf256_update:
.LFB33:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	QWORD PTR -24[rbp], rdx
	jmp	.L71
.L73:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 16424[rax]
	and	eax, 3
	test	eax, eax
	jne	.L72
	cmp	QWORD PTR -24[rbp], 3
	jbe	.L72
	mov	rax, QWORD PTR -16[rbp]
	mov	edx, DWORD PTR [rax]
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR 16420[rax], edx
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 16424[rax]
	lea	edx, 4[rax]
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR 16424[rax], edx
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	rf256_one_round
	add	QWORD PTR -16[rbp], 4
	sub	QWORD PTR -24[rbp], 4
	jmp	.L71
.L72:
	mov	rax, QWORD PTR -16[rbp]
	lea	rdx, 1[rax]
	mov	QWORD PTR -16[rbp], rdx
	movzx	eax, BYTE PTR [rax]
	movzx	esi, al
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 16424[rax]
	lea	ecx, 1[rax]
	mov	rdx, QWORD PTR -8[rbp]
	mov	DWORD PTR 16424[rdx], ecx
	and	eax, 3
	sal	eax, 3
	mov	ecx, eax
	sal	esi, cl
	mov	edx, esi
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 16420[rax]
	or	edx, eax
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR 16420[rax], edx
	sub	QWORD PTR -24[rbp], 1
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 16424[rax]
	and	eax, 3
	test	eax, eax
	jne	.L71
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	rf256_one_round
.L71:
	cmp	QWORD PTR -24[rbp], 0
	jne	.L73
	nop
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE33:
	.size	rf256_update, .-rf256_update
	.type	rf256_final, @function
rf256_final:
.LFB34:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -16[rbp]
	mov	rdi, rax
	call	rf256_one_round
	mov	rax, QWORD PTR -16[rbp]
	mov	rdi, rax
	call	rf256_one_round
	mov	rax, QWORD PTR -16[rbp]
	mov	rdi, rax
	call	rf256_one_round
	mov	rax, QWORD PTR -16[rbp]
	mov	rdi, rax
	call	rf256_one_round
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 16384[rax]
	mov	rax, QWORD PTR -8[rbp]
	mov	edx, 32
	mov	rsi, rcx
	mov	rdi, rax
	call	memcpy@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE34:
	.size	rf256_final, .-rf256_final
	.globl	rf256_hash
	.type	rf256_hash, @function
rf256_hash:
.LFB35:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	lea	r11, -16384[rsp]
.LPSRL0:
	sub	rsp, 4096
	or	DWORD PTR [rsp], 0
	cmp	rsp, r11
	jne	.LPSRL0
	sub	rsp, 96
	mov	QWORD PTR -16456[rbp], rdi
	mov	QWORD PTR -16464[rbp], rsi
	mov	QWORD PTR -16472[rbp], rdx
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	lea	rax, -16448[rbp]
	mov	rdi, rax
	call	rf256_init
	mov	rdx, QWORD PTR -16472[rbp]
	mov	rcx, QWORD PTR -16464[rbp]
	lea	rax, -16448[rbp]
	mov	rsi, rcx
	mov	rdi, rax
	call	rf256_update
	lea	rdx, -16448[rbp]
	mov	rax, QWORD PTR -16456[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	rf256_final
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L76
	call	__stack_chk_fail@PLT
.L76:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE35:
	.size	rf256_hash, .-rf256_hash
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"742668.c"
	.text
	.data
	.align	2
	.type	SBOX, %object
	.size	SBOX, 256
SBOX:
	.ascii	"c|w{\362ko\3050\001g+\376\327\253v\312\202\311}\372"
	.ascii	"YG\360\255\324\242\257\234\244r\300\267\375\223&6?\367"
	.ascii	"\3144\245\345\361q\3301\025\004\307#\303\030\226\005"
	.ascii	"\232\007\022\200\342\353'\262u\011\203,\032\033nZ\240"
	.ascii	"R;\326\263)\343/\204S\321\000\355 \374\261[j\313\276"
	.ascii	"9JLX\317\320\357\252\373CM3\205E\371\002\177P<\237\250"
	.ascii	"Q\243@\217\222\2358\365\274\266\332!\020\377\363\322"
	.ascii	"\315\014\023\354_\227D\027\304\247~=d]\031s`\201O\334"
	.ascii	"\"*\220\210F\356\270\024\336^\013\333\3402:\012I\006"
	.ascii	"$\\\302\323\254b\221\225\344y\347\3107m\215\325N\251"
	.ascii	"lV\364\352ez\256\010\272x%.\034\246\264\306\350\335"
	.ascii	"t\037K\275\213\212p>\265fH\003\366\016a5W\271\206\301"
	.ascii	"\035\236\341\370\230\021i\331\216\224\233\036\207\351"
	.ascii	"\316U(\337\214\241\211\015\277\346BhA\231-\017\260T"
	.ascii	"\273\026"
	.align	2
	.type	shifts, %object
	.size	shifts, 16
shifts:
	.ascii	"\000\005\012\017\004\011\016\003\010\015\002\007\014"
	.ascii	"\001\006\013"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	add_round_key, %function
add_round_key:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	mov	r3, #0
	strb	r3, [fp, #-5]
	b	.L2
.L3:
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	ldr	r2, [fp, #-20]
	add	r3, r2, r3
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	ldr	r0, [fp, #-16]
	add	r3, r0, r3
	eor	r2, r2, r1
	and	r2, r2, #255
	strb	r2, [r3]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	add	r3, r3, #1
	strb	r3, [fp, #-5]
.L2:
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	cmp	r3, #15
	bls	.L3
	nop
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	add_round_key, .-add_round_key
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sub_bytes, %function
sub_bytes:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	mov	r3, #0
	strb	r3, [fp, #-5]
	b	.L5
.L6:
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r1, r3
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	ldr	r2, .L7
	ldrb	r2, [r2, r1]	@ zero_extendqisi2
	strb	r2, [r3]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	add	r3, r3, #1
	strb	r3, [fp, #-5]
.L5:
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	cmp	r3, #15
	bls	.L6
	nop
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L8:
	.align	2
.L7:
	.word	SBOX
	.size	sub_bytes, .-sub_bytes
	.section	.rodata
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	shift_rows, %function
shift_rows:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #32
	str	r0, [fp, #-32]
	ldr	r3, .L15
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	mov	r3, #0
	strb	r3, [fp, #-25]
	b	.L10
.L11:
	ldrb	r3, [fp, #-25]	@ zero_extendqisi2
	ldr	r2, .L15+4
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, [fp, #-32]
	add	r2, r3, r2
	ldrb	r3, [fp, #-25]	@ zero_extendqisi2
	ldrb	r2, [r2]	@ zero_extendqisi2
	sub	r1, fp, #4
	add	r3, r1, r3
	strb	r2, [r3, #-20]
	ldrb	r3, [fp, #-25]	@ zero_extendqisi2
	add	r3, r3, #1
	strb	r3, [fp, #-25]
.L10:
	ldrb	r3, [fp, #-25]	@ zero_extendqisi2
	cmp	r3, #15
	bls	.L11
	mov	r3, #0
	strb	r3, [fp, #-25]
	b	.L12
.L13:
	ldrb	r2, [fp, #-25]	@ zero_extendqisi2
	ldrb	r3, [fp, #-25]	@ zero_extendqisi2
	ldr	r1, [fp, #-32]
	add	r3, r1, r3
	sub	r1, fp, #4
	add	r2, r1, r2
	ldrb	r2, [r2, #-20]	@ zero_extendqisi2
	strb	r2, [r3]
	ldrb	r3, [fp, #-25]	@ zero_extendqisi2
	add	r3, r3, #1
	strb	r3, [fp, #-25]
.L12:
	ldrb	r3, [fp, #-25]	@ zero_extendqisi2
	cmp	r3, #15
	bls	.L13
	nop
	ldr	r3, .L15
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L14
	bl	__stack_chk_fail
.L14:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L16:
	.align	2
.L15:
	.word	.LC0
	.word	shifts
	.size	shift_rows, .-shift_rows
	.section	.rodata
	.align	2
.LC1:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	mix_columns, %function
mix_columns:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-24]
	ldr	r3, .L24
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	mov	r3, #0
	strb	r3, [fp, #-18]
	b	.L18
.L22:
	mov	r3, #0
	strb	r3, [fp, #-19]
	b	.L19
.L21:
	ldrb	r2, [fp, #-19]	@ zero_extendqisi2
	ldrb	r3, [fp, #-18]	@ zero_extendqisi2
	lsl	r3, r3, #2
	add	r3, r2, r3
	mov	r2, r3
	ldr	r3, [fp, #-24]
	add	r2, r3, r2
	ldrb	r3, [fp, #-19]	@ zero_extendqisi2
	ldrb	r2, [r2]	@ zero_extendqisi2
	sub	r1, fp, #4
	add	r3, r1, r3
	strb	r2, [r3, #-12]
	ldrb	r2, [fp, #-19]	@ zero_extendqisi2
	ldrb	r3, [fp, #-18]	@ zero_extendqisi2
	lsl	r3, r3, #2
	add	r3, r2, r3
	mov	r2, r3
	ldr	r3, [fp, #-24]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #127
	strb	r3, [fp, #-17]
	ldrb	r2, [fp, #-19]	@ zero_extendqisi2
	ldrb	r3, [fp, #-18]	@ zero_extendqisi2
	lsl	r3, r3, #2
	add	r3, r2, r3
	mov	r2, r3
	ldr	r3, [fp, #-24]
	add	r3, r3, r2
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldrb	r3, [fp, #-19]	@ zero_extendqisi2
	lsl	r2, r2, #1
	and	r2, r2, #255
	sub	r1, fp, #4
	add	r3, r1, r3
	strb	r2, [r3, #-8]
	ldrb	r3, [fp, #-17]	@ zero_extendqisi2
	cmp	r3, #128
	bne	.L20
	ldrb	r3, [fp, #-19]	@ zero_extendqisi2
	sub	r2, fp, #4
	add	r3, r2, r3
	ldrb	r2, [r3, #-8]	@ zero_extendqisi2
	ldrb	r3, [fp, #-19]	@ zero_extendqisi2
	eor	r2, r2, #27
	and	r2, r2, #255
	sub	r1, fp, #4
	add	r3, r1, r3
	strb	r2, [r3, #-8]
.L20:
	ldrb	r3, [fp, #-19]	@ zero_extendqisi2
	add	r3, r3, #1
	strb	r3, [fp, #-19]
.L19:
	ldrb	r3, [fp, #-19]	@ zero_extendqisi2
	cmp	r3, #3
	bls	.L21
	ldrb	r2, [fp, #-12]	@ zero_extendqisi2
	ldrb	r3, [fp, #-13]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r2, r3, #255
	ldrb	r3, [fp, #-14]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r2, r3, #255
	ldrb	r3, [fp, #-11]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r1, r3, #255
	ldrb	r2, [fp, #-15]	@ zero_extendqisi2
	ldrb	r3, [fp, #-18]	@ zero_extendqisi2
	lsl	r3, r3, #2
	mov	r0, r3
	ldr	r3, [fp, #-24]
	add	r3, r3, r0
	eor	r2, r2, r1
	and	r2, r2, #255
	strb	r2, [r3]
	ldrb	r2, [fp, #-11]	@ zero_extendqisi2
	ldrb	r3, [fp, #-16]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r2, r3, #255
	ldrb	r3, [fp, #-13]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r2, r3, #255
	ldrb	r3, [fp, #-10]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r1, r3, #255
	ldrb	r2, [fp, #-14]	@ zero_extendqisi2
	ldrb	r3, [fp, #-18]	@ zero_extendqisi2
	lsl	r3, r3, #2
	add	r3, r3, #1
	mov	r0, r3
	ldr	r3, [fp, #-24]
	add	r3, r3, r0
	eor	r2, r2, r1
	and	r2, r2, #255
	strb	r2, [r3]
	ldrb	r2, [fp, #-10]	@ zero_extendqisi2
	ldrb	r3, [fp, #-15]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r2, r3, #255
	ldrb	r3, [fp, #-16]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r2, r3, #255
	ldrb	r3, [fp, #-9]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r1, r3, #255
	ldrb	r2, [fp, #-13]	@ zero_extendqisi2
	ldrb	r3, [fp, #-18]	@ zero_extendqisi2
	lsl	r3, r3, #2
	add	r3, r3, #2
	mov	r0, r3
	ldr	r3, [fp, #-24]
	add	r3, r3, r0
	eor	r2, r2, r1
	and	r2, r2, #255
	strb	r2, [r3]
	ldrb	r2, [fp, #-9]	@ zero_extendqisi2
	ldrb	r3, [fp, #-14]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r2, r3, #255
	ldrb	r3, [fp, #-15]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r2, r3, #255
	ldrb	r3, [fp, #-12]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r1, r3, #255
	ldrb	r2, [fp, #-16]	@ zero_extendqisi2
	ldrb	r3, [fp, #-18]	@ zero_extendqisi2
	lsl	r3, r3, #2
	add	r3, r3, #3
	mov	r0, r3
	ldr	r3, [fp, #-24]
	add	r3, r3, r0
	eor	r2, r2, r1
	and	r2, r2, #255
	strb	r2, [r3]
	ldrb	r3, [fp, #-18]	@ zero_extendqisi2
	add	r3, r3, #1
	strb	r3, [fp, #-18]
.L18:
	ldrb	r3, [fp, #-18]	@ zero_extendqisi2
	cmp	r3, #3
	bls	.L22
	nop
	ldr	r3, .L24
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L23
	bl	__stack_chk_fail
.L23:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L25:
	.align	2
.L24:
	.word	.LC1
	.size	mix_columns, .-mix_columns
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rotate32, %function
rotate32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ror	r3, r3, #8
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	rotate32, .-rotate32
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sbox, %function
sbox:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	mov	r3, r1
	strb	r3, [fp, #-9]
	ldr	r3, [fp, #-8]
	and	r3, r3, #255
	ldr	r2, .L30
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r3, [fp, #-8]
	lsr	r3, r3, #8
	and	r3, r3, #255
	ldr	r2, .L30
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	lsl	r3, r3, #8
	orr	r2, r1, r3
	ldr	r3, [fp, #-8]
	lsr	r3, r3, #16
	and	r3, r3, #255
	ldr	r1, .L30
	ldrb	r3, [r1, r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	orr	r2, r2, r3
	ldr	r3, [fp, #-8]
	lsr	r3, r3, #24
	ldr	r1, .L30
	ldrb	r3, [r1, r3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	orr	r3, r2, r3
	str	r3, [fp, #-8]
	ldrb	r3, [fp, #-9]	@ zero_extendqisi2
	ldr	r2, [fp, #-8]
	eor	r3, r3, r2
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L31:
	.align	2
.L30:
	.word	SBOX
	.size	sbox, .-sbox
	.section	.rodata
	.align	2
.LC2:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	aes2r_encrypt, %function
aes2r_encrypt:
	@ args = 0, pretend = 0, frame = 80
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #84
	str	r0, [fp, #-88]
	str	r1, [fp, #-92]
	sub	r3, fp, #12
	sub	r3, r3, #64
	add	r3, r3, #15
	lsr	r3, r3, #4
	lsl	r4, r3, #4
	ldr	r3, .L34
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	mov	r3,#0
	ldr	r3, [fp, #-92]
	ldr	r3, [r3]
	str	r3, [r4]
	ldr	r3, [fp, #-92]
	ldr	r3, [r3, #4]
	str	r3, [r4, #4]
	ldr	r3, [fp, #-92]
	ldr	r3, [r3, #8]
	str	r3, [r4, #8]
	ldr	r3, [fp, #-92]
	ldr	r3, [r3, #12]
	str	r3, [r4, #12]
	ldr	r3, [r4, #12]
	str	r3, [fp, #-80]
	ldr	r0, [fp, #-80]
	bl	rotate32
	str	r0, [fp, #-80]
	mov	r1, #1
	ldr	r0, [fp, #-80]
	bl	sbox
	str	r0, [fp, #-80]
	ldr	r2, [r4]
	ldr	r3, [fp, #-80]
	eor	r3, r3, r2
	str	r3, [r4, #16]
	ldr	r3, [r4, #16]
	str	r3, [fp, #-80]
	ldr	r2, [r4, #4]
	ldr	r3, [fp, #-80]
	eor	r3, r3, r2
	str	r3, [r4, #20]
	ldr	r3, [r4, #20]
	str	r3, [fp, #-80]
	ldr	r2, [r4, #8]
	ldr	r3, [fp, #-80]
	eor	r3, r3, r2
	str	r3, [r4, #24]
	ldr	r3, [r4, #24]
	str	r3, [fp, #-80]
	ldr	r2, [r4, #12]
	ldr	r3, [fp, #-80]
	eor	r3, r3, r2
	str	r3, [r4, #28]
	ldr	r3, [r4, #28]
	str	r3, [fp, #-80]
	ldr	r0, [fp, #-80]
	bl	rotate32
	str	r0, [fp, #-80]
	mov	r1, #2
	ldr	r0, [fp, #-80]
	bl	sbox
	str	r0, [fp, #-80]
	ldr	r2, [r4, #16]
	ldr	r3, [fp, #-80]
	eor	r3, r3, r2
	str	r3, [r4, #32]
	ldr	r3, [r4, #32]
	str	r3, [fp, #-80]
	ldr	r2, [r4, #20]
	ldr	r3, [fp, #-80]
	eor	r3, r3, r2
	str	r3, [r4, #36]
	ldr	r3, [r4, #36]
	str	r3, [fp, #-80]
	ldr	r2, [r4, #24]
	ldr	r3, [fp, #-80]
	eor	r3, r3, r2
	str	r3, [r4, #40]
	ldr	r3, [r4, #40]
	str	r3, [fp, #-80]
	ldr	r2, [r4, #28]
	ldr	r3, [fp, #-80]
	eor	r3, r3, r2
	str	r3, [r4, #44]
	ldr	r3, [r4, #44]
	str	r3, [fp, #-80]
	mov	r1, r4
	ldr	r0, [fp, #-88]
	bl	add_round_key
	ldr	r0, [fp, #-88]
	bl	sub_bytes
	ldr	r0, [fp, #-88]
	bl	shift_rows
	ldr	r0, [fp, #-88]
	bl	mix_columns
	add	r3, r4, #16
	mov	r1, r3
	ldr	r0, [fp, #-88]
	bl	add_round_key
	ldr	r0, [fp, #-88]
	bl	sub_bytes
	ldr	r0, [fp, #-88]
	bl	shift_rows
	add	r3, r4, #32
	mov	r1, r3
	ldr	r0, [fp, #-88]
	bl	add_round_key
	nop
	ldr	r3, .L34
	ldr	r2, [r3]
	ldr	r3, [fp, #-16]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L33
	bl	__stack_chk_fail
.L33:
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L35:
	.align	2
.L34:
	.word	.LC2
	.size	aes2r_encrypt, .-aes2r_encrypt
	.global	rf_table
	.section	.rodata
	.align	2
	.type	rf_table, %object
	.size	rf_table, 518
rf_table:
	.ascii	"\216\301\250\0048x|T)#\033x\237\371'T\021x\225\266\257"
	.ascii	"xE\026+\236\221\350\227%\370c\202V\317Ho\202\024\015"
	.ascii	"a\276G\3217\3560\251(\036K\277\007\315A\337#!\022\270"
	.ascii	"\201\231\035\346h\317\372-\216\271\210\247\025\316\236"
	.ascii	"/\353\033\017g hl\251]\301|v\337\275\230a\264\024e@"
	.ascii	"\036rQt\223\323\255\276F\012%\373j^\036\212Z\003<\253"
	.ascii	"\022\302\324\007\221\253\311\337\222,\205j\246%\036"
	.ascii	"fP&N\250\275\332\210\033\225\324\000\353\015\034\233"
	.ascii	"<\206\307\262\337\264Z6\025\216\004\322Ty\322>=\231"
	.ascii	"P\246\022L2\310Q\024MK\016\273\027\200\217\244\304\231"
	.ascii	"r\327\024K\357\355\024\351\027\372\233]7\326/\357\002"
	.ascii	"\326q\012\275\305@\021\220\220N\264LrQz\330\2720M\214"
	.ascii	"\342\021\273mK\274o\024\014\237\372^f@E\313}\033:\305"
	.ascii	"^\234\036\314\275\026;\317\373*\322\010*\370=F\223\220"
	.ascii	"\263f\2014\177m\233\214\231\003\305'\243\331\316\220"
	.ascii	"\210\017U\303\241`S\310\015%\256a\331rH\035la\322\207"
	.ascii	"\335=#\365\336\2239LC\232\3717\362a\327\370\352e\360"
	.ascii	"\361\336?\005W\203\201\336\002bI\3242~J\324\237@~\271"
	.ascii	"\221\2615\367b?e\236M+\020\336\324wd\017\204\255\222"
	.ascii	"\347\243\212\020\301\024\353W\304\255\216\302\3072\243"
	.ascii	"~P\037|\273._\365\030\"\352\354\235\244w\315\205\004"
	.ascii	"/ ar\247\014\222\006M\001p\2335\241'2n\271x\340\252"
	.ascii	"_\221\246Q\343c\370\227/`\331\373\025\345Y\3171<a\307"
	.ascii	"\265a*k\335\321\011p\300\317\224z\3141\224\261\242\366"
	.ascii	"\225\3008=\357\0310p\335b2\217|0\271\030\370\347\217"
	.ascii	"\012\252\266\000\206\362\3400_\242\350\000\216\005\240"
	.ascii	"\"\030\237\203\324:\205\020\271Q\215\007\360\263\315"
	.ascii	"\233U\241\024\316\017\262\317\270\316-\346\35052\037"
	.ascii	"\"\265\354\320\271r\250\264\227"
	.global	rf256_iv
	.align	2
	.type	rf256_iv, %object
	.size	rf256_iv, 32
rf256_iv:
	.ascii	"x\351\220\323\263\310\233{\012\304\206nN8\263k3h|\355"
	.ascii	"s5K\012\227%Lwz\252a\033"
	.global	rf_crc32_table
	.align	2
	.type	rf_crc32_table, %object
	.size	rf_crc32_table, 1024
rf_crc32_table:
	.word	0
	.word	1996959894
	.word	-301047508
	.word	-1727442502
	.word	124634137
	.word	1886057615
	.word	-379345611
	.word	-1637575261
	.word	249268274
	.word	2044508324
	.word	-522852066
	.word	-1747789432
	.word	162941995
	.word	2125561021
	.word	-407360249
	.word	-1866523247
	.word	498536548
	.word	1789927666
	.word	-205950648
	.word	-2067906082
	.word	450548861
	.word	1843258603
	.word	-187386543
	.word	-2083289657
	.word	325883990
	.word	1684777152
	.word	-43845254
	.word	-1973040660
	.word	335633487
	.word	1661365465
	.word	-99664541
	.word	-1928851979
	.word	997073096
	.word	1281953886
	.word	-715111964
	.word	-1570279054
	.word	1006888145
	.word	1258607687
	.word	-770865667
	.word	-1526024853
	.word	901097722
	.word	1119000684
	.word	-608450090
	.word	-1396901568
	.word	853044451
	.word	1172266101
	.word	-589951537
	.word	-1412350631
	.word	651767980
	.word	1373503546
	.word	-925412992
	.word	-1076862698
	.word	565507253
	.word	1454621731
	.word	-809855591
	.word	-1195530993
	.word	671266974
	.word	1594198024
	.word	-972236366
	.word	-1324619484
	.word	795835527
	.word	1483230225
	.word	-1050600021
	.word	-1234817731
	.word	1994146192
	.word	31158534
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	.word	112637215
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	.word	-1529756563
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	.word	-1385723834
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	.word	1141124467
	.word	855842277
	.word	-1442165665
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	.word	654459306
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	.word	544179635
	.word	-1184443383
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	.word	702138776
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	.word	-144550051
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	.word	426522225
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	.word	-19653770
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	.word	1622183637
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	.word	1340076626
	.word	-776247311
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	.word	1068828381
	.word	1219638859
	.word	-670225446
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	.word	906185462
	.word	1090812512
	.word	-547295293
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	.word	1181335161
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	.word	733239954
	.word	1555261956
	.word	-1026031705
	.word	-1244606671
	.word	752459403
	.word	1541320221
	.word	-1687895376
	.word	-328994266
	.word	1969922972
	.word	40735498
	.word	-1677130071
	.word	-351390145
	.word	1913087877
	.word	83908371
	.word	-1782625662
	.word	-491226604
	.word	2075208622
	.word	213261112
	.word	-1831694693
	.word	-438977011
	.word	2094854071
	.word	198958881
	.word	-2032938284
	.word	-237706686
	.word	1759359992
	.word	534414190
	.word	-2118248755
	.word	-155638181
	.word	1873836001
	.word	414664567
	.word	-2012718362
	.word	-15766928
	.word	1711684554
	.word	285281116
	.word	-1889165569
	.word	-127750551
	.word	1634467795
	.word	376229701
	.word	-1609899400
	.word	-686959890
	.word	1308918612
	.word	956543938
	.word	-1486412191
	.word	-799009033
	.word	1231636301
	.word	1047427035
	.word	-1362007478
	.word	-640263460
	.word	1088359270
	.word	936918000
	.word	-1447252397
	.word	-558129467
	.word	1202900863
	.word	817233897
	.word	-1111625188
	.word	-893730166
	.word	1404277552
	.word	615818150
	.word	-1160759803
	.word	-841546093
	.word	1423857449
	.word	601450431
	.word	-1285129682
	.word	-1000256840
	.word	1567103746
	.word	711928724
	.word	-1274298825
	.word	-1022587231
	.word	1510334235
	.word	755167117
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rf_crc32_32, %function
rf_crc32_32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	eor	r3, r3, r2
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	and	r3, r3, #255
	ldr	r2, .L38
	ldr	r2, [r2, r3, lsl #2]
	ldr	r3, [fp, #-8]
	lsr	r3, r3, #8
	eor	r3, r3, r2
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	and	r3, r3, #255
	ldr	r2, .L38
	ldr	r2, [r2, r3, lsl #2]
	ldr	r3, [fp, #-8]
	lsr	r3, r3, #8
	eor	r3, r3, r2
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	and	r3, r3, #255
	ldr	r2, .L38
	ldr	r2, [r2, r3, lsl #2]
	ldr	r3, [fp, #-8]
	lsr	r3, r3, #8
	eor	r3, r3, r2
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	and	r3, r3, #255
	ldr	r2, .L38
	ldr	r2, [r2, r3, lsl #2]
	ldr	r3, [fp, #-8]
	lsr	r3, r3, #8
	eor	r3, r3, r2
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L39:
	.align	2
.L38:
	.word	rf_crc32_table
	.size	rf_crc32_32, .-rf_crc32_32
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rf_add64_crc32, %function
rf_add64_crc32:
	@ args = 0, pretend = 0, frame = 144
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #148
	str	r0, [fp, #-44]
	str	r1, [fp, #-40]
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-44]
	mov	r0, r3
	mov	r1, #0
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	eor	r4, r2, r0
	eor	r5, r3, r1
	str	r4, [fp, #-36]
	str	r5, [fp, #-32]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	mov	r2, #255
	mov	r3, #0
	and	r6, r0, r2
	and	r7, r1, r3
	ldr	r2, .L42
	mov	r3, r6
	ldr	r3, [r2, r3, lsl #2]
	mov	r4, r3
	mov	r5, #0
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	eor	r8, r4, r0
	eor	r9, r5, r1
	str	r8, [fp, #-36]
	str	r9, [fp, #-32]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	mov	r2, #255
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-52]
	and	r3, r1, r3
	str	r3, [fp, #-48]
	ldr	r2, .L42
	ldr	r3, [fp, #-52]
	ldr	r3, [r2, r3, lsl #2]
	mov	r4, r3
	mov	r5, #0
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	eor	r3, r4, r0
	str	r3, [fp, #-116]
	eor	r3, r5, r1
	str	r3, [fp, #-112]
	sub	r4, fp, #116
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	mov	r2, #255
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-60]
	and	r3, r1, r3
	str	r3, [fp, #-56]
	ldr	r2, .L42
	ldr	r3, [fp, #-60]
	ldr	r3, [r2, r3, lsl #2]
	mov	r4, r3
	mov	r5, #0
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	eor	r3, r4, r0
	str	r3, [fp, #-124]
	eor	r3, r5, r1
	str	r3, [fp, #-120]
	sub	r4, fp, #124
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	mov	r2, #255
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-68]
	and	r3, r1, r3
	str	r3, [fp, #-64]
	ldr	r2, .L42
	ldr	r3, [fp, #-68]
	ldr	r3, [r2, r3, lsl #2]
	mov	r4, r3
	mov	r5, #0
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	eor	r3, r4, r0
	str	r3, [fp, #-132]
	eor	r3, r5, r1
	str	r3, [fp, #-128]
	sub	r4, fp, #132
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	mov	r0, r3
	mov	r1, #0
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	eor	ip, r2, r0
	str	ip, [fp, #-140]
	eor	r3, r3, r1
	str	r3, [fp, #-136]
	sub	r4, fp, #140
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	mov	r2, #255
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-76]
	and	r3, r1, r3
	str	r3, [fp, #-72]
	ldr	r2, .L42
	ldr	r3, [fp, #-76]
	ldr	r3, [r2, r3, lsl #2]
	mov	r4, r3
	mov	r5, #0
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	eor	r3, r4, r0
	str	r3, [fp, #-148]
	eor	r3, r5, r1
	str	r3, [fp, #-144]
	sub	r4, fp, #148
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	mov	r2, #255
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-84]
	and	r3, r1, r3
	str	r3, [fp, #-80]
	ldr	r2, .L42
	ldr	r3, [fp, #-84]
	ldr	r3, [r2, r3, lsl #2]
	mov	r4, r3
	mov	r5, #0
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	eor	r3, r4, r0
	str	r3, [fp, #-156]
	eor	r3, r5, r1
	str	r3, [fp, #-152]
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, #255
	mov	r1, #0
	and	ip, r2, r0
	str	ip, [fp, #-92]
	and	r3, r3, r1
	str	r3, [fp, #-88]
	ldr	r3, .L42
	ldr	r2, [fp, #-92]
	ldr	r3, [r3, r2, lsl #2]
	mov	r4, r3
	mov	r5, #0
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r0, #8
	orr	r2, r2, r1, lsl #24
	lsr	r3, r1, #8
	eor	r1, r4, r2
	str	r1, [fp, #-164]
	eor	r3, r5, r3
	str	r3, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, #255
	mov	r1, #0
	and	ip, r2, r0
	str	ip, [fp, #-100]
	and	r3, r3, r1
	str	r3, [fp, #-96]
	ldr	r3, .L42
	ldr	r2, [fp, #-100]
	ldr	r3, [r3, r2, lsl #2]
	mov	r4, r3
	mov	r5, #0
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r0, #8
	orr	r2, r2, r1, lsl #24
	lsr	r3, r1, #8
	eor	r1, r4, r2
	str	r1, [fp, #-172]
	eor	r3, r5, r3
	str	r3, [fp, #-168]
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	adds	ip, r0, r2
	str	ip, [fp, #-108]
	adc	r3, r1, r3
	str	r3, [fp, #-104]
	sub	r3, fp, #108
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
.L43:
	.align	2
.L42:
	.word	rf_crc32_table
	.size	rf_add64_crc32, .-rf_add64_crc32
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rf_crc32x4, %function
rf_crc32x4:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #12
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	ldr	r3, [fp, #-16]
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, [fp, #-20]
	bl	rf_crc32_32
	mov	r2, r0
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-16]
	ldr	r3, [r3]
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-16]
	add	r3, r3, #4
	ldr	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r4, r3, #4
	mov	r1, r2
	ldr	r0, [fp, #-20]
	bl	rf_crc32_32
	mov	r3, r0
	str	r3, [r4]
	ldr	r3, [r4]
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-16]
	add	r3, r3, #8
	ldr	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r4, r3, #8
	mov	r1, r2
	ldr	r0, [fp, #-20]
	bl	rf_crc32_32
	mov	r3, r0
	str	r3, [r4]
	ldr	r3, [r4]
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-16]
	add	r3, r3, #12
	ldr	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r4, r3, #12
	mov	r1, r2
	ldr	r0, [fp, #-20]
	bl	rf_crc32_32
	mov	r3, r0
	str	r3, [r4]
	ldr	r3, [r4]
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-20]
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
	.size	rf_crc32x4, .-rf_crc32x4
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rf_memr64, %function
rf_memr64:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, fp, lr}
	add	fp, sp, #16
	sub	sp, sp, #28
	str	r0, [fp, #-40]
	mov	r1, #0
	str	r1, [fp, #-32]
	mov	r0, #0
	mov	r1, #0
	str	r0, [fp, #-28]
	str	r1, [fp, #-24]
	b	.L47
.L48:
	ldr	r1, [fp, #-32]
	ldr	r0, [fp, #-40]
	add	r1, r0, r1
	ldrb	r1, [r1]	@ zero_extendqisi2
	and	r0, r1, #255
	mov	r1, #0
	ldr	ip, [fp, #-32]
	lsl	ip, ip, #3
	sub	r6, ip, #32
	rsb	lr, ip, #32
	lsl	r3, r1, ip
	orr	r3, r3, r0, lsl r6
	orr	r3, r3, r0, lsr lr
	lsl	r2, r0, ip
	sub	r1, fp, #28
	ldmia	r1, {r0-r1}
	adds	r4, r0, r2
	adc	r5, r1, r3
	str	r4, [fp, #-28]
	str	r5, [fp, #-24]
	ldr	r1, [fp, #-32]
	add	r1, r1, #1
	str	r1, [fp, #-32]
.L47:
	ldr	r1, [fp, #-32]
	cmp	r1, #7
	ble	.L48
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #16
	@ sp needed
	pop	{r4, r5, r6, fp, pc}
	.size	rf_memr64, .-rf_memr64
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rf_wltable, %function
rf_wltable:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	ldr	r2, .L52
	add	r3, r3, r2
	mov	r0, r3
	bl	rf_memr64
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L53:
	.align	2
.L52:
	.word	rf_table
	.size	rf_wltable, .-rf_wltable
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rf_whtable, %function
rf_whtable:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	lsl	r3, r3, #1
	ldr	r2, .L56
	add	r3, r3, r2
	mov	r0, r3
	bl	rf_memr64
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L57:
	.align	2
.L56:
	.word	rf_table
	.size	rf_whtable, .-rf_whtable
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rf_rotl64, %function
rf_rotl64:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #20
	str	r0, [fp, #-36]
	str	r1, [fp, #-32]
	mov	r3, r2
	strb	r3, [fp, #-37]
	ldrb	r3, [fp, #-37]
	and	r3, r3, #63
	strb	r3, [fp, #-37]
	ldrb	r1, [fp, #-37]	@ zero_extendqisi2
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	ip, r1, #32
	rsb	r0, r1, #32
	lsl	r7, r3, r1
	orr	r7, r7, r2, lsl ip
	orr	r7, r7, r2, lsr r0
	lsl	r6, r2, r1
	rsb	r1, r1, #0
	and	r1, r1, #63
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r4, r2, r1
	orr	r4, r4, r3, lsl ip
	orr	r4, r4, r3, lsr r0
	lsr	r5, r3, r1
	orr	r8, r6, r4
	orr	r9, r7, r5
	mov	r4, r8
	mov	r5, r9
	mov	r2, r4
	mov	r3, r5
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
	.size	rf_rotl64, .-rf_rotl64
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rf_rotr64, %function
rf_rotr64:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #20
	str	r0, [fp, #-36]
	str	r1, [fp, #-32]
	mov	r3, r2
	strb	r3, [fp, #-37]
	ldrb	r3, [fp, #-37]
	and	r3, r3, #63
	strb	r3, [fp, #-37]
	ldrb	r1, [fp, #-37]	@ zero_extendqisi2
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r6, r2, r1
	orr	r6, r6, r3, lsl ip
	orr	r6, r6, r3, lsr r0
	lsr	r7, r3, r1
	rsb	r1, r1, #0
	and	r1, r1, #63
	sub	ip, r1, #32
	rsb	r0, r1, #32
	lsl	r5, r3, r1
	orr	r5, r5, r2, lsl ip
	orr	r5, r5, r2, lsr r0
	lsl	r4, r2, r1
	orr	r8, r6, r4
	orr	r9, r7, r5
	mov	r4, r8
	mov	r5, r9
	mov	r2, r4
	mov	r3, r5
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
	.size	rf_rotr64, .-rf_rotr64
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rf_bswap64, %function
rf_bswap64:
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #44
	str	r0, [fp, #-36]
	str	r1, [fp, #-32]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	adr	r3, .L64
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-44]
	and	r3, r1, r3
	str	r3, [fp, #-40]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	adr	r3, .L64+8
	ldmia	r3, {r2-r3}
	and	r8, r0, r2
	and	r9, r1, r3
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r1, r2
	orr	r1, r1, r8
	str	r1, [fp, #-52]
	orr	r3, r3, r9
	str	r3, [fp, #-48]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r0, #16
	orr	r2, r2, r1, lsl #16
	lsr	r3, r1, #16
	adr	r1, .L64+16
	ldmia	r1, {r0-r1}
	and	r6, r2, r0
	and	r7, r3, r1
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #16
	orr	r3, r3, r0, lsr #16
	lsl	r2, r0, #16
	adr	r1, .L64+24
	ldmia	r1, {r0-r1}
	and	r4, r2, r0
	and	r5, r3, r1
	orr	r3, r6, r4
	str	r3, [fp, #-60]
	orr	r3, r7, r5
	str	r3, [fp, #-56]
	sub	r4, fp, #60
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	ldr	r3, [fp, #-32]
	str	r3, [fp, #-68]
	ldr	r3, [fp, #-36]
	str	r3, [fp, #-64]
	sub	r4, fp, #68
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
.L65:
	.align	3
.L64:
	.word	16711935
	.word	16711935
	.word	-16711936
	.word	-16711936
	.word	65535
	.word	65535
	.word	-65536
	.word	-65536
	.size	rf_bswap64, .-rf_bswap64
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rf_rambox, %function
rf_rambox:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #24
	str	r0, [fp, #-32]
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	mov	r3, #0
	str	r3, [fp, #-28]
	b	.L67
.L69:
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	bl	rf_add64_crc32
	str	r0, [fp, #-44]
	str	r1, [fp, #-40]
	ldr	r3, [fp, #-44]
	lsl	r3, r3, #21
	lsr	r3, r3, #21
	lsl	r3, r3, #3
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-24]
	ldmia	r3, {r6-r7}
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r0, #11
	orr	r2, r2, r1, lsl #21
	lsr	r3, r1, #11
	and	r3, r2, #255
	mov	r2, r3
	mov	r0, r6
	mov	r1, r7
	bl	rf_rotr64
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	adds	r4, r2, r0
	adc	r5, r3, r1
	str	r4, [fp, #-44]
	str	r5, [fp, #-40]
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r1, #24
	mov	r3, #0
	cmp	r3, #0
	cmpeq	r2, #127
	bhi	.L68
	ldr	r1, [fp, #-24]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
.L68:
	ldr	r3, [fp, #-28]
	add	r3, r3, #1
	str	r3, [fp, #-28]
.L67:
	ldr	r3, [fp, #-28]
	cmp	r3, #3
	ble	.L69
	ldr	r3, [fp, #-44]
	mov	r0, r3
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
	.size	rf_rambox, .-rf_rambox
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rf_w128, %function
rf_w128:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #3
	ldr	r2, [fp, #-8]
	add	r1, r2, r3
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	lsl	r3, r3, #3
	ldr	r2, [fp, #-8]
	add	r1, r2, r3
	ldmib	fp, {r2-r3}
	stm	r1, {r2-r3}
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	rf_w128, .-rf_w128
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rf_raminit, %function
rf_raminit:
	@ args = 0, pretend = 0, frame = 80
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #88
	str	r0, [fp, #-64]
	adr	r3, .L75
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-52]
	str	r3, [fp, #-48]
	adr	r3, .L75+8
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	mov	r3, #0
	str	r3, [fp, #-56]
	b	.L73
.L76:
	.align	3
.L75:
	.word	-1985229329
	.word	19088743
	.word	1985229328
	.word	-19088744
	.word	273
	.word	546
	.word	819
	.word	1092
	.word	1365
	.word	1638
	.word	1911
	.word	2184
.L74:
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	ldrb	r3, [fp, #-36]	@ zero_extendqisi2
	mov	r2, r3
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	bl	rf_rotr64
	ldr	r2, .L75+16
	mov	r3, #0
	adds	ip, r0, r2
	str	ip, [fp, #-76]
	adc	r3, r1, r3
	str	r3, [fp, #-72]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-52]
	str	r3, [fp, #-48]
	ldr	r3, [fp, #-56]
	lsl	r2, r3, #3
	ldr	r3, [fp, #-64]
	add	r0, r3, r2
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	stm	sp, {r2-r3}
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	mov	r1, #0
	bl	rf_w128
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	ldrb	r3, [fp, #-36]	@ zero_extendqisi2
	mov	r2, r3
	sub	r1, fp, #52
	ldmia	r1, {r0-r1}
	bl	rf_rotr64
	ldr	r2, .L75+20
	mov	r3, #0
	adds	ip, r0, r2
	str	ip, [fp, #-84]
	adc	r3, r1, r3
	str	r3, [fp, #-80]
	sub	r3, fp, #84
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	ldr	r3, [fp, #-56]
	lsl	r2, r3, #3
	ldr	r3, [fp, #-64]
	add	r0, r3, r2
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	stm	sp, {r2-r3}
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r1, #2
	bl	rf_w128
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	ldrb	r3, [fp, #-36]	@ zero_extendqisi2
	mov	r2, r3
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	bl	rf_rotr64
	ldr	r2, .L75+24
	mov	r3, #0
	adds	ip, r0, r2
	str	ip, [fp, #-92]
	adc	r3, r1, r3
	str	r3, [fp, #-88]
	sub	r3, fp, #92
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-52]
	str	r3, [fp, #-48]
	ldr	r3, [fp, #-56]
	lsl	r2, r3, #3
	ldr	r3, [fp, #-64]
	add	r0, r3, r2
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	stm	sp, {r2-r3}
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	mov	r1, #4
	bl	rf_w128
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	ldrb	r3, [fp, #-36]	@ zero_extendqisi2
	mov	r2, r3
	sub	r1, fp, #52
	ldmia	r1, {r0-r1}
	bl	rf_rotr64
	ldr	r2, .L75+28
	mov	r3, #0
	adds	ip, r0, r2
	str	ip, [fp, #-100]
	adc	r3, r1, r3
	str	r3, [fp, #-96]
	sub	r3, fp, #100
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	ldr	r3, [fp, #-56]
	lsl	r2, r3, #3
	ldr	r3, [fp, #-64]
	add	r0, r3, r2
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	stm	sp, {r2-r3}
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r1, #6
	bl	rf_w128
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	ldrb	r3, [fp, #-36]	@ zero_extendqisi2
	mov	r2, r3
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	bl	rf_rotr64
	ldr	r2, .L75+32
	mov	r3, #0
	adds	ip, r0, r2
	str	ip, [fp, #-108]
	adc	r3, r1, r3
	str	r3, [fp, #-104]
	sub	r3, fp, #108
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-52]
	str	r3, [fp, #-48]
	ldr	r3, [fp, #-56]
	lsl	r2, r3, #3
	ldr	r3, [fp, #-64]
	add	r0, r3, r2
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	stm	sp, {r2-r3}
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	mov	r1, #8
	bl	rf_w128
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	ldrb	r3, [fp, #-36]	@ zero_extendqisi2
	mov	r2, r3
	sub	r1, fp, #52
	ldmia	r1, {r0-r1}
	bl	rf_rotr64
	ldr	r2, .L75+36
	mov	r3, #0
	adds	r8, r0, r2
	adc	r9, r1, r3
	str	r8, [fp, #-44]
	str	r9, [fp, #-40]
	ldr	r3, [fp, #-56]
	lsl	r2, r3, #3
	ldr	r3, [fp, #-64]
	add	r0, r3, r2
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	stm	sp, {r2-r3}
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r1, #10
	bl	rf_w128
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	ldrb	r3, [fp, #-36]	@ zero_extendqisi2
	mov	r2, r3
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	bl	rf_rotr64
	ldr	r2, .L75+40
	mov	r3, #0
	adds	r6, r0, r2
	adc	r7, r1, r3
	str	r6, [fp, #-52]
	str	r7, [fp, #-48]
	ldr	r3, [fp, #-56]
	lsl	r2, r3, #3
	ldr	r3, [fp, #-64]
	add	r0, r3, r2
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	stm	sp, {r2-r3}
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	mov	r1, #12
	bl	rf_w128
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	ldrb	r3, [fp, #-36]	@ zero_extendqisi2
	mov	r2, r3
	sub	r1, fp, #52
	ldmia	r1, {r0-r1}
	bl	rf_rotr64
	ldr	r2, .L75+44
	mov	r3, #0
	adds	r4, r0, r2
	adc	r5, r1, r3
	str	r4, [fp, #-44]
	str	r5, [fp, #-40]
	ldr	r3, [fp, #-56]
	lsl	r2, r3, #3
	ldr	r3, [fp, #-64]
	add	r0, r3, r2
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	stm	sp, {r2-r3}
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r1, #14
	bl	rf_w128
	ldr	r3, [fp, #-56]
	add	r3, r3, #16
	str	r3, [fp, #-56]
.L73:
	ldr	r3, [fp, #-56]
	cmp	r3, #2048
	bcc	.L74
	nop
	nop
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
	.size	rf_raminit, .-rf_raminit
	.global	__aeabi_uldivmod
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rf256_divbox, %function
rf256_divbox:
	@ args = 0, pretend = 0, frame = 96
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #96
	str	r0, [fp, #-96]
	str	r1, [fp, #-100]
	ldr	r3, [fp, #-96]
	ldmia	r3, {r2-r3}
	mvn	r6, r2
	mvn	r7, r3
	str	r6, [fp, #-92]
	str	r7, [fp, #-88]
	ldr	r3, [fp, #-100]
	ldmia	r3, {r2-r3}
	mvn	r4, r2
	mvn	r5, r3
	str	r4, [fp, #-76]
	str	r5, [fp, #-72]
	ldr	r3, [fp, #-96]
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	rf_bswap64
	str	r0, [fp, #-84]
	str	r1, [fp, #-80]
	ldr	r3, [fp, #-100]
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	rf_bswap64
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	sub	r3, fp, #92
	ldmia	r3, {r2-r3}
	orrs	r3, r2, r3
	beq	.L78
	sub	r3, fp, #84
	ldmia	r3, {r2-r3}
	orrs	r3, r2, r3
	bne	.L79
.L78:
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-84]
	str	r3, [fp, #-80]
	sub	r3, fp, #84
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-92]
	str	r3, [fp, #-88]
	b	.L80
.L79:
	sub	r1, fp, #92
	ldmia	r1, {r0-r1}
	sub	r3, fp, #84
	ldmia	r3, {r2-r3}
	cmp	r1, r3
	cmpeq	r0, r2
	bls	.L81
	sub	r3, fp, #92
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-52]
	str	r3, [fp, #-48]
	sub	r3, fp, #84
	ldmia	r3, {r2-r3}
	sub	r1, fp, #52
	ldmia	r1, {r0-r1}
	bl	__aeabi_uldivmod
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-92]
	str	r3, [fp, #-88]
	sub	r1, fp, #52
	ldmia	r1, {r0-r1}
	sub	r3, fp, #84
	ldmia	r3, {r2-r3}
	bl	__aeabi_uldivmod
	str	r2, [fp, #-84]
	str	r3, [fp, #-80]
	b	.L80
.L81:
	sub	r3, fp, #92
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-60]
	str	r3, [fp, #-56]
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	bl	__aeabi_uldivmod
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-92]
	str	r3, [fp, #-88]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	bl	__aeabi_uldivmod
	str	r2, [fp, #-84]
	str	r3, [fp, #-80]
.L80:
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	orrs	r3, r2, r3
	beq	.L82
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	orrs	r3, r2, r3
	bne	.L83
.L82:
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-68]
	str	r3, [fp, #-64]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	b	.L84
.L83:
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	cmp	r1, r3
	cmpeq	r0, r2
	bls	.L85
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	bl	__aeabi_uldivmod
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	bl	__aeabi_uldivmod
	str	r2, [fp, #-68]
	str	r3, [fp, #-64]
	b	.L84
.L85:
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	bl	__aeabi_uldivmod
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	bl	__aeabi_uldivmod
	str	r2, [fp, #-68]
	str	r3, [fp, #-64]
.L84:
	sub	r1, fp, #92
	ldmia	r1, {r0-r1}
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	adds	ip, r0, r2
	str	ip, [fp, #-116]
	adc	r3, r1, r3
	str	r3, [fp, #-112]
	sub	r4, fp, #116
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-92]
	str	r4, [fp, #-88]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	sub	r3, fp, #84
	ldmia	r3, {r2-r3}
	adds	ip, r0, r2
	str	ip, [fp, #-124]
	adc	r3, r1, r3
	str	r3, [fp, #-120]
	sub	r4, fp, #124
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-76]
	str	r4, [fp, #-72]
	ldr	r3, [fp, #-96]
	ldmia	r3, {r0-r1}
	sub	r3, fp, #92
	ldmia	r3, {r2-r3}
	subs	ip, r0, r2
	str	ip, [fp, #-108]
	sbc	r3, r1, r3
	str	r3, [fp, #-104]
	ldr	r3, [fp, #-96]
	sub	r2, fp, #108
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r3, [fp, #-100]
	ldmia	r3, {r0-r1}
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	subs	r8, r0, r2
	sbc	r9, r1, r3
	ldr	r3, [fp, #-100]
	stm	r3, {r8-r9}
	nop
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
	.size	rf256_divbox, .-rf256_divbox
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rf256_rotbox, %function
rf256_rotbox:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #32
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	mov	r1, r2
	mov	r2, r3
	mov	r3, r1
	strb	r3, [fp, #-45]
	mov	r3, r2
	strb	r3, [fp, #-46]
	ldr	r3, [fp, #-40]
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-44]
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	ldrb	r3, [fp, #-45]	@ zero_extendqisi2
	mov	r2, r3
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	bl	rf_rotr64
	str	r0, [fp, #-36]
	str	r1, [fp, #-32]
	ldrb	r3, [fp, #-46]	@ zero_extendqisi2
	mov	r2, r3
	sub	r1, fp, #28
	ldmia	r1, {r0-r1}
	bl	rf_rotl64
	str	r0, [fp, #-28]
	str	r1, [fp, #-24]
	ldrb	r3, [fp, #-45]	@ zero_extendqisi2
	mov	r0, r3
	bl	rf_wltable
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	adds	r6, r2, r0
	adc	r7, r3, r1
	str	r6, [fp, #-36]
	str	r7, [fp, #-32]
	ldrb	r3, [fp, #-46]	@ zero_extendqisi2
	mov	r0, r3
	bl	rf_whtable
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	adds	r4, r2, r0
	adc	r5, r3, r1
	str	r4, [fp, #-28]
	str	r5, [fp, #-24]
	ldr	r3, [fp, #-36]
	strb	r3, [fp, #-45]
	ldr	r3, [fp, #-28]
	strb	r3, [fp, #-46]
	ldrb	r3, [fp, #-46]	@ zero_extendqisi2
	mov	r2, r3
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	bl	rf_rotl64
	str	r0, [fp, #-36]
	str	r1, [fp, #-32]
	ldrb	r3, [fp, #-45]	@ zero_extendqisi2
	mov	r2, r3
	sub	r1, fp, #28
	ldmia	r1, {r0-r1}
	bl	rf_rotr64
	str	r0, [fp, #-28]
	str	r1, [fp, #-24]
	ldr	r3, [fp, #-36]
	strb	r3, [fp, #-45]
	ldr	r3, [fp, #-28]
	strb	r3, [fp, #-46]
	ldrb	r3, [fp, #-46]	@ zero_extendqisi2
	mov	r2, r3
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	bl	rf_rotr64
	str	r0, [fp, #-36]
	str	r1, [fp, #-32]
	ldrb	r3, [fp, #-45]	@ zero_extendqisi2
	mov	r2, r3
	sub	r1, fp, #28
	ldmia	r1, {r0-r1}
	bl	rf_rotl64
	str	r0, [fp, #-28]
	str	r1, [fp, #-24]
	ldr	r1, [fp, #-40]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	ldr	r1, [fp, #-44]
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	nop
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
	.size	rf256_rotbox, .-rf256_rotbox
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rf256_scramble, %function
rf256_scramble:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	add	r2, r3, #16384
	ldr	r3, [fp, #-8]
	add	r3, r3, #16384
	ldr	r3, [r3, #32]
	mov	r1, r3
	mov	r0, r2
	bl	rf_crc32x4
	mov	r2, r0
	ldr	r3, [fp, #-8]
	add	r3, r3, #16384
	str	r2, [r3, #32]
	ldr	r3, [fp, #-8]
	add	r3, r3, #16384
	ldr	r3, [r3, #32]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	rf256_scramble, .-rf256_scramble
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rf256_inject, %function
rf256_inject:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r0, [fp, #-8]
	bl	rf256_scramble
	mov	r2, r0
	ldr	r3, [fp, #-8]
	add	r3, r3, #16384
	ldr	r3, [r3, #36]
	mov	r1, r3
	mov	r0, r2
	bl	rf_crc32_32
	mov	r2, r0
	ldr	r3, [fp, #-8]
	add	r3, r3, #16384
	str	r2, [r3, #32]
	ldr	r3, [fp, #-8]
	add	r3, r3, #16384
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #36]
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	rf256_inject, .-rf256_inject
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rf256_rot32x256, %function
rf256_rot32x256:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	ldr	r3, [r3, #28]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-16]
	add	r3, r3, #4
	ldr	r1, [fp, #-16]
	mov	r2, #28
	mov	r0, r3
	bl	memmove
	ldr	r3, [fp, #-16]
	ldr	r2, [fp, #-8]
	str	r2, [r3]
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	rf256_rot32x256, .-rf256_rot32x256
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rf256_aesenc, %function
rf256_aesenc:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	add	r2, r3, #16384
	ldr	r3, [fp, #-8]
	add	r3, r3, #16384
	add	r3, r3, #16
	mov	r1, r3
	mov	r0, r2
	bl	aes2r_encrypt
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	rf256_aesenc, .-rf256_aesenc
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rf256_one_round, %function
rf256_one_round:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #16
	str	r0, [fp, #-24]
	ldr	r3, [fp, #-24]
	add	r3, r3, #16384
	mov	r0, r3
	bl	rf256_rot32x256
	ldr	r3, [fp, #-24]
	add	r3, r3, #16384
	ldr	r3, [r3, #40]
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	mov	r3, r0
	mov	r2, #0
	ldr	r1, [fp, #-24]
	add	r1, r1, #16384
	ldr	r1, [r1, #32]
	mov	r0, r1
	mov	r1, #0
	adds	r4, r2, r0
	adc	r5, r3, r1
	str	r4, [fp, #-20]
	str	r5, [fp, #-16]
	ldr	r0, [fp, #-24]
	bl	rf256_scramble
	ldr	r3, [fp, #-24]
	add	r2, r3, #16384
	ldr	r3, [fp, #-24]
	add	r3, r3, #16384
	add	r3, r3, #8
	mov	r1, r3
	mov	r0, r2
	bl	rf256_divbox
	ldr	r0, [fp, #-24]
	bl	rf256_scramble
	ldr	r1, [fp, #-24]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	mov	r0, r1
	bl	rf_rambox
	mov	r3, r0
	mov	r2, r3
	mov	r3, #0
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-24]
	add	ip, r3, #16384
	ldr	r3, [fp, #-24]
	add	r3, r3, #16384
	add	lr, r3, #8
	ldrb	r4, [fp, #-20]	@ zero_extendqisi2
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r1, #24
	mov	r3, #0
	and	r3, r2, #255
	mov	r2, r4
	mov	r1, lr
	mov	r0, ip
	bl	rf256_rotbox
	ldr	r0, [fp, #-24]
	bl	rf256_scramble
	ldr	r3, [fp, #-24]
	add	r2, r3, #16384
	ldr	r3, [fp, #-24]
	add	r3, r3, #16384
	add	r3, r3, #8
	mov	r1, r3
	mov	r0, r2
	bl	rf256_divbox
	ldr	r0, [fp, #-24]
	bl	rf256_scramble
	ldr	r3, [fp, #-24]
	add	r2, r3, #16384
	ldr	r3, [fp, #-24]
	add	r3, r3, #16384
	add	r3, r3, #8
	mov	r1, r3
	mov	r0, r2
	bl	rf256_divbox
	ldr	r0, [fp, #-24]
	bl	rf256_scramble
	ldr	r1, [fp, #-24]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	mov	r0, r1
	bl	rf_rambox
	mov	r3, r0
	mov	r2, r3
	mov	r3, #0
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-24]
	add	ip, r3, #16384
	ldr	r3, [fp, #-24]
	add	r3, r3, #16384
	add	lr, r3, #8
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r0, #8
	orr	r2, r2, r1, lsl #24
	lsr	r3, r1, #8
	and	r4, r2, #255
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r1, #16
	mov	r3, #0
	and	r3, r2, #255
	mov	r2, r4
	mov	r1, lr
	mov	r0, ip
	bl	rf256_rotbox
	ldr	r0, [fp, #-24]
	bl	rf256_scramble
	ldr	r3, [fp, #-24]
	add	r2, r3, #16384
	ldr	r3, [fp, #-24]
	add	r3, r3, #16384
	add	r3, r3, #8
	mov	r1, r3
	mov	r0, r2
	bl	rf256_divbox
	ldr	r0, [fp, #-24]
	bl	rf256_scramble
	ldr	r3, [fp, #-24]
	add	r2, r3, #16384
	ldr	r3, [fp, #-24]
	add	r3, r3, #16384
	add	r3, r3, #8
	mov	r1, r3
	mov	r0, r2
	bl	rf256_divbox
	ldr	r0, [fp, #-24]
	bl	rf256_scramble
	ldr	r1, [fp, #-24]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	mov	r0, r1
	bl	rf_rambox
	mov	r3, r0
	mov	r2, r3
	mov	r3, #0
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-24]
	add	ip, r3, #16384
	ldr	r3, [fp, #-24]
	add	r3, r3, #16384
	add	lr, r3, #8
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r0, #16
	orr	r2, r2, r1, lsl #16
	lsr	r3, r1, #16
	and	r4, r2, #255
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r1, #8
	mov	r3, #0
	and	r3, r2, #255
	mov	r2, r4
	mov	r1, lr
	mov	r0, ip
	bl	rf256_rotbox
	ldr	r0, [fp, #-24]
	bl	rf256_scramble
	ldr	r3, [fp, #-24]
	add	r2, r3, #16384
	ldr	r3, [fp, #-24]
	add	r3, r3, #16384
	add	r3, r3, #8
	mov	r1, r3
	mov	r0, r2
	bl	rf256_divbox
	ldr	r0, [fp, #-24]
	bl	rf256_scramble
	ldr	r3, [fp, #-24]
	add	r2, r3, #16384
	ldr	r3, [fp, #-24]
	add	r3, r3, #16384
	add	r3, r3, #8
	mov	r1, r3
	mov	r0, r2
	bl	rf256_divbox
	ldr	r0, [fp, #-24]
	bl	rf256_scramble
	ldr	r1, [fp, #-24]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	mov	r0, r1
	bl	rf_rambox
	mov	r3, r0
	mov	r2, r3
	mov	r3, #0
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-24]
	add	ip, r3, #16384
	ldr	r3, [fp, #-24]
	add	r3, r3, #16384
	add	lr, r3, #8
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r0, #24
	orr	r2, r2, r1, lsl #8
	lsr	r3, r1, #24
	and	r4, r2, #255
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	mov	r2, r1
	mov	r3, #0
	and	r3, r2, #255
	mov	r2, r4
	mov	r1, lr
	mov	r0, ip
	bl	rf256_rotbox
	ldr	r0, [fp, #-24]
	bl	rf256_scramble
	ldr	r3, [fp, #-24]
	add	r2, r3, #16384
	ldr	r3, [fp, #-24]
	add	r3, r3, #16384
	add	r3, r3, #8
	mov	r1, r3
	mov	r0, r2
	bl	rf256_divbox
	ldr	r0, [fp, #-24]
	bl	rf256_inject
	ldr	r0, [fp, #-24]
	bl	rf256_aesenc
	ldr	r0, [fp, #-24]
	bl	rf256_scramble
	nop
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
	.size	rf256_one_round, .-rf256_one_round
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rf256_init, %function
rf256_init:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	bl	rf_raminit
	ldr	r3, [fp, #-8]
	add	r3, r3, #16384
	ldr	r2, .L94
	mov	r0, r3
	mov	r1, r2
	mov	r3, #32
	mov	r2, r3
	bl	memcpy
	ldr	r3, [fp, #-8]
	add	r3, r3, #16384
	mov	r2, r3
	ldr	r3, .L94+4
	str	r3, [r2, #32]
	ldr	r3, [fp, #-8]
	add	r3, r3, #16384
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #40]
	ldr	r3, [fp, #-8]
	add	r3, r3, #16384
	ldr	r3, [r3, #40]
	ldr	r2, [fp, #-8]
	add	r2, r2, #16384
	str	r3, [r2, #36]
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L95:
	.align	2
.L94:
	.word	rf256_iv
	.word	20180213
	.size	rf256_init, .-rf256_init
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rf256_update, %function
rf256_update:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	str	r2, [fp, #-16]
	b	.L97
.L98:
	ldr	r3, [fp, #-12]
	add	r2, r3, #1
	str	r2, [fp, #-12]
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r0, r3
	ldr	r3, [fp, #-8]
	add	r3, r3, #16384
	ldr	r3, [r3, #40]
	add	r2, r3, #1
	ldr	r1, [fp, #-8]
	add	r1, r1, #16384
	str	r2, [r1, #40]
	and	r3, r3, #3
	lsl	r3, r3, #3
	lsl	r2, r0, r3
	ldr	r3, [fp, #-8]
	add	r3, r3, #16384
	ldr	r3, [r3, #36]
	orr	r3, r2, r3
	ldr	r2, [fp, #-8]
	add	r2, r2, #16384
	str	r3, [r2, #36]
	ldr	r3, [fp, #-16]
	sub	r3, r3, #1
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-8]
	add	r3, r3, #16384
	ldr	r3, [r3, #40]
	and	r3, r3, #3
	cmp	r3, #0
	bne	.L97
	ldr	r0, [fp, #-8]
	bl	rf256_one_round
.L97:
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L98
	nop
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	rf256_update, .-rf256_update
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rf256_final, %function
rf256_final:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r0, [fp, #-12]
	bl	rf256_one_round
	ldr	r0, [fp, #-12]
	bl	rf256_one_round
	ldr	r0, [fp, #-12]
	bl	rf256_one_round
	ldr	r0, [fp, #-12]
	bl	rf256_one_round
	ldr	r3, [fp, #-12]
	add	r3, r3, #16384
	mov	r2, #32
	mov	r1, r3
	ldr	r0, [fp, #-8]
	bl	memcpy
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	rf256_final, .-rf256_final
	.section	.rodata
	.align	2
.LC3:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	rf256_hash
	.syntax unified
	.arm
	.fpu softvfp
	.type	rf256_hash, %function
rf256_hash:
	@ args = 0, pretend = 0, frame = 16464
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #16384
	sub	sp, sp, #84
	sub	r3, fp, #16384
	sub	r3, r3, #12
	str	r0, [r3, #-68]
	sub	r3, fp, #16384
	sub	r3, r3, #12
	str	r1, [r3, #-72]
	sub	r3, fp, #16384
	sub	r3, r3, #12
	str	r2, [r3, #-76]
	sub	r3, fp, #12
	sub	r3, r3, #16384
	sub	r3, r3, #64
	add	r3, r3, #15
	lsr	r3, r3, #4
	lsl	r4, r3, #4
	ldr	r3, .L102
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	mov	r3,#0
	mov	r0, r4
	bl	rf256_init
	sub	r3, fp, #16384
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #16384
	sub	r3, r3, #12
	ldr	r2, [r2, #-76]
	ldr	r1, [r3, #-72]
	mov	r0, r4
	bl	rf256_update
	sub	r3, fp, #16384
	sub	r3, r3, #12
	mov	r1, r4
	ldr	r0, [r3, #-68]
	bl	rf256_final
	nop
	ldr	r3, .L102
	ldr	r2, [r3]
	ldr	r3, [fp, #-16]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L101
	bl	__stack_chk_fail
.L101:
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L103:
	.align	2
.L102:
	.word	.LC3
	.size	rf256_hash, .-rf256_hash
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
