	.file	"277845.c"
	.intel_syntax noprefix
	.text
	.globl	__VERIFIER_nondet_bool
	.type	__VERIFIER_nondet_bool, @function
__VERIFIER_nondet_bool:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	__VERIFIER_nondet_int@PLT
	test	eax, eax
	setne	al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	__VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
	.globl	p23_l1
	.bss
	.type	p23_l1, @object
	.size	p23_l1, 1
p23_l1:
	.zero	1
	.globl	_x_p23_l1
	.type	_x_p23_l1, @object
	.size	_x_p23_l1, 1
_x_p23_l1:
	.zero	1
	.globl	p23_l0
	.type	p23_l0, @object
	.size	p23_l0, 1
p23_l0:
	.zero	1
	.globl	_x_p23_l0
	.type	_x_p23_l0, @object
	.size	_x_p23_l0, 1
_x_p23_l0:
	.zero	1
	.globl	p22_l1
	.type	p22_l1, @object
	.size	p22_l1, 1
p22_l1:
	.zero	1
	.globl	_x_p22_l1
	.type	_x_p22_l1, @object
	.size	_x_p22_l1, 1
_x_p22_l1:
	.zero	1
	.globl	p22_l0
	.type	p22_l0, @object
	.size	p22_l0, 1
p22_l0:
	.zero	1
	.globl	_x_p22_l0
	.type	_x_p22_l0, @object
	.size	_x_p22_l0, 1
_x_p22_l0:
	.zero	1
	.globl	p21_l1
	.type	p21_l1, @object
	.size	p21_l1, 1
p21_l1:
	.zero	1
	.globl	_x_p21_l1
	.type	_x_p21_l1, @object
	.size	_x_p21_l1, 1
_x_p21_l1:
	.zero	1
	.globl	p21_l0
	.type	p21_l0, @object
	.size	p21_l0, 1
p21_l0:
	.zero	1
	.globl	_x_p21_l0
	.type	_x_p21_l0, @object
	.size	_x_p21_l0, 1
_x_p21_l0:
	.zero	1
	.globl	p20_l1
	.type	p20_l1, @object
	.size	p20_l1, 1
p20_l1:
	.zero	1
	.globl	_x_p20_l1
	.type	_x_p20_l1, @object
	.size	_x_p20_l1, 1
_x_p20_l1:
	.zero	1
	.globl	p20_l0
	.type	p20_l0, @object
	.size	p20_l0, 1
p20_l0:
	.zero	1
	.globl	_x_p20_l0
	.type	_x_p20_l0, @object
	.size	_x_p20_l0, 1
_x_p20_l0:
	.zero	1
	.globl	p19_l1
	.type	p19_l1, @object
	.size	p19_l1, 1
p19_l1:
	.zero	1
	.globl	_x_p19_l1
	.type	_x_p19_l1, @object
	.size	_x_p19_l1, 1
_x_p19_l1:
	.zero	1
	.globl	p19_l0
	.type	p19_l0, @object
	.size	p19_l0, 1
p19_l0:
	.zero	1
	.globl	_x_p19_l0
	.type	_x_p19_l0, @object
	.size	_x_p19_l0, 1
_x_p19_l0:
	.zero	1
	.globl	p19_x
	.align 4
	.type	p19_x, @object
	.size	p19_x, 4
p19_x:
	.zero	4
	.globl	_x_p19_x
	.align 4
	.type	_x_p19_x, @object
	.size	_x_p19_x, 4
_x_p19_x:
	.zero	4
	.globl	p8_l0
	.type	p8_l0, @object
	.size	p8_l0, 1
p8_l0:
	.zero	1
	.globl	_x_p8_l0
	.type	_x_p8_l0, @object
	.size	_x_p8_l0, 1
_x_p8_l0:
	.zero	1
	.globl	p14_l1
	.type	p14_l1, @object
	.size	p14_l1, 1
p14_l1:
	.zero	1
	.globl	_x_p14_l1
	.type	_x_p14_l1, @object
	.size	_x_p14_l1, 1
_x_p14_l1:
	.zero	1
	.globl	p7_l0
	.type	p7_l0, @object
	.size	p7_l0, 1
p7_l0:
	.zero	1
	.globl	_x_p7_l0
	.type	_x_p7_l0, @object
	.size	_x_p7_l0, 1
_x_p7_l0:
	.zero	1
	.globl	p13_l1
	.type	p13_l1, @object
	.size	p13_l1, 1
p13_l1:
	.zero	1
	.globl	_x_p13_l1
	.type	_x_p13_l1, @object
	.size	_x_p13_l1, 1
_x_p13_l1:
	.zero	1
	.globl	p6_l1
	.type	p6_l1, @object
	.size	p6_l1, 1
p6_l1:
	.zero	1
	.globl	_x_p6_l1
	.type	_x_p6_l1, @object
	.size	_x_p6_l1, 1
_x_p6_l1:
	.zero	1
	.globl	p5_l0
	.type	p5_l0, @object
	.size	p5_l0, 1
p5_l0:
	.zero	1
	.globl	_x_p5_l0
	.type	_x_p5_l0, @object
	.size	_x_p5_l0, 1
_x_p5_l0:
	.zero	1
	.globl	p11_l1
	.type	p11_l1, @object
	.size	p11_l1, 1
p11_l1:
	.zero	1
	.globl	_x_p11_l1
	.type	_x_p11_l1, @object
	.size	_x_p11_l1, 1
_x_p11_l1:
	.zero	1
	.globl	p5_x
	.align 4
	.type	p5_x, @object
	.size	p5_x, 4
p5_x:
	.zero	4
	.globl	_x_p5_x
	.align 4
	.type	_x_p5_x, @object
	.size	_x_p5_x, 4
_x_p5_x:
	.zero	4
	.globl	p16_l0
	.type	p16_l0, @object
	.size	p16_l0, 1
p16_l0:
	.zero	1
	.globl	_x_p16_l0
	.type	_x_p16_l0, @object
	.size	_x_p16_l0, 1
_x_p16_l0:
	.zero	1
	.globl	p8_x
	.align 4
	.type	p8_x, @object
	.size	p8_x, 4
p8_x:
	.zero	4
	.globl	_x_p8_x
	.align 4
	.type	_x_p8_x, @object
	.size	_x_p8_x, 4
_x_p8_x:
	.zero	4
	.globl	p22_x
	.align 4
	.type	p22_x, @object
	.size	p22_x, 4
p22_x:
	.zero	4
	.globl	_x_p22_x
	.align 4
	.type	_x_p22_x, @object
	.size	_x_p22_x, 4
_x_p22_x:
	.zero	4
	.globl	p4_l1
	.type	p4_l1, @object
	.size	p4_l1, 1
p4_l1:
	.zero	1
	.globl	_x_p4_l1
	.type	_x_p4_l1, @object
	.size	_x_p4_l1, 1
_x_p4_l1:
	.zero	1
	.globl	p1_l0
	.type	p1_l0, @object
	.size	p1_l0, 1
p1_l0:
	.zero	1
	.globl	_x_p1_l0
	.type	_x_p1_l0, @object
	.size	_x_p1_l0, 1
_x_p1_l0:
	.zero	1
	.globl	p4_l0
	.type	p4_l0, @object
	.size	p4_l0, 1
p4_l0:
	.zero	1
	.globl	_x_p4_l0
	.type	_x_p4_l0, @object
	.size	_x_p4_l0, 1
_x_p4_l0:
	.zero	1
	.globl	p10_l1
	.type	p10_l1, @object
	.size	p10_l1, 1
p10_l1:
	.zero	1
	.globl	_x_p10_l1
	.type	_x_p10_l1, @object
	.size	_x_p10_l1, 1
_x_p10_l1:
	.zero	1
	.globl	p4_x
	.align 4
	.type	p4_x, @object
	.size	p4_x, 4
p4_x:
	.zero	4
	.globl	_x_p4_x
	.align 4
	.type	_x_p4_x, @object
	.size	_x_p4_x, 4
_x_p4_x:
	.zero	4
	.globl	p15_l0
	.type	p15_l0, @object
	.size	p15_l0, 1
p15_l0:
	.zero	1
	.globl	_x_p15_l0
	.type	_x_p15_l0, @object
	.size	_x_p15_l0, 1
_x_p15_l0:
	.zero	1
	.globl	p7_x
	.align 4
	.type	p7_x, @object
	.size	p7_x, 4
p7_x:
	.zero	4
	.globl	_x_p7_x
	.align 4
	.type	_x_p7_x, @object
	.size	_x_p7_x, 4
_x_p7_x:
	.zero	4
	.globl	_diverge_delta
	.align 4
	.type	_diverge_delta, @object
	.size	_diverge_delta, 4
_diverge_delta:
	.zero	4
	.globl	_x__diverge_delta
	.align 4
	.type	_x__diverge_delta, @object
	.size	_x__diverge_delta, 4
_x__diverge_delta:
	.zero	4
	.globl	p0_l1
	.type	p0_l1, @object
	.size	p0_l1, 1
p0_l1:
	.zero	1
	.globl	_x_p0_l1
	.type	_x_p0_l1, @object
	.size	_x_p0_l1, 1
_x_p0_l1:
	.zero	1
	.globl	p18_l0
	.type	p18_l0, @object
	.size	p18_l0, 1
p18_l0:
	.zero	1
	.globl	_x_p18_l0
	.type	_x_p18_l0, @object
	.size	_x_p18_l0, 1
_x_p18_l0:
	.zero	1
	.globl	p21_x
	.align 4
	.type	p21_x, @object
	.size	p21_x, 4
p21_x:
	.zero	4
	.globl	_x_p21_x
	.align 4
	.type	_x_p21_x, @object
	.size	_x_p21_x, 4
_x_p21_x:
	.zero	4
	.globl	p3_l1
	.type	p3_l1, @object
	.size	p3_l1, 1
p3_l1:
	.zero	1
	.globl	_x_p3_l1
	.type	_x_p3_l1, @object
	.size	_x_p3_l1, 1
_x_p3_l1:
	.zero	1
	.globl	p3_l0
	.type	p3_l0, @object
	.size	p3_l0, 1
p3_l0:
	.zero	1
	.globl	_x_p3_l0
	.type	_x_p3_l0, @object
	.size	_x_p3_l0, 1
_x_p3_l0:
	.zero	1
	.globl	p9_l1
	.type	p9_l1, @object
	.size	p9_l1, 1
p9_l1:
	.zero	1
	.globl	_x_p9_l1
	.type	_x_p9_l1, @object
	.size	_x_p9_l1, 1
_x_p9_l1:
	.zero	1
	.globl	p23_x
	.align 4
	.type	p23_x, @object
	.size	p23_x, 4
p23_x:
	.zero	4
	.globl	_x_p23_x
	.align 4
	.type	_x_p23_x, @object
	.size	_x_p23_x, 4
_x_p23_x:
	.zero	4
	.globl	p5_l1
	.type	p5_l1, @object
	.size	p5_l1, 1
p5_l1:
	.zero	1
	.globl	_x_p5_l1
	.type	_x_p5_l1, @object
	.size	_x_p5_l1, 1
_x_p5_l1:
	.zero	1
	.globl	p18_l1
	.type	p18_l1, @object
	.size	p18_l1, 1
p18_l1:
	.zero	1
	.globl	_x_p18_l1
	.type	_x_p18_l1, @object
	.size	_x_p18_l1, 1
_x_p18_l1:
	.zero	1
	.globl	p1_x
	.align 4
	.type	p1_x, @object
	.size	p1_x, 4
p1_x:
	.zero	4
	.globl	_x_p1_x
	.align 4
	.type	_x_p1_x, @object
	.size	_x_p1_x, 4
_x_p1_x:
	.zero	4
	.globl	p9_l0
	.type	p9_l0, @object
	.size	p9_l0, 1
p9_l0:
	.zero	1
	.globl	_x_p9_l0
	.type	_x_p9_l0, @object
	.size	_x_p9_l0, 1
_x_p9_l0:
	.zero	1
	.globl	p15_l1
	.type	p15_l1, @object
	.size	p15_l1, 1
p15_l1:
	.zero	1
	.globl	_x_p15_l1
	.type	_x_p15_l1, @object
	.size	_x_p15_l1, 1
_x_p15_l1:
	.zero	1
	.globl	p3_x
	.align 4
	.type	p3_x, @object
	.size	p3_x, 4
p3_x:
	.zero	4
	.globl	_x_p3_x
	.align 4
	.type	_x_p3_x, @object
	.size	_x_p3_x, 4
_x_p3_x:
	.zero	4
	.globl	p14_l0
	.type	p14_l0, @object
	.size	p14_l0, 1
p14_l0:
	.zero	1
	.globl	_x_p14_l0
	.type	_x_p14_l0, @object
	.size	_x_p14_l0, 1
_x_p14_l0:
	.zero	1
	.globl	id
	.align 4
	.type	id, @object
	.size	id, 4
id:
	.zero	4
	.globl	_x_id
	.align 4
	.type	_x_id, @object
	.size	_x_id, 4
_x_id:
	.zero	4
	.globl	turn
	.align 4
	.type	turn, @object
	.size	turn, 4
turn:
	.zero	4
	.globl	_x_turn
	.align 4
	.type	_x_turn, @object
	.size	_x_turn, 4
_x_turn:
	.zero	4
	.globl	p6_l0
	.type	p6_l0, @object
	.size	p6_l0, 1
p6_l0:
	.zero	1
	.globl	_x_p6_l0
	.type	_x_p6_l0, @object
	.size	_x_p6_l0, 1
_x_p6_l0:
	.zero	1
	.globl	p12_l1
	.type	p12_l1, @object
	.size	p12_l1, 1
p12_l1:
	.zero	1
	.globl	_x_p12_l1
	.type	_x_p12_l1, @object
	.size	_x_p12_l1, 1
_x_p12_l1:
	.zero	1
	.globl	p0_x
	.align 4
	.type	p0_x, @object
	.size	p0_x, 4
p0_x:
	.zero	4
	.globl	_x_p0_x
	.align 4
	.type	_x_p0_x, @object
	.size	_x_p0_x, 4
_x_p0_x:
	.zero	4
	.globl	p7_l1
	.type	p7_l1, @object
	.size	p7_l1, 1
p7_l1:
	.zero	1
	.globl	_x_p7_l1
	.type	_x_p7_l1, @object
	.size	_x_p7_l1, 1
_x_p7_l1:
	.zero	1
	.globl	p0_l0
	.type	p0_l0, @object
	.size	p0_l0, 1
p0_l0:
	.zero	1
	.globl	_x_p0_l0
	.type	_x_p0_l0, @object
	.size	_x_p0_l0, 1
_x_p0_l0:
	.zero	1
	.globl	p13_x
	.align 4
	.type	p13_x, @object
	.size	p13_x, 4
p13_x:
	.zero	4
	.globl	_x_p13_x
	.align 4
	.type	_x_p13_x, @object
	.size	_x_p13_x, 4
_x_p13_x:
	.zero	4
	.globl	delta
	.align 4
	.type	delta, @object
	.size	delta, 4
delta:
	.zero	4
	.globl	_x_delta
	.align 4
	.type	_x_delta, @object
	.size	_x_delta, 4
_x_delta:
	.zero	4
	.globl	p1_l1
	.type	p1_l1, @object
	.size	p1_l1, 1
p1_l1:
	.zero	1
	.globl	_x_p1_l1
	.type	_x_p1_l1, @object
	.size	_x_p1_l1, 1
_x_p1_l1:
	.zero	1
	.globl	p2_x
	.align 4
	.type	p2_x, @object
	.size	p2_x, 4
p2_x:
	.zero	4
	.globl	_x_p2_x
	.align 4
	.type	_x_p2_x, @object
	.size	_x_p2_x, 4
_x_p2_x:
	.zero	4
	.globl	p13_l0
	.type	p13_l0, @object
	.size	p13_l0, 1
p13_l0:
	.zero	1
	.globl	_x_p13_l0
	.type	_x_p13_l0, @object
	.size	_x_p13_l0, 1
_x_p13_l0:
	.zero	1
	.globl	p2_l0
	.type	p2_l0, @object
	.size	p2_l0, 1
p2_l0:
	.zero	1
	.globl	_x_p2_l0
	.type	_x_p2_l0, @object
	.size	_x_p2_l0, 1
_x_p2_l0:
	.zero	1
	.globl	p8_l1
	.type	p8_l1, @object
	.size	p8_l1, 1
p8_l1:
	.zero	1
	.globl	_x_p8_l1
	.type	_x_p8_l1, @object
	.size	_x_p8_l1, 1
_x_p8_l1:
	.zero	1
	.globl	p6_x
	.align 4
	.type	p6_x, @object
	.size	p6_x, 4
p6_x:
	.zero	4
	.globl	_x_p6_x
	.align 4
	.type	_x_p6_x, @object
	.size	_x_p6_x, 4
_x_p6_x:
	.zero	4
	.globl	p17_l0
	.type	p17_l0, @object
	.size	p17_l0, 1
p17_l0:
	.zero	1
	.globl	_x_p17_l0
	.type	_x_p17_l0, @object
	.size	_x_p17_l0, 1
_x_p17_l0:
	.zero	1
	.globl	p20_x
	.align 4
	.type	p20_x, @object
	.size	p20_x, 4
p20_x:
	.zero	4
	.globl	_x_p20_x
	.align 4
	.type	_x_p20_x, @object
	.size	_x_p20_x, 4
_x_p20_x:
	.zero	4
	.globl	p2_l1
	.type	p2_l1, @object
	.size	p2_l1, 1
p2_l1:
	.zero	1
	.globl	_x_p2_l1
	.type	_x_p2_l1, @object
	.size	_x_p2_l1, 1
_x_p2_l1:
	.zero	1
	.globl	p9_x
	.align 4
	.type	p9_x, @object
	.size	p9_x, 4
p9_x:
	.zero	4
	.globl	_x_p9_x
	.align 4
	.type	_x_p9_x, @object
	.size	_x_p9_x, 4
_x_p9_x:
	.zero	4
	.globl	p10_x
	.align 4
	.type	p10_x, @object
	.size	p10_x, 4
p10_x:
	.zero	4
	.globl	_x_p10_x
	.align 4
	.type	_x_p10_x, @object
	.size	_x_p10_x, 4
_x_p10_x:
	.zero	4
	.globl	p10_l0
	.type	p10_l0, @object
	.size	p10_l0, 1
p10_l0:
	.zero	1
	.globl	_x_p10_l0
	.type	_x_p10_l0, @object
	.size	_x_p10_l0, 1
_x_p10_l0:
	.zero	1
	.globl	p16_l1
	.type	p16_l1, @object
	.size	p16_l1, 1
p16_l1:
	.zero	1
	.globl	_x_p16_l1
	.type	_x_p16_l1, @object
	.size	_x_p16_l1, 1
_x_p16_l1:
	.zero	1
	.globl	p11_x
	.align 4
	.type	p11_x, @object
	.size	p11_x, 4
p11_x:
	.zero	4
	.globl	_x_p11_x
	.align 4
	.type	_x_p11_x, @object
	.size	_x_p11_x, 4
_x_p11_x:
	.zero	4
	.globl	p11_l0
	.type	p11_l0, @object
	.size	p11_l0, 1
p11_l0:
	.zero	1
	.globl	_x_p11_l0
	.type	_x_p11_l0, @object
	.size	_x_p11_l0, 1
_x_p11_l0:
	.zero	1
	.globl	p17_l1
	.type	p17_l1, @object
	.size	p17_l1, 1
p17_l1:
	.zero	1
	.globl	_x_p17_l1
	.type	_x_p17_l1, @object
	.size	_x_p17_l1, 1
_x_p17_l1:
	.zero	1
	.globl	p12_x
	.align 4
	.type	p12_x, @object
	.size	p12_x, 4
p12_x:
	.zero	4
	.globl	_x_p12_x
	.align 4
	.type	_x_p12_x, @object
	.size	_x_p12_x, 4
_x_p12_x:
	.zero	4
	.globl	p12_l0
	.type	p12_l0, @object
	.size	p12_l0, 1
p12_l0:
	.zero	1
	.globl	_x_p12_l0
	.type	_x_p12_l0, @object
	.size	_x_p12_l0, 1
_x_p12_l0:
	.zero	1
	.globl	p14_x
	.align 4
	.type	p14_x, @object
	.size	p14_x, 4
p14_x:
	.zero	4
	.globl	_x_p14_x
	.align 4
	.type	_x_p14_x, @object
	.size	_x_p14_x, 4
_x_p14_x:
	.zero	4
	.globl	p15_x
	.align 4
	.type	p15_x, @object
	.size	p15_x, 4
p15_x:
	.zero	4
	.globl	_x_p15_x
	.align 4
	.type	_x_p15_x, @object
	.size	_x_p15_x, 4
_x_p15_x:
	.zero	4
	.globl	p16_x
	.align 4
	.type	p16_x, @object
	.size	p16_x, 4
p16_x:
	.zero	4
	.globl	_x_p16_x
	.align 4
	.type	_x_p16_x, @object
	.size	_x_p16_x, 4
_x_p16_x:
	.zero	4
	.globl	p17_x
	.align 4
	.type	p17_x, @object
	.size	p17_x, 4
p17_x:
	.zero	4
	.globl	_x_p17_x
	.align 4
	.type	_x_p17_x, @object
	.size	_x_p17_x, 4
_x_p17_x:
	.zero	4
	.globl	p18_x
	.align 4
	.type	p18_x, @object
	.size	p18_x, 4
p18_x:
	.zero	4
	.globl	_x_p18_x
	.align 4
	.type	_x_p18_x, @object
	.size	_x_p18_x, 4
_x_p18_x:
	.zero	4
	.text
	.globl	main
	.type	main, @function
main:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p23_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p23_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p22_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p22_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p21_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p21_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p20_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p20_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p19_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p19_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p19_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p8_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p14_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p7_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p13_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p6_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p5_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p11_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p5_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p16_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p8_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p22_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p4_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p1_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p4_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p10_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p4_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p15_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p7_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _diverge_delta[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p0_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p18_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p21_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p3_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p3_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p9_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p23_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p5_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p18_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p1_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p9_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p15_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p3_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p14_l0[rip], al
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR id[rip], eax
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR turn[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p6_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p12_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p0_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p7_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p0_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p13_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR delta[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p1_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p2_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p13_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p2_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p8_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p6_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p17_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p20_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p2_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p9_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p10_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p10_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p16_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p11_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p11_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p17_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p12_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p12_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p14_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p15_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p16_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p17_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p18_x[rip], eax
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L4
	movzx	eax, BYTE PTR p23_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p23_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p23_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p23_l0[rip]
	test	al, al
	jne	.L6
	movzx	eax, BYTE PTR p23_l1[rip]
	test	al, al
	je	.L7
.L6:
	movzx	eax, BYTE PTR p23_l0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR p23_l1[rip]
	test	al, al
	je	.L7
.L8:
	movzx	eax, BYTE PTR p23_l1[rip]
	test	al, al
	je	.L9
	movzx	eax, BYTE PTR p23_l0[rip]
	test	al, al
	je	.L7
.L9:
	movzx	eax, BYTE PTR p23_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p23_l1[rip]
	test	al, al
	je	.L4
.L7:
	movss	xmm1, DWORD PTR p23_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L10
	movzx	eax, BYTE PTR p23_l1[rip]
	test	al, al
	je	.L10
	movzx	eax, BYTE PTR p23_l0[rip]
	test	al, al
	je	.L4
.L10:
	movzx	eax, BYTE PTR p22_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p22_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p22_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p22_l0[rip]
	test	al, al
	jne	.L12
	movzx	eax, BYTE PTR p22_l1[rip]
	test	al, al
	je	.L13
.L12:
	movzx	eax, BYTE PTR p22_l0[rip]
	test	al, al
	je	.L14
	movzx	eax, BYTE PTR p22_l1[rip]
	test	al, al
	je	.L13
.L14:
	movzx	eax, BYTE PTR p22_l1[rip]
	test	al, al
	je	.L15
	movzx	eax, BYTE PTR p22_l0[rip]
	test	al, al
	je	.L13
.L15:
	movzx	eax, BYTE PTR p22_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p22_l1[rip]
	test	al, al
	je	.L4
.L13:
	movss	xmm1, DWORD PTR p22_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L16
	movzx	eax, BYTE PTR p22_l1[rip]
	test	al, al
	je	.L16
	movzx	eax, BYTE PTR p22_l0[rip]
	test	al, al
	je	.L4
.L16:
	movzx	eax, BYTE PTR p21_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p21_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p21_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p21_l0[rip]
	test	al, al
	jne	.L18
	movzx	eax, BYTE PTR p21_l1[rip]
	test	al, al
	je	.L19
.L18:
	movzx	eax, BYTE PTR p21_l0[rip]
	test	al, al
	je	.L20
	movzx	eax, BYTE PTR p21_l1[rip]
	test	al, al
	je	.L19
.L20:
	movzx	eax, BYTE PTR p21_l1[rip]
	test	al, al
	je	.L21
	movzx	eax, BYTE PTR p21_l0[rip]
	test	al, al
	je	.L19
.L21:
	movzx	eax, BYTE PTR p21_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p21_l1[rip]
	test	al, al
	je	.L4
.L19:
	movss	xmm1, DWORD PTR p21_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L22
	movzx	eax, BYTE PTR p21_l1[rip]
	test	al, al
	je	.L22
	movzx	eax, BYTE PTR p21_l0[rip]
	test	al, al
	je	.L4
.L22:
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p20_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	jne	.L24
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	je	.L25
.L24:
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	je	.L26
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	je	.L25
.L26:
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	je	.L27
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	je	.L25
.L27:
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	je	.L4
.L25:
	movss	xmm1, DWORD PTR p20_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L28
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	je	.L28
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	je	.L4
.L28:
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p19_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	jne	.L30
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	je	.L31
.L30:
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	je	.L32
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	je	.L31
.L32:
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	je	.L33
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	je	.L31
.L33:
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	je	.L4
.L31:
	movss	xmm1, DWORD PTR p19_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L34
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	je	.L34
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	je	.L4
.L34:
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p18_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	jne	.L36
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	je	.L37
.L36:
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	je	.L38
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	je	.L37
.L38:
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	je	.L39
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	je	.L37
.L39:
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	je	.L4
.L37:
	movss	xmm1, DWORD PTR p18_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L40
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	je	.L40
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	je	.L4
.L40:
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p17_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	jne	.L42
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	je	.L43
.L42:
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	je	.L44
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	je	.L43
.L44:
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	je	.L45
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	je	.L43
.L45:
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	je	.L4
.L43:
	movss	xmm1, DWORD PTR p17_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L46
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	je	.L46
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	je	.L4
.L46:
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p16_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L48
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L49
.L48:
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L50
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L49
.L50:
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L51
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L49
.L51:
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L4
.L49:
	movss	xmm1, DWORD PTR p16_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L52
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L52
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L4
.L52:
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p15_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L54
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L55
.L54:
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L56
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L55
.L56:
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L57
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L55
.L57:
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L4
.L55:
	movss	xmm1, DWORD PTR p15_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L58
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L58
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L4
.L58:
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p14_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L60
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L61
.L60:
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L62
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L61
.L62:
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L63
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L61
.L63:
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L4
.L61:
	movss	xmm1, DWORD PTR p14_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L64
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L64
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L4
.L64:
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p13_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L66
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L67
.L66:
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L68
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L67
.L68:
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L69
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L67
.L69:
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L4
.L67:
	movss	xmm1, DWORD PTR p13_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L70
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L70
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L4
.L70:
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p12_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L72
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L73
.L72:
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L74
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L73
.L74:
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L75
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L73
.L75:
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L4
.L73:
	movss	xmm1, DWORD PTR p12_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L76
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L76
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L4
.L76:
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p11_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L78
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L79
.L78:
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L80
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L79
.L80:
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L81
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L79
.L81:
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L4
.L79:
	movss	xmm1, DWORD PTR p11_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L82
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L82
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L4
.L82:
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p10_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L84
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L85
.L84:
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L86
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L85
.L86:
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L87
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L85
.L87:
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L4
.L85:
	movss	xmm1, DWORD PTR p10_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L88
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L88
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L4
.L88:
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p9_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L90
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L91
.L90:
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L92
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L91
.L92:
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L93
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L91
.L93:
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L4
.L91:
	movss	xmm1, DWORD PTR p9_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L94
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L94
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L4
.L94:
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p8_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L96
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L97
.L96:
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L98
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L97
.L98:
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L99
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L97
.L99:
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L4
.L97:
	movss	xmm1, DWORD PTR p8_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L100
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L100
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L4
.L100:
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p7_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L102
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L103
.L102:
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L104
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L103
.L104:
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L105
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L103
.L105:
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L4
.L103:
	movss	xmm1, DWORD PTR p7_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L106
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L106
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L4
.L106:
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p6_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L108
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L109
.L108:
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L110
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L109
.L110:
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L111
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L109
.L111:
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L4
.L109:
	movss	xmm1, DWORD PTR p6_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L112
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L112
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L4
.L112:
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p5_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L114
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L115
.L114:
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L116
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L115
.L116:
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L117
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L115
.L117:
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L4
.L115:
	movss	xmm1, DWORD PTR p5_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L118
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L118
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L4
.L118:
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p4_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L120
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L121
.L120:
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L122
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L121
.L122:
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L123
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L121
.L123:
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L4
.L121:
	movss	xmm1, DWORD PTR p4_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L124
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L124
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L4
.L124:
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p3_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L126
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L127
.L126:
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L128
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L127
.L128:
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L129
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L127
.L129:
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L4
.L127:
	movss	xmm1, DWORD PTR p3_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L130
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L130
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L4
.L130:
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p2_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L132
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L133
.L132:
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L134
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L133
.L134:
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L135
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L133
.L135:
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L4
.L133:
	movss	xmm1, DWORD PTR p2_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L136
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L136
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L4
.L136:
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p1_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L138
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L139
.L138:
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L140
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L139
.L140:
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L141
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L139
.L141:
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L4
.L139:
	movss	xmm1, DWORD PTR p1_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L142
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L142
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L4
.L142:
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p0_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L144
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L145
.L144:
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L146
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L145
.L146:
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L147
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L145
.L147:
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L4
.L145:
	movss	xmm1, DWORD PTR p0_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L148
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L148
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L4
.L148:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jb	.L4
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 24
	je	.L150
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 23
	je	.L150
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 22
	je	.L150
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 21
	je	.L150
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 20
	je	.L150
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 19
	je	.L150
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 18
	je	.L150
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 17
	je	.L150
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 16
	je	.L150
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 15
	je	.L150
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 14
	je	.L150
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 13
	je	.L150
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 12
	je	.L150
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 11
	je	.L150
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 10
	je	.L150
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 9
	je	.L150
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 8
	je	.L150
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 7
	je	.L150
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 6
	je	.L150
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 5
	je	.L150
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 4
	je	.L150
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 3
	je	.L150
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 2
	je	.L150
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	je	.L150
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 1
	jne	.L4
.L150:
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 24
	je	.L151
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 23
	je	.L151
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 22
	je	.L151
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 21
	je	.L151
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 20
	je	.L151
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 19
	je	.L151
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 18
	je	.L151
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 17
	je	.L151
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 16
	je	.L151
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 15
	je	.L151
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 14
	je	.L151
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 13
	je	.L151
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 12
	je	.L151
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 11
	je	.L151
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 10
	je	.L151
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 9
	je	.L151
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 8
	je	.L151
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 7
	je	.L151
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 6
	je	.L151
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 5
	je	.L151
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 4
	je	.L151
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 3
	je	.L151
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 1
	je	.L151
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 2
	jne	.L4
.L151:
	movss	xmm0, DWORD PTR delta[rip]
	movss	xmm1, DWORD PTR _diverge_delta[rip]
	ucomiss	xmm0, xmm1
	jp	.L4
	ucomiss	xmm0, xmm1
	jne	.L4
	mov	eax, 1
	jmp	.L153
.L4:
	mov	eax, 0
.L153:
	mov	DWORD PTR -4[rbp], eax
	jmp	.L154
.L841:
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p23_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p23_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p22_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p22_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p21_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p21_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p20_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p20_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p19_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p19_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p19_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p8_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p14_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p7_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p13_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p6_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p5_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p11_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p5_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p16_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p8_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p22_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p4_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p1_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p4_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p10_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p4_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p15_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p7_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x__diverge_delta[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p0_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p18_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p21_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p3_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p3_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p9_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p23_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p5_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p18_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p1_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p9_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p15_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p3_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p14_l0[rip], al
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR _x_id[rip], eax
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR _x_turn[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p6_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p12_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p0_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p7_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p0_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p13_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_delta[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p1_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p2_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p13_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p2_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p8_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p6_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p17_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p20_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p2_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p9_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p10_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p10_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p16_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p11_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p11_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p17_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p12_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p12_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p14_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p15_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p16_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p17_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p18_x[rip], eax
	movzx	eax, BYTE PTR _x_p23_l0[rip]
	test	al, al
	jne	.L155
	movzx	eax, BYTE PTR _x_p23_l1[rip]
	test	al, al
	je	.L156
.L155:
	movzx	eax, BYTE PTR _x_p23_l0[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR _x_p23_l1[rip]
	test	al, al
	je	.L156
.L157:
	movzx	eax, BYTE PTR _x_p23_l1[rip]
	test	al, al
	je	.L158
	movzx	eax, BYTE PTR _x_p23_l0[rip]
	test	al, al
	je	.L156
.L158:
	movzx	eax, BYTE PTR _x_p23_l0[rip]
	test	al, al
	je	.L159
	movzx	eax, BYTE PTR _x_p23_l1[rip]
	test	al, al
	je	.L159
.L156:
	movss	xmm1, DWORD PTR _x_p23_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L160
	movzx	eax, BYTE PTR _x_p23_l1[rip]
	test	al, al
	je	.L160
	movzx	eax, BYTE PTR _x_p23_l0[rip]
	test	al, al
	je	.L159
.L160:
	movzx	eax, BYTE PTR p23_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p23_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L161
	movzx	eax, BYTE PTR p23_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p23_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L161
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p23_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p23_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L161
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L162
.L161:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L159
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 24
	jne	.L159
.L162:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L165
	movzx	eax, BYTE PTR _x_p23_l1[rip]
	test	al, al
	je	.L165
	movzx	eax, BYTE PTR _x_p23_l0[rip]
	test	al, al
	jne	.L165
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L165
	movss	xmm0, DWORD PTR _x_p23_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L165
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L166
.L165:
	movzx	eax, BYTE PTR p23_l0[rip]
	test	al, al
	jne	.L166
	movzx	eax, BYTE PTR p23_l1[rip]
	test	al, al
	jne	.L166
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L166
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L166
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 24
	je	.L159
.L166:
	movzx	eax, BYTE PTR _x_p23_l0[rip]
	test	al, al
	je	.L168
	movzx	eax, BYTE PTR _x_p23_l1[rip]
	test	al, al
	jne	.L168
	movss	xmm1, DWORD PTR p23_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L168
	movss	xmm0, DWORD PTR _x_p23_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L168
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L168
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 24
	je	.L171
.L168:
	movzx	eax, BYTE PTR p23_l1[rip]
	test	al, al
	je	.L171
	movzx	eax, BYTE PTR p23_l0[rip]
	test	al, al
	jne	.L171
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L171
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L171
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 24
	je	.L159
.L171:
	movzx	eax, BYTE PTR _x_p23_l0[rip]
	test	al, al
	jne	.L172
	movzx	eax, BYTE PTR _x_p23_l1[rip]
	test	al, al
	je	.L173
.L172:
	movzx	eax, BYTE PTR _x_p23_l0[rip]
	test	al, al
	je	.L174
	movzx	eax, BYTE PTR _x_p23_l1[rip]
	test	al, al
	jne	.L173
.L174:
	movzx	eax, BYTE PTR p23_l0[rip]
	test	al, al
	je	.L173
	movzx	eax, BYTE PTR p23_l1[rip]
	test	al, al
	jne	.L173
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L173
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L173
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 24
	je	.L159
.L173:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L175
	movss	xmm0, DWORD PTR _x_p23_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L175
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L175
	movss	xmm1, DWORD PTR p23_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L175
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 24
	jne	.L177
.L175:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L177
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L177
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 24
	jne	.L177
	movzx	eax, BYTE PTR _x_p23_l0[rip]
	test	al, al
	jne	.L177
	movzx	eax, BYTE PTR _x_p23_l1[rip]
	test	al, al
	jne	.L177
	movzx	eax, BYTE PTR p23_l0[rip]
	test	al, al
	je	.L177
	movzx	eax, BYTE PTR p23_l1[rip]
	test	al, al
	je	.L159
.L177:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L178
	movss	xmm0, DWORD PTR p23_x[rip]
	movss	xmm1, DWORD PTR _x_p23_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L178
	ucomiss	xmm0, xmm1
	jne	.L178
	movss	xmm1, DWORD PTR p23_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L178
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 24
	je	.L180
.L178:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L180
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L180
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 24
	jne	.L180
	movzx	eax, BYTE PTR p23_l0[rip]
	test	al, al
	je	.L180
	movzx	eax, BYTE PTR p23_l1[rip]
	test	al, al
	jne	.L180
	movzx	eax, BYTE PTR _x_p23_l0[rip]
	test	al, al
	je	.L180
	movzx	eax, BYTE PTR _x_p23_l1[rip]
	test	al, al
	jne	.L159
.L180:
	movzx	eax, BYTE PTR _x_p23_l0[rip]
	test	al, al
	jne	.L181
	movzx	eax, BYTE PTR _x_p23_l1[rip]
	test	al, al
	jne	.L181
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L181
	movss	xmm0, DWORD PTR p23_x[rip]
	movss	xmm1, DWORD PTR _x_p23_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L181
	ucomiss	xmm0, xmm1
	je	.L182
.L181:
	movzx	eax, BYTE PTR p23_l0[rip]
	test	al, al
	je	.L182
	movzx	eax, BYTE PTR p23_l1[rip]
	test	al, al
	je	.L182
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L182
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L182
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 24
	je	.L159
.L182:
	movzx	eax, BYTE PTR _x_p22_l0[rip]
	test	al, al
	jne	.L184
	movzx	eax, BYTE PTR _x_p22_l1[rip]
	test	al, al
	je	.L185
.L184:
	movzx	eax, BYTE PTR _x_p22_l0[rip]
	test	al, al
	je	.L186
	movzx	eax, BYTE PTR _x_p22_l1[rip]
	test	al, al
	je	.L185
.L186:
	movzx	eax, BYTE PTR _x_p22_l1[rip]
	test	al, al
	je	.L187
	movzx	eax, BYTE PTR _x_p22_l0[rip]
	test	al, al
	je	.L185
.L187:
	movzx	eax, BYTE PTR _x_p22_l0[rip]
	test	al, al
	je	.L159
	movzx	eax, BYTE PTR _x_p22_l1[rip]
	test	al, al
	je	.L159
.L185:
	movss	xmm1, DWORD PTR _x_p22_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L188
	movzx	eax, BYTE PTR _x_p22_l1[rip]
	test	al, al
	je	.L188
	movzx	eax, BYTE PTR _x_p22_l0[rip]
	test	al, al
	je	.L159
.L188:
	movzx	eax, BYTE PTR p22_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p22_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L189
	movzx	eax, BYTE PTR p22_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p22_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L189
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p22_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p22_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L189
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L190
.L189:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L159
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 23
	jne	.L159
.L190:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L193
	movzx	eax, BYTE PTR _x_p22_l1[rip]
	test	al, al
	je	.L193
	movzx	eax, BYTE PTR _x_p22_l0[rip]
	test	al, al
	jne	.L193
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L193
	movss	xmm0, DWORD PTR _x_p22_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L193
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L194
.L193:
	movzx	eax, BYTE PTR p22_l0[rip]
	test	al, al
	jne	.L194
	movzx	eax, BYTE PTR p22_l1[rip]
	test	al, al
	jne	.L194
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L194
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L194
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 23
	je	.L159
.L194:
	movzx	eax, BYTE PTR _x_p22_l0[rip]
	test	al, al
	je	.L196
	movzx	eax, BYTE PTR _x_p22_l1[rip]
	test	al, al
	jne	.L196
	movss	xmm1, DWORD PTR p22_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L196
	movss	xmm0, DWORD PTR _x_p22_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L196
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L196
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 23
	je	.L199
.L196:
	movzx	eax, BYTE PTR p22_l1[rip]
	test	al, al
	je	.L199
	movzx	eax, BYTE PTR p22_l0[rip]
	test	al, al
	jne	.L199
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L199
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L199
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 23
	je	.L159
.L199:
	movzx	eax, BYTE PTR _x_p22_l0[rip]
	test	al, al
	jne	.L200
	movzx	eax, BYTE PTR _x_p22_l1[rip]
	test	al, al
	je	.L201
.L200:
	movzx	eax, BYTE PTR _x_p22_l0[rip]
	test	al, al
	je	.L202
	movzx	eax, BYTE PTR _x_p22_l1[rip]
	test	al, al
	jne	.L201
.L202:
	movzx	eax, BYTE PTR p22_l0[rip]
	test	al, al
	je	.L201
	movzx	eax, BYTE PTR p22_l1[rip]
	test	al, al
	jne	.L201
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L201
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L201
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 23
	je	.L159
.L201:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L203
	movss	xmm0, DWORD PTR _x_p22_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L203
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L203
	movss	xmm1, DWORD PTR p22_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L203
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 23
	jne	.L205
.L203:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L205
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L205
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 23
	jne	.L205
	movzx	eax, BYTE PTR _x_p22_l0[rip]
	test	al, al
	jne	.L205
	movzx	eax, BYTE PTR _x_p22_l1[rip]
	test	al, al
	jne	.L205
	movzx	eax, BYTE PTR p22_l0[rip]
	test	al, al
	je	.L205
	movzx	eax, BYTE PTR p22_l1[rip]
	test	al, al
	je	.L159
.L205:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L206
	movss	xmm0, DWORD PTR p22_x[rip]
	movss	xmm1, DWORD PTR _x_p22_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L206
	ucomiss	xmm0, xmm1
	jne	.L206
	movss	xmm1, DWORD PTR p22_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L206
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 23
	je	.L208
.L206:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L208
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L208
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 23
	jne	.L208
	movzx	eax, BYTE PTR p22_l0[rip]
	test	al, al
	je	.L208
	movzx	eax, BYTE PTR p22_l1[rip]
	test	al, al
	jne	.L208
	movzx	eax, BYTE PTR _x_p22_l0[rip]
	test	al, al
	je	.L208
	movzx	eax, BYTE PTR _x_p22_l1[rip]
	test	al, al
	jne	.L159
.L208:
	movzx	eax, BYTE PTR _x_p22_l0[rip]
	test	al, al
	jne	.L209
	movzx	eax, BYTE PTR _x_p22_l1[rip]
	test	al, al
	jne	.L209
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L209
	movss	xmm0, DWORD PTR p22_x[rip]
	movss	xmm1, DWORD PTR _x_p22_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L209
	ucomiss	xmm0, xmm1
	je	.L210
.L209:
	movzx	eax, BYTE PTR p22_l0[rip]
	test	al, al
	je	.L210
	movzx	eax, BYTE PTR p22_l1[rip]
	test	al, al
	je	.L210
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L210
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L210
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 23
	je	.L159
.L210:
	movzx	eax, BYTE PTR _x_p21_l0[rip]
	test	al, al
	jne	.L212
	movzx	eax, BYTE PTR _x_p21_l1[rip]
	test	al, al
	je	.L213
.L212:
	movzx	eax, BYTE PTR _x_p21_l0[rip]
	test	al, al
	je	.L214
	movzx	eax, BYTE PTR _x_p21_l1[rip]
	test	al, al
	je	.L213
.L214:
	movzx	eax, BYTE PTR _x_p21_l1[rip]
	test	al, al
	je	.L215
	movzx	eax, BYTE PTR _x_p21_l0[rip]
	test	al, al
	je	.L213
.L215:
	movzx	eax, BYTE PTR _x_p21_l0[rip]
	test	al, al
	je	.L159
	movzx	eax, BYTE PTR _x_p21_l1[rip]
	test	al, al
	je	.L159
.L213:
	movss	xmm1, DWORD PTR _x_p21_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L216
	movzx	eax, BYTE PTR _x_p21_l1[rip]
	test	al, al
	je	.L216
	movzx	eax, BYTE PTR _x_p21_l0[rip]
	test	al, al
	je	.L159
.L216:
	movzx	eax, BYTE PTR p21_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p21_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L217
	movzx	eax, BYTE PTR p21_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p21_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L217
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p21_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p21_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L217
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L218
.L217:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L159
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 22
	jne	.L159
.L218:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L221
	movzx	eax, BYTE PTR _x_p21_l1[rip]
	test	al, al
	je	.L221
	movzx	eax, BYTE PTR _x_p21_l0[rip]
	test	al, al
	jne	.L221
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L221
	movss	xmm0, DWORD PTR _x_p21_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L221
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L222
.L221:
	movzx	eax, BYTE PTR p21_l0[rip]
	test	al, al
	jne	.L222
	movzx	eax, BYTE PTR p21_l1[rip]
	test	al, al
	jne	.L222
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L222
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L222
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 22
	je	.L159
.L222:
	movzx	eax, BYTE PTR _x_p21_l0[rip]
	test	al, al
	je	.L224
	movzx	eax, BYTE PTR _x_p21_l1[rip]
	test	al, al
	jne	.L224
	movss	xmm1, DWORD PTR p21_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L224
	movss	xmm0, DWORD PTR _x_p21_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L224
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L224
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 22
	je	.L227
.L224:
	movzx	eax, BYTE PTR p21_l1[rip]
	test	al, al
	je	.L227
	movzx	eax, BYTE PTR p21_l0[rip]
	test	al, al
	jne	.L227
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L227
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L227
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 22
	je	.L159
.L227:
	movzx	eax, BYTE PTR _x_p21_l0[rip]
	test	al, al
	jne	.L228
	movzx	eax, BYTE PTR _x_p21_l1[rip]
	test	al, al
	je	.L229
.L228:
	movzx	eax, BYTE PTR _x_p21_l0[rip]
	test	al, al
	je	.L230
	movzx	eax, BYTE PTR _x_p21_l1[rip]
	test	al, al
	jne	.L229
.L230:
	movzx	eax, BYTE PTR p21_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR p21_l1[rip]
	test	al, al
	jne	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L229
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 22
	je	.L159
.L229:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L231
	movss	xmm0, DWORD PTR _x_p21_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L231
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L231
	movss	xmm1, DWORD PTR p21_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L231
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 22
	jne	.L233
.L231:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L233
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L233
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 22
	jne	.L233
	movzx	eax, BYTE PTR _x_p21_l0[rip]
	test	al, al
	jne	.L233
	movzx	eax, BYTE PTR _x_p21_l1[rip]
	test	al, al
	jne	.L233
	movzx	eax, BYTE PTR p21_l0[rip]
	test	al, al
	je	.L233
	movzx	eax, BYTE PTR p21_l1[rip]
	test	al, al
	je	.L159
.L233:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L234
	movss	xmm0, DWORD PTR p21_x[rip]
	movss	xmm1, DWORD PTR _x_p21_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L234
	ucomiss	xmm0, xmm1
	jne	.L234
	movss	xmm1, DWORD PTR p21_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L234
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 22
	je	.L236
.L234:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L236
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L236
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 22
	jne	.L236
	movzx	eax, BYTE PTR p21_l0[rip]
	test	al, al
	je	.L236
	movzx	eax, BYTE PTR p21_l1[rip]
	test	al, al
	jne	.L236
	movzx	eax, BYTE PTR _x_p21_l0[rip]
	test	al, al
	je	.L236
	movzx	eax, BYTE PTR _x_p21_l1[rip]
	test	al, al
	jne	.L159
.L236:
	movzx	eax, BYTE PTR _x_p21_l0[rip]
	test	al, al
	jne	.L237
	movzx	eax, BYTE PTR _x_p21_l1[rip]
	test	al, al
	jne	.L237
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L237
	movss	xmm0, DWORD PTR p21_x[rip]
	movss	xmm1, DWORD PTR _x_p21_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L237
	ucomiss	xmm0, xmm1
	je	.L238
.L237:
	movzx	eax, BYTE PTR p21_l0[rip]
	test	al, al
	je	.L238
	movzx	eax, BYTE PTR p21_l1[rip]
	test	al, al
	je	.L238
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L238
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L238
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 22
	je	.L159
.L238:
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	jne	.L240
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	je	.L241
.L240:
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	je	.L242
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	je	.L241
.L242:
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	je	.L243
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	je	.L241
.L243:
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	je	.L159
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	je	.L159
.L241:
	movss	xmm1, DWORD PTR _x_p20_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L244
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	je	.L244
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	je	.L159
.L244:
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L245
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L245
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p20_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p20_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L245
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L246
.L245:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L159
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 21
	jne	.L159
.L246:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L249
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	je	.L249
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	jne	.L249
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L249
	movss	xmm0, DWORD PTR _x_p20_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L249
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L250
.L249:
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	jne	.L250
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	jne	.L250
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L250
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L250
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 21
	je	.L159
.L250:
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	je	.L252
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	jne	.L252
	movss	xmm1, DWORD PTR p20_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L252
	movss	xmm0, DWORD PTR _x_p20_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L252
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L252
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 21
	je	.L255
.L252:
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	je	.L255
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	jne	.L255
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L255
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L255
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 21
	je	.L159
.L255:
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	jne	.L256
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	je	.L257
.L256:
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	je	.L258
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	jne	.L257
.L258:
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	jne	.L257
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L257
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 21
	je	.L159
.L257:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L259
	movss	xmm0, DWORD PTR _x_p20_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L259
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L259
	movss	xmm1, DWORD PTR p20_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L259
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 21
	jne	.L261
.L259:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L261
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L261
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 21
	jne	.L261
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	jne	.L261
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	jne	.L261
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	je	.L261
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	je	.L159
.L261:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L262
	movss	xmm0, DWORD PTR p20_x[rip]
	movss	xmm1, DWORD PTR _x_p20_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L262
	ucomiss	xmm0, xmm1
	jne	.L262
	movss	xmm1, DWORD PTR p20_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L262
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 21
	je	.L264
.L262:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L264
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L264
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 21
	jne	.L264
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	je	.L264
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	jne	.L264
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	je	.L264
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	jne	.L159
.L264:
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	test	al, al
	jne	.L265
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	test	al, al
	jne	.L265
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L265
	movss	xmm0, DWORD PTR p20_x[rip]
	movss	xmm1, DWORD PTR _x_p20_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L265
	ucomiss	xmm0, xmm1
	je	.L266
.L265:
	movzx	eax, BYTE PTR p20_l0[rip]
	test	al, al
	je	.L266
	movzx	eax, BYTE PTR p20_l1[rip]
	test	al, al
	je	.L266
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L266
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L266
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 21
	je	.L159
.L266:
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	jne	.L268
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	je	.L269
.L268:
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	je	.L270
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	je	.L269
.L270:
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	je	.L271
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	je	.L269
.L271:
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	je	.L159
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	je	.L159
.L269:
	movss	xmm1, DWORD PTR _x_p19_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L272
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	je	.L272
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	je	.L159
.L272:
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L273
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L273
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p19_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p19_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L273
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L274
.L273:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L159
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 20
	jne	.L159
.L274:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L277
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	je	.L277
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	jne	.L277
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L277
	movss	xmm0, DWORD PTR _x_p19_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L277
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L278
.L277:
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	jne	.L278
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	jne	.L278
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L278
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L278
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 20
	je	.L159
.L278:
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	je	.L280
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	jne	.L280
	movss	xmm1, DWORD PTR p19_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L280
	movss	xmm0, DWORD PTR _x_p19_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L280
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L280
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 20
	je	.L283
.L280:
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	je	.L283
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	jne	.L283
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L283
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L283
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 20
	je	.L159
.L283:
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	jne	.L284
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	je	.L285
.L284:
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	je	.L286
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	jne	.L285
.L286:
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	je	.L285
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	jne	.L285
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L285
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L285
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 20
	je	.L159
.L285:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L287
	movss	xmm0, DWORD PTR _x_p19_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L287
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L287
	movss	xmm1, DWORD PTR p19_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L287
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 20
	jne	.L289
.L287:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L289
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L289
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 20
	jne	.L289
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	jne	.L289
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	jne	.L289
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	je	.L289
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	je	.L159
.L289:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L290
	movss	xmm0, DWORD PTR p19_x[rip]
	movss	xmm1, DWORD PTR _x_p19_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L290
	ucomiss	xmm0, xmm1
	jne	.L290
	movss	xmm1, DWORD PTR p19_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L290
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 20
	je	.L292
.L290:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L292
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L292
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 20
	jne	.L292
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	je	.L292
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	jne	.L292
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	je	.L292
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	jne	.L159
.L292:
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	test	al, al
	jne	.L293
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	test	al, al
	jne	.L293
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L293
	movss	xmm0, DWORD PTR p19_x[rip]
	movss	xmm1, DWORD PTR _x_p19_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L293
	ucomiss	xmm0, xmm1
	je	.L294
.L293:
	movzx	eax, BYTE PTR p19_l0[rip]
	test	al, al
	je	.L294
	movzx	eax, BYTE PTR p19_l1[rip]
	test	al, al
	je	.L294
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L294
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L294
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 20
	je	.L159
.L294:
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	jne	.L296
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	je	.L297
.L296:
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	je	.L298
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	je	.L297
.L298:
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	je	.L299
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	je	.L297
.L299:
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	je	.L159
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	je	.L159
.L297:
	movss	xmm1, DWORD PTR _x_p18_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L300
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	je	.L300
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	je	.L159
.L300:
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L301
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L301
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p18_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p18_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L301
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L302
.L301:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L159
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 19
	jne	.L159
.L302:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L305
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	je	.L305
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	jne	.L305
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L305
	movss	xmm0, DWORD PTR _x_p18_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L305
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L306
.L305:
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	jne	.L306
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	jne	.L306
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L306
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L306
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 19
	je	.L159
.L306:
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	je	.L308
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	jne	.L308
	movss	xmm1, DWORD PTR p18_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L308
	movss	xmm0, DWORD PTR _x_p18_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L308
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L308
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 19
	je	.L311
.L308:
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	je	.L311
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	jne	.L311
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L311
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L311
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 19
	je	.L159
.L311:
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	jne	.L312
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	je	.L313
.L312:
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	je	.L314
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	jne	.L313
.L314:
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	je	.L313
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	jne	.L313
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L313
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L313
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 19
	je	.L159
.L313:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L315
	movss	xmm0, DWORD PTR _x_p18_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L315
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L315
	movss	xmm1, DWORD PTR p18_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L315
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 19
	jne	.L317
.L315:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L317
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L317
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 19
	jne	.L317
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	jne	.L317
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	jne	.L317
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	je	.L317
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	je	.L159
.L317:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L318
	movss	xmm0, DWORD PTR p18_x[rip]
	movss	xmm1, DWORD PTR _x_p18_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L318
	ucomiss	xmm0, xmm1
	jne	.L318
	movss	xmm1, DWORD PTR p18_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L318
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 19
	je	.L320
.L318:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L320
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L320
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 19
	jne	.L320
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	je	.L320
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	jne	.L320
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	je	.L320
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	jne	.L159
.L320:
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	test	al, al
	jne	.L321
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	test	al, al
	jne	.L321
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L321
	movss	xmm0, DWORD PTR p18_x[rip]
	movss	xmm1, DWORD PTR _x_p18_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L321
	ucomiss	xmm0, xmm1
	je	.L322
.L321:
	movzx	eax, BYTE PTR p18_l0[rip]
	test	al, al
	je	.L322
	movzx	eax, BYTE PTR p18_l1[rip]
	test	al, al
	je	.L322
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L322
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L322
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 19
	je	.L159
.L322:
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	jne	.L324
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	je	.L325
.L324:
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	je	.L326
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	je	.L325
.L326:
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	je	.L327
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	je	.L325
.L327:
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	je	.L159
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	je	.L159
.L325:
	movss	xmm1, DWORD PTR _x_p17_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L328
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	je	.L328
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	je	.L159
.L328:
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L329
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L329
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p17_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p17_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L329
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L330
.L329:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L159
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 18
	jne	.L159
.L330:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L333
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	je	.L333
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	jne	.L333
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L333
	movss	xmm0, DWORD PTR _x_p17_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L333
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L334
.L333:
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	jne	.L334
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	jne	.L334
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L334
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L334
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 18
	je	.L159
.L334:
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	je	.L336
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	jne	.L336
	movss	xmm1, DWORD PTR p17_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L336
	movss	xmm0, DWORD PTR _x_p17_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L336
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L336
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 18
	je	.L339
.L336:
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	je	.L339
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	jne	.L339
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L339
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L339
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 18
	je	.L159
.L339:
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	jne	.L340
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	je	.L341
.L340:
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	je	.L342
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	jne	.L341
.L342:
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	je	.L341
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	jne	.L341
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L341
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L341
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 18
	je	.L159
.L341:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L343
	movss	xmm0, DWORD PTR _x_p17_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L343
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L343
	movss	xmm1, DWORD PTR p17_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L343
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 18
	jne	.L345
.L343:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L345
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L345
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 18
	jne	.L345
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	jne	.L345
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	jne	.L345
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	je	.L345
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	je	.L159
.L345:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L346
	movss	xmm0, DWORD PTR p17_x[rip]
	movss	xmm1, DWORD PTR _x_p17_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L346
	ucomiss	xmm0, xmm1
	jne	.L346
	movss	xmm1, DWORD PTR p17_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L346
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 18
	je	.L348
.L346:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L348
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L348
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 18
	jne	.L348
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	je	.L348
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	jne	.L348
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	je	.L348
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	jne	.L159
.L348:
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	test	al, al
	jne	.L349
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L349
	movss	xmm0, DWORD PTR p17_x[rip]
	movss	xmm1, DWORD PTR _x_p17_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L349
	ucomiss	xmm0, xmm1
	je	.L350
.L349:
	movzx	eax, BYTE PTR p17_l0[rip]
	test	al, al
	je	.L350
	movzx	eax, BYTE PTR p17_l1[rip]
	test	al, al
	je	.L350
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L350
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L350
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 18
	je	.L159
.L350:
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L352
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L353
.L352:
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L354
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L353
.L354:
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L355
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L353
.L355:
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L159
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L159
.L353:
	movss	xmm1, DWORD PTR _x_p16_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L356
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L356
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L159
.L356:
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L357
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L357
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p16_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p16_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L357
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L358
.L357:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L159
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 17
	jne	.L159
.L358:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L361
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L361
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L361
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L361
	movss	xmm0, DWORD PTR _x_p16_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L361
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L362
.L361:
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L362
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L362
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L362
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L362
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 17
	je	.L159
.L362:
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L364
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L364
	movss	xmm1, DWORD PTR p16_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L364
	movss	xmm0, DWORD PTR _x_p16_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L364
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L364
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 17
	je	.L367
.L364:
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L367
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L367
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L367
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L367
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 17
	je	.L159
.L367:
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L368
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L369
.L368:
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L370
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L369
.L370:
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L369
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L369
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L369
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L369
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 17
	je	.L159
.L369:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L371
	movss	xmm0, DWORD PTR _x_p16_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L371
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L371
	movss	xmm1, DWORD PTR p16_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L371
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 17
	jne	.L373
.L371:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L373
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L373
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 17
	jne	.L373
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L373
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L373
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L373
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L159
.L373:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L374
	movss	xmm0, DWORD PTR p16_x[rip]
	movss	xmm1, DWORD PTR _x_p16_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L374
	ucomiss	xmm0, xmm1
	jne	.L374
	movss	xmm1, DWORD PTR p16_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L374
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 17
	je	.L376
.L374:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L376
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L376
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 17
	jne	.L376
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L376
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L376
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L376
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L159
.L376:
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L377
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L377
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L377
	movss	xmm0, DWORD PTR p16_x[rip]
	movss	xmm1, DWORD PTR _x_p16_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L377
	ucomiss	xmm0, xmm1
	je	.L378
.L377:
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L378
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L378
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L378
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L378
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 17
	je	.L159
.L378:
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L380
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L381
.L380:
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L382
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L381
.L382:
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L383
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L381
.L383:
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L159
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L159
.L381:
	movss	xmm1, DWORD PTR _x_p15_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L384
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L384
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L159
.L384:
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L385
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L385
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p15_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p15_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L385
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L386
.L385:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L159
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 16
	jne	.L159
.L386:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L389
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L389
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L389
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L389
	movss	xmm0, DWORD PTR _x_p15_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L389
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L390
.L389:
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L390
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L390
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L390
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L390
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 16
	je	.L159
.L390:
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L392
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L392
	movss	xmm1, DWORD PTR p15_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L392
	movss	xmm0, DWORD PTR _x_p15_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L392
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L392
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 16
	je	.L395
.L392:
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L395
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L395
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L395
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L395
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 16
	je	.L159
.L395:
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L396
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L397
.L396:
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L398
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L397
.L398:
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L397
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L397
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L397
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L397
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 16
	je	.L159
.L397:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L399
	movss	xmm0, DWORD PTR _x_p15_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L399
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L399
	movss	xmm1, DWORD PTR p15_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L399
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 16
	jne	.L401
.L399:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L401
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L401
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 16
	jne	.L401
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L401
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L401
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L401
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L159
.L401:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L402
	movss	xmm0, DWORD PTR p15_x[rip]
	movss	xmm1, DWORD PTR _x_p15_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L402
	ucomiss	xmm0, xmm1
	jne	.L402
	movss	xmm1, DWORD PTR p15_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L402
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 16
	je	.L404
.L402:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L404
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L404
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 16
	jne	.L404
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L404
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L404
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L404
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L159
.L404:
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L405
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L405
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L405
	movss	xmm0, DWORD PTR p15_x[rip]
	movss	xmm1, DWORD PTR _x_p15_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L405
	ucomiss	xmm0, xmm1
	je	.L406
.L405:
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L406
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L406
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L406
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L406
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 16
	je	.L159
.L406:
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L408
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L409
.L408:
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L410
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L409
.L410:
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L411
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L409
.L411:
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L159
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L159
.L409:
	movss	xmm1, DWORD PTR _x_p14_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L412
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L412
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L159
.L412:
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L413
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L413
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p14_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p14_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L413
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L414
.L413:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L159
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 15
	jne	.L159
.L414:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L417
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L417
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L417
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L417
	movss	xmm0, DWORD PTR _x_p14_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L417
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L418
.L417:
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L418
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L418
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L418
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L418
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 15
	je	.L159
.L418:
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L420
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L420
	movss	xmm1, DWORD PTR p14_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L420
	movss	xmm0, DWORD PTR _x_p14_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L420
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L420
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 15
	je	.L423
.L420:
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L423
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L423
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L423
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L423
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 15
	je	.L159
.L423:
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L424
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L425
.L424:
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L426
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L425
.L426:
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L425
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L425
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L425
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L425
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 15
	je	.L159
.L425:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L427
	movss	xmm0, DWORD PTR _x_p14_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L427
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L427
	movss	xmm1, DWORD PTR p14_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L427
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 15
	jne	.L429
.L427:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L429
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L429
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 15
	jne	.L429
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L429
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L429
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L429
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L159
.L429:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L430
	movss	xmm0, DWORD PTR p14_x[rip]
	movss	xmm1, DWORD PTR _x_p14_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L430
	ucomiss	xmm0, xmm1
	jne	.L430
	movss	xmm1, DWORD PTR p14_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L430
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 15
	je	.L432
.L430:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L432
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L432
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 15
	jne	.L432
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L432
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L432
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L432
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L159
.L432:
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L433
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L433
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L433
	movss	xmm0, DWORD PTR p14_x[rip]
	movss	xmm1, DWORD PTR _x_p14_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L433
	ucomiss	xmm0, xmm1
	je	.L434
.L433:
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L434
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L434
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L434
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L434
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 15
	je	.L159
.L434:
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L436
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L437
.L436:
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L438
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L437
.L438:
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L439
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L437
.L439:
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L159
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L159
.L437:
	movss	xmm1, DWORD PTR _x_p13_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L440
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L440
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L159
.L440:
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L441
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L441
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p13_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p13_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L441
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L442
.L441:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L159
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 14
	jne	.L159
.L442:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L445
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L445
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L445
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L445
	movss	xmm0, DWORD PTR _x_p13_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L445
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L446
.L445:
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L446
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L446
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L446
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L446
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 14
	je	.L159
.L446:
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L448
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L448
	movss	xmm1, DWORD PTR p13_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L448
	movss	xmm0, DWORD PTR _x_p13_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L448
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L448
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 14
	je	.L451
.L448:
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L451
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L451
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L451
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L451
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 14
	je	.L159
.L451:
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L452
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L453
.L452:
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L454
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L453
.L454:
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L453
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L453
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L453
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L453
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 14
	je	.L159
.L453:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L455
	movss	xmm0, DWORD PTR _x_p13_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L455
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L455
	movss	xmm1, DWORD PTR p13_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L455
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 14
	jne	.L457
.L455:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L457
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L457
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 14
	jne	.L457
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L457
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L457
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L457
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L159
.L457:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L458
	movss	xmm0, DWORD PTR p13_x[rip]
	movss	xmm1, DWORD PTR _x_p13_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L458
	ucomiss	xmm0, xmm1
	jne	.L458
	movss	xmm1, DWORD PTR p13_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L458
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 14
	je	.L460
.L458:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L460
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L460
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 14
	jne	.L460
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L460
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L460
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L460
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L159
.L460:
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L461
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L461
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L461
	movss	xmm0, DWORD PTR p13_x[rip]
	movss	xmm1, DWORD PTR _x_p13_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L461
	ucomiss	xmm0, xmm1
	je	.L462
.L461:
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L462
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L462
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L462
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L462
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 14
	je	.L159
.L462:
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L464
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L465
.L464:
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L466
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L465
.L466:
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L467
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L465
.L467:
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L159
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L159
.L465:
	movss	xmm1, DWORD PTR _x_p12_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L468
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L468
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L159
.L468:
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L469
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L469
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p12_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p12_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L469
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L470
.L469:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L159
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 13
	jne	.L159
.L470:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L473
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L473
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L473
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L473
	movss	xmm0, DWORD PTR _x_p12_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L473
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L474
.L473:
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L474
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L474
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L474
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L474
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 13
	je	.L159
.L474:
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L476
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L476
	movss	xmm1, DWORD PTR p12_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L476
	movss	xmm0, DWORD PTR _x_p12_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L476
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L476
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 13
	je	.L479
.L476:
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L479
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L479
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L479
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L479
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 13
	je	.L159
.L479:
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L480
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L481
.L480:
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L482
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L481
.L482:
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L481
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L481
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L481
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L481
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 13
	je	.L159
.L481:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L483
	movss	xmm0, DWORD PTR _x_p12_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L483
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L483
	movss	xmm1, DWORD PTR p12_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L483
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 13
	jne	.L485
.L483:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L485
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L485
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 13
	jne	.L485
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L485
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L485
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L485
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L159
.L485:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L486
	movss	xmm0, DWORD PTR p12_x[rip]
	movss	xmm1, DWORD PTR _x_p12_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L486
	ucomiss	xmm0, xmm1
	jne	.L486
	movss	xmm1, DWORD PTR p12_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L486
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 13
	je	.L488
.L486:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L488
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L488
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 13
	jne	.L488
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L488
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L488
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L488
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L159
.L488:
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L489
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L489
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L489
	movss	xmm0, DWORD PTR p12_x[rip]
	movss	xmm1, DWORD PTR _x_p12_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L489
	ucomiss	xmm0, xmm1
	je	.L490
.L489:
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L490
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L490
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L490
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L490
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 13
	je	.L159
.L490:
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L492
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L493
.L492:
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L494
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L493
.L494:
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L495
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L493
.L495:
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L159
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L159
.L493:
	movss	xmm1, DWORD PTR _x_p11_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L496
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L496
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L159
.L496:
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L497
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L497
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p11_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p11_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L497
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L498
.L497:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L159
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 12
	jne	.L159
.L498:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L501
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L501
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L501
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L501
	movss	xmm0, DWORD PTR _x_p11_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L501
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L502
.L501:
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L502
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L502
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L502
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L502
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 12
	je	.L159
.L502:
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L504
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L504
	movss	xmm1, DWORD PTR p11_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L504
	movss	xmm0, DWORD PTR _x_p11_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L504
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L504
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 12
	je	.L507
.L504:
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L507
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L507
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L507
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L507
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 12
	je	.L159
.L507:
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L508
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L509
.L508:
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L510
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L509
.L510:
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L509
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L509
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L509
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L509
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 12
	je	.L159
.L509:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L511
	movss	xmm0, DWORD PTR _x_p11_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L511
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L511
	movss	xmm1, DWORD PTR p11_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L511
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 12
	jne	.L513
.L511:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L513
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L513
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 12
	jne	.L513
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L513
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L513
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L513
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L159
.L513:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L514
	movss	xmm0, DWORD PTR p11_x[rip]
	movss	xmm1, DWORD PTR _x_p11_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L514
	ucomiss	xmm0, xmm1
	jne	.L514
	movss	xmm1, DWORD PTR p11_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L514
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 12
	je	.L516
.L514:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L516
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L516
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 12
	jne	.L516
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L516
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L516
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L516
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L159
.L516:
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L517
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L517
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L517
	movss	xmm0, DWORD PTR p11_x[rip]
	movss	xmm1, DWORD PTR _x_p11_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L517
	ucomiss	xmm0, xmm1
	je	.L518
.L517:
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L518
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L518
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L518
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L518
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 12
	je	.L159
.L518:
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L520
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L521
.L520:
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L522
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L521
.L522:
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L523
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L521
.L523:
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L159
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L159
.L521:
	movss	xmm1, DWORD PTR _x_p10_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L524
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L524
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L159
.L524:
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L525
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L525
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p10_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p10_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L525
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L526
.L525:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L159
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 11
	jne	.L159
.L526:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L529
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L529
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L529
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L529
	movss	xmm0, DWORD PTR _x_p10_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L529
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L530
.L529:
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L530
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L530
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L530
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L530
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 11
	je	.L159
.L530:
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L532
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L532
	movss	xmm1, DWORD PTR p10_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L532
	movss	xmm0, DWORD PTR _x_p10_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L532
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L532
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 11
	je	.L535
.L532:
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L535
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L535
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L535
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L535
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 11
	je	.L159
.L535:
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L536
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L537
.L536:
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L538
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L537
.L538:
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L537
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L537
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L537
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L537
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 11
	je	.L159
.L537:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L539
	movss	xmm0, DWORD PTR _x_p10_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L539
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L539
	movss	xmm1, DWORD PTR p10_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L539
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 11
	jne	.L541
.L539:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L541
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L541
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 11
	jne	.L541
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L541
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L541
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L541
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L159
.L541:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L542
	movss	xmm0, DWORD PTR p10_x[rip]
	movss	xmm1, DWORD PTR _x_p10_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L542
	ucomiss	xmm0, xmm1
	jne	.L542
	movss	xmm1, DWORD PTR p10_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L542
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 11
	je	.L544
.L542:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L544
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L544
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 11
	jne	.L544
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L544
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L544
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L544
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L159
.L544:
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L545
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L545
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L545
	movss	xmm0, DWORD PTR p10_x[rip]
	movss	xmm1, DWORD PTR _x_p10_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L545
	ucomiss	xmm0, xmm1
	je	.L546
.L545:
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L546
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L546
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L546
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L546
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 11
	je	.L159
.L546:
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L548
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L549
.L548:
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L550
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L549
.L550:
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L551
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L549
.L551:
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L159
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L159
.L549:
	movss	xmm1, DWORD PTR _x_p9_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L552
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L552
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L159
.L552:
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L553
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L553
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p9_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p9_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L553
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L554
.L553:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L159
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 10
	jne	.L159
.L554:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L557
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L557
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L557
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L557
	movss	xmm0, DWORD PTR _x_p9_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L557
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L558
.L557:
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L558
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L558
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L558
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L558
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 10
	je	.L159
.L558:
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L560
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L560
	movss	xmm1, DWORD PTR p9_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L560
	movss	xmm0, DWORD PTR _x_p9_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L560
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L560
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 10
	je	.L563
.L560:
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L563
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L563
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L563
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L563
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 10
	je	.L159
.L563:
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L564
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L565
.L564:
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L566
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L565
.L566:
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L565
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L565
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L565
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L565
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 10
	je	.L159
.L565:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L567
	movss	xmm0, DWORD PTR _x_p9_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L567
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L567
	movss	xmm1, DWORD PTR p9_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L567
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 10
	jne	.L569
.L567:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L569
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L569
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 10
	jne	.L569
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L569
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L569
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L569
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L159
.L569:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L570
	movss	xmm0, DWORD PTR p9_x[rip]
	movss	xmm1, DWORD PTR _x_p9_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L570
	ucomiss	xmm0, xmm1
	jne	.L570
	movss	xmm1, DWORD PTR p9_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L570
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 10
	je	.L572
.L570:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L572
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L572
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 10
	jne	.L572
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L572
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L572
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L572
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L159
.L572:
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L573
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L573
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L573
	movss	xmm0, DWORD PTR p9_x[rip]
	movss	xmm1, DWORD PTR _x_p9_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L573
	ucomiss	xmm0, xmm1
	je	.L574
.L573:
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L574
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L574
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L574
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L574
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 10
	je	.L159
.L574:
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L576
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L577
.L576:
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L578
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L577
.L578:
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L579
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L577
.L579:
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L159
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L159
.L577:
	movss	xmm1, DWORD PTR _x_p8_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L580
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L580
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L159
.L580:
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L581
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L581
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p8_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p8_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L581
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L582
.L581:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L159
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 9
	jne	.L159
.L582:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L585
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L585
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L585
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L585
	movss	xmm0, DWORD PTR _x_p8_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L585
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L586
.L585:
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L586
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L586
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L586
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L586
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 9
	je	.L159
.L586:
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L588
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L588
	movss	xmm1, DWORD PTR p8_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L588
	movss	xmm0, DWORD PTR _x_p8_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L588
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L588
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 9
	je	.L591
.L588:
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L591
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L591
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L591
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L591
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 9
	je	.L159
.L591:
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L592
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L593
.L592:
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L594
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L593
.L594:
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L593
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L593
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L593
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L593
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 9
	je	.L159
.L593:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L595
	movss	xmm0, DWORD PTR _x_p8_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L595
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L595
	movss	xmm1, DWORD PTR p8_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L595
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 9
	jne	.L597
.L595:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L597
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L597
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 9
	jne	.L597
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L597
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L597
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L597
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L159
.L597:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L598
	movss	xmm0, DWORD PTR p8_x[rip]
	movss	xmm1, DWORD PTR _x_p8_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L598
	ucomiss	xmm0, xmm1
	jne	.L598
	movss	xmm1, DWORD PTR p8_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L598
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 9
	je	.L600
.L598:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L600
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L600
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 9
	jne	.L600
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L600
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L600
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L600
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L159
.L600:
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L601
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L601
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L601
	movss	xmm0, DWORD PTR p8_x[rip]
	movss	xmm1, DWORD PTR _x_p8_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L601
	ucomiss	xmm0, xmm1
	je	.L602
.L601:
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L602
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L602
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L602
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L602
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 9
	je	.L159
.L602:
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L604
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L605
.L604:
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L606
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L605
.L606:
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L607
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L605
.L607:
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L159
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L159
.L605:
	movss	xmm1, DWORD PTR _x_p7_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L608
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L608
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L159
.L608:
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L609
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L609
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p7_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p7_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L609
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L610
.L609:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L159
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 8
	jne	.L159
.L610:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L613
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L613
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L613
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L613
	movss	xmm0, DWORD PTR _x_p7_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L613
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L614
.L613:
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L614
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L614
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L614
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L614
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 8
	je	.L159
.L614:
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L616
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L616
	movss	xmm1, DWORD PTR p7_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L616
	movss	xmm0, DWORD PTR _x_p7_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L616
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L616
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 8
	je	.L619
.L616:
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L619
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L619
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L619
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L619
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 8
	je	.L159
.L619:
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L620
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L621
.L620:
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L622
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L621
.L622:
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L621
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L621
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L621
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L621
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 8
	je	.L159
.L621:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L623
	movss	xmm0, DWORD PTR _x_p7_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L623
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L623
	movss	xmm1, DWORD PTR p7_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L623
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 8
	jne	.L625
.L623:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L625
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L625
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 8
	jne	.L625
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L625
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L625
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L625
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L159
.L625:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L626
	movss	xmm0, DWORD PTR p7_x[rip]
	movss	xmm1, DWORD PTR _x_p7_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L626
	ucomiss	xmm0, xmm1
	jne	.L626
	movss	xmm1, DWORD PTR p7_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L626
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 8
	je	.L628
.L626:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L628
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L628
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 8
	jne	.L628
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L628
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L628
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L628
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L159
.L628:
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L629
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L629
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L629
	movss	xmm0, DWORD PTR p7_x[rip]
	movss	xmm1, DWORD PTR _x_p7_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L629
	ucomiss	xmm0, xmm1
	je	.L630
.L629:
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L630
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L630
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L630
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L630
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 8
	je	.L159
.L630:
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L632
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L633
.L632:
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L634
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L633
.L634:
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L635
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L633
.L635:
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L159
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L159
.L633:
	movss	xmm1, DWORD PTR _x_p6_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L636
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L636
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L159
.L636:
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L637
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L637
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p6_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p6_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L637
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L638
.L637:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L159
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 7
	jne	.L159
.L638:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L641
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L641
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L641
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L641
	movss	xmm0, DWORD PTR _x_p6_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L641
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L642
.L641:
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L642
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L642
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L642
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L642
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 7
	je	.L159
.L642:
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L644
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L644
	movss	xmm1, DWORD PTR p6_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L644
	movss	xmm0, DWORD PTR _x_p6_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L644
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L644
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 7
	je	.L647
.L644:
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L647
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L647
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L647
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L647
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 7
	je	.L159
.L647:
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L648
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L649
.L648:
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L650
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L649
.L650:
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L649
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L649
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L649
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L649
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 7
	je	.L159
.L649:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L651
	movss	xmm0, DWORD PTR _x_p6_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L651
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L651
	movss	xmm1, DWORD PTR p6_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L651
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 7
	jne	.L653
.L651:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L653
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L653
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 7
	jne	.L653
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L653
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L653
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L653
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L159
.L653:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L654
	movss	xmm0, DWORD PTR p6_x[rip]
	movss	xmm1, DWORD PTR _x_p6_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L654
	ucomiss	xmm0, xmm1
	jne	.L654
	movss	xmm1, DWORD PTR p6_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L654
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 7
	je	.L656
.L654:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L656
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L656
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 7
	jne	.L656
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L656
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L656
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L656
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L159
.L656:
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L657
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L657
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L657
	movss	xmm0, DWORD PTR p6_x[rip]
	movss	xmm1, DWORD PTR _x_p6_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L657
	ucomiss	xmm0, xmm1
	je	.L658
.L657:
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L658
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L658
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L658
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L658
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 7
	je	.L159
.L658:
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L660
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L661
.L660:
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L662
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L661
.L662:
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L663
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L661
.L663:
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L159
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L159
.L661:
	movss	xmm1, DWORD PTR _x_p5_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L664
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L664
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L159
.L664:
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L665
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L665
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p5_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p5_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L665
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L666
.L665:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L159
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 6
	jne	.L159
.L666:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L669
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L669
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L669
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L669
	movss	xmm0, DWORD PTR _x_p5_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L669
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L670
.L669:
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L670
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L670
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L670
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L670
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 6
	je	.L159
.L670:
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L672
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L672
	movss	xmm1, DWORD PTR p5_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L672
	movss	xmm0, DWORD PTR _x_p5_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L672
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L672
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 6
	je	.L675
.L672:
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L675
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L675
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L675
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L675
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 6
	je	.L159
.L675:
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L676
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L677
.L676:
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L678
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L677
.L678:
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L677
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L677
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L677
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L677
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 6
	je	.L159
.L677:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L679
	movss	xmm0, DWORD PTR _x_p5_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L679
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L679
	movss	xmm1, DWORD PTR p5_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L679
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 6
	jne	.L681
.L679:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L681
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L681
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 6
	jne	.L681
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L681
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L681
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L681
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L159
.L681:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L682
	movss	xmm0, DWORD PTR p5_x[rip]
	movss	xmm1, DWORD PTR _x_p5_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L682
	ucomiss	xmm0, xmm1
	jne	.L682
	movss	xmm1, DWORD PTR p5_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L682
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 6
	je	.L684
.L682:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L684
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L684
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 6
	jne	.L684
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L684
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L684
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L684
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L159
.L684:
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L685
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L685
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L685
	movss	xmm0, DWORD PTR p5_x[rip]
	movss	xmm1, DWORD PTR _x_p5_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L685
	ucomiss	xmm0, xmm1
	je	.L686
.L685:
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L686
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L686
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L686
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L686
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 6
	je	.L159
.L686:
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L688
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L689
.L688:
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L690
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L689
.L690:
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L691
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L689
.L691:
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L159
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L159
.L689:
	movss	xmm1, DWORD PTR _x_p4_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L692
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L692
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L159
.L692:
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L693
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L693
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p4_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p4_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L693
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L694
.L693:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L159
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 5
	jne	.L159
.L694:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L697
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L697
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L697
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L697
	movss	xmm0, DWORD PTR _x_p4_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L697
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L698
.L697:
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L698
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L698
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L698
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L698
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 5
	je	.L159
.L698:
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L700
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L700
	movss	xmm1, DWORD PTR p4_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L700
	movss	xmm0, DWORD PTR _x_p4_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L700
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L700
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 5
	je	.L703
.L700:
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L703
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L703
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L703
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L703
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 5
	je	.L159
.L703:
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L704
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L705
.L704:
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L706
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L705
.L706:
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L705
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L705
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L705
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L705
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 5
	je	.L159
.L705:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L707
	movss	xmm0, DWORD PTR _x_p4_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L707
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L707
	movss	xmm1, DWORD PTR p4_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L707
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 5
	jne	.L709
.L707:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L709
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L709
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 5
	jne	.L709
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L709
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L709
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L709
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L159
.L709:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L710
	movss	xmm0, DWORD PTR p4_x[rip]
	movss	xmm1, DWORD PTR _x_p4_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L710
	ucomiss	xmm0, xmm1
	jne	.L710
	movss	xmm1, DWORD PTR p4_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L710
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 5
	je	.L712
.L710:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L712
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L712
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 5
	jne	.L712
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L712
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L712
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L712
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L159
.L712:
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L713
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L713
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L713
	movss	xmm0, DWORD PTR p4_x[rip]
	movss	xmm1, DWORD PTR _x_p4_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L713
	ucomiss	xmm0, xmm1
	je	.L714
.L713:
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L714
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L714
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L714
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L714
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 5
	je	.L159
.L714:
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L716
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L717
.L716:
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L718
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L717
.L718:
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L719
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L717
.L719:
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L159
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L159
.L717:
	movss	xmm1, DWORD PTR _x_p3_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L720
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L720
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L159
.L720:
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L721
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L721
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p3_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p3_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L721
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L722
.L721:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L159
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 4
	jne	.L159
.L722:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L725
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L725
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L725
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L725
	movss	xmm0, DWORD PTR _x_p3_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L725
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L726
.L725:
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L726
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L726
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L726
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L726
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 4
	je	.L159
.L726:
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L728
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L728
	movss	xmm1, DWORD PTR p3_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L728
	movss	xmm0, DWORD PTR _x_p3_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L728
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L728
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 4
	je	.L731
.L728:
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L731
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L731
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L731
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L731
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 4
	je	.L159
.L731:
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L732
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L733
.L732:
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L734
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L733
.L734:
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L733
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L733
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L733
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L733
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 4
	je	.L159
.L733:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L735
	movss	xmm0, DWORD PTR _x_p3_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L735
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L735
	movss	xmm1, DWORD PTR p3_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L735
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 4
	jne	.L737
.L735:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L737
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L737
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 4
	jne	.L737
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L737
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L737
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L737
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L159
.L737:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L738
	movss	xmm0, DWORD PTR p3_x[rip]
	movss	xmm1, DWORD PTR _x_p3_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L738
	ucomiss	xmm0, xmm1
	jne	.L738
	movss	xmm1, DWORD PTR p3_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L738
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 4
	je	.L740
.L738:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L740
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L740
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 4
	jne	.L740
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L740
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L740
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L740
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L159
.L740:
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L741
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L741
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L741
	movss	xmm0, DWORD PTR p3_x[rip]
	movss	xmm1, DWORD PTR _x_p3_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L741
	ucomiss	xmm0, xmm1
	je	.L742
.L741:
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L742
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L742
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L742
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L742
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 4
	je	.L159
.L742:
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L744
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L745
.L744:
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L746
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L745
.L746:
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L747
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L745
.L747:
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L159
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L159
.L745:
	movss	xmm1, DWORD PTR _x_p2_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L748
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L748
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L159
.L748:
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L749
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L749
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p2_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p2_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L749
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L750
.L749:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L159
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 3
	jne	.L159
.L750:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L753
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L753
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L753
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L753
	movss	xmm0, DWORD PTR _x_p2_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L753
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L754
.L753:
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L754
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L754
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L754
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L754
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 3
	je	.L159
.L754:
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L756
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L756
	movss	xmm1, DWORD PTR p2_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L756
	movss	xmm0, DWORD PTR _x_p2_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L756
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L756
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 3
	je	.L759
.L756:
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L759
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L759
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L759
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L759
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 3
	je	.L159
.L759:
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L760
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L761
.L760:
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L762
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L761
.L762:
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L761
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L761
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L761
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L761
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 3
	je	.L159
.L761:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L763
	movss	xmm0, DWORD PTR _x_p2_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L763
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L763
	movss	xmm1, DWORD PTR p2_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L763
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 3
	jne	.L765
.L763:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L765
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L765
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 3
	jne	.L765
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L765
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L765
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L765
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L159
.L765:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L766
	movss	xmm0, DWORD PTR p2_x[rip]
	movss	xmm1, DWORD PTR _x_p2_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L766
	ucomiss	xmm0, xmm1
	jne	.L766
	movss	xmm1, DWORD PTR p2_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L766
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 3
	je	.L768
.L766:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L768
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L768
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 3
	jne	.L768
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L768
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L768
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L768
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L159
.L768:
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L769
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L769
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L769
	movss	xmm0, DWORD PTR p2_x[rip]
	movss	xmm1, DWORD PTR _x_p2_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L769
	ucomiss	xmm0, xmm1
	je	.L770
.L769:
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L770
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L770
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L770
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L770
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 3
	je	.L159
.L770:
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L772
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L773
.L772:
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L774
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L773
.L774:
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L775
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L773
.L775:
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L159
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L159
.L773:
	movss	xmm1, DWORD PTR _x_p1_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L776
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L776
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L159
.L776:
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L777
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L777
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p1_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p1_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L777
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L778
.L777:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L159
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 2
	jne	.L159
.L778:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L781
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L781
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L781
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L781
	movss	xmm0, DWORD PTR _x_p1_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L781
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L782
.L781:
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L782
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L782
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L782
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L782
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 2
	je	.L159
.L782:
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L784
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L784
	movss	xmm1, DWORD PTR p1_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L784
	movss	xmm0, DWORD PTR _x_p1_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L784
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L784
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 2
	je	.L787
.L784:
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L787
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L787
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L787
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L787
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 2
	je	.L159
.L787:
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L788
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L789
.L788:
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L790
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L789
.L790:
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L789
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L789
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L789
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L789
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 2
	je	.L159
.L789:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L791
	movss	xmm0, DWORD PTR _x_p1_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L791
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L791
	movss	xmm1, DWORD PTR p1_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L791
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 2
	jne	.L793
.L791:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L793
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L793
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 2
	jne	.L793
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L793
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L793
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L793
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L159
.L793:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L794
	movss	xmm0, DWORD PTR p1_x[rip]
	movss	xmm1, DWORD PTR _x_p1_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L794
	ucomiss	xmm0, xmm1
	jne	.L794
	movss	xmm1, DWORD PTR p1_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L794
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 2
	je	.L796
.L794:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L796
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L796
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 2
	jne	.L796
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L796
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L796
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L796
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L159
.L796:
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L797
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L797
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L797
	movss	xmm0, DWORD PTR p1_x[rip]
	movss	xmm1, DWORD PTR _x_p1_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L797
	ucomiss	xmm0, xmm1
	je	.L798
.L797:
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L798
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L798
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L798
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L798
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 2
	je	.L159
.L798:
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L800
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L801
.L800:
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L802
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L801
.L802:
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L803
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L801
.L803:
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L159
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L159
.L801:
	movss	xmm1, DWORD PTR _x_p0_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L804
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L804
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L159
.L804:
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L805
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L805
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p0_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p0_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L805
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L806
.L805:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L159
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 1
	jne	.L159
.L806:
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L809
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L809
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L809
	movss	xmm0, DWORD PTR _x_p0_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L809
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L809
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	je	.L811
.L809:
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L811
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L811
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 1
	jne	.L811
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L811
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L159
.L811:
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L813
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L813
	movss	xmm1, DWORD PTR p0_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L813
	movss	xmm0, DWORD PTR _x_p0_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L813
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L813
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 1
	je	.L816
.L813:
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L816
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L816
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 1
	jne	.L816
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L816
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L159
.L816:
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L818
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L819
.L818:
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L820
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L819
.L820:
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L819
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L819
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 1
	jne	.L819
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L819
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L159
.L819:
	movss	xmm0, DWORD PTR _x_p0_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L822
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L822
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L822
	movss	xmm1, DWORD PTR p0_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L822
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 1
	jne	.L824
.L822:
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 1
	jne	.L824
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L824
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L824
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L824
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L824
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L824
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L159
.L824:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L825
	movss	xmm0, DWORD PTR p0_x[rip]
	movss	xmm1, DWORD PTR _x_p0_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L825
	ucomiss	xmm0, xmm1
	jne	.L825
	movss	xmm1, DWORD PTR p0_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L825
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 1
	je	.L827
.L825:
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 1
	jne	.L827
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L827
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L827
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L827
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L827
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L827
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L159
.L827:
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L828
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L828
	movss	xmm0, DWORD PTR p0_x[rip]
	movss	xmm1, DWORD PTR _x_p0_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L828
	ucomiss	xmm0, xmm1
	jne	.L828
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	je	.L830
.L828:
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L830
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L830
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 1
	jne	.L830
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L830
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L159
.L830:
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 24
	je	.L832
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 23
	je	.L832
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 22
	je	.L832
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 21
	je	.L832
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 20
	je	.L832
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 19
	je	.L832
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 18
	je	.L832
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 17
	je	.L832
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 16
	je	.L832
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 15
	je	.L832
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 14
	je	.L832
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 13
	je	.L832
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 12
	je	.L832
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 11
	je	.L832
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 10
	je	.L832
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 9
	je	.L832
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 8
	je	.L832
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 7
	je	.L832
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 6
	je	.L832
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 5
	je	.L832
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 4
	je	.L832
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 3
	je	.L832
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 2
	je	.L832
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	je	.L832
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 1
	jne	.L159
.L832:
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 1
	je	.L833
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 2
	je	.L833
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 3
	je	.L833
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 4
	je	.L833
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 5
	je	.L833
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 6
	je	.L833
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 7
	je	.L833
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 8
	je	.L833
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 9
	je	.L833
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 10
	je	.L833
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 11
	je	.L833
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 12
	je	.L833
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 13
	je	.L833
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 14
	je	.L833
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 15
	je	.L833
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 16
	je	.L833
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 17
	je	.L833
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 18
	je	.L833
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 19
	je	.L833
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 20
	je	.L833
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 21
	je	.L833
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 22
	je	.L833
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 23
	je	.L833
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 24
	jne	.L159
.L833:
	movss	xmm0, DWORD PTR _x_delta[rip]
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jb	.L159
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L835
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L159
	mov	edx, DWORD PTR turn[rip]
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	edx, eax
	jne	.L159
.L835:
	movss	xmm0, DWORD PTR delta[rip]
	movss	xmm1, DWORD PTR _x__diverge_delta[rip]
	ucomiss	xmm0, xmm1
	jp	.L992
	ucomiss	xmm0, xmm1
	je	.L836
.L992:
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	movss	xmm1, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L159
.L836:
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	movss	xmm1, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	jnb	.L838
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x__diverge_delta[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L159
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L159
.L838:
	mov	eax, 1
	jmp	.L840
.L159:
	mov	eax, 0
.L840:
	mov	DWORD PTR -4[rbp], eax
	movzx	eax, BYTE PTR _x_p23_l1[rip]
	mov	BYTE PTR p23_l1[rip], al
	movzx	eax, BYTE PTR _x_p23_l0[rip]
	mov	BYTE PTR p23_l0[rip], al
	movzx	eax, BYTE PTR _x_p22_l1[rip]
	mov	BYTE PTR p22_l1[rip], al
	movzx	eax, BYTE PTR _x_p22_l0[rip]
	mov	BYTE PTR p22_l0[rip], al
	movzx	eax, BYTE PTR _x_p21_l1[rip]
	mov	BYTE PTR p21_l1[rip], al
	movzx	eax, BYTE PTR _x_p21_l0[rip]
	mov	BYTE PTR p21_l0[rip], al
	movzx	eax, BYTE PTR _x_p20_l1[rip]
	mov	BYTE PTR p20_l1[rip], al
	movzx	eax, BYTE PTR _x_p20_l0[rip]
	mov	BYTE PTR p20_l0[rip], al
	movzx	eax, BYTE PTR _x_p19_l1[rip]
	mov	BYTE PTR p19_l1[rip], al
	movzx	eax, BYTE PTR _x_p19_l0[rip]
	mov	BYTE PTR p19_l0[rip], al
	movss	xmm0, DWORD PTR _x_p19_x[rip]
	movss	DWORD PTR p19_x[rip], xmm0
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	mov	BYTE PTR p8_l0[rip], al
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	mov	BYTE PTR p14_l1[rip], al
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	mov	BYTE PTR p7_l0[rip], al
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	mov	BYTE PTR p13_l1[rip], al
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	mov	BYTE PTR p6_l1[rip], al
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	mov	BYTE PTR p5_l0[rip], al
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	mov	BYTE PTR p11_l1[rip], al
	movss	xmm0, DWORD PTR _x_p5_x[rip]
	movss	DWORD PTR p5_x[rip], xmm0
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	mov	BYTE PTR p16_l0[rip], al
	movss	xmm0, DWORD PTR _x_p8_x[rip]
	movss	DWORD PTR p8_x[rip], xmm0
	movss	xmm0, DWORD PTR _x_p22_x[rip]
	movss	DWORD PTR p22_x[rip], xmm0
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	mov	BYTE PTR p4_l1[rip], al
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	mov	BYTE PTR p1_l0[rip], al
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	mov	BYTE PTR p4_l0[rip], al
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	mov	BYTE PTR p10_l1[rip], al
	movss	xmm0, DWORD PTR _x_p4_x[rip]
	movss	DWORD PTR p4_x[rip], xmm0
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	mov	BYTE PTR p15_l0[rip], al
	movss	xmm0, DWORD PTR _x_p7_x[rip]
	movss	DWORD PTR p7_x[rip], xmm0
	movss	xmm0, DWORD PTR _x__diverge_delta[rip]
	movss	DWORD PTR _diverge_delta[rip], xmm0
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	mov	BYTE PTR p0_l1[rip], al
	movzx	eax, BYTE PTR _x_p18_l0[rip]
	mov	BYTE PTR p18_l0[rip], al
	movss	xmm0, DWORD PTR _x_p21_x[rip]
	movss	DWORD PTR p21_x[rip], xmm0
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	mov	BYTE PTR p3_l1[rip], al
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	mov	BYTE PTR p3_l0[rip], al
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	mov	BYTE PTR p9_l1[rip], al
	movss	xmm0, DWORD PTR _x_p23_x[rip]
	movss	DWORD PTR p23_x[rip], xmm0
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	mov	BYTE PTR p5_l1[rip], al
	movzx	eax, BYTE PTR _x_p18_l1[rip]
	mov	BYTE PTR p18_l1[rip], al
	movss	xmm0, DWORD PTR _x_p1_x[rip]
	movss	DWORD PTR p1_x[rip], xmm0
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	mov	BYTE PTR p9_l0[rip], al
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	mov	BYTE PTR p15_l1[rip], al
	movss	xmm0, DWORD PTR _x_p3_x[rip]
	movss	DWORD PTR p3_x[rip], xmm0
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	mov	BYTE PTR p14_l0[rip], al
	mov	eax, DWORD PTR _x_id[rip]
	mov	DWORD PTR id[rip], eax
	mov	eax, DWORD PTR _x_turn[rip]
	mov	DWORD PTR turn[rip], eax
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	mov	BYTE PTR p6_l0[rip], al
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	mov	BYTE PTR p12_l1[rip], al
	movss	xmm0, DWORD PTR _x_p0_x[rip]
	movss	DWORD PTR p0_x[rip], xmm0
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	mov	BYTE PTR p7_l1[rip], al
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	mov	BYTE PTR p0_l0[rip], al
	movss	xmm0, DWORD PTR _x_p13_x[rip]
	movss	DWORD PTR p13_x[rip], xmm0
	movss	xmm0, DWORD PTR _x_delta[rip]
	movss	DWORD PTR delta[rip], xmm0
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	mov	BYTE PTR p1_l1[rip], al
	movss	xmm0, DWORD PTR _x_p2_x[rip]
	movss	DWORD PTR p2_x[rip], xmm0
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	mov	BYTE PTR p13_l0[rip], al
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	mov	BYTE PTR p2_l0[rip], al
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	mov	BYTE PTR p8_l1[rip], al
	movss	xmm0, DWORD PTR _x_p6_x[rip]
	movss	DWORD PTR p6_x[rip], xmm0
	movzx	eax, BYTE PTR _x_p17_l0[rip]
	mov	BYTE PTR p17_l0[rip], al
	movss	xmm0, DWORD PTR _x_p20_x[rip]
	movss	DWORD PTR p20_x[rip], xmm0
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	mov	BYTE PTR p2_l1[rip], al
	movss	xmm0, DWORD PTR _x_p9_x[rip]
	movss	DWORD PTR p9_x[rip], xmm0
	movss	xmm0, DWORD PTR _x_p10_x[rip]
	movss	DWORD PTR p10_x[rip], xmm0
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	mov	BYTE PTR p10_l0[rip], al
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	mov	BYTE PTR p16_l1[rip], al
	movss	xmm0, DWORD PTR _x_p11_x[rip]
	movss	DWORD PTR p11_x[rip], xmm0
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	mov	BYTE PTR p11_l0[rip], al
	movzx	eax, BYTE PTR _x_p17_l1[rip]
	mov	BYTE PTR p17_l1[rip], al
	movss	xmm0, DWORD PTR _x_p12_x[rip]
	movss	DWORD PTR p12_x[rip], xmm0
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	mov	BYTE PTR p12_l0[rip], al
	movss	xmm0, DWORD PTR _x_p14_x[rip]
	movss	DWORD PTR p14_x[rip], xmm0
	movss	xmm0, DWORD PTR _x_p15_x[rip]
	movss	DWORD PTR p15_x[rip], xmm0
	movss	xmm0, DWORD PTR _x_p16_x[rip]
	movss	DWORD PTR p16_x[rip], xmm0
	movss	xmm0, DWORD PTR _x_p17_x[rip]
	movss	DWORD PTR p17_x[rip], xmm0
	movss	xmm0, DWORD PTR _x_p18_x[rip]
	movss	DWORD PTR p18_x[rip], xmm0
.L154:
	cmp	DWORD PTR -4[rbp], 0
	jne	.L841
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	main, .-main
	.section	.rodata
	.align 4
.LC1:
	.long	1073741824
	.align 4
.LC3:
	.long	1065353216
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"277845.c"
	.text
	.align	2
	.global	__VERIFIER_nondet_bool
	.syntax unified
	.arm
	.fpu softvfp
	.type	__VERIFIER_nondet_bool, %function
__VERIFIER_nondet_bool:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	pop	{fp, pc}
	.size	__VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
	.comm	p23_l1,1,1
	.comm	_x_p23_l1,1,1
	.comm	p23_l0,1,1
	.comm	_x_p23_l0,1,1
	.comm	p22_l1,1,1
	.comm	_x_p22_l1,1,1
	.comm	p22_l0,1,1
	.comm	_x_p22_l0,1,1
	.comm	p21_l1,1,1
	.comm	_x_p21_l1,1,1
	.comm	p21_l0,1,1
	.comm	_x_p21_l0,1,1
	.comm	p20_l1,1,1
	.comm	_x_p20_l1,1,1
	.comm	p20_l0,1,1
	.comm	_x_p20_l0,1,1
	.comm	p19_l1,1,1
	.comm	_x_p19_l1,1,1
	.comm	p19_l0,1,1
	.comm	_x_p19_l0,1,1
	.comm	p19_x,4,4
	.comm	_x_p19_x,4,4
	.comm	p8_l0,1,1
	.comm	_x_p8_l0,1,1
	.comm	p14_l1,1,1
	.comm	_x_p14_l1,1,1
	.comm	p7_l0,1,1
	.comm	_x_p7_l0,1,1
	.comm	p13_l1,1,1
	.comm	_x_p13_l1,1,1
	.comm	p6_l1,1,1
	.comm	_x_p6_l1,1,1
	.comm	p5_l0,1,1
	.comm	_x_p5_l0,1,1
	.comm	p11_l1,1,1
	.comm	_x_p11_l1,1,1
	.comm	p5_x,4,4
	.comm	_x_p5_x,4,4
	.comm	p16_l0,1,1
	.comm	_x_p16_l0,1,1
	.comm	p8_x,4,4
	.comm	_x_p8_x,4,4
	.comm	p22_x,4,4
	.comm	_x_p22_x,4,4
	.comm	p4_l1,1,1
	.comm	_x_p4_l1,1,1
	.comm	p1_l0,1,1
	.comm	_x_p1_l0,1,1
	.comm	p4_l0,1,1
	.comm	_x_p4_l0,1,1
	.comm	p10_l1,1,1
	.comm	_x_p10_l1,1,1
	.comm	p4_x,4,4
	.comm	_x_p4_x,4,4
	.comm	p15_l0,1,1
	.comm	_x_p15_l0,1,1
	.comm	p7_x,4,4
	.comm	_x_p7_x,4,4
	.comm	_diverge_delta,4,4
	.comm	_x__diverge_delta,4,4
	.comm	p0_l1,1,1
	.comm	_x_p0_l1,1,1
	.comm	p18_l0,1,1
	.comm	_x_p18_l0,1,1
	.comm	p21_x,4,4
	.comm	_x_p21_x,4,4
	.comm	p3_l1,1,1
	.comm	_x_p3_l1,1,1
	.comm	p3_l0,1,1
	.comm	_x_p3_l0,1,1
	.comm	p9_l1,1,1
	.comm	_x_p9_l1,1,1
	.comm	p23_x,4,4
	.comm	_x_p23_x,4,4
	.comm	p5_l1,1,1
	.comm	_x_p5_l1,1,1
	.comm	p18_l1,1,1
	.comm	_x_p18_l1,1,1
	.comm	p1_x,4,4
	.comm	_x_p1_x,4,4
	.comm	p9_l0,1,1
	.comm	_x_p9_l0,1,1
	.comm	p15_l1,1,1
	.comm	_x_p15_l1,1,1
	.comm	p3_x,4,4
	.comm	_x_p3_x,4,4
	.comm	p14_l0,1,1
	.comm	_x_p14_l0,1,1
	.comm	id,4,4
	.comm	_x_id,4,4
	.comm	turn,4,4
	.comm	_x_turn,4,4
	.comm	p6_l0,1,1
	.comm	_x_p6_l0,1,1
	.comm	p12_l1,1,1
	.comm	_x_p12_l1,1,1
	.comm	p0_x,4,4
	.comm	_x_p0_x,4,4
	.comm	p7_l1,1,1
	.comm	_x_p7_l1,1,1
	.comm	p0_l0,1,1
	.comm	_x_p0_l0,1,1
	.comm	p13_x,4,4
	.comm	_x_p13_x,4,4
	.comm	delta,4,4
	.comm	_x_delta,4,4
	.comm	p1_l1,1,1
	.comm	_x_p1_l1,1,1
	.comm	p2_x,4,4
	.comm	_x_p2_x,4,4
	.comm	p13_l0,1,1
	.comm	_x_p13_l0,1,1
	.comm	p2_l0,1,1
	.comm	_x_p2_l0,1,1
	.comm	p8_l1,1,1
	.comm	_x_p8_l1,1,1
	.comm	p6_x,4,4
	.comm	_x_p6_x,4,4
	.comm	p17_l0,1,1
	.comm	_x_p17_l0,1,1
	.comm	p20_x,4,4
	.comm	_x_p20_x,4,4
	.comm	p2_l1,1,1
	.comm	_x_p2_l1,1,1
	.comm	p9_x,4,4
	.comm	_x_p9_x,4,4
	.comm	p10_x,4,4
	.comm	_x_p10_x,4,4
	.comm	p10_l0,1,1
	.comm	_x_p10_l0,1,1
	.comm	p16_l1,1,1
	.comm	_x_p16_l1,1,1
	.comm	p11_x,4,4
	.comm	_x_p11_x,4,4
	.comm	p11_l0,1,1
	.comm	_x_p11_l0,1,1
	.comm	p17_l1,1,1
	.comm	_x_p17_l1,1,1
	.comm	p12_x,4,4
	.comm	_x_p12_x,4,4
	.comm	p12_l0,1,1
	.comm	_x_p12_l0,1,1
	.comm	p14_x,4,4
	.comm	_x_p14_x,4,4
	.comm	p15_x,4,4
	.comm	_x_p15_x,4,4
	.comm	p16_x,4,4
	.comm	_x_p16_x,4,4
	.comm	p17_x,4,4
	.comm	_x_p17_x,4,4
	.comm	p18_x,4,4
	.comm	_x_p18_x,4,4
	.global	__aeabi_fcmpeq
	.global	__aeabi_fcmple
	.global	__aeabi_fcmpge
	.global	__aeabi_f2d
	.global	__aeabi_dsub
	.global	__aeabi_dadd
	.global	__aeabi_dcmpeq
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #8
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+4
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+8
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+12
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+16
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+20
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+24
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+28
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+32
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+36
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L970+40
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+44
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+48
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+52
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+56
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+60
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+64
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+172
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L970+240
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+68
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L970+204
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L970+72
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+256
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+296
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+260
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+184
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L970+252
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+76
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L970+216
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L970+80
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+304
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+84
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L970+88
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+268
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+272
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+196
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L970+92
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+244
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+96
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L970+288
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+200
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+100
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L970+264
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+104
	strb	r2, [r3]
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L970+316
	str	r3, [r2]
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L970+320
	str	r3, [r2]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+236
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+160
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L970+300
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+220
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+308
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L970+144
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L970+312
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+292
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L970+276
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+152
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+284
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+208
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L970+228
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+108
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L970+112
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+280
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L970+192
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L970+180
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+188
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+116
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L970+168
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+176
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+120
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L970+156
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L970+164
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L970+124
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L970+128
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L970+132
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L970+136
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L970+140
	str	r3, [r2]	@ float
	ldr	r3, .L970+316
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+92
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L6
	ldr	r3, .L970
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L6:
	ldr	r3, .L970+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L970
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L8:
	ldr	r3, .L970
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L9
	ldr	r3, .L970+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L9:
	ldr	r3, .L970+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L7:
	ldr	r3, .L970+92
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L10
	ldr	r3, .L970
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L10
	ldr	r3, .L970+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L10:
	ldr	r3, .L970+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L12
	ldr	r3, .L970+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L12:
	ldr	r3, .L970+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L14
	ldr	r3, .L970+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L14:
	ldr	r3, .L970+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L15
	ldr	r3, .L970+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L15:
	ldr	r3, .L970+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L13:
	ldr	r3, .L970+72
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L16
	ldr	r3, .L970+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L16
	ldr	r3, .L970+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L16:
	ldr	r3, .L970+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L18
	ldr	r3, .L970+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L19
.L18:
	ldr	r3, .L970+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L20
	ldr	r3, .L970+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L19
.L20:
	ldr	r3, .L970+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L21
	ldr	r3, .L970+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L19
.L21:
	ldr	r3, .L970+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L19:
	ldr	r3, .L970+88
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L22
	ldr	r3, .L970+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L22
	ldr	r3, .L970+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L22:
	ldr	r3, .L970+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L24
	ldr	r3, .L970+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L25
.L24:
	ldr	r3, .L970+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L26
	ldr	r3, .L970+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L25
.L26:
	ldr	r3, .L970+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L27
	ldr	r3, .L970+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L25
.L27:
	ldr	r3, .L970+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L25:
	ldr	r3, .L970+112
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L28
	ldr	r3, .L970+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L28
	ldr	r3, .L970+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L28:
	ldr	r3, .L970+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+40
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L30
	ldr	r3, .L970+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L31
.L30:
	ldr	r3, .L970+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L32
	ldr	r3, .L970+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L31
.L32:
	ldr	r3, .L970+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L33
	ldr	r3, .L970+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L31
.L33:
	ldr	r3, .L970+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L31:
	ldr	r3, .L970+40
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L34
	ldr	r3, .L970+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L34
	ldr	r3, .L970+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L34:
	ldr	r3, .L970+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+140
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L36
	ldr	r3, .L970+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L37
.L36:
	ldr	r3, .L970+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L38
	ldr	r3, .L970+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L37
.L38:
	ldr	r3, .L970+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L39
	ldr	r3, .L970+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L37
.L39:
	ldr	r3, .L970+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L37:
	ldr	r3, .L970+140
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L40
	ldr	r3, .L970+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L40
	ldr	r3, .L970+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L40:
	ldr	r3, .L970+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L42
	ldr	r3, .L970+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L43
.L42:
	ldr	r3, .L970+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L44
	ldr	r3, .L970+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L43
.L44:
	ldr	r3, .L970+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L45
	ldr	r3, .L970+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L43
.L45:
	ldr	r3, .L970+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L43:
	ldr	r3, .L970+136
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L46
	ldr	r3, .L970+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L46
	ldr	r3, .L970+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L46:
	ldr	r3, .L970+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L48
	ldr	r3, .L970+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L49
.L48:
	ldr	r3, .L970+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L50
	ldr	r3, .L970+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L49
.L50:
	ldr	r3, .L970+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L51
	ldr	r3, .L970+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L49
.L51:
	ldr	r3, .L970+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L49:
	ldr	r3, .L970+132
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L52
	ldr	r3, .L970+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L52
	ldr	r3, .L970+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L52:
	ldr	r3, .L970+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+128
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L54
	ldr	r3, .L970+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L55
.L54:
	ldr	r3, .L970+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L56
	ldr	r3, .L970+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L55
.L56:
	ldr	r3, .L970+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L57
	ldr	r3, .L970+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L55
.L57:
	ldr	r3, .L970+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L55:
	ldr	r3, .L970+128
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L58
	ldr	r3, .L970+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L58
	ldr	r3, .L970+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L58:
	ldr	r3, .L970+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L60
	ldr	r3, .L970+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L61
.L60:
	ldr	r3, .L970+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L62
	ldr	r3, .L970+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L61
.L62:
	ldr	r3, .L970+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L63
	ldr	r3, .L970+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L61
.L63:
	ldr	r3, .L970+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L61:
	ldr	r3, .L970+124
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L64
	ldr	r3, .L970+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L64
	ldr	r3, .L970+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L64:
	ldr	r3, .L970+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L66
	ldr	r3, .L970+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L67
.L66:
	ldr	r3, .L970+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L68
	ldr	r3, .L970+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	b	.L971
.L972:
	.align	2
.L970:
	.word	p23_l1
	.word	p23_l0
	.word	p22_l1
	.word	p22_l0
	.word	p21_l1
	.word	p21_l0
	.word	p20_l1
	.word	p20_l0
	.word	p19_l1
	.word	p19_l0
	.word	p19_x
	.word	p8_l0
	.word	p14_l1
	.word	p7_l0
	.word	p13_l1
	.word	p6_l1
	.word	p5_l0
	.word	p16_l0
	.word	p22_x
	.word	p15_l0
	.word	_diverge_delta
	.word	p18_l0
	.word	p21_x
	.word	p23_x
	.word	p18_l1
	.word	p15_l1
	.word	p14_l0
	.word	p17_l0
	.word	p20_x
	.word	p16_l1
	.word	p17_l1
	.word	p14_x
	.word	p15_x
	.word	p16_x
	.word	p17_x
	.word	p18_x
	.word	p13_x
	.word	p13_l1
	.word	p13_l0
	.word	p12_x
	.word	p12_l1
	.word	p12_l0
	.word	p11_x
	.word	p11_l1
	.word	p11_l0
	.word	p10_x
	.word	p10_l1
	.word	p10_l0
	.word	p9_x
	.word	p9_l1
	.word	p9_l0
	.word	p8_x
	.word	p8_l1
	.word	p8_l0
	.word	p7_x
	.word	p7_l1
	.word	p7_l0
	.word	p6_x
	.word	p6_l1
	.word	p6_l0
	.word	p5_x
	.word	p5_l1
	.word	p5_l0
	.word	p4_x
	.word	p4_l1
	.word	p4_l0
	.word	p3_x
	.word	p3_l1
	.word	p3_l0
	.word	p2_x
	.word	p2_l1
	.word	p2_l0
	.word	p1_x
	.word	p1_l1
	.word	p1_l0
	.word	p0_x
	.word	p0_l1
	.word	p0_l0
	.word	delta
	.word	id
	.word	turn
.L971:
	cmp	r3, #0
	beq	.L67
.L68:
	ldr	r3, .L970+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L69
	ldr	r3, .L970+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L67
.L69:
	ldr	r3, .L970+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L67:
	ldr	r3, .L970+144
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L70
	ldr	r3, .L970+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L70
	ldr	r3, .L970+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L70:
	ldr	r3, .L970+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+156
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L72
	ldr	r3, .L970+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L73
.L72:
	ldr	r3, .L970+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L74
	ldr	r3, .L970+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L73
.L74:
	ldr	r3, .L970+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L75
	ldr	r3, .L970+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L73
.L75:
	ldr	r3, .L970+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L73:
	ldr	r3, .L970+156
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L76
	ldr	r3, .L970+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L76
	ldr	r3, .L970+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L76:
	ldr	r3, .L970+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+168
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L78
	ldr	r3, .L970+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L79
.L78:
	ldr	r3, .L970+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L80
	ldr	r3, .L970+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L79
.L80:
	ldr	r3, .L970+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L81
	ldr	r3, .L970+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L79
.L81:
	ldr	r3, .L970+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L79:
	ldr	r3, .L970+168
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L82
	ldr	r3, .L970+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L82
	ldr	r3, .L970+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L82:
	ldr	r3, .L970+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+180
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L84
	ldr	r3, .L970+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L85
.L84:
	ldr	r3, .L970+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L86
	ldr	r3, .L970+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L85
.L86:
	ldr	r3, .L970+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L87
	ldr	r3, .L970+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L85
.L87:
	ldr	r3, .L970+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L85:
	ldr	r3, .L970+180
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L88
	ldr	r3, .L970+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L88
	ldr	r3, .L970+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L88:
	ldr	r3, .L970+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L90
	ldr	r3, .L970+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L90:
	ldr	r3, .L970+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L92
	ldr	r3, .L970+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L92:
	ldr	r3, .L970+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L93
	ldr	r3, .L970+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L93:
	ldr	r3, .L970+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L91:
	ldr	r3, .L970+192
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L94
	ldr	r3, .L970+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L94
	ldr	r3, .L970+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L94:
	ldr	r3, .L970+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+204
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L96
	ldr	r3, .L970+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L97
.L96:
	ldr	r3, .L970+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L98
	ldr	r3, .L970+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L97
.L98:
	ldr	r3, .L970+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L99
	ldr	r3, .L970+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L97
.L99:
	ldr	r3, .L970+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L97:
	ldr	r3, .L970+204
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L100
	ldr	r3, .L970+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L100
	ldr	r3, .L970+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L100:
	ldr	r3, .L970+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+216
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L102
	ldr	r3, .L970+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L103
.L102:
	ldr	r3, .L970+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L104
	ldr	r3, .L970+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L103
.L104:
	ldr	r3, .L970+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L105
	ldr	r3, .L970+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L103
.L105:
	ldr	r3, .L970+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L103:
	ldr	r3, .L970+216
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L106
	ldr	r3, .L970+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L106
	ldr	r3, .L970+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L106:
	ldr	r3, .L970+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+228
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L108
	ldr	r3, .L970+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L109
.L108:
	ldr	r3, .L970+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L110
	ldr	r3, .L970+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L109
.L110:
	ldr	r3, .L970+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L111
	ldr	r3, .L970+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L109
.L111:
	ldr	r3, .L970+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L109:
	ldr	r3, .L970+228
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L112
	ldr	r3, .L970+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L112
	ldr	r3, .L970+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L112:
	ldr	r3, .L970+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+240
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L114
	ldr	r3, .L970+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L115
.L114:
	ldr	r3, .L970+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L116
	ldr	r3, .L970+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L115
.L116:
	ldr	r3, .L970+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L970+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L115
.L117:
	ldr	r3, .L970+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L115:
	ldr	r3, .L970+240
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L118
	ldr	r3, .L970+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L118
	ldr	r3, .L970+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L118:
	ldr	r3, .L970+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+252
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L120
	ldr	r3, .L970+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L121
.L120:
	ldr	r3, .L970+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L122
	ldr	r3, .L970+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L121
.L122:
	ldr	r3, .L970+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L123
	ldr	r3, .L970+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L121
.L123:
	ldr	r3, .L970+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L121:
	ldr	r3, .L970+252
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L124
	ldr	r3, .L970+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L124
	ldr	r3, .L970+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L124:
	ldr	r3, .L970+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+264
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L126
	ldr	r3, .L970+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L127
.L126:
	ldr	r3, .L970+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L128
	ldr	r3, .L970+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L127
.L128:
	ldr	r3, .L970+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L129
	ldr	r3, .L970+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L127
.L129:
	ldr	r3, .L970+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L127:
	ldr	r3, .L970+264
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L130
	ldr	r3, .L970+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L130
	ldr	r3, .L970+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L130:
	ldr	r3, .L970+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L132
	ldr	r3, .L970+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L133
.L132:
	ldr	r3, .L970+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L134
	ldr	r3, .L970+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L133
.L134:
	ldr	r3, .L970+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L135
	ldr	r3, .L970+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L133
.L135:
	ldr	r3, .L970+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L133:
	ldr	r3, .L970+276
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L136
	ldr	r3, .L970+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L136
	ldr	r3, .L970+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L136:
	ldr	r3, .L970+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+288
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L138
	ldr	r3, .L970+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L139
.L138:
	ldr	r3, .L970+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L140
	ldr	r3, .L970+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L139
.L140:
	ldr	r3, .L970+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L141
	ldr	r3, .L970+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L139
.L141:
	ldr	r3, .L970+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L139:
	ldr	r3, .L970+288
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L142
	ldr	r3, .L970+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L142
	ldr	r3, .L970+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L142:
	ldr	r3, .L970+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L970+300
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L144
	ldr	r3, .L970+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L145
.L144:
	ldr	r3, .L970+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L146
	ldr	r3, .L970+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L145
.L146:
	ldr	r3, .L970+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L147
	ldr	r3, .L970+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L145
.L147:
	ldr	r3, .L970+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L145:
	ldr	r3, .L970+300
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L148
	ldr	r3, .L970+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L148
	ldr	r3, .L970+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L148:
	ldr	r3, .L970+312
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L970+316
	ldr	r3, [r3]
	cmp	r3, #24
	beq	.L150
	ldr	r3, .L970+316
	ldr	r3, [r3]
	cmp	r3, #23
	beq	.L150
	ldr	r3, .L970+316
	ldr	r3, [r3]
	cmp	r3, #22
	beq	.L150
	ldr	r3, .L970+316
	ldr	r3, [r3]
	cmp	r3, #21
	beq	.L150
	ldr	r3, .L970+316
	ldr	r3, [r3]
	cmp	r3, #20
	beq	.L150
	ldr	r3, .L970+316
	ldr	r3, [r3]
	cmp	r3, #19
	beq	.L150
	ldr	r3, .L970+316
	ldr	r3, [r3]
	cmp	r3, #18
	beq	.L150
	ldr	r3, .L970+316
	ldr	r3, [r3]
	cmp	r3, #17
	beq	.L150
	ldr	r3, .L970+316
	ldr	r3, [r3]
	cmp	r3, #16
	beq	.L150
	ldr	r3, .L970+316
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L150
	ldr	r3, .L970+316
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L150
	ldr	r3, .L970+316
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L150
	ldr	r3, .L970+316
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L150
	ldr	r3, .L970+316
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L150
	ldr	r3, .L970+316
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L150
	ldr	r3, .L970+316
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L150
	ldr	r3, .L970+316
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L150
	ldr	r3, .L970+316
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L150
	ldr	r3, .L970+316
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L150
	ldr	r3, .L970+316
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L150
	ldr	r3, .L970+316
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L150
	ldr	r3, .L970+316
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L150
	ldr	r3, .L970+316
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L150
	ldr	r3, .L970+316
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L150
	ldr	r3, .L970+316
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L4
.L150:
	ldr	r3, .L970+320
	ldr	r3, [r3]
	cmp	r3, #24
	beq	.L151
	ldr	r3, .L970+320
	ldr	r3, [r3]
	cmp	r3, #23
	beq	.L151
	ldr	r3, .L970+320
	ldr	r3, [r3]
	cmp	r3, #22
	beq	.L151
	ldr	r3, .L970+320
	ldr	r3, [r3]
	cmp	r3, #21
	beq	.L151
	ldr	r3, .L970+320
	ldr	r3, [r3]
	cmp	r3, #20
	beq	.L151
	ldr	r3, .L970+320
	ldr	r3, [r3]
	cmp	r3, #19
	beq	.L151
	ldr	r3, .L970+320
	ldr	r3, [r3]
	cmp	r3, #18
	beq	.L151
	ldr	r3, .L970+320
	ldr	r3, [r3]
	cmp	r3, #17
	beq	.L151
	ldr	r3, .L970+320
	ldr	r3, [r3]
	cmp	r3, #16
	beq	.L151
	ldr	r3, .L970+320
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L151
	ldr	r3, .L970+320
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L151
	ldr	r3, .L970+320
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L151
	ldr	r3, .L973+328
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L151
	ldr	r3, .L973+328
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L151
	ldr	r3, .L973+328
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L151
	ldr	r3, .L973+328
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L151
	ldr	r3, .L973+328
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L151
	ldr	r3, .L973+328
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L151
	ldr	r3, .L973+328
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L151
	ldr	r3, .L973+328
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L151
	ldr	r3, .L973+328
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L151
	ldr	r3, .L973+328
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L151
	ldr	r3, .L973+328
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L151
	ldr	r3, .L973+328
	ldr	r3, [r3]
	cmp	r3, #2
	bne	.L4
.L151:
	ldr	r3, .L973+324
	ldr	r3, [r3]	@ float
	ldr	r2, .L973
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	mov	r3, #1
	b	.L153
.L4:
	mov	r3, #0
.L153:
	str	r3, [fp, #-24]
	b	.L154
.L974:
	.align	2
.L973:
	.word	_diverge_delta
	.word	_x_p21_l1
	.word	_x_p21_l0
	.word	_x_p20_l1
	.word	_x_p20_l0
	.word	_x_p19_l1
	.word	_x_p19_l0
	.word	_x_p19_x
	.word	_x_p8_l0
	.word	_x_p14_l1
	.word	_x_p7_l0
	.word	_x_p13_l1
	.word	_x_p6_l1
	.word	_x_p5_l0
	.word	_x_p11_l1
	.word	_x_p5_x
	.word	_x_p16_l0
	.word	_x_p8_x
	.word	_x_p4_l1
	.word	_x_p1_l0
	.word	_x_p4_l0
	.word	_x_p10_l1
	.word	_x_p4_x
	.word	_x_p15_l0
	.word	_x_p7_x
	.word	_x__diverge_delta
	.word	_x_p0_l1
	.word	_x_p18_l0
	.word	_x_p21_x
	.word	_x_p3_l1
	.word	_x_p3_l0
	.word	_x_p9_l1
	.word	_x_p5_l1
	.word	_x_p18_l1
	.word	_x_p1_x
	.word	_x_p9_l0
	.word	_x_p15_l1
	.word	_x_p3_x
	.word	_x_p14_l0
	.word	_x_turn
	.word	_x_p6_l0
	.word	_x_p12_l1
	.word	_x_p0_x
	.word	_x_p7_l1
	.word	_x_p0_l0
	.word	_x_p13_x
	.word	_x_delta
	.word	_x_p1_l1
	.word	_x_p2_x
	.word	_x_p13_l0
	.word	_x_p2_l0
	.word	_x_p8_l1
	.word	_x_p6_x
	.word	_x_p17_l0
	.word	_x_p20_x
	.word	_x_p2_l1
	.word	_x_p9_x
	.word	_x_p10_x
	.word	_x_p10_l0
	.word	_x_p16_l1
	.word	_x_p11_x
	.word	_x_p11_l0
	.word	_x_p17_l1
	.word	_x_p12_x
	.word	_x_p12_l0
	.word	_x_p14_x
	.word	_x_p15_x
	.word	_x_p16_x
	.word	_x_p17_x
	.word	_x_p18_x
	.word	_x_p23_l0
	.word	_x_p23_l1
	.word	p23_x
	.word	_x_p23_x
	.word	p23_l0
	.word	p23_l1
	.word	id
	.word	p22_x
	.word	_x_p22_x
	.word	_x_id
	.word	p22_l1
	.word	delta
	.word	turn
	.word	_x_p22_l0
	.word	_x_p22_l1
	.word	p22_l0
.L819:
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+284
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+280
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+336
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+332
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+4
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+8
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+12
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+16
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+20
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+24
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L973+28
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+32
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+36
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+40
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+44
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+48
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+52
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+56
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L973+60
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+64
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L973+68
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L973+312
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+72
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+76
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+80
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+84
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L973+88
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+92
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L973+96
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L973+100
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+104
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+108
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L973+112
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+116
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+120
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+124
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L973+292
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+128
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+132
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L973+136
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+140
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+144
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L973+148
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+152
	strb	r2, [r3]
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L973+316
	str	r3, [r2]
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L973+156
	str	r3, [r2]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+160
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+164
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L973+168
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+172
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+176
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L973+180
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L973+184
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+188
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L973+192
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+196
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+200
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+204
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L973+208
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+212
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L973+216
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+220
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L973+224
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L973+228
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+232
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+236
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L973+240
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+244
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+248
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L973+252
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L973+256
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L973+260
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L973+264
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L973+268
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L973+272
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L973+276
	str	r3, [r2]	@ float
	ldr	r3, .L973+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L155
	ldr	r3, .L973+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L156
.L155:
	ldr	r3, .L973+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L973+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L156
.L157:
	ldr	r3, .L973+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L158
	ldr	r3, .L973+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L156
.L158:
	ldr	r3, .L973+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L973+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L156:
	ldr	r3, .L973+292
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L160
	ldr	r3, .L973+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L160
	ldr	r3, .L973+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L160:
	ldr	r3, .L973+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L973+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L161
	ldr	r3, .L973+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L973+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L161
	ldr	r3, .L973+324
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L973+288
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L973+292
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L162
.L161:
	ldr	r3, .L973+324
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L973+328
	ldr	r3, [r3]
	cmp	r3, #24
	bne	.L159
.L162:
	ldr	r3, .L973+304
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L164
	ldr	r3, .L973+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L164
	ldr	r3, .L973+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L164
	ldr	r3, .L973+304
	ldr	r2, [r3]
	ldr	r3, .L973+316
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L164
	ldr	r3, .L973+292
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L165
.L164:
	ldr	r3, .L973+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L165
	ldr	r3, .L973+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L165
	ldr	r3, .L973+324
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L165
	ldr	r3, .L973+328
	ldr	r3, [r3]
	cmp	r3, #24
	beq	.L159
.L165:
	ldr	r3, .L973+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L166
	ldr	r3, .L973+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L166
	ldr	r3, .L973+288
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L166
	ldr	r3, .L973+292
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L166
	ldr	r3, .L973+316
	ldr	r3, [r3]
	cmp	r3, #24
	beq	.L169
.L166:
	ldr	r3, .L973+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L169
	ldr	r3, .L973+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L169
	ldr	r3, .L973+324
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L169
	ldr	r3, .L973+328
	ldr	r3, [r3]
	cmp	r3, #24
	beq	.L159
.L169:
	ldr	r3, .L973+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L170
	ldr	r3, .L973+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L171
.L170:
	ldr	r3, .L973+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L172
	ldr	r3, .L973+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L171
.L172:
	ldr	r3, .L973+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L171
	ldr	r3, .L973+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L171
	ldr	r3, .L973+324
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L171
	ldr	r3, .L973+328
	ldr	r3, [r3]
	cmp	r3, #24
	beq	.L159
.L171:
	ldr	r3, .L973+304
	ldr	r2, [r3]
	ldr	r3, .L973+316
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L173
	ldr	r3, .L973+292
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L173
	ldr	r3, .L973+288
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L175
	mov	r3, #0
	mov	r4, r3
.L175:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L173
	ldr	r3, .L973+304
	ldr	r3, [r3]
	cmp	r3, #24
	bne	.L176
.L173:
	ldr	r3, .L973+324
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L176
	ldr	r3, .L973+328
	ldr	r3, [r3]
	cmp	r3, #24
	bne	.L176
	ldr	r3, .L973+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L176
	ldr	r3, .L973+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L176
	ldr	r3, .L973+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L176
	ldr	r3, .L973+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L176:
	ldr	r3, .L973+304
	ldr	r2, [r3]
	ldr	r3, .L973+316
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L177
	ldr	r3, .L973+288
	ldr	r3, [r3]	@ float
	ldr	r2, .L973+292
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L177
	ldr	r3, .L973+288
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L179
	mov	r3, #0
	mov	r4, r3
.L179:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L177
	ldr	r3, .L973+304
	ldr	r3, [r3]
	cmp	r3, #24
	beq	.L180
.L177:
	ldr	r3, .L973+324
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L180
	ldr	r3, .L973+328
	ldr	r3, [r3]
	cmp	r3, #24
	bne	.L180
	ldr	r3, .L973+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L180
	ldr	r3, .L973+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L180
	ldr	r3, .L973+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L180
	ldr	r3, .L973+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L159
.L180:
	ldr	r3, .L973+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L181
	ldr	r3, .L973+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L181
	ldr	r3, .L973+316
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L181
	ldr	r3, .L973+288
	ldr	r3, [r3]	@ float
	ldr	r2, .L973+292
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L182
.L181:
	ldr	r3, .L973+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L182
	ldr	r3, .L973+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L182
	ldr	r3, .L973+324
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L182
	ldr	r3, .L973+328
	ldr	r3, [r3]
	cmp	r3, #24
	beq	.L159
.L182:
	ldr	r3, .L973+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L183
	ldr	r3, .L973+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L184
.L183:
	ldr	r3, .L973+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L185
	ldr	r3, .L973+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L184
.L185:
	ldr	r3, .L973+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L186
	ldr	r3, .L973+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L184
.L186:
	ldr	r3, .L973+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L973+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L184:
	ldr	r3, .L973+312
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L187
	ldr	r3, .L973+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L187
	ldr	r3, .L973+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L187:
	ldr	r3, .L973+340
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L973+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L188
	ldr	r3, .L973+320
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L973+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L188
	ldr	r3, .L973+324
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L973+308
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L973+312
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L189
.L188:
	ldr	r3, .L973+324
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L973+328
	ldr	r3, [r3]
	cmp	r3, #23
	bne	.L159
.L189:
	ldr	r3, .L973+304
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L191
	ldr	r3, .L973+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L191
	ldr	r3, .L973+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L191
	ldr	r3, .L973+304
	ldr	r2, [r3]
	ldr	r3, .L973+316
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L191
	ldr	r3, .L973+312
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L192
.L191:
	ldr	r3, .L973+340
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L192
	ldr	r3, .L973+320
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L192
	ldr	r3, .L973+324
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L192
	ldr	r3, .L973+328
	ldr	r3, [r3]
	cmp	r3, #23
	beq	.L159
.L192:
	ldr	r3, .L973+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L193
	ldr	r3, .L973+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L193
	ldr	r3, .L973+308
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L193
	ldr	r3, .L973+312
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L193
	ldr	r3, .L973+316
	ldr	r3, [r3]
	cmp	r3, #23
	beq	.L196
.L193:
	ldr	r3, .L973+320
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L196
	ldr	r3, .L973+340
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L196
	ldr	r3, .L973+324
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L196
	ldr	r3, .L973+328
	ldr	r3, [r3]
	cmp	r3, #23
	beq	.L159
.L196:
	ldr	r3, .L973+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L197
	ldr	r3, .L973+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L198
.L197:
	ldr	r3, .L973+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L199
	ldr	r3, .L973+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L198
.L199:
	ldr	r3, .L973+340
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L198
	ldr	r3, .L975
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L198
	ldr	r3, .L975+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L198
	ldr	r3, .L975+8
	ldr	r3, [r3]
	cmp	r3, #23
	beq	.L159
.L198:
	ldr	r3, .L975+12
	ldr	r2, [r3]
	ldr	r3, .L975+16
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L200
	ldr	r3, .L975+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L200
	ldr	r3, .L975+24
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L202
	mov	r3, #0
	mov	r4, r3
.L202:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L200
	ldr	r3, .L975+12
	ldr	r3, [r3]
	cmp	r3, #23
	bne	.L203
.L200:
	ldr	r3, .L975+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L203
	ldr	r3, .L975+8
	ldr	r3, [r3]
	cmp	r3, #23
	bne	.L203
	ldr	r3, .L975+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L203
	ldr	r3, .L975+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L203
	ldr	r3, .L975+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L203
	ldr	r3, .L975
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L203:
	ldr	r3, .L975+12
	ldr	r2, [r3]
	ldr	r3, .L975+16
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L204
	ldr	r3, .L975+24
	ldr	r3, [r3]	@ float
	ldr	r2, .L975+20
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L204
	ldr	r3, .L975+24
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L206
	mov	r3, #0
	mov	r4, r3
.L206:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L204
	ldr	r3, .L975+12
	ldr	r3, [r3]
	cmp	r3, #23
	beq	.L207
.L204:
	ldr	r3, .L975+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L975+8
	ldr	r3, [r3]
	cmp	r3, #23
	bne	.L207
	ldr	r3, .L975+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L975
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L975+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L975+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L159
.L207:
	ldr	r3, .L975+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L208
	ldr	r3, .L975+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L208
	ldr	r3, .L975+16
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L208
	ldr	r3, .L975+24
	ldr	r3, [r3]	@ float
	ldr	r2, .L975+20
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L209
.L208:
	ldr	r3, .L975+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L209
	ldr	r3, .L975
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L209
	ldr	r3, .L975+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L209
	ldr	r3, .L975+8
	ldr	r3, [r3]
	cmp	r3, #23
	beq	.L159
.L209:
	ldr	r3, .L975+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L210
	ldr	r3, .L975+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L211
.L210:
	ldr	r3, .L975+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L212
	ldr	r3, .L975+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L211
.L212:
	ldr	r3, .L975+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L213
	ldr	r3, .L975+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L211
.L213:
	ldr	r3, .L975+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L975+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L211:
	ldr	r3, .L975+48
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L214
	ldr	r3, .L975+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L214
	ldr	r3, .L975+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L214:
	ldr	r3, .L975+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L975+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L215
	ldr	r3, .L975+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L975+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L215
	ldr	r3, .L975+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L975+60
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L975+48
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L216
.L215:
	ldr	r3, .L975+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L975+8
	ldr	r3, [r3]
	cmp	r3, #22
	bne	.L159
.L216:
	ldr	r3, .L975+12
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L218
	ldr	r3, .L975+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L218
	ldr	r3, .L975+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L218
	ldr	r3, .L975+12
	ldr	r2, [r3]
	ldr	r3, .L975+16
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L218
	ldr	r3, .L975+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L219
.L218:
	ldr	r3, .L975+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L219
	ldr	r3, .L975+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L219
	ldr	r3, .L975+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L219
	ldr	r3, .L975+8
	ldr	r3, [r3]
	cmp	r3, #22
	beq	.L159
.L219:
	ldr	r3, .L975+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L220
	ldr	r3, .L975+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L220
	ldr	r3, .L975+60
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L220
	ldr	r3, .L975+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L220
	ldr	r3, .L975+16
	ldr	r3, [r3]
	cmp	r3, #22
	beq	.L223
.L220:
	ldr	r3, .L975+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L223
	ldr	r3, .L975+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L223
	ldr	r3, .L975+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L223
	ldr	r3, .L975+8
	ldr	r3, [r3]
	cmp	r3, #22
	beq	.L159
.L223:
	ldr	r3, .L975+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L224
	ldr	r3, .L975+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L225
.L224:
	ldr	r3, .L975+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L226
	ldr	r3, .L975+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L225
.L226:
	ldr	r3, .L975+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L225
	ldr	r3, .L975+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L225
	ldr	r3, .L975+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L225
	ldr	r3, .L975+8
	ldr	r3, [r3]
	cmp	r3, #22
	beq	.L159
.L225:
	ldr	r3, .L975+12
	ldr	r2, [r3]
	ldr	r3, .L975+16
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L227
	ldr	r3, .L975+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L227
	ldr	r3, .L975+60
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L229
	mov	r3, #0
	mov	r4, r3
.L229:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L227
	ldr	r3, .L975+12
	ldr	r3, [r3]
	cmp	r3, #22
	bne	.L230
.L227:
	ldr	r3, .L975+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L230
	ldr	r3, .L975+8
	ldr	r3, [r3]
	cmp	r3, #22
	bne	.L230
	ldr	r3, .L975+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L230
	ldr	r3, .L975+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L230
	ldr	r3, .L975+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L230
	ldr	r3, .L975+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L230:
	ldr	r3, .L975+12
	ldr	r2, [r3]
	ldr	r3, .L975+16
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L231
	ldr	r3, .L975+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L975+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L231
	ldr	r3, .L975+60
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L233
	mov	r3, #0
	mov	r4, r3
.L233:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L231
	ldr	r3, .L975+12
	ldr	r3, [r3]
	cmp	r3, #22
	beq	.L234
.L231:
	ldr	r3, .L975+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L234
	ldr	r3, .L975+8
	ldr	r3, [r3]
	cmp	r3, #22
	bne	.L234
	ldr	r3, .L975+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L234
	ldr	r3, .L975+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L234
	ldr	r3, .L975+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L234
	ldr	r3, .L975+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L159
.L234:
	ldr	r3, .L975+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L235
	ldr	r3, .L975+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L235
	ldr	r3, .L975+16
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L235
	ldr	r3, .L975+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L975+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L236
.L235:
	ldr	r3, .L975+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L236
	ldr	r3, .L975+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L236
	ldr	r3, .L975+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L236
	ldr	r3, .L975+8
	ldr	r3, [r3]
	cmp	r3, #22
	beq	.L159
.L236:
	ldr	r3, .L975+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L237
	ldr	r3, .L975+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L238
.L237:
	ldr	r3, .L975+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L239
	ldr	r3, .L975+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L238
.L239:
	ldr	r3, .L975+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L240
	ldr	r3, .L975+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L238
.L240:
	ldr	r3, .L975+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L975+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L238:
	ldr	r3, .L975+72
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L241
	ldr	r3, .L975+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L241
	ldr	r3, .L975+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L241:
	ldr	r3, .L975+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L975+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L242
	ldr	r3, .L975+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L975+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L242
	ldr	r3, .L975+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L975+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L975+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L243
.L242:
	ldr	r3, .L975+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L975+8
	ldr	r3, [r3]
	cmp	r3, #21
	bne	.L159
.L243:
	ldr	r3, .L975+12
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L245
	ldr	r3, .L975+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L245
	ldr	r3, .L975+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L245
	ldr	r3, .L975+12
	ldr	r2, [r3]
	ldr	r3, .L975+16
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L245
	ldr	r3, .L975+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L246
.L245:
	ldr	r3, .L975+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L246
	ldr	r3, .L975+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L246
	ldr	r3, .L975+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L246
	ldr	r3, .L975+8
	ldr	r3, [r3]
	cmp	r3, #21
	beq	.L159
.L246:
	ldr	r3, .L975+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L247
	ldr	r3, .L975+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L247
	ldr	r3, .L975+76
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L247
	ldr	r3, .L975+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L247
	ldr	r3, .L975+16
	ldr	r3, [r3]
	cmp	r3, #21
	beq	.L250
.L247:
	ldr	r3, .L975+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L250
	ldr	r3, .L975+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L250
	ldr	r3, .L975+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L250
	ldr	r3, .L975+8
	ldr	r3, [r3]
	cmp	r3, #21
	beq	.L159
.L250:
	ldr	r3, .L975+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L251
	ldr	r3, .L975+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L252
.L251:
	ldr	r3, .L975+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L253
	ldr	r3, .L975+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L252
.L253:
	ldr	r3, .L975+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L252
	ldr	r3, .L975+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L252
	ldr	r3, .L975+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L252
	ldr	r3, .L975+8
	ldr	r3, [r3]
	cmp	r3, #21
	beq	.L159
.L252:
	ldr	r3, .L975+12
	ldr	r2, [r3]
	ldr	r3, .L975+16
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L254
	ldr	r3, .L975+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L254
	ldr	r3, .L975+76
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L256
	mov	r3, #0
	mov	r4, r3
.L256:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L254
	ldr	r3, .L975+12
	ldr	r3, [r3]
	cmp	r3, #21
	bne	.L257
.L254:
	ldr	r3, .L975+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L975+8
	ldr	r3, [r3]
	cmp	r3, #21
	bne	.L257
	ldr	r3, .L975+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L975+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L975+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L975+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L257:
	ldr	r3, .L975+12
	ldr	r2, [r3]
	ldr	r3, .L975+16
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L258
	ldr	r3, .L975+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L975+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L258
	ldr	r3, .L975+76
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L260
	mov	r3, #0
	mov	r4, r3
.L260:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L258
	ldr	r3, .L975+12
	ldr	r3, [r3]
	cmp	r3, #21
	beq	.L261
.L258:
	ldr	r3, .L975+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L261
	ldr	r3, .L975+8
	ldr	r3, [r3]
	cmp	r3, #21
	bne	.L261
	ldr	r3, .L975+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L261
	ldr	r3, .L975+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L261
	ldr	r3, .L975+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L261
	ldr	r3, .L975+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L159
.L261:
	ldr	r3, .L975+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L262
	ldr	r3, .L975+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L262
	ldr	r3, .L975+16
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L262
	ldr	r3, .L975+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L975+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L263
	b	.L976
.L977:
	.align	2
.L975:
	.word	p22_l1
	.word	delta
	.word	turn
	.word	id
	.word	_x_id
	.word	_x_p22_x
	.word	p22_x
	.word	_x_p22_l0
	.word	_x_p22_l1
	.word	p22_l0
	.word	_x_p21_l0
	.word	_x_p21_l1
	.word	_x_p21_x
	.word	p21_l0
	.word	p21_l1
	.word	p21_x
	.word	_x_p20_l0
	.word	_x_p20_l1
	.word	_x_p20_x
	.word	p20_x
	.word	p20_l0
	.word	p20_l1
	.word	_x_p19_l0
	.word	_x_p19_l1
	.word	p19_x
	.word	_x_p19_x
	.word	p19_l0
	.word	p19_l1
	.word	_x_p18_l0
	.word	_x_p18_l1
	.word	p18_x
	.word	_x_p18_x
	.word	p18_l0
	.word	p18_l1
	.word	p17_l0
	.word	p17_l1
	.word	p17_x
	.word	_x_p17_x
	.word	delta
	.word	turn
	.word	_x_p17_l1
	.word	_x_p17_l0
	.word	id
	.word	_x_id
.L976:
.L262:
	ldr	r3, .L975+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L263
	ldr	r3, .L975+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L263
	ldr	r3, .L975+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L263
	ldr	r3, .L975+156
	ldr	r3, [r3]
	cmp	r3, #21
	beq	.L159
.L263:
	ldr	r3, .L975+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L264
	ldr	r3, .L975+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L265
.L264:
	ldr	r3, .L975+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L266
	ldr	r3, .L975+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L265
.L266:
	ldr	r3, .L975+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L267
	ldr	r3, .L975+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L265
.L267:
	ldr	r3, .L975+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L975+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L265:
	ldr	r3, .L975+100
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L268
	ldr	r3, .L975+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L268
	ldr	r3, .L975+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L268:
	ldr	r3, .L975+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L975+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L269
	ldr	r3, .L975+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L975+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L269
	ldr	r3, .L975+152
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L975+96
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L975+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L270
.L269:
	ldr	r3, .L975+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L975+156
	ldr	r3, [r3]
	cmp	r3, #20
	bne	.L159
.L270:
	ldr	r3, .L975+168
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L272
	ldr	r3, .L975+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L272
	ldr	r3, .L975+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L272
	ldr	r3, .L975+168
	ldr	r2, [r3]
	ldr	r3, .L975+172
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L272
	ldr	r3, .L975+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L273
.L272:
	ldr	r3, .L975+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L273
	ldr	r3, .L975+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L273
	ldr	r3, .L975+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L273
	ldr	r3, .L975+156
	ldr	r3, [r3]
	cmp	r3, #20
	beq	.L159
.L273:
	ldr	r3, .L975+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L274
	ldr	r3, .L975+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L274
	ldr	r3, .L975+96
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L274
	ldr	r3, .L975+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L274
	ldr	r3, .L975+172
	ldr	r3, [r3]
	cmp	r3, #20
	beq	.L277
.L274:
	ldr	r3, .L975+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L277
	ldr	r3, .L975+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L277
	ldr	r3, .L975+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L277
	ldr	r3, .L975+156
	ldr	r3, [r3]
	cmp	r3, #20
	beq	.L159
.L277:
	ldr	r3, .L975+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L278
	ldr	r3, .L975+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L279
.L278:
	ldr	r3, .L975+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L280
	ldr	r3, .L975+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L279
.L280:
	ldr	r3, .L975+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L279
	ldr	r3, .L975+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L279
	ldr	r3, .L975+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L279
	ldr	r3, .L975+156
	ldr	r3, [r3]
	cmp	r3, #20
	beq	.L159
.L279:
	ldr	r3, .L975+168
	ldr	r2, [r3]
	ldr	r3, .L975+172
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L281
	ldr	r3, .L975+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L281
	ldr	r3, .L975+96
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L283
	mov	r3, #0
	mov	r4, r3
.L283:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L281
	ldr	r3, .L975+168
	ldr	r3, [r3]
	cmp	r3, #20
	bne	.L284
.L281:
	ldr	r3, .L975+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L284
	ldr	r3, .L975+156
	ldr	r3, [r3]
	cmp	r3, #20
	bne	.L284
	ldr	r3, .L975+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L284
	ldr	r3, .L975+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L284
	ldr	r3, .L975+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L284
	ldr	r3, .L975+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L284:
	ldr	r3, .L975+168
	ldr	r2, [r3]
	ldr	r3, .L975+172
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L285
	ldr	r3, .L975+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L975+100
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L285
	ldr	r3, .L975+96
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L287
	mov	r3, #0
	mov	r4, r3
.L287:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L285
	ldr	r3, .L975+168
	ldr	r3, [r3]
	cmp	r3, #20
	beq	.L288
.L285:
	ldr	r3, .L975+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L288
	ldr	r3, .L975+156
	ldr	r3, [r3]
	cmp	r3, #20
	bne	.L288
	ldr	r3, .L975+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L288
	ldr	r3, .L975+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L288
	ldr	r3, .L975+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L288
	ldr	r3, .L975+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L159
.L288:
	ldr	r3, .L975+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L289
	ldr	r3, .L975+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L289
	ldr	r3, .L975+172
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L289
	ldr	r3, .L975+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L975+100
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L290
.L289:
	ldr	r3, .L975+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L290
	ldr	r3, .L975+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L290
	ldr	r3, .L975+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L290
	ldr	r3, .L975+156
	ldr	r3, [r3]
	cmp	r3, #20
	beq	.L159
.L290:
	ldr	r3, .L975+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L291
	ldr	r3, .L975+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L292
.L291:
	ldr	r3, .L975+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L293
	ldr	r3, .L975+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L292
.L293:
	ldr	r3, .L975+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L294
	ldr	r3, .L975+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L292
.L294:
	ldr	r3, .L975+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L975+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L292:
	ldr	r3, .L975+124
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L295
	ldr	r3, .L975+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L295
	ldr	r3, .L975+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L295:
	ldr	r3, .L975+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L975+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L296
	ldr	r3, .L975+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L975+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L296
	ldr	r3, .L975+152
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L975+120
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L975+124
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L297
.L296:
	ldr	r3, .L975+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L975+156
	ldr	r3, [r3]
	cmp	r3, #19
	bne	.L159
.L297:
	ldr	r3, .L975+168
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L299
	ldr	r3, .L975+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L299
	ldr	r3, .L975+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L299
	ldr	r3, .L975+168
	ldr	r2, [r3]
	ldr	r3, .L975+172
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L299
	ldr	r3, .L975+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L300
.L299:
	ldr	r3, .L975+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L300
	ldr	r3, .L975+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L300
	ldr	r3, .L975+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L300
	ldr	r3, .L975+156
	ldr	r3, [r3]
	cmp	r3, #19
	beq	.L159
.L300:
	ldr	r3, .L975+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L301
	ldr	r3, .L975+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L301
	ldr	r3, .L975+120
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L301
	ldr	r3, .L975+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L301
	ldr	r3, .L975+172
	ldr	r3, [r3]
	cmp	r3, #19
	beq	.L304
.L301:
	ldr	r3, .L975+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L304
	ldr	r3, .L975+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L304
	ldr	r3, .L975+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L304
	ldr	r3, .L975+156
	ldr	r3, [r3]
	cmp	r3, #19
	beq	.L159
.L304:
	ldr	r3, .L975+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L305
	ldr	r3, .L975+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L306
.L305:
	ldr	r3, .L975+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L307
	ldr	r3, .L975+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L306
.L307:
	ldr	r3, .L975+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L306
	ldr	r3, .L975+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L306
	ldr	r3, .L975+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L306
	ldr	r3, .L975+156
	ldr	r3, [r3]
	cmp	r3, #19
	beq	.L159
.L306:
	ldr	r3, .L975+168
	ldr	r2, [r3]
	ldr	r3, .L975+172
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L308
	ldr	r3, .L975+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L308
	ldr	r3, .L975+120
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L310
	mov	r3, #0
	mov	r4, r3
.L310:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L308
	ldr	r3, .L975+168
	ldr	r3, [r3]
	cmp	r3, #19
	bne	.L311
.L308:
	ldr	r3, .L975+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L311
	ldr	r3, .L975+156
	ldr	r3, [r3]
	cmp	r3, #19
	bne	.L311
	ldr	r3, .L975+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L311
	ldr	r3, .L975+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L311
	ldr	r3, .L975+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L311
	ldr	r3, .L975+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L311:
	ldr	r3, .L975+168
	ldr	r2, [r3]
	ldr	r3, .L975+172
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L312
	ldr	r3, .L975+120
	ldr	r3, [r3]	@ float
	ldr	r2, .L975+124
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L312
	ldr	r3, .L975+120
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L314
	mov	r3, #0
	mov	r4, r3
.L314:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L312
	ldr	r3, .L975+168
	ldr	r3, [r3]
	cmp	r3, #19
	beq	.L315
.L312:
	ldr	r3, .L975+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L315
	ldr	r3, .L975+156
	ldr	r3, [r3]
	cmp	r3, #19
	bne	.L315
	ldr	r3, .L975+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L315
	ldr	r3, .L975+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L315
	ldr	r3, .L975+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L315
	ldr	r3, .L975+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L159
.L315:
	ldr	r3, .L975+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L316
	ldr	r3, .L975+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L316
	ldr	r3, .L975+172
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L316
	ldr	r3, .L975+120
	ldr	r3, [r3]	@ float
	ldr	r2, .L975+124
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L317
.L316:
	ldr	r3, .L975+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L317
	ldr	r3, .L975+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L317
	ldr	r3, .L975+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L317
	ldr	r3, .L975+156
	ldr	r3, [r3]
	cmp	r3, #19
	beq	.L159
.L317:
	ldr	r3, .L975+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L318
	ldr	r3, .L975+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L319
.L318:
	ldr	r3, .L975+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L320
	ldr	r3, .L975+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L319
.L320:
	ldr	r3, .L975+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L321
	ldr	r3, .L975+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L319
.L321:
	ldr	r3, .L975+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L975+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L319:
	ldr	r3, .L975+148
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L322
	ldr	r3, .L975+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L322
	ldr	r3, .L975+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L322:
	ldr	r3, .L975+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L975+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L323
	ldr	r3, .L975+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L975+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L323
	ldr	r3, .L975+152
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L975+144
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L975+148
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L324
.L323:
	ldr	r3, .L975+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L975+156
	ldr	r3, [r3]
	cmp	r3, #18
	bne	.L159
.L324:
	ldr	r3, .L975+168
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L326
	ldr	r3, .L975+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L326
	ldr	r3, .L975+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L326
	ldr	r3, .L975+168
	ldr	r2, [r3]
	ldr	r3, .L975+172
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L326
	ldr	r3, .L978
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L327
.L326:
	ldr	r3, .L978+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L327
	ldr	r3, .L978+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L327
	ldr	r3, .L978+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L327
	ldr	r3, .L978+76
	ldr	r3, [r3]
	cmp	r3, #18
	beq	.L159
.L327:
	ldr	r3, .L978+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L328
	ldr	r3, .L978+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L328
	ldr	r3, .L978+24
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L328
	ldr	r3, .L978
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L328
	ldr	r3, .L978+116
	ldr	r3, [r3]
	cmp	r3, #18
	beq	.L331
.L328:
	ldr	r3, .L978+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L331
	ldr	r3, .L978+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L331
	ldr	r3, .L978+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L331
	ldr	r3, .L978+76
	ldr	r3, [r3]
	cmp	r3, #18
	beq	.L159
.L331:
	ldr	r3, .L978+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L332
	ldr	r3, .L978+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L333
.L332:
	ldr	r3, .L978+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L334
	ldr	r3, .L978+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L333
.L334:
	ldr	r3, .L978+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L333
	ldr	r3, .L978+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L333
	ldr	r3, .L978+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L333
	ldr	r3, .L978+76
	ldr	r3, [r3]
	cmp	r3, #18
	beq	.L159
.L333:
	ldr	r3, .L978+104
	ldr	r2, [r3]
	ldr	r3, .L978+116
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L335
	ldr	r3, .L978
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L335
	ldr	r3, .L978+24
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L337
	mov	r3, #0
	mov	r4, r3
.L337:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L335
	ldr	r3, .L978+104
	ldr	r3, [r3]
	cmp	r3, #18
	bne	.L338
.L335:
	ldr	r3, .L978+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L338
	ldr	r3, .L978+76
	ldr	r3, [r3]
	cmp	r3, #18
	bne	.L338
	ldr	r3, .L978+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L338
	ldr	r3, .L978+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L338
	ldr	r3, .L978+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L338
	ldr	r3, .L978+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L338:
	ldr	r3, .L978+104
	ldr	r2, [r3]
	ldr	r3, .L978+116
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L339
	ldr	r3, .L978+24
	ldr	r3, [r3]	@ float
	ldr	r2, .L978
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L339
	ldr	r3, .L978+24
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L341
	mov	r3, #0
	mov	r4, r3
.L341:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L339
	ldr	r3, .L978+104
	ldr	r3, [r3]
	cmp	r3, #18
	beq	.L342
.L339:
	ldr	r3, .L978+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L342
	ldr	r3, .L978+76
	ldr	r3, [r3]
	cmp	r3, #18
	bne	.L342
	ldr	r3, .L978+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L342
	ldr	r3, .L978+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L342
	ldr	r3, .L978+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L342
	ldr	r3, .L978+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L159
.L342:
	ldr	r3, .L978+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L343
	ldr	r3, .L978+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L343
	ldr	r3, .L978+116
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L343
	ldr	r3, .L978+24
	ldr	r3, [r3]	@ float
	ldr	r2, .L978
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L344
.L343:
	ldr	r3, .L978+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L344
	ldr	r3, .L978+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L344
	ldr	r3, .L978+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L344
	ldr	r3, .L978+76
	ldr	r3, [r3]
	cmp	r3, #18
	beq	.L159
.L344:
	ldr	r3, .L978+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L345
	ldr	r3, .L978+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L346
.L345:
	ldr	r3, .L978+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L347
	ldr	r3, .L978+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L346
.L347:
	ldr	r3, .L978+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L348
	ldr	r3, .L978+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L346
.L348:
	ldr	r3, .L978+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L978+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L346:
	ldr	r3, .L978+36
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L978+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L978+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L349:
	ldr	r3, .L978+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L978+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L350
	ldr	r3, .L978+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L978+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L350
	ldr	r3, .L978+12
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L978+48
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L978+36
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L351
.L350:
	ldr	r3, .L978+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L978+76
	ldr	r3, [r3]
	cmp	r3, #17
	bne	.L159
.L351:
	ldr	r3, .L978+104
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L353
	ldr	r3, .L978+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L353
	ldr	r3, .L978+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L353
	ldr	r3, .L978+104
	ldr	r2, [r3]
	ldr	r3, .L978+116
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L353
	ldr	r3, .L978+36
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L354
.L353:
	ldr	r3, .L978+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L354
	ldr	r3, .L978+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L354
	ldr	r3, .L978+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L354
	ldr	r3, .L978+76
	ldr	r3, [r3]
	cmp	r3, #17
	beq	.L159
.L354:
	ldr	r3, .L978+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L355
	ldr	r3, .L978+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L355
	ldr	r3, .L978+48
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L355
	ldr	r3, .L978+36
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L355
	ldr	r3, .L978+116
	ldr	r3, [r3]
	cmp	r3, #17
	beq	.L358
.L355:
	ldr	r3, .L978+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L358
	ldr	r3, .L978+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L358
	ldr	r3, .L978+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L358
	ldr	r3, .L978+76
	ldr	r3, [r3]
	cmp	r3, #17
	beq	.L159
.L358:
	ldr	r3, .L978+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L359
	ldr	r3, .L978+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L360
.L359:
	ldr	r3, .L978+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L361
	ldr	r3, .L978+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L360
.L361:
	ldr	r3, .L978+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L360
	ldr	r3, .L978+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L360
	ldr	r3, .L978+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L360
	ldr	r3, .L978+76
	ldr	r3, [r3]
	cmp	r3, #17
	beq	.L159
.L360:
	ldr	r3, .L978+104
	ldr	r2, [r3]
	ldr	r3, .L978+116
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L362
	ldr	r3, .L978+36
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L362
	ldr	r3, .L978+48
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L364
	mov	r3, #0
	mov	r4, r3
.L364:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L362
	ldr	r3, .L978+104
	ldr	r3, [r3]
	cmp	r3, #17
	bne	.L365
.L362:
	ldr	r3, .L978+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L365
	ldr	r3, .L978+76
	ldr	r3, [r3]
	cmp	r3, #17
	bne	.L365
	ldr	r3, .L978+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L365
	ldr	r3, .L978+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L365
	ldr	r3, .L978+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L365
	ldr	r3, .L978+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L365:
	ldr	r3, .L978+104
	ldr	r2, [r3]
	ldr	r3, .L978+116
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L366
	ldr	r3, .L978+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L978+36
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L366
	ldr	r3, .L978+48
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L368
	mov	r3, #0
	mov	r4, r3
.L368:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L366
	ldr	r3, .L978+104
	ldr	r3, [r3]
	cmp	r3, #17
	beq	.L369
.L366:
	ldr	r3, .L978+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L369
	ldr	r3, .L978+76
	ldr	r3, [r3]
	cmp	r3, #17
	bne	.L369
	ldr	r3, .L978+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L369
	ldr	r3, .L978+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L369
	ldr	r3, .L978+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L369
	ldr	r3, .L978+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L159
.L369:
	ldr	r3, .L978+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L370
	ldr	r3, .L978+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L370
	ldr	r3, .L978+116
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L370
	ldr	r3, .L978+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L978+36
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L371
.L370:
	ldr	r3, .L978+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L371
	ldr	r3, .L978+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L371
	ldr	r3, .L978+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L371
	ldr	r3, .L978+76
	ldr	r3, [r3]
	cmp	r3, #17
	beq	.L159
.L371:
	ldr	r3, .L978+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L372
	ldr	r3, .L978+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L373
.L372:
	ldr	r3, .L978+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L374
	ldr	r3, .L978+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L373
.L374:
	ldr	r3, .L978+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L375
	ldr	r3, .L978+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L373
.L375:
	ldr	r3, .L978+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L978+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L373:
	ldr	r3, .L978+64
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L376
	ldr	r3, .L978+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L376
	ldr	r3, .L978+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L376:
	ldr	r3, .L978+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L978+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L377
	ldr	r3, .L978+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L978+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L377
	ldr	r3, .L978+12
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L978+60
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L978+64
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L378
.L377:
	ldr	r3, .L978+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L978+76
	ldr	r3, [r3]
	cmp	r3, #16
	bne	.L159
.L378:
	ldr	r3, .L978+104
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L380
	ldr	r3, .L978+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L380
	ldr	r3, .L978+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L380
	ldr	r3, .L978+104
	ldr	r2, [r3]
	ldr	r3, .L978+116
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L380
	ldr	r3, .L978+64
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L381
.L380:
	ldr	r3, .L978+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L381
	ldr	r3, .L978+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L381
	ldr	r3, .L978+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L381
	ldr	r3, .L978+76
	ldr	r3, [r3]
	cmp	r3, #16
	beq	.L159
.L381:
	ldr	r3, .L978+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L382
	ldr	r3, .L978+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L382
	ldr	r3, .L978+60
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L382
	ldr	r3, .L978+64
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L382
	ldr	r3, .L978+116
	ldr	r3, [r3]
	cmp	r3, #16
	beq	.L385
.L382:
	ldr	r3, .L978+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L385
	ldr	r3, .L978+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L385
	ldr	r3, .L978+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L385
	ldr	r3, .L978+76
	ldr	r3, [r3]
	cmp	r3, #16
	beq	.L159
.L385:
	ldr	r3, .L978+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L386
	ldr	r3, .L978+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L387
.L386:
	ldr	r3, .L978+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L388
	ldr	r3, .L978+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L387
.L388:
	ldr	r3, .L978+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L387
	ldr	r3, .L978+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L387
	ldr	r3, .L978+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L387
	ldr	r3, .L978+76
	ldr	r3, [r3]
	cmp	r3, #16
	beq	.L159
.L387:
	ldr	r3, .L978+104
	ldr	r2, [r3]
	ldr	r3, .L978+116
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L389
	ldr	r3, .L978+64
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L389
	ldr	r3, .L978+60
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L391
	mov	r3, #0
	mov	r4, r3
.L391:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L389
	ldr	r3, .L978+104
	ldr	r3, [r3]
	cmp	r3, #16
	bne	.L392
.L389:
	ldr	r3, .L978+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L392
	ldr	r3, .L978+76
	ldr	r3, [r3]
	cmp	r3, #16
	bne	.L392
	ldr	r3, .L978+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L392
	ldr	r3, .L978+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L392
	b	.L979
.L980:
	.align	2
.L978:
	.word	_x_p17_x
	.word	p17_l0
	.word	p17_l1
	.word	delta
	.word	_x_p17_l0
	.word	_x_p17_l1
	.word	p17_x
	.word	_x_p16_l0
	.word	_x_p16_l1
	.word	_x_p16_x
	.word	p16_l0
	.word	p16_l1
	.word	p16_x
	.word	_x_p15_l0
	.word	_x_p15_l1
	.word	p15_x
	.word	_x_p15_x
	.word	p15_l0
	.word	p15_l1
	.word	turn
	.word	_x_p14_l0
	.word	_x_p14_l1
	.word	p14_x
	.word	_x_p14_x
	.word	p14_l0
	.word	p14_l1
	.word	id
	.word	_x_p13_l0
	.word	_x_p13_l1
	.word	_x_id
	.word	p13_x
	.word	_x_p13_x
	.word	p13_l0
	.word	p13_l1
	.word	delta
	.word	turn
	.word	_x_p12_x
	.word	_x_p12_l1
	.word	_x_p12_l0
	.word	p12_l0
.L979:
	ldr	r3, .L978+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L392
	ldr	r3, .L978+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L392:
	ldr	r3, .L978+104
	ldr	r2, [r3]
	ldr	r3, .L978+116
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L393
	ldr	r3, .L978+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L978+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L393
	ldr	r3, .L978+60
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L395
	mov	r3, #0
	mov	r4, r3
.L395:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L393
	ldr	r3, .L978+104
	ldr	r3, [r3]
	cmp	r3, #16
	beq	.L396
.L393:
	ldr	r3, .L978+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L396
	ldr	r3, .L978+76
	ldr	r3, [r3]
	cmp	r3, #16
	bne	.L396
	ldr	r3, .L978+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L396
	ldr	r3, .L978+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L396
	ldr	r3, .L978+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L396
	ldr	r3, .L978+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L159
.L396:
	ldr	r3, .L978+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L397
	ldr	r3, .L978+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L397
	ldr	r3, .L978+116
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L397
	ldr	r3, .L978+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L978+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L398
.L397:
	ldr	r3, .L978+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L398
	ldr	r3, .L978+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L398
	ldr	r3, .L978+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L398
	ldr	r3, .L978+76
	ldr	r3, [r3]
	cmp	r3, #16
	beq	.L159
.L398:
	ldr	r3, .L978+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L399
	ldr	r3, .L978+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L400
.L399:
	ldr	r3, .L978+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L401
	ldr	r3, .L978+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L400
.L401:
	ldr	r3, .L978+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L402
	ldr	r3, .L978+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L400
.L402:
	ldr	r3, .L978+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L978+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L400:
	ldr	r3, .L978+92
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L403
	ldr	r3, .L978+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L403
	ldr	r3, .L978+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L403:
	ldr	r3, .L978+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L978+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L404
	ldr	r3, .L978+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L978+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L404
	ldr	r3, .L978+136
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L978+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L978+92
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
.L404:
	ldr	r3, .L978+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L978+140
	ldr	r3, [r3]
	cmp	r3, #15
	bne	.L159
.L405:
	ldr	r3, .L978+104
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L407
	ldr	r3, .L978+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L407
	ldr	r3, .L978+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L407
	ldr	r3, .L978+104
	ldr	r2, [r3]
	ldr	r3, .L978+116
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L407
	ldr	r3, .L978+92
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L408
.L407:
	ldr	r3, .L978+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L408
	ldr	r3, .L978+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L408
	ldr	r3, .L978+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L408
	ldr	r3, .L978+140
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L159
.L408:
	ldr	r3, .L978+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L409
	ldr	r3, .L978+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L409
	ldr	r3, .L978+88
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L409
	ldr	r3, .L978+92
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L409
	ldr	r3, .L978+116
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L412
.L409:
	ldr	r3, .L978+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L412
	ldr	r3, .L978+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L412
	ldr	r3, .L978+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L412
	ldr	r3, .L978+140
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L159
.L412:
	ldr	r3, .L978+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L413
	ldr	r3, .L978+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L414
.L413:
	ldr	r3, .L978+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L415
	ldr	r3, .L978+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L414
.L415:
	ldr	r3, .L978+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L414
	ldr	r3, .L978+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L414
	ldr	r3, .L978+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L414
	ldr	r3, .L978+140
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L159
.L414:
	ldr	r3, .L978+104
	ldr	r2, [r3]
	ldr	r3, .L978+116
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L416
	ldr	r3, .L978+92
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L416
	ldr	r3, .L978+88
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L418
	mov	r3, #0
	mov	r4, r3
.L418:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L416
	ldr	r3, .L978+104
	ldr	r3, [r3]
	cmp	r3, #15
	bne	.L419
.L416:
	ldr	r3, .L978+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L419
	ldr	r3, .L978+140
	ldr	r3, [r3]
	cmp	r3, #15
	bne	.L419
	ldr	r3, .L978+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L419
	ldr	r3, .L978+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L419
	ldr	r3, .L978+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L419
	ldr	r3, .L978+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L419:
	ldr	r3, .L978+104
	ldr	r2, [r3]
	ldr	r3, .L978+116
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L420
	ldr	r3, .L978+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L978+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L420
	ldr	r3, .L978+88
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L422
	mov	r3, #0
	mov	r4, r3
.L422:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L420
	ldr	r3, .L978+104
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L423
.L420:
	ldr	r3, .L978+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L423
	ldr	r3, .L978+140
	ldr	r3, [r3]
	cmp	r3, #15
	bne	.L423
	ldr	r3, .L978+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L423
	ldr	r3, .L978+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L423
	ldr	r3, .L978+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L423
	ldr	r3, .L978+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L159
.L423:
	ldr	r3, .L978+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L424
	ldr	r3, .L978+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L424
	ldr	r3, .L978+116
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L424
	ldr	r3, .L978+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L978+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L425
.L424:
	ldr	r3, .L978+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L425
	ldr	r3, .L978+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L425
	ldr	r3, .L978+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L425
	ldr	r3, .L978+140
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L159
.L425:
	ldr	r3, .L978+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L426
	ldr	r3, .L978+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L427
.L426:
	ldr	r3, .L978+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L428
	ldr	r3, .L978+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L427
.L428:
	ldr	r3, .L978+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L429
	ldr	r3, .L978+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L427
.L429:
	ldr	r3, .L978+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L978+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L427:
	ldr	r3, .L978+124
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L430
	ldr	r3, .L978+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L430
	ldr	r3, .L978+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L430:
	ldr	r3, .L978+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L978+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L431
	ldr	r3, .L978+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L978+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L431
	ldr	r3, .L978+136
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L978+120
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L978+124
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L432
.L431:
	ldr	r3, .L978+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L978+140
	ldr	r3, [r3]
	cmp	r3, #14
	bne	.L159
.L432:
	ldr	r3, .L978+104
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L434
	ldr	r3, .L978+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L434
	ldr	r3, .L978+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L434
	ldr	r3, .L978+104
	ldr	r2, [r3]
	ldr	r3, .L978+116
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L434
	ldr	r3, .L978+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L435
.L434:
	ldr	r3, .L978+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L435
	ldr	r3, .L978+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L435
	ldr	r3, .L978+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L435
	ldr	r3, .L978+140
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L159
.L435:
	ldr	r3, .L978+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L436
	ldr	r3, .L978+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L436
	ldr	r3, .L978+120
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L436
	ldr	r3, .L978+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L436
	ldr	r3, .L978+116
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L439
.L436:
	ldr	r3, .L978+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L439
	ldr	r3, .L978+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L439
	ldr	r3, .L978+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L439
	ldr	r3, .L978+140
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L159
.L439:
	ldr	r3, .L978+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L440
	ldr	r3, .L978+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L441
.L440:
	ldr	r3, .L978+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L442
	ldr	r3, .L978+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L441
.L442:
	ldr	r3, .L978+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L441
	ldr	r3, .L978+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L441
	ldr	r3, .L978+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L441
	ldr	r3, .L978+140
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L159
.L441:
	ldr	r3, .L978+104
	ldr	r2, [r3]
	ldr	r3, .L978+116
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L443
	ldr	r3, .L978+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L443
	ldr	r3, .L978+120
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L445
	mov	r3, #0
	mov	r4, r3
.L445:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L443
	ldr	r3, .L978+104
	ldr	r3, [r3]
	cmp	r3, #14
	bne	.L446
.L443:
	ldr	r3, .L978+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L446
	ldr	r3, .L978+140
	ldr	r3, [r3]
	cmp	r3, #14
	bne	.L446
	ldr	r3, .L978+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L446
	ldr	r3, .L978+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L446
	ldr	r3, .L978+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L446
	ldr	r3, .L978+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L446:
	ldr	r3, .L978+104
	ldr	r2, [r3]
	ldr	r3, .L978+116
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L447
	ldr	r3, .L978+120
	ldr	r3, [r3]	@ float
	ldr	r2, .L978+124
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L447
	ldr	r3, .L978+120
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L449
	mov	r3, #0
	mov	r4, r3
.L449:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L447
	ldr	r3, .L978+104
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L450
.L447:
	ldr	r3, .L978+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L450
	ldr	r3, .L978+140
	ldr	r3, [r3]
	cmp	r3, #14
	bne	.L450
	ldr	r3, .L978+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L450
	ldr	r3, .L978+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L450
	ldr	r3, .L978+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L450
	ldr	r3, .L978+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L159
.L450:
	ldr	r3, .L978+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L451
	ldr	r3, .L978+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L451
	ldr	r3, .L978+116
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L451
	ldr	r3, .L978+120
	ldr	r3, [r3]	@ float
	ldr	r2, .L978+124
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L452
.L451:
	ldr	r3, .L978+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L452
	ldr	r3, .L978+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L452
	ldr	r3, .L978+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L452
	ldr	r3, .L978+140
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L159
.L452:
	ldr	r3, .L978+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L453
	ldr	r3, .L978+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L454
.L453:
	ldr	r3, .L978+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L455
	ldr	r3, .L978+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L454
.L455:
	ldr	r3, .L978+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L456
	ldr	r3, .L978+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L454
.L456:
	ldr	r3, .L978+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L978+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L454:
	ldr	r3, .L978+144
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L457
	ldr	r3, .L978+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L457
	ldr	r3, .L978+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L457:
	ldr	r3, .L978+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L981
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L458
	ldr	r3, .L981+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L981+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L458
	ldr	r3, .L981+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L981+12
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L981+16
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L459
.L458:
	ldr	r3, .L981+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #13
	bne	.L159
.L459:
	ldr	r3, .L981+112
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L461
	ldr	r3, .L981+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L461
	ldr	r3, .L981
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L461
	ldr	r3, .L981+112
	ldr	r2, [r3]
	ldr	r3, .L981+100
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L461
	ldr	r3, .L981+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L462
.L461:
	ldr	r3, .L981+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L462
	ldr	r3, .L981+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L462
	ldr	r3, .L981+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L462
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L159
.L462:
	ldr	r3, .L981
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L463
	ldr	r3, .L981+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L463
	ldr	r3, .L981+12
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L463
	ldr	r3, .L981+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L463
	ldr	r3, .L981+100
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L466
.L463:
	ldr	r3, .L981+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L466
	ldr	r3, .L981+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L466
	ldr	r3, .L981+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L466
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L159
.L466:
	ldr	r3, .L981
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L467
	ldr	r3, .L981+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L468
.L467:
	ldr	r3, .L981
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L469
	ldr	r3, .L981+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L468
.L469:
	ldr	r3, .L981+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L468
	ldr	r3, .L981+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L468
	ldr	r3, .L981+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L468
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L159
.L468:
	ldr	r3, .L981+112
	ldr	r2, [r3]
	ldr	r3, .L981+100
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L470
	ldr	r3, .L981+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L470
	ldr	r3, .L981+12
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L472
	mov	r3, #0
	mov	r4, r3
.L472:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L470
	ldr	r3, .L981+112
	ldr	r3, [r3]
	cmp	r3, #13
	bne	.L473
.L470:
	ldr	r3, .L981+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L473
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #13
	bne	.L473
	ldr	r3, .L981
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L473
	ldr	r3, .L981+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L473
	ldr	r3, .L981+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L473
	ldr	r3, .L981+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L473:
	ldr	r3, .L981+112
	ldr	r2, [r3]
	ldr	r3, .L981+100
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L474
	ldr	r3, .L981+12
	ldr	r3, [r3]	@ float
	ldr	r2, .L981+16
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L474
	ldr	r3, .L981+12
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L476
	mov	r3, #0
	mov	r4, r3
.L476:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L474
	ldr	r3, .L981+112
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L477
.L474:
	ldr	r3, .L981+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L477
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #13
	bne	.L477
	ldr	r3, .L981+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L477
	ldr	r3, .L981+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L477
	ldr	r3, .L981
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L477
	ldr	r3, .L981+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L159
.L477:
	ldr	r3, .L981
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L478
	ldr	r3, .L981+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L478
	ldr	r3, .L981+100
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L478
	ldr	r3, .L981+12
	ldr	r3, [r3]	@ float
	ldr	r2, .L981+16
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L479
.L478:
	ldr	r3, .L981+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L479
	ldr	r3, .L981+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L479
	ldr	r3, .L981+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L479
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L159
.L479:
	ldr	r3, .L981+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L480
	ldr	r3, .L981+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L481
.L480:
	ldr	r3, .L981+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L482
	ldr	r3, .L981+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L481
.L482:
	ldr	r3, .L981+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L483
	ldr	r3, .L981+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L481
.L483:
	ldr	r3, .L981+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L981+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L481:
	ldr	r3, .L981+32
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L484
	ldr	r3, .L981+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L484
	ldr	r3, .L981+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L484:
	ldr	r3, .L981+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L981+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L485
	ldr	r3, .L981+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L981+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L485
	ldr	r3, .L981+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L981+44
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L981+32
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L486
.L485:
	ldr	r3, .L981+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #12
	bne	.L159
.L486:
	ldr	r3, .L981+112
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L488
	ldr	r3, .L981+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L488
	ldr	r3, .L981+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L488
	ldr	r3, .L981+112
	ldr	r2, [r3]
	ldr	r3, .L981+100
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L488
	ldr	r3, .L981+32
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L489
.L488:
	ldr	r3, .L981+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L489
	ldr	r3, .L981+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L489
	ldr	r3, .L981+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L489
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L159
.L489:
	ldr	r3, .L981+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L490
	ldr	r3, .L981+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L490
	ldr	r3, .L981+44
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L490
	ldr	r3, .L981+32
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L490
	ldr	r3, .L981+100
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L493
.L490:
	ldr	r3, .L981+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L493
	ldr	r3, .L981+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L493
	ldr	r3, .L981+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L493
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L159
.L493:
	ldr	r3, .L981+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L494
	ldr	r3, .L981+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L495
.L494:
	ldr	r3, .L981+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L496
	ldr	r3, .L981+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L495
.L496:
	ldr	r3, .L981+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L495
	ldr	r3, .L981+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L495
	ldr	r3, .L981+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L495
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L159
.L495:
	ldr	r3, .L981+112
	ldr	r2, [r3]
	ldr	r3, .L981+100
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L497
	ldr	r3, .L981+32
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L497
	ldr	r3, .L981+44
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L499
	mov	r3, #0
	mov	r4, r3
.L499:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L497
	ldr	r3, .L981+112
	ldr	r3, [r3]
	cmp	r3, #12
	bne	.L500
.L497:
	ldr	r3, .L981+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L500
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #12
	bne	.L500
	ldr	r3, .L981+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L500
	ldr	r3, .L981+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L500
	ldr	r3, .L981+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L500
	ldr	r3, .L981+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L500:
	ldr	r3, .L981+112
	ldr	r2, [r3]
	ldr	r3, .L981+100
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L501
	ldr	r3, .L981+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L981+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L501
	ldr	r3, .L981+44
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L503
	mov	r3, #0
	mov	r4, r3
.L503:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L501
	ldr	r3, .L981+112
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L504
.L501:
	ldr	r3, .L981+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L504
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #12
	bne	.L504
	ldr	r3, .L981+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L504
	ldr	r3, .L981+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L504
	ldr	r3, .L981+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L504
	ldr	r3, .L981+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L159
.L504:
	ldr	r3, .L981+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L505
	ldr	r3, .L981+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L505
	ldr	r3, .L981+100
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L505
	ldr	r3, .L981+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L981+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L506
.L505:
	ldr	r3, .L981+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L506
	ldr	r3, .L981+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L506
	ldr	r3, .L981+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L506
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L159
.L506:
	ldr	r3, .L981+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L507
	ldr	r3, .L981+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L508
.L507:
	ldr	r3, .L981+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L509
	ldr	r3, .L981+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L508
.L509:
	ldr	r3, .L981+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L510
	ldr	r3, .L981+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L508
.L510:
	ldr	r3, .L981+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L981+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L508:
	ldr	r3, .L981+60
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L511
	ldr	r3, .L981+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L511
	ldr	r3, .L981+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L511:
	ldr	r3, .L981+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L981+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L512
	ldr	r3, .L981+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L981+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L512
	ldr	r3, .L981+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L981+56
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L981+60
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L513
.L512:
	ldr	r3, .L981+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #11
	bne	.L159
.L513:
	ldr	r3, .L981+112
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L515
	ldr	r3, .L981+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L515
	ldr	r3, .L981+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L515
	ldr	r3, .L981+112
	ldr	r2, [r3]
	ldr	r3, .L981+100
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L515
	ldr	r3, .L981+60
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L516
.L515:
	ldr	r3, .L981+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L516
	ldr	r3, .L981+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L516
	ldr	r3, .L981+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L516
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L159
.L516:
	ldr	r3, .L981+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L517
	ldr	r3, .L981+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L517
	ldr	r3, .L981+56
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L517
	ldr	r3, .L981+60
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L517
	ldr	r3, .L981+100
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L520
.L517:
	ldr	r3, .L981+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L520
	ldr	r3, .L981+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L520
	ldr	r3, .L981+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L520
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #11
	b	.L982
.L983:
	.align	2
.L981:
	.word	_x_p12_l0
	.word	p12_l1
	.word	_x_p12_l1
	.word	p12_x
	.word	_x_p12_x
	.word	p12_l0
	.word	_x_p11_l0
	.word	_x_p11_l1
	.word	_x_p11_x
	.word	p11_l0
	.word	p11_l1
	.word	p11_x
	.word	_x_p10_l0
	.word	_x_p10_l1
	.word	p10_x
	.word	_x_p10_x
	.word	p10_l0
	.word	p10_l1
	.word	delta
	.word	_x_p9_l0
	.word	_x_p9_l1
	.word	p9_x
	.word	_x_p9_x
	.word	p9_l0
	.word	p9_l1
	.word	_x_id
	.word	_x_p8_x
	.word	p8_x
	.word	id
	.word	delta
	.word	turn
	.word	p8_l0
	.word	p8_l1
	.word	_x_p8_l0
	.word	_x_p8_l1
.L982:
	beq	.L159
.L520:
	ldr	r3, .L981+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L521
	ldr	r3, .L981+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L522
.L521:
	ldr	r3, .L981+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L523
	ldr	r3, .L981+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L522
.L523:
	ldr	r3, .L981+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L522
	ldr	r3, .L981+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L522
	ldr	r3, .L981+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L522
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L159
.L522:
	ldr	r3, .L981+112
	ldr	r2, [r3]
	ldr	r3, .L981+100
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L524
	ldr	r3, .L981+60
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L524
	ldr	r3, .L981+56
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L526
	mov	r3, #0
	mov	r4, r3
.L526:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L524
	ldr	r3, .L981+112
	ldr	r3, [r3]
	cmp	r3, #11
	bne	.L527
.L524:
	ldr	r3, .L981+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L527
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #11
	bne	.L527
	ldr	r3, .L981+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L527
	ldr	r3, .L981+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L527
	ldr	r3, .L981+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L527
	ldr	r3, .L981+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L527:
	ldr	r3, .L981+112
	ldr	r2, [r3]
	ldr	r3, .L981+100
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L528
	ldr	r3, .L981+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L981+60
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L528
	ldr	r3, .L981+56
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L530
	mov	r3, #0
	mov	r4, r3
.L530:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L528
	ldr	r3, .L981+112
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L531
.L528:
	ldr	r3, .L981+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L531
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #11
	bne	.L531
	ldr	r3, .L981+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L531
	ldr	r3, .L981+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L531
	ldr	r3, .L981+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L531
	ldr	r3, .L981+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L159
.L531:
	ldr	r3, .L981+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L532
	ldr	r3, .L981+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L532
	ldr	r3, .L981+100
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L532
	ldr	r3, .L981+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L981+60
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L533
.L532:
	ldr	r3, .L981+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L533
	ldr	r3, .L981+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L533
	ldr	r3, .L981+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L533
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L159
.L533:
	ldr	r3, .L981+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L534
	ldr	r3, .L981+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L535
.L534:
	ldr	r3, .L981+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L536
	ldr	r3, .L981+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L535
.L536:
	ldr	r3, .L981+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L537
	ldr	r3, .L981+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L535
.L537:
	ldr	r3, .L981+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L981+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L535:
	ldr	r3, .L981+88
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L538
	ldr	r3, .L981+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L538
	ldr	r3, .L981+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L538:
	ldr	r3, .L981+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L981+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L539
	ldr	r3, .L981+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L981+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L539
	ldr	r3, .L981+116
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L981+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L981+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L540
.L539:
	ldr	r3, .L981+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #10
	bne	.L159
.L540:
	ldr	r3, .L981+112
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L542
	ldr	r3, .L981+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L542
	ldr	r3, .L981+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L542
	ldr	r3, .L981+112
	ldr	r2, [r3]
	ldr	r3, .L981+100
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L542
	ldr	r3, .L981+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L543
.L542:
	ldr	r3, .L981+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L543
	ldr	r3, .L981+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L543
	ldr	r3, .L981+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L543
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L159
.L543:
	ldr	r3, .L981+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L544
	ldr	r3, .L981+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L544
	ldr	r3, .L981+84
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L544
	ldr	r3, .L981+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L544
	ldr	r3, .L981+100
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L547
.L544:
	ldr	r3, .L981+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L547
	ldr	r3, .L981+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L547
	ldr	r3, .L981+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L547
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L159
.L547:
	ldr	r3, .L981+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L548
	ldr	r3, .L981+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L549
.L548:
	ldr	r3, .L981+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L550
	ldr	r3, .L981+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L549
.L550:
	ldr	r3, .L981+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L549
	ldr	r3, .L981+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L549
	ldr	r3, .L981+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L549
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L159
.L549:
	ldr	r3, .L981+112
	ldr	r2, [r3]
	ldr	r3, .L981+100
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L551
	ldr	r3, .L981+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L551
	ldr	r3, .L981+84
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L553
	mov	r3, #0
	mov	r4, r3
.L553:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L551
	ldr	r3, .L981+112
	ldr	r3, [r3]
	cmp	r3, #10
	bne	.L554
.L551:
	ldr	r3, .L981+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L554
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #10
	bne	.L554
	ldr	r3, .L981+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L554
	ldr	r3, .L981+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L554
	ldr	r3, .L981+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L554
	ldr	r3, .L981+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L554:
	ldr	r3, .L981+112
	ldr	r2, [r3]
	ldr	r3, .L981+100
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L555
	ldr	r3, .L981+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L981+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L555
	ldr	r3, .L981+84
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L557
	mov	r3, #0
	mov	r4, r3
.L557:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L555
	ldr	r3, .L981+112
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L558
.L555:
	ldr	r3, .L981+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L558
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #10
	bne	.L558
	ldr	r3, .L981+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L558
	ldr	r3, .L981+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L558
	ldr	r3, .L981+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L558
	ldr	r3, .L981+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L159
.L558:
	ldr	r3, .L981+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L559
	ldr	r3, .L981+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L559
	ldr	r3, .L981+100
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L559
	ldr	r3, .L981+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L981+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L560
.L559:
	ldr	r3, .L981+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L560
	ldr	r3, .L981+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L560
	ldr	r3, .L981+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L560
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L159
.L560:
	ldr	r3, .L981+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L561
	ldr	r3, .L981+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L562
.L561:
	ldr	r3, .L981+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L563
	ldr	r3, .L981+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L562
.L563:
	ldr	r3, .L981+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L564
	ldr	r3, .L981+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L562
.L564:
	ldr	r3, .L981+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L981+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L562:
	ldr	r3, .L981+104
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L565
	ldr	r3, .L981+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L565
	ldr	r3, .L981+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L565:
	ldr	r3, .L981+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L981+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L566
	ldr	r3, .L981+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L981+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L566
	ldr	r3, .L981+116
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L981+108
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L981+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L567
.L566:
	ldr	r3, .L981+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #9
	bne	.L159
.L567:
	ldr	r3, .L981+112
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L569
	ldr	r3, .L981+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L569
	ldr	r3, .L981+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L569
	ldr	r3, .L981+112
	ldr	r2, [r3]
	ldr	r3, .L981+100
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L569
	ldr	r3, .L981+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L570
.L569:
	ldr	r3, .L981+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L570
	ldr	r3, .L981+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L570
	ldr	r3, .L981+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L570
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L159
.L570:
	ldr	r3, .L981+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L571
	ldr	r3, .L981+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L571
	ldr	r3, .L981+108
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L571
	ldr	r3, .L981+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L571
	ldr	r3, .L981+100
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L574
.L571:
	ldr	r3, .L981+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L574
	ldr	r3, .L981+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L574
	ldr	r3, .L981+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L574
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L159
.L574:
	ldr	r3, .L981+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L575
	ldr	r3, .L981+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L576
.L575:
	ldr	r3, .L981+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L577
	ldr	r3, .L981+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L576
.L577:
	ldr	r3, .L981+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L576
	ldr	r3, .L981+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L576
	ldr	r3, .L981+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L576
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L159
.L576:
	ldr	r3, .L981+112
	ldr	r2, [r3]
	ldr	r3, .L981+100
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L578
	ldr	r3, .L981+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L578
	ldr	r3, .L981+108
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L580
	mov	r3, #0
	mov	r4, r3
.L580:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L578
	ldr	r3, .L981+112
	ldr	r3, [r3]
	cmp	r3, #9
	bne	.L581
.L578:
	ldr	r3, .L981+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L581
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #9
	bne	.L581
	ldr	r3, .L981+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L581
	ldr	r3, .L981+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L581
	ldr	r3, .L981+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L581
	ldr	r3, .L981+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L581:
	ldr	r3, .L981+112
	ldr	r2, [r3]
	ldr	r3, .L981+100
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L582
	ldr	r3, .L981+108
	ldr	r3, [r3]	@ float
	ldr	r2, .L981+104
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L582
	ldr	r3, .L981+108
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L584
	mov	r3, #0
	mov	r4, r3
.L584:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L582
	ldr	r3, .L981+112
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L585
.L582:
	ldr	r3, .L981+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L585
	ldr	r3, .L981+120
	ldr	r3, [r3]
	cmp	r3, #9
	bne	.L585
	ldr	r3, .L981+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L585
	ldr	r3, .L981+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L585
	ldr	r3, .L981+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L585
	ldr	r3, .L981+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L159
.L585:
	ldr	r3, .L984
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L586
	ldr	r3, .L984+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L586
	ldr	r3, .L984+8
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L586
	ldr	r3, .L984+12
	ldr	r3, [r3]	@ float
	ldr	r2, .L984+16
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L587
.L586:
	ldr	r3, .L984+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L587
	ldr	r3, .L984+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L587
	ldr	r3, .L984+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L587
	ldr	r3, .L984+128
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L159
.L587:
	ldr	r3, .L984+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L588
	ldr	r3, .L984+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L589
.L588:
	ldr	r3, .L984+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L590
	ldr	r3, .L984+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L589
.L590:
	ldr	r3, .L984+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L591
	ldr	r3, .L984+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L589
.L591:
	ldr	r3, .L984+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L984+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L589:
	ldr	r3, .L984+36
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L592
	ldr	r3, .L984+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L592
	ldr	r3, .L984+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L592:
	ldr	r3, .L984+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L984+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L593
	ldr	r3, .L984+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L984+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L593
	ldr	r3, .L984+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L984+48
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L984+36
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L594
.L593:
	ldr	r3, .L984+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L984+128
	ldr	r3, [r3]
	cmp	r3, #8
	bne	.L159
.L594:
	ldr	r3, .L984+156
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L596
	ldr	r3, .L984+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L596
	ldr	r3, .L984+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L596
	ldr	r3, .L984+156
	ldr	r2, [r3]
	ldr	r3, .L984+8
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L596
	ldr	r3, .L984+36
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L597
.L596:
	ldr	r3, .L984+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L597
	ldr	r3, .L984+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L597
	ldr	r3, .L984+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L597
	ldr	r3, .L984+128
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L159
.L597:
	ldr	r3, .L984+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L598
	ldr	r3, .L984+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L598
	ldr	r3, .L984+48
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L598
	ldr	r3, .L984+36
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L598
	ldr	r3, .L984+8
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L601
.L598:
	ldr	r3, .L984+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L601
	ldr	r3, .L984+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L601
	ldr	r3, .L984+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L601
	ldr	r3, .L984+128
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L159
.L601:
	ldr	r3, .L984+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L602
	ldr	r3, .L984+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L603
.L602:
	ldr	r3, .L984+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L604
	ldr	r3, .L984+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L603
.L604:
	ldr	r3, .L984+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L603
	ldr	r3, .L984+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L603
	ldr	r3, .L984+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L603
	ldr	r3, .L984+128
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L159
.L603:
	ldr	r3, .L984+156
	ldr	r2, [r3]
	ldr	r3, .L984+8
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L605
	ldr	r3, .L984+36
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L605
	ldr	r3, .L984+48
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L607
	mov	r3, #0
	mov	r4, r3
.L607:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L605
	ldr	r3, .L984+156
	ldr	r3, [r3]
	cmp	r3, #8
	bne	.L608
.L605:
	ldr	r3, .L984+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L608
	ldr	r3, .L984+128
	ldr	r3, [r3]
	cmp	r3, #8
	bne	.L608
	ldr	r3, .L984+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L608
	ldr	r3, .L984+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L608
	ldr	r3, .L984+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L608
	ldr	r3, .L984+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L608:
	ldr	r3, .L984+156
	ldr	r2, [r3]
	ldr	r3, .L984+8
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L609
	ldr	r3, .L984+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L984+36
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L609
	ldr	r3, .L984+48
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L611
	mov	r3, #0
	mov	r4, r3
.L611:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L609
	ldr	r3, .L984+156
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L612
.L609:
	ldr	r3, .L984+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L612
	ldr	r3, .L984+128
	ldr	r3, [r3]
	cmp	r3, #8
	bne	.L612
	ldr	r3, .L984+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L612
	ldr	r3, .L984+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L612
	ldr	r3, .L984+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L612
	ldr	r3, .L984+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L159
.L612:
	ldr	r3, .L984+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L613
	ldr	r3, .L984+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L613
	ldr	r3, .L984+8
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L613
	ldr	r3, .L984+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L984+36
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L614
.L613:
	ldr	r3, .L984+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L614
	ldr	r3, .L984+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L614
	ldr	r3, .L984+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L614
	ldr	r3, .L984+128
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L159
.L614:
	ldr	r3, .L984+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L615
	ldr	r3, .L984+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L616
.L615:
	ldr	r3, .L984+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L617
	ldr	r3, .L984+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L616
.L617:
	ldr	r3, .L984+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L618
	ldr	r3, .L984+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L616
.L618:
	ldr	r3, .L984+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L984+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L616:
	ldr	r3, .L984+60
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L619
	ldr	r3, .L984+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L619
	ldr	r3, .L984+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L619:
	ldr	r3, .L984+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L984+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L620
	ldr	r3, .L984+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L984+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L620
	ldr	r3, .L984+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L984+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L984+60
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L621
.L620:
	ldr	r3, .L984+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L984+128
	ldr	r3, [r3]
	cmp	r3, #7
	bne	.L159
.L621:
	ldr	r3, .L984+156
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L623
	ldr	r3, .L984+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L623
	ldr	r3, .L984+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L623
	ldr	r3, .L984+156
	ldr	r2, [r3]
	ldr	r3, .L984+8
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L623
	ldr	r3, .L984+60
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L624
.L623:
	ldr	r3, .L984+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L624
	ldr	r3, .L984+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L624
	ldr	r3, .L984+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L624
	ldr	r3, .L984+128
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L159
.L624:
	ldr	r3, .L984+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L625
	ldr	r3, .L984+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L625
	ldr	r3, .L984+72
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L625
	ldr	r3, .L984+60
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L625
	ldr	r3, .L984+8
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L628
.L625:
	ldr	r3, .L984+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L628
	ldr	r3, .L984+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L628
	ldr	r3, .L984+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L628
	ldr	r3, .L984+128
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L159
.L628:
	ldr	r3, .L984+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L629
	ldr	r3, .L984+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L630
.L629:
	ldr	r3, .L984+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L631
	ldr	r3, .L984+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L630
.L631:
	ldr	r3, .L984+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L630
	ldr	r3, .L984+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L630
	ldr	r3, .L984+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L630
	ldr	r3, .L984+128
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L159
.L630:
	ldr	r3, .L984+156
	ldr	r2, [r3]
	ldr	r3, .L984+8
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L632
	ldr	r3, .L984+60
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L632
	ldr	r3, .L984+72
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L634
	mov	r3, #0
	mov	r4, r3
.L634:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L632
	ldr	r3, .L984+156
	ldr	r3, [r3]
	cmp	r3, #7
	bne	.L635
.L632:
	ldr	r3, .L984+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L635
	ldr	r3, .L984+128
	ldr	r3, [r3]
	cmp	r3, #7
	bne	.L635
	ldr	r3, .L984+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L635
	ldr	r3, .L984+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L635
	ldr	r3, .L984+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L635
	ldr	r3, .L984+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L635:
	ldr	r3, .L984+156
	ldr	r2, [r3]
	ldr	r3, .L984+8
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L636
	ldr	r3, .L984+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L984+60
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L636
	ldr	r3, .L984+72
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L638
	mov	r3, #0
	mov	r4, r3
.L638:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L636
	ldr	r3, .L984+156
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L639
.L636:
	ldr	r3, .L984+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L639
	ldr	r3, .L984+128
	ldr	r3, [r3]
	cmp	r3, #7
	bne	.L639
	ldr	r3, .L984+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L639
	ldr	r3, .L984+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L639
	ldr	r3, .L984+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L639
	ldr	r3, .L984+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L159
.L639:
	ldr	r3, .L984+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L640
	ldr	r3, .L984+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L640
	ldr	r3, .L984+8
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L640
	ldr	r3, .L984+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L984+60
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L641
.L640:
	ldr	r3, .L984+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L641
	ldr	r3, .L984+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L641
	ldr	r3, .L984+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L641
	ldr	r3, .L984+128
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L159
.L641:
	ldr	r3, .L984+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L642
	ldr	r3, .L984+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L643
.L642:
	ldr	r3, .L984+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L644
	ldr	r3, .L984+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L643
.L644:
	ldr	r3, .L984+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L645
	ldr	r3, .L984+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L643
.L645:
	ldr	r3, .L984+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L984+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L643:
	ldr	r3, .L984+88
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L646
	ldr	r3, .L984+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L646
	ldr	r3, .L984+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L646:
	ldr	r3, .L984+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L984+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L647
	ldr	r3, .L984+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L984+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L647
	ldr	r3, .L984+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L984+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L984+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L648
.L647:
	ldr	r3, .L984+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L159
	b	.L985
.L986:
	.align	2
.L984:
	.word	_x_p8_l0
	.word	_x_p8_l1
	.word	_x_id
	.word	p8_x
	.word	_x_p8_x
	.word	p8_l0
	.word	p8_l1
	.word	_x_p7_l0
	.word	_x_p7_l1
	.word	_x_p7_x
	.word	p7_l0
	.word	p7_l1
	.word	p7_x
	.word	_x_p6_l0
	.word	_x_p6_l1
	.word	_x_p6_x
	.word	p6_l0
	.word	p6_l1
	.word	p6_x
	.word	_x_p5_l0
	.word	_x_p5_l1
	.word	p5_x
	.word	_x_p5_x
	.word	p5_l0
	.word	p5_l1
	.word	delta
	.word	_x_p4_l0
	.word	_x_p4_l1
	.word	p4_x
	.word	_x_p4_x
	.word	p4_l0
	.word	p4_l1
	.word	turn
	.word	_x_p3_l0
	.word	_x_p3_l1
	.word	p3_l0
	.word	p3_l1
	.word	delta
	.word	turn
	.word	id
	.word	_x_id
	.word	_x_p3_x
	.word	p3_x
.L985:
	ldr	r3, .L984+128
	ldr	r3, [r3]
	cmp	r3, #6
	bne	.L159
.L648:
	ldr	r3, .L984+156
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L650
	ldr	r3, .L984+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L650
	ldr	r3, .L984+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L650
	ldr	r3, .L984+156
	ldr	r2, [r3]
	ldr	r3, .L984+160
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L650
	ldr	r3, .L984+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L651
.L650:
	ldr	r3, .L984+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L651
	ldr	r3, .L984+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L651
	ldr	r3, .L984+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L651
	ldr	r3, .L984+128
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L159
.L651:
	ldr	r3, .L984+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L652
	ldr	r3, .L984+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L652
	ldr	r3, .L984+84
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L652
	ldr	r3, .L984+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L652
	ldr	r3, .L984+160
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L655
.L652:
	ldr	r3, .L984+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L655
	ldr	r3, .L984+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L655
	ldr	r3, .L984+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L655
	ldr	r3, .L984+128
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L159
.L655:
	ldr	r3, .L984+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L656
	ldr	r3, .L984+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L657
.L656:
	ldr	r3, .L984+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L658
	ldr	r3, .L984+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L657
.L658:
	ldr	r3, .L984+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L657
	ldr	r3, .L984+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L657
	ldr	r3, .L984+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L657
	ldr	r3, .L984+128
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L159
.L657:
	ldr	r3, .L984+156
	ldr	r2, [r3]
	ldr	r3, .L984+160
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L659
	ldr	r3, .L984+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L659
	ldr	r3, .L984+84
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L661
	mov	r3, #0
	mov	r4, r3
.L661:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L659
	ldr	r3, .L984+156
	ldr	r3, [r3]
	cmp	r3, #6
	bne	.L662
.L659:
	ldr	r3, .L984+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L662
	ldr	r3, .L984+128
	ldr	r3, [r3]
	cmp	r3, #6
	bne	.L662
	ldr	r3, .L984+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L662
	ldr	r3, .L984+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L662
	ldr	r3, .L984+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L662
	ldr	r3, .L984+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L662:
	ldr	r3, .L984+156
	ldr	r2, [r3]
	ldr	r3, .L984+160
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L663
	ldr	r3, .L984+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L984+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L663
	ldr	r3, .L984+84
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L665
	mov	r3, #0
	mov	r4, r3
.L665:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L663
	ldr	r3, .L984+156
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L666
.L663:
	ldr	r3, .L984+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L666
	ldr	r3, .L984+128
	ldr	r3, [r3]
	cmp	r3, #6
	bne	.L666
	ldr	r3, .L984+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L666
	ldr	r3, .L984+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L666
	ldr	r3, .L984+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L666
	ldr	r3, .L984+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L159
.L666:
	ldr	r3, .L984+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L667
	ldr	r3, .L984+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L667
	ldr	r3, .L984+160
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L667
	ldr	r3, .L984+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L984+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L668
.L667:
	ldr	r3, .L984+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L668
	ldr	r3, .L984+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L668
	ldr	r3, .L984+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L668
	ldr	r3, .L984+128
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L159
.L668:
	ldr	r3, .L984+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L669
	ldr	r3, .L984+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L670
.L669:
	ldr	r3, .L984+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L671
	ldr	r3, .L984+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L670
.L671:
	ldr	r3, .L984+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L672
	ldr	r3, .L984+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L670
.L672:
	ldr	r3, .L984+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L984+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L670:
	ldr	r3, .L984+116
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L673
	ldr	r3, .L984+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L673
	ldr	r3, .L984+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L673:
	ldr	r3, .L984+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L984+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L674
	ldr	r3, .L984+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L984+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L674
	ldr	r3, .L984+148
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L984+112
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L984+116
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L675
.L674:
	ldr	r3, .L984+148
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L984+128
	ldr	r3, [r3]
	cmp	r3, #5
	bne	.L159
.L675:
	ldr	r3, .L984+156
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L677
	ldr	r3, .L984+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L677
	ldr	r3, .L984+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L677
	ldr	r3, .L984+156
	ldr	r2, [r3]
	ldr	r3, .L984+160
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L677
	ldr	r3, .L984+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L678
.L677:
	ldr	r3, .L984+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L678
	ldr	r3, .L984+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L678
	ldr	r3, .L984+148
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L678
	ldr	r3, .L984+128
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L159
.L678:
	ldr	r3, .L984+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L679
	ldr	r3, .L984+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L679
	ldr	r3, .L984+112
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L679
	ldr	r3, .L984+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L679
	ldr	r3, .L984+160
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L682
.L679:
	ldr	r3, .L984+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L682
	ldr	r3, .L984+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L682
	ldr	r3, .L984+148
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L682
	ldr	r3, .L984+128
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L159
.L682:
	ldr	r3, .L984+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L683
	ldr	r3, .L984+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L684
.L683:
	ldr	r3, .L984+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L685
	ldr	r3, .L984+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L684
.L685:
	ldr	r3, .L984+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L684
	ldr	r3, .L984+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L684
	ldr	r3, .L984+148
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L684
	ldr	r3, .L984+128
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L159
.L684:
	ldr	r3, .L984+156
	ldr	r2, [r3]
	ldr	r3, .L984+160
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L686
	ldr	r3, .L984+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L686
	ldr	r3, .L984+112
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L688
	mov	r3, #0
	mov	r4, r3
.L688:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L686
	ldr	r3, .L984+156
	ldr	r3, [r3]
	cmp	r3, #5
	bne	.L689
.L686:
	ldr	r3, .L984+148
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L689
	ldr	r3, .L984+128
	ldr	r3, [r3]
	cmp	r3, #5
	bne	.L689
	ldr	r3, .L984+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L689
	ldr	r3, .L984+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L689
	ldr	r3, .L984+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L689
	ldr	r3, .L984+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L689:
	ldr	r3, .L984+156
	ldr	r2, [r3]
	ldr	r3, .L984+160
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L690
	ldr	r3, .L984+112
	ldr	r3, [r3]	@ float
	ldr	r2, .L984+116
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L690
	ldr	r3, .L984+112
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L692
	mov	r3, #0
	mov	r4, r3
.L692:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L690
	ldr	r3, .L984+156
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L693
.L690:
	ldr	r3, .L984+148
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L693
	ldr	r3, .L984+128
	ldr	r3, [r3]
	cmp	r3, #5
	bne	.L693
	ldr	r3, .L984+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L693
	ldr	r3, .L984+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L693
	ldr	r3, .L984+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L693
	ldr	r3, .L984+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L159
.L693:
	ldr	r3, .L984+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L694
	ldr	r3, .L984+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L694
	ldr	r3, .L984+160
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L694
	ldr	r3, .L984+112
	ldr	r3, [r3]	@ float
	ldr	r2, .L984+116
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L695
.L694:
	ldr	r3, .L984+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L695
	ldr	r3, .L984+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L695
	ldr	r3, .L984+148
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L695
	ldr	r3, .L984+128
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L159
.L695:
	ldr	r3, .L984+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L696
	ldr	r3, .L984+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L697
.L696:
	ldr	r3, .L984+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L698
	ldr	r3, .L984+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L697
.L698:
	ldr	r3, .L984+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L699
	ldr	r3, .L984+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L697
.L699:
	ldr	r3, .L984+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L984+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L697:
	ldr	r3, .L984+164
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L700
	ldr	r3, .L984+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L700
	ldr	r3, .L984+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L700:
	ldr	r3, .L984+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L984+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L701
	ldr	r3, .L984+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L984+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L701
	ldr	r3, .L984+148
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L984+168
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L984+164
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L702
.L701:
	ldr	r3, .L984+148
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L984+152
	ldr	r3, [r3]
	cmp	r3, #4
	bne	.L159
.L702:
	ldr	r3, .L984+156
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L704
	ldr	r3, .L984+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L704
	ldr	r3, .L984+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L704
	ldr	r3, .L984+156
	ldr	r2, [r3]
	ldr	r3, .L984+160
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L704
	ldr	r3, .L984+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L705
.L704:
	ldr	r3, .L984+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L705
	ldr	r3, .L984+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L705
	ldr	r3, .L984+148
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L705
	ldr	r3, .L984+152
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L159
.L705:
	ldr	r3, .L984+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L706
	ldr	r3, .L984+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L706
	ldr	r3, .L984+168
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L706
	ldr	r3, .L984+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L706
	ldr	r3, .L984+160
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L709
.L706:
	ldr	r3, .L984+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L709
	ldr	r3, .L984+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L709
	ldr	r3, .L984+148
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L709
	ldr	r3, .L984+152
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L159
.L709:
	ldr	r3, .L984+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L710
	ldr	r3, .L984+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L711
.L710:
	ldr	r3, .L984+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L712
	ldr	r3, .L984+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L711
.L712:
	ldr	r3, .L984+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L711
	ldr	r3, .L984+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L711
	ldr	r3, .L984+148
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L711
	ldr	r3, .L984+152
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L159
.L711:
	ldr	r3, .L984+156
	ldr	r2, [r3]
	ldr	r3, .L984+160
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L713
	ldr	r3, .L984+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L713
	ldr	r3, .L984+168
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L715
	mov	r3, #0
	mov	r4, r3
.L715:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L713
	ldr	r3, .L987
	ldr	r3, [r3]
	cmp	r3, #4
	bne	.L716
.L713:
	ldr	r3, .L987+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L716
	ldr	r3, .L987+8
	ldr	r3, [r3]
	cmp	r3, #4
	bne	.L716
	ldr	r3, .L987+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L716
	ldr	r3, .L987+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L716
	ldr	r3, .L987+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L716
	ldr	r3, .L987+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L716:
	ldr	r3, .L987
	ldr	r2, [r3]
	ldr	r3, .L987+36
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L717
	ldr	r3, .L987+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L717
	ldr	r3, .L987+28
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L719
	mov	r3, #0
	mov	r4, r3
.L719:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L717
	ldr	r3, .L987
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L720
.L717:
	ldr	r3, .L987+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L720
	ldr	r3, .L987+8
	ldr	r3, [r3]
	cmp	r3, #4
	bne	.L720
	ldr	r3, .L987+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L720
	ldr	r3, .L987+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L720
	ldr	r3, .L987+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L720
	ldr	r3, .L987+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L159
.L720:
	ldr	r3, .L987+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L721
	ldr	r3, .L987+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L721
	ldr	r3, .L987+36
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L721
	ldr	r3, .L987+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L722
.L721:
	ldr	r3, .L987+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L722
	ldr	r3, .L987+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L722
	ldr	r3, .L987+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L722
	ldr	r3, .L987+8
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L159
.L722:
	ldr	r3, .L987+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L723
	ldr	r3, .L987+528
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L724
.L723:
	ldr	r3, .L987+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L725
	ldr	r3, .L987+528
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L724
.L725:
	ldr	r3, .L987+528
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L726
	ldr	r3, .L987+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L724
.L726:
	ldr	r3, .L987+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L987+528
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L724:
	ldr	r3, .L987+472
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L727
	ldr	r3, .L987+528
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L727
	ldr	r3, .L987+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L727:
	ldr	r3, .L987+492
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L987+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L728
	ldr	r3, .L987+532
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L987+528
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L728
	ldr	r3, .L987+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L987+476
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L987+472
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L729
.L728:
	ldr	r3, .L987+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L987+8
	ldr	r3, [r3]
	cmp	r3, #3
	bne	.L159
.L729:
	ldr	r3, .L987
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L731
	ldr	r3, .L987+528
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L731
	ldr	r3, .L987+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L731
	ldr	r3, .L987
	ldr	r2, [r3]
	ldr	r3, .L987+36
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L731
	ldr	r3, .L987+472
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L732
.L731:
	ldr	r3, .L987+492
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L732
	ldr	r3, .L987+532
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L732
	ldr	r3, .L987+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L732
	ldr	r3, .L987+8
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L159
.L732:
	ldr	r3, .L987+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L733
	ldr	r3, .L987+528
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L733
	ldr	r3, .L987+476
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L733
	ldr	r3, .L987+472
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L733
	ldr	r3, .L987+36
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L736
.L733:
	ldr	r3, .L987+532
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L736
	ldr	r3, .L987+492
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L736
	ldr	r3, .L987+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L736
	ldr	r3, .L987+8
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L159
.L736:
	ldr	r3, .L987+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L737
	ldr	r3, .L987+528
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L738
.L737:
	ldr	r3, .L987+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L739
	ldr	r3, .L987+528
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L738
.L739:
	ldr	r3, .L987+492
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L738
	ldr	r3, .L987+532
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L738
	ldr	r3, .L987+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L738
	ldr	r3, .L987+8
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L159
.L738:
	ldr	r3, .L987
	ldr	r2, [r3]
	ldr	r3, .L987+36
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L740
	ldr	r3, .L987+472
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L740
	ldr	r3, .L987+476
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L742
	mov	r3, #0
	mov	r4, r3
.L742:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L740
	ldr	r3, .L987
	ldr	r3, [r3]
	cmp	r3, #3
	bne	.L743
.L740:
	ldr	r3, .L987+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L743
	ldr	r3, .L987+8
	ldr	r3, [r3]
	cmp	r3, #3
	bne	.L743
	ldr	r3, .L987+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L743
	ldr	r3, .L987+528
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L743
	ldr	r3, .L987+492
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L743
	ldr	r3, .L987+532
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L743:
	ldr	r3, .L987
	ldr	r2, [r3]
	ldr	r3, .L987+36
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L744
	ldr	r3, .L987+476
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+472
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L744
	ldr	r3, .L987+476
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L746
	mov	r3, #0
	mov	r4, r3
.L746:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L744
	ldr	r3, .L987
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L747
.L744:
	ldr	r3, .L987+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L747
	ldr	r3, .L987+8
	ldr	r3, [r3]
	cmp	r3, #3
	bne	.L747
	ldr	r3, .L987+492
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L747
	ldr	r3, .L987+532
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L747
	ldr	r3, .L987+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L747
	ldr	r3, .L987+528
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L159
.L747:
	ldr	r3, .L987+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L748
	ldr	r3, .L987+528
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L748
	ldr	r3, .L987+36
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L748
	ldr	r3, .L987+476
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+472
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L749
.L748:
	ldr	r3, .L987+492
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L749
	ldr	r3, .L987+532
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L749
	ldr	r3, .L987+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L749
	ldr	r3, .L987+8
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L159
.L749:
	ldr	r3, .L987+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L750
	ldr	r3, .L987+464
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L751
.L750:
	ldr	r3, .L987+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L752
	ldr	r3, .L987+464
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L751
.L752:
	ldr	r3, .L987+464
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L753
	ldr	r3, .L987+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L751
.L753:
	ldr	r3, .L987+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L987+464
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L751:
	ldr	r3, .L987+352
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L754
	ldr	r3, .L987+464
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L754
	ldr	r3, .L987+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L754:
	ldr	r3, .L987+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L987+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L755
	ldr	r3, .L987+468
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L987+464
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L755
	ldr	r3, .L987+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L987+356
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L987+352
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L756
.L755:
	ldr	r3, .L987+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L987+8
	ldr	r3, [r3]
	cmp	r3, #2
	bne	.L159
.L756:
	ldr	r3, .L987
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L758
	ldr	r3, .L987+464
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L758
	ldr	r3, .L987+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L758
	ldr	r3, .L987
	ldr	r2, [r3]
	ldr	r3, .L987+36
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L758
	ldr	r3, .L987+352
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L759
.L758:
	ldr	r3, .L987+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L759
	ldr	r3, .L987+468
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L759
	ldr	r3, .L987+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L759
	ldr	r3, .L987+8
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L159
.L759:
	ldr	r3, .L987+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L760
	ldr	r3, .L987+464
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L760
	ldr	r3, .L987+356
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L760
	ldr	r3, .L987+352
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L760
	ldr	r3, .L987+36
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L763
.L760:
	ldr	r3, .L987+468
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L763
	ldr	r3, .L987+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L763
	ldr	r3, .L987+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L763
	ldr	r3, .L987+8
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L159
.L763:
	ldr	r3, .L987+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L764
	ldr	r3, .L987+464
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L765
.L764:
	ldr	r3, .L987+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L766
	ldr	r3, .L987+464
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L765
.L766:
	ldr	r3, .L987+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L765
	ldr	r3, .L987+468
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L765
	ldr	r3, .L987+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L765
	ldr	r3, .L987+8
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L159
.L765:
	ldr	r3, .L987
	ldr	r2, [r3]
	ldr	r3, .L987+36
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L767
	ldr	r3, .L987+352
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L767
	ldr	r3, .L987+356
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L769
	mov	r3, #0
	mov	r4, r3
.L769:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L767
	ldr	r3, .L987
	ldr	r3, [r3]
	cmp	r3, #2
	bne	.L770
.L767:
	ldr	r3, .L987+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L770
	ldr	r3, .L987+8
	ldr	r3, [r3]
	cmp	r3, #2
	bne	.L770
	ldr	r3, .L987+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L770
	ldr	r3, .L987+464
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L770
	ldr	r3, .L987+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L770
	ldr	r3, .L987+468
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L770:
	ldr	r3, .L987
	ldr	r2, [r3]
	ldr	r3, .L987+36
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L771
	ldr	r3, .L987+356
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+352
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L771
	ldr	r3, .L987+356
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L773
	mov	r3, #0
	mov	r4, r3
.L773:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L771
	ldr	r3, .L987
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L774
.L771:
	ldr	r3, .L987+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L774
	ldr	r3, .L987+8
	ldr	r3, [r3]
	cmp	r3, #2
	bne	.L774
	ldr	r3, .L987+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L774
	ldr	r3, .L987+468
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L774
	ldr	r3, .L987+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L774
	ldr	r3, .L987+464
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L159
.L774:
	ldr	r3, .L987+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L775
	ldr	r3, .L987+464
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L775
	ldr	r3, .L987+36
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L775
	ldr	r3, .L987+356
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+352
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L776
.L775:
	ldr	r3, .L987+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L776
	ldr	r3, .L987+468
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L776
	ldr	r3, .L987+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L776
	ldr	r3, .L987+8
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L159
.L776:
	ldr	r3, .L987+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L777
	ldr	r3, .L987+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L778
.L777:
	ldr	r3, .L987+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L779
	ldr	r3, .L987+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L778
.L779:
	ldr	r3, .L987+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L780
	ldr	r3, .L987+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L778
.L780:
	ldr	r3, .L987+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
	b	.L988
.L989:
	.align	2
.L987:
	.word	id
	.word	delta
	.word	turn
	.word	_x_p3_l0
	.word	_x_p3_l1
	.word	p3_l0
	.word	p3_l1
	.word	p3_x
	.word	_x_p3_x
	.word	_x_id
	.word	_x_p23_l1
	.word	p23_l1
	.word	_x_p23_l0
	.word	p23_l0
	.word	_x_p22_l1
	.word	p22_l1
	.word	_x_p22_l0
	.word	p22_l0
	.word	_x_p21_l1
	.word	p21_l1
	.word	_x_p21_l0
	.word	p21_l0
	.word	_x_p20_l1
	.word	p20_l1
	.word	_x_p20_l0
	.word	p20_l0
	.word	_x_p19_l1
	.word	p19_l1
	.word	_x_p19_l0
	.word	p19_l0
	.word	_x_p19_x
	.word	p19_x
	.word	_x_p8_l0
	.word	p8_l0
	.word	_x_p14_l1
	.word	p14_l1
	.word	_x_p7_l0
	.word	p7_l0
	.word	_x_p13_l1
	.word	p13_l1
	.word	_x_p6_l1
	.word	p6_l1
	.word	_x_p5_l0
	.word	p5_l0
	.word	_x_p11_l1
	.word	p11_l1
	.word	_x_p5_x
	.word	p5_x
	.word	_x_p16_l0
	.word	p16_l0
	.word	_x_p8_x
	.word	p8_x
	.word	_x_p22_x
	.word	p22_x
	.word	_x_p4_l1
	.word	p4_l1
	.word	_x_p1_l0
	.word	p1_l0
	.word	_x_p4_l0
	.word	p4_l0
	.word	_x_p10_l1
	.word	p10_l1
	.word	_x_p4_x
	.word	p4_x
	.word	_x_p15_l0
	.word	p15_l0
	.word	_x_p7_x
	.word	p7_x
	.word	_x__diverge_delta
	.word	_diverge_delta
	.word	_x_p0_l1
	.word	p0_l1
	.word	_x_p18_l0
	.word	p18_l0
	.word	_x_p21_x
	.word	p21_x
	.word	_x_p3_l1
	.word	p3_l1
	.word	_x_p3_l0
	.word	p3_l0
	.word	_x_p9_l1
	.word	p9_l1
	.word	_x_p23_x
	.word	p23_x
	.word	_x_p5_l1
	.word	p5_l1
	.word	_x_p18_l1
	.word	p18_l1
	.word	_x_p1_x
	.word	p1_x
	.word	_x_p9_l0
	.word	p9_l0
	.word	_x_p15_l1
	.word	p15_l1
	.word	_x_p3_x
	.word	p3_x
	.word	_x_p14_l0
	.word	p14_l0
	.word	_x_id
	.word	id
	.word	_x_turn
	.word	turn
	.word	_x_p6_l0
	.word	p6_l0
	.word	_x_p12_l1
	.word	p12_l1
	.word	_x_p0_x
	.word	p0_x
	.word	_x_p7_l1
	.word	p7_l1
	.word	_x_p0_l0
	.word	p0_l0
	.word	_x_p13_x
	.word	p13_x
	.word	_x_delta
	.word	delta
	.word	_x_p1_l1
	.word	p1_l1
	.word	_x_p2_x
	.word	p2_x
	.word	_x_p13_l0
	.word	p13_l0
	.word	_x_p2_l0
	.word	p2_l0
	.word	_x_p8_l1
	.word	p8_l1
	.word	_x_p6_x
	.word	p6_x
	.word	_x_p17_l0
	.word	p17_l0
	.word	_x_p20_x
	.word	p20_x
	.word	_x_p2_l1
	.word	p2_l1
	.word	_x_p9_x
	.word	p9_x
	.word	_x_p10_x
	.word	p10_x
	.word	_x_p10_l0
	.word	p10_l0
	.word	_x_p16_l1
	.word	p16_l1
	.word	_x_p11_x
	.word	p11_x
	.word	_x_p11_l0
	.word	p11_l0
	.word	_x_p17_l1
	.word	p17_l1
	.word	_x_p12_x
	.word	p12_x
	.word	_x_p12_l0
	.word	p12_l0
	.word	_x_p14_x
	.word	p14_x
	.word	_x_p15_x
	.word	p15_x
	.word	_x_p16_x
	.word	p16_x
	.word	_x_p17_x
	.word	p17_x
	.word	_x_p18_x
	.word	p18_x
.L988:
	ldr	r3, .L987+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L778:
	ldr	r3, .L987+424
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L781
	ldr	r3, .L987+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L781
	ldr	r3, .L987+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L781:
	ldr	r3, .L987+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L987+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L782
	ldr	r3, .L987+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L987+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L782
	ldr	r3, .L987+460
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L987+428
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L987+424
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L783
.L782:
	ldr	r3, .L987+460
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L987+404
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L159
.L783:
	ldr	r3, .L987+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L785
	ldr	r3, .L987+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L785
	ldr	r3, .L987+396
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L785
	ldr	r3, .L987+424
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L785
	ldr	r3, .L987+396
	ldr	r2, [r3]
	ldr	r3, .L987+36
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L787
.L785:
	ldr	r3, .L987+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L787
	ldr	r3, .L987+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L787
	ldr	r3, .L987+404
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L787
	ldr	r3, .L987+460
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L159
.L787:
	ldr	r3, .L987+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L789
	ldr	r3, .L987+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L789
	ldr	r3, .L987+428
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L789
	ldr	r3, .L987+424
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L789
	ldr	r3, .L987+36
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L792
.L789:
	ldr	r3, .L987+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L792
	ldr	r3, .L987+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L792
	ldr	r3, .L987+404
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L792
	ldr	r3, .L987+460
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L159
.L792:
	ldr	r3, .L987+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L794
	ldr	r3, .L987+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L795
.L794:
	ldr	r3, .L987+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L796
	ldr	r3, .L987+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L795
.L796:
	ldr	r3, .L987+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L795
	ldr	r3, .L987+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L795
	ldr	r3, .L987+404
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L795
	ldr	r3, .L987+460
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L159
.L795:
	ldr	r3, .L987+424
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L798
	ldr	r3, .L987+396
	ldr	r2, [r3]
	ldr	r3, .L987+36
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L798
	ldr	r3, .L987+428
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L800
	mov	r3, #0
	mov	r4, r3
.L800:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L798
	ldr	r3, .L987+396
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L801
.L798:
	ldr	r3, .L987+404
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L801
	ldr	r3, .L987+460
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L801
	ldr	r3, .L987+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L801
	ldr	r3, .L987+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L801
	ldr	r3, .L987+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L801
	ldr	r3, .L987+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
.L801:
	ldr	r3, .L987+396
	ldr	r2, [r3]
	ldr	r3, .L987+36
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L802
	ldr	r3, .L987+428
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+424
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L802
	ldr	r3, .L987+428
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L804
	mov	r3, #0
	mov	r4, r3
.L804:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L802
	ldr	r3, .L987+396
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L805
.L802:
	ldr	r3, .L987+404
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L805
	ldr	r3, .L987+460
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L805
	ldr	r3, .L987+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L805
	ldr	r3, .L987+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L805
	ldr	r3, .L987+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L805
	ldr	r3, .L987+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L159
.L805:
	ldr	r3, .L987+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L806
	ldr	r3, .L987+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L806
	ldr	r3, .L987+428
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+424
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L806
	ldr	r3, .L987+36
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L808
.L806:
	ldr	r3, .L987+444
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L808
	ldr	r3, .L987+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L808
	ldr	r3, .L987+404
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L808
	ldr	r3, .L987+460
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L159
.L808:
	ldr	r3, .L987+396
	ldr	r3, [r3]
	cmp	r3, #24
	beq	.L810
	ldr	r3, .L987+396
	ldr	r3, [r3]
	cmp	r3, #23
	beq	.L810
	ldr	r3, .L987+396
	ldr	r3, [r3]
	cmp	r3, #22
	beq	.L810
	ldr	r3, .L987+396
	ldr	r3, [r3]
	cmp	r3, #21
	beq	.L810
	ldr	r3, .L987+396
	ldr	r3, [r3]
	cmp	r3, #20
	beq	.L810
	ldr	r3, .L987+396
	ldr	r3, [r3]
	cmp	r3, #19
	beq	.L810
	ldr	r3, .L987+396
	ldr	r3, [r3]
	cmp	r3, #18
	beq	.L810
	ldr	r3, .L987+396
	ldr	r3, [r3]
	cmp	r3, #17
	beq	.L810
	ldr	r3, .L987+396
	ldr	r3, [r3]
	cmp	r3, #16
	beq	.L810
	ldr	r3, .L987+396
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L810
	ldr	r3, .L987+396
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L810
	ldr	r3, .L987+396
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L810
	ldr	r3, .L987+396
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L810
	ldr	r3, .L987+396
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L810
	ldr	r3, .L987+396
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L810
	ldr	r3, .L987+396
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L810
	ldr	r3, .L987+396
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L810
	ldr	r3, .L987+396
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L810
	ldr	r3, .L987+396
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L810
	ldr	r3, .L987+396
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L810
	ldr	r3, .L987+396
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L810
	ldr	r3, .L987+396
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L810
	ldr	r3, .L987+396
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L810
	ldr	r3, .L987+396
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L810
	ldr	r3, .L987+396
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L159
.L810:
	ldr	r3, .L987+400
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L811
	ldr	r3, .L987+400
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L811
	ldr	r3, .L987+400
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L811
	ldr	r3, .L987+400
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L811
	ldr	r3, .L987+400
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L811
	ldr	r3, .L987+400
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L811
	ldr	r3, .L987+400
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L811
	ldr	r3, .L987+400
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L811
	ldr	r3, .L987+400
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L811
	ldr	r3, .L987+400
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L811
	ldr	r3, .L987+400
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L811
	ldr	r3, .L987+400
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L811
	ldr	r3, .L987+400
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L811
	ldr	r3, .L987+400
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L811
	ldr	r3, .L987+400
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L811
	ldr	r3, .L987+400
	ldr	r3, [r3]
	cmp	r3, #16
	beq	.L811
	ldr	r3, .L987+400
	ldr	r3, [r3]
	cmp	r3, #17
	beq	.L811
	ldr	r3, .L987+400
	ldr	r3, [r3]
	cmp	r3, #18
	beq	.L811
	ldr	r3, .L987+400
	ldr	r3, [r3]
	cmp	r3, #19
	beq	.L811
	ldr	r3, .L987+400
	ldr	r3, [r3]
	cmp	r3, #20
	beq	.L811
	ldr	r3, .L987+400
	ldr	r3, [r3]
	cmp	r3, #21
	beq	.L811
	ldr	r3, .L987+400
	ldr	r3, [r3]
	cmp	r3, #22
	beq	.L811
	ldr	r3, .L987+400
	ldr	r3, [r3]
	cmp	r3, #23
	beq	.L811
	ldr	r3, .L987+400
	ldr	r3, [r3]
	cmp	r3, #24
	bne	.L159
.L811:
	ldr	r3, .L987+456
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L987+460
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L813
	ldr	r3, .L987+396
	ldr	r2, [r3]
	ldr	r3, .L987+36
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L159
	ldr	r3, .L987+404
	ldr	r2, [r3]
	ldr	r3, .L987+400
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L159
.L813:
	ldr	r3, .L987+460
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+272
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L814
	ldr	r3, .L987+276
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L815
	mov	r3, #0
	mov	r4, r3
.L815:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L159
.L814:
	ldr	r3, .L987+276
	ldr	r3, [r3]	@ float
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L816
	ldr	r3, .L987+460
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L987+276
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L987+272
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L159
.L816:
	mov	r3, #1
	b	.L818
.L159:
	mov	r3, #0
.L818:
	str	r3, [fp, #-24]
	ldr	r3, .L987+40
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+44
	strb	r2, [r3]
	ldr	r3, .L987+48
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+52
	strb	r2, [r3]
	ldr	r3, .L987+56
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+60
	strb	r2, [r3]
	ldr	r3, .L987+64
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+68
	strb	r2, [r3]
	ldr	r3, .L987+72
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+76
	strb	r2, [r3]
	ldr	r3, .L987+80
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+84
	strb	r2, [r3]
	ldr	r3, .L987+88
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+92
	strb	r2, [r3]
	ldr	r3, .L987+96
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+100
	strb	r2, [r3]
	ldr	r3, .L987+104
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+108
	strb	r2, [r3]
	ldr	r3, .L987+112
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+116
	strb	r2, [r3]
	ldr	r3, .L987+120
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+124
	str	r3, [r2]	@ float
	ldr	r3, .L987+128
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+132
	strb	r2, [r3]
	ldr	r3, .L987+136
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+140
	strb	r2, [r3]
	ldr	r3, .L987+144
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+148
	strb	r2, [r3]
	ldr	r3, .L987+152
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+156
	strb	r2, [r3]
	ldr	r3, .L987+160
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+164
	strb	r2, [r3]
	ldr	r3, .L987+168
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+172
	strb	r2, [r3]
	ldr	r3, .L987+176
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+180
	strb	r2, [r3]
	ldr	r3, .L987+184
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+188
	str	r3, [r2]	@ float
	ldr	r3, .L987+192
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+196
	strb	r2, [r3]
	ldr	r3, .L987+200
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+204
	str	r3, [r2]	@ float
	ldr	r3, .L987+208
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+212
	str	r3, [r2]	@ float
	ldr	r3, .L987+216
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+220
	strb	r2, [r3]
	ldr	r3, .L987+224
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+228
	strb	r2, [r3]
	ldr	r3, .L987+232
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+236
	strb	r2, [r3]
	ldr	r3, .L987+240
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+244
	strb	r2, [r3]
	ldr	r3, .L987+248
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+252
	str	r3, [r2]	@ float
	ldr	r3, .L987+256
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+260
	strb	r2, [r3]
	ldr	r3, .L987+264
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+268
	str	r3, [r2]	@ float
	ldr	r3, .L987+272
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+276
	str	r3, [r2]	@ float
	ldr	r3, .L987+280
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+284
	strb	r2, [r3]
	ldr	r3, .L987+288
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+292
	strb	r2, [r3]
	ldr	r3, .L987+296
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+300
	str	r3, [r2]	@ float
	ldr	r3, .L987+304
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+308
	strb	r2, [r3]
	ldr	r3, .L987+312
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+316
	strb	r2, [r3]
	ldr	r3, .L987+320
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+324
	strb	r2, [r3]
	ldr	r3, .L987+328
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+332
	str	r3, [r2]	@ float
	ldr	r3, .L987+336
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+340
	strb	r2, [r3]
	ldr	r3, .L987+344
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+348
	strb	r2, [r3]
	ldr	r3, .L987+352
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+356
	str	r3, [r2]	@ float
	ldr	r3, .L987+360
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+364
	strb	r2, [r3]
	ldr	r3, .L987+368
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+372
	strb	r2, [r3]
	ldr	r3, .L987+376
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+380
	str	r3, [r2]	@ float
	ldr	r3, .L987+384
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+388
	strb	r2, [r3]
	ldr	r3, .L987+392
	ldr	r3, [r3]
	ldr	r2, .L987+396
	str	r3, [r2]
	ldr	r3, .L987+400
	ldr	r3, [r3]
	ldr	r2, .L987+404
	str	r3, [r2]
	ldr	r3, .L987+408
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+412
	strb	r2, [r3]
	ldr	r3, .L987+416
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+420
	strb	r2, [r3]
	ldr	r3, .L987+424
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+428
	str	r3, [r2]	@ float
	ldr	r3, .L987+432
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+436
	strb	r2, [r3]
	ldr	r3, .L987+440
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+444
	strb	r2, [r3]
	ldr	r3, .L987+448
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+452
	str	r3, [r2]	@ float
	ldr	r3, .L987+456
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+460
	str	r3, [r2]	@ float
	ldr	r3, .L987+464
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+468
	strb	r2, [r3]
	ldr	r3, .L987+472
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+476
	str	r3, [r2]	@ float
	ldr	r3, .L987+480
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+484
	strb	r2, [r3]
	ldr	r3, .L987+488
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+492
	strb	r2, [r3]
	ldr	r3, .L987+496
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+500
	strb	r2, [r3]
	ldr	r3, .L987+504
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+508
	str	r3, [r2]	@ float
	ldr	r3, .L987+512
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+516
	strb	r2, [r3]
	ldr	r3, .L987+520
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+524
	str	r3, [r2]	@ float
	ldr	r3, .L987+528
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+532
	strb	r2, [r3]
	ldr	r3, .L987+536
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+540
	str	r3, [r2]	@ float
	ldr	r3, .L987+544
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+548
	str	r3, [r2]	@ float
	ldr	r3, .L987+552
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+556
	strb	r2, [r3]
	ldr	r3, .L987+560
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+564
	strb	r2, [r3]
	ldr	r3, .L987+568
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+572
	str	r3, [r2]	@ float
	ldr	r3, .L987+576
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+580
	strb	r2, [r3]
	ldr	r3, .L987+584
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+588
	strb	r2, [r3]
	ldr	r3, .L987+592
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+596
	str	r3, [r2]	@ float
	ldr	r3, .L987+600
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L987+604
	strb	r2, [r3]
	ldr	r3, .L987+608
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+612
	str	r3, [r2]	@ float
	ldr	r3, .L987+616
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+620
	str	r3, [r2]	@ float
	ldr	r3, .L987+624
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+628
	str	r3, [r2]	@ float
	ldr	r3, .L987+632
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+636
	str	r3, [r2]	@ float
	ldr	r3, .L987+640
	ldr	r3, [r3]	@ float
	ldr	r2, .L987+644
	str	r3, [r2]	@ float
.L154:
	ldr	r3, [fp, #-24]
	cmp	r3, #0
	bne	.L819
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
