	.file	"893828.c"
	.intel_syntax noprefix
	.text
	.globl	main
	.type	main, @function
main:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	movsd	xmm0, QWORD PTR .LC0[rip]
	movsd	QWORD PTR -32[rbp], xmm0
	pxor	xmm0, xmm0
	movsd	QWORD PTR -24[rbp], xmm0
	movsd	xmm0, QWORD PTR .LC2[rip]
	movsd	QWORD PTR -16[rbp], xmm0
	pxor	xmm0, xmm0
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	xmm0, QWORD PTR .LC2[rip]
	mov	rax, QWORD PTR .LC0[rip]
	pxor	xmm3, xmm3
	movapd	xmm2, xmm0
	pxor	xmm1, xmm1
	movq	xmm0, rax
	call	__muldc3@PLT
	movq	rax, xmm0
	movapd	xmm0, xmm1
	mov	rdx, rax
	movq	rax, xmm0
	mov	QWORD PTR -40[rbp], rdx
	mov	QWORD PTR -48[rbp], rax
	movsd	xmm0, QWORD PTR .LC0[rip]
	mov	rax, QWORD PTR .LC2[rip]
	pxor	xmm3, xmm3
	movapd	xmm2, xmm0
	pxor	xmm1, xmm1
	movq	xmm0, rax
	call	__muldc3@PLT
	movq	rax, xmm0
	movapd	xmm0, xmm1
	mov	rdx, rax
	movq	rax, xmm0
	movq	xmm1, rdx
	movq	xmm0, rax
	movsd	xmm4, QWORD PTR -40[rbp]
	ucomisd	xmm4, xmm1
	setp	al
	mov	edx, 1
	ucomisd	xmm4, xmm1
	cmove	edx, eax
	movsd	xmm5, QWORD PTR -48[rbp]
	ucomisd	xmm5, xmm0
	setp	al
	mov	ecx, 1
	ucomisd	xmm5, xmm0
	cmovne	eax, ecx
	or	eax, edx
	movzx	eax, al
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	main, .-main
	.globl	test2
	.type	test2, @function
test2:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	DWORD PTR -36[rbp], edi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	edi, 1
	call	bar@PLT
	movq	rax, xmm0
	movapd	xmm0, xmm1
	movq	xmm1, rax
	movsd	QWORD PTR -24[rbp], xmm1
	movsd	QWORD PTR -16[rbp], xmm0
	lea	rax, -24[rbp]
	mov	rdi, rax
	call	test@PLT
	movsd	xmm1, QWORD PTR -24[rbp]
	movsd	xmm0, QWORD PTR -16[rbp]
	movq	rax, xmm1
	movapd	xmm1, xmm0
	movq	xmm0, rax
	call	takecomplex@PLT
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	test2, .-test2
	.globl	g1
	.bss
	.align 8
	.type	g1, @object
	.size	g1, 16
g1:
	.zero	16
	.globl	g2
	.align 8
	.type	g2, @object
	.size	g2, 16
g2:
	.zero	16
	.globl	cf
	.align 4
	.type	cf, @object
	.size	cf, 8
cf:
	.zero	8
	.globl	D
	.align 8
	.type	D, @object
	.size	D, 8
D:
	.zero	8
	.text
	.globl	test3
	.type	test3, @function
test3:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	movsd	xmm3, QWORD PTR g1[rip]
	movsd	xmm2, QWORD PTR g1[rip+8]
	movsd	xmm1, QWORD PTR g2[rip]
	movsd	xmm0, QWORD PTR g2[rip+8]
	addsd	xmm1, xmm3
	addsd	xmm0, xmm2
	movsd	QWORD PTR g1[rip], xmm1
	movsd	QWORD PTR g1[rip+8], xmm0
	movsd	xmm1, QWORD PTR g1[rip]
	movsd	xmm0, QWORD PTR g1[rip+8]
	movsd	xmm3, QWORD PTR g2[rip]
	movsd	xmm2, QWORD PTR g2[rip+8]
	subsd	xmm1, xmm3
	subsd	xmm0, xmm2
	movsd	QWORD PTR g1[rip], xmm1
	movsd	QWORD PTR g1[rip+8], xmm0
	mov	rax, QWORD PTR g1[rip]
	movsd	xmm0, QWORD PTR g1[rip+8]
	movsd	xmm1, QWORD PTR g2[rip]
	movsd	xmm2, QWORD PTR g2[rip+8]
	movapd	xmm3, xmm2
	movapd	xmm2, xmm1
	movapd	xmm1, xmm0
	movq	xmm0, rax
	call	__muldc3@PLT
	movq	rax, xmm0
	movapd	xmm0, xmm1
	mov	rdx, rax
	movq	rax, xmm0
	movq	xmm1, rdx
	movq	xmm0, rax
	movsd	QWORD PTR g1[rip], xmm1
	movsd	QWORD PTR g1[rip+8], xmm0
	movsd	xmm1, QWORD PTR g1[rip]
	movsd	xmm0, QWORD PTR g1[rip+8]
	movq	xmm2, QWORD PTR .LC3[rip]
	xorpd	xmm0, xmm2
	movq	xmm2, QWORD PTR .LC3[rip]
	xorpd	xmm1, xmm2
	movq	xmm2, QWORD PTR .LC3[rip]
	xorpd	xmm0, xmm2
	movsd	QWORD PTR g1[rip], xmm1
	movsd	QWORD PTR g1[rip+8], xmm0
	movsd	xmm0, QWORD PTR g1[rip]
	movsd	QWORD PTR -8[rbp], xmm0
	movss	xmm1, DWORD PTR cf[rip]
	movss	xmm0, DWORD PTR cf[rip+4]
	cvtss2sd	xmm1, xmm1
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, xmm0
	movsd	xmm0, QWORD PTR D[rip]
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	cvtsd2ss	xmm1, xmm0
	pxor	xmm0, xmm0
	cvtsd2ss	xmm0, xmm2
	movss	DWORD PTR cf[rip], xmm1
	movss	DWORD PTR cf[rip+4], xmm0
	movss	xmm0, DWORD PTR cf[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movsd	xmm0, QWORD PTR D[rip]
	addsd	xmm0, xmm1
	movsd	QWORD PTR D[rip], xmm0
	movss	xmm1, DWORD PTR cf[rip]
	movss	xmm0, DWORD PTR cf[rip+4]
	pxor	xmm4, xmm4
	cvtss2sd	xmm4, xmm1
	movq	rax, xmm4
	cvtss2sd	xmm0, xmm0
	movsd	xmm1, QWORD PTR g1[rip]
	movsd	xmm2, QWORD PTR g1[rip+8]
	movapd	xmm3, xmm2
	movapd	xmm2, xmm1
	movapd	xmm1, xmm0
	movq	xmm0, rax
	call	__divdc3@PLT
	movq	rax, xmm0
	movapd	xmm0, xmm1
	mov	rdx, rax
	movq	rax, xmm0
	movq	xmm1, rdx
	movq	xmm0, rax
	cvtsd2ss	xmm1, xmm1
	cvtsd2ss	xmm0, xmm0
	movss	DWORD PTR cf[rip], xmm1
	movss	DWORD PTR cf[rip+4], xmm0
	movsd	xmm2, QWORD PTR g1[rip]
	movsd	xmm0, QWORD PTR g1[rip+8]
	movsd	xmm1, QWORD PTR D[rip]
	addsd	xmm1, xmm2
	movsd	QWORD PTR g1[rip], xmm1
	movsd	QWORD PTR g1[rip+8], xmm0
	movsd	xmm2, QWORD PTR g1[rip]
	movsd	xmm0, QWORD PTR g1[rip+8]
	movsd	xmm1, QWORD PTR D[rip]
	addsd	xmm1, xmm2
	movsd	QWORD PTR g1[rip], xmm1
	movsd	QWORD PTR g1[rip+8], xmm0
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	test3, .-test3
	.globl	ci1
	.bss
	.align 4
	.type	ci1, @object
	.size	ci1, 8
ci1:
	.zero	8
	.globl	ci2
	.align 4
	.type	ci2, @object
	.size	ci2, 8
ci2:
	.zero	8
	.globl	cs
	.align 2
	.type	cs, @object
	.size	cs, 4
cs:
	.zero	4
	.globl	i
	.align 4
	.type	i, @object
	.size	i, 4
i:
	.zero	4
	.text
	.globl	test3int
	.type	test3int, @function
test3int:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	esi, DWORD PTR ci1[rip]
	mov	ecx, DWORD PTR ci1[rip+4]
	mov	edx, DWORD PTR ci2[rip]
	mov	eax, DWORD PTR ci2[rip+4]
	add	edx, esi
	add	eax, ecx
	mov	DWORD PTR ci1[rip], edx
	mov	DWORD PTR ci1[rip+4], eax
	mov	edx, DWORD PTR ci1[rip]
	mov	eax, DWORD PTR ci1[rip+4]
	mov	esi, DWORD PTR ci2[rip]
	mov	ecx, DWORD PTR ci2[rip+4]
	sub	edx, esi
	sub	eax, ecx
	mov	DWORD PTR ci1[rip], edx
	mov	DWORD PTR ci1[rip+4], eax
	mov	esi, DWORD PTR ci1[rip]
	mov	edx, DWORD PTR ci1[rip+4]
	mov	eax, DWORD PTR ci2[rip]
	mov	ecx, DWORD PTR ci2[rip+4]
	mov	edi, esi
	imul	edi, eax
	mov	r8d, edx
	imul	r8d, ecx
	imul	ecx, esi
	imul	eax, edx
	sub	edi, r8d
	mov	edx, edi
	add	eax, ecx
	mov	DWORD PTR ci1[rip], edx
	mov	DWORD PTR ci1[rip+4], eax
	mov	eax, DWORD PTR ci1[rip]
	mov	edx, DWORD PTR ci1[rip+4]
	mov	ecx, edx
	neg	ecx
	neg	eax
	mov	edx, eax
	mov	eax, ecx
	neg	eax
	mov	DWORD PTR ci1[rip], edx
	mov	DWORD PTR ci1[rip+4], eax
	mov	eax, DWORD PTR ci1[rip]
	mov	DWORD PTR i[rip], eax
	movzx	edx, WORD PTR cs[rip]
	movzx	eax, WORD PTR cs[rip+2]
	movsx	ecx, dx
	cwde
	mov	edx, DWORD PTR i[rip]
	add	edx, ecx
	mov	WORD PTR cs[rip], dx
	mov	WORD PTR cs[rip+2], ax
	movss	xmm0, DWORD PTR cf[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movsd	xmm0, QWORD PTR D[rip]
	addsd	xmm0, xmm1
	movsd	QWORD PTR D[rip], xmm0
	movzx	edx, WORD PTR cs[rip]
	movzx	eax, WORD PTR cs[rip+2]
	movsx	r8d, dx
	movsx	edi, ax
	mov	ecx, DWORD PTR ci1[rip]
	mov	esi, DWORD PTR ci1[rip+4]
	mov	eax, ecx
	sar	eax, 31
	mov	edx, eax
	xor	edx, ecx
	sub	edx, eax
	mov	r9d, esi
	sar	r9d, 31
	mov	eax, r9d
	xor	eax, esi
	sub	eax, r9d
	cmp	edx, eax
	setl	al
	test	al, al
	je	.L7
	mov	eax, ecx
	cdq
	idiv	esi
	imul	ecx, eax
	mov	edx, ecx
	lea	ecx, [rsi+rdx]
	mov	edx, r8d
	imul	edx, eax
	add	edx, edi
	imul	eax, edi
	sub	eax, r8d
	mov	esi, eax
	mov	eax, edx
	cdq
	idiv	ecx
	mov	edi, eax
	mov	eax, esi
	cdq
	idiv	ecx
	jmp	.L8
.L7:
	mov	eax, esi
	cdq
	idiv	ecx
	imul	esi, eax
	mov	edx, esi
	add	ecx, edx
	mov	edx, edi
	imul	edx, eax
	add	edx, r8d
	imul	eax, r8d
	sub	edi, eax
	mov	esi, edi
	mov	eax, edx
	cdq
	idiv	ecx
	mov	edi, eax
	mov	eax, esi
	cdq
	idiv	ecx
.L8:
	mov	edx, edi
	mov	WORD PTR cs[rip], dx
	mov	WORD PTR cs[rip+2], ax
	mov	ecx, DWORD PTR i[rip]
	mov	edx, DWORD PTR ci1[rip]
	mov	eax, DWORD PTR ci1[rip+4]
	add	edx, ecx
	mov	DWORD PTR ci1[rip], edx
	mov	DWORD PTR ci1[rip+4], eax
	mov	ecx, DWORD PTR i[rip]
	mov	edx, DWORD PTR ci1[rip]
	mov	eax, DWORD PTR ci1[rip+4]
	add	edx, ecx
	mov	DWORD PTR ci1[rip], edx
	mov	DWORD PTR ci1[rip+4], eax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	test3int, .-test3int
	.globl	t1
	.type	t1, @function
t1:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	xmm0, DWORD PTR .LC4[rip]
	movss	DWORD PTR cf[rip], xmm0
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	t1, .-t1
	.globl	t2
	.type	t2, @function
t2:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	xmm0, DWORD PTR .LC4[rip]
	movss	DWORD PTR cf[rip+4], xmm0
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	t2, .-t2
	.section	.rodata
	.align 8
.LC5:
	.quad	2
	.quad	0
	.text
	.globl	t3
	.type	t3, @function
t3:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	rax, QWORD PTR .LC5[rip]
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR .LC5[rip+8]
	mov	QWORD PTR -8[rbp], rax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	t3, .-t3
	.globl	t5
	.type	t5, @function
t5:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, 0
	call	t4@PLT
	movq	rax, xmm0
	mov	QWORD PTR -8[rbp], rax
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	t5, .-t5
	.globl	t6
	.type	t6, @function
t6:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	xmm1, QWORD PTR g1[rip]
	movsd	xmm0, QWORD PTR .LC6[rip]
	addsd	xmm0, xmm1
	movsd	QWORD PTR g1[rip], xmm0
	movsd	xmm0, QWORD PTR g1[rip]
	movsd	xmm1, QWORD PTR .LC6[rip]
	subsd	xmm0, xmm1
	movsd	QWORD PTR g1[rip], xmm0
	movsd	xmm1, QWORD PTR g1[rip]
	movsd	xmm0, QWORD PTR .LC6[rip]
	addsd	xmm0, xmm1
	movsd	QWORD PTR g1[rip], xmm0
	movsd	xmm0, QWORD PTR g1[rip]
	movsd	xmm1, QWORD PTR .LC6[rip]
	subsd	xmm0, xmm1
	movsd	QWORD PTR g1[rip], xmm0
	mov	eax, DWORD PTR ci1[rip]
	add	eax, 1
	mov	DWORD PTR ci1[rip], eax
	mov	eax, DWORD PTR ci1[rip]
	sub	eax, 1
	mov	DWORD PTR ci1[rip], eax
	mov	eax, DWORD PTR ci1[rip]
	add	eax, 1
	mov	DWORD PTR ci1[rip], eax
	mov	eax, DWORD PTR ci1[rip]
	sub	eax, 1
	mov	DWORD PTR ci1[rip], eax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	t6, .-t6
	.globl	t7
	.type	t7, @function
t7:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movq	rax, xmm0
	movapd	xmm0, xmm1
	mov	rdx, rax
	movq	rax, xmm0
	movq	xmm1, rdx
	movq	xmm0, rax
	movsd	QWORD PTR -16[rbp], xmm1
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	xmm0, QWORD PTR -16[rbp]
	movq	xmm1, QWORD PTR .LC7[rip]
	andpd	xmm0, xmm1
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	t7, .-t7
	.section	.rodata
	.align 4
.LC8:
	.long	1
	.long	0
	.text
	.globl	t8
	.type	t8, @function
t8:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	rax, QWORD PTR .LC8[rip]
	mov	QWORD PTR -16[rbp], rax
	lea	rax, -16[rbp]
	mov	QWORD PTR -24[rbp], rax
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	t8, .-t8
	.globl	test9const
	.section	.rodata
	.align 8
	.type	test9const, @object
	.size	test9const, 16
test9const:
	.zero	16
	.text
	.globl	test9func
	.type	test9func, @function
test9func:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	pxor	xmm1, xmm1
	pxor	xmm0, xmm0
	movq	rax, xmm1
	movq	rdx, xmm0
	movq	xmm1, rdx
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	test9func, .-test9func
	.section	.rodata
	.align 8
.LC0:
	.long	0
	.long	1075052544
	.align 8
.LC2:
	.long	0
	.long	1078263808
	.align 16
.LC3:
	.long	0
	.long	-2147483648
	.long	0
	.long	0
	.align 4
.LC4:
	.long	1082130432
	.align 8
.LC6:
	.long	0
	.long	1072693248
	.align 16
.LC7:
	.long	-1
	.long	2147483647
	.long	0
	.long	0
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"893828.c"
	.text
	.global	__aeabi_dcmpeq
	.section	.rodata
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 56
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	add	fp, sp, #32
	sub	sp, sp, #84
	ldr	r3, .L6
	ldr	r3, [r3]
	str	r3, [fp, #-40]
	mov	r3,#0
	mov	r2, #0
	ldr	r3, .L6+4
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-68]
	str	r3, [fp, #-64]
	mov	r2, #0
	ldr	r3, .L6+8
	str	r2, [fp, #-60]
	str	r3, [fp, #-56]
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-52]
	str	r3, [fp, #-48]
	sub	r1, fp, #92
	mov	r2, #0
	mov	r3, #0
	str	r2, [sp, #16]
	str	r3, [sp, #20]
	mov	r2, #0
	ldr	r3, .L6+8
	str	r2, [sp, #8]
	str	r3, [sp, #12]
	mov	r2, #0
	mov	r3, #0
	stm	sp, {r2-r3}
	mov	r2, #0
	ldr	r3, .L6+4
	mov	r0, r1
	bl	__muldc3
	sub	r1, fp, #92
	ldmia	r1, {r0-r1}
	sub	r3, fp, #84
	ldmia	r3, {r2-r3}
	mov	r4, r0
	mov	r5, r1
	mov	r6, r2
	mov	r7, r3
	sub	r1, fp, #92
	mov	r2, #0
	mov	r3, #0
	str	r2, [sp, #16]
	str	r3, [sp, #20]
	mov	r2, #0
	ldr	r3, .L6+4
	str	r2, [sp, #8]
	str	r3, [sp, #12]
	mov	r2, #0
	mov	r3, #0
	stm	sp, {r2-r3}
	mov	r2, #0
	ldr	r3, .L6+8
	mov	r0, r1
	bl	__muldc3
	sub	r1, fp, #92
	ldmia	r1, {r0-r1}
	sub	r3, fp, #84
	ldmia	r3, {r2-r3}
	mov	r8, r2
	mov	r9, r3
	mov	r3, #1
	mov	r10, r3
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L2
	mov	r3, #0
	mov	r10, r3
.L2:
	and	r4, r10, #255
	mov	r3, #1
	mov	r5, r3
	mov	r2, r8
	mov	r3, r9
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L3
	mov	r3, #0
	mov	r5, r3
.L3:
	and	r3, r5, #255
	orr	r3, r4, r3
	and	r3, r3, #255
	ldr	r2, .L6
	ldr	r1, [r2]
	ldr	r2, [fp, #-40]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L5
	bl	__stack_chk_fail
.L5:
	mov	r0, r3
	sub	sp, fp, #32
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L7:
	.align	2
.L6:
	.word	.LC0
	.word	1075052544
	.word	1078263808
	.size	main, .-main
	.section	.rodata
	.align	2
.LC1:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	test2
	.syntax unified
	.arm
	.fpu softvfp
	.type	test2, %function
test2:
	@ args = 0, pretend = 0, frame = 48
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #48
	str	r0, [fp, #-48]
	ldr	r3, .L10
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	mov	r3,#0
	sub	r3, fp, #68
	mov	r1, #1
	mov	r0, r3
	bl	bar
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	str	r0, [fp, #-44]
	str	r1, [fp, #-40]
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	sub	r3, fp, #44
	mov	r0, r3
	bl	test
	sub	r7, fp, #44
	ldmia	r7, {r6-r7}
	sub	r5, fp, #36
	ldmia	r5, {r4-r5}
	mov	r0, r6
	mov	r1, r7
	mov	r2, r4
	mov	r3, r5
	bl	takecomplex
	nop
	ldr	r3, .L10
	ldr	r2, [r3]
	ldr	r3, [fp, #-24]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L9
	bl	__stack_chk_fail
.L9:
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
.L11:
	.align	2
.L10:
	.word	.LC1
	.size	test2, .-test2
	.comm	g1,16,8
	.comm	g2,16,8
	.comm	cf,8,4
	.comm	D,8,8
	.global	__aeabi_dadd
	.global	__aeabi_dsub
	.global	__aeabi_f2d
	.global	__aeabi_d2f
	.section	.rodata
	.align	2
.LC2:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	test3
	.syntax unified
	.arm
	.fpu softvfp
	.type	test3, %function
test3:
	@ args = 0, pretend = 0, frame = 56
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #80
	ldr	r3, .L14
	ldr	r3, [r3]
	str	r3, [fp, #-32]
	mov	r3,#0
	ldr	r3, .L14+4
	ldmia	r3, {r4-r5}
	ldr	r3, .L14+4
	add	r7, r3, #8
	ldmia	r7, {r6-r7}
	ldr	r3, .L14+8
	ldmia	r3, {r2-r3}
	ldr	r1, .L14+8
	add	r9, r1, #8
	ldmia	r9, {r8-r9}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	mov	r2, r8
	mov	r3, r9
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L14+4
	stm	r1, {r4-r5}
	ldr	r1, .L14+4
	str	r2, [r1, #8]
	str	r3, [r1, #12]
	ldr	r3, .L14+4
	ldmia	r3, {r4-r5}
	ldr	r3, .L14+4
	add	r7, r3, #8
	ldmia	r7, {r6-r7}
	ldr	r3, .L14+8
	ldmia	r3, {r2-r3}
	ldr	r1, .L14+8
	add	r9, r1, #8
	ldmia	r9, {r8-r9}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	mov	r2, r8
	mov	r3, r9
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L14+4
	stm	r1, {r4-r5}
	ldr	r1, .L14+4
	str	r2, [r1, #8]
	str	r3, [r1, #12]
	ldr	r3, .L14+4
	ldmia	r3, {r6-r7}
	ldr	r3, .L14+4
	add	r1, r3, #8
	ldmia	r1, {r0-r1}
	ldr	r3, .L14+8
	ldmia	r3, {r4-r5}
	ldr	r3, .L14+8
	add	r3, r3, #8
	ldmia	r3, {r2-r3}
	sub	ip, fp, #60
	str	r2, [sp, #16]
	str	r3, [sp, #20]
	str	r4, [sp, #8]
	str	r5, [sp, #12]
	stm	sp, {r0-r1}
	mov	r2, r6
	mov	r3, r7
	mov	r0, ip
	bl	__muldc3
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	ldr	ip, .L14+4
	stm	ip, {r0-r1}
	ldr	r1, .L14+4
	str	r2, [r1, #8]
	str	r3, [r1, #12]
	ldr	r3, .L14+4
	ldmia	r3, {r2-r3}
	ldr	r1, .L14+4
	add	r1, r1, #8
	ldmia	r1, {r0-r1}
	str	r0, [fp, #-68]
	eor	r1, r1, #-2147483648
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	eor	r3, r3, #-2147483648
	str	r3, [fp, #-72]
	sub	r4, fp, #68
	ldmia	r4, {r3-r4}
	mov	r2, r3
	str	r2, [fp, #-84]
	mov	r3, r4
	eor	r3, r3, #-2147483648
	str	r3, [fp, #-80]
	ldr	r3, .L14+4
	sub	r2, fp, #76
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r3, .L14+4
	sub	r2, fp, #84
	ldmia	r2, {r1-r2}
	str	r1, [r3, #8]
	str	r2, [r3, #12]
	ldr	r3, .L14+4
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	ldr	r3, .L14+12
	ldr	r3, [r3]	@ float
	ldr	r2, .L14+12
	ldr	r4, [r2, #4]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	mov	r0, r4
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L14+16
	ldmia	r3, {r2-r3}
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2f
	mov	r6, r0
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_d2f
	mov	r3, r0
	ldr	r2, .L14+12
	str	r6, [r2]	@ float
	ldr	r2, .L14+12
	str	r3, [r2, #4]	@ float
	ldr	r3, .L14+12
	ldr	r3, [r3]	@ float
	ldr	r2, .L14+12
	ldr	r6, [r2, #4]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	mov	r0, r6
	bl	__aeabi_f2d
	ldr	r3, .L14+16
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L14+16
	stm	r1, {r2-r3}
	ldr	r3, .L14+12
	ldr	r3, [r3]	@ float
	ldr	r2, .L14+12
	ldr	r4, [r2, #4]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	mov	r0, r4
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L14+4
	ldmia	r3, {r2-r3}
	ldr	r1, .L14+4
	add	r1, r1, #8
	ldmia	r1, {r0-r1}
	sub	ip, fp, #60
	str	r0, [sp, #16]
	str	r1, [sp, #20]
	str	r2, [sp, #8]
	str	r3, [sp, #12]
	stm	sp, {r4-r5}
	mov	r2, r6
	mov	r3, r7
	mov	r0, ip
	bl	__divdc3
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	mov	r6, r2
	mov	r7, r3
	bl	__aeabi_d2f
	mov	r4, r0
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_d2f
	mov	r3, r0
	ldr	r2, .L14+12
	str	r4, [r2]	@ float
	ldr	r2, .L14+12
	str	r3, [r2, #4]	@ float
	ldr	r3, .L14+4
	ldmia	r3, {r0-r1}
	ldr	r3, .L14+4
	add	r5, r3, #8
	ldmia	r5, {r4-r5}
	ldr	r3, .L14+16
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L14+4
	stm	r1, {r2-r3}
	ldr	r3, .L14+4
	str	r4, [r3, #8]
	str	r5, [r3, #12]
	ldr	r3, .L14+4
	ldmia	r3, {r0-r1}
	ldr	r3, .L14+4
	add	r5, r3, #8
	ldmia	r5, {r4-r5}
	ldr	r3, .L14+16
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L14+4
	stm	r1, {r2-r3}
	ldr	r3, .L14+4
	str	r4, [r3, #8]
	str	r5, [r3, #12]
	nop
	ldr	r3, .L14
	ldr	r2, [r3]
	ldr	r3, [fp, #-32]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L13
	bl	__stack_chk_fail
.L13:
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L15:
	.align	2
.L14:
	.word	.LC2
	.word	g1
	.word	g2
	.word	cf
	.word	D
	.size	test3, .-test3
	.comm	ci1,8,4
	.comm	ci2,8,4
	.comm	cs,4,2
	.comm	i,4,4
	.global	__aeabi_idiv
	.align	2
	.global	test3int
	.syntax unified
	.arm
	.fpu softvfp
	.type	test3int, %function
test3int:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	ldr	r3, .L19
	ldr	r0, [r3]
	ldr	r3, .L19
	ldr	r1, [r3, #4]
	ldr	r3, .L19+4
	ldr	r2, [r3]
	ldr	r3, .L19+4
	ldr	r3, [r3, #4]
	add	r2, r0, r2
	add	r3, r1, r3
	ldr	r1, .L19
	str	r2, [r1]
	ldr	r2, .L19
	str	r3, [r2, #4]
	ldr	r3, .L19
	ldr	r0, [r3]
	ldr	r3, .L19
	ldr	r1, [r3, #4]
	ldr	r3, .L19+4
	ldr	r2, [r3]
	ldr	r3, .L19+4
	ldr	r3, [r3, #4]
	sub	r2, r0, r2
	sub	r3, r1, r3
	ldr	r1, .L19
	str	r2, [r1]
	ldr	r2, .L19
	str	r3, [r2, #4]
	ldr	r3, .L19
	ldr	r1, [r3]
	ldr	r3, .L19
	ldr	r3, [r3, #4]
	ldr	r2, .L19+4
	ldr	r2, [r2]
	ldr	r0, .L19+4
	ldr	r0, [r0, #4]
	mul	lr, r2, r1
	mul	ip, r0, r3
	mul	r1, r0, r1
	mul	r3, r2, r3
	sub	r2, lr, ip
	add	r3, r1, r3
	ldr	r1, .L19
	str	r2, [r1]
	ldr	r2, .L19
	str	r3, [r2, #4]
	ldr	r3, .L19
	ldr	r2, [r3]
	ldr	r3, .L19
	ldr	r3, [r3, #4]
	rsb	r3, r3, #0
	rsb	r2, r2, #0
	rsb	r3, r3, #0
	ldr	r1, .L19
	str	r2, [r1]
	ldr	r2, .L19
	str	r3, [r2, #4]
	ldr	r3, .L19
	ldr	r3, [r3]
	ldr	r2, .L19+8
	str	r3, [r2]
	ldr	r3, .L19+12
	ldrsh	r2, [r3]
	ldr	r3, .L19+12
	ldrsh	r3, [r3, #2]
	mov	r1, r3
	ldr	r3, .L19+8
	ldr	r3, [r3]
	add	r3, r2, r3
	lsl	r3, r3, #16
	asr	r2, r3, #16
	lsl	r3, r1, #16
	asr	r3, r3, #16
	ldr	r1, .L19+12
	strh	r2, [r1]	@ movhi
	ldr	r2, .L19+12
	strh	r3, [r2, #2]	@ movhi
	ldr	r3, .L19+16
	ldr	r3, [r3]	@ float
	ldr	r2, .L19+16
	ldr	r6, [r2, #4]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	mov	r0, r6
	bl	__aeabi_f2d
	ldr	r3, .L19+20
	ldmia	r3, {r2-r3}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L19+20
	stm	r1, {r2-r3}
	ldr	r3, .L19+12
	ldrsh	r2, [r3]
	ldr	r3, .L19+12
	ldrsh	r3, [r3, #2]
	mov	r7, r2
	mov	r6, r3
	ldr	r3, .L19
	ldr	r4, [r3]
	ldr	r3, .L19
	ldr	r5, [r3, #4]
	eor	r2, r4, r4, asr #31
	sub	r2, r2, r4, asr #31
	eor	r3, r5, r5, asr #31
	sub	r3, r3, r5, asr #31
	cmp	r2, r3
	movlt	r3, #1
	movge	r3, #0
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L17
	mov	r1, r5
	mov	r0, r4
	bl	__aeabi_idiv
	mov	r3, r0
	mul	r2, r3, r4
	add	r4, r5, r2
	mul	r2, r3, r7
	add	r2, r6, r2
	mul	r3, r6, r3
	sub	r5, r3, r7
	mov	r1, r4
	mov	r0, r2
	bl	__aeabi_idiv
	mov	r3, r0
	mov	r6, r3
	mov	r1, r4
	mov	r0, r5
	bl	__aeabi_idiv
	mov	r3, r0
	mov	r1, r3
	b	.L18
.L17:
	mov	r1, r4
	mov	r0, r5
	bl	__aeabi_idiv
	mov	r3, r0
	mul	r2, r3, r5
	add	r4, r4, r2
	mul	r2, r3, r6
	add	r2, r7, r2
	mul	r3, r7, r3
	sub	r5, r6, r3
	mov	r1, r4
	mov	r0, r2
	bl	__aeabi_idiv
	mov	r3, r0
	mov	r6, r3
	mov	r1, r4
	mov	r0, r5
	bl	__aeabi_idiv
	mov	r3, r0
	mov	r1, r3
.L18:
	lsl	r3, r6, #16
	asr	r2, r3, #16
	lsl	r3, r1, #16
	asr	r3, r3, #16
	ldr	r1, .L19+12
	strh	r2, [r1]	@ movhi
	ldr	r2, .L19+12
	strh	r3, [r2, #2]	@ movhi
	ldr	r3, .L19+8
	ldr	r1, [r3]
	ldr	r3, .L19
	ldr	r2, [r3]
	ldr	r3, .L19
	ldr	r3, [r3, #4]
	add	r2, r1, r2
	ldr	r1, .L19
	str	r2, [r1]
	ldr	r2, .L19
	str	r3, [r2, #4]
	ldr	r3, .L19+8
	ldr	r1, [r3]
	ldr	r3, .L19
	ldr	r2, [r3]
	ldr	r3, .L19
	ldr	r3, [r3, #4]
	add	r2, r1, r2
	ldr	r1, .L19
	str	r2, [r1]
	ldr	r2, .L19
	str	r3, [r2, #4]
	nop
	pop	{r4, r5, r6, r7, fp, pc}
.L20:
	.align	2
.L19:
	.word	ci1
	.word	ci2
	.word	i
	.word	cs
	.word	cf
	.word	D
	.size	test3int, .-test3int
	.align	2
	.global	t1
	.syntax unified
	.arm
	.fpu softvfp
	.type	t1, %function
t1:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L22
	ldr	r2, .L22+4
	str	r2, [r3]	@ float
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L23:
	.align	2
.L22:
	.word	cf
	.word	1082130432
	.size	t1, .-t1
	.align	2
	.global	t2
	.syntax unified
	.arm
	.fpu softvfp
	.type	t2, %function
t2:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L25
	ldr	r2, .L25+4
	str	r2, [r3, #4]	@ float
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L26:
	.align	2
.L25:
	.word	cf
	.word	1082130432
	.size	t2, .-t2
	.section	.rodata
	.align	3
.LC3:
	.word	2
	.word	0
	.word	0
	.word	0
	.text
	.align	2
	.global	t3
	.syntax unified
	.arm
	.fpu softvfp
	.type	t3, %function
t3:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	ldr	r3, .L28
	sub	ip, fp, #20
	ldm	r3, {r0, r1, r2, r3}
	stm	ip, {r0, r1, r2, r3}
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L29:
	.align	2
.L28:
	.word	.LC3
	.size	t3, .-t3
	.section	.rodata
	.align	2
.LC4:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	t5
	.syntax unified
	.arm
	.fpu softvfp
	.type	t5, %function
t5:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	ldr	r3, .L32
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	sub	r3, fp, #28
	mov	r0, r3
	bl	t4
	ldr	r3, [fp, #-28]	@ float
	str	r3, [fp, #-16]	@ float
	ldr	r3, [fp, #-24]	@ float
	str	r3, [fp, #-12]	@ float
	nop
	ldr	r3, .L32
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L31
	bl	__stack_chk_fail
.L31:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L33:
	.align	2
.L32:
	.word	.LC4
	.size	t5, .-t5
	.align	2
	.global	t6
	.syntax unified
	.arm
	.fpu softvfp
	.type	t6, %function
t6:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L35
	ldmia	r3, {r0-r1}
	mov	r2, #0
	ldr	r3, .L35+4
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L35
	stm	r1, {r2-r3}
	ldr	r3, .L35
	ldmia	r3, {r0-r1}
	mov	r2, #0
	ldr	r3, .L35+4
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L35
	stm	r1, {r2-r3}
	ldr	r3, .L35
	ldmia	r3, {r0-r1}
	mov	r2, #0
	ldr	r3, .L35+4
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L35
	stm	r1, {r2-r3}
	ldr	r3, .L35
	ldmia	r3, {r0-r1}
	mov	r2, #0
	ldr	r3, .L35+4
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L35
	stm	r1, {r2-r3}
	ldr	r3, .L35+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L35+8
	str	r3, [r2]
	ldr	r3, .L35+8
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r2, .L35+8
	str	r3, [r2]
	ldr	r3, .L35+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L35+8
	str	r3, [r2]
	ldr	r3, .L35+8
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r2, .L35+8
	str	r3, [r2]
	nop
	pop	{fp, pc}
.L36:
	.align	2
.L35:
	.word	g1
	.word	1072693248
	.word	ci1
	.size	t6, .-t6
	.align	2
	.global	t7
	.syntax unified
	.arm
	.fpu softvfp
	.type	t7, %function
t7:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, fp}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-28]
	str	r1, [fp, #-24]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	mov	r4, r2
	bic	r5, r3, #-2147483648
	mov	r2, r4
	mov	r3, r5
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, r5, fp}
	bx	lr
	.size	t7, .-t7
	.section	.rodata
	.align	2
.LC5:
	.word	1
	.word	0
	.align	2
.LC6:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	t8
	.syntax unified
	.arm
	.fpu softvfp
	.type	t8, %function
t8:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	ldr	r3, .L41
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	ldr	r3, .L41+4
	ldr	r2, [r3]
	str	r2, [fp, #-16]
	ldr	r3, [r3, #4]
	str	r3, [fp, #-12]
	sub	r3, fp, #16
	str	r3, [fp, #-20]
	nop
	ldr	r3, .L41
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L40
	bl	__stack_chk_fail
.L40:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L42:
	.align	2
.L41:
	.word	.LC6
	.word	.LC5
	.size	t8, .-t8
	.global	test9const
	.section	.rodata
	.align	3
	.type	test9const, %object
	.size	test9const, 16
test9const:
	.space	16
	.text
	.align	2
	.global	test9func
	.syntax unified
	.arm
	.fpu softvfp
	.type	test9func, %function
test9func:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, fp}
	add	fp, sp, #8
	sub	sp, sp, #12
	str	r0, [fp, #-16]
	mov	r4, #0
	mov	r5, #0
	mov	r0, #0
	mov	r1, #0
	ldr	r3, [fp, #-16]
	stm	r3, {r4-r5}
	str	r0, [r3, #8]
	str	r1, [r3, #12]
	ldr	r0, [fp, #-16]
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, r5, fp}
	bx	lr
	.size	test9func, .-test9func
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
